blob: 721a358531b01325da29033f35da12c317d6cb48 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchart6e471fa2017-05-06 02:57:12 +030020#include <linux/sys_soc.h>
21
Laurent Pinchart748471a52015-03-05 23:42:39 +020022#include <drm/drm_atomic.h>
Laurent Pinchartcef77d42015-03-05 21:50:00 +020023#include <drm/drm_atomic_helper.h>
Laurent Pinchart2d278f52015-03-05 21:31:37 +020024#include <drm/drm_crtc_helper.h>
25#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060026
Andy Gross5c137792012-03-05 10:48:39 -060027#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020028#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060029
30#define DRIVER_NAME MODULE_NAME
31#define DRIVER_DESC "OMAP DRM"
32#define DRIVER_DATE "20110917"
33#define DRIVER_MAJOR 1
34#define DRIVER_MINOR 0
35#define DRIVER_PATCHLEVEL 0
36
Rob Clarkcd5351f2011-11-12 12:09:40 -060037/*
38 * mode config funcs
39 */
40
41/* Notes about mapping DSS and DRM entities:
42 * CRTC: overlay
43 * encoder: manager.. with some extension to allow one primary CRTC
44 * and zero or more video CRTC's to be mapped to one encoder?
45 * connector: dssdev.. manager can be attached/detached from different
46 * devices
47 */
48
49static void omap_fb_output_poll_changed(struct drm_device *dev)
50{
51 struct omap_drm_private *priv = dev->dev_private;
52 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090053 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060054 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060055}
56
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030057static void omap_atomic_wait_for_completion(struct drm_device *dev,
58 struct drm_atomic_state *old_state)
59{
Maarten Lankhorst34d88232017-07-19 16:39:17 +020060 struct drm_crtc_state *new_crtc_state;
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030061 struct drm_crtc *crtc;
62 unsigned int i;
63 int ret;
64
Maarten Lankhorst34d88232017-07-19 16:39:17 +020065 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
66 if (!new_crtc_state->active)
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030067 continue;
68
69 ret = omap_crtc_wait_pending(crtc);
70
71 if (!ret)
72 dev_warn(dev->dev,
73 "atomic complete timeout (pipe %u)!\n", i);
74 }
75}
76
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030077static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
Laurent Pinchart748471a52015-03-05 23:42:39 +020078{
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030079 struct drm_device *dev = old_state->dev;
Laurent Pinchart748471a52015-03-05 23:42:39 +020080 struct omap_drm_private *priv = dev->dev_private;
Laurent Pinchart748471a52015-03-05 23:42:39 +020081
Tomi Valkeinen9f759222015-11-05 18:39:52 +020082 priv->dispc_ops->runtime_get();
Laurent Pinchart69fb7c82015-05-28 02:09:56 +030083
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030084 /* Apply the atomic update. */
Laurent Pinchart748471a52015-03-05 23:42:39 +020085 drm_atomic_helper_commit_modeset_disables(dev, old_state);
Jyri Sarha897145d2017-01-27 12:04:55 +020086
87 /* With the current dss dispc implementation we have to enable
88 * the new modeset before we can commit planes. The dispc ovl
89 * configuration relies on the video mode configuration been
90 * written into the HW when the ovl configuration is
91 * calculated.
92 *
93 * This approach is not ideal because after a mode change the
94 * plane update is executed only after the first vblank
95 * interrupt. The dispc implementation should be fixed so that
96 * it is able use uncommitted drm state information.
97 */
Laurent Pinchart748471a52015-03-05 23:42:39 +020098 drm_atomic_helper_commit_modeset_enables(dev, old_state);
Jyri Sarha897145d2017-01-27 12:04:55 +020099 omap_atomic_wait_for_completion(dev, old_state);
100
101 drm_atomic_helper_commit_planes(dev, old_state, 0);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200102
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300103 drm_atomic_helper_commit_hw_done(old_state);
104
105 /*
106 * Wait for completion of the page flips to ensure that old buffers
107 * can't be touched by the hardware anymore before cleaning up planes.
108 */
Tomi Valkeinen5f741b32015-05-29 16:01:18 +0300109 omap_atomic_wait_for_completion(dev, old_state);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200110
111 drm_atomic_helper_cleanup_planes(dev, old_state);
112
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200113 priv->dispc_ops->runtime_put();
Laurent Pinchart748471a52015-03-05 23:42:39 +0200114}
115
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300116static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
117 .atomic_commit_tail = omap_atomic_commit_tail,
118};
Laurent Pinchart748471a52015-03-05 23:42:39 +0200119
Laurent Pincharte6ecefa2012-05-17 13:27:23 +0200120static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600121 .fb_create = omap_framebuffer_create,
122 .output_poll_changed = omap_fb_output_poll_changed,
Laurent Pinchartcef77d42015-03-05 21:50:00 +0200123 .atomic_check = drm_atomic_helper_check,
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300124 .atomic_commit = drm_atomic_helper_commit,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600125};
126
127static int get_connector_type(struct omap_dss_device *dssdev)
128{
129 switch (dssdev->type) {
130 case OMAP_DISPLAY_TYPE_HDMI:
131 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +0300132 case OMAP_DISPLAY_TYPE_DVI:
133 return DRM_MODE_CONNECTOR_DVID;
Sebastian Reichel4a64b902016-03-08 17:39:36 +0100134 case OMAP_DISPLAY_TYPE_DSI:
135 return DRM_MODE_CONNECTOR_DSI;
Tomi Valkeinen564f88c2017-04-27 13:02:28 +0300136 case OMAP_DISPLAY_TYPE_DPI:
137 case OMAP_DISPLAY_TYPE_DBI:
138 return DRM_MODE_CONNECTOR_DPI;
139 case OMAP_DISPLAY_TYPE_VENC:
140 /* TODO: This could also be composite */
141 return DRM_MODE_CONNECTOR_SVIDEO;
142 case OMAP_DISPLAY_TYPE_SDI:
143 return DRM_MODE_CONNECTOR_LVDS;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600144 default:
145 return DRM_MODE_CONNECTOR_Unknown;
146 }
147}
148
Archit Tanejacc823bd2014-01-02 14:49:52 +0530149static void omap_disconnect_dssdevs(void)
150{
151 struct omap_dss_device *dssdev = NULL;
152
153 for_each_dss_dev(dssdev)
154 dssdev->driver->disconnect(dssdev);
155}
Archit Taneja0d8f3712013-03-26 19:15:19 +0530156
Archit Taneja3a01ab22014-01-02 14:49:51 +0530157static int omap_connect_dssdevs(void)
158{
159 int r;
160 struct omap_dss_device *dssdev = NULL;
Peter Ujfalusia09d2bc2016-05-03 22:08:01 +0300161
162 if (!omapdss_stack_is_ready())
163 return -EPROBE_DEFER;
Archit Taneja3a01ab22014-01-02 14:49:51 +0530164
165 for_each_dss_dev(dssdev) {
166 r = dssdev->driver->connect(dssdev);
167 if (r == -EPROBE_DEFER) {
168 omap_dss_put_device(dssdev);
169 goto cleanup;
170 } else if (r) {
171 dev_warn(dssdev->dev, "could not connect display: %s\n",
172 dssdev->name);
Archit Taneja3a01ab22014-01-02 14:49:51 +0530173 }
174 }
175
Archit Taneja3a01ab22014-01-02 14:49:51 +0530176 return 0;
177
178cleanup:
179 /*
180 * if we are deferring probe, we disconnect the devices we previously
181 * connected
182 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530183 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530184
185 return r;
186}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600187
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200188static int omap_modeset_init_properties(struct drm_device *dev)
189{
190 struct omap_drm_private *priv = dev->dev_private;
Laurent Pinchartdff6c242017-05-09 01:27:14 +0300191 unsigned int num_planes = priv->dispc_ops->get_num_ovls();
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200192
Laurent Pinchartdff6c242017-05-09 01:27:14 +0300193 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
194 num_planes - 1);
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200195 if (!priv->zorder_prop)
196 return -ENOMEM;
197
198 return 0;
199}
200
Rob Clarkcd5351f2011-11-12 12:09:40 -0600201static int omap_modeset_init(struct drm_device *dev)
202{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600203 struct omap_drm_private *priv = dev->dev_private;
204 struct omap_dss_device *dssdev = NULL;
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200205 int num_ovls = priv->dispc_ops->get_num_ovls();
206 int num_mgrs = priv->dispc_ops->get_num_mgrs();
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200207 int num_crtcs, crtc_idx, plane_idx;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200208 int ret;
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200209 u32 plane_crtc_mask;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300210
Rob Clarkcd5351f2011-11-12 12:09:40 -0600211 drm_mode_config_init(dev);
212
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200213 ret = omap_modeset_init_properties(dev);
214 if (ret < 0)
215 return ret;
216
Rob Clarkf5f94542012-12-04 13:59:12 -0600217 /*
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200218 * This function creates exactly one connector, encoder, crtc,
219 * and primary plane per each connected dss-device. Each
220 * connector->encoder->crtc chain is expected to be separate
221 * and each crtc is connect to a single dss-channel. If the
222 * configuration does not match the expectations or exceeds
223 * the available resources, the configuration is rejected.
Rob Clarkf5f94542012-12-04 13:59:12 -0600224 */
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200225 num_crtcs = 0;
Jyri Sarhaf1118b82017-03-24 16:47:51 +0200226 for_each_dss_dev(dssdev)
227 if (omapdss_device_is_connected(dssdev))
228 num_crtcs++;
229
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200230 if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
231 num_crtcs > ARRAY_SIZE(priv->crtcs) ||
232 num_crtcs > ARRAY_SIZE(priv->planes) ||
233 num_crtcs > ARRAY_SIZE(priv->encoders) ||
234 num_crtcs > ARRAY_SIZE(priv->connectors)) {
235 dev_err(dev->dev, "%s(): Too many connected displays\n",
236 __func__);
237 return -EINVAL;
238 }
239
240 /* All planes can be put to any CRTC */
241 plane_crtc_mask = (1 << num_crtcs) - 1;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600242
Archit Taneja0d8f3712013-03-26 19:15:19 +0530243 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600244
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200245 crtc_idx = 0;
246 plane_idx = 0;
Rob Clarkf5f94542012-12-04 13:59:12 -0600247 for_each_dss_dev(dssdev) {
248 struct drm_connector *connector;
249 struct drm_encoder *encoder;
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200250 struct drm_plane *plane;
251 struct drm_crtc *crtc;
Rob Clarkf5f94542012-12-04 13:59:12 -0600252
Archit Taneja3a01ab22014-01-02 14:49:51 +0530253 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530254 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300255
Rob Clarkf5f94542012-12-04 13:59:12 -0600256 encoder = omap_encoder_init(dev, dssdev);
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200257 if (!encoder)
Rob Clarkf5f94542012-12-04 13:59:12 -0600258 return -ENOMEM;
Rob Clarkf5f94542012-12-04 13:59:12 -0600259
260 connector = omap_connector_init(dev,
261 get_connector_type(dssdev), dssdev, encoder);
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200262 if (!connector)
Rob Clarkf5f94542012-12-04 13:59:12 -0600263 return -ENOMEM;
Rob Clarkf5f94542012-12-04 13:59:12 -0600264
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200265 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
266 plane_crtc_mask);
267 if (IS_ERR(plane))
268 return PTR_ERR(plane);
Rob Clarkf5f94542012-12-04 13:59:12 -0600269
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200270 crtc = omap_crtc_init(dev, plane, dssdev);
271 if (IS_ERR(crtc))
272 return PTR_ERR(crtc);
273
274 drm_mode_connector_attach_encoder(connector, encoder);
275 encoder->possible_crtcs = (1 << crtc_idx);
276
277 priv->crtcs[priv->num_crtcs++] = crtc;
278 priv->planes[priv->num_planes++] = plane;
Rob Clarkf5f94542012-12-04 13:59:12 -0600279 priv->encoders[priv->num_encoders++] = encoder;
280 priv->connectors[priv->num_connectors++] = connector;
281
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200282 plane_idx++;
283 crtc_idx++;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530284 }
285
286 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530287 * Create normal planes for the remaining overlays:
288 */
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200289 for (; plane_idx < num_ovls; plane_idx++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200290 struct drm_plane *plane;
291
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200292 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
293 return -EINVAL;
294
295 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
296 plane_crtc_mask);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200297 if (IS_ERR(plane))
298 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530299
Archit Taneja0d8f3712013-03-26 19:15:19 +0530300 priv->planes[priv->num_planes++] = plane;
301 }
302
Archit Taneja0d8f3712013-03-26 19:15:19 +0530303 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
304 priv->num_planes, priv->num_crtcs, priv->num_encoders,
305 priv->num_connectors);
306
Tomi Valkeinen1e907112016-08-23 12:35:39 +0300307 dev->mode_config.min_width = 8;
308 dev->mode_config.min_height = 2;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600309
310 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
311 * to fill in these limits properly on different OMAP generations..
312 */
313 dev->mode_config.max_width = 2048;
314 dev->mode_config.max_height = 2048;
315
316 dev->mode_config.funcs = &omap_mode_config_funcs;
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300317 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600318
Laurent Pinchart69a12262015-03-05 21:38:16 +0200319 drm_mode_config_reset(dev);
320
Laurent Pinchart728ae8d2015-05-28 00:21:29 +0300321 omap_drm_irq_install(dev);
322
Rob Clarkcd5351f2011-11-12 12:09:40 -0600323 return 0;
324}
325
Rob Clarkcd5351f2011-11-12 12:09:40 -0600326/*
327 * drm ioctl funcs
328 */
329
330
331static int ioctl_get_param(struct drm_device *dev, void *data,
332 struct drm_file *file_priv)
333{
Rob Clark5e3b0872012-10-29 09:31:12 +0100334 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600335 struct drm_omap_param *args = data;
336
337 DBG("%p: param=%llu", dev, args->param);
338
339 switch (args->param) {
340 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100341 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600342 break;
343 default:
344 DBG("unknown parameter %lld", args->param);
345 return -EINVAL;
346 }
347
348 return 0;
349}
350
351static int ioctl_set_param(struct drm_device *dev, void *data,
352 struct drm_file *file_priv)
353{
354 struct drm_omap_param *args = data;
355
356 switch (args->param) {
357 default:
358 DBG("unknown parameter %lld", args->param);
359 return -EINVAL;
360 }
361
362 return 0;
363}
364
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200365#define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
366
Rob Clarkcd5351f2011-11-12 12:09:40 -0600367static int ioctl_gem_new(struct drm_device *dev, void *data,
368 struct drm_file *file_priv)
369{
370 struct drm_omap_gem_new *args = data;
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200371 u32 flags = args->flags & OMAP_BO_USER_MASK;
372
Rob Clarkf5f94542012-12-04 13:59:12 -0600373 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200374 args->size.bytes, flags);
375
376 return omap_gem_new_handle(dev, file_priv, args->size, flags,
377 &args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600378}
379
Rob Clarkcd5351f2011-11-12 12:09:40 -0600380static int ioctl_gem_info(struct drm_device *dev, void *data,
381 struct drm_file *file_priv)
382{
383 struct drm_omap_gem_info *args = data;
384 struct drm_gem_object *obj;
385 int ret = 0;
386
Rob Clarkf5f94542012-12-04 13:59:12 -0600387 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600388
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100389 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900390 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600391 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600392
Rob Clarkf7f9f452011-12-05 19:19:22 -0600393 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600394 args->offset = omap_gem_mmap_offset(obj);
395
396 drm_gem_object_unreference_unlocked(obj);
397
398 return ret;
399}
400
Rob Clarkbaa70942013-08-02 13:27:49 -0400401static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500402 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
403 DRM_AUTH | DRM_RENDER_ALLOW),
404 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
405 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
406 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
407 DRM_AUTH | DRM_RENDER_ALLOW),
Laurent Pinchartd6f544f2017-05-09 01:27:11 +0300408 /* Deprecated, to be removed. */
409 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500410 DRM_AUTH | DRM_RENDER_ALLOW),
Laurent Pinchartd6f544f2017-05-09 01:27:11 +0300411 /* Deprecated, to be removed. */
412 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500413 DRM_AUTH | DRM_RENDER_ALLOW),
414 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
415 DRM_AUTH | DRM_RENDER_ALLOW),
Rob Clarkcd5351f2011-11-12 12:09:40 -0600416};
417
418/*
419 * drm driver funcs
420 */
421
Rob Clarkcd5351f2011-11-12 12:09:40 -0600422static int dev_open(struct drm_device *dev, struct drm_file *file)
423{
424 file->driver_priv = NULL;
425
426 DBG("open: dev=%p, file=%p", dev, file);
427
428 return 0;
429}
430
Rob Clarkcd5351f2011-11-12 12:09:40 -0600431/**
432 * lastclose - clean up after all DRM clients have exited
433 * @dev: DRM device
434 *
435 * Take care of cleaning up after all DRM clients have exited. In the
436 * mode setting case, we want to restore the kernel's initial mode (just
437 * in case the last client left us in a bad state).
438 */
439static void dev_lastclose(struct drm_device *dev)
440{
Rob Clark3c810c62012-08-15 15:18:01 -0500441 int i;
442
Lukas Wunnerf15a66e2015-09-05 11:22:39 +0200443 /* we don't support vga_switcheroo.. so just make sure the fbdev
Rob Clarkcd5351f2011-11-12 12:09:40 -0600444 * mode is active
445 */
446 struct omap_drm_private *priv = dev->dev_private;
447 int ret;
448
449 DBG("lastclose: dev=%p", dev);
450
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300451 /* need to restore default rotation state.. not sure
452 * if there is a cleaner way to restore properties to
453 * default state? Maybe a flag that properties should
454 * automatically be restored to default state on
455 * lastclose?
456 */
457 for (i = 0; i < priv->num_crtcs; i++) {
458 struct drm_crtc *crtc = priv->crtcs[i];
Rob Clark3c810c62012-08-15 15:18:01 -0500459
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300460 if (!crtc->primary->rotation_property)
461 continue;
462
463 drm_object_property_set_value(&crtc->base,
464 crtc->primary->rotation_property,
Robert Fossc2c446a2017-05-19 16:50:17 -0400465 DRM_MODE_ROTATE_0);
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300466 }
467
468 for (i = 0; i < priv->num_planes; i++) {
469 struct drm_plane *plane = priv->planes[i];
470
471 if (!plane->rotation_property)
472 continue;
473
474 drm_object_property_set_value(&plane->base,
475 plane->rotation_property,
Robert Fossc2c446a2017-05-19 16:50:17 -0400476 DRM_MODE_ROTATE_0);
Rob Clark3c810c62012-08-15 15:18:01 -0500477 }
478
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000479 if (priv->fbdev) {
480 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
481 if (ret)
482 DBG("failed to restore crtc mode");
483 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600484}
485
Laurent Pinchart78b68552012-05-17 13:27:22 +0200486static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600487 .fault = omap_gem_fault,
488 .open = drm_gem_vm_open,
489 .close = drm_gem_vm_close,
490};
491
Rob Clarkff4f3872012-01-16 12:51:14 -0600492static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200493 .owner = THIS_MODULE,
494 .open = drm_open,
495 .unlocked_ioctl = drm_ioctl,
Tomi Valkeinen9d24159a2017-02-24 13:24:50 +0200496 .compat_ioctl = drm_compat_ioctl,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200497 .release = drm_release,
498 .mmap = omap_gem_mmap,
499 .poll = drm_poll,
500 .read = drm_read,
501 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600502};
503
Rob Clarkcd5351f2011-11-12 12:09:40 -0600504static struct drm_driver omap_drm_driver = {
Tomi Valkeinen728fea72015-10-02 11:10:41 +0300505 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500506 DRIVER_ATOMIC | DRIVER_RENDER,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200507 .open = dev_open,
508 .lastclose = dev_lastclose,
Andy Gross6169a1482011-12-15 21:05:17 -0600509#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200510 .debugfs_init = omap_debugfs_init,
Andy Gross6169a1482011-12-15 21:05:17 -0600511#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200512 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
513 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
514 .gem_prime_export = omap_gem_prime_export,
515 .gem_prime_import = omap_gem_prime_import,
516 .gem_free_object = omap_gem_free_object,
517 .gem_vm_ops = &omap_gem_vm_ops,
518 .dumb_create = omap_gem_dumb_create,
519 .dumb_map_offset = omap_gem_dumb_map_offset,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200520 .ioctls = ioctls,
521 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
522 .fops = &omapdriver_fops,
523 .name = DRIVER_NAME,
524 .desc = DRIVER_DESC,
525 .date = DRIVER_DATE,
526 .major = DRIVER_MAJOR,
527 .minor = DRIVER_MINOR,
528 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600529};
530
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300531static const struct soc_device_attribute omapdrm_soc_devices[] = {
532 { .family = "OMAP3", .data = (void *)0x3430 },
533 { .family = "OMAP4", .data = (void *)0x4430 },
534 { .family = "OMAP5", .data = (void *)0x5430 },
535 { .family = "DRA7", .data = (void *)0x0752 },
536 { /* sentinel */ }
537};
538
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200539static int pdev_probe(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600540{
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300541 const struct soc_device_attribute *soc;
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200542 struct omap_drm_private *priv;
543 struct drm_device *ddev;
544 unsigned int i;
545 int ret;
546
547 DBG("%s", pdev->name);
Archit Taneja3a01ab22014-01-02 14:49:51 +0530548
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300549 if (omapdss_is_initialized() == false)
550 return -EPROBE_DEFER;
551
Archit Taneja3a01ab22014-01-02 14:49:51 +0530552 omap_crtc_pre_init();
553
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200554 ret = omap_connect_dssdevs();
555 if (ret)
556 goto err_crtc_uninit;
557
558 /* Allocate and initialize the driver private structure. */
559 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
560 if (!priv) {
561 ret = -ENOMEM;
562 goto err_disconnect_dssdevs;
Archit Taneja3a01ab22014-01-02 14:49:51 +0530563 }
564
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200565 priv->dispc_ops = dispc_get_ops();
566
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300567 soc = soc_device_match(omapdrm_soc_devices);
568 priv->omaprev = soc ? (unsigned int)soc->data : 0;
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200569 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
570
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200571 spin_lock_init(&priv->list_lock);
572 INIT_LIST_HEAD(&priv->obj_list);
573
574 /* Allocate and initialize the DRM device. */
575 ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
576 if (IS_ERR(ddev)) {
577 ret = PTR_ERR(ddev);
578 goto err_free_priv;
579 }
580
581 ddev->dev_private = priv;
582 platform_set_drvdata(pdev, ddev);
583
584 omap_gem_init(ddev);
585
586 ret = omap_modeset_init(ddev);
587 if (ret) {
588 dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
589 goto err_free_drm_dev;
590 }
591
592 /* Initialize vblank handling, start with all CRTCs disabled. */
593 ret = drm_vblank_init(ddev, priv->num_crtcs);
594 if (ret) {
595 dev_err(&pdev->dev, "could not init vblank\n");
596 goto err_cleanup_modeset;
597 }
598
599 for (i = 0; i < priv->num_crtcs; i++)
600 drm_crtc_vblank_off(priv->crtcs[i]);
601
602 priv->fbdev = omap_fbdev_init(ddev);
603
604 drm_kms_helper_poll_init(ddev);
605
606 /*
607 * Register the DRM device with the core and the connectors with
608 * sysfs.
609 */
610 ret = drm_dev_register(ddev, 0);
611 if (ret)
612 goto err_cleanup_helpers;
613
614 return 0;
615
616err_cleanup_helpers:
617 drm_kms_helper_poll_fini(ddev);
618 if (priv->fbdev)
619 omap_fbdev_free(ddev);
620err_cleanup_modeset:
621 drm_mode_config_cleanup(ddev);
622 omap_drm_irq_uninstall(ddev);
623err_free_drm_dev:
624 omap_gem_deinit(ddev);
625 drm_dev_unref(ddev);
626err_free_priv:
627 destroy_workqueue(priv->wq);
628 kfree(priv);
629err_disconnect_dssdevs:
630 omap_disconnect_dssdevs();
631err_crtc_uninit:
632 omap_crtc_pre_uninit();
633 return ret;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600634}
635
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200636static int pdev_remove(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600637{
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200638 struct drm_device *ddev = platform_get_drvdata(pdev);
639 struct omap_drm_private *priv = ddev->dev_private;
640
Rob Clarkcd5351f2011-11-12 12:09:40 -0600641 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600642
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200643 drm_dev_unregister(ddev);
644
645 drm_kms_helper_poll_fini(ddev);
646
647 if (priv->fbdev)
648 omap_fbdev_free(ddev);
649
Tomi Valkeinen8a54aa92017-03-27 10:02:22 +0300650 drm_atomic_helper_shutdown(ddev);
651
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200652 drm_mode_config_cleanup(ddev);
653
654 omap_drm_irq_uninstall(ddev);
655 omap_gem_deinit(ddev);
656
657 drm_dev_unref(ddev);
658
659 destroy_workqueue(priv->wq);
660 kfree(priv);
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300661
Archit Tanejacc823bd2014-01-02 14:49:52 +0530662 omap_disconnect_dssdevs();
663 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100664
Rob Clarkcd5351f2011-11-12 12:09:40 -0600665 return 0;
666}
667
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200668#ifdef CONFIG_PM_SLEEP
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300669static int omap_drm_suspend_all_displays(void)
670{
671 struct omap_dss_device *dssdev = NULL;
672
673 for_each_dss_dev(dssdev) {
674 if (!dssdev->driver)
675 continue;
676
677 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
678 dssdev->driver->disable(dssdev);
679 dssdev->activate_after_resume = true;
680 } else {
681 dssdev->activate_after_resume = false;
682 }
683 }
684
685 return 0;
686}
687
688static int omap_drm_resume_all_displays(void)
689{
690 struct omap_dss_device *dssdev = NULL;
691
692 for_each_dss_dev(dssdev) {
693 if (!dssdev->driver)
694 continue;
695
696 if (dssdev->activate_after_resume) {
697 dssdev->driver->enable(dssdev);
698 dssdev->activate_after_resume = false;
699 }
700 }
701
702 return 0;
703}
704
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200705static int omap_drm_suspend(struct device *dev)
706{
707 struct drm_device *drm_dev = dev_get_drvdata(dev);
708
709 drm_kms_helper_poll_disable(drm_dev);
710
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300711 drm_modeset_lock_all(drm_dev);
712 omap_drm_suspend_all_displays();
713 drm_modeset_unlock_all(drm_dev);
714
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200715 return 0;
716}
717
718static int omap_drm_resume(struct device *dev)
719{
720 struct drm_device *drm_dev = dev_get_drvdata(dev);
721
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300722 drm_modeset_lock_all(drm_dev);
723 omap_drm_resume_all_displays();
724 drm_modeset_unlock_all(drm_dev);
725
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200726 drm_kms_helper_poll_enable(drm_dev);
727
728 return omap_gem_resume(dev);
729}
Andy Grosse78edba2012-12-19 14:53:37 -0600730#endif
731
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200732static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
733
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300734static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200735 .driver = {
736 .name = DRIVER_NAME,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200737 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200738 },
739 .probe = pdev_probe,
740 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600741};
742
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100743static struct platform_driver * const drivers[] = {
744 &omap_dmm_driver,
745 &pdev,
746};
747
Rob Clarkcd5351f2011-11-12 12:09:40 -0600748static int __init omap_drm_init(void)
749{
750 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300751
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100752 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600753}
754
755static void __exit omap_drm_fini(void)
756{
757 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300758
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100759 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600760}
761
762/* need late_initcall() so we load after dss_driver's are loaded */
763late_initcall(omap_drm_init);
764module_exit(omap_drm_fini);
765
766MODULE_AUTHOR("Rob Clark <rob@ti.com>");
767MODULE_DESCRIPTION("OMAP DRM Display Driver");
768MODULE_ALIAS("platform:" DRIVER_NAME);
769MODULE_LICENSE("GPL v2");