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Laurent Pinchart4bf8e192013-06-19 13:54:11 +02001/*
2 * rcar_du_drv.c -- R-Car Display Unit DRM driver
3 *
Laurent Pinchart2427b302015-09-07 17:34:26 +03004 * Copyright (C) 2013-2015 Renesas Electronics Corporation
Laurent Pinchart4bf8e192013-06-19 13:54:11 +02005 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/clk.h>
15#include <linux/io.h>
16#include <linux/mm.h>
17#include <linux/module.h>
Laurent Pinchart96c02692014-01-21 15:57:26 +010018#include <linux/of_device.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020019#include <linux/platform_device.h>
20#include <linux/pm.h>
21#include <linux/slab.h>
Laurent Pinchart8d3f9b22015-02-23 01:02:15 +020022#include <linux/wait.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020023
24#include <drm/drmP.h>
25#include <drm/drm_crtc_helper.h>
Laurent Pinchart3864c6f2013-03-14 22:45:22 +010026#include <drm/drm_fb_cma_helper.h>
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020027#include <drm/drm_gem_cma_helper.h>
28
Laurent Pinchart4bf8e192013-06-19 13:54:11 +020029#include "rcar_du_drv.h"
30#include "rcar_du_kms.h"
31#include "rcar_du_regs.h"
32
33/* -----------------------------------------------------------------------------
Laurent Pinchart96c02692014-01-21 15:57:26 +010034 * Device Information
35 */
36
Fabrizio Castro36a46da92017-10-13 16:22:20 +010037static const struct rcar_du_device_info rzg1_du_r8a7743_info = {
38 .gen = 2,
39 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
40 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
41 .num_crtcs = 2,
42 .routes = {
43 /*
44 * R8A7743 has one RGB output and one LVDS output
45 */
46 [RCAR_DU_OUTPUT_DPAD0] = {
47 .possible_crtcs = BIT(1) | BIT(0),
48 .port = 0,
49 },
50 [RCAR_DU_OUTPUT_LVDS0] = {
51 .possible_crtcs = BIT(0),
52 .port = 1,
53 },
54 },
55 .num_lvds = 1,
56};
57
Laurent Pinchart96c02692014-01-21 15:57:26 +010058static const struct rcar_du_device_info rcar_du_r8a7779_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +030059 .gen = 2,
Laurent Pinchart96c02692014-01-21 15:57:26 +010060 .features = 0,
61 .num_crtcs = 2,
62 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +030063 /*
64 * R8A7779 has two RGB outputs and one (currently unsupported)
Laurent Pinchart96c02692014-01-21 15:57:26 +010065 * TCON output.
66 */
67 [RCAR_DU_OUTPUT_DPAD0] = {
68 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010069 .port = 0,
70 },
71 [RCAR_DU_OUTPUT_DPAD1] = {
72 .possible_crtcs = BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010073 .port = 1,
74 },
75 },
76 .num_lvds = 0,
77};
78
79static const struct rcar_du_device_info rcar_du_r8a7790_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +030080 .gen = 2,
Laurent Pinchart0c1c8772014-12-09 00:21:12 +020081 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
82 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
Laurent Pinchart96c02692014-01-21 15:57:26 +010083 .quirks = RCAR_DU_QUIRK_ALIGN_128B | RCAR_DU_QUIRK_LVDS_LANES,
84 .num_crtcs = 3,
85 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +030086 /*
87 * R8A7790 has one RGB output, two LVDS outputs and one
Laurent Pinchart96c02692014-01-21 15:57:26 +010088 * (currently unsupported) TCON output.
89 */
90 [RCAR_DU_OUTPUT_DPAD0] = {
91 .possible_crtcs = BIT(2) | BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010092 .port = 0,
93 },
94 [RCAR_DU_OUTPUT_LVDS0] = {
95 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +010096 .port = 1,
97 },
98 [RCAR_DU_OUTPUT_LVDS1] = {
99 .possible_crtcs = BIT(2) | BIT(1),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100100 .port = 2,
101 },
102 },
103 .num_lvds = 2,
104};
105
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +0300106/* M2-W (r8a7791) and M2-N (r8a7793) are identical */
Laurent Pinchart96c02692014-01-21 15:57:26 +0100107static const struct rcar_du_device_info rcar_du_r8a7791_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +0300108 .gen = 2,
Laurent Pinchart0c1c8772014-12-09 00:21:12 +0200109 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
110 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
Laurent Pinchart96c02692014-01-21 15:57:26 +0100111 .num_crtcs = 2,
112 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300113 /*
114 * R8A779[13] has one RGB output, one LVDS output and one
Laurent Pinchart96c02692014-01-21 15:57:26 +0100115 * (currently unsupported) TCON output.
116 */
117 [RCAR_DU_OUTPUT_DPAD0] = {
Laurent Pinchartf4f0fb72015-04-28 15:26:33 +0300118 .possible_crtcs = BIT(1) | BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100119 .port = 0,
120 },
121 [RCAR_DU_OUTPUT_LVDS0] = {
122 .possible_crtcs = BIT(0),
Laurent Pinchart96c02692014-01-21 15:57:26 +0100123 .port = 1,
124 },
125 },
126 .num_lvds = 1,
127};
128
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700129static const struct rcar_du_device_info rcar_du_r8a7792_info = {
130 .gen = 2,
131 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
132 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
133 .num_crtcs = 2,
134 .routes = {
135 /* R8A7792 has two RGB outputs. */
136 [RCAR_DU_OUTPUT_DPAD0] = {
137 .possible_crtcs = BIT(0),
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700138 .port = 0,
139 },
140 [RCAR_DU_OUTPUT_DPAD1] = {
141 .possible_crtcs = BIT(1),
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700142 .port = 1,
143 },
144 },
145 .num_lvds = 0,
146};
147
Laurent Pinchart090425c2015-07-17 10:44:33 +0300148static const struct rcar_du_device_info rcar_du_r8a7794_info = {
Laurent Pinchart2427b302015-09-07 17:34:26 +0300149 .gen = 2,
Laurent Pinchart090425c2015-07-17 10:44:33 +0300150 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
151 | RCAR_DU_FEATURE_EXT_CTRL_REGS,
152 .num_crtcs = 2,
153 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300154 /*
155 * R8A7794 has two RGB outputs and one (currently unsupported)
Laurent Pinchart090425c2015-07-17 10:44:33 +0300156 * TCON output.
157 */
158 [RCAR_DU_OUTPUT_DPAD0] = {
159 .possible_crtcs = BIT(0),
Laurent Pinchart090425c2015-07-17 10:44:33 +0300160 .port = 0,
161 },
162 [RCAR_DU_OUTPUT_DPAD1] = {
163 .possible_crtcs = BIT(1),
Laurent Pinchart090425c2015-07-17 10:44:33 +0300164 .port = 1,
165 },
166 },
167 .num_lvds = 0,
168};
169
Laurent Pinchart2427b302015-09-07 17:34:26 +0300170static const struct rcar_du_device_info rcar_du_r8a7795_info = {
171 .gen = 3,
172 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
173 | RCAR_DU_FEATURE_EXT_CTRL_REGS
174 | RCAR_DU_FEATURE_VSP1_SOURCE,
175 .num_crtcs = 4,
176 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300177 /*
178 * R8A7795 has one RGB output, two HDMI outputs and one
Koji Matsuoka0dda563e2016-11-11 18:07:39 +0100179 * LVDS output.
Laurent Pinchart2427b302015-09-07 17:34:26 +0300180 */
181 [RCAR_DU_OUTPUT_DPAD0] = {
182 .possible_crtcs = BIT(3),
Laurent Pinchart2427b302015-09-07 17:34:26 +0300183 .port = 0,
184 },
Koji Matsuoka0dda563e2016-11-11 18:07:39 +0100185 [RCAR_DU_OUTPUT_HDMI0] = {
186 .possible_crtcs = BIT(1),
187 .port = 1,
188 },
189 [RCAR_DU_OUTPUT_HDMI1] = {
190 .possible_crtcs = BIT(2),
191 .port = 2,
192 },
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900193 [RCAR_DU_OUTPUT_LVDS0] = {
194 .possible_crtcs = BIT(0),
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900195 .port = 3,
196 },
Laurent Pinchart2427b302015-09-07 17:34:26 +0300197 },
Koji Matsuoka6bc2e152015-07-28 20:12:43 +0900198 .num_lvds = 1,
Koji Matsuokadc4aedb2016-11-11 18:07:41 +0100199 .dpll_ch = BIT(1) | BIT(2),
Laurent Pinchart2427b302015-09-07 17:34:26 +0300200};
201
Laurent Pinchart63b50532016-09-06 02:11:43 +0300202static const struct rcar_du_device_info rcar_du_r8a7796_info = {
203 .gen = 3,
204 .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK
205 | RCAR_DU_FEATURE_EXT_CTRL_REGS
206 | RCAR_DU_FEATURE_VSP1_SOURCE,
207 .num_crtcs = 3,
208 .routes = {
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300209 /*
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300210 * R8A7796 has one RGB output, one LVDS output and one HDMI
211 * output.
Laurent Pinchart63b50532016-09-06 02:11:43 +0300212 */
213 [RCAR_DU_OUTPUT_DPAD0] = {
214 .possible_crtcs = BIT(2),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300215 .port = 0,
216 },
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300217 [RCAR_DU_OUTPUT_HDMI0] = {
218 .possible_crtcs = BIT(1),
219 .port = 1,
220 },
Laurent Pinchart63b50532016-09-06 02:11:43 +0300221 [RCAR_DU_OUTPUT_LVDS0] = {
222 .possible_crtcs = BIT(0),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300223 .port = 2,
224 },
225 },
226 .num_lvds = 1,
Laurent Pinchart776c5d02017-06-19 23:34:40 +0300227 .dpll_ch = BIT(1),
Laurent Pinchart63b50532016-09-06 02:11:43 +0300228};
229
Laurent Pinchart96c02692014-01-21 15:57:26 +0100230static const struct of_device_id rcar_du_of_table[] = {
Fabrizio Castro36a46da92017-10-13 16:22:20 +0100231 { .compatible = "renesas,du-r8a7743", .data = &rzg1_du_r8a7743_info },
Laurent Pinchart96c02692014-01-21 15:57:26 +0100232 { .compatible = "renesas,du-r8a7779", .data = &rcar_du_r8a7779_info },
233 { .compatible = "renesas,du-r8a7790", .data = &rcar_du_r8a7790_info },
234 { .compatible = "renesas,du-r8a7791", .data = &rcar_du_r8a7791_info },
Sergei Shtylyov73323dd2016-08-04 15:01:02 -0700235 { .compatible = "renesas,du-r8a7792", .data = &rcar_du_r8a7792_info },
Laurent Pinchartf1ceb84a2015-07-17 10:44:33 +0300236 { .compatible = "renesas,du-r8a7793", .data = &rcar_du_r8a7791_info },
Laurent Pinchart090425c2015-07-17 10:44:33 +0300237 { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info },
Laurent Pinchart2427b302015-09-07 17:34:26 +0300238 { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info },
Laurent Pinchart63b50532016-09-06 02:11:43 +0300239 { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info },
Laurent Pinchart96c02692014-01-21 15:57:26 +0100240 { }
241};
242
243MODULE_DEVICE_TABLE(of, rcar_du_of_table);
244
245/* -----------------------------------------------------------------------------
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200246 * DRM operations
247 */
248
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100249static void rcar_du_lastclose(struct drm_device *dev)
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200250{
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200251 struct rcar_du_device *rcdu = dev->dev_private;
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200252
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100253 drm_fbdev_cma_restore_mode(rcdu->fbdev);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200254}
255
Daniel Vetterd55f7e52017-03-08 15:12:56 +0100256DEFINE_DRM_GEM_CMA_FOPS(rcar_du_fops);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200257
258static struct drm_driver rcar_du_driver = {
Laurent Pinchart6dbe6862015-02-26 21:22:10 +0200259 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME
260 | DRIVER_ATOMIC,
Laurent Pinchart3864c6f2013-03-14 22:45:22 +0100261 .lastclose = rcar_du_lastclose,
Daniel Vetter92e0f242016-05-30 19:53:02 +0200262 .gem_free_object_unlocked = drm_gem_cma_free_object,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200263 .gem_vm_ops = &drm_gem_cma_vm_ops,
264 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
265 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Laurent Pinchartffb40402013-07-10 15:23:35 +0200266 .gem_prime_import = drm_gem_prime_import,
267 .gem_prime_export = drm_gem_prime_export,
268 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
269 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
270 .gem_prime_vmap = drm_gem_cma_prime_vmap,
271 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
272 .gem_prime_mmap = drm_gem_cma_prime_mmap,
Laurent Pinchart59e32642013-07-04 20:05:51 +0200273 .dumb_create = rcar_du_dumb_create,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200274 .fops = &rcar_du_fops,
275 .name = "rcar-du",
276 .desc = "Renesas R-Car Display Unit",
277 .date = "20130110",
278 .major = 1,
279 .minor = 0,
280};
281
282/* -----------------------------------------------------------------------------
283 * Power management
284 */
285
Russell King396d7a22014-07-13 12:18:58 +0100286#ifdef CONFIG_PM_SLEEP
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200287static int rcar_du_pm_suspend(struct device *dev)
288{
289 struct rcar_du_device *rcdu = dev_get_drvdata(dev);
290
291 drm_kms_helper_poll_disable(rcdu->ddev);
292 /* TODO Suspend the CRTC */
293
294 return 0;
295}
296
297static int rcar_du_pm_resume(struct device *dev)
298{
299 struct rcar_du_device *rcdu = dev_get_drvdata(dev);
300
301 /* TODO Resume the CRTC */
302
303 drm_kms_helper_poll_enable(rcdu->ddev);
304 return 0;
305}
306#endif
307
308static const struct dev_pm_ops rcar_du_pm_ops = {
309 SET_SYSTEM_SLEEP_PM_OPS(rcar_du_pm_suspend, rcar_du_pm_resume)
310};
311
312/* -----------------------------------------------------------------------------
313 * Platform driver
314 */
315
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200316static int rcar_du_remove(struct platform_device *pdev)
317{
Daniel Vetter57a24cf2013-12-11 11:34:22 +0100318 struct rcar_du_device *rcdu = platform_get_drvdata(pdev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300319 struct drm_device *ddev = rcdu->ddev;
Daniel Vetter57a24cf2013-12-11 11:34:22 +0100320
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300321 drm_dev_unregister(ddev);
322
323 if (rcdu->fbdev)
324 drm_fbdev_cma_fini(rcdu->fbdev);
325
326 drm_kms_helper_poll_fini(ddev);
327 drm_mode_config_cleanup(ddev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300328
329 drm_dev_unref(ddev);
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200330
331 return 0;
332}
333
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300334static int rcar_du_probe(struct platform_device *pdev)
335{
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300336 struct rcar_du_device *rcdu;
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300337 struct drm_device *ddev;
338 struct resource *mem;
339 int ret;
340
Laurent Pinchart4f7b0d22016-10-19 00:51:35 +0300341 /* Allocate and initialize the R-Car device structure. */
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300342 rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
343 if (rcdu == NULL)
344 return -ENOMEM;
345
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300346 rcdu->dev = &pdev->dev;
Wolfram Sang9e7d80e2016-10-16 10:01:47 +0200347 rcdu->info = of_device_get_match_data(rcdu->dev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300348
Laurent Pinchart4f7b0d22016-10-19 00:51:35 +0300349 platform_set_drvdata(pdev, rcdu);
350
351 /* I/O resources */
352 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
353 rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
354 if (IS_ERR(rcdu->mmio))
355 return PTR_ERR(rcdu->mmio);
356
357 /* DRM/KMS objects */
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300358 ddev = drm_dev_alloc(&rcar_du_driver, &pdev->dev);
Tom Gundersen0f288602016-09-21 16:59:19 +0200359 if (IS_ERR(ddev))
360 return PTR_ERR(ddev);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300361
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300362 rcdu->ddev = ddev;
363 ddev->dev_private = rcdu;
364
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300365 ret = rcar_du_modeset_init(rcdu);
366 if (ret < 0) {
Kuninori Morimotoccf49252016-05-25 00:41:18 +0000367 if (ret != -EPROBE_DEFER)
368 dev_err(&pdev->dev,
369 "failed to initialize DRM/KMS (%d)\n", ret);
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300370 goto error;
371 }
372
373 ddev->irq_enabled = 1;
374
Laurent Pinchartf3bafc12017-07-11 01:13:20 +0300375 /*
376 * Register the DRM device with the core and the connectors with
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300377 * sysfs.
378 */
379 ret = drm_dev_register(ddev, 0);
380 if (ret)
381 goto error;
382
Laurent Pinchartc1d4b382015-09-28 18:39:53 +0300383 DRM_INFO("Device %s probed\n", dev_name(&pdev->dev));
384
385 return 0;
386
387error:
388 rcar_du_remove(pdev);
389
390 return ret;
391}
392
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200393static struct platform_driver rcar_du_platform_driver = {
394 .probe = rcar_du_probe,
395 .remove = rcar_du_remove,
396 .driver = {
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200397 .name = "rcar-du",
398 .pm = &rcar_du_pm_ops,
Laurent Pinchart96c02692014-01-21 15:57:26 +0100399 .of_match_table = rcar_du_of_table,
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200400 },
Laurent Pinchart4bf8e192013-06-19 13:54:11 +0200401};
402
403module_platform_driver(rcar_du_platform_driver);
404
405MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
406MODULE_DESCRIPTION("Renesas R-Car Display Unit DRM Driver");
407MODULE_LICENSE("GPL");