Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Robert P. J. Day | 96532ba | 2008-02-03 15:06:26 +0200 | [diff] [blame] | 2 | #ifndef _LINUX_DMA_MAPPING_H |
| 3 | #define _LINUX_DMA_MAPPING_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 5 | #include <linux/sizes.h> |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 6 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/device.h> |
| 8 | #include <linux/err.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 9 | #include <linux/dma-debug.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 10 | #include <linux/dma-direction.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 11 | #include <linux/scatterlist.h> |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 12 | #include <linux/bug.h> |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 13 | #include <linux/mem_encrypt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 15 | /** |
| 16 | * List of possible attributes associated with a DMA mapping. The semantics |
| 17 | * of each attribute should be defined in Documentation/DMA-attributes.txt. |
| 18 | * |
| 19 | * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute |
| 20 | * forces all pending DMA writes to complete. |
| 21 | */ |
| 22 | #define DMA_ATTR_WRITE_BARRIER (1UL << 0) |
| 23 | /* |
| 24 | * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping |
| 25 | * may be weakly ordered, that is that reads and writes may pass each other. |
| 26 | */ |
| 27 | #define DMA_ATTR_WEAK_ORDERING (1UL << 1) |
| 28 | /* |
| 29 | * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be |
| 30 | * buffered to improve performance. |
| 31 | */ |
| 32 | #define DMA_ATTR_WRITE_COMBINE (1UL << 2) |
| 33 | /* |
| 34 | * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either |
| 35 | * consistent or non-consistent memory as it sees fit. |
| 36 | */ |
| 37 | #define DMA_ATTR_NON_CONSISTENT (1UL << 3) |
| 38 | /* |
| 39 | * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel |
| 40 | * virtual mapping for the allocated buffer. |
| 41 | */ |
| 42 | #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) |
| 43 | /* |
| 44 | * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of |
| 45 | * the CPU cache for the given buffer assuming that it has been already |
| 46 | * transferred to 'device' domain. |
| 47 | */ |
| 48 | #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) |
| 49 | /* |
| 50 | * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer |
| 51 | * in physical memory. |
| 52 | */ |
| 53 | #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) |
| 54 | /* |
| 55 | * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem |
| 56 | * that it's probably not worth the time to try to allocate memory to in a way |
| 57 | * that gives better TLB efficiency. |
| 58 | */ |
| 59 | #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) |
Mauricio Faria de Oliveira | a9a62c9 | 2016-10-11 13:54:14 -0700 | [diff] [blame] | 60 | /* |
| 61 | * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress |
| 62 | * allocation failure reports (similarly to __GFP_NOWARN). |
| 63 | */ |
| 64 | #define DMA_ATTR_NO_WARN (1UL << 8) |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 65 | |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 66 | /* |
Mitchel Humpherys | b2fb366 | 2017-01-06 18:58:11 +0530 | [diff] [blame] | 67 | * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully |
| 68 | * accessible at an elevated privilege level (and ideally inaccessible or |
| 69 | * at least read-only at lesser-privileged levels). |
| 70 | */ |
| 71 | #define DMA_ATTR_PRIVILEGED (1UL << 9) |
| 72 | |
| 73 | /* |
Bjorn Helgaas | 77f2ea2 | 2014-04-30 11:20:53 -0600 | [diff] [blame] | 74 | * A dma_addr_t can hold any valid DMA or bus address for the platform. |
| 75 | * It can be given to a device to use as a DMA source or target. A CPU cannot |
| 76 | * reference a dma_addr_t directly because there may be translation between |
| 77 | * its physical address space and the bus address space. |
| 78 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 79 | struct dma_map_ops { |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 80 | void* (*alloc)(struct device *dev, size_t size, |
| 81 | dma_addr_t *dma_handle, gfp_t gfp, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 82 | unsigned long attrs); |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 83 | void (*free)(struct device *dev, size_t size, |
| 84 | void *vaddr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 85 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 86 | int (*mmap)(struct device *, struct vm_area_struct *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 87 | void *, dma_addr_t, size_t, |
| 88 | unsigned long attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 89 | |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 90 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 91 | dma_addr_t, size_t, unsigned long attrs); |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 92 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 93 | dma_addr_t (*map_page)(struct device *dev, struct page *page, |
| 94 | unsigned long offset, size_t size, |
| 95 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 96 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 97 | void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
| 98 | size_t size, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 99 | unsigned long attrs); |
Ricardo Ribalda Delgado | 04abab6 | 2015-02-11 13:53:15 +0100 | [diff] [blame] | 100 | /* |
| 101 | * map_sg returns 0 on error and a value > 0 on success. |
| 102 | * It should never return a value < 0. |
| 103 | */ |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 104 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 105 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 106 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 107 | void (*unmap_sg)(struct device *dev, |
| 108 | struct scatterlist *sg, int nents, |
| 109 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 110 | unsigned long attrs); |
Niklas Söderlund | ba409b3 | 2016-08-10 13:22:14 +0200 | [diff] [blame] | 111 | dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, |
| 112 | size_t size, enum dma_data_direction dir, |
| 113 | unsigned long attrs); |
| 114 | void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, |
| 115 | size_t size, enum dma_data_direction dir, |
| 116 | unsigned long attrs); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 117 | void (*sync_single_for_cpu)(struct device *dev, |
| 118 | dma_addr_t dma_handle, size_t size, |
| 119 | enum dma_data_direction dir); |
| 120 | void (*sync_single_for_device)(struct device *dev, |
| 121 | dma_addr_t dma_handle, size_t size, |
| 122 | enum dma_data_direction dir); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 123 | void (*sync_sg_for_cpu)(struct device *dev, |
| 124 | struct scatterlist *sg, int nents, |
| 125 | enum dma_data_direction dir); |
| 126 | void (*sync_sg_for_device)(struct device *dev, |
| 127 | struct scatterlist *sg, int nents, |
| 128 | enum dma_data_direction dir); |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 129 | void (*cache_sync)(struct device *dev, void *vaddr, size_t size, |
| 130 | enum dma_data_direction direction); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 131 | int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); |
| 132 | int (*dma_supported)(struct device *dev, u64 mask); |
Milton Miller | 3a8f755 | 2011-06-24 09:05:23 +0000 | [diff] [blame] | 133 | u64 (*get_required_mask)(struct device *dev); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 134 | }; |
| 135 | |
Christoph Hellwig | 42ee3ca | 2018-11-21 18:52:35 +0100 | [diff] [blame^] | 136 | #define DMA_MAPPING_ERROR (~(dma_addr_t)0) |
| 137 | |
Christoph Hellwig | 002e674 | 2018-01-09 16:30:23 +0100 | [diff] [blame] | 138 | extern const struct dma_map_ops dma_direct_ops; |
Bart Van Assche | 551199a | 2017-01-20 13:04:07 -0800 | [diff] [blame] | 139 | extern const struct dma_map_ops dma_virt_ops; |
Christian Borntraeger | a8463d4 | 2016-02-02 21:46:32 -0800 | [diff] [blame] | 140 | |
Andrew Morton | 8f286c3 | 2007-10-18 03:05:07 -0700 | [diff] [blame] | 141 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
Borislav Petkov | 34c6538 | 2007-10-18 03:05:06 -0700 | [diff] [blame] | 142 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 143 | #define DMA_MASK_NONE 0x0ULL |
| 144 | |
Rolf Eike Beer | d6bd3a3 | 2006-09-29 01:59:48 -0700 | [diff] [blame] | 145 | static inline int valid_dma_direction(int dma_direction) |
| 146 | { |
| 147 | return ((dma_direction == DMA_BIDIRECTIONAL) || |
| 148 | (dma_direction == DMA_TO_DEVICE) || |
| 149 | (dma_direction == DMA_FROM_DEVICE)); |
| 150 | } |
| 151 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 152 | static inline int is_device_dma_capable(struct device *dev) |
| 153 | { |
| 154 | return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
| 155 | } |
| 156 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 157 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 158 | /* |
| 159 | * These three functions are only for dma allocator. |
| 160 | * Don't use them in device drivers. |
| 161 | */ |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 162 | int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 163 | dma_addr_t *dma_handle, void **ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 164 | int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 165 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 166 | int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 167 | void *cpu_addr, size_t size, int *ret); |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 168 | |
| 169 | void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); |
| 170 | int dma_release_from_global_coherent(int order, void *vaddr); |
| 171 | int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, |
| 172 | size_t size, int *ret); |
| 173 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 174 | #else |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 175 | #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) |
| 176 | #define dma_release_from_dev_coherent(dev, order, vaddr) (0) |
| 177 | #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) |
| 178 | |
| 179 | static inline void *dma_alloc_from_global_coherent(ssize_t size, |
| 180 | dma_addr_t *dma_handle) |
| 181 | { |
| 182 | return NULL; |
| 183 | } |
| 184 | |
| 185 | static inline int dma_release_from_global_coherent(int order, void *vaddr) |
| 186 | { |
| 187 | return 0; |
| 188 | } |
| 189 | |
| 190 | static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, |
| 191 | void *cpu_addr, size_t size, |
| 192 | int *ret) |
| 193 | { |
| 194 | return 0; |
| 195 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 196 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
| 197 | |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 198 | #ifdef CONFIG_HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | #include <asm/dma-mapping.h> |
Bart Van Assche | 815dd18 | 2017-01-20 13:04:04 -0800 | [diff] [blame] | 200 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
| 201 | { |
| 202 | if (dev && dev->dma_ops) |
| 203 | return dev->dma_ops; |
| 204 | return get_arch_dma_ops(dev ? dev->bus : NULL); |
| 205 | } |
| 206 | |
Bart Van Assche | ca6e8e1 | 2017-01-20 13:04:03 -0800 | [diff] [blame] | 207 | static inline void set_dma_ops(struct device *dev, |
| 208 | const struct dma_map_ops *dma_ops) |
| 209 | { |
| 210 | dev->dma_ops = dma_ops; |
| 211 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 212 | #else |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 213 | /* |
Geert Uytterhoeven | f29ab49 | 2018-03-16 14:25:40 +0100 | [diff] [blame] | 214 | * Define the dma api to allow compilation of dma dependent code. |
| 215 | * Code that depends on the dma-mapping API needs to set 'depends on HAS_DMA' |
| 216 | * in its Kconfig, unless it already depends on <something> || COMPILE_TEST, |
| 217 | * where <something> guarantuees the availability of the dma-mapping API. |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 218 | */ |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 219 | static inline const struct dma_map_ops *get_dma_ops(struct device *dev) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 220 | { |
Geert Uytterhoeven | f29ab49 | 2018-03-16 14:25:40 +0100 | [diff] [blame] | 221 | return NULL; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 222 | } |
| 223 | #endif |
| 224 | |
| 225 | static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, |
| 226 | size_t size, |
| 227 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 228 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 229 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 230 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 231 | dma_addr_t addr; |
| 232 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 233 | BUG_ON(!valid_dma_direction(dir)); |
Stephen Boyd | 99c65fa | 2018-10-08 00:20:07 -0700 | [diff] [blame] | 234 | debug_dma_map_single(dev, ptr, size); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 235 | addr = ops->map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 236 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 237 | dir, attrs); |
| 238 | debug_dma_map_page(dev, virt_to_page(ptr), |
Geliang Tang | 8e99469 | 2016-01-20 15:02:12 -0800 | [diff] [blame] | 239 | offset_in_page(ptr), size, |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 240 | dir, addr, true); |
| 241 | return addr; |
| 242 | } |
| 243 | |
| 244 | static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, |
| 245 | size_t size, |
| 246 | enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 247 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 248 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 249 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 250 | |
| 251 | BUG_ON(!valid_dma_direction(dir)); |
| 252 | if (ops->unmap_page) |
| 253 | ops->unmap_page(dev, addr, size, dir, attrs); |
| 254 | debug_dma_unmap_page(dev, addr, size, dir, true); |
| 255 | } |
| 256 | |
| 257 | /* |
| 258 | * dma_maps_sg_attrs returns 0 on error and > 0 on success. |
| 259 | * It should never return a value < 0. |
| 260 | */ |
| 261 | static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 262 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 263 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 264 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 265 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Levin, Alexander (Sasha Levin) | 4950276 | 2017-11-15 17:35:51 -0800 | [diff] [blame] | 266 | int ents; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 267 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 268 | BUG_ON(!valid_dma_direction(dir)); |
| 269 | ents = ops->map_sg(dev, sg, nents, dir, attrs); |
| 270 | BUG_ON(ents < 0); |
| 271 | debug_dma_map_sg(dev, sg, nents, ents, dir); |
| 272 | |
| 273 | return ents; |
| 274 | } |
| 275 | |
| 276 | static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, |
| 277 | int nents, enum dma_data_direction dir, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 278 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 279 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 280 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 281 | |
| 282 | BUG_ON(!valid_dma_direction(dir)); |
| 283 | debug_dma_unmap_sg(dev, sg, nents, dir); |
| 284 | if (ops->unmap_sg) |
| 285 | ops->unmap_sg(dev, sg, nents, dir, attrs); |
| 286 | } |
| 287 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 288 | static inline dma_addr_t dma_map_page_attrs(struct device *dev, |
| 289 | struct page *page, |
| 290 | size_t offset, size_t size, |
| 291 | enum dma_data_direction dir, |
| 292 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 293 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 294 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 295 | dma_addr_t addr; |
| 296 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 297 | BUG_ON(!valid_dma_direction(dir)); |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 298 | addr = ops->map_page(dev, page, offset, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 299 | debug_dma_map_page(dev, page, offset, size, dir, addr, false); |
| 300 | |
| 301 | return addr; |
| 302 | } |
| 303 | |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 304 | static inline void dma_unmap_page_attrs(struct device *dev, |
| 305 | dma_addr_t addr, size_t size, |
| 306 | enum dma_data_direction dir, |
| 307 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 308 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 309 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 310 | |
| 311 | BUG_ON(!valid_dma_direction(dir)); |
| 312 | if (ops->unmap_page) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 313 | ops->unmap_page(dev, addr, size, dir, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 314 | debug_dma_unmap_page(dev, addr, size, dir, false); |
| 315 | } |
| 316 | |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 317 | static inline dma_addr_t dma_map_resource(struct device *dev, |
| 318 | phys_addr_t phys_addr, |
| 319 | size_t size, |
| 320 | enum dma_data_direction dir, |
| 321 | unsigned long attrs) |
| 322 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 323 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 324 | dma_addr_t addr; |
| 325 | |
| 326 | BUG_ON(!valid_dma_direction(dir)); |
| 327 | |
| 328 | /* Don't allow RAM to be mapped */ |
Niklas Söderlund | 3757dc4 | 2016-09-29 12:02:40 +0200 | [diff] [blame] | 329 | BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 330 | |
| 331 | addr = phys_addr; |
| 332 | if (ops->map_resource) |
| 333 | addr = ops->map_resource(dev, phys_addr, size, dir, attrs); |
| 334 | |
| 335 | debug_dma_map_resource(dev, phys_addr, size, dir, addr); |
| 336 | |
| 337 | return addr; |
| 338 | } |
| 339 | |
| 340 | static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, |
| 341 | size_t size, enum dma_data_direction dir, |
| 342 | unsigned long attrs) |
| 343 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 344 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Niklas Söderlund | 6f3d879 | 2016-08-10 13:22:16 +0200 | [diff] [blame] | 345 | |
| 346 | BUG_ON(!valid_dma_direction(dir)); |
| 347 | if (ops->unmap_resource) |
| 348 | ops->unmap_resource(dev, addr, size, dir, attrs); |
| 349 | debug_dma_unmap_resource(dev, addr, size, dir); |
| 350 | } |
| 351 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 352 | static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, |
| 353 | size_t size, |
| 354 | enum dma_data_direction dir) |
| 355 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 356 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 357 | |
| 358 | BUG_ON(!valid_dma_direction(dir)); |
| 359 | if (ops->sync_single_for_cpu) |
| 360 | ops->sync_single_for_cpu(dev, addr, size, dir); |
| 361 | debug_dma_sync_single_for_cpu(dev, addr, size, dir); |
| 362 | } |
| 363 | |
| 364 | static inline void dma_sync_single_for_device(struct device *dev, |
| 365 | dma_addr_t addr, size_t size, |
| 366 | enum dma_data_direction dir) |
| 367 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 368 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 369 | |
| 370 | BUG_ON(!valid_dma_direction(dir)); |
| 371 | if (ops->sync_single_for_device) |
| 372 | ops->sync_single_for_device(dev, addr, size, dir); |
| 373 | debug_dma_sync_single_for_device(dev, addr, size, dir); |
| 374 | } |
| 375 | |
| 376 | static inline void dma_sync_single_range_for_cpu(struct device *dev, |
| 377 | dma_addr_t addr, |
| 378 | unsigned long offset, |
| 379 | size_t size, |
| 380 | enum dma_data_direction dir) |
| 381 | { |
| 382 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 383 | |
| 384 | BUG_ON(!valid_dma_direction(dir)); |
| 385 | if (ops->sync_single_for_cpu) |
| 386 | ops->sync_single_for_cpu(dev, addr + offset, size, dir); |
| 387 | debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); |
| 388 | } |
| 389 | |
| 390 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| 391 | dma_addr_t addr, |
| 392 | unsigned long offset, |
| 393 | size_t size, |
| 394 | enum dma_data_direction dir) |
| 395 | { |
| 396 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 397 | |
| 398 | BUG_ON(!valid_dma_direction(dir)); |
| 399 | if (ops->sync_single_for_device) |
| 400 | ops->sync_single_for_device(dev, addr + offset, size, dir); |
| 401 | debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); |
| 402 | } |
| 403 | |
| 404 | static inline void |
| 405 | dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, |
| 406 | int nelems, enum dma_data_direction dir) |
| 407 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 408 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 409 | |
| 410 | BUG_ON(!valid_dma_direction(dir)); |
| 411 | if (ops->sync_sg_for_cpu) |
| 412 | ops->sync_sg_for_cpu(dev, sg, nelems, dir); |
| 413 | debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); |
| 414 | } |
| 415 | |
| 416 | static inline void |
| 417 | dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, |
| 418 | int nelems, enum dma_data_direction dir) |
| 419 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 420 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 421 | |
| 422 | BUG_ON(!valid_dma_direction(dir)); |
| 423 | if (ops->sync_sg_for_device) |
| 424 | ops->sync_sg_for_device(dev, sg, nelems, dir); |
| 425 | debug_dma_sync_sg_for_device(dev, sg, nelems, dir); |
| 426 | |
| 427 | } |
| 428 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 429 | #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) |
| 430 | #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) |
| 431 | #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) |
| 432 | #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) |
Alexander Duyck | 0495c3d | 2016-12-14 15:05:23 -0800 | [diff] [blame] | 433 | #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) |
| 434 | #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 435 | |
Christoph Hellwig | c9eb617 | 2017-08-27 10:37:15 +0200 | [diff] [blame] | 436 | static inline void |
| 437 | dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
| 438 | enum dma_data_direction dir) |
| 439 | { |
| 440 | const struct dma_map_ops *ops = get_dma_ops(dev); |
| 441 | |
| 442 | BUG_ON(!valid_dma_direction(dir)); |
| 443 | if (ops->cache_sync) |
| 444 | ops->cache_sync(dev, vaddr, size, dir); |
| 445 | } |
| 446 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 447 | extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
Christoph Hellwig | 58b0440 | 2018-09-11 08:55:28 +0200 | [diff] [blame] | 448 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 449 | unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 450 | |
| 451 | void *dma_common_contiguous_remap(struct page *page, size_t size, |
| 452 | unsigned long vm_flags, |
| 453 | pgprot_t prot, const void *caller); |
| 454 | |
| 455 | void *dma_common_pages_remap(struct page **pages, size_t size, |
| 456 | unsigned long vm_flags, pgprot_t prot, |
| 457 | const void *caller); |
| 458 | void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); |
| 459 | |
Christoph Hellwig | 0c3b317 | 2018-11-04 20:29:28 +0100 | [diff] [blame] | 460 | int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot); |
| 461 | bool dma_in_atomic_pool(void *start, size_t size); |
| 462 | void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags); |
| 463 | bool dma_free_from_pool(void *start, size_t size); |
| 464 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 465 | /** |
| 466 | * dma_mmap_attrs - map a coherent DMA allocation into user space |
| 467 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
| 468 | * @vma: vm_area_struct describing requested user mapping |
| 469 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs |
| 470 | * @handle: device-view address returned from dma_alloc_attrs |
| 471 | * @size: size of memory originally requested in dma_alloc_attrs |
| 472 | * @attrs: attributes of mapping properties requested in dma_alloc_attrs |
| 473 | * |
| 474 | * Map a coherent DMA buffer previously allocated by dma_alloc_attrs |
| 475 | * into user space. The coherent DMA buffer must not be freed by the |
| 476 | * driver until the user space mapping has been released. |
| 477 | */ |
| 478 | static inline int |
| 479 | dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 480 | dma_addr_t dma_addr, size_t size, unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 481 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 482 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 483 | BUG_ON(!ops); |
| 484 | if (ops->mmap) |
| 485 | return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
Christoph Hellwig | 58b0440 | 2018-09-11 08:55:28 +0200 | [diff] [blame] | 486 | return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 487 | } |
| 488 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 489 | #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 490 | |
| 491 | int |
Christoph Hellwig | 9406a49 | 2018-08-23 09:39:38 +0200 | [diff] [blame] | 492 | dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
| 493 | dma_addr_t dma_addr, size_t size, unsigned long attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 494 | |
| 495 | static inline int |
| 496 | dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 497 | dma_addr_t dma_addr, size_t size, |
| 498 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 499 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 500 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 501 | BUG_ON(!ops); |
| 502 | if (ops->get_sgtable) |
| 503 | return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
| 504 | attrs); |
Christoph Hellwig | 9406a49 | 2018-08-23 09:39:38 +0200 | [diff] [blame] | 505 | return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size, |
| 506 | attrs); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 507 | } |
| 508 | |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 509 | #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 510 | |
| 511 | #ifndef arch_dma_alloc_attrs |
Huaisheng Ye | 884571f | 2018-05-25 13:00:00 +0800 | [diff] [blame] | 512 | #define arch_dma_alloc_attrs(dev) (true) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 513 | #endif |
| 514 | |
| 515 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, |
| 516 | dma_addr_t *dma_handle, gfp_t flag, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 517 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 518 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 519 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 520 | void *cpu_addr; |
| 521 | |
| 522 | BUG_ON(!ops); |
Christoph Hellwig | 205e1b7 | 2017-12-22 14:50:47 +0100 | [diff] [blame] | 523 | WARN_ON_ONCE(dev && !dev->coherent_dma_mask); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 524 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 525 | if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 526 | return cpu_addr; |
| 527 | |
Christoph Hellwig | e89f5b3 | 2018-03-28 15:35:35 +0200 | [diff] [blame] | 528 | /* let the implementation decide on the zone to allocate from: */ |
| 529 | flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); |
Christoph Hellwig | 57bf5a8 | 2017-12-22 16:05:15 +0100 | [diff] [blame] | 530 | |
Huaisheng Ye | 884571f | 2018-05-25 13:00:00 +0800 | [diff] [blame] | 531 | if (!arch_dma_alloc_attrs(&dev)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 532 | return NULL; |
| 533 | if (!ops->alloc) |
| 534 | return NULL; |
| 535 | |
| 536 | cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); |
| 537 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); |
| 538 | return cpu_addr; |
| 539 | } |
| 540 | |
| 541 | static inline void dma_free_attrs(struct device *dev, size_t size, |
| 542 | void *cpu_addr, dma_addr_t dma_handle, |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 543 | unsigned long attrs) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 544 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 545 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 546 | |
| 547 | BUG_ON(!ops); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 548 | |
Vladimir Murzin | 43fc509 | 2017-07-20 11:19:58 +0100 | [diff] [blame] | 549 | if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 550 | return; |
Robin Murphy | d27fb99 | 2018-07-23 22:42:48 +0100 | [diff] [blame] | 551 | /* |
| 552 | * On non-coherent platforms which implement DMA-coherent buffers via |
| 553 | * non-cacheable remaps, ops->free() may call vunmap(). Thus getting |
| 554 | * this far in IRQ context is a) at risk of a BUG_ON() or trying to |
| 555 | * sleep on some machines, and b) an indication that the driver is |
| 556 | * probably misusing the coherent API anyway. |
| 557 | */ |
| 558 | WARN_ON(irqs_disabled()); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 559 | |
Zhen Lei | d6b7eae | 2016-03-09 14:08:38 -0800 | [diff] [blame] | 560 | if (!ops->free || !cpu_addr) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 561 | return; |
| 562 | |
| 563 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); |
| 564 | ops->free(dev, size, cpu_addr, dma_handle, attrs); |
| 565 | } |
| 566 | |
| 567 | static inline void *dma_alloc_coherent(struct device *dev, size_t size, |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 568 | dma_addr_t *dma_handle, gfp_t gfp) |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 569 | { |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 570 | |
| 571 | return dma_alloc_attrs(dev, size, dma_handle, gfp, |
| 572 | (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 573 | } |
| 574 | |
| 575 | static inline void dma_free_coherent(struct device *dev, size_t size, |
| 576 | void *cpu_addr, dma_addr_t dma_handle) |
| 577 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 578 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 579 | } |
| 580 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 581 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| 582 | { |
Robin Murphy | 5237e95 | 2017-07-24 18:29:27 +0100 | [diff] [blame] | 583 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 584 | |
Robin Murphy | 5237e95 | 2017-07-24 18:29:27 +0100 | [diff] [blame] | 585 | debug_dma_mapping_error(dev, dma_addr); |
Christoph Hellwig | 42ee3ca | 2018-11-21 18:52:35 +0100 | [diff] [blame^] | 586 | |
Robin Murphy | 5237e95 | 2017-07-24 18:29:27 +0100 | [diff] [blame] | 587 | if (ops->mapping_error) |
| 588 | return ops->mapping_error(dev, dma_addr); |
Christoph Hellwig | 42ee3ca | 2018-11-21 18:52:35 +0100 | [diff] [blame^] | 589 | if (dma_addr == DMA_MAPPING_ERROR) |
| 590 | return 1; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 591 | return 0; |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 592 | } |
| 593 | |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 594 | static inline void dma_check_mask(struct device *dev, u64 mask) |
| 595 | { |
| 596 | if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) |
| 597 | dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); |
| 598 | } |
| 599 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 600 | static inline int dma_supported(struct device *dev, u64 mask) |
| 601 | { |
Bart Van Assche | 5299709 | 2017-01-20 13:04:01 -0800 | [diff] [blame] | 602 | const struct dma_map_ops *ops = get_dma_ops(dev); |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 603 | |
| 604 | if (!ops) |
| 605 | return 0; |
| 606 | if (!ops->dma_supported) |
| 607 | return 1; |
| 608 | return ops->dma_supported(dev, mask); |
| 609 | } |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 610 | |
| 611 | #ifndef HAVE_ARCH_DMA_SET_MASK |
| 612 | static inline int dma_set_mask(struct device *dev, u64 mask) |
| 613 | { |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 614 | if (!dev->dma_mask || !dma_supported(dev, mask)) |
| 615 | return -EIO; |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 616 | |
| 617 | dma_check_mask(dev, mask); |
| 618 | |
Christoph Hellwig | e1c7e32 | 2016-01-20 15:02:05 -0800 | [diff] [blame] | 619 | *dev->dma_mask = mask; |
| 620 | return 0; |
| 621 | } |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 622 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 624 | static inline u64 dma_get_mask(struct device *dev) |
| 625 | { |
FUJITA Tomonori | 07a2c01 | 2008-09-19 02:02:05 +0900 | [diff] [blame] | 626 | if (dev && dev->dma_mask && *dev->dma_mask) |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 627 | return *dev->dma_mask; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 628 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 629 | } |
| 630 | |
Rob Herring | 58af4a2 | 2012-03-20 14:33:01 -0500 | [diff] [blame] | 631 | #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 632 | int dma_set_coherent_mask(struct device *dev, u64 mask); |
| 633 | #else |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 634 | static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 635 | { |
| 636 | if (!dma_supported(dev, mask)) |
| 637 | return -EIO; |
Tom Lendacky | 648babb | 2017-07-17 16:10:22 -0500 | [diff] [blame] | 638 | |
| 639 | dma_check_mask(dev, mask); |
| 640 | |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 641 | dev->coherent_dma_mask = mask; |
| 642 | return 0; |
| 643 | } |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 644 | #endif |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 645 | |
Russell King | 4aa806b | 2013-06-26 13:49:44 +0100 | [diff] [blame] | 646 | /* |
| 647 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
| 648 | * Note that we don't check the return value from dma_set_coherent_mask() |
| 649 | * as the DMA API guarantees that the coherent DMA mask can be set to |
| 650 | * the same or smaller than the streaming DMA mask. |
| 651 | */ |
| 652 | static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) |
| 653 | { |
| 654 | int rc = dma_set_mask(dev, mask); |
| 655 | if (rc == 0) |
| 656 | dma_set_coherent_mask(dev, mask); |
| 657 | return rc; |
| 658 | } |
| 659 | |
Russell King | fa6a8d6 | 2013-06-27 12:21:45 +0100 | [diff] [blame] | 660 | /* |
| 661 | * Similar to the above, except it deals with the case where the device |
| 662 | * does not have dev->dma_mask appropriately setup. |
| 663 | */ |
| 664 | static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) |
| 665 | { |
| 666 | dev->dma_mask = &dev->coherent_dma_mask; |
| 667 | return dma_set_mask_and_coherent(dev, mask); |
| 668 | } |
| 669 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | extern u64 dma_get_required_mask(struct device *dev); |
| 671 | |
Will Deacon | a3a60f8 | 2014-08-27 15:49:10 +0100 | [diff] [blame] | 672 | #ifndef arch_setup_dma_ops |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 673 | static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 674 | u64 size, const struct iommu_ops *iommu, |
Will Deacon | 97890ba | 2014-08-27 16:24:20 +0100 | [diff] [blame] | 675 | bool coherent) { } |
| 676 | #endif |
| 677 | |
| 678 | #ifndef arch_teardown_dma_ops |
Christoph Hellwig | 1a0afc1 | 2018-09-25 13:16:55 -0700 | [diff] [blame] | 679 | static inline void arch_teardown_dma_ops(struct device *dev) { } |
Santosh Shilimkar | 591c1ee | 2014-04-24 11:30:04 -0400 | [diff] [blame] | 680 | #endif |
| 681 | |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 682 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
| 683 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 684 | if (dev->dma_parms && dev->dma_parms->max_segment_size) |
| 685 | return dev->dma_parms->max_segment_size; |
| 686 | return SZ_64K; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 687 | } |
| 688 | |
Niklas Söderlund | c9d76d0 | 2018-08-29 23:29:21 +0200 | [diff] [blame] | 689 | static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 690 | { |
| 691 | if (dev->dma_parms) { |
| 692 | dev->dma_parms->max_segment_size = size; |
| 693 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 694 | } |
| 695 | return -EIO; |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 696 | } |
| 697 | |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 698 | static inline unsigned long dma_get_seg_boundary(struct device *dev) |
| 699 | { |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 700 | if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) |
| 701 | return dev->dma_parms->segment_boundary_mask; |
| 702 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 703 | } |
| 704 | |
| 705 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
| 706 | { |
| 707 | if (dev->dma_parms) { |
| 708 | dev->dma_parms->segment_boundary_mask = mask; |
| 709 | return 0; |
Robin Murphy | 002edb6 | 2015-11-06 16:32:51 -0800 | [diff] [blame] | 710 | } |
| 711 | return -EIO; |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 712 | } |
| 713 | |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 714 | #ifndef dma_max_pfn |
| 715 | static inline unsigned long dma_max_pfn(struct device *dev) |
| 716 | { |
Christoph Hellwig | a41ef1e | 2017-11-30 07:32:51 -0800 | [diff] [blame] | 717 | return (*dev->dma_mask >> PAGE_SHIFT) + dev->dma_pfn_offset; |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 718 | } |
| 719 | #endif |
| 720 | |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 721 | static inline void *dma_zalloc_coherent(struct device *dev, size_t size, |
| 722 | dma_addr_t *dma_handle, gfp_t flag) |
| 723 | { |
Joe Perches | ede23fa8 | 2013-08-26 22:45:23 -0700 | [diff] [blame] | 724 | void *ret = dma_alloc_coherent(dev, size, dma_handle, |
| 725 | flag | __GFP_ZERO); |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 726 | return ret; |
| 727 | } |
| 728 | |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 729 | static inline int dma_get_cache_alignment(void) |
| 730 | { |
| 731 | #ifdef ARCH_DMA_MINALIGN |
| 732 | return ARCH_DMA_MINALIGN; |
| 733 | #endif |
| 734 | return 1; |
| 735 | } |
| 736 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | /* flags for the coherent memory api */ |
Christoph Hellwig | 2436bdc | 2017-08-25 17:13:09 +0200 | [diff] [blame] | 738 | #define DMA_MEMORY_EXCLUSIVE 0x01 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 739 | |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 740 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
| 741 | int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
| 742 | dma_addr_t device_addr, size_t size, int flags); |
| 743 | void dma_release_declared_memory(struct device *dev); |
| 744 | void *dma_mark_declared_memory_occupied(struct device *dev, |
| 745 | dma_addr_t device_addr, size_t size); |
| 746 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | static inline int |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 748 | dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | dma_addr_t device_addr, size_t size, int flags) |
| 750 | { |
Christoph Hellwig | 2436bdc | 2017-08-25 17:13:09 +0200 | [diff] [blame] | 751 | return -ENOSYS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | } |
| 753 | |
| 754 | static inline void |
| 755 | dma_release_declared_memory(struct device *dev) |
| 756 | { |
| 757 | } |
| 758 | |
| 759 | static inline void * |
| 760 | dma_mark_declared_memory_occupied(struct device *dev, |
| 761 | dma_addr_t device_addr, size_t size) |
| 762 | { |
| 763 | return ERR_PTR(-EBUSY); |
| 764 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 765 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 767 | /* |
| 768 | * Managed DMA API |
| 769 | */ |
Geert Uytterhoeven | ab642e9 | 2018-03-16 14:25:41 +0100 | [diff] [blame] | 770 | #ifdef CONFIG_HAS_DMA |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 771 | extern void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 772 | dma_addr_t *dma_handle, gfp_t gfp); |
| 773 | extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 774 | dma_addr_t dma_handle); |
Geert Uytterhoeven | ab642e9 | 2018-03-16 14:25:41 +0100 | [diff] [blame] | 775 | #else /* !CONFIG_HAS_DMA */ |
| 776 | static inline void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 777 | dma_addr_t *dma_handle, gfp_t gfp) |
| 778 | { return NULL; } |
| 779 | static inline void dmam_free_coherent(struct device *dev, size_t size, |
| 780 | void *vaddr, dma_addr_t dma_handle) { } |
| 781 | #endif /* !CONFIG_HAS_DMA */ |
| 782 | |
Christoph Hellwig | 63d36c9 | 2017-06-12 19:15:04 +0200 | [diff] [blame] | 783 | extern void *dmam_alloc_attrs(struct device *dev, size_t size, |
| 784 | dma_addr_t *dma_handle, gfp_t gfp, |
| 785 | unsigned long attrs); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 786 | #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 787 | extern int dmam_declare_coherent_memory(struct device *dev, |
| 788 | phys_addr_t phys_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 789 | dma_addr_t device_addr, size_t size, |
| 790 | int flags); |
| 791 | extern void dmam_release_declared_memory(struct device *dev); |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 792 | #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 793 | static inline int dmam_declare_coherent_memory(struct device *dev, |
Bjorn Helgaas | 88a984b | 2014-05-20 16:54:22 -0600 | [diff] [blame] | 794 | phys_addr_t phys_addr, dma_addr_t device_addr, |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 795 | size_t size, gfp_t gfp) |
| 796 | { |
| 797 | return 0; |
| 798 | } |
| 799 | |
| 800 | static inline void dmam_release_declared_memory(struct device *dev) |
| 801 | { |
| 802 | } |
Christoph Hellwig | 20d666e | 2016-01-20 15:02:09 -0800 | [diff] [blame] | 803 | #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 804 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 805 | static inline void *dma_alloc_wc(struct device *dev, size_t size, |
| 806 | dma_addr_t *dma_addr, gfp_t gfp) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 807 | { |
Christoph Hellwig | 7ed1d91 | 2018-09-24 13:06:58 +0200 | [diff] [blame] | 808 | unsigned long attrs = DMA_ATTR_NO_WARN; |
| 809 | |
| 810 | if (gfp & __GFP_NOWARN) |
| 811 | attrs |= DMA_ATTR_NO_WARN; |
| 812 | |
| 813 | return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 814 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 815 | #ifndef dma_alloc_writecombine |
| 816 | #define dma_alloc_writecombine dma_alloc_wc |
| 817 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 818 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 819 | static inline void dma_free_wc(struct device *dev, size_t size, |
| 820 | void *cpu_addr, dma_addr_t dma_addr) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 821 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 822 | return dma_free_attrs(dev, size, cpu_addr, dma_addr, |
| 823 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 824 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 825 | #ifndef dma_free_writecombine |
| 826 | #define dma_free_writecombine dma_free_wc |
| 827 | #endif |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 828 | |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 829 | static inline int dma_mmap_wc(struct device *dev, |
| 830 | struct vm_area_struct *vma, |
| 831 | void *cpu_addr, dma_addr_t dma_addr, |
| 832 | size_t size) |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 833 | { |
Krzysztof Kozlowski | 00085f1 | 2016-08-03 13:46:00 -0700 | [diff] [blame] | 834 | return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, |
| 835 | DMA_ATTR_WRITE_COMBINE); |
Thierry Reding | b4bbb10 | 2014-06-27 11:56:58 +0200 | [diff] [blame] | 836 | } |
Luis R. Rodriguez | f6e4566 | 2016-01-22 18:34:22 -0800 | [diff] [blame] | 837 | #ifndef dma_mmap_writecombine |
| 838 | #define dma_mmap_writecombine dma_mmap_wc |
| 839 | #endif |
Arthur Kepner | 74bc7ce | 2008-04-29 01:00:30 -0700 | [diff] [blame] | 840 | |
Christoph Hellwig | f616ab5 | 2018-05-09 06:53:49 +0200 | [diff] [blame] | 841 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
FUJITA Tomonori | 0acedc1 | 2010-03-10 15:23:31 -0800 | [diff] [blame] | 842 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
| 843 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME |
| 844 | #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
| 845 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
| 846 | #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
| 847 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
| 848 | #else |
| 849 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) |
| 850 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) |
| 851 | #define dma_unmap_addr(PTR, ADDR_NAME) (0) |
| 852 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 853 | #define dma_unmap_len(PTR, LEN_NAME) (0) |
| 854 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 855 | #endif |
| 856 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | #endif |