blob: b8252ced0968ea31ec0750f7c34a874ac8f588d2 [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe5782011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010019#include <linux/errno.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030020#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030021#include <linux/mmc/sdio_func.h>
22#include "core.h"
23#include "cfg80211.h"
24#include "target.h"
25#include "debug.h"
26#include "hif-ops.h"
27
Kalle Valo003353b0d2011-09-01 10:14:21 +030028static unsigned int testmode;
Kalle Valobdcd8172011-07-18 00:22:30 +030029
Kalle Valo003353b0d2011-09-01 10:14:21 +030030module_param(testmode, uint, 0644);
Kalle Valobdcd8172011-07-18 00:22:30 +030031
Kalle Valo856f4b312011-11-14 19:30:29 +020032static const struct ath6kl_hw hw_list[] = {
33 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020034 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020035 .name = "ar6003 hw 2.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020036 .dataset_patch_addr = 0x57e884,
37 .app_load_addr = 0x543180,
38 .board_ext_data_addr = 0x57e500,
39 .reserved_ram_size = 6912,
Ryan Hsu39586bf2011-12-13 17:11:07 +080040 .refclk_hz = 26000000,
41 .uarttx_pin = 8,
Kalle Valo856f4b312011-11-14 19:30:29 +020042
43 /* hw2.0 needs override address hardcoded */
44 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020045
Kalle Valoc0038972011-12-16 20:53:31 +020046 .fw = {
47 .dir = AR6003_HW_2_0_FW_DIR,
48 .otp = AR6003_HW_2_0_OTP_FILE,
49 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
50 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
51 .patch = AR6003_HW_2_0_PATCH_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020052 },
53
Kalle Valod1a94212011-11-14 19:31:23 +020054 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
55 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020056 },
57 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020058 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020059 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +020060 .dataset_patch_addr = 0x57ff74,
61 .app_load_addr = 0x1234,
62 .board_ext_data_addr = 0x542330,
63 .reserved_ram_size = 512,
Ryan Hsu39586bf2011-12-13 17:11:07 +080064 .refclk_hz = 26000000,
65 .uarttx_pin = 8,
Alex Yangcd23c1c2012-01-17 15:32:29 +020066 .testscript_addr = 0x57ef74,
Kalle Valod1a94212011-11-14 19:31:23 +020067
Kalle Valoc0038972011-12-16 20:53:31 +020068 .fw = {
69 .dir = AR6003_HW_2_1_1_FW_DIR,
70 .otp = AR6003_HW_2_1_1_OTP_FILE,
71 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
72 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
73 .patch = AR6003_HW_2_1_1_PATCH_FILE,
Alex Yangcd23c1c2012-01-17 15:32:29 +020074 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
75 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020076 },
77
Kalle Valod1a94212011-11-14 19:31:23 +020078 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
79 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020080 },
81 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +020082 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020083 .name = "ar6004 hw 1.0",
Kalle Valo856f4b312011-11-14 19:30:29 +020084 .dataset_patch_addr = 0x57e884,
85 .app_load_addr = 0x1234,
86 .board_ext_data_addr = 0x437000,
87 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020088 .board_addr = 0x433900,
Ryan Hsu39586bf2011-12-13 17:11:07 +080089 .refclk_hz = 26000000,
90 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +020091
Kalle Valoc0038972011-12-16 20:53:31 +020092 .fw = {
93 .dir = AR6004_HW_1_0_FW_DIR,
94 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +020095 },
96
Kalle Valod1a94212011-11-14 19:31:23 +020097 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
98 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +020099 },
100 {
Kalle Valo0d0192ba2011-11-14 19:31:07 +0200101 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +0200102 .name = "ar6004 hw 1.1",
Kalle Valo856f4b312011-11-14 19:30:29 +0200103 .dataset_patch_addr = 0x57e884,
104 .app_load_addr = 0x1234,
105 .board_ext_data_addr = 0x437000,
106 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +0200107 .board_addr = 0x43d400,
Ryan Hsu39586bf2011-12-13 17:11:07 +0800108 .refclk_hz = 40000000,
109 .uarttx_pin = 11,
Kalle Valod1a94212011-11-14 19:31:23 +0200110
Kalle Valoc0038972011-12-16 20:53:31 +0200111 .fw = {
112 .dir = AR6004_HW_1_1_FW_DIR,
113 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
Kalle Valoc0038972011-12-16 20:53:31 +0200114 },
115
Kalle Valod1a94212011-11-14 19:31:23 +0200116 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
117 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b312011-11-14 19:30:29 +0200118 },
119};
120
Kalle Valobdcd8172011-07-18 00:22:30 +0300121/*
122 * Include definitions here that can be used to tune the WLAN module
123 * behavior. Different customers can tune the behavior as per their needs,
124 * here.
125 */
126
127/*
128 * This configuration item enable/disable keepalive support.
129 * Keepalive support: In the absence of any data traffic to AP, null
130 * frames will be sent to the AP at periodic interval, to keep the association
131 * active. This configuration item defines the periodic interval.
132 * Use value of zero to disable keepalive support
133 * Default: 60 seconds
134 */
135#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
136
137/*
138 * This configuration item sets the value of disconnect timeout
139 * Firmware delays sending the disconnec event to the host for this
140 * timeout after is gets disconnected from the current AP.
141 * If the firmware successly roams within the disconnect timeout
142 * it sends a new connect event
143 */
144#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
145
Kalle Valobdcd8172011-07-18 00:22:30 +0300146
Kalle Valobdcd8172011-07-18 00:22:30 +0300147#define ATH6KL_DATA_OFFSET 64
148struct sk_buff *ath6kl_buf_alloc(int size)
149{
150 struct sk_buff *skb;
151 u16 reserved;
152
153 /* Add chacheline space at front and back of buffer */
154 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530155 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300156 skb = dev_alloc_skb(size + reserved);
157
158 if (skb)
159 skb_reserve(skb, reserved - L1_CACHE_BYTES);
160 return skb;
161}
162
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530163void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300164{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530165 vif->ssid_len = 0;
166 memset(vif->ssid, 0, sizeof(vif->ssid));
167
168 vif->dot11_auth_mode = OPEN_AUTH;
169 vif->auth_mode = NONE_AUTH;
170 vif->prwise_crypto = NONE_CRYPT;
171 vif->prwise_crypto_len = 0;
172 vif->grp_crypto = NONE_CRYPT;
173 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530174 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530175 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
176 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530177 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300178}
179
Kalle Valobdcd8172011-07-18 00:22:30 +0300180static int ath6kl_set_host_app_area(struct ath6kl *ar)
181{
182 u32 address, data;
183 struct host_app_area host_app_area;
184
185 /* Fetch the address of the host_app_area_s
186 * instance in the host interest area */
187 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800188 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300189
Kalle Valoaddb44b2011-09-02 10:32:05 +0300190 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300191 return -EIO;
192
Kevin Fang31024d92011-07-11 17:14:13 +0800193 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300194 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300195 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
196 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300197 return -EIO;
198
199 return 0;
200}
201
202static inline void set_ac2_ep_map(struct ath6kl *ar,
203 u8 ac,
204 enum htc_endpoint_id ep)
205{
206 ar->ac2ep_map[ac] = ep;
207 ar->ep2ac_map[ep] = ac;
208}
209
210/* connect to a service */
211static int ath6kl_connectservice(struct ath6kl *ar,
212 struct htc_service_connect_req *con_req,
213 char *desc)
214{
215 int status;
216 struct htc_service_connect_resp response;
217
218 memset(&response, 0, sizeof(response));
219
Kalle Vaload226ec2011-08-10 09:49:12 +0300220 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300221 if (status) {
222 ath6kl_err("failed to connect to %s service status:%d\n",
223 desc, status);
224 return status;
225 }
226
227 switch (con_req->svc_id) {
228 case WMI_CONTROL_SVC:
229 if (test_bit(WMI_ENABLED, &ar->flag))
230 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
231 ar->ctrl_ep = response.endpoint;
232 break;
233 case WMI_DATA_BE_SVC:
234 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
235 break;
236 case WMI_DATA_BK_SVC:
237 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
238 break;
239 case WMI_DATA_VI_SVC:
240 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
241 break;
242 case WMI_DATA_VO_SVC:
243 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
244 break;
245 default:
246 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
247 return -EINVAL;
248 }
249
250 return 0;
251}
252
253static int ath6kl_init_service_ep(struct ath6kl *ar)
254{
255 struct htc_service_connect_req connect;
256
257 memset(&connect, 0, sizeof(connect));
258
259 /* these fields are the same for all service endpoints */
260 connect.ep_cb.rx = ath6kl_rx;
261 connect.ep_cb.rx_refill = ath6kl_rx_refill;
262 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
263
264 /*
265 * Set the max queue depth so that our ath6kl_tx_queue_full handler
266 * gets called.
267 */
268 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
269 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
270 if (!connect.ep_cb.rx_refill_thresh)
271 connect.ep_cb.rx_refill_thresh++;
272
273 /* connect to control service */
274 connect.svc_id = WMI_CONTROL_SVC;
275 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
276 return -EIO;
277
278 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
279
280 /*
281 * Limit the HTC message size on the send path, although e can
282 * receive A-MSDU frames of 4K, we will only send ethernet-sized
283 * (802.3) frames on the send path.
284 */
285 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
286
287 /*
288 * To reduce the amount of committed memory for larger A_MSDU
289 * frames, use the recv-alloc threshold mechanism for larger
290 * packets.
291 */
292 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
293 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
294
295 /*
296 * For the remaining data services set the connection flag to
297 * reduce dribbling, if configured to do so.
298 */
299 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
300 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
301 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
302
303 connect.svc_id = WMI_DATA_BE_SVC;
304
305 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
306 return -EIO;
307
308 /* connect to back-ground map this to WMI LOW_PRI */
309 connect.svc_id = WMI_DATA_BK_SVC;
310 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
311 return -EIO;
312
313 /* connect to Video service, map this to to HI PRI */
314 connect.svc_id = WMI_DATA_VI_SVC;
315 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
316 return -EIO;
317
318 /*
319 * Connect to VO service, this is currently not mapped to a WMI
320 * priority stream due to historical reasons. WMI originally
321 * defined 3 priorities over 3 mailboxes We can change this when
322 * WMI is reworked so that priorities are not dependent on
323 * mailboxes.
324 */
325 connect.svc_id = WMI_DATA_VO_SVC;
326 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
327 return -EIO;
328
329 return 0;
330}
331
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530332void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300333{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530334 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530335 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530336 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530337 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300338}
339
340/*
341 * Set HTC/Mbox operational parameters, this can only be called when the
342 * target is in the BMI phase.
343 */
344static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
345 u8 htc_ctrl_buf)
346{
347 int status;
348 u32 blk_size;
349
350 blk_size = ar->mbox_info.block_size;
351
352 if (htc_ctrl_buf)
353 blk_size |= ((u32)htc_ctrl_buf) << 16;
354
355 /* set the host interest area for the block size */
356 status = ath6kl_bmi_write(ar,
357 ath6kl_get_hi_item_addr(ar,
358 HI_ITEM(hi_mbox_io_block_sz)),
359 (u8 *)&blk_size,
360 4);
361 if (status) {
362 ath6kl_err("bmi_write_memory for IO block size failed\n");
363 goto out;
364 }
365
366 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
367 blk_size,
368 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
369
370 if (mbox_isr_yield_val) {
371 /* set the host interest area for the mbox ISR yield limit */
372 status = ath6kl_bmi_write(ar,
373 ath6kl_get_hi_item_addr(ar,
374 HI_ITEM(hi_mbox_isr_yield_limit)),
375 (u8 *)&mbox_isr_yield_val,
376 4);
377 if (status) {
378 ath6kl_err("bmi_write_memory for yield limit failed\n");
379 goto out;
380 }
381 }
382
383out:
384 return status;
385}
386
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530387static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300388{
389 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300390 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300391
392 /*
393 * Configure the device for rx dot11 header rules. "0,0" are the
394 * default values. Required if checksum offload is needed. Set
395 * RxMetaVersion to 2.
396 */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530397 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300398 ar->rx_meta_ver, 0, 0)) {
399 ath6kl_err("unable to set the rx frame format\n");
400 status = -EIO;
401 }
402
403 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530404 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valobdcd8172011-07-18 00:22:30 +0300405 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
406 ath6kl_err("unable to set power save fail event policy\n");
407 status = -EIO;
408 }
409
410 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530411 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valobdcd8172011-07-18 00:22:30 +0300412 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
413 ath6kl_err("unable to set barker preamble policy\n");
414 status = -EIO;
415 }
416
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530417 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300418 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
419 ath6kl_err("unable to set keep alive interval\n");
420 status = -EIO;
421 }
422
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530423 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300424 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
425 ath6kl_err("unable to set disconnect timeout\n");
426 status = -EIO;
427 }
428
429 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530430 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300431 ath6kl_err("unable to set txop bursting\n");
432 status = -EIO;
433 }
434
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530435 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530436 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300437 P2P_FLAG_CAPABILITIES_REQ |
438 P2P_FLAG_MACADDR_REQ |
439 P2P_FLAG_HMODEL_REQ);
440 if (ret) {
441 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
442 "capabilities (%d) - assuming P2P not "
443 "supported\n", ret);
Rusty Russell3db1cd52011-12-19 13:56:45 +0000444 ar->p2p = false;
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300445 }
446 }
447
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530448 if (ar->p2p && (ar->vif_max == 1 || idx)) {
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300449 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530450 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300451 if (ret) {
452 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
453 "Request reporting (%d)\n", ret);
454 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300455 }
456
Kalle Valobdcd8172011-07-18 00:22:30 +0300457 return status;
458}
459
460int ath6kl_configure_target(struct ath6kl *ar)
461{
462 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530463 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Ryan Hsu39586bf2011-12-13 17:11:07 +0800464 int i, status;
Kalle Valobdcd8172011-07-18 00:22:30 +0300465
Kalle Valof29af972012-01-17 20:08:56 +0200466 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
Vasanthakumar Thiagarajana10e2f22011-12-29 16:05:38 +0530467 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
468 HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
469 ath6kl_err("bmi_write_memory for uart debug failed\n");
470 return -EIO;
471 }
472
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530473 /*
474 * Note: Even though the firmware interface type is
475 * chosen as BSS_STA for all three interfaces, can
476 * be configured to IBSS/AP as long as the fw submode
477 * remains normal mode (0 - AP, STA and IBSS). But
478 * due to an target assert in firmware only one interface is
479 * configured for now.
480 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530481 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300482
Kalle Valo71f96ee2011-11-14 19:31:30 +0200483 for (i = 0; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530484 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
485
486 /*
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530487 * By default, submodes :
488 * vif[0] - AP/STA/IBSS
489 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
490 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530491 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530492
493 for (i = 0; i < ar->max_norm_iface; i++)
494 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
495 (i * HI_OPTION_FW_SUBMODE_BITS);
496
Kalle Valo71f96ee2011-11-14 19:31:30 +0200497 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530498 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
499 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530500
Vasanthakumar Thiagarajanb64de352011-11-18 10:05:28 +0530501 if (ar->p2p && ar->vif_max == 1)
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530502 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530503
Kalle Valobdcd8172011-07-18 00:22:30 +0300504 param = HTC_PROTOCOL_VERSION;
505 if (ath6kl_bmi_write(ar,
506 ath6kl_get_hi_item_addr(ar,
507 HI_ITEM(hi_app_host_interest)),
508 (u8 *)&param, 4) != 0) {
509 ath6kl_err("bmi_write_memory for htc version failed\n");
510 return -EIO;
511 }
512
513 /* set the firmware mode to STA/IBSS/AP */
514 param = 0;
515
516 if (ath6kl_bmi_read(ar,
517 ath6kl_get_hi_item_addr(ar,
518 HI_ITEM(hi_option_flag)),
519 (u8 *)&param, 4) != 0) {
520 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
521 return -EIO;
522 }
523
Kalle Valo71f96ee2011-11-14 19:31:30 +0200524 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530525 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
526 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
527
Kalle Valobdcd8172011-07-18 00:22:30 +0300528 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
529 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
530
531 if (ath6kl_bmi_write(ar,
532 ath6kl_get_hi_item_addr(ar,
533 HI_ITEM(hi_option_flag)),
534 (u8 *)&param,
535 4) != 0) {
536 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
537 return -EIO;
538 }
539
540 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
541
542 /*
543 * Hardcode the address use for the extended board data
544 * Ideally this should be pre-allocate by the OS at boot time
545 * But since it is a new feature and board data is loaded
546 * at init time, we have to workaround this from host.
547 * It is difficult to patch the firmware boot code,
548 * but possible in theory.
549 */
550
Kalle Valo991b27e2011-09-07 10:55:17 +0300551 param = ar->hw.board_ext_data_addr;
552 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300553
Kalle Valo991b27e2011-09-07 10:55:17 +0300554 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
555 HI_ITEM(hi_board_ext_data)),
556 (u8 *)&param, 4) != 0) {
557 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
558 return -EIO;
559 }
560
561 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
562 HI_ITEM(hi_end_ram_reserve_sz)),
563 (u8 *)&ram_reserved_size, 4) != 0) {
564 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
565 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300566 }
567
568 /* set the block size for the target */
569 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
570 /* use default number of control buffers */
571 return -EIO;
572
Ryan Hsu39586bf2011-12-13 17:11:07 +0800573 /* Configure GPIO AR600x UART */
574 param = ar->hw.uarttx_pin;
575 status = ath6kl_bmi_write(ar,
576 ath6kl_get_hi_item_addr(ar,
577 HI_ITEM(hi_dbg_uart_txpin)),
578 (u8 *)&param, 4);
579 if (status)
580 return status;
581
582 /* Configure target refclk_hz */
583 param = ar->hw.refclk_hz;
584 status = ath6kl_bmi_write(ar,
585 ath6kl_get_hi_item_addr(ar,
586 HI_ITEM(hi_refclk_hz)),
587 (u8 *)&param, 4);
588 if (status)
589 return status;
590
Kalle Valobdcd8172011-07-18 00:22:30 +0300591 return 0;
592}
593
Kalle Valobdcd8172011-07-18 00:22:30 +0300594/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300595static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
596 u8 **fw, size_t *fw_len)
597{
598 const struct firmware *fw_entry;
599 int ret;
600
601 ret = request_firmware(&fw_entry, filename, ar->dev);
602 if (ret)
603 return ret;
604
605 *fw_len = fw_entry->size;
606 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
607
608 if (*fw == NULL)
609 ret = -ENOMEM;
610
611 release_firmware(fw_entry);
612
613 return ret;
614}
615
Sam Leffler92ecbff2011-09-07 10:55:16 +0300616#ifdef CONFIG_OF
Sam Leffler92ecbff2011-09-07 10:55:16 +0300617/*
618 * Check the device tree for a board-id and use it to construct
619 * the pathname to the firmware file. Used (for now) to find a
620 * fallback to the "bdata.bin" file--typically a symlink to the
621 * appropriate board-specific file.
622 */
623static bool check_device_tree(struct ath6kl *ar)
624{
625 static const char *board_id_prop = "atheros,board-id";
626 struct device_node *node;
627 char board_filename[64];
628 const char *board_id;
629 int ret;
630
631 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
632 board_id = of_get_property(node, board_id_prop, NULL);
633 if (board_id == NULL) {
634 ath6kl_warn("No \"%s\" property on %s node.\n",
635 board_id_prop, node->name);
636 continue;
637 }
638 snprintf(board_filename, sizeof(board_filename),
Kalle Valoc0038972011-12-16 20:53:31 +0200639 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
Sam Leffler92ecbff2011-09-07 10:55:16 +0300640
641 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
642 &ar->fw_board_len);
643 if (ret) {
644 ath6kl_err("Failed to get DT board file %s: %d\n",
645 board_filename, ret);
646 continue;
647 }
648 return true;
649 }
650 return false;
651}
652#else
653static bool check_device_tree(struct ath6kl *ar)
654{
655 return false;
656}
657#endif /* CONFIG_OF */
658
Kalle Valobdcd8172011-07-18 00:22:30 +0300659static int ath6kl_fetch_board_file(struct ath6kl *ar)
660{
661 const char *filename;
662 int ret;
663
Kalle Valo772c31e2011-09-07 10:55:16 +0300664 if (ar->fw_board != NULL)
665 return 0;
666
Kalle Valod1a94212011-11-14 19:31:23 +0200667 if (WARN_ON(ar->hw.fw_board == NULL))
668 return -EINVAL;
669
670 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300671
672 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
673 &ar->fw_board_len);
674 if (ret == 0) {
675 /* managed to get proper board file */
676 return 0;
677 }
678
Sam Leffler92ecbff2011-09-07 10:55:16 +0300679 if (check_device_tree(ar)) {
680 /* got board file from device tree */
681 return 0;
682 }
683
Kalle Valobdcd8172011-07-18 00:22:30 +0300684 /* there was no proper board file, try to use default instead */
685 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
686 filename, ret);
687
Kalle Valod1a94212011-11-14 19:31:23 +0200688 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300689
690 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
691 &ar->fw_board_len);
692 if (ret) {
693 ath6kl_err("Failed to get default board file %s: %d\n",
694 filename, ret);
695 return ret;
696 }
697
698 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
699 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
700
701 return 0;
702}
703
Kalle Valo772c31e2011-09-07 10:55:16 +0300704static int ath6kl_fetch_otp_file(struct ath6kl *ar)
705{
Kalle Valoc0038972011-12-16 20:53:31 +0200706 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300707 int ret;
708
709 if (ar->fw_otp != NULL)
710 return 0;
711
Kalle Valoc0038972011-12-16 20:53:31 +0200712 if (ar->hw.fw.otp == NULL) {
Kalle Valod1a94212011-11-14 19:31:23 +0200713 ath6kl_dbg(ATH6KL_DBG_BOOT,
714 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300715 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300716 }
717
Kalle Valoc0038972011-12-16 20:53:31 +0200718 snprintf(filename, sizeof(filename), "%s/%s",
719 ar->hw.fw.dir, ar->hw.fw.otp);
Kalle Valod1a94212011-11-14 19:31:23 +0200720
Kalle Valo772c31e2011-09-07 10:55:16 +0300721 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
722 &ar->fw_otp_len);
723 if (ret) {
724 ath6kl_err("Failed to get OTP file %s: %d\n",
725 filename, ret);
726 return ret;
727 }
728
729 return 0;
730}
731
732static int ath6kl_fetch_fw_file(struct ath6kl *ar)
733{
Kalle Valoc0038972011-12-16 20:53:31 +0200734 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300735 int ret;
736
737 if (ar->fw != NULL)
738 return 0;
739
740 if (testmode) {
Alex Yangcd23c1c2012-01-17 15:32:29 +0200741 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n",
742 testmode);
743 if (testmode == 2) {
744 if (ar->hw.fw.utf == NULL) {
745 ath6kl_warn("testmode 2 not supported\n");
746 return -EOPNOTSUPP;
747 }
748
749 snprintf(filename, sizeof(filename), "%s/%s",
750 ar->hw.fw.dir, ar->hw.fw.utf);
751 } else {
752 if (ar->hw.fw.tcmd == NULL) {
753 ath6kl_warn("testmode 1 not supported\n");
754 return -EOPNOTSUPP;
755 }
756
757 snprintf(filename, sizeof(filename), "%s/%s",
758 ar->hw.fw.dir, ar->hw.fw.tcmd);
Kalle Valo772c31e2011-09-07 10:55:16 +0300759 }
Kalle Valo772c31e2011-09-07 10:55:16 +0300760 set_bit(TESTMODE, &ar->flag);
761
762 goto get_fw;
763 }
764
Kalle Valoc0038972011-12-16 20:53:31 +0200765 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
766 if (WARN_ON(ar->hw.fw.fw == NULL))
Kalle Valod1a94212011-11-14 19:31:23 +0200767 return -EINVAL;
768
Kalle Valoc0038972011-12-16 20:53:31 +0200769 snprintf(filename, sizeof(filename), "%s/%s",
770 ar->hw.fw.dir, ar->hw.fw.fw);
Kalle Valo772c31e2011-09-07 10:55:16 +0300771
772get_fw:
773 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
774 if (ret) {
775 ath6kl_err("Failed to get firmware file %s: %d\n",
776 filename, ret);
777 return ret;
778 }
779
780 return 0;
781}
782
783static int ath6kl_fetch_patch_file(struct ath6kl *ar)
784{
Kalle Valoc0038972011-12-16 20:53:31 +0200785 char filename[100];
Kalle Valo772c31e2011-09-07 10:55:16 +0300786 int ret;
787
Kalle Valod1a94212011-11-14 19:31:23 +0200788 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300789 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300790
Kalle Valoc0038972011-12-16 20:53:31 +0200791 if (ar->hw.fw.patch == NULL)
Kalle Valod1a94212011-11-14 19:31:23 +0200792 return 0;
793
Kalle Valoc0038972011-12-16 20:53:31 +0200794 snprintf(filename, sizeof(filename), "%s/%s",
795 ar->hw.fw.dir, ar->hw.fw.patch);
Kalle Valod1a94212011-11-14 19:31:23 +0200796
797 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
798 &ar->fw_patch_len);
799 if (ret) {
800 ath6kl_err("Failed to get patch file %s: %d\n",
801 filename, ret);
802 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300803 }
804
805 return 0;
806}
807
Alex Yangcd23c1c2012-01-17 15:32:29 +0200808static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
809{
810 char filename[100];
811 int ret;
812
813 if (testmode != 2)
814 return 0;
815
816 if (ar->fw_testscript != NULL)
817 return 0;
818
819 if (ar->hw.fw.testscript == NULL)
820 return 0;
821
822 snprintf(filename, sizeof(filename), "%s/%s",
823 ar->hw.fw.dir, ar->hw.fw.testscript);
824
825 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
826 &ar->fw_testscript_len);
827 if (ret) {
828 ath6kl_err("Failed to get testscript file %s: %d\n",
829 filename, ret);
830 return ret;
831 }
832
833 return 0;
834}
835
Kalle Valo50d41232011-09-07 10:55:17 +0300836static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300837{
838 int ret;
839
Kalle Valo772c31e2011-09-07 10:55:16 +0300840 ret = ath6kl_fetch_otp_file(ar);
841 if (ret)
842 return ret;
843
844 ret = ath6kl_fetch_fw_file(ar);
845 if (ret)
846 return ret;
847
848 ret = ath6kl_fetch_patch_file(ar);
849 if (ret)
850 return ret;
851
Alex Yangcd23c1c2012-01-17 15:32:29 +0200852 ret = ath6kl_fetch_testscript_file(ar);
853 if (ret)
854 return ret;
855
Kalle Valo772c31e2011-09-07 10:55:16 +0300856 return 0;
857}
Kalle Valobdcd8172011-07-18 00:22:30 +0300858
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200859static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
Kalle Valo50d41232011-09-07 10:55:17 +0300860{
861 size_t magic_len, len, ie_len;
862 const struct firmware *fw;
863 struct ath6kl_fw_ie *hdr;
Kalle Valoc0038972011-12-16 20:53:31 +0200864 char filename[100];
Kalle Valo50d41232011-09-07 10:55:17 +0300865 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300866 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300867 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300868
Kalle Valo65a8b4c2011-12-16 20:53:41 +0200869 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
Kalle Valo50d41232011-09-07 10:55:17 +0300870
871 ret = request_firmware(&fw, filename, ar->dev);
872 if (ret)
873 return ret;
874
875 data = fw->data;
876 len = fw->size;
877
878 /* magic also includes the null byte, check that as well */
879 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
880
881 if (len < magic_len) {
882 ret = -EINVAL;
883 goto out;
884 }
885
886 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
887 ret = -EINVAL;
888 goto out;
889 }
890
891 len -= magic_len;
892 data += magic_len;
893
894 /* loop elements */
895 while (len > sizeof(struct ath6kl_fw_ie)) {
896 /* hdr is unaligned! */
897 hdr = (struct ath6kl_fw_ie *) data;
898
899 ie_id = le32_to_cpup(&hdr->id);
900 ie_len = le32_to_cpup(&hdr->len);
901
902 len -= sizeof(*hdr);
903 data += sizeof(*hdr);
904
905 if (len < ie_len) {
906 ret = -EINVAL;
907 goto out;
908 }
909
910 switch (ie_id) {
911 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300912 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300913 ie_len);
914
Kalle Valo50d41232011-09-07 10:55:17 +0300915 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
916
917 if (ar->fw_otp == NULL) {
918 ret = -ENOMEM;
919 goto out;
920 }
921
922 ar->fw_otp_len = ie_len;
923 break;
924 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300925 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300926 ie_len);
927
Kalle Valo50d41232011-09-07 10:55:17 +0300928 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
929
930 if (ar->fw == NULL) {
931 ret = -ENOMEM;
932 goto out;
933 }
934
935 ar->fw_len = ie_len;
936 break;
937 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300938 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300939 ie_len);
940
Kalle Valo50d41232011-09-07 10:55:17 +0300941 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
942
943 if (ar->fw_patch == NULL) {
944 ret = -ENOMEM;
945 goto out;
946 }
947
948 ar->fw_patch_len = ie_len;
949 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300950 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
951 val = (__le32 *) data;
952 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300953
954 ath6kl_dbg(ATH6KL_DBG_BOOT,
955 "found reserved ram size ie 0x%d\n",
956 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300957 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300958 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo277d90f2011-12-13 14:51:58 +0200959 if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
960 break;
961
Kalle Valo6bc36432011-09-27 14:31:11 +0300962 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300963 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300964 ie_len);
965
Kalle Valo97e04962011-09-12 13:47:34 +0300966 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
Kalle Valo277d90f2011-12-13 14:51:58 +0200967 index = i / 8;
Kalle Valo97e04962011-09-12 13:47:34 +0300968 bit = i % 8;
969
970 if (data[index] & (1 << bit))
971 __set_bit(i, ar->fw_capabilities);
972 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300973
974 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
975 ar->fw_capabilities,
976 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300977 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300978 case ATH6KL_FW_IE_PATCH_ADDR:
979 if (ie_len != sizeof(*val))
980 break;
981
982 val = (__le32 *) data;
983 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300984
985 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +0200986 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300987 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300988 break;
Kalle Valo03ef0252011-11-14 19:30:47 +0200989 case ATH6KL_FW_IE_BOARD_ADDR:
990 if (ie_len != sizeof(*val))
991 break;
992
993 val = (__le32 *) data;
994 ar->hw.board_addr = le32_to_cpup(val);
995
996 ath6kl_dbg(ATH6KL_DBG_BOOT,
997 "found board address ie 0x%x\n",
998 ar->hw.board_addr);
999 break;
Kalle Valo368b1b02011-11-14 19:31:38 +02001000 case ATH6KL_FW_IE_VIF_MAX:
1001 if (ie_len != sizeof(*val))
1002 break;
1003
1004 val = (__le32 *) data;
1005 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1006 ATH6KL_VIF_MAX);
1007
Vasanthakumar Thiagarajanf1433792011-11-18 10:05:27 +05301008 if (ar->vif_max > 1 && !ar->p2p)
1009 ar->max_norm_iface = 2;
1010
Kalle Valo368b1b02011-11-14 19:31:38 +02001011 ath6kl_dbg(ATH6KL_DBG_BOOT,
1012 "found vif max ie %d\n", ar->vif_max);
1013 break;
Kalle Valo50d41232011-09-07 10:55:17 +03001014 default:
Kalle Valo6bc36432011-09-27 14:31:11 +03001015 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +03001016 le32_to_cpup(&hdr->id));
1017 break;
1018 }
1019
1020 len -= ie_len;
1021 data += ie_len;
1022 };
1023
1024 ret = 0;
1025out:
1026 release_firmware(fw);
1027
1028 return ret;
1029}
1030
Kalle Valo45eaa782012-01-17 20:09:05 +02001031int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
Kalle Valo50d41232011-09-07 10:55:17 +03001032{
1033 int ret;
1034
1035 ret = ath6kl_fetch_board_file(ar);
1036 if (ret)
1037 return ret;
1038
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001039 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
Kalle Valo6bc36432011-09-27 14:31:11 +03001040 if (ret == 0) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001041 ar->fw_api = 3;
1042 goto out;
1043 }
1044
1045 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1046 if (ret == 0) {
1047 ar->fw_api = 2;
1048 goto out;
Kalle Valo6bc36432011-09-27 14:31:11 +03001049 }
Kalle Valo50d41232011-09-07 10:55:17 +03001050
1051 ret = ath6kl_fetch_fw_api1(ar);
1052 if (ret)
1053 return ret;
1054
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001055 ar->fw_api = 1;
1056
1057out:
1058 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
Kalle Valo6bc36432011-09-27 14:31:11 +03001059
Kalle Valo50d41232011-09-07 10:55:17 +03001060 return 0;
1061}
1062
Kalle Valobdcd8172011-07-18 00:22:30 +03001063static int ath6kl_upload_board_file(struct ath6kl *ar)
1064{
1065 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001066 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001067 int ret;
1068
Kalle Valo772c31e2011-09-07 10:55:16 +03001069 if (WARN_ON(ar->fw_board == NULL))
1070 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001071
Kevin Fang31024d92011-07-11 17:14:13 +08001072 /*
1073 * Determine where in Target RAM to write Board Data.
1074 * For AR6004, host determine Target RAM address for
1075 * writing board data.
1076 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001077 if (ar->hw.board_addr != 0) {
1078 board_address = ar->hw.board_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001079 ath6kl_bmi_write(ar,
1080 ath6kl_get_hi_item_addr(ar,
1081 HI_ITEM(hi_board_data)),
1082 (u8 *) &board_address, 4);
1083 } else {
1084 ath6kl_bmi_read(ar,
1085 ath6kl_get_hi_item_addr(ar,
1086 HI_ITEM(hi_board_data)),
1087 (u8 *) &board_address, 4);
1088 }
1089
Kalle Valobdcd8172011-07-18 00:22:30 +03001090 /* determine where in target ram to write extended board data */
1091 ath6kl_bmi_read(ar,
1092 ath6kl_get_hi_item_addr(ar,
1093 HI_ITEM(hi_board_ext_data)),
1094 (u8 *) &board_ext_address, 4);
1095
Kalle Valo50e27402011-11-11 12:18:06 +02001096 if (ar->target_type == TARGET_TYPE_AR6003 &&
1097 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001098 ath6kl_err("Failed to get board file target address.\n");
1099 return -EINVAL;
1100 }
1101
Kevin Fang31024d92011-07-11 17:14:13 +08001102 switch (ar->target_type) {
1103 case TARGET_TYPE_AR6003:
1104 board_data_size = AR6003_BOARD_DATA_SZ;
1105 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1106 break;
1107 case TARGET_TYPE_AR6004:
1108 board_data_size = AR6004_BOARD_DATA_SZ;
1109 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1110 break;
1111 default:
1112 WARN_ON(1);
1113 return -EINVAL;
1114 break;
1115 }
1116
Kalle Valo50e27402011-11-11 12:18:06 +02001117 if (board_ext_address &&
1118 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001119
Kalle Valobdcd8172011-07-18 00:22:30 +03001120 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001121 ath6kl_dbg(ATH6KL_DBG_BOOT,
1122 "writing extended board data to 0x%x (%d B)\n",
1123 board_ext_address, board_ext_data_size);
1124
Kalle Valobdcd8172011-07-18 00:22:30 +03001125 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001126 ar->fw_board + board_data_size,
1127 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001128 if (ret) {
1129 ath6kl_err("Failed to write extended board data: %d\n",
1130 ret);
1131 return ret;
1132 }
1133
1134 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001135 param = (board_ext_data_size << 16) | 1;
1136
Kalle Valobdcd8172011-07-18 00:22:30 +03001137 ath6kl_bmi_write(ar,
1138 ath6kl_get_hi_item_addr(ar,
1139 HI_ITEM(hi_board_ext_data_config)),
1140 (unsigned char *) &param, 4);
1141 }
1142
Kevin Fang31024d92011-07-11 17:14:13 +08001143 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001144 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1145 ret = -EINVAL;
1146 return ret;
1147 }
1148
Kalle Valo6bc36432011-09-27 14:31:11 +03001149 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1150 board_address, board_data_size);
1151
Kalle Valobdcd8172011-07-18 00:22:30 +03001152 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001153 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001154
1155 if (ret) {
1156 ath6kl_err("Board file bmi write failed: %d\n", ret);
1157 return ret;
1158 }
1159
1160 /* record the fact that Board Data IS initialized */
1161 param = 1;
1162 ath6kl_bmi_write(ar,
1163 ath6kl_get_hi_item_addr(ar,
1164 HI_ITEM(hi_board_data_initialized)),
1165 (u8 *)&param, 4);
1166
1167 return ret;
1168}
1169
1170static int ath6kl_upload_otp(struct ath6kl *ar)
1171{
Kalle Valobdcd8172011-07-18 00:22:30 +03001172 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001173 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001174 int ret;
1175
Kalle Valo50e27402011-11-11 12:18:06 +02001176 if (ar->fw_otp == NULL)
1177 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001178
Kalle Valoa01ac412011-09-07 10:55:17 +03001179 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001180
Kalle Valoef548622011-10-01 09:43:09 +03001181 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001182 ar->fw_otp_len);
1183
Kalle Valobdcd8172011-07-18 00:22:30 +03001184 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1185 ar->fw_otp_len);
1186 if (ret) {
1187 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1188 return ret;
1189 }
1190
Kalle Valo639d0b82011-09-12 12:48:09 +03001191 /* read firmware start address */
1192 ret = ath6kl_bmi_read(ar,
1193 ath6kl_get_hi_item_addr(ar,
1194 HI_ITEM(hi_app_start)),
1195 (u8 *) &address, sizeof(address));
1196
1197 if (ret) {
1198 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1199 return ret;
1200 }
1201
Kalle Valobef26a72011-10-12 09:58:28 +03001202 if (ar->hw.app_start_override_addr == 0) {
1203 ar->hw.app_start_override_addr = address;
1204 from_hw = true;
1205 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001206
Kalle Valobef26a72011-10-12 09:58:28 +03001207 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1208 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001209 ar->hw.app_start_override_addr);
1210
Kalle Valobdcd8172011-07-18 00:22:30 +03001211 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001212 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1213 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001214 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001215 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001216
1217 return ret;
1218}
1219
1220static int ath6kl_upload_firmware(struct ath6kl *ar)
1221{
Kalle Valobdcd8172011-07-18 00:22:30 +03001222 u32 address;
1223 int ret;
1224
Kalle Valo772c31e2011-09-07 10:55:16 +03001225 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001226 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001227
Kalle Valoa01ac412011-09-07 10:55:17 +03001228 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001229
Kalle Valoef548622011-10-01 09:43:09 +03001230 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001231 address, ar->fw_len);
1232
Kalle Valobdcd8172011-07-18 00:22:30 +03001233 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1234
1235 if (ret) {
1236 ath6kl_err("Failed to write firmware: %d\n", ret);
1237 return ret;
1238 }
1239
Kevin Fang31024d92011-07-11 17:14:13 +08001240 /*
1241 * Set starting address for firmware
1242 * Don't need to setup app_start override addr on AR6004
1243 */
1244 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001245 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001246 ath6kl_bmi_set_app_start(ar, address);
1247 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001248 return ret;
1249}
1250
1251static int ath6kl_upload_patch(struct ath6kl *ar)
1252{
Kalle Valobdcd8172011-07-18 00:22:30 +03001253 u32 address, param;
1254 int ret;
1255
Kalle Valo50e27402011-11-11 12:18:06 +02001256 if (ar->fw_patch == NULL)
1257 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001258
Kalle Valoa01ac412011-09-07 10:55:17 +03001259 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001260
Kalle Valoef548622011-10-01 09:43:09 +03001261 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001262 address, ar->fw_patch_len);
1263
Kalle Valobdcd8172011-07-18 00:22:30 +03001264 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1265 if (ret) {
1266 ath6kl_err("Failed to write patch file: %d\n", ret);
1267 return ret;
1268 }
1269
1270 param = address;
1271 ath6kl_bmi_write(ar,
1272 ath6kl_get_hi_item_addr(ar,
1273 HI_ITEM(hi_dset_list_head)),
1274 (unsigned char *) &param, 4);
1275
1276 return 0;
1277}
1278
Alex Yangcd23c1c2012-01-17 15:32:29 +02001279static int ath6kl_upload_testscript(struct ath6kl *ar)
1280{
1281 u32 address, param;
1282 int ret;
1283
1284 if (testmode != 2)
1285 return 0;
1286
1287 if (ar->fw_testscript == NULL)
1288 return 0;
1289
1290 address = ar->hw.testscript_addr;
1291
1292 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1293 address, ar->fw_testscript_len);
1294
1295 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1296 ar->fw_testscript_len);
1297 if (ret) {
1298 ath6kl_err("Failed to write testscript file: %d\n", ret);
1299 return ret;
1300 }
1301
1302 param = address;
1303 ath6kl_bmi_write(ar,
1304 ath6kl_get_hi_item_addr(ar,
1305 HI_ITEM(hi_ota_testscript)),
1306 (unsigned char *) &param, 4);
1307
1308 param = 4096;
1309 ath6kl_bmi_write(ar,
1310 ath6kl_get_hi_item_addr(ar,
1311 HI_ITEM(hi_end_ram_reserve_sz)),
1312 (unsigned char *) &param, 4);
1313
1314 param = 1;
1315 ath6kl_bmi_write(ar,
1316 ath6kl_get_hi_item_addr(ar,
1317 HI_ITEM(hi_test_apps_related)),
1318 (unsigned char *) &param, 4);
1319
1320 return 0;
1321}
1322
Kalle Valobdcd8172011-07-18 00:22:30 +03001323static int ath6kl_init_upload(struct ath6kl *ar)
1324{
1325 u32 param, options, sleep, address;
1326 int status = 0;
1327
Kevin Fang31024d92011-07-11 17:14:13 +08001328 if (ar->target_type != TARGET_TYPE_AR6003 &&
1329 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001330 return -EINVAL;
1331
1332 /* temporarily disable system sleep */
1333 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1334 status = ath6kl_bmi_reg_read(ar, address, &param);
1335 if (status)
1336 return status;
1337
1338 options = param;
1339
1340 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1341 status = ath6kl_bmi_reg_write(ar, address, param);
1342 if (status)
1343 return status;
1344
1345 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1346 status = ath6kl_bmi_reg_read(ar, address, &param);
1347 if (status)
1348 return status;
1349
1350 sleep = param;
1351
1352 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1353 status = ath6kl_bmi_reg_write(ar, address, param);
1354 if (status)
1355 return status;
1356
1357 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1358 options, sleep);
1359
1360 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001361 /* no need to control 40/44MHz clock on AR6004 */
1362 if (ar->target_type != TARGET_TYPE_AR6004) {
1363 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1364 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001365
Kevin Fang31024d92011-07-11 17:14:13 +08001366 if (status)
1367 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001368
Kevin Fang31024d92011-07-11 17:14:13 +08001369 /* Run at 80/88MHz by default */
1370 param = SM(CPU_CLOCK_STANDARD, 1);
1371
1372 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1373 status = ath6kl_bmi_reg_write(ar, address, param);
1374 if (status)
1375 return status;
1376 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001377
1378 param = 0;
1379 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1380 param = SM(LPO_CAL_ENABLE, 1);
1381 status = ath6kl_bmi_reg_write(ar, address, param);
1382 if (status)
1383 return status;
1384
1385 /* WAR to avoid SDIO CRC err */
Kalle Valo0d0192ba2011-11-14 19:31:07 +02001386 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001387 ath6kl_err("temporary war to avoid sdio crc error\n");
1388
1389 param = 0x20;
1390
1391 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1392 status = ath6kl_bmi_reg_write(ar, address, param);
1393 if (status)
1394 return status;
1395
1396 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1397 status = ath6kl_bmi_reg_write(ar, address, param);
1398 if (status)
1399 return status;
1400
1401 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1402 status = ath6kl_bmi_reg_write(ar, address, param);
1403 if (status)
1404 return status;
1405
1406 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1407 status = ath6kl_bmi_reg_write(ar, address, param);
1408 if (status)
1409 return status;
1410 }
1411
1412 /* write EEPROM data to Target RAM */
1413 status = ath6kl_upload_board_file(ar);
1414 if (status)
1415 return status;
1416
1417 /* transfer One time Programmable data */
1418 status = ath6kl_upload_otp(ar);
1419 if (status)
1420 return status;
1421
1422 /* Download Target firmware */
1423 status = ath6kl_upload_firmware(ar);
1424 if (status)
1425 return status;
1426
1427 status = ath6kl_upload_patch(ar);
1428 if (status)
1429 return status;
1430
Alex Yangcd23c1c2012-01-17 15:32:29 +02001431 /* Download the test script */
1432 status = ath6kl_upload_testscript(ar);
1433 if (status)
1434 return status;
1435
Kalle Valobdcd8172011-07-18 00:22:30 +03001436 /* Restore system sleep */
1437 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1438 status = ath6kl_bmi_reg_write(ar, address, sleep);
1439 if (status)
1440 return status;
1441
1442 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1443 param = options | 0x20;
1444 status = ath6kl_bmi_reg_write(ar, address, param);
1445 if (status)
1446 return status;
1447
Kalle Valobdcd8172011-07-18 00:22:30 +03001448 return status;
1449}
1450
Kalle Valo45eaa782012-01-17 20:09:05 +02001451int ath6kl_init_hw_params(struct ath6kl *ar)
Kalle Valoa01ac412011-09-07 10:55:17 +03001452{
Kalle Valo856f4b312011-11-14 19:30:29 +02001453 const struct ath6kl_hw *hw;
1454 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001455
Kalle Valo856f4b312011-11-14 19:30:29 +02001456 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1457 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001458
Kalle Valo856f4b312011-11-14 19:30:29 +02001459 if (hw->id == ar->version.target_ver)
1460 break;
1461 }
1462
1463 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001464 ath6kl_err("Unsupported hardware version: 0x%x\n",
1465 ar->version.target_ver);
1466 return -EINVAL;
1467 }
1468
Kalle Valo856f4b312011-11-14 19:30:29 +02001469 ar->hw = *hw;
1470
Kalle Valo6bc36432011-09-27 14:31:11 +03001471 ath6kl_dbg(ATH6KL_DBG_BOOT,
1472 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1473 ar->version.target_ver, ar->target_type,
1474 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1475 ath6kl_dbg(ATH6KL_DBG_BOOT,
1476 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1477 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1478 ar->hw.reserved_ram_size);
Ryan Hsu39586bf2011-12-13 17:11:07 +08001479 ath6kl_dbg(ATH6KL_DBG_BOOT,
1480 "refclk_hz %d uarttx_pin %d",
1481 ar->hw.refclk_hz, ar->hw.uarttx_pin);
Kalle Valo6bc36432011-09-27 14:31:11 +03001482
Kalle Valoa01ac412011-09-07 10:55:17 +03001483 return 0;
1484}
1485
Kalle Valo293badf2011-11-14 19:30:54 +02001486static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1487{
1488 switch (type) {
1489 case ATH6KL_HIF_TYPE_SDIO:
1490 return "sdio";
1491 case ATH6KL_HIF_TYPE_USB:
1492 return "usb";
1493 }
1494
1495 return NULL;
1496}
1497
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001498int ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001499{
1500 long timeleft;
1501 int ret, i;
1502
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001503 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1504
Kalle Valo20459ee2011-10-27 18:48:37 +03001505 ret = ath6kl_hif_power_on(ar);
1506 if (ret)
1507 return ret;
1508
1509 ret = ath6kl_configure_target(ar);
1510 if (ret)
1511 goto err_power_off;
1512
1513 ret = ath6kl_init_upload(ar);
1514 if (ret)
1515 goto err_power_off;
1516
1517 /* Do we need to finish the BMI phase */
1518 /* FIXME: return error from ath6kl_bmi_done() */
1519 if (ath6kl_bmi_done(ar)) {
1520 ret = -EIO;
1521 goto err_power_off;
1522 }
1523
1524 /*
1525 * The reason we have to wait for the target here is that the
1526 * driver layer has to init BMI in order to set the host block
1527 * size.
1528 */
1529 if (ath6kl_htc_wait_target(ar->htc_target)) {
1530 ret = -EIO;
1531 goto err_power_off;
1532 }
1533
1534 if (ath6kl_init_service_ep(ar)) {
1535 ret = -EIO;
1536 goto err_cleanup_scatter;
1537 }
1538
1539 /* setup credit distribution */
1540 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1541
1542 /* start HTC */
1543 ret = ath6kl_htc_start(ar->htc_target);
1544 if (ret) {
1545 /* FIXME: call this */
1546 ath6kl_cookie_cleanup(ar);
1547 goto err_cleanup_scatter;
1548 }
1549
1550 /* Wait for Wmi event to be ready */
1551 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1552 test_bit(WMI_READY,
1553 &ar->flag),
1554 WMI_TIMEOUT);
1555
1556 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1557
Kalle Valo293badf2011-11-14 19:30:54 +02001558
1559 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001560 ath6kl_info("%s %s fw %s api %d%s\n",
Kalle Valo293badf2011-11-14 19:30:54 +02001561 ar->hw.name,
1562 ath6kl_init_get_hif_name(ar->hif_type),
1563 ar->wiphy->fw_version,
Kalle Valo65a8b4c2011-12-16 20:53:41 +02001564 ar->fw_api,
Kalle Valo293badf2011-11-14 19:30:54 +02001565 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1566 }
1567
Kalle Valo20459ee2011-10-27 18:48:37 +03001568 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1569 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1570 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1571 ret = -EIO;
1572 goto err_htc_stop;
1573 }
1574
1575 if (!timeleft || signal_pending(current)) {
1576 ath6kl_err("wmi is not ready or wait was interrupted\n");
1577 ret = -EIO;
1578 goto err_htc_stop;
1579 }
1580
1581 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1582
1583 /* communicate the wmi protocol verision to the target */
1584 /* FIXME: return error */
1585 if ((ath6kl_set_host_app_area(ar)) != 0)
1586 ath6kl_err("unable to set the host app area\n");
1587
Kalle Valo71f96ee2011-11-14 19:31:30 +02001588 for (i = 0; i < ar->vif_max; i++) {
Kalle Valo20459ee2011-10-27 18:48:37 +03001589 ret = ath6kl_target_config_wlan_params(ar, i);
1590 if (ret)
1591 goto err_htc_stop;
1592 }
1593
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001594 ar->state = ATH6KL_STATE_ON;
1595
Kalle Valo20459ee2011-10-27 18:48:37 +03001596 return 0;
1597
1598err_htc_stop:
1599 ath6kl_htc_stop(ar->htc_target);
1600err_cleanup_scatter:
1601 ath6kl_hif_cleanup_scatter(ar);
1602err_power_off:
1603 ath6kl_hif_power_off(ar);
1604
1605 return ret;
1606}
1607
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001608int ath6kl_init_hw_stop(struct ath6kl *ar)
1609{
1610 int ret;
1611
1612 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1613
1614 ath6kl_htc_stop(ar->htc_target);
1615
1616 ath6kl_hif_stop(ar);
1617
1618 ath6kl_bmi_reset(ar);
1619
1620 ret = ath6kl_hif_power_off(ar);
1621 if (ret)
1622 ath6kl_warn("failed to power off hif: %d\n", ret);
1623
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001624 ar->state = ATH6KL_STATE_OFF;
1625
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001626 return 0;
1627}
1628
Kalle Valoc25889e2012-01-17 20:08:27 +02001629/* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301630void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301631{
1632 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1633 bool discon_issued;
1634
1635 netif_stop_queue(vif->ndev);
1636
1637 clear_bit(WLAN_ENABLED, &vif->flags);
1638
1639 if (wmi_ready) {
1640 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1641 test_bit(CONNECT_PEND, &vif->flags);
1642 ath6kl_disconnect(vif);
1643 del_timer(&vif->disconnect_timer);
1644
1645 if (discon_issued)
1646 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1647 (vif->nw_type & AP_NETWORK) ?
1648 bcast_mac : vif->bssid,
1649 0, NULL, 0);
1650 }
1651
1652 if (vif->scan_req) {
1653 cfg80211_scan_done(vif->scan_req, true);
1654 vif->scan_req = NULL;
1655 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301656}
1657
Kalle Valobdcd8172011-07-18 00:22:30 +03001658void ath6kl_stop_txrx(struct ath6kl *ar)
1659{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301660 struct ath6kl_vif *vif, *tmp_vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001661
1662 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1663
1664 if (down_interruptible(&ar->sem)) {
1665 ath6kl_err("down_interruptible failed\n");
1666 return;
1667 }
1668
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301669 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301670 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1671 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301672 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301673 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301674 rtnl_lock();
Kalle Valoc25889e2012-01-17 20:08:27 +02001675 ath6kl_cfg80211_vif_cleanup(vif);
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301676 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301677 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301678 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301679 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001680
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301681 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001682
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301683 /*
1684 * After wmi_shudown all WMI events will be dropped. We
1685 * need to cleanup the buffers allocated in AP mode and
1686 * give disconnect notification to stack, which usually
1687 * happens in the disconnect_event. Simulate the disconnect
1688 * event by calling the function directly. Sometimes
1689 * disconnect_event will be received when the debug logs
1690 * are collected.
1691 */
1692 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001693
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301694 clear_bit(WMI_ENABLED, &ar->flag);
1695 if (ar->htc_target) {
1696 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1697 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001698 }
1699
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301700 /*
1701 * Try to reset the device if we can. The driver may have been
1702 * configure NOT to reset the target during a debug session.
1703 */
1704 ath6kl_dbg(ATH6KL_DBG_TRC,
1705 "attempting to reset target on instance destroy\n");
1706 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001707
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301708 clear_bit(WLAN_ENABLED, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001709}