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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
Harald Freudenbergera3358e32017-02-20 16:09:51 +010065 tristate "Support for s390 cryptographic adapters"
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020066 depends on S390
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020067 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020068 help
Harald Freudenbergera3358e32017-02-20 16:09:51 +010069 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020071 + PCI-X Cryptographic Coprocessor (PCIXCC)
Harald Freudenbergera3358e32017-02-20 16:09:51 +010072 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020075
Harald Freudenberger00fab232018-09-17 16:18:41 +020076config ZCRYPT_MULTIDEVNODES
77 bool "Support for multiple zcrypt device nodes"
78 default y
79 depends on S390
80 depends on ZCRYPT
81 help
82 With this option enabled the zcrypt device driver can
83 provide multiple devices nodes in /dev. Each device
84 node can get customized to limit access and narrow
85 down the use of the available crypto hardware.
86
Harald Freudenbergere80d4af2016-11-02 14:37:20 +010087config PKEY
88 tristate "Kernel API for protected key handling"
89 depends on S390
90 depends on ZCRYPT
91 help
92 With this option enabled the pkey kernel module provides an API
93 for creation and handling of protected keys. Other parts of the
94 kernel or userspace applications may use these functions.
95
96 Select this option if you want to enable the kernel and userspace
97 API for proteced key handling.
98
99 Please note that creation of protected keys from secure keys
100 requires to have at least one CEX card in coprocessor mode
101 available at runtime.
Martin Schwidefsky61d48c22007-05-10 15:46:00 +0200102
Harald Freudenbergerc4684f92017-05-11 17:15:54 +0200103config CRYPTO_PAES_S390
104 tristate "PAES cipher algorithms"
105 depends on S390
106 depends on ZCRYPT
107 depends on PKEY
108 select CRYPTO_ALGAPI
109 select CRYPTO_BLKCIPHER
110 help
111 This is the s390 hardware accelerated implementation of the
112 AES cipher algorithms for use with protected key.
113
114 Select this option if you want to use the paes cipher
115 for example to use protected key encrypted devices.
116
Jan Glauber3f5615e2008-01-26 14:11:07 +0100117config CRYPTO_SHA1_S390
118 tristate "SHA1 digest algorithm"
119 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100120 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +0100121 help
122 This is the s390 hardware accelerated implementation of the
123 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
124
Jan Glauberd393d9b2011-04-19 21:29:19 +0200125 It is available as of z990.
126
Jan Glauber3f5615e2008-01-26 14:11:07 +0100127config CRYPTO_SHA256_S390
128 tristate "SHA256 digest algorithm"
129 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100130 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +0100131 help
132 This is the s390 hardware accelerated implementation of the
133 SHA256 secure hash standard (DFIPS 180-2).
134
Jan Glauberd393d9b2011-04-19 21:29:19 +0200135 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100136
Jan Glauber291dc7c2008-03-06 19:52:00 +0800137config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800138 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800139 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100140 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800141 help
142 This is the s390 hardware accelerated implementation of the
143 SHA512 secure hash standard.
144
Jan Glauberd393d9b2011-04-19 21:29:19 +0200145 It is available as of z10.
Jan Glauber291dc7c2008-03-06 19:52:00 +0800146
Jan Glauber3f5615e2008-01-26 14:11:07 +0100147config CRYPTO_DES_S390
148 tristate "DES and Triple DES cipher algorithms"
149 depends on S390
150 select CRYPTO_ALGAPI
151 select CRYPTO_BLKCIPHER
Heiko Carstens63291d42012-05-09 16:27:35 +0200152 select CRYPTO_DES
Jan Glauber3f5615e2008-01-26 14:11:07 +0100153 help
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000154 This is the s390 hardware accelerated implementation of the
Jan Glauber3f5615e2008-01-26 14:11:07 +0100155 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
156
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000157 As of z990 the ECB and CBC mode are hardware accelerated.
158 As of z196 the CTR mode is hardware accelerated.
159
Jan Glauber3f5615e2008-01-26 14:11:07 +0100160config CRYPTO_AES_S390
161 tristate "AES cipher algorithms"
162 depends on S390
163 select CRYPTO_ALGAPI
164 select CRYPTO_BLKCIPHER
165 help
166 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000167 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100168
Gerald Schaefer99d97222011-04-26 16:12:42 +1000169 As of z9 the ECB and CBC modes are hardware accelerated
170 for 128 bit keys.
171 As of z10 the ECB and CBC modes are hardware accelerated
172 for all AES key sizes.
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000173 As of z196 the CTR mode is hardware accelerated for all AES
174 key sizes and XTS mode is hardware accelerated for 256 and
Gerald Schaefer99d97222011-04-26 16:12:42 +1000175 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100176
177config S390_PRNG
178 tristate "Pseudo random number generator device driver"
179 depends on S390
180 default "m"
181 help
182 Select this option if you want to use the s390 pseudo random number
183 generator. The PRNG is part of the cryptographic processor functions
184 and uses triple-DES to generate secure random numbers like the
Jan Glauberd393d9b2011-04-19 21:29:19 +0200185 ANSI X9.17 standard. User-space programs access the
186 pseudo-random-number device through the char device /dev/prandom.
187
188 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100189
Gerald Schaeferdf1309c2011-04-19 21:29:18 +0200190config CRYPTO_GHASH_S390
191 tristate "GHASH digest algorithm"
192 depends on S390
193 select CRYPTO_HASH
194 help
195 This is the s390 hardware accelerated implementation of the
196 GHASH message digest algorithm for GCM (Galois/Counter Mode).
197
198 It is available as of z196.
199
Hendrik Bruecknerf848dbd2015-04-28 15:52:44 +0200200config CRYPTO_CRC32_S390
201 tristate "CRC-32 algorithms"
202 depends on S390
203 select CRYPTO_HASH
204 select CRC32
205 help
206 Select this option if you want to use hardware accelerated
207 implementations of CRC algorithms. With this option, you
208 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
209 and CRC-32C (Castagnoli).
210
211 It is available with IBM z13 or later.
212
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200213config CRYPTO_DEV_MARVELL_CESA
Boris BREZILLON27b43fd2017-10-11 15:16:19 +0200214 tristate "Marvell's Cryptographic Engine driver"
Boris Brezillonfe55dfd2015-06-22 09:22:14 +0200215 depends on PLAT_ORION || ARCH_MVEBU
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200216 select CRYPTO_AES
217 select CRYPTO_DES
218 select CRYPTO_BLKCIPHER
219 select CRYPTO_HASH
220 select SRAM
221 help
222 This driver allows you to utilize the Cryptographic Engines and
Boris BREZILLON27b43fd2017-10-11 15:16:19 +0200223 Security Accelerator (CESA) which can be found on MVEBU and ORION
224 platforms.
Boris BREZILLONdb509a42015-06-18 15:46:21 +0200225 This driver supports CPU offload through DMA transfers.
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200226
David S. Miller0a625fd22010-05-19 14:14:04 +1000227config CRYPTO_DEV_NIAGARA2
228 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800229 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800230 select CRYPTO_BLKCIPHER
231 select CRYPTO_HASH
LABBE Corentin8054b802015-12-17 13:45:40 +0100232 select CRYPTO_MD5
233 select CRYPTO_SHA1
234 select CRYPTO_SHA256
David S. Miller0a625fd22010-05-19 14:14:04 +1000235 depends on SPARC64
236 help
237 Each core of a Niagara2 processor contains a Stream
238 Processing Unit, which itself contains several cryptographic
239 sub-units. One set provides the Modular Arithmetic Unit,
240 used for SSL offload. The other set provides the Cipher
241 Group, which can perform encryption, decryption, hashing,
242 checksumming, and raw copies.
243
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800244config CRYPTO_DEV_HIFN_795X
245 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800246 select CRYPTO_DES
Herbert Xu653ebd9c2007-11-27 19:48:27 +0800247 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100248 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800249 depends on PCI
Richard Weinberger75b76622011-10-10 12:55:41 +0200250 depends on !ARCH_DMA_ADDR_T_64BIT
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800251 help
252 This option allows you to have support for HIFN 795x crypto adapters.
253
Herbert Xu946fef42008-01-26 09:48:44 +1100254config CRYPTO_DEV_HIFN_795X_RNG
255 bool "HIFN 795x random number generator"
256 depends on CRYPTO_DEV_HIFN_795X
257 help
258 Select this option if you want to enable the random number generator
259 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800260
Masahiro Yamada8636a1f2018-12-11 20:01:04 +0900261source "drivers/crypto/caam/Kconfig"
Kim Phillips8e8ec592011-03-13 16:54:26 +0800262
Kim Phillips9c4a7962008-06-23 19:50:15 +0800263config CRYPTO_DEV_TALITOS
264 tristate "Talitos Freescale Security Engine (SEC)"
Herbert Xu596103c2015-06-17 14:58:24 +0800265 select CRYPTO_AEAD
Kim Phillips9c4a7962008-06-23 19:50:15 +0800266 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800267 select CRYPTO_BLKCIPHER
268 select CRYPTO_HASH
Kim Phillips9c4a7962008-06-23 19:50:15 +0800269 select HW_RANDOM
270 depends on FSL_SOC
271 help
272 Say 'Y' here to use the Freescale Security Engine (SEC)
273 to offload cryptographic algorithm computation.
274
275 The Freescale SEC is present on PowerQUICC 'E' processors, such
276 as the MPC8349E and MPC8548E.
277
278 To compile this driver as a module, choose M here: the module
279 will be called talitos.
280
LEROY Christophe5b841a62015-04-17 16:32:03 +0200281config CRYPTO_DEV_TALITOS1
282 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
283 depends on CRYPTO_DEV_TALITOS
284 depends on PPC_8xx || PPC_82xx
285 default y
286 help
287 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
288 found on MPC82xx or the Freescale Security Engine (SEC Lite)
289 version 1.2 found on MPC8xx
290
291config CRYPTO_DEV_TALITOS2
292 bool "SEC2+ (SEC version 2.0 or upper)"
293 depends on CRYPTO_DEV_TALITOS
294 default y if !PPC_8xx
295 help
296 Say 'Y' here to use the Freescale Security Engine (SEC)
297 version 2 and following as found on MPC83xx, MPC85xx, etc ...
298
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800299config CRYPTO_DEV_IXP4XX
300 tristate "Driver for IXP4xx crypto hardware acceleration"
Krzysztof Hałasa9665c522010-03-25 23:56:05 +0100301 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800302 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800303 select CRYPTO_AEAD
Imre Kaloz090657e2008-07-13 20:12:11 +0800304 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800305 select CRYPTO_BLKCIPHER
306 help
307 Driver for the IXP4xx NPE crypto engine.
308
James Hsiao049359d2009-02-05 16:18:13 +1100309config CRYPTO_DEV_PPC4XX
310 tristate "Driver AMCC PPC4xx crypto accelerator"
311 depends on PPC && 4xx
312 select CRYPTO_HASH
Christian Lampartera0aae822017-10-04 01:00:15 +0200313 select CRYPTO_AEAD
314 select CRYPTO_AES
315 select CRYPTO_CCM
Christian Lamparter98e87e32018-04-19 18:41:54 +0200316 select CRYPTO_CTR
Christian Lampartera0aae822017-10-04 01:00:15 +0200317 select CRYPTO_GCM
James Hsiao049359d2009-02-05 16:18:13 +1100318 select CRYPTO_BLKCIPHER
319 help
320 This option allows you to have support for AMCC crypto acceleration.
321
Christian Lamparter5343e672016-04-18 12:57:41 +0200322config HW_RANDOM_PPC4XX
323 bool "PowerPC 4xx generic true random number generator support"
324 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
325 default y
326 ---help---
327 This option provides the kernel-side support for the TRNG hardware
328 found in the security function of some PowerPC 4xx SoCs.
329
Tero Kristo74ed87e2017-05-24 10:35:26 +0300330config CRYPTO_DEV_OMAP
331 tristate "Support for OMAP crypto HW accelerators"
332 depends on ARCH_OMAP2PLUS
333 help
334 OMAP processors have various crypto HW accelerators. Select this if
335 you want to use the OMAP modules for any of the crypto algorithms.
336
337if CRYPTO_DEV_OMAP
338
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800339config CRYPTO_DEV_OMAP_SHAM
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530340 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
341 depends on ARCH_OMAP2PLUS
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800342 select CRYPTO_SHA1
343 select CRYPTO_MD5
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530344 select CRYPTO_SHA256
345 select CRYPTO_SHA512
346 select CRYPTO_HMAC
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800347 help
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530348 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
349 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800350
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800351config CRYPTO_DEV_OMAP_AES
352 tristate "Support for OMAP AES hw engine"
Joel Fernandes1bbf6432013-08-17 21:42:35 -0500353 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800354 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800355 select CRYPTO_BLKCIPHER
Baolin Wang05299002016-01-26 20:25:40 +0800356 select CRYPTO_ENGINE
Lokesh Vutla9fcb1912016-08-04 13:28:44 +0300357 select CRYPTO_CBC
358 select CRYPTO_ECB
359 select CRYPTO_CTR
Tero Kristoad18cc92017-05-24 10:35:31 +0300360 select CRYPTO_AEAD
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800361 help
362 OMAP processors have AES module accelerator. Select this if you
363 want to use the OMAP module for AES algorithms.
364
Joel Fernandes701d0f12014-02-14 10:49:47 -0600365config CRYPTO_DEV_OMAP_DES
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100366 tristate "Support for OMAP DES/3DES hw engine"
Joel Fernandes701d0f12014-02-14 10:49:47 -0600367 depends on ARCH_OMAP2PLUS
368 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800369 select CRYPTO_BLKCIPHER
Baolin Wangf1b77aa2016-04-28 14:11:51 +0800370 select CRYPTO_ENGINE
Joel Fernandes701d0f12014-02-14 10:49:47 -0600371 help
372 OMAP processors have DES/3DES module accelerator. Select this if you
373 want to use the OMAP module for DES and 3DES algorithms. Currently
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100374 the ECB and CBC modes of operation are supported by the driver. Also
375 accesses made on unaligned boundaries are supported.
Joel Fernandes701d0f12014-02-14 10:49:47 -0600376
Tero Kristo74ed87e2017-05-24 10:35:26 +0300377endif # CRYPTO_DEV_OMAP
378
Jamie Ilesce921362011-02-21 16:43:21 +1100379config CRYPTO_DEV_PICOXCELL
380 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
Javier Martinez Canillas4f44d862017-01-02 14:06:57 -0300381 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
Herbert Xu596103c2015-06-17 14:58:24 +0800382 select CRYPTO_AEAD
Jamie Ilesce921362011-02-21 16:43:21 +1100383 select CRYPTO_AES
384 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800385 select CRYPTO_BLKCIPHER
Jamie Ilesce921362011-02-21 16:43:21 +1100386 select CRYPTO_DES
387 select CRYPTO_CBC
388 select CRYPTO_ECB
389 select CRYPTO_SEQIV
390 help
391 This option enables support for the hardware offload engines in the
392 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
393 and for 3gpp Layer 2 ciphering support.
394
395 Saying m here will build a module named pipcoxcell_crypto.
396
Javier Martin5de88752013-03-01 12:37:53 +0100397config CRYPTO_DEV_SAHARA
398 tristate "Support for SAHARA crypto accelerator"
Paul Bolle74d24d82013-05-12 13:57:19 +0200399 depends on ARCH_MXC && OF
Javier Martin5de88752013-03-01 12:37:53 +0100400 select CRYPTO_BLKCIPHER
401 select CRYPTO_AES
402 select CRYPTO_ECB
403 help
404 This option enables support for the SAHARA HW crypto accelerator
405 found in some Freescale i.MX chips.
406
Krzysztof Kozlowskic46ea132017-04-11 20:08:35 +0200407config CRYPTO_DEV_EXYNOS_RNG
408 tristate "EXYNOS HW pseudo random number generator support"
409 depends on ARCH_EXYNOS || COMPILE_TEST
410 depends on HAS_IOMEM
411 select CRYPTO_RNG
412 ---help---
413 This driver provides kernel-side support through the
414 cryptographic API for the pseudo random number generator hardware
415 found on Exynos SoCs.
416
417 To compile this driver as a module, choose M here: the
418 module will be called exynos-rng.
419
420 If unsure, say Y.
421
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800422config CRYPTO_DEV_S5P
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800423 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
Krzysztof Kozlowskidc1d9de2016-03-14 13:20:18 +0900424 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
Geert Uytterhoevenee1b23d2018-04-17 19:49:03 +0200425 depends on HAS_IOMEM
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800426 select CRYPTO_AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800427 select CRYPTO_BLKCIPHER
428 help
429 This option allows you to have support for S5P crypto acceleration.
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800430 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800431 algorithms execution.
432
Kamil Koniecznyc2afad62017-10-25 17:27:35 +0200433config CRYPTO_DEV_EXYNOS_HASH
434 bool "Support for Samsung Exynos HASH accelerator"
435 depends on CRYPTO_DEV_S5P
436 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m
437 select CRYPTO_SHA1
438 select CRYPTO_MD5
439 select CRYPTO_SHA256
440 help
441 Select this to offload Exynos from HASH MD5/SHA1/SHA256.
442 This will select software SHA1, MD5 and SHA256 as they are
443 needed for small and zero-size messages.
444 HASH algorithms will be disabled if EXYNOS_RNG
445 is enabled due to hw conflict.
446
Kent Yoderaef7b312012-04-12 05:39:26 +0000447config CRYPTO_DEV_NX
Dan Streetman7011a122015-05-07 13:49:17 -0400448 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
449 depends on PPC64
Kent Yoderaef7b312012-04-12 05:39:26 +0000450 help
Dan Streetman7011a122015-05-07 13:49:17 -0400451 This enables support for the NX hardware cryptographic accelerator
452 coprocessor that is in IBM PowerPC P7+ or later processors. This
453 does not actually enable any drivers, it only allows you to select
454 which acceleration type (encryption and/or compression) to enable.
Seth Jennings322cacc2012-07-19 09:42:38 -0500455
456if CRYPTO_DEV_NX
457 source "drivers/crypto/nx/Kconfig"
458endif
Kent Yoderaef7b312012-04-12 05:39:26 +0000459
Andreas Westin2789c082012-04-30 10:11:17 +0200460config CRYPTO_DEV_UX500
461 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
462 depends on ARCH_U8500
Andreas Westin2789c082012-04-30 10:11:17 +0200463 help
464 Driver for ST-Ericsson UX500 crypto engine.
465
466if CRYPTO_DEV_UX500
467 source "drivers/crypto/ux500/Kconfig"
468endif # if CRYPTO_DEV_UX500
469
Cyrille Pitchen89a82ef2017-01-26 17:07:56 +0100470config CRYPTO_DEV_ATMEL_AUTHENC
471 tristate "Support for Atmel IPSEC/SSL hw accelerator"
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100472 depends on ARCH_AT91 || COMPILE_TEST
Cyrille Pitchen89a82ef2017-01-26 17:07:56 +0100473 select CRYPTO_AUTHENC
474 select CRYPTO_DEV_ATMEL_AES
475 select CRYPTO_DEV_ATMEL_SHA
476 help
477 Some Atmel processors can combine the AES and SHA hw accelerators
478 to enhance support of IPSEC/SSL.
479 Select this if you want to use the Atmel modules for
480 authenc(hmac(shaX),Y(cbc)) algorithms.
481
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200482config CRYPTO_DEV_ATMEL_AES
483 tristate "Support for Atmel AES hw accelerator"
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100484 depends on ARCH_AT91 || COMPILE_TEST
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200485 select CRYPTO_AES
Cyrille Pitchend4419542015-12-17 18:13:07 +0100486 select CRYPTO_AEAD
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200487 select CRYPTO_BLKCIPHER
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200488 help
489 Some Atmel processors have AES hw accelerator.
490 Select this if you want to use the Atmel module for
491 AES algorithms.
492
493 To compile this driver as a module, choose M here: the module
494 will be called atmel-aes.
495
Nicolas Royer13802002012-07-01 19:19:45 +0200496config CRYPTO_DEV_ATMEL_TDES
497 tristate "Support for Atmel DES/TDES hw accelerator"
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100498 depends on ARCH_AT91 || COMPILE_TEST
Nicolas Royer13802002012-07-01 19:19:45 +0200499 select CRYPTO_DES
Nicolas Royer13802002012-07-01 19:19:45 +0200500 select CRYPTO_BLKCIPHER
501 help
502 Some Atmel processors have DES/TDES hw accelerator.
503 Select this if you want to use the Atmel module for
504 DES/TDES algorithms.
505
506 To compile this driver as a module, choose M here: the module
507 will be called atmel-tdes.
508
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200509config CRYPTO_DEV_ATMEL_SHA
Nicolas Royerd4905b32013-02-20 17:10:26 +0100510 tristate "Support for Atmel SHA hw accelerator"
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100511 depends on ARCH_AT91 || COMPILE_TEST
Herbert Xu596103c2015-06-17 14:58:24 +0800512 select CRYPTO_HASH
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200513 help
Nicolas Royerd4905b32013-02-20 17:10:26 +0100514 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
515 hw accelerator.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200516 Select this if you want to use the Atmel module for
Nicolas Royerd4905b32013-02-20 17:10:26 +0100517 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200518
519 To compile this driver as a module, choose M here: the module
520 will be called atmel-sha.
521
Ard Biesheuvelc34a3202019-05-24 18:26:48 +0200522config CRYPTO_DEV_ATMEL_I2C
523 tristate
524
Tudor-Dan Ambarus11105692017-07-05 13:07:59 +0300525config CRYPTO_DEV_ATMEL_ECC
526 tristate "Support for Microchip / Atmel ECC hw accelerator"
Tudor-Dan Ambarus11105692017-07-05 13:07:59 +0300527 depends on I2C
Ard Biesheuvelc34a3202019-05-24 18:26:48 +0200528 select CRYPTO_DEV_ATMEL_I2C
Tudor-Dan Ambarus11105692017-07-05 13:07:59 +0300529 select CRYPTO_ECDH
530 select CRC16
531 help
532 Microhip / Atmel ECC hw accelerator.
533 Select this if you want to use the Microchip / Atmel module for
534 ECDH algorithm.
535
536 To compile this driver as a module, choose M here: the module
537 will be called atmel-ecc.
538
Ard Biesheuvelda001fb2019-05-24 18:26:49 +0200539config CRYPTO_DEV_ATMEL_SHA204A
540 tristate "Support for Microchip / Atmel SHA accelerator and RNG"
541 depends on I2C
542 select CRYPTO_DEV_ATMEL_I2C
543 select HW_RANDOM
YueHaibing4bb02db2019-05-31 20:17:49 +0800544 select CRC16
Ard Biesheuvelda001fb2019-05-24 18:26:49 +0200545 help
546 Microhip / Atmel SHA accelerator and RNG.
547 Select this if you want to use the Microchip / Atmel SHA204A
548 module as a random number generator. (Other functions of the
549 chip are currently not exposed by this driver)
550
551 To compile this driver as a module, choose M here: the module
552 will be called atmel-sha204a.
553
Tom Lendackyf1147662013-11-12 11:46:51 -0600554config CRYPTO_DEV_CCP
Brijesh Singh720419f2017-07-06 09:59:14 -0500555 bool "Support for AMD Secure Processor"
Tom Lendacky6c506342015-02-03 13:07:29 -0600556 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
Tom Lendackyf1147662013-11-12 11:46:51 -0600557 help
Brijesh Singh720419f2017-07-06 09:59:14 -0500558 The AMD Secure Processor provides support for the Cryptographic Coprocessor
559 (CCP) and the Platform Security Processor (PSP) devices.
Tom Lendackyf1147662013-11-12 11:46:51 -0600560
561if CRYPTO_DEV_CCP
562 source "drivers/crypto/ccp/Kconfig"
563endif
564
Marek Vasut15b59e72013-12-10 20:26:21 +0100565config CRYPTO_DEV_MXS_DCP
566 tristate "Support for Freescale MXS DCP"
Fabio Estevama2712e62015-09-02 12:05:18 -0300567 depends on (ARCH_MXS || ARCH_MXC)
Arnd Bergmanndc97fa02015-10-12 15:52:34 +0200568 select STMP_DEVICE
Marek Vasut15b59e72013-12-10 20:26:21 +0100569 select CRYPTO_CBC
570 select CRYPTO_ECB
571 select CRYPTO_AES
572 select CRYPTO_BLKCIPHER
Herbert Xu596103c2015-06-17 14:58:24 +0800573 select CRYPTO_HASH
Marek Vasut15b59e72013-12-10 20:26:21 +0100574 help
575 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
576 co-processor on the die.
577
578 To compile this driver as a module, choose M here: the module
579 will be called mxs-dcp.
580
Tadeusz Strukcea40012014-06-05 13:44:39 -0700581source "drivers/crypto/qat/Kconfig"
George Cherian62ad8b52017-02-07 14:51:15 +0000582source "drivers/crypto/cavium/cpt/Kconfig"
Srikanth Jampala14fa93c2017-05-30 17:28:01 +0530583source "drivers/crypto/cavium/nitrox/Kconfig"
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300584
Mahipal Challa640035a2017-02-15 10:45:08 +0530585config CRYPTO_DEV_CAVIUM_ZIP
586 tristate "Cavium ZIP driver"
587 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
588 ---help---
589 Select this option if you want to enable compression/decompression
590 acceleration on Cavium's ARM based SoCs
591
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300592config CRYPTO_DEV_QCE
593 tristate "Qualcomm crypto engine accelerator"
Geert Uytterhoevenee1b23d2018-04-17 19:49:03 +0200594 depends on ARCH_QCOM || COMPILE_TEST
595 depends on HAS_IOMEM
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300596 select CRYPTO_AES
597 select CRYPTO_DES
598 select CRYPTO_ECB
599 select CRYPTO_CBC
600 select CRYPTO_XTS
601 select CRYPTO_CTR
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300602 select CRYPTO_BLKCIPHER
603 help
604 This driver supports Qualcomm crypto engine accelerator
605 hardware. To compile this driver as a module, choose M here. The
606 module will be called qcrypto.
607
Vinod Koulceec5f52018-07-16 11:20:24 +0530608config CRYPTO_DEV_QCOM_RNG
609 tristate "Qualcomm Random Number Generator Driver"
610 depends on ARCH_QCOM || COMPILE_TEST
611 select CRYPTO_RNG
612 help
613 This driver provides support for the Random Number
614 Generator hardware found on Qualcomm SoCs.
615
616 To compile this driver as a module, choose M here. The
617 module will be called qcom-rng. If unsure, say N.
618
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200619config CRYPTO_DEV_VMX
620 bool "Support for VMX cryptographic acceleration instructions"
Michael Ellermanf1ab4282015-09-09 18:22:35 +1000621 depends on PPC64 && VSX
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200622 help
623 Support for VMX cryptographic acceleration instructions.
624
625source "drivers/crypto/vmx/Kconfig"
626
James Hartleyd358f1a2015-03-12 23:17:26 +0000627config CRYPTO_DEV_IMGTEC_HASH
James Hartleyd358f1a2015-03-12 23:17:26 +0000628 tristate "Imagination Technologies hardware hash accelerator"
Geert Uytterhoeven8c98ebd2015-04-23 20:03:58 +0200629 depends on MIPS || COMPILE_TEST
James Hartleyd358f1a2015-03-12 23:17:26 +0000630 select CRYPTO_MD5
631 select CRYPTO_SHA1
James Hartleyd358f1a2015-03-12 23:17:26 +0000632 select CRYPTO_SHA256
633 select CRYPTO_HASH
634 help
635 This driver interfaces with the Imagination Technologies
636 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
637 hashing algorithms.
638
LABBE Corentin6298e942015-07-17 16:39:41 +0200639config CRYPTO_DEV_SUN4I_SS
640 tristate "Support for Allwinner Security System cryptographic accelerator"
Andre Przywaraf823ab92016-02-01 17:39:21 +0000641 depends on ARCH_SUNXI && !64BIT
LABBE Corentin6298e942015-07-17 16:39:41 +0200642 select CRYPTO_MD5
643 select CRYPTO_SHA1
644 select CRYPTO_AES
645 select CRYPTO_DES
646 select CRYPTO_BLKCIPHER
647 help
648 Some Allwinner SoC have a crypto accelerator named
649 Security System. Select this if you want to use it.
650 The Security System handle AES/DES/3DES ciphers in CBC mode
651 and SHA1 and MD5 hash algorithms.
652
653 To compile this driver as a module, choose M here: the module
654 will be called sun4i-ss.
655
Corentin LABBEb8ae5c72017-07-03 20:48:48 +0200656config CRYPTO_DEV_SUN4I_SS_PRNG
657 bool "Support for Allwinner Security System PRNG"
658 depends on CRYPTO_DEV_SUN4I_SS
659 select CRYPTO_RNG
660 help
661 Select this option if you want to provide kernel-side support for
662 the Pseudo-Random Number Generator found in the Security System.
663
Zain Wang433cd2c2015-11-25 13:43:32 +0800664config CRYPTO_DEV_ROCKCHIP
665 tristate "Rockchip's Cryptographic Engine driver"
666 depends on OF && ARCH_ROCKCHIP
667 select CRYPTO_AES
668 select CRYPTO_DES
Zain Wangbfd927f2016-02-16 10:15:01 +0800669 select CRYPTO_MD5
670 select CRYPTO_SHA1
671 select CRYPTO_SHA256
672 select CRYPTO_HASH
Zain Wang433cd2c2015-11-25 13:43:32 +0800673 select CRYPTO_BLKCIPHER
674
675 help
676 This driver interfaces with the hardware crypto accelerator.
677 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
678
Ryder Lee785e5c62016-12-19 10:20:44 +0800679config CRYPTO_DEV_MEDIATEK
680 tristate "MediaTek's EIP97 Cryptographic Engine driver"
Arnd Bergmann7dee9f62017-01-11 14:50:19 +0100681 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
Ryder Lee785e5c62016-12-19 10:20:44 +0800682 select CRYPTO_AES
Ryder Leed03f7b02017-01-20 13:41:15 +0800683 select CRYPTO_AEAD
Ryder Lee785e5c62016-12-19 10:20:44 +0800684 select CRYPTO_BLKCIPHER
Ryder Leed03f7b02017-01-20 13:41:15 +0800685 select CRYPTO_CTR
Arnd Bergmann7dee9f62017-01-11 14:50:19 +0100686 select CRYPTO_SHA1
687 select CRYPTO_SHA256
688 select CRYPTO_SHA512
Ryder Lee785e5c62016-12-19 10:20:44 +0800689 select CRYPTO_HMAC
690 help
691 This driver allows you to utilize the hardware crypto accelerator
692 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
693 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
694
Hariprasad Shenai02038fd2016-08-17 12:33:06 +0530695source "drivers/crypto/chelsio/Kconfig"
696
Gongleidbaf0622016-12-15 10:03:16 +0800697source "drivers/crypto/virtio/Kconfig"
698
Rob Rice9d12ba82017-02-03 12:55:33 -0500699config CRYPTO_DEV_BCM_SPU
700 tristate "Broadcom symmetric crypto/hash acceleration support"
701 depends on ARCH_BCM_IPROC
raveendra padasalagiefc856e2017-07-11 15:50:06 +0530702 depends on MAILBOX
Rob Rice9d12ba82017-02-03 12:55:33 -0500703 default m
Eric Biggersab57b332018-12-16 23:23:23 -0800704 select CRYPTO_AUTHENC
Rob Rice9d12ba82017-02-03 12:55:33 -0500705 select CRYPTO_DES
706 select CRYPTO_MD5
707 select CRYPTO_SHA1
708 select CRYPTO_SHA256
709 select CRYPTO_SHA512
710 help
711 This driver provides support for Broadcom crypto acceleration using the
712 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
713 ahash, and aead algorithms with the kernel cryptographic API.
714
Fabien DESSENNEb51dbe92017-03-21 16:13:28 +0100715source "drivers/crypto/stm32/Kconfig"
716
Antoine Ténart1b44c5a2017-05-24 16:10:34 +0200717config CRYPTO_DEV_SAFEXCEL
718 tristate "Inside Secure's SafeXcel cryptographic engine driver"
Geert Uytterhoevenee1b23d2018-04-17 19:49:03 +0200719 depends on OF
Antoine Ténart1b44c5a2017-05-24 16:10:34 +0200720 depends on (ARM64 && ARCH_MVEBU) || (COMPILE_TEST && 64BIT)
721 select CRYPTO_AES
Antoine Tenartf6beaea2018-05-14 15:11:02 +0200722 select CRYPTO_AUTHENC
Antoine Ténart1b44c5a2017-05-24 16:10:34 +0200723 select CRYPTO_BLKCIPHER
Ofer Heifetza7dea8c2018-06-28 17:21:55 +0200724 select CRYPTO_DES
Antoine Ténart1b44c5a2017-05-24 16:10:34 +0200725 select CRYPTO_HASH
726 select CRYPTO_HMAC
Ofer Heifetz293f89c2018-06-28 17:21:53 +0200727 select CRYPTO_MD5
Antoine Ténart1b44c5a2017-05-24 16:10:34 +0200728 select CRYPTO_SHA1
729 select CRYPTO_SHA256
730 select CRYPTO_SHA512
731 help
732 This driver interfaces with the SafeXcel EIP-197 cryptographic engine
733 designed by Inside Secure. Select this if you want to use CBC/ECB
734 chain mode, AES cipher mode and SHA1/SHA224/SHA256/SHA512 hash
735 algorithms.
736
Lars Perssona21eb942017-08-10 14:53:53 +0200737config CRYPTO_DEV_ARTPEC6
738 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
739 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST)
Lars Perssona21eb942017-08-10 14:53:53 +0200740 depends on OF
741 select CRYPTO_AEAD
742 select CRYPTO_AES
743 select CRYPTO_ALGAPI
744 select CRYPTO_BLKCIPHER
745 select CRYPTO_CTR
746 select CRYPTO_HASH
747 select CRYPTO_SHA1
748 select CRYPTO_SHA256
Lars Perssona21eb942017-08-10 14:53:53 +0200749 select CRYPTO_SHA512
750 help
751 Enables the driver for the on-chip crypto accelerator
752 of Axis ARTPEC SoCs.
753
754 To compile this driver as a module, choose M here.
755
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +0000756config CRYPTO_DEV_CCREE
757 tristate "Support for ARM TrustZone CryptoCell family of security processors"
758 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA
759 default n
760 select CRYPTO_HASH
761 select CRYPTO_BLKCIPHER
762 select CRYPTO_DES
763 select CRYPTO_AEAD
764 select CRYPTO_AUTHENC
765 select CRYPTO_SHA1
766 select CRYPTO_MD5
767 select CRYPTO_SHA256
768 select CRYPTO_SHA512
769 select CRYPTO_HMAC
770 select CRYPTO_AES
771 select CRYPTO_CBC
772 select CRYPTO_ECB
773 select CRYPTO_CTR
774 select CRYPTO_XTS
Gilad Ben-Yossef9b8d51f2018-10-29 09:50:14 +0000775 select CRYPTO_SM4
Yael Chemla927574e2018-10-18 13:59:59 +0100776 select CRYPTO_SM3
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +0000777 help
Gilad Ben-Yossef27b3b222018-02-19 14:51:23 +0000778 Say 'Y' to enable a driver for the REE interface of the Arm
779 TrustZone CryptoCell family of processors. Currently the
Gilad Ben-Yossef1c876a92018-11-13 09:40:35 +0000780 CryptoCell 713, 703, 712, 710 and 630 are supported.
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +0000781 Choose this if you wish to use hardware acceleration of
782 cryptographic operations on the system REE.
783 If unsure say Y.
784
Jonathan Cameron915e4e82018-07-23 16:49:54 +0100785source "drivers/crypto/hisilicon/Kconfig"
786
Jan Engelhardtb5114312007-07-15 23:39:36 -0700787endif # CRYPTO_HW