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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Raed Salem16f1c5b2017-07-30 11:02:51 +0300330 u8 log_max_flow_counter[0x8];
331 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 log_max_flow[0x8];
333
Matan Barakb4ff3a32016-02-09 14:57:42 +0200334 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335
336 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
337
338 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
339};
340
341struct mlx5_ifc_odp_per_transport_service_cap_bits {
342 u8 send[0x1];
343 u8 receive[0x1];
344 u8 write[0x1];
345 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200346 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300347 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300349};
350
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200351struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353
354 u8 ipv4[0x20];
355};
356
357struct mlx5_ifc_ipv6_layout_bits {
358 u8 ipv6[16][0x8];
359};
360
361union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
362 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
363 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200364 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200365};
366
Saeed Mahameede2816822015-05-28 22:28:40 +0300367struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
368 u8 smac_47_16[0x20];
369
370 u8 smac_15_0[0x10];
371 u8 ethertype[0x10];
372
373 u8 dmac_47_16[0x20];
374
375 u8 dmac_15_0[0x10];
376 u8 first_prio[0x3];
377 u8 first_cfi[0x1];
378 u8 first_vid[0xc];
379
380 u8 ip_protocol[0x8];
381 u8 ip_dscp[0x6];
382 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300383 u8 cvlan_tag[0x1];
384 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300385 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300386 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300387 u8 tcp_flags[0x9];
388
389 u8 tcp_sport[0x10];
390 u8 tcp_dport[0x10];
391
Or Gerlitza8ade552017-06-07 17:49:56 +0300392 u8 reserved_at_c0[0x18];
393 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300394
395 u8 udp_sport[0x10];
396 u8 udp_dport[0x10];
397
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200398 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300399
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200400 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300401};
402
403struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300404 u8 reserved_at_0[0x8];
405 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406
Matan Barakb4ff3a32016-02-09 14:57:42 +0200407 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300408 u8 source_port[0x10];
409
410 u8 outer_second_prio[0x3];
411 u8 outer_second_cfi[0x1];
412 u8 outer_second_vid[0xc];
413 u8 inner_second_prio[0x3];
414 u8 inner_second_cfi[0x1];
415 u8 inner_second_vid[0xc];
416
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300417 u8 outer_second_cvlan_tag[0x1];
418 u8 inner_second_cvlan_tag[0x1];
419 u8 outer_second_svlan_tag[0x1];
420 u8 inner_second_svlan_tag[0x1];
421 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300422 u8 gre_protocol[0x10];
423
424 u8 gre_key_h[0x18];
425 u8 gre_key_l[0x8];
426
427 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429
Matan Barakb4ff3a32016-02-09 14:57:42 +0200430 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300431
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433 u8 outer_ipv6_flow_label[0x14];
434
Matan Barakb4ff3a32016-02-09 14:57:42 +0200435 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300436 u8 inner_ipv6_flow_label[0x14];
437
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300438 u8 reserved_at_120[0x28];
439 u8 bth_dst_qp[0x18];
440 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300441};
442
443struct mlx5_ifc_cmd_pas_bits {
444 u8 pa_h[0x20];
445
446 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448};
449
450struct mlx5_ifc_uint64_bits {
451 u8 hi[0x20];
452
453 u8 lo[0x20];
454};
455
456enum {
457 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
458 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
459 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
460 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
461 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
462 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
463 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
464 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
465 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
466 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
467};
468
469struct mlx5_ifc_ads_bits {
470 u8 fl[0x1];
471 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 pkey_index[0x10];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 grh[0x1];
477 u8 mlid[0x7];
478 u8 rlid[0x10];
479
480 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 stat_rate[0x4];
485 u8 hop_limit[0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 tclass[0x8];
489 u8 flow_label[0x14];
490
491 u8 rgid_rip[16][0x8];
492
Matan Barakb4ff3a32016-02-09 14:57:42 +0200493 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300494 u8 f_dscp[0x1];
495 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200496 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300497 u8 f_eth_prio[0x1];
498 u8 ecn[0x2];
499 u8 dscp[0x6];
500 u8 udp_sport[0x10];
501
502 u8 dei_cfi[0x1];
503 u8 eth_prio[0x3];
504 u8 sl[0x4];
505 u8 port[0x8];
506 u8 rmac_47_32[0x10];
507
508 u8 rmac_31_0[0x20];
509};
510
511struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200512 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300513 u8 nic_rx_multi_path_tirs_fts[0x1];
514 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
515 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
522
523 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
524
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526
527 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530};
531
Saeed Mahameed495716b2015-12-01 18:03:19 +0200532struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
536
537 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
538
539 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
540
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542};
543
Saeed Mahameedd6666752015-12-01 18:03:22 +0200544struct mlx5_ifc_e_switch_cap_bits {
545 u8 vport_svlan_strip[0x1];
546 u8 vport_cvlan_strip[0x1];
547 u8 vport_svlan_insert[0x1];
548 u8 vport_cvlan_insert_if_not_exist[0x1];
549 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300550 u8 reserved_at_5[0x19];
551 u8 nic_vport_node_guid_modify[0x1];
552 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200553
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300554 u8 vxlan_encap_decap[0x1];
555 u8 nvgre_encap_decap[0x1];
556 u8 reserved_at_22[0x9];
557 u8 log_max_encap_headers[0x5];
558 u8 reserved_2b[0x6];
559 u8 max_encap_header_size[0xa];
560
561 u8 reserved_40[0x7c0];
562
Saeed Mahameedd6666752015-12-01 18:03:22 +0200563};
564
Saeed Mahameed74862162016-06-09 15:11:34 +0300565struct mlx5_ifc_qos_cap_bits {
566 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300567 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200568 u8 esw_bw_share[0x1];
569 u8 esw_rate_limit[0x1];
570 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_20[0x20];
573
Saeed Mahameed74862162016-06-09 15:11:34 +0300574 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575
Saeed Mahameed74862162016-06-09 15:11:34 +0300576 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300577
578 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300579 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300580
581 u8 esw_element_type[0x10];
582 u8 esw_tsar_type[0x10];
583
584 u8 reserved_at_c0[0x10];
585 u8 max_qos_para_vport[0x10];
586
587 u8 max_tsar_bw_share[0x20];
588
589 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300590};
591
Saeed Mahameede2816822015-05-28 22:28:40 +0300592struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
593 u8 csum_cap[0x1];
594 u8 vlan_cap[0x1];
595 u8 lro_cap[0x1];
596 u8 lro_psh_flag[0x1];
597 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200598 u8 reserved_at_5[0x2];
599 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200600 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200603 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300604 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300606 u8 reg_umr_sq[0x1];
607 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300608 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300611 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612 u8 tunnel_stateless_vxlan[0x1];
613
Ilan Tayari547eede2017-04-18 16:04:28 +0300614 u8 swp[0x1];
615 u8 swp_csum[0x1];
616 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300617 u8 reserved_at_23[0x1b];
618 u8 max_geneve_opt_len[0x1];
619 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622 u8 lro_min_mss_size[0x10];
623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625
626 u8 lro_timer_supported_periods[4][0x20];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629};
630
631struct mlx5_ifc_roce_cap_bits {
632 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200633 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300634
Matan Barakb4ff3a32016-02-09 14:57:42 +0200635 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 roce_version[0x8];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643 u8 r_roce_dest_udp_port[0x10];
644
645 u8 r_roce_max_src_udp_port[0x10];
646 u8 r_roce_min_src_udp_port[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649 u8 roce_address_table_size[0x10];
650
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652};
653
654enum {
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
664};
665
666enum {
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
676};
677
678struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Or Gerlitzbd108382017-05-28 15:24:17 +0300681 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300683 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200693 u8 atomic_size_qp[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696 u8 atomic_size_dc[0x10];
697
Matan Barakb4ff3a32016-02-09 14:57:42 +0200698 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300699};
700
701struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
704 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708
709 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
710
711 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
712
713 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
714
Matan Barakb4ff3a32016-02-09 14:57:42 +0200715 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300716};
717
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200718struct mlx5_ifc_calc_op {
719 u8 reserved_at_0[0x10];
720 u8 reserved_at_10[0x9];
721 u8 op_swap_endianness[0x1];
722 u8 op_min[0x1];
723 u8 op_xor[0x1];
724 u8 op_or[0x1];
725 u8 op_and[0x1];
726 u8 op_max[0x1];
727 u8 op_add[0x1];
728};
729
730struct mlx5_ifc_vector_calc_cap_bits {
731 u8 calc_matrix[0x1];
732 u8 reserved_at_1[0x1f];
733 u8 reserved_at_20[0x8];
734 u8 max_vec_count[0x8];
735 u8 reserved_at_30[0xd];
736 u8 max_chunk_size[0x3];
737 struct mlx5_ifc_calc_op calc0;
738 struct mlx5_ifc_calc_op calc1;
739 struct mlx5_ifc_calc_op calc2;
740 struct mlx5_ifc_calc_op calc3;
741
742 u8 reserved_at_e0[0x720];
743};
744
Saeed Mahameede2816822015-05-28 22:28:40 +0300745enum {
746 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
747 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300748 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc87082017-10-17 18:01:13 +0300749 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300750};
751
752enum {
753 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
754 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
755};
756
757enum {
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
759 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
760 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
761 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
762 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
768 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
769 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
770 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
771 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
772};
773
774enum {
775 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
776 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
777};
778
779enum {
780 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
781 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
782 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
783};
784
785enum {
786 MLX5_CAP_PORT_TYPE_IB = 0x0,
787 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300788};
789
Max Gurtovoy1410a902017-05-28 10:53:10 +0300790enum {
791 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
792 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
793 MLX5_CAP_UMR_FENCE_NONE = 0x2,
794};
795
Eli Cohenb7755162014-10-02 12:19:44 +0300796struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
799 u8 log_max_srq_sz[0x8];
800 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_qp[0x5];
803
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300805 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300807
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_cq[0x5];
812
813 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200814 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200816 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300817 u8 log_max_eq[0x4];
818
819 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200820 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200822 u8 force_teardown[0x1];
823 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300824 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200825 u8 umr_extended_translation_offset[0x1];
826 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300827 u8 log_max_klm_list_size[0x6];
828
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_ra_res_dc[0x6];
833
Matan Barakb4ff3a32016-02-09 14:57:42 +0200834 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300835 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200836 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300837 u8 log_max_ra_res_qp[0x6];
838
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200839 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300840 u8 cc_query_allowed[0x1];
841 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200842 u8 start_pad[0x1];
843 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300844 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300845 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300846
Saeed Mahameede2816822015-05-28 22:28:40 +0300847 u8 out_of_seq_cnt[0x1];
848 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300849 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300850 u8 reserved_at_183[0x1];
851 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300852 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 max_qp_cnt[0xa];
854 u8 pkey_table_size[0x10];
855
Saeed Mahameede2816822015-05-28 22:28:40 +0300856 u8 vport_group_manager[0x1];
857 u8 vhca_group_manager[0x1];
858 u8 ib_virt[0x1];
859 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200860 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300861 u8 ets[0x1];
862 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200863 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300864 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200865 u8 mcam_reg[0x1];
866 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300867 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200868 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300869 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300870 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200871 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300872 u8 disable_link_up[0x1];
873 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300874 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300875 u8 num_ports[0x8];
876
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300877 u8 reserved_at_1c0[0x1];
878 u8 pps[0x1];
879 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300880 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300881 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200882 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300883 u8 reserved_at_1d0[0x1];
884 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300885 u8 general_notification_event[0x1];
886 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200887 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200888 u8 rol_s[0x1];
889 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200891 u8 wol_s[0x1];
892 u8 wol_g[0x1];
893 u8 wol_a[0x1];
894 u8 wol_b[0x1];
895 u8 wol_m[0x1];
896 u8 wol_u[0x1];
897 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300898
899 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300900 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300902
Saeed Mahameede2816822015-05-28 22:28:40 +0300903 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300904 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300905 u8 reserved_at_202[0x1];
906 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200907 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300908 u8 reserved_at_205[0x5];
909 u8 umr_fence[0x2];
910 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300912 u8 cmdif_checksum[0x2];
913 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300914 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300915 u8 wq_signature[0x1];
916 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300917 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300918 u8 sho[0x1];
919 u8 tph[0x1];
920 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300921 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300922 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300924 u8 roce[0x1];
925 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300926 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300927
928 u8 cq_oi[0x1];
929 u8 cq_resize[0x1];
930 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300932 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300933 u8 pg[0x1];
934 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300936 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300937 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300938 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300940 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200941 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300942 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200943 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300944 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300945 u8 qkv[0x1];
946 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200947 u8 set_deth_sqpn[0x1];
948 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300949 u8 xrc[0x1];
950 u8 ud[0x1];
951 u8 uc[0x1];
952 u8 rc[0x1];
953
Eli Cohena6d51b62017-01-03 23:55:23 +0200954 u8 uar_4k[0x1];
955 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300956 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300957 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300958 u8 log_pg_sz[0x8];
959
960 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200961 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300962 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300965
966 u8 reserved_at_270[0xb];
967 u8 lag_master[0x1];
968 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300969
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 max_wqe_sz_sq[0x10];
972
Tariq Toukane1c9c622016-04-11 23:10:21 +0300973 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300974 u8 max_wqe_sz_rq[0x10];
975
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300976 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300977 u8 max_wqe_sz_sq_dc[0x10];
978
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 max_qp_mcg[0x19];
981
Tariq Toukane1c9c622016-04-11 23:10:21 +0300982 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300983 u8 log_max_mcg[0x8];
984
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300986 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_xrcd[0x5];
991
Amir Vadaia351a1b02016-07-14 10:32:38 +0300992 u8 reserved_at_340[0x8];
993 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300994 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +0300995
Eli Cohenb7755162014-10-02 12:19:44 +0300996
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_tis[0x5];
1005
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001010 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001012 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001014 u8 log_max_tis_per_sq[0x5];
1015
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001017 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001021 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001023 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001024
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001026 u8 log_max_wq_sz[0x5];
1027
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001028 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001029 u8 disable_local_lb[0x1];
1030 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001031 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001033 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001035 u8 log_max_current_uc_list[0x5];
1036
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001038
Tariq Toukane1c9c622016-04-11 23:10:21 +03001039 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001040 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001041 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001042 u8 log_uar_page_sz[0x10];
1043
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001045 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001046 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001047
Eli Cohena6d51b62017-01-03 23:55:23 +02001048 u8 reserved_at_500[0x20];
1049 u8 num_of_uars_per_page[0x20];
1050 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051
Guy Levi0ff8e792017-10-19 08:25:51 +03001052 u8 reserved_at_580[0x3d];
1053 u8 cqe_128_always[0x1];
1054 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001055 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001056
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001057 u8 cqe_compression_timeout[0x10];
1058 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001059
Saeed Mahameed74862162016-06-09 15:11:34 +03001060 u8 reserved_at_5e0[0x10];
1061 u8 tag_matching[0x1];
1062 u8 rndv_offload_rc[0x1];
1063 u8 rndv_offload_dc[0x1];
1064 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001065 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001066 u8 log_max_xrq[0x5];
1067
Max Gurtovoy7b135582017-01-02 11:37:38 +02001068 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001069};
1070
Saeed Mahameed81848732015-12-01 18:03:20 +02001071enum mlx5_flow_destination_type {
1072 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1073 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1074 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001075
1076 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001077};
1078
1079struct mlx5_ifc_dest_format_struct_bits {
1080 u8 destination_type[0x8];
1081 u8 destination_id[0x18];
1082
Matan Barakb4ff3a32016-02-09 14:57:42 +02001083 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001084};
1085
Amir Vadai9dc0b282016-05-13 12:55:39 +00001086struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001087 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001088
1089 u8 reserved_at_20[0x20];
1090};
1091
1092union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1093 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1094 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1095 u8 reserved_at_0[0x40];
1096};
1097
Saeed Mahameede2816822015-05-28 22:28:40 +03001098struct mlx5_ifc_fte_match_param_bits {
1099 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1100
1101 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1102
1103 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1104
Matan Barakb4ff3a32016-02-09 14:57:42 +02001105 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001106};
1107
1108enum {
1109 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1110 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1111 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1112 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1113 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1114};
1115
1116struct mlx5_ifc_rx_hash_field_select_bits {
1117 u8 l3_prot_type[0x1];
1118 u8 l4_prot_type[0x1];
1119 u8 selected_fields[0x1e];
1120};
1121
1122enum {
1123 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1124 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1125};
1126
1127enum {
1128 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1129 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1130};
1131
1132struct mlx5_ifc_wq_bits {
1133 u8 wq_type[0x4];
1134 u8 wq_signature[0x1];
1135 u8 end_padding_mode[0x2];
1136 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138
1139 u8 hds_skip_first_sge[0x1];
1140 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001141 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001142 u8 page_offset[0x5];
1143 u8 lwm[0x10];
1144
Matan Barakb4ff3a32016-02-09 14:57:42 +02001145 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146 u8 pd[0x18];
1147
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149 u8 uar_page[0x18];
1150
1151 u8 dbr_addr[0x40];
1152
1153 u8 hw_counter[0x20];
1154
1155 u8 sw_counter[0x20];
1156
Matan Barakb4ff3a32016-02-09 14:57:42 +02001157 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001159 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001161 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162 u8 log_wq_sz[0x5];
1163
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001164 u8 reserved_at_120[0x15];
1165 u8 log_wqe_num_of_strides[0x3];
1166 u8 two_byte_shift_en[0x1];
1167 u8 reserved_at_139[0x4];
1168 u8 log_wqe_stride_size[0x3];
1169
1170 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171
1172 struct mlx5_ifc_cmd_pas_bits pas[0];
1173};
1174
1175struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001177 u8 rq_num[0x18];
1178};
1179
1180struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001181 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001182 u8 mac_addr_47_32[0x10];
1183
1184 u8 mac_addr_31_0[0x20];
1185};
1186
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001187struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001188 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001189 u8 vlan[0x0c];
1190
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001192};
1193
Saeed Mahameede2816822015-05-28 22:28:40 +03001194struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196
1197 u8 min_time_between_cnps[0x20];
1198
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001201 u8 reserved_at_d8[0x4];
1202 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203 u8 cnp_802p_prio[0x3];
1204
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206};
1207
1208struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001215 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001216
Matan Barakb4ff3a32016-02-09 14:57:42 +02001217 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001218
1219 u8 rpg_time_reset[0x20];
1220
1221 u8 rpg_byte_reset[0x20];
1222
1223 u8 rpg_threshold[0x20];
1224
1225 u8 rpg_max_rate[0x20];
1226
1227 u8 rpg_ai_rate[0x20];
1228
1229 u8 rpg_hai_rate[0x20];
1230
1231 u8 rpg_gd[0x20];
1232
1233 u8 rpg_min_dec_fac[0x20];
1234
1235 u8 rpg_min_rate[0x20];
1236
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001238
1239 u8 rate_to_set_on_first_cnp[0x20];
1240
1241 u8 dce_tcp_g[0x20];
1242
1243 u8 dce_tcp_rtt[0x20];
1244
1245 u8 rate_reduce_monitor_period[0x20];
1246
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248
1249 u8 initial_alpha_value[0x20];
1250
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252};
1253
1254struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001255 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256
1257 u8 rppp_max_rps[0x20];
1258
1259 u8 rpg_time_reset[0x20];
1260
1261 u8 rpg_byte_reset[0x20];
1262
1263 u8 rpg_threshold[0x20];
1264
1265 u8 rpg_max_rate[0x20];
1266
1267 u8 rpg_ai_rate[0x20];
1268
1269 u8 rpg_hai_rate[0x20];
1270
1271 u8 rpg_gd[0x20];
1272
1273 u8 rpg_min_dec_fac[0x20];
1274
1275 u8 rpg_min_rate[0x20];
1276
Matan Barakb4ff3a32016-02-09 14:57:42 +02001277 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001278};
1279
1280enum {
1281 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1282 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1283 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1284};
1285
1286struct mlx5_ifc_resize_field_select_bits {
1287 u8 resize_field_select[0x20];
1288};
1289
1290enum {
1291 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1292 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1293 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1294 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1295};
1296
1297struct mlx5_ifc_modify_field_select_bits {
1298 u8 modify_field_select[0x20];
1299};
1300
1301struct mlx5_ifc_field_select_r_roce_np_bits {
1302 u8 field_select_r_roce_np[0x20];
1303};
1304
1305struct mlx5_ifc_field_select_r_roce_rp_bits {
1306 u8 field_select_r_roce_rp[0x20];
1307};
1308
1309enum {
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1316 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1317 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1318 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1319 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1320};
1321
1322struct mlx5_ifc_field_select_802_1qau_rp_bits {
1323 u8 field_select_8021qaurp[0x20];
1324};
1325
1326struct mlx5_ifc_phys_layer_cntrs_bits {
1327 u8 time_since_last_clear_high[0x20];
1328
1329 u8 time_since_last_clear_low[0x20];
1330
1331 u8 symbol_errors_high[0x20];
1332
1333 u8 symbol_errors_low[0x20];
1334
1335 u8 sync_headers_errors_high[0x20];
1336
1337 u8 sync_headers_errors_low[0x20];
1338
1339 u8 edpl_bip_errors_lane0_high[0x20];
1340
1341 u8 edpl_bip_errors_lane0_low[0x20];
1342
1343 u8 edpl_bip_errors_lane1_high[0x20];
1344
1345 u8 edpl_bip_errors_lane1_low[0x20];
1346
1347 u8 edpl_bip_errors_lane2_high[0x20];
1348
1349 u8 edpl_bip_errors_lane2_low[0x20];
1350
1351 u8 edpl_bip_errors_lane3_high[0x20];
1352
1353 u8 edpl_bip_errors_lane3_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1362
1363 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1364
1365 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1366
1367 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1368
1369 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1378
1379 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1380
1381 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1382
1383 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1384
1385 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1386
1387 u8 rs_fec_corrected_blocks_high[0x20];
1388
1389 u8 rs_fec_corrected_blocks_low[0x20];
1390
1391 u8 rs_fec_uncorrectable_blocks_high[0x20];
1392
1393 u8 rs_fec_uncorrectable_blocks_low[0x20];
1394
1395 u8 rs_fec_no_errors_blocks_high[0x20];
1396
1397 u8 rs_fec_no_errors_blocks_low[0x20];
1398
1399 u8 rs_fec_single_error_blocks_high[0x20];
1400
1401 u8 rs_fec_single_error_blocks_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_total_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_total_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1414
1415 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1416
1417 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1418
1419 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1420
1421 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1422
1423 u8 link_down_events[0x20];
1424
1425 u8 successful_recovery_events[0x20];
1426
Matan Barakb4ff3a32016-02-09 14:57:42 +02001427 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001428};
1429
Gal Pressmand8dc0502016-09-27 17:04:51 +03001430struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1431 u8 time_since_last_clear_high[0x20];
1432
1433 u8 time_since_last_clear_low[0x20];
1434
1435 u8 phy_received_bits_high[0x20];
1436
1437 u8 phy_received_bits_low[0x20];
1438
1439 u8 phy_symbol_errors_high[0x20];
1440
1441 u8 phy_symbol_errors_low[0x20];
1442
1443 u8 phy_corrected_bits_high[0x20];
1444
1445 u8 phy_corrected_bits_low[0x20];
1446
1447 u8 phy_corrected_bits_lane0_high[0x20];
1448
1449 u8 phy_corrected_bits_lane0_low[0x20];
1450
1451 u8 phy_corrected_bits_lane1_high[0x20];
1452
1453 u8 phy_corrected_bits_lane1_low[0x20];
1454
1455 u8 phy_corrected_bits_lane2_high[0x20];
1456
1457 u8 phy_corrected_bits_lane2_low[0x20];
1458
1459 u8 phy_corrected_bits_lane3_high[0x20];
1460
1461 u8 phy_corrected_bits_lane3_low[0x20];
1462
1463 u8 reserved_at_200[0x5c0];
1464};
1465
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001466struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1467 u8 symbol_error_counter[0x10];
1468
1469 u8 link_error_recovery_counter[0x8];
1470
1471 u8 link_downed_counter[0x8];
1472
1473 u8 port_rcv_errors[0x10];
1474
1475 u8 port_rcv_remote_physical_errors[0x10];
1476
1477 u8 port_rcv_switch_relay_errors[0x10];
1478
1479 u8 port_xmit_discards[0x10];
1480
1481 u8 port_xmit_constraint_errors[0x8];
1482
1483 u8 port_rcv_constraint_errors[0x8];
1484
1485 u8 reserved_at_70[0x8];
1486
1487 u8 link_overrun_errors[0x8];
1488
1489 u8 reserved_at_80[0x10];
1490
1491 u8 vl_15_dropped[0x10];
1492
Tim Wright133bea02017-05-01 17:30:08 +01001493 u8 reserved_at_a0[0x80];
1494
1495 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001496};
1497
Saeed Mahameede2816822015-05-28 22:28:40 +03001498struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1499 u8 transmit_queue_high[0x20];
1500
1501 u8 transmit_queue_low[0x20];
1502
Matan Barakb4ff3a32016-02-09 14:57:42 +02001503 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001504};
1505
1506struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1507 u8 rx_octets_high[0x20];
1508
1509 u8 rx_octets_low[0x20];
1510
Matan Barakb4ff3a32016-02-09 14:57:42 +02001511 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001512
1513 u8 rx_frames_high[0x20];
1514
1515 u8 rx_frames_low[0x20];
1516
1517 u8 tx_octets_high[0x20];
1518
1519 u8 tx_octets_low[0x20];
1520
Matan Barakb4ff3a32016-02-09 14:57:42 +02001521 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001522
1523 u8 tx_frames_high[0x20];
1524
1525 u8 tx_frames_low[0x20];
1526
1527 u8 rx_pause_high[0x20];
1528
1529 u8 rx_pause_low[0x20];
1530
1531 u8 rx_pause_duration_high[0x20];
1532
1533 u8 rx_pause_duration_low[0x20];
1534
1535 u8 tx_pause_high[0x20];
1536
1537 u8 tx_pause_low[0x20];
1538
1539 u8 tx_pause_duration_high[0x20];
1540
1541 u8 tx_pause_duration_low[0x20];
1542
1543 u8 rx_pause_transition_high[0x20];
1544
1545 u8 rx_pause_transition_low[0x20];
1546
Matan Barakb4ff3a32016-02-09 14:57:42 +02001547 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001548};
1549
1550struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1551 u8 port_transmit_wait_high[0x20];
1552
1553 u8 port_transmit_wait_low[0x20];
1554
Gal Pressman2dba0792017-06-18 14:56:45 +03001555 u8 reserved_at_40[0x100];
1556
1557 u8 rx_buffer_almost_full_high[0x20];
1558
1559 u8 rx_buffer_almost_full_low[0x20];
1560
1561 u8 rx_buffer_full_high[0x20];
1562
1563 u8 rx_buffer_full_low[0x20];
1564
1565 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001566};
1567
1568struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1569 u8 dot3stats_alignment_errors_high[0x20];
1570
1571 u8 dot3stats_alignment_errors_low[0x20];
1572
1573 u8 dot3stats_fcs_errors_high[0x20];
1574
1575 u8 dot3stats_fcs_errors_low[0x20];
1576
1577 u8 dot3stats_single_collision_frames_high[0x20];
1578
1579 u8 dot3stats_single_collision_frames_low[0x20];
1580
1581 u8 dot3stats_multiple_collision_frames_high[0x20];
1582
1583 u8 dot3stats_multiple_collision_frames_low[0x20];
1584
1585 u8 dot3stats_sqe_test_errors_high[0x20];
1586
1587 u8 dot3stats_sqe_test_errors_low[0x20];
1588
1589 u8 dot3stats_deferred_transmissions_high[0x20];
1590
1591 u8 dot3stats_deferred_transmissions_low[0x20];
1592
1593 u8 dot3stats_late_collisions_high[0x20];
1594
1595 u8 dot3stats_late_collisions_low[0x20];
1596
1597 u8 dot3stats_excessive_collisions_high[0x20];
1598
1599 u8 dot3stats_excessive_collisions_low[0x20];
1600
1601 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1602
1603 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1604
1605 u8 dot3stats_carrier_sense_errors_high[0x20];
1606
1607 u8 dot3stats_carrier_sense_errors_low[0x20];
1608
1609 u8 dot3stats_frame_too_longs_high[0x20];
1610
1611 u8 dot3stats_frame_too_longs_low[0x20];
1612
1613 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1614
1615 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1616
1617 u8 dot3stats_symbol_errors_high[0x20];
1618
1619 u8 dot3stats_symbol_errors_low[0x20];
1620
1621 u8 dot3control_in_unknown_opcodes_high[0x20];
1622
1623 u8 dot3control_in_unknown_opcodes_low[0x20];
1624
1625 u8 dot3in_pause_frames_high[0x20];
1626
1627 u8 dot3in_pause_frames_low[0x20];
1628
1629 u8 dot3out_pause_frames_high[0x20];
1630
1631 u8 dot3out_pause_frames_low[0x20];
1632
Matan Barakb4ff3a32016-02-09 14:57:42 +02001633 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001634};
1635
1636struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1637 u8 ether_stats_drop_events_high[0x20];
1638
1639 u8 ether_stats_drop_events_low[0x20];
1640
1641 u8 ether_stats_octets_high[0x20];
1642
1643 u8 ether_stats_octets_low[0x20];
1644
1645 u8 ether_stats_pkts_high[0x20];
1646
1647 u8 ether_stats_pkts_low[0x20];
1648
1649 u8 ether_stats_broadcast_pkts_high[0x20];
1650
1651 u8 ether_stats_broadcast_pkts_low[0x20];
1652
1653 u8 ether_stats_multicast_pkts_high[0x20];
1654
1655 u8 ether_stats_multicast_pkts_low[0x20];
1656
1657 u8 ether_stats_crc_align_errors_high[0x20];
1658
1659 u8 ether_stats_crc_align_errors_low[0x20];
1660
1661 u8 ether_stats_undersize_pkts_high[0x20];
1662
1663 u8 ether_stats_undersize_pkts_low[0x20];
1664
1665 u8 ether_stats_oversize_pkts_high[0x20];
1666
1667 u8 ether_stats_oversize_pkts_low[0x20];
1668
1669 u8 ether_stats_fragments_high[0x20];
1670
1671 u8 ether_stats_fragments_low[0x20];
1672
1673 u8 ether_stats_jabbers_high[0x20];
1674
1675 u8 ether_stats_jabbers_low[0x20];
1676
1677 u8 ether_stats_collisions_high[0x20];
1678
1679 u8 ether_stats_collisions_low[0x20];
1680
1681 u8 ether_stats_pkts64octets_high[0x20];
1682
1683 u8 ether_stats_pkts64octets_low[0x20];
1684
1685 u8 ether_stats_pkts65to127octets_high[0x20];
1686
1687 u8 ether_stats_pkts65to127octets_low[0x20];
1688
1689 u8 ether_stats_pkts128to255octets_high[0x20];
1690
1691 u8 ether_stats_pkts128to255octets_low[0x20];
1692
1693 u8 ether_stats_pkts256to511octets_high[0x20];
1694
1695 u8 ether_stats_pkts256to511octets_low[0x20];
1696
1697 u8 ether_stats_pkts512to1023octets_high[0x20];
1698
1699 u8 ether_stats_pkts512to1023octets_low[0x20];
1700
1701 u8 ether_stats_pkts1024to1518octets_high[0x20];
1702
1703 u8 ether_stats_pkts1024to1518octets_low[0x20];
1704
1705 u8 ether_stats_pkts1519to2047octets_high[0x20];
1706
1707 u8 ether_stats_pkts1519to2047octets_low[0x20];
1708
1709 u8 ether_stats_pkts2048to4095octets_high[0x20];
1710
1711 u8 ether_stats_pkts2048to4095octets_low[0x20];
1712
1713 u8 ether_stats_pkts4096to8191octets_high[0x20];
1714
1715 u8 ether_stats_pkts4096to8191octets_low[0x20];
1716
1717 u8 ether_stats_pkts8192to10239octets_high[0x20];
1718
1719 u8 ether_stats_pkts8192to10239octets_low[0x20];
1720
Matan Barakb4ff3a32016-02-09 14:57:42 +02001721 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001722};
1723
1724struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1725 u8 if_in_octets_high[0x20];
1726
1727 u8 if_in_octets_low[0x20];
1728
1729 u8 if_in_ucast_pkts_high[0x20];
1730
1731 u8 if_in_ucast_pkts_low[0x20];
1732
1733 u8 if_in_discards_high[0x20];
1734
1735 u8 if_in_discards_low[0x20];
1736
1737 u8 if_in_errors_high[0x20];
1738
1739 u8 if_in_errors_low[0x20];
1740
1741 u8 if_in_unknown_protos_high[0x20];
1742
1743 u8 if_in_unknown_protos_low[0x20];
1744
1745 u8 if_out_octets_high[0x20];
1746
1747 u8 if_out_octets_low[0x20];
1748
1749 u8 if_out_ucast_pkts_high[0x20];
1750
1751 u8 if_out_ucast_pkts_low[0x20];
1752
1753 u8 if_out_discards_high[0x20];
1754
1755 u8 if_out_discards_low[0x20];
1756
1757 u8 if_out_errors_high[0x20];
1758
1759 u8 if_out_errors_low[0x20];
1760
1761 u8 if_in_multicast_pkts_high[0x20];
1762
1763 u8 if_in_multicast_pkts_low[0x20];
1764
1765 u8 if_in_broadcast_pkts_high[0x20];
1766
1767 u8 if_in_broadcast_pkts_low[0x20];
1768
1769 u8 if_out_multicast_pkts_high[0x20];
1770
1771 u8 if_out_multicast_pkts_low[0x20];
1772
1773 u8 if_out_broadcast_pkts_high[0x20];
1774
1775 u8 if_out_broadcast_pkts_low[0x20];
1776
Matan Barakb4ff3a32016-02-09 14:57:42 +02001777 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001778};
1779
1780struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1781 u8 a_frames_transmitted_ok_high[0x20];
1782
1783 u8 a_frames_transmitted_ok_low[0x20];
1784
1785 u8 a_frames_received_ok_high[0x20];
1786
1787 u8 a_frames_received_ok_low[0x20];
1788
1789 u8 a_frame_check_sequence_errors_high[0x20];
1790
1791 u8 a_frame_check_sequence_errors_low[0x20];
1792
1793 u8 a_alignment_errors_high[0x20];
1794
1795 u8 a_alignment_errors_low[0x20];
1796
1797 u8 a_octets_transmitted_ok_high[0x20];
1798
1799 u8 a_octets_transmitted_ok_low[0x20];
1800
1801 u8 a_octets_received_ok_high[0x20];
1802
1803 u8 a_octets_received_ok_low[0x20];
1804
1805 u8 a_multicast_frames_xmitted_ok_high[0x20];
1806
1807 u8 a_multicast_frames_xmitted_ok_low[0x20];
1808
1809 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1810
1811 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1812
1813 u8 a_multicast_frames_received_ok_high[0x20];
1814
1815 u8 a_multicast_frames_received_ok_low[0x20];
1816
1817 u8 a_broadcast_frames_received_ok_high[0x20];
1818
1819 u8 a_broadcast_frames_received_ok_low[0x20];
1820
1821 u8 a_in_range_length_errors_high[0x20];
1822
1823 u8 a_in_range_length_errors_low[0x20];
1824
1825 u8 a_out_of_range_length_field_high[0x20];
1826
1827 u8 a_out_of_range_length_field_low[0x20];
1828
1829 u8 a_frame_too_long_errors_high[0x20];
1830
1831 u8 a_frame_too_long_errors_low[0x20];
1832
1833 u8 a_symbol_error_during_carrier_high[0x20];
1834
1835 u8 a_symbol_error_during_carrier_low[0x20];
1836
1837 u8 a_mac_control_frames_transmitted_high[0x20];
1838
1839 u8 a_mac_control_frames_transmitted_low[0x20];
1840
1841 u8 a_mac_control_frames_received_high[0x20];
1842
1843 u8 a_mac_control_frames_received_low[0x20];
1844
1845 u8 a_unsupported_opcodes_received_high[0x20];
1846
1847 u8 a_unsupported_opcodes_received_low[0x20];
1848
1849 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1850
1851 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1852
1853 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1854
1855 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1856
Matan Barakb4ff3a32016-02-09 14:57:42 +02001857 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001858};
1859
Gal Pressman8ed1a632016-11-17 13:46:01 +02001860struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1861 u8 life_time_counter_high[0x20];
1862
1863 u8 life_time_counter_low[0x20];
1864
1865 u8 rx_errors[0x20];
1866
1867 u8 tx_errors[0x20];
1868
1869 u8 l0_to_recovery_eieos[0x20];
1870
1871 u8 l0_to_recovery_ts[0x20];
1872
1873 u8 l0_to_recovery_framing[0x20];
1874
1875 u8 l0_to_recovery_retrain[0x20];
1876
1877 u8 crc_error_dllp[0x20];
1878
1879 u8 crc_error_tlp[0x20];
1880
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001881 u8 tx_overflow_buffer_pkt_high[0x20];
1882
1883 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001884
1885 u8 outbound_stalled_reads[0x20];
1886
1887 u8 outbound_stalled_writes[0x20];
1888
1889 u8 outbound_stalled_reads_events[0x20];
1890
1891 u8 outbound_stalled_writes_events[0x20];
1892
1893 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001894};
1895
Saeed Mahameede2816822015-05-28 22:28:40 +03001896struct mlx5_ifc_cmd_inter_comp_event_bits {
1897 u8 command_completion_vector[0x20];
1898
Matan Barakb4ff3a32016-02-09 14:57:42 +02001899 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001900};
1901
1902struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001903 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001904 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906 u8 vl[0x4];
1907
Matan Barakb4ff3a32016-02-09 14:57:42 +02001908 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001909};
1910
1911struct mlx5_ifc_db_bf_congestion_event_bits {
1912 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001915 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001916
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918};
1919
1920struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001921 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001922
1923 u8 gpio_event_hi[0x20];
1924
1925 u8 gpio_event_lo[0x20];
1926
Matan Barakb4ff3a32016-02-09 14:57:42 +02001927 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001928};
1929
1930struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932
1933 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001934 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001935
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937};
1938
1939struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001940 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001941};
1942
1943enum {
1944 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1945 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1946};
1947
1948struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001949 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001950 u8 cqn[0x18];
1951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955 u8 syndrome[0x8];
1956
Matan Barakb4ff3a32016-02-09 14:57:42 +02001957 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001958};
1959
1960struct mlx5_ifc_rdma_page_fault_event_bits {
1961 u8 bytes_committed[0x20];
1962
1963 u8 r_key[0x20];
1964
Matan Barakb4ff3a32016-02-09 14:57:42 +02001965 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001966 u8 packet_len[0x10];
1967
1968 u8 rdma_op_len[0x20];
1969
1970 u8 rdma_va[0x40];
1971
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973 u8 rdma[0x1];
1974 u8 write[0x1];
1975 u8 requestor[0x1];
1976 u8 qp_number[0x18];
1977};
1978
1979struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1980 u8 bytes_committed[0x20];
1981
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983 u8 wqe_index[0x10];
1984
Matan Barakb4ff3a32016-02-09 14:57:42 +02001985 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001986 u8 len[0x10];
1987
Matan Barakb4ff3a32016-02-09 14:57:42 +02001988 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001989
Matan Barakb4ff3a32016-02-09 14:57:42 +02001990 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001991 u8 rdma[0x1];
1992 u8 write_read[0x1];
1993 u8 requestor[0x1];
1994 u8 qpn[0x18];
1995};
1996
1997struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001998 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001999
2000 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002001 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002002
Matan Barakb4ff3a32016-02-09 14:57:42 +02002003 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002004 u8 qpn_rqn_sqn[0x18];
2005};
2006
2007struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002008 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002009
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011 u8 dct_number[0x18];
2012};
2013
2014struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002015 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002016
Matan Barakb4ff3a32016-02-09 14:57:42 +02002017 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002018 u8 cq_number[0x18];
2019};
2020
2021enum {
2022 MLX5_QPC_STATE_RST = 0x0,
2023 MLX5_QPC_STATE_INIT = 0x1,
2024 MLX5_QPC_STATE_RTR = 0x2,
2025 MLX5_QPC_STATE_RTS = 0x3,
2026 MLX5_QPC_STATE_SQER = 0x4,
2027 MLX5_QPC_STATE_ERR = 0x6,
2028 MLX5_QPC_STATE_SQD = 0x7,
2029 MLX5_QPC_STATE_SUSPENDED = 0x9,
2030};
2031
2032enum {
2033 MLX5_QPC_ST_RC = 0x0,
2034 MLX5_QPC_ST_UC = 0x1,
2035 MLX5_QPC_ST_UD = 0x2,
2036 MLX5_QPC_ST_XRC = 0x3,
2037 MLX5_QPC_ST_DCI = 0x5,
2038 MLX5_QPC_ST_QP0 = 0x7,
2039 MLX5_QPC_ST_QP1 = 0x8,
2040 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2041 MLX5_QPC_ST_REG_UMR = 0xc,
2042};
2043
2044enum {
2045 MLX5_QPC_PM_STATE_ARMED = 0x0,
2046 MLX5_QPC_PM_STATE_REARM = 0x1,
2047 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2048 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2049};
2050
2051enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002052 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2053};
2054
2055enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2057 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2058};
2059
2060enum {
2061 MLX5_QPC_MTU_256_BYTES = 0x1,
2062 MLX5_QPC_MTU_512_BYTES = 0x2,
2063 MLX5_QPC_MTU_1K_BYTES = 0x3,
2064 MLX5_QPC_MTU_2K_BYTES = 0x4,
2065 MLX5_QPC_MTU_4K_BYTES = 0x5,
2066 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2067};
2068
2069enum {
2070 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2071 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2072 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2073 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2074 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2075 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2076 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2077 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2078};
2079
2080enum {
2081 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2082 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2083 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2084};
2085
2086enum {
2087 MLX5_QPC_CS_RES_DISABLE = 0x0,
2088 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2089 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2090};
2091
2092struct mlx5_ifc_qpc_bits {
2093 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002094 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002095 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002096 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002098 u8 reserved_at_15[0x3];
2099 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002100 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002101 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102
2103 u8 wq_signature[0x1];
2104 u8 block_lb_mc[0x1];
2105 u8 atomic_like_write_en[0x1];
2106 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 pd[0x18];
2111
2112 u8 mtu[0x3];
2113 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115 u8 log_rq_size[0x4];
2116 u8 log_rq_stride[0x3];
2117 u8 no_sq[0x1];
2118 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002119 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002121 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122
2123 u8 counter_set_id[0x8];
2124 u8 uar_page[0x18];
2125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 user_index[0x18];
2128
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 log_page_size[0x5];
2131 u8 remote_qpn[0x18];
2132
2133 struct mlx5_ifc_ads_bits primary_address_path;
2134
2135 struct mlx5_ifc_ads_bits secondary_address_path;
2136
2137 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002138 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002139 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 retry_count[0x3];
2142 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144 u8 fre[0x1];
2145 u8 cur_rnr_retry[0x3];
2146 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 next_send_psn[0x18];
2153
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 cqn_snd[0x18];
2156
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002157 u8 reserved_at_400[0x8];
2158 u8 deth_sqpn[0x18];
2159
2160 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 last_acked_psn[0x18];
2164
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 ssn[0x18];
2167
Matan Barakb4ff3a32016-02-09 14:57:42 +02002168 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 atomic_mode[0x4];
2172 u8 rre[0x1];
2173 u8 rwe[0x1];
2174 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002175 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002176 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178 u8 cd_slave_receive[0x1];
2179 u8 cd_slave_send[0x1];
2180 u8 cd_master[0x1];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 min_rnr_nak[0x5];
2184 u8 next_rcv_psn[0x18];
2185
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187 u8 xrcd[0x18];
2188
Matan Barakb4ff3a32016-02-09 14:57:42 +02002189 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002190 u8 cqn_rcv[0x18];
2191
2192 u8 dbr_addr[0x40];
2193
2194 u8 q_key[0x20];
2195
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002198 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 rmsn[0x18];
2202
2203 u8 hw_sq_wqebb_counter[0x10];
2204 u8 sw_sq_wqebb_counter[0x10];
2205
2206 u8 hw_rq_counter[0x20];
2207
2208 u8 sw_rq_counter[0x20];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211
Matan Barakb4ff3a32016-02-09 14:57:42 +02002212 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213 u8 cgs[0x1];
2214 u8 cs_req[0x8];
2215 u8 cs_res[0x8];
2216
2217 u8 dc_access_key[0x40];
2218
Matan Barakb4ff3a32016-02-09 14:57:42 +02002219 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002220};
2221
2222struct mlx5_ifc_roce_addr_layout_bits {
2223 u8 source_l3_address[16][0x8];
2224
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226 u8 vlan_valid[0x1];
2227 u8 vlan_id[0xc];
2228 u8 source_mac_47_32[0x10];
2229
2230 u8 source_mac_31_0[0x20];
2231
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 roce_l3_type[0x4];
2234 u8 roce_version[0x8];
2235
Matan Barakb4ff3a32016-02-09 14:57:42 +02002236 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237};
2238
2239union mlx5_ifc_hca_cap_union_bits {
2240 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2241 struct mlx5_ifc_odp_cap_bits odp_cap;
2242 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2243 struct mlx5_ifc_roce_cap_bits roce_cap;
2244 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2245 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002246 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002247 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002248 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002249 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002250 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252};
2253
2254enum {
2255 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2256 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2257 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002258 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002259 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2260 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002261 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002262};
2263
2264struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002265 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266
2267 u8 group_id[0x20];
2268
Matan Barakb4ff3a32016-02-09 14:57:42 +02002269 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002270 u8 flow_tag[0x18];
2271
Matan Barakb4ff3a32016-02-09 14:57:42 +02002272 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002273 u8 action[0x10];
2274
Matan Barakb4ff3a32016-02-09 14:57:42 +02002275 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002276 u8 destination_list_size[0x18];
2277
Amir Vadai9dc0b282016-05-13 12:55:39 +00002278 u8 reserved_at_a0[0x8];
2279 u8 flow_counter_list_size[0x18];
2280
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002281 u8 encap_id[0x20];
2282
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002283 u8 modify_header_id[0x20];
2284
2285 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286
2287 struct mlx5_ifc_fte_match_param_bits match_value;
2288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290
Amir Vadai9dc0b282016-05-13 12:55:39 +00002291 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292};
2293
2294enum {
2295 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2296 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2297};
2298
2299struct mlx5_ifc_xrc_srqc_bits {
2300 u8 state[0x4];
2301 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002302 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002303
2304 u8 wq_signature[0x1];
2305 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307 u8 rlky[0x1];
2308 u8 basic_cyclic_rcv_wqe[0x1];
2309 u8 log_rq_stride[0x3];
2310 u8 xrcd[0x18];
2311
2312 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002313 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314 u8 cqn[0x18];
2315
Matan Barakb4ff3a32016-02-09 14:57:42 +02002316 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317
2318 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320 u8 log_page_size[0x6];
2321 u8 user_index[0x18];
2322
Matan Barakb4ff3a32016-02-09 14:57:42 +02002323 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002324
Matan Barakb4ff3a32016-02-09 14:57:42 +02002325 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002326 u8 pd[0x18];
2327
2328 u8 lwm[0x10];
2329 u8 wqe_cnt[0x10];
2330
Matan Barakb4ff3a32016-02-09 14:57:42 +02002331 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002332
2333 u8 db_record_addr_h[0x20];
2334
2335 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002336 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002337
Matan Barakb4ff3a32016-02-09 14:57:42 +02002338 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002339};
2340
2341struct mlx5_ifc_traffic_counter_bits {
2342 u8 packets[0x40];
2343
2344 u8 octets[0x40];
2345};
2346
2347struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002348 u8 strict_lag_tx_port_affinity[0x1];
2349 u8 reserved_at_1[0x3];
2350 u8 lag_tx_port_affinity[0x04];
2351
2352 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355
Matan Barakb4ff3a32016-02-09 14:57:42 +02002356 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002357
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359 u8 transport_domain[0x18];
2360
Erez Shitrit500a3d02017-04-13 06:36:51 +03002361 u8 reserved_at_140[0x8];
2362 u8 underlay_qpn[0x18];
2363 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364};
2365
2366enum {
2367 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2368 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2369};
2370
2371enum {
2372 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2373 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2374};
2375
2376enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002377 MLX5_RX_HASH_FN_NONE = 0x0,
2378 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2379 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002380};
2381
2382enum {
2383 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2384 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2385};
2386
2387struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389
2390 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392
Matan Barakb4ff3a32016-02-09 14:57:42 +02002393 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002394
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396 u8 lro_timeout_period_usecs[0x10];
2397 u8 lro_enable_mask[0x4];
2398 u8 lro_max_ip_payload_size[0x8];
2399
Matan Barakb4ff3a32016-02-09 14:57:42 +02002400 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403 u8 inline_rqn[0x18];
2404
2405 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002406 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002407 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409 u8 indirect_table[0x18];
2410
2411 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413 u8 self_lb_block[0x2];
2414 u8 transport_domain[0x18];
2415
2416 u8 rx_hash_toeplitz_key[10][0x20];
2417
2418 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2419
2420 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2421
Matan Barakb4ff3a32016-02-09 14:57:42 +02002422 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423};
2424
2425enum {
2426 MLX5_SRQC_STATE_GOOD = 0x0,
2427 MLX5_SRQC_STATE_ERROR = 0x1,
2428};
2429
2430struct mlx5_ifc_srqc_bits {
2431 u8 state[0x4];
2432 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002433 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002434
2435 u8 wq_signature[0x1];
2436 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002437 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002438 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440 u8 log_rq_stride[0x3];
2441 u8 xrcd[0x18];
2442
2443 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002444 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002445 u8 cqn[0x18];
2446
Matan Barakb4ff3a32016-02-09 14:57:42 +02002447 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002448
Matan Barakb4ff3a32016-02-09 14:57:42 +02002449 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002451 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456 u8 pd[0x18];
2457
2458 u8 lwm[0x10];
2459 u8 wqe_cnt[0x10];
2460
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002463 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466};
2467
2468enum {
2469 MLX5_SQC_STATE_RST = 0x0,
2470 MLX5_SQC_STATE_RDY = 0x1,
2471 MLX5_SQC_STATE_ERR = 0x3,
2472};
2473
2474struct mlx5_ifc_sqc_bits {
2475 u8 rlky[0x1];
2476 u8 cd_master[0x1];
2477 u8 fre[0x1];
2478 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002479 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002480 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002481 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002482 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002483 u8 allow_swp[0x1];
2484 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002485
Matan Barakb4ff3a32016-02-09 14:57:42 +02002486 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002487 u8 user_index[0x18];
2488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490 u8 cqn[0x18];
2491
Saeed Mahameed74862162016-06-09 15:11:34 +03002492 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493
Saeed Mahameed74862162016-06-09 15:11:34 +03002494 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501 u8 tis_num_0[0x18];
2502
2503 struct mlx5_ifc_wq_bits wq;
2504};
2505
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002506enum {
2507 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2508 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2509 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2510 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2511};
2512
2513struct mlx5_ifc_scheduling_context_bits {
2514 u8 element_type[0x8];
2515 u8 reserved_at_8[0x18];
2516
2517 u8 element_attributes[0x20];
2518
2519 u8 parent_element_id[0x20];
2520
2521 u8 reserved_at_60[0x40];
2522
2523 u8 bw_share[0x20];
2524
2525 u8 max_average_bw[0x20];
2526
2527 u8 reserved_at_e0[0x120];
2528};
2529
Saeed Mahameede2816822015-05-28 22:28:40 +03002530struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002532
Matan Barakb4ff3a32016-02-09 14:57:42 +02002533 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002534 u8 rqt_max_size[0x10];
2535
Matan Barakb4ff3a32016-02-09 14:57:42 +02002536 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537 u8 rqt_actual_size[0x10];
2538
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540
2541 struct mlx5_ifc_rq_num_bits rq_num[0];
2542};
2543
2544enum {
2545 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2546 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2547};
2548
2549enum {
2550 MLX5_RQC_STATE_RST = 0x0,
2551 MLX5_RQC_STATE_RDY = 0x1,
2552 MLX5_RQC_STATE_ERR = 0x3,
2553};
2554
2555struct mlx5_ifc_rqc_bits {
2556 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002557 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002558 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002559 u8 vsd[0x1];
2560 u8 mem_rq_type[0x4];
2561 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002562 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002564 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565
Matan Barakb4ff3a32016-02-09 14:57:42 +02002566 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002567 u8 user_index[0x18];
2568
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570 u8 cqn[0x18];
2571
2572 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 rmpn[0x18];
2577
Matan Barakb4ff3a32016-02-09 14:57:42 +02002578 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002579
2580 struct mlx5_ifc_wq_bits wq;
2581};
2582
2583enum {
2584 MLX5_RMPC_STATE_RDY = 0x1,
2585 MLX5_RMPC_STATE_ERR = 0x3,
2586};
2587
2588struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592
2593 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597
2598 struct mlx5_ifc_wq_bits wq;
2599};
2600
Saeed Mahameede2816822015-05-28 22:28:40 +03002601struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002602 u8 reserved_at_0[0x5];
2603 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002604 u8 reserved_at_8[0x15];
2605 u8 disable_mc_local_lb[0x1];
2606 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607 u8 roce_en[0x1];
2608
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002609 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002610 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002611 u8 event_on_mtu[0x1];
2612 u8 event_on_promisc_change[0x1];
2613 u8 event_on_vlan_change[0x1];
2614 u8 event_on_mc_address_change[0x1];
2615 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002616
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002618
2619 u8 mtu[0x10];
2620
Achiad Shochat9efa7522015-12-23 18:47:20 +02002621 u8 system_image_guid[0x40];
2622 u8 port_guid[0x40];
2623 u8 node_guid[0x40];
2624
Matan Barakb4ff3a32016-02-09 14:57:42 +02002625 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002626 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002628
2629 u8 promisc_uc[0x1];
2630 u8 promisc_mc[0x1];
2631 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635 u8 allowed_list_size[0xc];
2636
2637 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2638
Matan Barakb4ff3a32016-02-09 14:57:42 +02002639 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002640
2641 u8 current_uc_mac_address[0][0x40];
2642};
2643
2644enum {
2645 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2646 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2647 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002648 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002649};
2650
2651struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002652 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002653 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002654 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655 u8 small_fence_on_rdma_read_response[0x1];
2656 u8 umr_en[0x1];
2657 u8 a[0x1];
2658 u8 rw[0x1];
2659 u8 rr[0x1];
2660 u8 lw[0x1];
2661 u8 lr[0x1];
2662 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664
2665 u8 qpn[0x18];
2666 u8 mkey_7_0[0x8];
2667
Matan Barakb4ff3a32016-02-09 14:57:42 +02002668 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669
2670 u8 length64[0x1];
2671 u8 bsf_en[0x1];
2672 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002673 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002674 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 en_rinval[0x1];
2677 u8 pd[0x18];
2678
2679 u8 start_addr[0x40];
2680
2681 u8 len[0x40];
2682
2683 u8 bsf_octword_size[0x20];
2684
Matan Barakb4ff3a32016-02-09 14:57:42 +02002685 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002686
2687 u8 translations_octword_size[0x20];
2688
Matan Barakb4ff3a32016-02-09 14:57:42 +02002689 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002690 u8 log_page_size[0x5];
2691
Matan Barakb4ff3a32016-02-09 14:57:42 +02002692 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002693};
2694
2695struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002696 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002697 u8 pkey[0x10];
2698};
2699
2700struct mlx5_ifc_array128_auto_bits {
2701 u8 array128_auto[16][0x8];
2702};
2703
2704struct mlx5_ifc_hca_vport_context_bits {
2705 u8 field_select[0x20];
2706
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002708
2709 u8 sm_virt_aware[0x1];
2710 u8 has_smi[0x1];
2711 u8 has_raw[0x1];
2712 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002714 u8 port_physical_state[0x4];
2715 u8 vport_state_policy[0x4];
2716 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002717 u8 vport_state[0x4];
2718
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002720
2721 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002722
2723 u8 port_guid[0x40];
2724
2725 u8 node_guid[0x40];
2726
2727 u8 cap_mask1[0x20];
2728
2729 u8 cap_mask1_field_select[0x20];
2730
2731 u8 cap_mask2[0x20];
2732
2733 u8 cap_mask2_field_select[0x20];
2734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002736
2737 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002738 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002739 u8 init_type_reply[0x4];
2740 u8 lmc[0x3];
2741 u8 subnet_timeout[0x5];
2742
2743 u8 sm_lid[0x10];
2744 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746
2747 u8 qkey_violation_counter[0x10];
2748 u8 pkey_violation_counter[0x10];
2749
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751};
2752
Saeed Mahameedd6666752015-12-01 18:03:22 +02002753struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002755 u8 vport_svlan_strip[0x1];
2756 u8 vport_cvlan_strip[0x1];
2757 u8 vport_svlan_insert[0x1];
2758 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002762
2763 u8 svlan_cfi[0x1];
2764 u8 svlan_pcp[0x3];
2765 u8 svlan_id[0xc];
2766 u8 cvlan_cfi[0x1];
2767 u8 cvlan_pcp[0x3];
2768 u8 cvlan_id[0xc];
2769
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002771};
2772
Saeed Mahameede2816822015-05-28 22:28:40 +03002773enum {
2774 MLX5_EQC_STATUS_OK = 0x0,
2775 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2776};
2777
2778enum {
2779 MLX5_EQC_ST_ARMED = 0x9,
2780 MLX5_EQC_ST_FIRED = 0xa,
2781};
2782
2783struct mlx5_ifc_eqc_bits {
2784 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786 u8 ec[0x1];
2787 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002788 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002789 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002796 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002797
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799 u8 log_eq_size[0x5];
2800 u8 uar_page[0x18];
2801
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805 u8 intr[0x8];
2806
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810
Matan Barakb4ff3a32016-02-09 14:57:42 +02002811 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002812
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002814 u8 consumer_counter[0x18];
2815
Matan Barakb4ff3a32016-02-09 14:57:42 +02002816 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002817 u8 producer_counter[0x18];
2818
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820};
2821
2822enum {
2823 MLX5_DCTC_STATE_ACTIVE = 0x0,
2824 MLX5_DCTC_STATE_DRAINING = 0x1,
2825 MLX5_DCTC_STATE_DRAINED = 0x2,
2826};
2827
2828enum {
2829 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2830 MLX5_DCTC_CS_RES_NA = 0x1,
2831 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2832};
2833
2834enum {
2835 MLX5_DCTC_MTU_256_BYTES = 0x1,
2836 MLX5_DCTC_MTU_512_BYTES = 0x2,
2837 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2838 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2839 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2840};
2841
2842struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002843 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002844 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002845 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848 u8 user_index[0x18];
2849
Matan Barakb4ff3a32016-02-09 14:57:42 +02002850 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002851 u8 cqn[0x18];
2852
2853 u8 counter_set_id[0x8];
2854 u8 atomic_mode[0x4];
2855 u8 rre[0x1];
2856 u8 rwe[0x1];
2857 u8 rae[0x1];
2858 u8 atomic_like_write_en[0x1];
2859 u8 latency_sensitive[0x1];
2860 u8 rlky[0x1];
2861 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002862 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002863
Matan Barakb4ff3a32016-02-09 14:57:42 +02002864 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002865 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002871 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872
Matan Barakb4ff3a32016-02-09 14:57:42 +02002873 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002874 u8 pd[0x18];
2875
2876 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002877 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002878 u8 flow_label[0x14];
2879
2880 u8 dc_access_key[0x40];
2881
Matan Barakb4ff3a32016-02-09 14:57:42 +02002882 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002883 u8 mtu[0x3];
2884 u8 port[0x8];
2885 u8 pkey_index[0x10];
2886
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 hop_limit[0x8];
2891
2892 u8 dc_access_key_violation_count[0x20];
2893
Matan Barakb4ff3a32016-02-09 14:57:42 +02002894 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895 u8 dei_cfi[0x1];
2896 u8 eth_prio[0x3];
2897 u8 ecn[0x2];
2898 u8 dscp[0x6];
2899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901};
2902
2903enum {
2904 MLX5_CQC_STATUS_OK = 0x0,
2905 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2906 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2907};
2908
2909enum {
2910 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2911 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2912};
2913
2914enum {
2915 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2916 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2917 MLX5_CQC_ST_FIRED = 0xa,
2918};
2919
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002920enum {
2921 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2922 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002923 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002924};
2925
Saeed Mahameede2816822015-05-28 22:28:40 +03002926struct mlx5_ifc_cqc_bits {
2927 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929 u8 cqe_sz[0x3];
2930 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 scqe_break_moderation_en[0x1];
2933 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002934 u8 cq_period_mode[0x2];
2935 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936 u8 mini_cqe_res_format[0x2];
2937 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941
Matan Barakb4ff3a32016-02-09 14:57:42 +02002942 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002943 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002944 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002945
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947 u8 log_cq_size[0x5];
2948 u8 uar_page[0x18];
2949
Matan Barakb4ff3a32016-02-09 14:57:42 +02002950 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002951 u8 cq_period[0xc];
2952 u8 cq_max_count[0x10];
2953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002955 u8 c_eqn[0x8];
2956
Matan Barakb4ff3a32016-02-09 14:57:42 +02002957 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002958 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002959 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002960
Matan Barakb4ff3a32016-02-09 14:57:42 +02002961 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002962
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002964 u8 last_notified_index[0x18];
2965
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967 u8 last_solicit_index[0x18];
2968
Matan Barakb4ff3a32016-02-09 14:57:42 +02002969 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002970 u8 consumer_counter[0x18];
2971
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002973 u8 producer_counter[0x18];
2974
Matan Barakb4ff3a32016-02-09 14:57:42 +02002975 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002976
2977 u8 dbr_addr[0x40];
2978};
2979
2980union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2981 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2982 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2983 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002984 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002985};
2986
2987struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002988 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002989
Matan Barakb4ff3a32016-02-09 14:57:42 +02002990 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002991 u8 ieee_vendor_id[0x18];
2992
Matan Barakb4ff3a32016-02-09 14:57:42 +02002993 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002994 u8 vsd_vendor_id[0x10];
2995
2996 u8 vsd[208][0x8];
2997
2998 u8 vsd_contd_psid[16][0x8];
2999};
3000
Saeed Mahameed74862162016-06-09 15:11:34 +03003001enum {
3002 MLX5_XRQC_STATE_GOOD = 0x0,
3003 MLX5_XRQC_STATE_ERROR = 0x1,
3004};
3005
3006enum {
3007 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3008 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3009};
3010
3011enum {
3012 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3013};
3014
3015struct mlx5_ifc_tag_matching_topology_context_bits {
3016 u8 log_matching_list_sz[0x4];
3017 u8 reserved_at_4[0xc];
3018 u8 append_next_index[0x10];
3019
3020 u8 sw_phase_cnt[0x10];
3021 u8 hw_phase_cnt[0x10];
3022
3023 u8 reserved_at_40[0x40];
3024};
3025
3026struct mlx5_ifc_xrqc_bits {
3027 u8 state[0x4];
3028 u8 rlkey[0x1];
3029 u8 reserved_at_5[0xf];
3030 u8 topology[0x4];
3031 u8 reserved_at_18[0x4];
3032 u8 offload[0x4];
3033
3034 u8 reserved_at_20[0x8];
3035 u8 user_index[0x18];
3036
3037 u8 reserved_at_40[0x8];
3038 u8 cqn[0x18];
3039
3040 u8 reserved_at_60[0xa0];
3041
3042 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3043
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003044 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003045
3046 struct mlx5_ifc_wq_bits wq;
3047};
3048
Saeed Mahameede2816822015-05-28 22:28:40 +03003049union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3050 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3051 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053};
3054
3055union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3056 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3057 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3058 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003059 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003060};
3061
3062union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3063 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3064 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3065 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3066 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3067 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3068 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3069 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003070 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003071 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003072 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003073 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003074};
3075
Gal Pressman8ed1a632016-11-17 13:46:01 +02003076union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3077 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3078 u8 reserved_at_0[0x7c0];
3079};
3080
Saeed Mahameede2816822015-05-28 22:28:40 +03003081union mlx5_ifc_event_auto_bits {
3082 struct mlx5_ifc_comp_event_bits comp_event;
3083 struct mlx5_ifc_dct_events_bits dct_events;
3084 struct mlx5_ifc_qp_events_bits qp_events;
3085 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3086 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3087 struct mlx5_ifc_cq_error_bits cq_error;
3088 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3089 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3090 struct mlx5_ifc_gpio_event_bits gpio_event;
3091 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3092 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3093 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095};
3096
3097struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003098 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003099
3100 u8 assert_existptr[0x20];
3101
3102 u8 assert_callra[0x20];
3103
Matan Barakb4ff3a32016-02-09 14:57:42 +02003104 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003105
3106 u8 fw_version[0x20];
3107
3108 u8 hw_id[0x20];
3109
Matan Barakb4ff3a32016-02-09 14:57:42 +02003110 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003111
3112 u8 irisc_index[0x8];
3113 u8 synd[0x8];
3114 u8 ext_synd[0x10];
3115};
3116
3117struct mlx5_ifc_register_loopback_control_bits {
3118 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003119 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003120 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122
Matan Barakb4ff3a32016-02-09 14:57:42 +02003123 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003124};
3125
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003126struct mlx5_ifc_vport_tc_element_bits {
3127 u8 traffic_class[0x4];
3128 u8 reserved_at_4[0xc];
3129 u8 vport_number[0x10];
3130};
3131
3132struct mlx5_ifc_vport_element_bits {
3133 u8 reserved_at_0[0x10];
3134 u8 vport_number[0x10];
3135};
3136
3137enum {
3138 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3139 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3140 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3141};
3142
3143struct mlx5_ifc_tsar_element_bits {
3144 u8 reserved_at_0[0x8];
3145 u8 tsar_type[0x8];
3146 u8 reserved_at_10[0x10];
3147};
3148
Majd Dibbiny8812c242017-02-09 14:20:12 +02003149enum {
3150 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3151 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3152};
3153
Saeed Mahameede2816822015-05-28 22:28:40 +03003154struct mlx5_ifc_teardown_hca_out_bits {
3155 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003156 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003157
3158 u8 syndrome[0x20];
3159
Majd Dibbiny8812c242017-02-09 14:20:12 +02003160 u8 reserved_at_40[0x3f];
3161
3162 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003163};
3164
3165enum {
3166 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003167 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003168};
3169
3170struct mlx5_ifc_teardown_hca_in_bits {
3171 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175 u8 op_mod[0x10];
3176
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178 u8 profile[0x10];
3179
Matan Barakb4ff3a32016-02-09 14:57:42 +02003180 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003181};
3182
3183struct mlx5_ifc_sqerr2rts_qp_out_bits {
3184 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186
3187 u8 syndrome[0x20];
3188
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190};
3191
3192struct mlx5_ifc_sqerr2rts_qp_in_bits {
3193 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003194 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003195
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197 u8 op_mod[0x10];
3198
Matan Barakb4ff3a32016-02-09 14:57:42 +02003199 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003200 u8 qpn[0x18];
3201
Matan Barakb4ff3a32016-02-09 14:57:42 +02003202 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003203
3204 u8 opt_param_mask[0x20];
3205
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207
3208 struct mlx5_ifc_qpc_bits qpc;
3209
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211};
3212
3213struct mlx5_ifc_sqd2rts_qp_out_bits {
3214 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216
3217 u8 syndrome[0x20];
3218
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220};
3221
3222struct mlx5_ifc_sqd2rts_qp_in_bits {
3223 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
Matan Barakb4ff3a32016-02-09 14:57:42 +02003226 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003227 u8 op_mod[0x10];
3228
Matan Barakb4ff3a32016-02-09 14:57:42 +02003229 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003230 u8 qpn[0x18];
3231
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233
3234 u8 opt_param_mask[0x20];
3235
Matan Barakb4ff3a32016-02-09 14:57:42 +02003236 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237
3238 struct mlx5_ifc_qpc_bits qpc;
3239
Matan Barakb4ff3a32016-02-09 14:57:42 +02003240 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003241};
3242
3243struct mlx5_ifc_set_roce_address_out_bits {
3244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246
3247 u8 syndrome[0x20];
3248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250};
3251
3252struct mlx5_ifc_set_roce_address_in_bits {
3253 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257 u8 op_mod[0x10];
3258
3259 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
3264 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3265};
3266
3267struct mlx5_ifc_set_mad_demux_out_bits {
3268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270
3271 u8 syndrome[0x20];
3272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274};
3275
3276enum {
3277 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3278 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3279};
3280
3281struct mlx5_ifc_set_mad_demux_in_bits {
3282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286 u8 op_mod[0x10];
3287
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293};
3294
3295struct mlx5_ifc_set_l2_table_entry_out_bits {
3296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298
3299 u8 syndrome[0x20];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302};
3303
3304struct mlx5_ifc_set_l2_table_entry_in_bits {
3305 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309 u8 op_mod[0x10];
3310
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314 u8 table_index[0x18];
3315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317
Matan Barakb4ff3a32016-02-09 14:57:42 +02003318 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003319 u8 vlan_valid[0x1];
3320 u8 vlan[0xc];
3321
3322 struct mlx5_ifc_mac_address_layout_bits mac_address;
3323
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003325};
3326
3327struct mlx5_ifc_set_issi_out_bits {
3328 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003330
3331 u8 syndrome[0x20];
3332
Matan Barakb4ff3a32016-02-09 14:57:42 +02003333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334};
3335
3336struct mlx5_ifc_set_issi_in_bits {
3337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
Matan Barakb4ff3a32016-02-09 14:57:42 +02003340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003341 u8 op_mod[0x10];
3342
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344 u8 current_issi[0x10];
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347};
3348
3349struct mlx5_ifc_set_hca_cap_out_bits {
3350 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352
3353 u8 syndrome[0x20];
3354
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003356};
3357
3358struct mlx5_ifc_set_hca_cap_in_bits {
3359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003361
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003363 u8 op_mod[0x10];
3364
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003366
Saeed Mahameede2816822015-05-28 22:28:40 +03003367 union mlx5_ifc_hca_cap_union_bits capability;
3368};
3369
Maor Gottlieb26a81452015-12-10 17:12:39 +02003370enum {
3371 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3372 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3373 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3374 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3375};
3376
Saeed Mahameede2816822015-05-28 22:28:40 +03003377struct mlx5_ifc_set_fte_out_bits {
3378 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003380
3381 u8 syndrome[0x20];
3382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384};
3385
3386struct mlx5_ifc_set_fte_in_bits {
3387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389
Matan Barakb4ff3a32016-02-09 14:57:42 +02003390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003391 u8 op_mod[0x10];
3392
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003393 u8 other_vport[0x1];
3394 u8 reserved_at_41[0xf];
3395 u8 vport_number[0x10];
3396
3397 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398
3399 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003400 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003401
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403 u8 table_id[0x18];
3404
Matan Barakb4ff3a32016-02-09 14:57:42 +02003405 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003406 u8 modify_enable_mask[0x8];
3407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409
3410 u8 flow_index[0x20];
3411
Matan Barakb4ff3a32016-02-09 14:57:42 +02003412 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003413
3414 struct mlx5_ifc_flow_context_bits flow_context;
3415};
3416
3417struct mlx5_ifc_rts2rts_qp_out_bits {
3418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
3421 u8 syndrome[0x20];
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424};
3425
3426struct mlx5_ifc_rts2rts_qp_in_bits {
3427 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003428 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003429
Matan Barakb4ff3a32016-02-09 14:57:42 +02003430 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003431 u8 op_mod[0x10];
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003434 u8 qpn[0x18];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437
3438 u8 opt_param_mask[0x20];
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441
3442 struct mlx5_ifc_qpc_bits qpc;
3443
Matan Barakb4ff3a32016-02-09 14:57:42 +02003444 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003445};
3446
3447struct mlx5_ifc_rtr2rts_qp_out_bits {
3448 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450
3451 u8 syndrome[0x20];
3452
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454};
3455
3456struct mlx5_ifc_rtr2rts_qp_in_bits {
3457 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003459
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003461 u8 op_mod[0x10];
3462
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464 u8 qpn[0x18];
3465
Matan Barakb4ff3a32016-02-09 14:57:42 +02003466 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003467
3468 u8 opt_param_mask[0x20];
3469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471
3472 struct mlx5_ifc_qpc_bits qpc;
3473
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475};
3476
3477struct mlx5_ifc_rst2init_qp_out_bits {
3478 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003479 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003480
3481 u8 syndrome[0x20];
3482
Matan Barakb4ff3a32016-02-09 14:57:42 +02003483 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003484};
3485
3486struct mlx5_ifc_rst2init_qp_in_bits {
3487 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489
Matan Barakb4ff3a32016-02-09 14:57:42 +02003490 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003491 u8 op_mod[0x10];
3492
Matan Barakb4ff3a32016-02-09 14:57:42 +02003493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003494 u8 qpn[0x18];
3495
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
3498 u8 opt_param_mask[0x20];
3499
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501
3502 struct mlx5_ifc_qpc_bits qpc;
3503
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505};
3506
Saeed Mahameed74862162016-06-09 15:11:34 +03003507struct mlx5_ifc_query_xrq_out_bits {
3508 u8 status[0x8];
3509 u8 reserved_at_8[0x18];
3510
3511 u8 syndrome[0x20];
3512
3513 u8 reserved_at_40[0x40];
3514
3515 struct mlx5_ifc_xrqc_bits xrq_context;
3516};
3517
3518struct mlx5_ifc_query_xrq_in_bits {
3519 u8 opcode[0x10];
3520 u8 reserved_at_10[0x10];
3521
3522 u8 reserved_at_20[0x10];
3523 u8 op_mod[0x10];
3524
3525 u8 reserved_at_40[0x8];
3526 u8 xrqn[0x18];
3527
3528 u8 reserved_at_60[0x20];
3529};
3530
Saeed Mahameede2816822015-05-28 22:28:40 +03003531struct mlx5_ifc_query_xrc_srq_out_bits {
3532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534
3535 u8 syndrome[0x20];
3536
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538
3539 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542
3543 u8 pas[0][0x40];
3544};
3545
3546struct mlx5_ifc_query_xrc_srq_in_bits {
3547 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549
Matan Barakb4ff3a32016-02-09 14:57:42 +02003550 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003551 u8 op_mod[0x10];
3552
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554 u8 xrc_srqn[0x18];
3555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557};
3558
3559enum {
3560 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3561 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3562};
3563
3564struct mlx5_ifc_query_vport_state_out_bits {
3565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567
3568 u8 syndrome[0x20];
3569
Matan Barakb4ff3a32016-02-09 14:57:42 +02003570 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003571
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573 u8 admin_state[0x4];
3574 u8 state[0x4];
3575};
3576
3577enum {
3578 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003579 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003580};
3581
3582struct mlx5_ifc_query_vport_state_in_bits {
3583 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587 u8 op_mod[0x10];
3588
3589 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003590 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003591 u8 vport_number[0x10];
3592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594};
3595
3596struct mlx5_ifc_query_vport_counter_out_bits {
3597 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599
3600 u8 syndrome[0x20];
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 struct mlx5_ifc_traffic_counter_bits received_errors;
3605
3606 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3607
3608 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3609
3610 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3611
3612 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3613
3614 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3615
3616 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3617
3618 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3619
3620 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3621
3622 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3623
3624 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3625
3626 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3627
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629};
3630
3631enum {
3632 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3633};
3634
3635struct mlx5_ifc_query_vport_counter_in_bits {
3636 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003638
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640 u8 op_mod[0x10];
3641
3642 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003643 u8 reserved_at_41[0xb];
3644 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003645 u8 vport_number[0x10];
3646
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648
3649 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653};
3654
3655struct mlx5_ifc_query_tis_out_bits {
3656 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658
3659 u8 syndrome[0x20];
3660
Matan Barakb4ff3a32016-02-09 14:57:42 +02003661 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003662
3663 struct mlx5_ifc_tisc_bits tis_context;
3664};
3665
3666struct mlx5_ifc_query_tis_in_bits {
3667 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669
Matan Barakb4ff3a32016-02-09 14:57:42 +02003670 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003671 u8 op_mod[0x10];
3672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674 u8 tisn[0x18];
3675
Matan Barakb4ff3a32016-02-09 14:57:42 +02003676 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003677};
3678
3679struct mlx5_ifc_query_tir_out_bits {
3680 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003681 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003682
3683 u8 syndrome[0x20];
3684
Matan Barakb4ff3a32016-02-09 14:57:42 +02003685 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003686
3687 struct mlx5_ifc_tirc_bits tir_context;
3688};
3689
3690struct mlx5_ifc_query_tir_in_bits {
3691 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695 u8 op_mod[0x10];
3696
Matan Barakb4ff3a32016-02-09 14:57:42 +02003697 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003698 u8 tirn[0x18];
3699
Matan Barakb4ff3a32016-02-09 14:57:42 +02003700 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003701};
3702
3703struct mlx5_ifc_query_srq_out_bits {
3704 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706
3707 u8 syndrome[0x20];
3708
Matan Barakb4ff3a32016-02-09 14:57:42 +02003709 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003710
3711 struct mlx5_ifc_srqc_bits srq_context_entry;
3712
Matan Barakb4ff3a32016-02-09 14:57:42 +02003713 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003714
3715 u8 pas[0][0x40];
3716};
3717
3718struct mlx5_ifc_query_srq_in_bits {
3719 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721
Matan Barakb4ff3a32016-02-09 14:57:42 +02003722 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723 u8 op_mod[0x10];
3724
Matan Barakb4ff3a32016-02-09 14:57:42 +02003725 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003726 u8 srqn[0x18];
3727
Matan Barakb4ff3a32016-02-09 14:57:42 +02003728 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003729};
3730
3731struct mlx5_ifc_query_sq_out_bits {
3732 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 u8 syndrome[0x20];
3736
Matan Barakb4ff3a32016-02-09 14:57:42 +02003737 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003738
3739 struct mlx5_ifc_sqc_bits sq_context;
3740};
3741
3742struct mlx5_ifc_query_sq_in_bits {
3743 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003744 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003745
Matan Barakb4ff3a32016-02-09 14:57:42 +02003746 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747 u8 op_mod[0x10];
3748
Matan Barakb4ff3a32016-02-09 14:57:42 +02003749 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003750 u8 sqn[0x18];
3751
Matan Barakb4ff3a32016-02-09 14:57:42 +02003752 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003753};
3754
3755struct mlx5_ifc_query_special_contexts_out_bits {
3756 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003757 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003758
3759 u8 syndrome[0x20];
3760
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003761 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003762
3763 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003764
3765 u8 null_mkey[0x20];
3766
3767 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003768};
3769
3770struct mlx5_ifc_query_special_contexts_in_bits {
3771 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773
Matan Barakb4ff3a32016-02-09 14:57:42 +02003774 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003775 u8 op_mod[0x10];
3776
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778};
3779
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003780struct mlx5_ifc_query_scheduling_element_out_bits {
3781 u8 opcode[0x10];
3782 u8 reserved_at_10[0x10];
3783
3784 u8 reserved_at_20[0x10];
3785 u8 op_mod[0x10];
3786
3787 u8 reserved_at_40[0xc0];
3788
3789 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3790
3791 u8 reserved_at_300[0x100];
3792};
3793
3794enum {
3795 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3796};
3797
3798struct mlx5_ifc_query_scheduling_element_in_bits {
3799 u8 opcode[0x10];
3800 u8 reserved_at_10[0x10];
3801
3802 u8 reserved_at_20[0x10];
3803 u8 op_mod[0x10];
3804
3805 u8 scheduling_hierarchy[0x8];
3806 u8 reserved_at_48[0x18];
3807
3808 u8 scheduling_element_id[0x20];
3809
3810 u8 reserved_at_80[0x180];
3811};
3812
Saeed Mahameede2816822015-05-28 22:28:40 +03003813struct mlx5_ifc_query_rqt_out_bits {
3814 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003815 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003816
3817 u8 syndrome[0x20];
3818
Matan Barakb4ff3a32016-02-09 14:57:42 +02003819 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003820
3821 struct mlx5_ifc_rqtc_bits rqt_context;
3822};
3823
3824struct mlx5_ifc_query_rqt_in_bits {
3825 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827
Matan Barakb4ff3a32016-02-09 14:57:42 +02003828 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003829 u8 op_mod[0x10];
3830
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832 u8 rqtn[0x18];
3833
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835};
3836
3837struct mlx5_ifc_query_rq_out_bits {
3838 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
3841 u8 syndrome[0x20];
3842
Matan Barakb4ff3a32016-02-09 14:57:42 +02003843 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003844
3845 struct mlx5_ifc_rqc_bits rq_context;
3846};
3847
3848struct mlx5_ifc_query_rq_in_bits {
3849 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853 u8 op_mod[0x10];
3854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856 u8 rqn[0x18];
3857
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859};
3860
3861struct mlx5_ifc_query_roce_address_out_bits {
3862 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003863 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003864
3865 u8 syndrome[0x20];
3866
Matan Barakb4ff3a32016-02-09 14:57:42 +02003867 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868
3869 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3870};
3871
3872struct mlx5_ifc_query_roce_address_in_bits {
3873 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877 u8 op_mod[0x10];
3878
3879 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883};
3884
3885struct mlx5_ifc_query_rmp_out_bits {
3886 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888
3889 u8 syndrome[0x20];
3890
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
3893 struct mlx5_ifc_rmpc_bits rmp_context;
3894};
3895
3896struct mlx5_ifc_query_rmp_in_bits {
3897 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899
Matan Barakb4ff3a32016-02-09 14:57:42 +02003900 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003901 u8 op_mod[0x10];
3902
Matan Barakb4ff3a32016-02-09 14:57:42 +02003903 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003904 u8 rmpn[0x18];
3905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907};
3908
3909struct mlx5_ifc_query_qp_out_bits {
3910 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003911 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003912
3913 u8 syndrome[0x20];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 u8 opt_param_mask[0x20];
3918
Matan Barakb4ff3a32016-02-09 14:57:42 +02003919 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920
3921 struct mlx5_ifc_qpc_bits qpc;
3922
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924
3925 u8 pas[0][0x40];
3926};
3927
3928struct mlx5_ifc_query_qp_in_bits {
3929 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003930 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003931
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933 u8 op_mod[0x10];
3934
Matan Barakb4ff3a32016-02-09 14:57:42 +02003935 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003936 u8 qpn[0x18];
3937
Matan Barakb4ff3a32016-02-09 14:57:42 +02003938 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003939};
3940
3941struct mlx5_ifc_query_q_counter_out_bits {
3942 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944
3945 u8 syndrome[0x20];
3946
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
3949 u8 rx_write_requests[0x20];
3950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952
3953 u8 rx_read_requests[0x20];
3954
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956
3957 u8 rx_atomic_requests[0x20];
3958
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960
3961 u8 rx_dct_connect[0x20];
3962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964
3965 u8 out_of_buffer[0x20];
3966
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
3969 u8 out_of_sequence[0x20];
3970
Saeed Mahameed74862162016-06-09 15:11:34 +03003971 u8 reserved_at_1e0[0x20];
3972
3973 u8 duplicate_request[0x20];
3974
3975 u8 reserved_at_220[0x20];
3976
3977 u8 rnr_nak_retry_err[0x20];
3978
3979 u8 reserved_at_260[0x20];
3980
3981 u8 packet_seq_err[0x20];
3982
3983 u8 reserved_at_2a0[0x20];
3984
3985 u8 implied_nak_seq_err[0x20];
3986
3987 u8 reserved_at_2e0[0x20];
3988
3989 u8 local_ack_timeout_err[0x20];
3990
Parav Pandit58dcb602017-06-19 07:19:37 +03003991 u8 reserved_at_320[0xa0];
3992
3993 u8 resp_local_length_error[0x20];
3994
3995 u8 req_local_length_error[0x20];
3996
3997 u8 resp_local_qp_error[0x20];
3998
3999 u8 local_operation_error[0x20];
4000
4001 u8 resp_local_protection[0x20];
4002
4003 u8 req_local_protection[0x20];
4004
4005 u8 resp_cqe_error[0x20];
4006
4007 u8 req_cqe_error[0x20];
4008
4009 u8 req_mw_binding[0x20];
4010
4011 u8 req_bad_response[0x20];
4012
4013 u8 req_remote_invalid_request[0x20];
4014
4015 u8 resp_remote_invalid_request[0x20];
4016
4017 u8 req_remote_access_errors[0x20];
4018
4019 u8 resp_remote_access_errors[0x20];
4020
4021 u8 req_remote_operation_errors[0x20];
4022
4023 u8 req_transport_retries_exceeded[0x20];
4024
4025 u8 cq_overflow[0x20];
4026
4027 u8 resp_cqe_flush_error[0x20];
4028
4029 u8 req_cqe_flush_error[0x20];
4030
4031 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032};
4033
4034struct mlx5_ifc_query_q_counter_in_bits {
4035 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039 u8 op_mod[0x10];
4040
Matan Barakb4ff3a32016-02-09 14:57:42 +02004041 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004042
4043 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047 u8 counter_set_id[0x8];
4048};
4049
4050struct mlx5_ifc_query_pages_out_bits {
4051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053
4054 u8 syndrome[0x20];
4055
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057 u8 function_id[0x10];
4058
4059 u8 num_pages[0x20];
4060};
4061
4062enum {
4063 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4064 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4065 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4066};
4067
4068struct mlx5_ifc_query_pages_in_bits {
4069 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073 u8 op_mod[0x10];
4074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076 u8 function_id[0x10];
4077
Matan Barakb4ff3a32016-02-09 14:57:42 +02004078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004079};
4080
4081struct mlx5_ifc_query_nic_vport_context_out_bits {
4082 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
4085 u8 syndrome[0x20];
4086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088
4089 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4090};
4091
4092struct mlx5_ifc_query_nic_vport_context_in_bits {
4093 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097 u8 op_mod[0x10];
4098
4099 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101 u8 vport_number[0x10];
4102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106};
4107
4108struct mlx5_ifc_query_mkey_out_bits {
4109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111
4112 u8 syndrome[0x20];
4113
Matan Barakb4ff3a32016-02-09 14:57:42 +02004114 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004115
4116 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4117
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119
4120 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4121
4122 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4123};
4124
4125struct mlx5_ifc_query_mkey_in_bits {
4126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128
Matan Barakb4ff3a32016-02-09 14:57:42 +02004129 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004130 u8 op_mod[0x10];
4131
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133 u8 mkey_index[0x18];
4134
4135 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004136 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004137};
4138
4139struct mlx5_ifc_query_mad_demux_out_bits {
4140 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004141 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004142
4143 u8 syndrome[0x20];
4144
Matan Barakb4ff3a32016-02-09 14:57:42 +02004145 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004146
4147 u8 mad_dumux_parameters_block[0x20];
4148};
4149
4150struct mlx5_ifc_query_mad_demux_in_bits {
4151 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155 u8 op_mod[0x10];
4156
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158};
4159
4160struct mlx5_ifc_query_l2_table_entry_out_bits {
4161 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004162 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004163
4164 u8 syndrome[0x20];
4165
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169 u8 vlan_valid[0x1];
4170 u8 vlan[0xc];
4171
4172 struct mlx5_ifc_mac_address_layout_bits mac_address;
4173
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175};
4176
4177struct mlx5_ifc_query_l2_table_entry_in_bits {
4178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
Matan Barakb4ff3a32016-02-09 14:57:42 +02004181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004182 u8 op_mod[0x10];
4183
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187 u8 table_index[0x18];
4188
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190};
4191
4192struct mlx5_ifc_query_issi_out_bits {
4193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
4196 u8 syndrome[0x20];
4197
Matan Barakb4ff3a32016-02-09 14:57:42 +02004198 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004199 u8 current_issi[0x10];
4200
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204 u8 supported_issi_dw0[0x20];
4205};
4206
4207struct mlx5_ifc_query_issi_in_bits {
4208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004210
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212 u8 op_mod[0x10];
4213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215};
4216
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004217struct mlx5_ifc_set_driver_version_out_bits {
4218 u8 status[0x8];
4219 u8 reserved_0[0x18];
4220
4221 u8 syndrome[0x20];
4222 u8 reserved_1[0x40];
4223};
4224
4225struct mlx5_ifc_set_driver_version_in_bits {
4226 u8 opcode[0x10];
4227 u8 reserved_0[0x10];
4228
4229 u8 reserved_1[0x10];
4230 u8 op_mod[0x10];
4231
4232 u8 reserved_2[0x40];
4233 u8 driver_version[64][0x8];
4234};
4235
Saeed Mahameede2816822015-05-28 22:28:40 +03004236struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4237 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
4240 u8 syndrome[0x20];
4241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243
4244 struct mlx5_ifc_pkey_bits pkey[0];
4245};
4246
4247struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4248 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252 u8 op_mod[0x10];
4253
4254 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004256 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257 u8 vport_number[0x10];
4258
Matan Barakb4ff3a32016-02-09 14:57:42 +02004259 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004260 u8 pkey_index[0x10];
4261};
4262
Eli Coheneff901d2016-03-11 22:58:42 +02004263enum {
4264 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4265 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4266 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4267};
4268
Saeed Mahameede2816822015-05-28 22:28:40 +03004269struct mlx5_ifc_query_hca_vport_gid_out_bits {
4270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272
4273 u8 syndrome[0x20];
4274
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276
4277 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279
4280 struct mlx5_ifc_array128_auto_bits gid[0];
4281};
4282
4283struct mlx5_ifc_query_hca_vport_gid_in_bits {
4284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288 u8 op_mod[0x10];
4289
4290 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004292 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004293 u8 vport_number[0x10];
4294
Matan Barakb4ff3a32016-02-09 14:57:42 +02004295 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004296 u8 gid_index[0x10];
4297};
4298
4299struct mlx5_ifc_query_hca_vport_context_out_bits {
4300 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302
4303 u8 syndrome[0x20];
4304
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306
4307 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4308};
4309
4310struct mlx5_ifc_query_hca_vport_context_in_bits {
4311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315 u8 op_mod[0x10];
4316
4317 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004319 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320 u8 vport_number[0x10];
4321
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323};
4324
4325struct mlx5_ifc_query_hca_cap_out_bits {
4326 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
4329 u8 syndrome[0x20];
4330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332
4333 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004334};
4335
4336struct mlx5_ifc_query_hca_cap_in_bits {
4337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004339
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004341 u8 op_mod[0x10];
4342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004344};
4345
Saeed Mahameede2816822015-05-28 22:28:40 +03004346struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004349
4350 u8 syndrome[0x20];
4351
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 log_size[0x8];
4358
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004360};
4361
Saeed Mahameede2816822015-05-28 22:28:40 +03004362struct mlx5_ifc_query_flow_table_in_bits {
4363 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365
Matan Barakb4ff3a32016-02-09 14:57:42 +02004366 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004367 u8 op_mod[0x10];
4368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370
4371 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375 u8 table_id[0x18];
4376
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378};
4379
4380struct mlx5_ifc_query_fte_out_bits {
4381 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004382 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004383
4384 u8 syndrome[0x20];
4385
Matan Barakb4ff3a32016-02-09 14:57:42 +02004386 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004387
4388 struct mlx5_ifc_flow_context_bits flow_context;
4389};
4390
4391struct mlx5_ifc_query_fte_in_bits {
4392 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004393 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004394
Matan Barakb4ff3a32016-02-09 14:57:42 +02004395 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396 u8 op_mod[0x10];
4397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399
4400 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004401 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004402
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404 u8 table_id[0x18];
4405
Matan Barakb4ff3a32016-02-09 14:57:42 +02004406 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004407
4408 u8 flow_index[0x20];
4409
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411};
4412
4413enum {
4414 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4415 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4416 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4417};
4418
4419struct mlx5_ifc_query_flow_group_out_bits {
4420 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422
4423 u8 syndrome[0x20];
4424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426
4427 u8 start_flow_index[0x20];
4428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430
4431 u8 end_flow_index[0x20];
4432
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436 u8 match_criteria_enable[0x8];
4437
4438 struct mlx5_ifc_fte_match_param_bits match_criteria;
4439
Matan Barakb4ff3a32016-02-09 14:57:42 +02004440 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004441};
4442
4443struct mlx5_ifc_query_flow_group_in_bits {
4444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448 u8 op_mod[0x10];
4449
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004451
4452 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456 u8 table_id[0x18];
4457
4458 u8 group_id[0x20];
4459
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004461};
4462
Amir Vadai9dc0b282016-05-13 12:55:39 +00004463struct mlx5_ifc_query_flow_counter_out_bits {
4464 u8 status[0x8];
4465 u8 reserved_at_8[0x18];
4466
4467 u8 syndrome[0x20];
4468
4469 u8 reserved_at_40[0x40];
4470
4471 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4472};
4473
4474struct mlx5_ifc_query_flow_counter_in_bits {
4475 u8 opcode[0x10];
4476 u8 reserved_at_10[0x10];
4477
4478 u8 reserved_at_20[0x10];
4479 u8 op_mod[0x10];
4480
4481 u8 reserved_at_40[0x80];
4482
4483 u8 clear[0x1];
4484 u8 reserved_at_c1[0xf];
4485 u8 num_of_counters[0x10];
4486
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004487 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004488};
4489
Saeed Mahameedd6666752015-12-01 18:03:22 +02004490struct mlx5_ifc_query_esw_vport_context_out_bits {
4491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004492 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004493
4494 u8 syndrome[0x20];
4495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004497
4498 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4499};
4500
4501struct mlx5_ifc_query_esw_vport_context_in_bits {
4502 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004503 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004504
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004506 u8 op_mod[0x10];
4507
4508 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004510 u8 vport_number[0x10];
4511
Matan Barakb4ff3a32016-02-09 14:57:42 +02004512 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004513};
4514
4515struct mlx5_ifc_modify_esw_vport_context_out_bits {
4516 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004517 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004518
4519 u8 syndrome[0x20];
4520
Matan Barakb4ff3a32016-02-09 14:57:42 +02004521 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004522};
4523
4524struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004526 u8 vport_cvlan_insert[0x1];
4527 u8 vport_svlan_insert[0x1];
4528 u8 vport_cvlan_strip[0x1];
4529 u8 vport_svlan_strip[0x1];
4530};
4531
4532struct mlx5_ifc_modify_esw_vport_context_in_bits {
4533 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004534 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004535
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004537 u8 op_mod[0x10];
4538
4539 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004540 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004541 u8 vport_number[0x10];
4542
4543 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4544
4545 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4546};
4547
Saeed Mahameede2816822015-05-28 22:28:40 +03004548struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004549 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004550 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004551
4552 u8 syndrome[0x20];
4553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555
4556 struct mlx5_ifc_eqc_bits eq_context_entry;
4557
Matan Barakb4ff3a32016-02-09 14:57:42 +02004558 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004559
4560 u8 event_bitmask[0x40];
4561
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004563
4564 u8 pas[0][0x40];
4565};
4566
4567struct mlx5_ifc_query_eq_in_bits {
4568 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004569 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004570
Matan Barakb4ff3a32016-02-09 14:57:42 +02004571 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004572 u8 op_mod[0x10];
4573
Matan Barakb4ff3a32016-02-09 14:57:42 +02004574 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004575 u8 eq_number[0x8];
4576
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004578};
4579
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004580struct mlx5_ifc_encap_header_in_bits {
4581 u8 reserved_at_0[0x5];
4582 u8 header_type[0x3];
4583 u8 reserved_at_8[0xe];
4584 u8 encap_header_size[0xa];
4585
4586 u8 reserved_at_20[0x10];
4587 u8 encap_header[2][0x8];
4588
4589 u8 more_encap_header[0][0x8];
4590};
4591
4592struct mlx5_ifc_query_encap_header_out_bits {
4593 u8 status[0x8];
4594 u8 reserved_at_8[0x18];
4595
4596 u8 syndrome[0x20];
4597
4598 u8 reserved_at_40[0xa0];
4599
4600 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4601};
4602
4603struct mlx5_ifc_query_encap_header_in_bits {
4604 u8 opcode[0x10];
4605 u8 reserved_at_10[0x10];
4606
4607 u8 reserved_at_20[0x10];
4608 u8 op_mod[0x10];
4609
4610 u8 encap_id[0x20];
4611
4612 u8 reserved_at_60[0xa0];
4613};
4614
4615struct mlx5_ifc_alloc_encap_header_out_bits {
4616 u8 status[0x8];
4617 u8 reserved_at_8[0x18];
4618
4619 u8 syndrome[0x20];
4620
4621 u8 encap_id[0x20];
4622
4623 u8 reserved_at_60[0x20];
4624};
4625
4626struct mlx5_ifc_alloc_encap_header_in_bits {
4627 u8 opcode[0x10];
4628 u8 reserved_at_10[0x10];
4629
4630 u8 reserved_at_20[0x10];
4631 u8 op_mod[0x10];
4632
4633 u8 reserved_at_40[0xa0];
4634
4635 struct mlx5_ifc_encap_header_in_bits encap_header;
4636};
4637
4638struct mlx5_ifc_dealloc_encap_header_out_bits {
4639 u8 status[0x8];
4640 u8 reserved_at_8[0x18];
4641
4642 u8 syndrome[0x20];
4643
4644 u8 reserved_at_40[0x40];
4645};
4646
4647struct mlx5_ifc_dealloc_encap_header_in_bits {
4648 u8 opcode[0x10];
4649 u8 reserved_at_10[0x10];
4650
4651 u8 reserved_20[0x10];
4652 u8 op_mod[0x10];
4653
4654 u8 encap_id[0x20];
4655
4656 u8 reserved_60[0x20];
4657};
4658
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004659struct mlx5_ifc_set_action_in_bits {
4660 u8 action_type[0x4];
4661 u8 field[0xc];
4662 u8 reserved_at_10[0x3];
4663 u8 offset[0x5];
4664 u8 reserved_at_18[0x3];
4665 u8 length[0x5];
4666
4667 u8 data[0x20];
4668};
4669
4670struct mlx5_ifc_add_action_in_bits {
4671 u8 action_type[0x4];
4672 u8 field[0xc];
4673 u8 reserved_at_10[0x10];
4674
4675 u8 data[0x20];
4676};
4677
4678union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4679 struct mlx5_ifc_set_action_in_bits set_action_in;
4680 struct mlx5_ifc_add_action_in_bits add_action_in;
4681 u8 reserved_at_0[0x40];
4682};
4683
4684enum {
4685 MLX5_ACTION_TYPE_SET = 0x1,
4686 MLX5_ACTION_TYPE_ADD = 0x2,
4687};
4688
4689enum {
4690 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4691 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4692 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4693 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4694 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4695 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4696 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4697 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4698 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4699 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4700 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4701 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4702 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4703 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4704 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4705 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4706 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4707 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4708 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4709 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4710 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4711 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004712 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004713};
4714
4715struct mlx5_ifc_alloc_modify_header_context_out_bits {
4716 u8 status[0x8];
4717 u8 reserved_at_8[0x18];
4718
4719 u8 syndrome[0x20];
4720
4721 u8 modify_header_id[0x20];
4722
4723 u8 reserved_at_60[0x20];
4724};
4725
4726struct mlx5_ifc_alloc_modify_header_context_in_bits {
4727 u8 opcode[0x10];
4728 u8 reserved_at_10[0x10];
4729
4730 u8 reserved_at_20[0x10];
4731 u8 op_mod[0x10];
4732
4733 u8 reserved_at_40[0x20];
4734
4735 u8 table_type[0x8];
4736 u8 reserved_at_68[0x10];
4737 u8 num_of_actions[0x8];
4738
4739 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4740};
4741
4742struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4743 u8 status[0x8];
4744 u8 reserved_at_8[0x18];
4745
4746 u8 syndrome[0x20];
4747
4748 u8 reserved_at_40[0x40];
4749};
4750
4751struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4752 u8 opcode[0x10];
4753 u8 reserved_at_10[0x10];
4754
4755 u8 reserved_at_20[0x10];
4756 u8 op_mod[0x10];
4757
4758 u8 modify_header_id[0x20];
4759
4760 u8 reserved_at_60[0x20];
4761};
4762
Saeed Mahameede2816822015-05-28 22:28:40 +03004763struct mlx5_ifc_query_dct_out_bits {
4764 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004766
4767 u8 syndrome[0x20];
4768
Matan Barakb4ff3a32016-02-09 14:57:42 +02004769 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770
4771 struct mlx5_ifc_dctc_bits dct_context_entry;
4772
Matan Barakb4ff3a32016-02-09 14:57:42 +02004773 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004774};
4775
4776struct mlx5_ifc_query_dct_in_bits {
4777 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004778 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779
Matan Barakb4ff3a32016-02-09 14:57:42 +02004780 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004781 u8 op_mod[0x10];
4782
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784 u8 dctn[0x18];
4785
Matan Barakb4ff3a32016-02-09 14:57:42 +02004786 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004787};
4788
4789struct mlx5_ifc_query_cq_out_bits {
4790 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004791 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004792
4793 u8 syndrome[0x20];
4794
Matan Barakb4ff3a32016-02-09 14:57:42 +02004795 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004796
4797 struct mlx5_ifc_cqc_bits cq_context;
4798
Matan Barakb4ff3a32016-02-09 14:57:42 +02004799 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800
4801 u8 pas[0][0x40];
4802};
4803
4804struct mlx5_ifc_query_cq_in_bits {
4805 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807
Matan Barakb4ff3a32016-02-09 14:57:42 +02004808 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004809 u8 op_mod[0x10];
4810
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812 u8 cqn[0x18];
4813
Matan Barakb4ff3a32016-02-09 14:57:42 +02004814 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004815};
4816
4817struct mlx5_ifc_query_cong_status_out_bits {
4818 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004820
4821 u8 syndrome[0x20];
4822
Matan Barakb4ff3a32016-02-09 14:57:42 +02004823 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004824
4825 u8 enable[0x1];
4826 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828};
4829
4830struct mlx5_ifc_query_cong_status_in_bits {
4831 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004832 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004833
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835 u8 op_mod[0x10];
4836
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838 u8 priority[0x4];
4839 u8 cong_protocol[0x4];
4840
Matan Barakb4ff3a32016-02-09 14:57:42 +02004841 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004842};
4843
4844struct mlx5_ifc_query_cong_statistics_out_bits {
4845 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004846 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004847
4848 u8 syndrome[0x20];
4849
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851
Parav Pandite1f24a72017-04-16 07:29:29 +03004852 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853
4854 u8 sum_flows[0x20];
4855
Parav Pandite1f24a72017-04-16 07:29:29 +03004856 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004857
Parav Pandite1f24a72017-04-16 07:29:29 +03004858 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859
Parav Pandite1f24a72017-04-16 07:29:29 +03004860 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
Parav Pandite1f24a72017-04-16 07:29:29 +03004862 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863
Matan Barakb4ff3a32016-02-09 14:57:42 +02004864 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004865
4866 u8 time_stamp_high[0x20];
4867
4868 u8 time_stamp_low[0x20];
4869
4870 u8 accumulators_period[0x20];
4871
Parav Pandite1f24a72017-04-16 07:29:29 +03004872 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
Parav Pandite1f24a72017-04-16 07:29:29 +03004874 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875
Parav Pandite1f24a72017-04-16 07:29:29 +03004876 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877
Parav Pandite1f24a72017-04-16 07:29:29 +03004878 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004879
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881};
4882
4883struct mlx5_ifc_query_cong_statistics_in_bits {
4884 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886
Matan Barakb4ff3a32016-02-09 14:57:42 +02004887 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888 u8 op_mod[0x10];
4889
4890 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004891 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004892
Matan Barakb4ff3a32016-02-09 14:57:42 +02004893 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004894};
4895
4896struct mlx5_ifc_query_cong_params_out_bits {
4897 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899
4900 u8 syndrome[0x20];
4901
Matan Barakb4ff3a32016-02-09 14:57:42 +02004902 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903
4904 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4905};
4906
4907struct mlx5_ifc_query_cong_params_in_bits {
4908 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004909 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004910
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912 u8 op_mod[0x10];
4913
Matan Barakb4ff3a32016-02-09 14:57:42 +02004914 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004915 u8 cong_protocol[0x4];
4916
Matan Barakb4ff3a32016-02-09 14:57:42 +02004917 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004918};
4919
4920struct mlx5_ifc_query_adapter_out_bits {
4921 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923
4924 u8 syndrome[0x20];
4925
Matan Barakb4ff3a32016-02-09 14:57:42 +02004926 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004927
4928 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4929};
4930
4931struct mlx5_ifc_query_adapter_in_bits {
4932 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004933 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004934
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936 u8 op_mod[0x10];
4937
Matan Barakb4ff3a32016-02-09 14:57:42 +02004938 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004939};
4940
4941struct mlx5_ifc_qp_2rst_out_bits {
4942 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944
4945 u8 syndrome[0x20];
4946
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948};
4949
4950struct mlx5_ifc_qp_2rst_in_bits {
4951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955 u8 op_mod[0x10];
4956
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958 u8 qpn[0x18];
4959
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961};
4962
4963struct mlx5_ifc_qp_2err_out_bits {
4964 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
4967 u8 syndrome[0x20];
4968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970};
4971
4972struct mlx5_ifc_qp_2err_in_bits {
4973 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977 u8 op_mod[0x10];
4978
Matan Barakb4ff3a32016-02-09 14:57:42 +02004979 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004980 u8 qpn[0x18];
4981
Matan Barakb4ff3a32016-02-09 14:57:42 +02004982 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983};
4984
4985struct mlx5_ifc_page_fault_resume_out_bits {
4986 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988
4989 u8 syndrome[0x20];
4990
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992};
4993
4994struct mlx5_ifc_page_fault_resume_in_bits {
4995 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999 u8 op_mod[0x10];
5000
5001 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005003 u8 page_fault_type[0x3];
5004 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005006 u8 reserved_at_60[0x8];
5007 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008};
5009
5010struct mlx5_ifc_nop_out_bits {
5011 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005013
5014 u8 syndrome[0x20];
5015
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017};
5018
5019struct mlx5_ifc_nop_in_bits {
5020 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
Matan Barakb4ff3a32016-02-09 14:57:42 +02005023 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005024 u8 op_mod[0x10];
5025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027};
5028
5029struct mlx5_ifc_modify_vport_state_out_bits {
5030 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
5033 u8 syndrome[0x20];
5034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036};
5037
5038struct mlx5_ifc_modify_vport_state_in_bits {
5039 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005040 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005041
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043 u8 op_mod[0x10];
5044
5045 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005047 u8 vport_number[0x10];
5048
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052};
5053
5054struct mlx5_ifc_modify_tis_out_bits {
5055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057
5058 u8 syndrome[0x20];
5059
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061};
5062
majd@mellanox.com75850d02016-01-14 19:13:06 +02005063struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005065
Aviv Heller84df61e2016-05-10 13:47:50 +03005066 u8 reserved_at_20[0x1d];
5067 u8 lag_tx_port_affinity[0x1];
5068 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005069 u8 prio[0x1];
5070};
5071
Saeed Mahameede2816822015-05-28 22:28:40 +03005072struct mlx5_ifc_modify_tis_in_bits {
5073 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077 u8 op_mod[0x10];
5078
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080 u8 tisn[0x18];
5081
Matan Barakb4ff3a32016-02-09 14:57:42 +02005082 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083
majd@mellanox.com75850d02016-01-14 19:13:06 +02005084 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005085
Matan Barakb4ff3a32016-02-09 14:57:42 +02005086 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087
5088 struct mlx5_ifc_tisc_bits ctx;
5089};
5090
Achiad Shochatd9eea402015-08-04 14:05:42 +03005091struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005093
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005095 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005096 u8 reserved_at_3c[0x1];
5097 u8 hash[0x1];
5098 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005099 u8 lro[0x1];
5100};
5101
Saeed Mahameede2816822015-05-28 22:28:40 +03005102struct mlx5_ifc_modify_tir_out_bits {
5103 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005104 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005105
5106 u8 syndrome[0x20];
5107
Matan Barakb4ff3a32016-02-09 14:57:42 +02005108 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109};
5110
5111struct mlx5_ifc_modify_tir_in_bits {
5112 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005113 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005114
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116 u8 op_mod[0x10];
5117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119 u8 tirn[0x18];
5120
Matan Barakb4ff3a32016-02-09 14:57:42 +02005121 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005122
Achiad Shochatd9eea402015-08-04 14:05:42 +03005123 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005124
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
5127 struct mlx5_ifc_tirc_bits ctx;
5128};
5129
5130struct mlx5_ifc_modify_sq_out_bits {
5131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 u8 syndrome[0x20];
5135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137};
5138
5139struct mlx5_ifc_modify_sq_in_bits {
5140 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144 u8 op_mod[0x10];
5145
5146 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005147 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005148 u8 sqn[0x18];
5149
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
5152 u8 modify_bitmask[0x40];
5153
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155
5156 struct mlx5_ifc_sqc_bits ctx;
5157};
5158
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005159struct mlx5_ifc_modify_scheduling_element_out_bits {
5160 u8 status[0x8];
5161 u8 reserved_at_8[0x18];
5162
5163 u8 syndrome[0x20];
5164
5165 u8 reserved_at_40[0x1c0];
5166};
5167
5168enum {
5169 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5170 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5171};
5172
5173struct mlx5_ifc_modify_scheduling_element_in_bits {
5174 u8 opcode[0x10];
5175 u8 reserved_at_10[0x10];
5176
5177 u8 reserved_at_20[0x10];
5178 u8 op_mod[0x10];
5179
5180 u8 scheduling_hierarchy[0x8];
5181 u8 reserved_at_48[0x18];
5182
5183 u8 scheduling_element_id[0x20];
5184
5185 u8 reserved_at_80[0x20];
5186
5187 u8 modify_bitmask[0x20];
5188
5189 u8 reserved_at_c0[0x40];
5190
5191 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5192
5193 u8 reserved_at_300[0x100];
5194};
5195
Saeed Mahameede2816822015-05-28 22:28:40 +03005196struct mlx5_ifc_modify_rqt_out_bits {
5197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005199
5200 u8 syndrome[0x20];
5201
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203};
5204
Achiad Shochat5c503682015-08-04 14:05:43 +03005205struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005207
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005209 u8 rqn_list[0x1];
5210};
5211
Saeed Mahameede2816822015-05-28 22:28:40 +03005212struct mlx5_ifc_modify_rqt_in_bits {
5213 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005214 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005215
Matan Barakb4ff3a32016-02-09 14:57:42 +02005216 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005217 u8 op_mod[0x10];
5218
Matan Barakb4ff3a32016-02-09 14:57:42 +02005219 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220 u8 rqtn[0x18];
5221
Matan Barakb4ff3a32016-02-09 14:57:42 +02005222 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005223
Achiad Shochat5c503682015-08-04 14:05:43 +03005224 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005225
Matan Barakb4ff3a32016-02-09 14:57:42 +02005226 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005227
5228 struct mlx5_ifc_rqtc_bits ctx;
5229};
5230
5231struct mlx5_ifc_modify_rq_out_bits {
5232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005234
5235 u8 syndrome[0x20];
5236
Matan Barakb4ff3a32016-02-09 14:57:42 +02005237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005238};
5239
Alex Vesker83b502a2016-08-04 17:32:02 +03005240enum {
5241 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005242 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005243 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005244};
5245
Saeed Mahameede2816822015-05-28 22:28:40 +03005246struct mlx5_ifc_modify_rq_in_bits {
5247 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005248 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005249
Matan Barakb4ff3a32016-02-09 14:57:42 +02005250 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005251 u8 op_mod[0x10];
5252
5253 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255 u8 rqn[0x18];
5256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258
5259 u8 modify_bitmask[0x40];
5260
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262
5263 struct mlx5_ifc_rqc_bits ctx;
5264};
5265
5266struct mlx5_ifc_modify_rmp_out_bits {
5267 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269
5270 u8 syndrome[0x20];
5271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273};
5274
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005275struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005277
Matan Barakb4ff3a32016-02-09 14:57:42 +02005278 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005279 u8 lwm[0x1];
5280};
5281
Saeed Mahameede2816822015-05-28 22:28:40 +03005282struct mlx5_ifc_modify_rmp_in_bits {
5283 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005285
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287 u8 op_mod[0x10];
5288
5289 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291 u8 rmpn[0x18];
5292
Matan Barakb4ff3a32016-02-09 14:57:42 +02005293 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005294
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005295 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005296
Matan Barakb4ff3a32016-02-09 14:57:42 +02005297 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005298
5299 struct mlx5_ifc_rmpc_bits ctx;
5300};
5301
5302struct mlx5_ifc_modify_nic_vport_context_out_bits {
5303 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305
5306 u8 syndrome[0x20];
5307
Matan Barakb4ff3a32016-02-09 14:57:42 +02005308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005309};
5310
5311struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005312 u8 reserved_at_0[0x14];
5313 u8 disable_uc_local_lb[0x1];
5314 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005315 u8 node_guid[0x1];
5316 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005317 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005318 u8 mtu[0x1];
5319 u8 change_event[0x1];
5320 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005321 u8 permanent_address[0x1];
5322 u8 addresses_list[0x1];
5323 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325};
5326
5327struct mlx5_ifc_modify_nic_vport_context_in_bits {
5328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005329 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005330
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332 u8 op_mod[0x10];
5333
5334 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336 u8 vport_number[0x10];
5337
5338 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5339
Matan Barakb4ff3a32016-02-09 14:57:42 +02005340 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005341
5342 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5343};
5344
5345struct mlx5_ifc_modify_hca_vport_context_out_bits {
5346 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005348
5349 u8 syndrome[0x20];
5350
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352};
5353
5354struct mlx5_ifc_modify_hca_vport_context_in_bits {
5355 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359 u8 op_mod[0x10];
5360
5361 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005363 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005364 u8 vport_number[0x10];
5365
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367
5368 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5369};
5370
5371struct mlx5_ifc_modify_cq_out_bits {
5372 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374
5375 u8 syndrome[0x20];
5376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378};
5379
5380enum {
5381 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5382 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5383};
5384
5385struct mlx5_ifc_modify_cq_in_bits {
5386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388
Matan Barakb4ff3a32016-02-09 14:57:42 +02005389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005390 u8 op_mod[0x10];
5391
Matan Barakb4ff3a32016-02-09 14:57:42 +02005392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005393 u8 cqn[0x18];
5394
5395 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5396
5397 struct mlx5_ifc_cqc_bits cq_context;
5398
Matan Barakb4ff3a32016-02-09 14:57:42 +02005399 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005400
5401 u8 pas[0][0x40];
5402};
5403
5404struct mlx5_ifc_modify_cong_status_out_bits {
5405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407
5408 u8 syndrome[0x20];
5409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411};
5412
5413struct mlx5_ifc_modify_cong_status_in_bits {
5414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418 u8 op_mod[0x10];
5419
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421 u8 priority[0x4];
5422 u8 cong_protocol[0x4];
5423
5424 u8 enable[0x1];
5425 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427};
5428
5429struct mlx5_ifc_modify_cong_params_out_bits {
5430 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432
5433 u8 syndrome[0x20];
5434
Matan Barakb4ff3a32016-02-09 14:57:42 +02005435 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005436};
5437
5438struct mlx5_ifc_modify_cong_params_in_bits {
5439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443 u8 op_mod[0x10];
5444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446 u8 cong_protocol[0x4];
5447
5448 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451
5452 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5453};
5454
5455struct mlx5_ifc_manage_pages_out_bits {
5456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005458
5459 u8 syndrome[0x20];
5460
5461 u8 output_num_entries[0x20];
5462
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
5465 u8 pas[0][0x40];
5466};
5467
5468enum {
5469 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5470 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5471 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5472};
5473
5474struct mlx5_ifc_manage_pages_in_bits {
5475 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005476 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005477
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479 u8 op_mod[0x10];
5480
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482 u8 function_id[0x10];
5483
5484 u8 input_num_entries[0x20];
5485
5486 u8 pas[0][0x40];
5487};
5488
5489struct mlx5_ifc_mad_ifc_out_bits {
5490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 u8 syndrome[0x20];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 u8 response_mad_packet[256][0x8];
5498};
5499
5500struct mlx5_ifc_mad_ifc_in_bits {
5501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505 u8 op_mod[0x10];
5506
5507 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509 u8 port[0x8];
5510
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512
5513 u8 mad[256][0x8];
5514};
5515
5516struct mlx5_ifc_init_hca_out_bits {
5517 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005518 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005519
5520 u8 syndrome[0x20];
5521
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523};
5524
5525struct mlx5_ifc_init_hca_in_bits {
5526 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530 u8 op_mod[0x10];
5531
Matan Barakb4ff3a32016-02-09 14:57:42 +02005532 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005533};
5534
5535struct mlx5_ifc_init2rtr_qp_out_bits {
5536 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538
5539 u8 syndrome[0x20];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542};
5543
5544struct mlx5_ifc_init2rtr_qp_in_bits {
5545 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
Matan Barakb4ff3a32016-02-09 14:57:42 +02005548 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005549 u8 op_mod[0x10];
5550
Matan Barakb4ff3a32016-02-09 14:57:42 +02005551 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005552 u8 qpn[0x18];
5553
Matan Barakb4ff3a32016-02-09 14:57:42 +02005554 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005555
5556 u8 opt_param_mask[0x20];
5557
Matan Barakb4ff3a32016-02-09 14:57:42 +02005558 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005559
5560 struct mlx5_ifc_qpc_bits qpc;
5561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563};
5564
5565struct mlx5_ifc_init2init_qp_out_bits {
5566 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568
5569 u8 syndrome[0x20];
5570
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572};
5573
5574struct mlx5_ifc_init2init_qp_in_bits {
5575 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577
Matan Barakb4ff3a32016-02-09 14:57:42 +02005578 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005579 u8 op_mod[0x10];
5580
Matan Barakb4ff3a32016-02-09 14:57:42 +02005581 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005582 u8 qpn[0x18];
5583
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
5586 u8 opt_param_mask[0x20];
5587
Matan Barakb4ff3a32016-02-09 14:57:42 +02005588 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005589
5590 struct mlx5_ifc_qpc_bits qpc;
5591
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593};
5594
5595struct mlx5_ifc_get_dropped_packet_log_out_bits {
5596 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598
5599 u8 syndrome[0x20];
5600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602
5603 u8 packet_headers_log[128][0x8];
5604
5605 u8 packet_syndrome[64][0x8];
5606};
5607
5608struct mlx5_ifc_get_dropped_packet_log_in_bits {
5609 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613 u8 op_mod[0x10];
5614
Matan Barakb4ff3a32016-02-09 14:57:42 +02005615 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005616};
5617
5618struct mlx5_ifc_gen_eqe_in_bits {
5619 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621
Matan Barakb4ff3a32016-02-09 14:57:42 +02005622 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005623 u8 op_mod[0x10];
5624
Matan Barakb4ff3a32016-02-09 14:57:42 +02005625 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005626 u8 eq_number[0x8];
5627
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629
5630 u8 eqe[64][0x8];
5631};
5632
5633struct mlx5_ifc_gen_eq_out_bits {
5634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636
5637 u8 syndrome[0x20];
5638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640};
5641
5642struct mlx5_ifc_enable_hca_out_bits {
5643 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005644 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005645
5646 u8 syndrome[0x20];
5647
Matan Barakb4ff3a32016-02-09 14:57:42 +02005648 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005649};
5650
5651struct mlx5_ifc_enable_hca_in_bits {
5652 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656 u8 op_mod[0x10];
5657
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659 u8 function_id[0x10];
5660
Matan Barakb4ff3a32016-02-09 14:57:42 +02005661 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005662};
5663
5664struct mlx5_ifc_drain_dct_out_bits {
5665 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005666 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005667
5668 u8 syndrome[0x20];
5669
Matan Barakb4ff3a32016-02-09 14:57:42 +02005670 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005671};
5672
5673struct mlx5_ifc_drain_dct_in_bits {
5674 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678 u8 op_mod[0x10];
5679
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681 u8 dctn[0x18];
5682
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684};
5685
5686struct mlx5_ifc_disable_hca_out_bits {
5687 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005688 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689
5690 u8 syndrome[0x20];
5691
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693};
5694
5695struct mlx5_ifc_disable_hca_in_bits {
5696 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700 u8 op_mod[0x10];
5701
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703 u8 function_id[0x10];
5704
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706};
5707
5708struct mlx5_ifc_detach_from_mcg_out_bits {
5709 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711
5712 u8 syndrome[0x20];
5713
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715};
5716
5717struct mlx5_ifc_detach_from_mcg_in_bits {
5718 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720
Matan Barakb4ff3a32016-02-09 14:57:42 +02005721 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005722 u8 op_mod[0x10];
5723
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725 u8 qpn[0x18];
5726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728
5729 u8 multicast_gid[16][0x8];
5730};
5731
Saeed Mahameed74862162016-06-09 15:11:34 +03005732struct mlx5_ifc_destroy_xrq_out_bits {
5733 u8 status[0x8];
5734 u8 reserved_at_8[0x18];
5735
5736 u8 syndrome[0x20];
5737
5738 u8 reserved_at_40[0x40];
5739};
5740
5741struct mlx5_ifc_destroy_xrq_in_bits {
5742 u8 opcode[0x10];
5743 u8 reserved_at_10[0x10];
5744
5745 u8 reserved_at_20[0x10];
5746 u8 op_mod[0x10];
5747
5748 u8 reserved_at_40[0x8];
5749 u8 xrqn[0x18];
5750
5751 u8 reserved_at_60[0x20];
5752};
5753
Saeed Mahameede2816822015-05-28 22:28:40 +03005754struct mlx5_ifc_destroy_xrc_srq_out_bits {
5755 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757
5758 u8 syndrome[0x20];
5759
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761};
5762
5763struct mlx5_ifc_destroy_xrc_srq_in_bits {
5764 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005765 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768 u8 op_mod[0x10];
5769
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771 u8 xrc_srqn[0x18];
5772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774};
5775
5776struct mlx5_ifc_destroy_tis_out_bits {
5777 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005778 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005779
5780 u8 syndrome[0x20];
5781
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783};
5784
5785struct mlx5_ifc_destroy_tis_in_bits {
5786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790 u8 op_mod[0x10];
5791
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793 u8 tisn[0x18];
5794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796};
5797
5798struct mlx5_ifc_destroy_tir_out_bits {
5799 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801
5802 u8 syndrome[0x20];
5803
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805};
5806
5807struct mlx5_ifc_destroy_tir_in_bits {
5808 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812 u8 op_mod[0x10];
5813
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815 u8 tirn[0x18];
5816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818};
5819
5820struct mlx5_ifc_destroy_srq_out_bits {
5821 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823
5824 u8 syndrome[0x20];
5825
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827};
5828
5829struct mlx5_ifc_destroy_srq_in_bits {
5830 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834 u8 op_mod[0x10];
5835
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837 u8 srqn[0x18];
5838
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840};
5841
5842struct mlx5_ifc_destroy_sq_out_bits {
5843 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845
5846 u8 syndrome[0x20];
5847
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849};
5850
5851struct mlx5_ifc_destroy_sq_in_bits {
5852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856 u8 op_mod[0x10];
5857
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859 u8 sqn[0x18];
5860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862};
5863
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005864struct mlx5_ifc_destroy_scheduling_element_out_bits {
5865 u8 status[0x8];
5866 u8 reserved_at_8[0x18];
5867
5868 u8 syndrome[0x20];
5869
5870 u8 reserved_at_40[0x1c0];
5871};
5872
5873struct mlx5_ifc_destroy_scheduling_element_in_bits {
5874 u8 opcode[0x10];
5875 u8 reserved_at_10[0x10];
5876
5877 u8 reserved_at_20[0x10];
5878 u8 op_mod[0x10];
5879
5880 u8 scheduling_hierarchy[0x8];
5881 u8 reserved_at_48[0x18];
5882
5883 u8 scheduling_element_id[0x20];
5884
5885 u8 reserved_at_80[0x180];
5886};
5887
Saeed Mahameede2816822015-05-28 22:28:40 +03005888struct mlx5_ifc_destroy_rqt_out_bits {
5889 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891
5892 u8 syndrome[0x20];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895};
5896
5897struct mlx5_ifc_destroy_rqt_in_bits {
5898 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902 u8 op_mod[0x10];
5903
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905 u8 rqtn[0x18];
5906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908};
5909
5910struct mlx5_ifc_destroy_rq_out_bits {
5911 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913
5914 u8 syndrome[0x20];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917};
5918
5919struct mlx5_ifc_destroy_rq_in_bits {
5920 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924 u8 op_mod[0x10];
5925
Matan Barakb4ff3a32016-02-09 14:57:42 +02005926 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005927 u8 rqn[0x18];
5928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930};
5931
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005932struct mlx5_ifc_set_delay_drop_params_in_bits {
5933 u8 opcode[0x10];
5934 u8 reserved_at_10[0x10];
5935
5936 u8 reserved_at_20[0x10];
5937 u8 op_mod[0x10];
5938
5939 u8 reserved_at_40[0x20];
5940
5941 u8 reserved_at_60[0x10];
5942 u8 delay_drop_timeout[0x10];
5943};
5944
5945struct mlx5_ifc_set_delay_drop_params_out_bits {
5946 u8 status[0x8];
5947 u8 reserved_at_8[0x18];
5948
5949 u8 syndrome[0x20];
5950
5951 u8 reserved_at_40[0x40];
5952};
5953
Saeed Mahameede2816822015-05-28 22:28:40 +03005954struct mlx5_ifc_destroy_rmp_out_bits {
5955 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957
5958 u8 syndrome[0x20];
5959
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961};
5962
5963struct mlx5_ifc_destroy_rmp_in_bits {
5964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005966
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968 u8 op_mod[0x10];
5969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971 u8 rmpn[0x18];
5972
Matan Barakb4ff3a32016-02-09 14:57:42 +02005973 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005974};
5975
5976struct mlx5_ifc_destroy_qp_out_bits {
5977 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979
5980 u8 syndrome[0x20];
5981
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983};
5984
5985struct mlx5_ifc_destroy_qp_in_bits {
5986 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990 u8 op_mod[0x10];
5991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993 u8 qpn[0x18];
5994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996};
5997
5998struct mlx5_ifc_destroy_psv_out_bits {
5999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001
6002 u8 syndrome[0x20];
6003
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005};
6006
6007struct mlx5_ifc_destroy_psv_in_bits {
6008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012 u8 op_mod[0x10];
6013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015 u8 psvn[0x18];
6016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018};
6019
6020struct mlx5_ifc_destroy_mkey_out_bits {
6021 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023
6024 u8 syndrome[0x20];
6025
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027};
6028
6029struct mlx5_ifc_destroy_mkey_in_bits {
6030 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006031 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006032
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034 u8 op_mod[0x10];
6035
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037 u8 mkey_index[0x18];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040};
6041
6042struct mlx5_ifc_destroy_flow_table_out_bits {
6043 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045
6046 u8 syndrome[0x20];
6047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049};
6050
6051struct mlx5_ifc_destroy_flow_table_in_bits {
6052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006054
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056 u8 op_mod[0x10];
6057
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006058 u8 other_vport[0x1];
6059 u8 reserved_at_41[0xf];
6060 u8 vport_number[0x10];
6061
6062 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063
6064 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068 u8 table_id[0x18];
6069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071};
6072
6073struct mlx5_ifc_destroy_flow_group_out_bits {
6074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006076
6077 u8 syndrome[0x20];
6078
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080};
6081
6082struct mlx5_ifc_destroy_flow_group_in_bits {
6083 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087 u8 op_mod[0x10];
6088
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006089 u8 other_vport[0x1];
6090 u8 reserved_at_41[0xf];
6091 u8 vport_number[0x10];
6092
6093 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094
6095 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099 u8 table_id[0x18];
6100
6101 u8 group_id[0x20];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104};
6105
6106struct mlx5_ifc_destroy_eq_out_bits {
6107 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109
6110 u8 syndrome[0x20];
6111
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113};
6114
6115struct mlx5_ifc_destroy_eq_in_bits {
6116 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120 u8 op_mod[0x10];
6121
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123 u8 eq_number[0x8];
6124
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126};
6127
6128struct mlx5_ifc_destroy_dct_out_bits {
6129 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131
6132 u8 syndrome[0x20];
6133
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135};
6136
6137struct mlx5_ifc_destroy_dct_in_bits {
6138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142 u8 op_mod[0x10];
6143
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145 u8 dctn[0x18];
6146
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148};
6149
6150struct mlx5_ifc_destroy_cq_out_bits {
6151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153
6154 u8 syndrome[0x20];
6155
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157};
6158
6159struct mlx5_ifc_destroy_cq_in_bits {
6160 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164 u8 op_mod[0x10];
6165
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167 u8 cqn[0x18];
6168
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170};
6171
6172struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6173 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175
6176 u8 syndrome[0x20];
6177
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179};
6180
6181struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186 u8 op_mod[0x10];
6187
Matan Barakb4ff3a32016-02-09 14:57:42 +02006188 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 vxlan_udp_port[0x10];
6192};
6193
6194struct mlx5_ifc_delete_l2_table_entry_out_bits {
6195 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197
6198 u8 syndrome[0x20];
6199
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201};
6202
6203struct mlx5_ifc_delete_l2_table_entry_in_bits {
6204 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206
Matan Barakb4ff3a32016-02-09 14:57:42 +02006207 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006208 u8 op_mod[0x10];
6209
Matan Barakb4ff3a32016-02-09 14:57:42 +02006210 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006211
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213 u8 table_index[0x18];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216};
6217
6218struct mlx5_ifc_delete_fte_out_bits {
6219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221
6222 u8 syndrome[0x20];
6223
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225};
6226
6227struct mlx5_ifc_delete_fte_in_bits {
6228 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006229 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232 u8 op_mod[0x10];
6233
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006234 u8 other_vport[0x1];
6235 u8 reserved_at_41[0xf];
6236 u8 vport_number[0x10];
6237
6238 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006239
6240 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006241 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006242
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244 u8 table_id[0x18];
6245
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247
6248 u8 flow_index[0x20];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251};
6252
6253struct mlx5_ifc_dealloc_xrcd_out_bits {
6254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256
6257 u8 syndrome[0x20];
6258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260};
6261
6262struct mlx5_ifc_dealloc_xrcd_in_bits {
6263 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267 u8 op_mod[0x10];
6268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270 u8 xrcd[0x18];
6271
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273};
6274
6275struct mlx5_ifc_dealloc_uar_out_bits {
6276 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278
6279 u8 syndrome[0x20];
6280
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282};
6283
6284struct mlx5_ifc_dealloc_uar_in_bits {
6285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289 u8 op_mod[0x10];
6290
Matan Barakb4ff3a32016-02-09 14:57:42 +02006291 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006292 u8 uar[0x18];
6293
Matan Barakb4ff3a32016-02-09 14:57:42 +02006294 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006295};
6296
6297struct mlx5_ifc_dealloc_transport_domain_out_bits {
6298 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006299 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006300
6301 u8 syndrome[0x20];
6302
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304};
6305
6306struct mlx5_ifc_dealloc_transport_domain_in_bits {
6307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311 u8 op_mod[0x10];
6312
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314 u8 transport_domain[0x18];
6315
Matan Barakb4ff3a32016-02-09 14:57:42 +02006316 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006317};
6318
6319struct mlx5_ifc_dealloc_q_counter_out_bits {
6320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322
6323 u8 syndrome[0x20];
6324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326};
6327
6328struct mlx5_ifc_dealloc_q_counter_in_bits {
6329 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006330 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006331
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333 u8 op_mod[0x10];
6334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336 u8 counter_set_id[0x8];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339};
6340
6341struct mlx5_ifc_dealloc_pd_out_bits {
6342 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344
6345 u8 syndrome[0x20];
6346
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348};
6349
6350struct mlx5_ifc_dealloc_pd_in_bits {
6351 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
Matan Barakb4ff3a32016-02-09 14:57:42 +02006354 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006355 u8 op_mod[0x10];
6356
Matan Barakb4ff3a32016-02-09 14:57:42 +02006357 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006358 u8 pd[0x18];
6359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361};
6362
Amir Vadai9dc0b282016-05-13 12:55:39 +00006363struct mlx5_ifc_dealloc_flow_counter_out_bits {
6364 u8 status[0x8];
6365 u8 reserved_at_8[0x18];
6366
6367 u8 syndrome[0x20];
6368
6369 u8 reserved_at_40[0x40];
6370};
6371
6372struct mlx5_ifc_dealloc_flow_counter_in_bits {
6373 u8 opcode[0x10];
6374 u8 reserved_at_10[0x10];
6375
6376 u8 reserved_at_20[0x10];
6377 u8 op_mod[0x10];
6378
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006379 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006380
6381 u8 reserved_at_60[0x20];
6382};
6383
Saeed Mahameed74862162016-06-09 15:11:34 +03006384struct mlx5_ifc_create_xrq_out_bits {
6385 u8 status[0x8];
6386 u8 reserved_at_8[0x18];
6387
6388 u8 syndrome[0x20];
6389
6390 u8 reserved_at_40[0x8];
6391 u8 xrqn[0x18];
6392
6393 u8 reserved_at_60[0x20];
6394};
6395
6396struct mlx5_ifc_create_xrq_in_bits {
6397 u8 opcode[0x10];
6398 u8 reserved_at_10[0x10];
6399
6400 u8 reserved_at_20[0x10];
6401 u8 op_mod[0x10];
6402
6403 u8 reserved_at_40[0x40];
6404
6405 struct mlx5_ifc_xrqc_bits xrq_context;
6406};
6407
Saeed Mahameede2816822015-05-28 22:28:40 +03006408struct mlx5_ifc_create_xrc_srq_out_bits {
6409 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006410 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006411
6412 u8 syndrome[0x20];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415 u8 xrc_srqn[0x18];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418};
6419
6420struct mlx5_ifc_create_xrc_srq_in_bits {
6421 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425 u8 op_mod[0x10];
6426
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428
6429 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6430
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432
6433 u8 pas[0][0x40];
6434};
6435
6436struct mlx5_ifc_create_tis_out_bits {
6437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439
6440 u8 syndrome[0x20];
6441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443 u8 tisn[0x18];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446};
6447
6448struct mlx5_ifc_create_tis_in_bits {
6449 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453 u8 op_mod[0x10];
6454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456
6457 struct mlx5_ifc_tisc_bits ctx;
6458};
6459
6460struct mlx5_ifc_create_tir_out_bits {
6461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463
6464 u8 syndrome[0x20];
6465
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467 u8 tirn[0x18];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470};
6471
6472struct mlx5_ifc_create_tir_in_bits {
6473 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477 u8 op_mod[0x10];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480
6481 struct mlx5_ifc_tirc_bits ctx;
6482};
6483
6484struct mlx5_ifc_create_srq_out_bits {
6485 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006486 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006487
6488 u8 syndrome[0x20];
6489
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491 u8 srqn[0x18];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494};
6495
6496struct mlx5_ifc_create_srq_in_bits {
6497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006498 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006499
Matan Barakb4ff3a32016-02-09 14:57:42 +02006500 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006501 u8 op_mod[0x10];
6502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504
6505 struct mlx5_ifc_srqc_bits srq_context_entry;
6506
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
6509 u8 pas[0][0x40];
6510};
6511
6512struct mlx5_ifc_create_sq_out_bits {
6513 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515
6516 u8 syndrome[0x20];
6517
Matan Barakb4ff3a32016-02-09 14:57:42 +02006518 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006519 u8 sqn[0x18];
6520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522};
6523
6524struct mlx5_ifc_create_sq_in_bits {
6525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
Matan Barakb4ff3a32016-02-09 14:57:42 +02006528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006529 u8 op_mod[0x10];
6530
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
6533 struct mlx5_ifc_sqc_bits ctx;
6534};
6535
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006536struct mlx5_ifc_create_scheduling_element_out_bits {
6537 u8 status[0x8];
6538 u8 reserved_at_8[0x18];
6539
6540 u8 syndrome[0x20];
6541
6542 u8 reserved_at_40[0x40];
6543
6544 u8 scheduling_element_id[0x20];
6545
6546 u8 reserved_at_a0[0x160];
6547};
6548
6549struct mlx5_ifc_create_scheduling_element_in_bits {
6550 u8 opcode[0x10];
6551 u8 reserved_at_10[0x10];
6552
6553 u8 reserved_at_20[0x10];
6554 u8 op_mod[0x10];
6555
6556 u8 scheduling_hierarchy[0x8];
6557 u8 reserved_at_48[0x18];
6558
6559 u8 reserved_at_60[0xa0];
6560
6561 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6562
6563 u8 reserved_at_300[0x100];
6564};
6565
Saeed Mahameede2816822015-05-28 22:28:40 +03006566struct mlx5_ifc_create_rqt_out_bits {
6567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569
6570 u8 syndrome[0x20];
6571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573 u8 rqtn[0x18];
6574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576};
6577
6578struct mlx5_ifc_create_rqt_in_bits {
6579 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
Matan Barakb4ff3a32016-02-09 14:57:42 +02006582 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006583 u8 op_mod[0x10];
6584
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
6587 struct mlx5_ifc_rqtc_bits rqt_context;
6588};
6589
6590struct mlx5_ifc_create_rq_out_bits {
6591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
6594 u8 syndrome[0x20];
6595
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597 u8 rqn[0x18];
6598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600};
6601
6602struct mlx5_ifc_create_rq_in_bits {
6603 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607 u8 op_mod[0x10];
6608
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
6611 struct mlx5_ifc_rqc_bits ctx;
6612};
6613
6614struct mlx5_ifc_create_rmp_out_bits {
6615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617
6618 u8 syndrome[0x20];
6619
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621 u8 rmpn[0x18];
6622
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624};
6625
6626struct mlx5_ifc_create_rmp_in_bits {
6627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631 u8 op_mod[0x10];
6632
Matan Barakb4ff3a32016-02-09 14:57:42 +02006633 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006634
6635 struct mlx5_ifc_rmpc_bits ctx;
6636};
6637
6638struct mlx5_ifc_create_qp_out_bits {
6639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641
6642 u8 syndrome[0x20];
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645 u8 qpn[0x18];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648};
6649
6650struct mlx5_ifc_create_qp_in_bits {
6651 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655 u8 op_mod[0x10];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658
6659 u8 opt_param_mask[0x20];
6660
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
6663 struct mlx5_ifc_qpc_bits qpc;
6664
Matan Barakb4ff3a32016-02-09 14:57:42 +02006665 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006666
6667 u8 pas[0][0x40];
6668};
6669
6670struct mlx5_ifc_create_psv_out_bits {
6671 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006672 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006673
6674 u8 syndrome[0x20];
6675
Matan Barakb4ff3a32016-02-09 14:57:42 +02006676 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679 u8 psv0_index[0x18];
6680
Matan Barakb4ff3a32016-02-09 14:57:42 +02006681 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006682 u8 psv1_index[0x18];
6683
Matan Barakb4ff3a32016-02-09 14:57:42 +02006684 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006685 u8 psv2_index[0x18];
6686
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688 u8 psv3_index[0x18];
6689};
6690
6691struct mlx5_ifc_create_psv_in_bits {
6692 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696 u8 op_mod[0x10];
6697
6698 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700 u8 pd[0x18];
6701
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703};
6704
6705struct mlx5_ifc_create_mkey_out_bits {
6706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
6709 u8 syndrome[0x20];
6710
Matan Barakb4ff3a32016-02-09 14:57:42 +02006711 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006712 u8 mkey_index[0x18];
6713
Matan Barakb4ff3a32016-02-09 14:57:42 +02006714 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006715};
6716
6717struct mlx5_ifc_create_mkey_in_bits {
6718 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722 u8 op_mod[0x10];
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006727 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006728
6729 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732
6733 u8 translations_octword_actual_size[0x20];
6734
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736
6737 u8 klm_pas_mtt[0][0x20];
6738};
6739
6740struct mlx5_ifc_create_flow_table_out_bits {
6741 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743
6744 u8 syndrome[0x20];
6745
Matan Barakb4ff3a32016-02-09 14:57:42 +02006746 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006747 u8 table_id[0x18];
6748
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750};
6751
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006752struct mlx5_ifc_flow_table_context_bits {
6753 u8 encap_en[0x1];
6754 u8 decap_en[0x1];
6755 u8 reserved_at_2[0x2];
6756 u8 table_miss_action[0x4];
6757 u8 level[0x8];
6758 u8 reserved_at_10[0x8];
6759 u8 log_size[0x8];
6760
6761 u8 reserved_at_20[0x8];
6762 u8 table_miss_id[0x18];
6763
6764 u8 reserved_at_40[0x8];
6765 u8 lag_master_next_table_id[0x18];
6766
6767 u8 reserved_at_60[0xe0];
6768};
6769
Saeed Mahameede2816822015-05-28 22:28:40 +03006770struct mlx5_ifc_create_flow_table_in_bits {
6771 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006772 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 op_mod[0x10];
6776
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006777 u8 other_vport[0x1];
6778 u8 reserved_at_41[0xf];
6779 u8 vport_number[0x10];
6780
6781 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006782
6783 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785
Matan Barakb4ff3a32016-02-09 14:57:42 +02006786 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006787
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006788 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006789};
6790
6791struct mlx5_ifc_create_flow_group_out_bits {
6792 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794
6795 u8 syndrome[0x20];
6796
Matan Barakb4ff3a32016-02-09 14:57:42 +02006797 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006798 u8 group_id[0x18];
6799
Matan Barakb4ff3a32016-02-09 14:57:42 +02006800 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006801};
6802
6803enum {
6804 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6805 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6806 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6807};
6808
6809struct mlx5_ifc_create_flow_group_in_bits {
6810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814 u8 op_mod[0x10];
6815
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006816 u8 other_vport[0x1];
6817 u8 reserved_at_41[0xf];
6818 u8 vport_number[0x10];
6819
6820 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
6822 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826 u8 table_id[0x18];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829
6830 u8 start_flow_index[0x20];
6831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833
6834 u8 end_flow_index[0x20];
6835
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839 u8 match_criteria_enable[0x8];
6840
6841 struct mlx5_ifc_fte_match_param_bits match_criteria;
6842
Matan Barakb4ff3a32016-02-09 14:57:42 +02006843 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006844};
6845
6846struct mlx5_ifc_create_eq_out_bits {
6847 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006848 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006849
6850 u8 syndrome[0x20];
6851
Matan Barakb4ff3a32016-02-09 14:57:42 +02006852 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006853 u8 eq_number[0x8];
6854
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856};
6857
6858struct mlx5_ifc_create_eq_in_bits {
6859 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
Matan Barakb4ff3a32016-02-09 14:57:42 +02006862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006863 u8 op_mod[0x10];
6864
Matan Barakb4ff3a32016-02-09 14:57:42 +02006865 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006866
6867 struct mlx5_ifc_eqc_bits eq_context_entry;
6868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870
6871 u8 event_bitmask[0x40];
6872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874
6875 u8 pas[0][0x40];
6876};
6877
6878struct mlx5_ifc_create_dct_out_bits {
6879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881
6882 u8 syndrome[0x20];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885 u8 dctn[0x18];
6886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888};
6889
6890struct mlx5_ifc_create_dct_in_bits {
6891 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006892 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895 u8 op_mod[0x10];
6896
Matan Barakb4ff3a32016-02-09 14:57:42 +02006897 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006898
6899 struct mlx5_ifc_dctc_bits dct_context_entry;
6900
Matan Barakb4ff3a32016-02-09 14:57:42 +02006901 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006902};
6903
6904struct mlx5_ifc_create_cq_out_bits {
6905 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907
6908 u8 syndrome[0x20];
6909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911 u8 cqn[0x18];
6912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914};
6915
6916struct mlx5_ifc_create_cq_in_bits {
6917 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006918 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006919
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921 u8 op_mod[0x10];
6922
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
6925 struct mlx5_ifc_cqc_bits cq_context;
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928
6929 u8 pas[0][0x40];
6930};
6931
6932struct mlx5_ifc_config_int_moderation_out_bits {
6933 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935
6936 u8 syndrome[0x20];
6937
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939 u8 min_delay[0xc];
6940 u8 int_vector[0x10];
6941
Matan Barakb4ff3a32016-02-09 14:57:42 +02006942 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006943};
6944
6945enum {
6946 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6947 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6948};
6949
6950struct mlx5_ifc_config_int_moderation_in_bits {
6951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955 u8 op_mod[0x10];
6956
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958 u8 min_delay[0xc];
6959 u8 int_vector[0x10];
6960
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962};
6963
6964struct mlx5_ifc_attach_to_mcg_out_bits {
6965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006967
6968 u8 syndrome[0x20];
6969
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971};
6972
6973struct mlx5_ifc_attach_to_mcg_in_bits {
6974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976
Matan Barakb4ff3a32016-02-09 14:57:42 +02006977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006978 u8 op_mod[0x10];
6979
Matan Barakb4ff3a32016-02-09 14:57:42 +02006980 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006981 u8 qpn[0x18];
6982
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 multicast_gid[16][0x8];
6986};
6987
Saeed Mahameed74862162016-06-09 15:11:34 +03006988struct mlx5_ifc_arm_xrq_out_bits {
6989 u8 status[0x8];
6990 u8 reserved_at_8[0x18];
6991
6992 u8 syndrome[0x20];
6993
6994 u8 reserved_at_40[0x40];
6995};
6996
6997struct mlx5_ifc_arm_xrq_in_bits {
6998 u8 opcode[0x10];
6999 u8 reserved_at_10[0x10];
7000
7001 u8 reserved_at_20[0x10];
7002 u8 op_mod[0x10];
7003
7004 u8 reserved_at_40[0x8];
7005 u8 xrqn[0x18];
7006
7007 u8 reserved_at_60[0x10];
7008 u8 lwm[0x10];
7009};
7010
Saeed Mahameede2816822015-05-28 22:28:40 +03007011struct mlx5_ifc_arm_xrc_srq_out_bits {
7012 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014
7015 u8 syndrome[0x20];
7016
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018};
7019
7020enum {
7021 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7022};
7023
7024struct mlx5_ifc_arm_xrc_srq_in_bits {
7025 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027
Matan Barakb4ff3a32016-02-09 14:57:42 +02007028 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007029 u8 op_mod[0x10];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 xrc_srqn[0x18];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035 u8 lwm[0x10];
7036};
7037
7038struct mlx5_ifc_arm_rq_out_bits {
7039 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007040 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007041
7042 u8 syndrome[0x20];
7043
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045};
7046
7047enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007048 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7049 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007050};
7051
7052struct mlx5_ifc_arm_rq_in_bits {
7053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057 u8 op_mod[0x10];
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060 u8 srq_number[0x18];
7061
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063 u8 lwm[0x10];
7064};
7065
7066struct mlx5_ifc_arm_dct_out_bits {
7067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069
7070 u8 syndrome[0x20];
7071
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073};
7074
7075struct mlx5_ifc_arm_dct_in_bits {
7076 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080 u8 op_mod[0x10];
7081
Matan Barakb4ff3a32016-02-09 14:57:42 +02007082 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007083 u8 dct_number[0x18];
7084
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086};
7087
7088struct mlx5_ifc_alloc_xrcd_out_bits {
7089 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091
7092 u8 syndrome[0x20];
7093
Matan Barakb4ff3a32016-02-09 14:57:42 +02007094 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007095 u8 xrcd[0x18];
7096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098};
7099
7100struct mlx5_ifc_alloc_xrcd_in_bits {
7101 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007102 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007103
Matan Barakb4ff3a32016-02-09 14:57:42 +02007104 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007105 u8 op_mod[0x10];
7106
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108};
7109
7110struct mlx5_ifc_alloc_uar_out_bits {
7111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007113
7114 u8 syndrome[0x20];
7115
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117 u8 uar[0x18];
7118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120};
7121
7122struct mlx5_ifc_alloc_uar_in_bits {
7123 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127 u8 op_mod[0x10];
7128
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130};
7131
7132struct mlx5_ifc_alloc_transport_domain_out_bits {
7133 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007134 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007135
7136 u8 syndrome[0x20];
7137
Matan Barakb4ff3a32016-02-09 14:57:42 +02007138 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007139 u8 transport_domain[0x18];
7140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142};
7143
7144struct mlx5_ifc_alloc_transport_domain_in_bits {
7145 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147
Matan Barakb4ff3a32016-02-09 14:57:42 +02007148 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007149 u8 op_mod[0x10];
7150
Matan Barakb4ff3a32016-02-09 14:57:42 +02007151 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007152};
7153
7154struct mlx5_ifc_alloc_q_counter_out_bits {
7155 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157
7158 u8 syndrome[0x20];
7159
Matan Barakb4ff3a32016-02-09 14:57:42 +02007160 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007161 u8 counter_set_id[0x8];
7162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164};
7165
7166struct mlx5_ifc_alloc_q_counter_in_bits {
7167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007169
Matan Barakb4ff3a32016-02-09 14:57:42 +02007170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007171 u8 op_mod[0x10];
7172
Matan Barakb4ff3a32016-02-09 14:57:42 +02007173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007174};
7175
7176struct mlx5_ifc_alloc_pd_out_bits {
7177 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179
7180 u8 syndrome[0x20];
7181
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183 u8 pd[0x18];
7184
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186};
7187
7188struct mlx5_ifc_alloc_pd_in_bits {
7189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191
Matan Barakb4ff3a32016-02-09 14:57:42 +02007192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007193 u8 op_mod[0x10];
7194
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196};
7197
Amir Vadai9dc0b282016-05-13 12:55:39 +00007198struct mlx5_ifc_alloc_flow_counter_out_bits {
7199 u8 status[0x8];
7200 u8 reserved_at_8[0x18];
7201
7202 u8 syndrome[0x20];
7203
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007204 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007205
7206 u8 reserved_at_60[0x20];
7207};
7208
7209struct mlx5_ifc_alloc_flow_counter_in_bits {
7210 u8 opcode[0x10];
7211 u8 reserved_at_10[0x10];
7212
7213 u8 reserved_at_20[0x10];
7214 u8 op_mod[0x10];
7215
7216 u8 reserved_at_40[0x40];
7217};
7218
Saeed Mahameede2816822015-05-28 22:28:40 +03007219struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7220 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222
7223 u8 syndrome[0x20];
7224
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226};
7227
7228struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7229 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231
Matan Barakb4ff3a32016-02-09 14:57:42 +02007232 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007233 u8 op_mod[0x10];
7234
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236
Matan Barakb4ff3a32016-02-09 14:57:42 +02007237 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007238 u8 vxlan_udp_port[0x10];
7239};
7240
Saeed Mahameed74862162016-06-09 15:11:34 +03007241struct mlx5_ifc_set_rate_limit_out_bits {
7242 u8 status[0x8];
7243 u8 reserved_at_8[0x18];
7244
7245 u8 syndrome[0x20];
7246
7247 u8 reserved_at_40[0x40];
7248};
7249
7250struct mlx5_ifc_set_rate_limit_in_bits {
7251 u8 opcode[0x10];
7252 u8 reserved_at_10[0x10];
7253
7254 u8 reserved_at_20[0x10];
7255 u8 op_mod[0x10];
7256
7257 u8 reserved_at_40[0x10];
7258 u8 rate_limit_index[0x10];
7259
7260 u8 reserved_at_60[0x20];
7261
7262 u8 rate_limit[0x20];
7263};
7264
Saeed Mahameede2816822015-05-28 22:28:40 +03007265struct mlx5_ifc_access_register_out_bits {
7266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268
7269 u8 syndrome[0x20];
7270
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272
7273 u8 register_data[0][0x20];
7274};
7275
7276enum {
7277 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7278 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7279};
7280
7281struct mlx5_ifc_access_register_in_bits {
7282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284
Matan Barakb4ff3a32016-02-09 14:57:42 +02007285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007286 u8 op_mod[0x10];
7287
Matan Barakb4ff3a32016-02-09 14:57:42 +02007288 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007289 u8 register_id[0x10];
7290
7291 u8 argument[0x20];
7292
7293 u8 register_data[0][0x20];
7294};
7295
7296struct mlx5_ifc_sltp_reg_bits {
7297 u8 status[0x4];
7298 u8 version[0x4];
7299 u8 local_port[0x8];
7300 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007301 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007302 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308 u8 polarity[0x1];
7309 u8 ob_tap0[0x8];
7310 u8 ob_tap1[0x8];
7311 u8 ob_tap2[0x8];
7312
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314 u8 ob_preemp_mode[0x4];
7315 u8 ob_reg[0x8];
7316 u8 ob_bias[0x8];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319};
7320
7321struct mlx5_ifc_slrg_reg_bits {
7322 u8 status[0x4];
7323 u8 version[0x4];
7324 u8 local_port[0x8];
7325 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007328 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007329
7330 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007331 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007332 u8 grade_lane_speed[0x4];
7333
7334 u8 grade_version[0x8];
7335 u8 grade[0x18];
7336
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338 u8 height_grade_type[0x4];
7339 u8 height_grade[0x18];
7340
7341 u8 height_dz[0x10];
7342 u8 height_dv[0x10];
7343
Matan Barakb4ff3a32016-02-09 14:57:42 +02007344 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007345 u8 height_sigma[0x10];
7346
Matan Barakb4ff3a32016-02-09 14:57:42 +02007347 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348
Matan Barakb4ff3a32016-02-09 14:57:42 +02007349 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007350 u8 phase_grade_type[0x4];
7351 u8 phase_grade[0x18];
7352
Matan Barakb4ff3a32016-02-09 14:57:42 +02007353 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007354 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356 u8 phase_eo_neg[0x8];
7357
7358 u8 ffe_set_tested[0x10];
7359 u8 test_errors_per_lane[0x10];
7360};
7361
7362struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007363 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007364 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368 u8 vl_hw_cap[0x4];
7369
Matan Barakb4ff3a32016-02-09 14:57:42 +02007370 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371 u8 vl_admin[0x4];
7372
Matan Barakb4ff3a32016-02-09 14:57:42 +02007373 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007374 u8 vl_operational[0x4];
7375};
7376
7377struct mlx5_ifc_pude_reg_bits {
7378 u8 swid[0x8];
7379 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007380 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007381 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383 u8 oper_status[0x4];
7384
Matan Barakb4ff3a32016-02-09 14:57:42 +02007385 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007386};
7387
7388struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007389 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007390 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007391 u8 an_disable_cap[0x1];
7392 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007394 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395 u8 proto_mask[0x3];
7396
Saeed Mahameed74862162016-06-09 15:11:34 +03007397 u8 an_status[0x4];
7398 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399
7400 u8 eth_proto_capability[0x20];
7401
7402 u8 ib_link_width_capability[0x10];
7403 u8 ib_proto_capability[0x10];
7404
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406
7407 u8 eth_proto_admin[0x20];
7408
7409 u8 ib_link_width_admin[0x10];
7410 u8 ib_proto_admin[0x10];
7411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413
7414 u8 eth_proto_oper[0x20];
7415
7416 u8 ib_link_width_oper[0x10];
7417 u8 ib_proto_oper[0x10];
7418
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007419 u8 reserved_at_160[0x1c];
7420 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421
7422 u8 eth_proto_lp_advertise[0x20];
7423
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425};
7426
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007427struct mlx5_ifc_mlcr_reg_bits {
7428 u8 reserved_at_0[0x8];
7429 u8 local_port[0x8];
7430 u8 reserved_at_10[0x20];
7431
7432 u8 beacon_duration[0x10];
7433 u8 reserved_at_40[0x10];
7434
7435 u8 beacon_remain[0x10];
7436};
7437
Saeed Mahameede2816822015-05-28 22:28:40 +03007438struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440
7441 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443 u8 repetitions_mode[0x4];
7444 u8 num_of_repetitions[0x8];
7445
7446 u8 grade_version[0x8];
7447 u8 height_grade_type[0x4];
7448 u8 phase_grade_type[0x4];
7449 u8 height_grade_weight[0x8];
7450 u8 phase_grade_weight[0x8];
7451
7452 u8 gisim_measure_bits[0x10];
7453 u8 adaptive_tap_measure_bits[0x10];
7454
7455 u8 ber_bath_high_error_threshold[0x10];
7456 u8 ber_bath_mid_error_threshold[0x10];
7457
7458 u8 ber_bath_low_error_threshold[0x10];
7459 u8 one_ratio_high_threshold[0x10];
7460
7461 u8 one_ratio_high_mid_threshold[0x10];
7462 u8 one_ratio_low_mid_threshold[0x10];
7463
7464 u8 one_ratio_low_threshold[0x10];
7465 u8 ndeo_error_threshold[0x10];
7466
7467 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 mix90_phase_for_voltage_bath[0x8];
7470
7471 u8 mixer_offset_start[0x10];
7472 u8 mixer_offset_end[0x10];
7473
Matan Barakb4ff3a32016-02-09 14:57:42 +02007474 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475 u8 ber_test_time[0xb];
7476};
7477
7478struct mlx5_ifc_pspa_reg_bits {
7479 u8 swid[0x8];
7480 u8 local_port[0x8];
7481 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483
Matan Barakb4ff3a32016-02-09 14:57:42 +02007484 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007485};
7486
7487struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 mode[0x2];
7494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496
Matan Barakb4ff3a32016-02-09 14:57:42 +02007497 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007498 u8 min_threshold[0x10];
7499
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 max_threshold[0x10];
7502
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 mark_probability_denominator[0x10];
7505
Matan Barakb4ff3a32016-02-09 14:57:42 +02007506 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507};
7508
7509struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517 u8 wrps_admin[0x4];
7518
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 wrps_status[0x4];
7521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007524 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007525 u8 down_threshold[0x8];
7526
Matan Barakb4ff3a32016-02-09 14:57:42 +02007527 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007528
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530 u8 srps_admin[0x4];
7531
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 srps_status[0x4];
7534
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536};
7537
7538struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007545 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007546 u8 lb_en[0x8];
7547};
7548
7549struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555
7556 u8 port_profile_mode[0x8];
7557 u8 static_port_profile[0x8];
7558 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560
7561 u8 retransmission_active[0x8];
7562 u8 fec_mode_active[0x18];
7563
Matan Barakb4ff3a32016-02-09 14:57:42 +02007564 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007565};
7566
7567struct mlx5_ifc_ppcnt_reg_bits {
7568 u8 swid[0x8];
7569 u8 local_port[0x8];
7570 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 grp[0x6];
7573
7574 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 prio_tc[0x3];
7577
7578 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7579};
7580
Gal Pressman8ed1a632016-11-17 13:46:01 +02007581struct mlx5_ifc_mpcnt_reg_bits {
7582 u8 reserved_at_0[0x8];
7583 u8 pcie_index[0x8];
7584 u8 reserved_at_10[0xa];
7585 u8 grp[0x6];
7586
7587 u8 clr[0x1];
7588 u8 reserved_at_21[0x1f];
7589
7590 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7591};
7592
Saeed Mahameede2816822015-05-28 22:28:40 +03007593struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 local_port[0x8];
7598 u8 mac_47_32[0x10];
7599
7600 u8 mac_31_0[0x20];
7601
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603};
7604
7605struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609
7610 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007611 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007612
7613 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007614 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007615
7616 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618};
7619
7620struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007621 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007622 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 attenuation_5g[0x8];
7627
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629 u8 attenuation_7g[0x8];
7630
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 attenuation_12g[0x8];
7633};
7634
7635struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639 u8 module_status[0x4];
7640
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642};
7643
7644struct mlx5_ifc_pmpc_reg_bits {
7645 u8 module_state_updated[32][0x8];
7646};
7647
7648struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 mlpn_status[0x4];
7651 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653
7654 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656};
7657
7658struct mlx5_ifc_pmlp_reg_bits {
7659 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663 u8 width[0x8];
7664
7665 u8 lane0_module_mapping[0x20];
7666
7667 u8 lane1_module_mapping[0x20];
7668
7669 u8 lane2_module_mapping[0x20];
7670
7671 u8 lane3_module_mapping[0x20];
7672
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674};
7675
7676struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 oper_status[0x4];
7683
7684 u8 ase[0x1];
7685 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007686 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007687 u8 e[0x2];
7688
Matan Barakb4ff3a32016-02-09 14:57:42 +02007689 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007690};
7691
7692struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007693 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007694 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007695 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007696 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698
Matan Barakb4ff3a32016-02-09 14:57:42 +02007699 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007700 u8 lane_speed[0x10];
7701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 lpbf[0x1];
7704 u8 fec_mode_policy[0x8];
7705
7706 u8 retransmission_capability[0x8];
7707 u8 fec_mode_capability[0x18];
7708
7709 u8 retransmission_support_admin[0x8];
7710 u8 fec_mode_support_admin[0x18];
7711
7712 u8 retransmission_request_admin[0x8];
7713 u8 fec_mode_request_admin[0x18];
7714
Matan Barakb4ff3a32016-02-09 14:57:42 +02007715 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007716};
7717
7718struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722 u8 ib_port[0x8];
7723
Matan Barakb4ff3a32016-02-09 14:57:42 +02007724 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007725};
7726
7727struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007728 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007729 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007730 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007731 u8 lbf_mode[0x3];
7732
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734};
7735
7736struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740
7741 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007742 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007743 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745};
7746
7747struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007750 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007751
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753
7754 u8 port_filter[8][0x20];
7755
7756 u8 port_filter_update_en[8][0x20];
7757};
7758
7759struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007760 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007761 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007762 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007763
7764 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 prio_mask_rx[0x8];
7769
7770 u8 pptx[0x1];
7771 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007772 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007773 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775
7776 u8 pprx[0x1];
7777 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007780 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007781
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783};
7784
7785struct mlx5_ifc_pelc_reg_bits {
7786 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007790
7791 u8 op_admin[0x8];
7792 u8 op_capability[0x8];
7793 u8 op_request[0x8];
7794 u8 op_active[0x8];
7795
7796 u8 admin[0x40];
7797
7798 u8 capability[0x40];
7799
7800 u8 request[0x40];
7801
7802 u8 active[0x40];
7803
Matan Barakb4ff3a32016-02-09 14:57:42 +02007804 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007805};
7806
7807struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007808 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007809 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811
Matan Barakb4ff3a32016-02-09 14:57:42 +02007812 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007813 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 error_type[0x8];
7820};
7821
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007822struct mlx5_ifc_pcam_enhanced_features_bits {
Gal Pressman2dba0792017-06-18 14:56:45 +03007823 u8 reserved_at_0[0x7b];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007824
Gal Pressman2dba0792017-06-18 14:56:45 +03007825 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007826 u8 ptys_connector_type[0x1];
7827 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007828 u8 ppcnt_discard_group[0x1];
7829 u8 ppcnt_statistical_group[0x1];
7830};
7831
7832struct mlx5_ifc_pcam_reg_bits {
7833 u8 reserved_at_0[0x8];
7834 u8 feature_group[0x8];
7835 u8 reserved_at_10[0x8];
7836 u8 access_reg_group[0x8];
7837
7838 u8 reserved_at_20[0x20];
7839
7840 union {
7841 u8 reserved_at_0[0x80];
7842 } port_access_reg_cap_mask;
7843
7844 u8 reserved_at_c0[0x80];
7845
7846 union {
7847 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7848 u8 reserved_at_0[0x80];
7849 } feature_cap_mask;
7850
7851 u8 reserved_at_1c0[0xc0];
7852};
7853
7854struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03007855 u8 reserved_at_0[0x7b];
7856 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03007857 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03007858 u8 mtpps_enh_out_per_adj[0x1];
7859 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007860 u8 pcie_performance_group[0x1];
7861};
7862
Or Gerlitz0ab87742017-06-11 15:25:38 +03007863struct mlx5_ifc_mcam_access_reg_bits {
7864 u8 reserved_at_0[0x1c];
7865 u8 mcda[0x1];
7866 u8 mcc[0x1];
7867 u8 mcqi[0x1];
7868 u8 reserved_at_1f[0x1];
7869
7870 u8 regs_95_to_64[0x20];
7871 u8 regs_63_to_32[0x20];
7872 u8 regs_31_to_0[0x20];
7873};
7874
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007875struct mlx5_ifc_mcam_reg_bits {
7876 u8 reserved_at_0[0x8];
7877 u8 feature_group[0x8];
7878 u8 reserved_at_10[0x8];
7879 u8 access_reg_group[0x8];
7880
7881 u8 reserved_at_20[0x20];
7882
7883 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007884 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007885 u8 reserved_at_0[0x80];
7886 } mng_access_reg_cap_mask;
7887
7888 u8 reserved_at_c0[0x80];
7889
7890 union {
7891 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7892 u8 reserved_at_0[0x80];
7893 } mng_feature_cap_mask;
7894
7895 u8 reserved_at_1c0[0x80];
7896};
7897
Saeed Mahameede2816822015-05-28 22:28:40 +03007898struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007899 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007900 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007902
7903 u8 port_capability_mask[4][0x20];
7904};
7905
7906struct mlx5_ifc_paos_reg_bits {
7907 u8 swid[0x8];
7908 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007909 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007910 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007911 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007912 u8 oper_status[0x4];
7913
7914 u8 ase[0x1];
7915 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917 u8 e[0x2];
7918
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920};
7921
7922struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007925 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007926 u8 opamp_group_type[0x4];
7927
7928 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930 u8 num_of_indices[0xc];
7931
7932 u8 index_data[18][0x10];
7933};
7934
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007935struct mlx5_ifc_pcmr_reg_bits {
7936 u8 reserved_at_0[0x8];
7937 u8 local_port[0x8];
7938 u8 reserved_at_10[0x2e];
7939 u8 fcs_cap[0x1];
7940 u8 reserved_at_3f[0x1f];
7941 u8 fcs_chk[0x1];
7942 u8 reserved_at_5f[0x1];
7943};
7944
Saeed Mahameede2816822015-05-28 22:28:40 +03007945struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007950 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007951 u8 module[0x8];
7952};
7953
7954struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007955 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007956 u8 lossy[0x1];
7957 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959 u8 size[0xc];
7960
7961 u8 xoff_threshold[0x10];
7962 u8 xon_threshold[0x10];
7963};
7964
7965struct mlx5_ifc_set_node_in_bits {
7966 u8 node_description[64][0x8];
7967};
7968
7969struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007970 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007971 u8 power_settings_level[0x8];
7972
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974};
7975
7976struct mlx5_ifc_register_host_endianness_bits {
7977 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007978 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007979
Matan Barakb4ff3a32016-02-09 14:57:42 +02007980 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007981};
7982
7983struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985
7986 u8 mkey[0x20];
7987
7988 u8 addressh_63_32[0x20];
7989
7990 u8 addressl_31_0[0x20];
7991};
7992
7993struct mlx5_ifc_ud_adrs_vector_bits {
7994 u8 dc_key[0x40];
7995
7996 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007997 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007998 u8 destination_qp_dct[0x18];
7999
8000 u8 static_rate[0x4];
8001 u8 sl_eth_prio[0x4];
8002 u8 fl[0x1];
8003 u8 mlid[0x7];
8004 u8 rlid_udp_sport[0x10];
8005
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007
8008 u8 rmac_47_16[0x20];
8009
8010 u8 rmac_15_0[0x10];
8011 u8 tclass[0x8];
8012 u8 hop_limit[0x8];
8013
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008016 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008017 u8 src_addr_index[0x8];
8018 u8 flow_label[0x14];
8019
8020 u8 rgid_rip[16][0x8];
8021};
8022
8023struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008024 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008025 u8 function_id[0x10];
8026
8027 u8 num_pages[0x20];
8028
Matan Barakb4ff3a32016-02-09 14:57:42 +02008029 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008030};
8031
8032struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008033 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008034 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008035 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008036 u8 event_sub_type[0x8];
8037
Matan Barakb4ff3a32016-02-09 14:57:42 +02008038 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008039
8040 union mlx5_ifc_event_auto_bits event_data;
8041
Matan Barakb4ff3a32016-02-09 14:57:42 +02008042 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008043 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008044 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008045 u8 owner[0x1];
8046};
8047
8048enum {
8049 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8050};
8051
8052struct mlx5_ifc_cmd_queue_entry_bits {
8053 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008054 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008055
8056 u8 input_length[0x20];
8057
8058 u8 input_mailbox_pointer_63_32[0x20];
8059
8060 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008061 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008062
8063 u8 command_input_inline_data[16][0x8];
8064
8065 u8 command_output_inline_data[16][0x8];
8066
8067 u8 output_mailbox_pointer_63_32[0x20];
8068
8069 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008070 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008071
8072 u8 output_length[0x20];
8073
8074 u8 token[0x8];
8075 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077 u8 status[0x7];
8078 u8 ownership[0x1];
8079};
8080
8081struct mlx5_ifc_cmd_out_bits {
8082 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008083 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008084
8085 u8 syndrome[0x20];
8086
8087 u8 command_output[0x20];
8088};
8089
8090struct mlx5_ifc_cmd_in_bits {
8091 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008092 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008093
Matan Barakb4ff3a32016-02-09 14:57:42 +02008094 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008095 u8 op_mod[0x10];
8096
8097 u8 command[0][0x20];
8098};
8099
8100struct mlx5_ifc_cmd_if_box_bits {
8101 u8 mailbox_data[512][0x8];
8102
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104
8105 u8 next_pointer_63_32[0x20];
8106
8107 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008108 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008109
8110 u8 block_number[0x20];
8111
Matan Barakb4ff3a32016-02-09 14:57:42 +02008112 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008113 u8 token[0x8];
8114 u8 ctrl_signature[0x8];
8115 u8 signature[0x8];
8116};
8117
8118struct mlx5_ifc_mtt_bits {
8119 u8 ptag_63_32[0x20];
8120
8121 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008122 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008123 u8 wr_en[0x1];
8124 u8 rd_en[0x1];
8125};
8126
Tariq Toukan928cfe82016-02-22 18:17:29 +02008127struct mlx5_ifc_query_wol_rol_out_bits {
8128 u8 status[0x8];
8129 u8 reserved_at_8[0x18];
8130
8131 u8 syndrome[0x20];
8132
8133 u8 reserved_at_40[0x10];
8134 u8 rol_mode[0x8];
8135 u8 wol_mode[0x8];
8136
8137 u8 reserved_at_60[0x20];
8138};
8139
8140struct mlx5_ifc_query_wol_rol_in_bits {
8141 u8 opcode[0x10];
8142 u8 reserved_at_10[0x10];
8143
8144 u8 reserved_at_20[0x10];
8145 u8 op_mod[0x10];
8146
8147 u8 reserved_at_40[0x40];
8148};
8149
8150struct mlx5_ifc_set_wol_rol_out_bits {
8151 u8 status[0x8];
8152 u8 reserved_at_8[0x18];
8153
8154 u8 syndrome[0x20];
8155
8156 u8 reserved_at_40[0x40];
8157};
8158
8159struct mlx5_ifc_set_wol_rol_in_bits {
8160 u8 opcode[0x10];
8161 u8 reserved_at_10[0x10];
8162
8163 u8 reserved_at_20[0x10];
8164 u8 op_mod[0x10];
8165
8166 u8 rol_mode_valid[0x1];
8167 u8 wol_mode_valid[0x1];
8168 u8 reserved_at_42[0xe];
8169 u8 rol_mode[0x8];
8170 u8 wol_mode[0x8];
8171
8172 u8 reserved_at_60[0x20];
8173};
8174
Saeed Mahameede2816822015-05-28 22:28:40 +03008175enum {
8176 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8177 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8178 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8179};
8180
8181enum {
8182 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8183 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8184 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8185};
8186
8187enum {
8188 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8189 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8190 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8191 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8192 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8193 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8194 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8195 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8196 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8197 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8198 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8199};
8200
8201struct mlx5_ifc_initial_seg_bits {
8202 u8 fw_rev_minor[0x10];
8203 u8 fw_rev_major[0x10];
8204
8205 u8 cmd_interface_rev[0x10];
8206 u8 fw_rev_subminor[0x10];
8207
Matan Barakb4ff3a32016-02-09 14:57:42 +02008208 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008209
8210 u8 cmdq_phy_addr_63_32[0x20];
8211
8212 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008213 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008214 u8 nic_interface[0x2];
8215 u8 log_cmdq_size[0x4];
8216 u8 log_cmdq_stride[0x4];
8217
8218 u8 command_doorbell_vector[0x20];
8219
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008221
8222 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008223 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008224 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008225 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008226
8227 struct mlx5_ifc_health_buffer_bits health_buffer;
8228
8229 u8 no_dram_nic_offset[0x20];
8230
Matan Barakb4ff3a32016-02-09 14:57:42 +02008231 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008232
Matan Barakb4ff3a32016-02-09 14:57:42 +02008233 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008234 u8 clear_int[0x1];
8235
8236 u8 health_syndrome[0x8];
8237 u8 health_counter[0x18];
8238
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008240};
8241
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008242struct mlx5_ifc_mtpps_reg_bits {
8243 u8 reserved_at_0[0xc];
8244 u8 cap_number_of_pps_pins[0x4];
8245 u8 reserved_at_10[0x4];
8246 u8 cap_max_num_of_pps_in_pins[0x4];
8247 u8 reserved_at_18[0x4];
8248 u8 cap_max_num_of_pps_out_pins[0x4];
8249
8250 u8 reserved_at_20[0x24];
8251 u8 cap_pin_3_mode[0x4];
8252 u8 reserved_at_48[0x4];
8253 u8 cap_pin_2_mode[0x4];
8254 u8 reserved_at_50[0x4];
8255 u8 cap_pin_1_mode[0x4];
8256 u8 reserved_at_58[0x4];
8257 u8 cap_pin_0_mode[0x4];
8258
8259 u8 reserved_at_60[0x4];
8260 u8 cap_pin_7_mode[0x4];
8261 u8 reserved_at_68[0x4];
8262 u8 cap_pin_6_mode[0x4];
8263 u8 reserved_at_70[0x4];
8264 u8 cap_pin_5_mode[0x4];
8265 u8 reserved_at_78[0x4];
8266 u8 cap_pin_4_mode[0x4];
8267
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008268 u8 field_select[0x20];
8269 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008270
8271 u8 enable[0x1];
8272 u8 reserved_at_101[0xb];
8273 u8 pattern[0x4];
8274 u8 reserved_at_110[0x4];
8275 u8 pin_mode[0x4];
8276 u8 pin[0x8];
8277
8278 u8 reserved_at_120[0x20];
8279
8280 u8 time_stamp[0x40];
8281
8282 u8 out_pulse_duration[0x10];
8283 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008284 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008285
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008286 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008287};
8288
8289struct mlx5_ifc_mtppse_reg_bits {
8290 u8 reserved_at_0[0x18];
8291 u8 pin[0x8];
8292 u8 event_arm[0x1];
8293 u8 reserved_at_21[0x1b];
8294 u8 event_generation_mode[0x4];
8295 u8 reserved_at_40[0x40];
8296};
8297
Or Gerlitz47176282017-04-18 13:35:39 +03008298struct mlx5_ifc_mcqi_cap_bits {
8299 u8 supported_info_bitmask[0x20];
8300
8301 u8 component_size[0x20];
8302
8303 u8 max_component_size[0x20];
8304
8305 u8 log_mcda_word_size[0x4];
8306 u8 reserved_at_64[0xc];
8307 u8 mcda_max_write_size[0x10];
8308
8309 u8 rd_en[0x1];
8310 u8 reserved_at_81[0x1];
8311 u8 match_chip_id[0x1];
8312 u8 match_psid[0x1];
8313 u8 check_user_timestamp[0x1];
8314 u8 match_base_guid_mac[0x1];
8315 u8 reserved_at_86[0x1a];
8316};
8317
8318struct mlx5_ifc_mcqi_reg_bits {
8319 u8 read_pending_component[0x1];
8320 u8 reserved_at_1[0xf];
8321 u8 component_index[0x10];
8322
8323 u8 reserved_at_20[0x20];
8324
8325 u8 reserved_at_40[0x1b];
8326 u8 info_type[0x5];
8327
8328 u8 info_size[0x20];
8329
8330 u8 offset[0x20];
8331
8332 u8 reserved_at_a0[0x10];
8333 u8 data_size[0x10];
8334
8335 u8 data[0][0x20];
8336};
8337
8338struct mlx5_ifc_mcc_reg_bits {
8339 u8 reserved_at_0[0x4];
8340 u8 time_elapsed_since_last_cmd[0xc];
8341 u8 reserved_at_10[0x8];
8342 u8 instruction[0x8];
8343
8344 u8 reserved_at_20[0x10];
8345 u8 component_index[0x10];
8346
8347 u8 reserved_at_40[0x8];
8348 u8 update_handle[0x18];
8349
8350 u8 handle_owner_type[0x4];
8351 u8 handle_owner_host_id[0x4];
8352 u8 reserved_at_68[0x1];
8353 u8 control_progress[0x7];
8354 u8 error_code[0x8];
8355 u8 reserved_at_78[0x4];
8356 u8 control_state[0x4];
8357
8358 u8 component_size[0x20];
8359
8360 u8 reserved_at_a0[0x60];
8361};
8362
8363struct mlx5_ifc_mcda_reg_bits {
8364 u8 reserved_at_0[0x8];
8365 u8 update_handle[0x18];
8366
8367 u8 offset[0x20];
8368
8369 u8 reserved_at_40[0x10];
8370 u8 size[0x10];
8371
8372 u8 reserved_at_60[0x20];
8373
8374 u8 data[0][0x20];
8375};
8376
Saeed Mahameede2816822015-05-28 22:28:40 +03008377union mlx5_ifc_ports_control_registers_document_bits {
8378 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8379 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8380 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8381 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8382 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8383 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8384 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8385 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8386 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8387 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8388 struct mlx5_ifc_paos_reg_bits paos_reg;
8389 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8390 struct mlx5_ifc_peir_reg_bits peir_reg;
8391 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8392 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008393 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008394 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8395 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8396 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8397 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8398 struct mlx5_ifc_plib_reg_bits plib_reg;
8399 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8400 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8401 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8402 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8403 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8404 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8405 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8406 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8407 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8408 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008409 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008410 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8411 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8412 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8413 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8414 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8415 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8416 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008417 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008418 struct mlx5_ifc_pude_reg_bits pude_reg;
8419 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8420 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8421 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008422 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8423 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008424 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008425 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8426 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008427 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8428 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8429 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008430 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008431};
8432
8433union mlx5_ifc_debug_enhancements_document_bits {
8434 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008435 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008436};
8437
8438union mlx5_ifc_uplink_pci_interface_document_bits {
8439 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008440 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008441};
8442
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008443struct mlx5_ifc_set_flow_table_root_out_bits {
8444 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008445 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008446
8447 u8 syndrome[0x20];
8448
Matan Barakb4ff3a32016-02-09 14:57:42 +02008449 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008450};
8451
8452struct mlx5_ifc_set_flow_table_root_in_bits {
8453 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008454 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008455
Matan Barakb4ff3a32016-02-09 14:57:42 +02008456 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008457 u8 op_mod[0x10];
8458
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008459 u8 other_vport[0x1];
8460 u8 reserved_at_41[0xf];
8461 u8 vport_number[0x10];
8462
8463 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008464
8465 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008466 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008467
Matan Barakb4ff3a32016-02-09 14:57:42 +02008468 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008469 u8 table_id[0x18];
8470
Erez Shitrit500a3d02017-04-13 06:36:51 +03008471 u8 reserved_at_c0[0x8];
8472 u8 underlay_qpn[0x18];
8473 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008474};
8475
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008476enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008477 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8478 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008479};
8480
8481struct mlx5_ifc_modify_flow_table_out_bits {
8482 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008483 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008484
8485 u8 syndrome[0x20];
8486
Matan Barakb4ff3a32016-02-09 14:57:42 +02008487 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008488};
8489
8490struct mlx5_ifc_modify_flow_table_in_bits {
8491 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008492 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008493
Matan Barakb4ff3a32016-02-09 14:57:42 +02008494 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008495 u8 op_mod[0x10];
8496
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008497 u8 other_vport[0x1];
8498 u8 reserved_at_41[0xf];
8499 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008500
Matan Barakb4ff3a32016-02-09 14:57:42 +02008501 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008502 u8 modify_field_select[0x10];
8503
8504 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008505 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008506
Matan Barakb4ff3a32016-02-09 14:57:42 +02008507 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008508 u8 table_id[0x18];
8509
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008510 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008511};
8512
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008513struct mlx5_ifc_ets_tcn_config_reg_bits {
8514 u8 g[0x1];
8515 u8 b[0x1];
8516 u8 r[0x1];
8517 u8 reserved_at_3[0x9];
8518 u8 group[0x4];
8519 u8 reserved_at_10[0x9];
8520 u8 bw_allocation[0x7];
8521
8522 u8 reserved_at_20[0xc];
8523 u8 max_bw_units[0x4];
8524 u8 reserved_at_30[0x8];
8525 u8 max_bw_value[0x8];
8526};
8527
8528struct mlx5_ifc_ets_global_config_reg_bits {
8529 u8 reserved_at_0[0x2];
8530 u8 r[0x1];
8531 u8 reserved_at_3[0x1d];
8532
8533 u8 reserved_at_20[0xc];
8534 u8 max_bw_units[0x4];
8535 u8 reserved_at_30[0x8];
8536 u8 max_bw_value[0x8];
8537};
8538
8539struct mlx5_ifc_qetc_reg_bits {
8540 u8 reserved_at_0[0x8];
8541 u8 port_number[0x8];
8542 u8 reserved_at_10[0x30];
8543
8544 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8545 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8546};
8547
8548struct mlx5_ifc_qtct_reg_bits {
8549 u8 reserved_at_0[0x8];
8550 u8 port_number[0x8];
8551 u8 reserved_at_10[0xd];
8552 u8 prio[0x3];
8553
8554 u8 reserved_at_20[0x1d];
8555 u8 tclass[0x3];
8556};
8557
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008558struct mlx5_ifc_mcia_reg_bits {
8559 u8 l[0x1];
8560 u8 reserved_at_1[0x7];
8561 u8 module[0x8];
8562 u8 reserved_at_10[0x8];
8563 u8 status[0x8];
8564
8565 u8 i2c_device_address[0x8];
8566 u8 page_number[0x8];
8567 u8 device_address[0x10];
8568
8569 u8 reserved_at_40[0x10];
8570 u8 size[0x10];
8571
8572 u8 reserved_at_60[0x20];
8573
8574 u8 dword_0[0x20];
8575 u8 dword_1[0x20];
8576 u8 dword_2[0x20];
8577 u8 dword_3[0x20];
8578 u8 dword_4[0x20];
8579 u8 dword_5[0x20];
8580 u8 dword_6[0x20];
8581 u8 dword_7[0x20];
8582 u8 dword_8[0x20];
8583 u8 dword_9[0x20];
8584 u8 dword_10[0x20];
8585 u8 dword_11[0x20];
8586};
8587
Saeed Mahameed74862162016-06-09 15:11:34 +03008588struct mlx5_ifc_dcbx_param_bits {
8589 u8 dcbx_cee_cap[0x1];
8590 u8 dcbx_ieee_cap[0x1];
8591 u8 dcbx_standby_cap[0x1];
8592 u8 reserved_at_0[0x5];
8593 u8 port_number[0x8];
8594 u8 reserved_at_10[0xa];
8595 u8 max_application_table_size[6];
8596 u8 reserved_at_20[0x15];
8597 u8 version_oper[0x3];
8598 u8 reserved_at_38[5];
8599 u8 version_admin[0x3];
8600 u8 willing_admin[0x1];
8601 u8 reserved_at_41[0x3];
8602 u8 pfc_cap_oper[0x4];
8603 u8 reserved_at_48[0x4];
8604 u8 pfc_cap_admin[0x4];
8605 u8 reserved_at_50[0x4];
8606 u8 num_of_tc_oper[0x4];
8607 u8 reserved_at_58[0x4];
8608 u8 num_of_tc_admin[0x4];
8609 u8 remote_willing[0x1];
8610 u8 reserved_at_61[3];
8611 u8 remote_pfc_cap[4];
8612 u8 reserved_at_68[0x14];
8613 u8 remote_num_of_tc[0x4];
8614 u8 reserved_at_80[0x18];
8615 u8 error[0x8];
8616 u8 reserved_at_a0[0x160];
8617};
Aviv Heller84df61e2016-05-10 13:47:50 +03008618
8619struct mlx5_ifc_lagc_bits {
8620 u8 reserved_at_0[0x1d];
8621 u8 lag_state[0x3];
8622
8623 u8 reserved_at_20[0x14];
8624 u8 tx_remap_affinity_2[0x4];
8625 u8 reserved_at_38[0x4];
8626 u8 tx_remap_affinity_1[0x4];
8627};
8628
8629struct mlx5_ifc_create_lag_out_bits {
8630 u8 status[0x8];
8631 u8 reserved_at_8[0x18];
8632
8633 u8 syndrome[0x20];
8634
8635 u8 reserved_at_40[0x40];
8636};
8637
8638struct mlx5_ifc_create_lag_in_bits {
8639 u8 opcode[0x10];
8640 u8 reserved_at_10[0x10];
8641
8642 u8 reserved_at_20[0x10];
8643 u8 op_mod[0x10];
8644
8645 struct mlx5_ifc_lagc_bits ctx;
8646};
8647
8648struct mlx5_ifc_modify_lag_out_bits {
8649 u8 status[0x8];
8650 u8 reserved_at_8[0x18];
8651
8652 u8 syndrome[0x20];
8653
8654 u8 reserved_at_40[0x40];
8655};
8656
8657struct mlx5_ifc_modify_lag_in_bits {
8658 u8 opcode[0x10];
8659 u8 reserved_at_10[0x10];
8660
8661 u8 reserved_at_20[0x10];
8662 u8 op_mod[0x10];
8663
8664 u8 reserved_at_40[0x20];
8665 u8 field_select[0x20];
8666
8667 struct mlx5_ifc_lagc_bits ctx;
8668};
8669
8670struct mlx5_ifc_query_lag_out_bits {
8671 u8 status[0x8];
8672 u8 reserved_at_8[0x18];
8673
8674 u8 syndrome[0x20];
8675
8676 u8 reserved_at_40[0x40];
8677
8678 struct mlx5_ifc_lagc_bits ctx;
8679};
8680
8681struct mlx5_ifc_query_lag_in_bits {
8682 u8 opcode[0x10];
8683 u8 reserved_at_10[0x10];
8684
8685 u8 reserved_at_20[0x10];
8686 u8 op_mod[0x10];
8687
8688 u8 reserved_at_40[0x40];
8689};
8690
8691struct mlx5_ifc_destroy_lag_out_bits {
8692 u8 status[0x8];
8693 u8 reserved_at_8[0x18];
8694
8695 u8 syndrome[0x20];
8696
8697 u8 reserved_at_40[0x40];
8698};
8699
8700struct mlx5_ifc_destroy_lag_in_bits {
8701 u8 opcode[0x10];
8702 u8 reserved_at_10[0x10];
8703
8704 u8 reserved_at_20[0x10];
8705 u8 op_mod[0x10];
8706
8707 u8 reserved_at_40[0x40];
8708};
8709
8710struct mlx5_ifc_create_vport_lag_out_bits {
8711 u8 status[0x8];
8712 u8 reserved_at_8[0x18];
8713
8714 u8 syndrome[0x20];
8715
8716 u8 reserved_at_40[0x40];
8717};
8718
8719struct mlx5_ifc_create_vport_lag_in_bits {
8720 u8 opcode[0x10];
8721 u8 reserved_at_10[0x10];
8722
8723 u8 reserved_at_20[0x10];
8724 u8 op_mod[0x10];
8725
8726 u8 reserved_at_40[0x40];
8727};
8728
8729struct mlx5_ifc_destroy_vport_lag_out_bits {
8730 u8 status[0x8];
8731 u8 reserved_at_8[0x18];
8732
8733 u8 syndrome[0x20];
8734
8735 u8 reserved_at_40[0x40];
8736};
8737
8738struct mlx5_ifc_destroy_vport_lag_in_bits {
8739 u8 opcode[0x10];
8740 u8 reserved_at_10[0x10];
8741
8742 u8 reserved_at_20[0x10];
8743 u8 op_mod[0x10];
8744
8745 u8 reserved_at_40[0x40];
8746};
8747
Eli Cohend29b7962014-10-02 12:19:43 +03008748#endif /* MLX5_IFC_H */