Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2005-2011 Atheros Communications Inc. |
| 3 | * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any |
| 6 | * purpose with or without fee is hereby granted, provided that the above |
| 7 | * copyright notice and this permission notice appear in all copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 16 | */ |
| 17 | |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 18 | #include "core.h" |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 19 | #include "htc.h" |
| 20 | #include "htt.h" |
| 21 | #include "txrx.h" |
| 22 | #include "debug.h" |
Kalle Valo | a9bf050 | 2013-09-03 11:43:55 +0300 | [diff] [blame] | 23 | #include "trace.h" |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 24 | #include "mac.h" |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 25 | |
| 26 | #include <linux/log2.h> |
| 27 | |
| 28 | /* slightly larger than one large A-MPDU */ |
| 29 | #define HTT_RX_RING_SIZE_MIN 128 |
| 30 | |
| 31 | /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */ |
| 32 | #define HTT_RX_RING_SIZE_MAX 2048 |
| 33 | |
| 34 | #define HTT_RX_AVG_FRM_BYTES 1000 |
| 35 | |
| 36 | /* ms, very conservative */ |
| 37 | #define HTT_RX_HOST_LATENCY_MAX_MS 20 |
| 38 | |
| 39 | /* ms, conservative */ |
| 40 | #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10 |
| 41 | |
| 42 | /* when under memory pressure rx ring refill may fail and needs a retry */ |
| 43 | #define HTT_RX_RING_REFILL_RETRY_MS 50 |
| 44 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 45 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 46 | static void ath10k_htt_txrx_compl_task(unsigned long ptr); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 47 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 48 | static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt) |
| 49 | { |
| 50 | int size; |
| 51 | |
| 52 | /* |
| 53 | * It is expected that the host CPU will typically be able to |
| 54 | * service the rx indication from one A-MPDU before the rx |
| 55 | * indication from the subsequent A-MPDU happens, roughly 1-2 ms |
| 56 | * later. However, the rx ring should be sized very conservatively, |
| 57 | * to accomodate the worst reasonable delay before the host CPU |
| 58 | * services a rx indication interrupt. |
| 59 | * |
| 60 | * The rx ring need not be kept full of empty buffers. In theory, |
| 61 | * the htt host SW can dynamically track the low-water mark in the |
| 62 | * rx ring, and dynamically adjust the level to which the rx ring |
| 63 | * is filled with empty buffers, to dynamically meet the desired |
| 64 | * low-water mark. |
| 65 | * |
| 66 | * In contrast, it's difficult to resize the rx ring itself, once |
| 67 | * it's in use. Thus, the ring itself should be sized very |
| 68 | * conservatively, while the degree to which the ring is filled |
| 69 | * with empty buffers should be sized moderately conservatively. |
| 70 | */ |
| 71 | |
| 72 | /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ |
| 73 | size = |
| 74 | htt->max_throughput_mbps + |
| 75 | 1000 / |
| 76 | (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS; |
| 77 | |
| 78 | if (size < HTT_RX_RING_SIZE_MIN) |
| 79 | size = HTT_RX_RING_SIZE_MIN; |
| 80 | |
| 81 | if (size > HTT_RX_RING_SIZE_MAX) |
| 82 | size = HTT_RX_RING_SIZE_MAX; |
| 83 | |
| 84 | size = roundup_pow_of_two(size); |
| 85 | |
| 86 | return size; |
| 87 | } |
| 88 | |
| 89 | static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt) |
| 90 | { |
| 91 | int size; |
| 92 | |
| 93 | /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */ |
| 94 | size = |
| 95 | htt->max_throughput_mbps * |
| 96 | 1000 / |
| 97 | (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS; |
| 98 | |
| 99 | /* |
| 100 | * Make sure the fill level is at least 1 less than the ring size. |
| 101 | * Leaving 1 element empty allows the SW to easily distinguish |
| 102 | * between a full ring vs. an empty ring. |
| 103 | */ |
| 104 | if (size >= htt->rx_ring.size) |
| 105 | size = htt->rx_ring.size - 1; |
| 106 | |
| 107 | return size; |
| 108 | } |
| 109 | |
| 110 | static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) |
| 111 | { |
| 112 | struct sk_buff *skb; |
| 113 | struct ath10k_skb_cb *cb; |
| 114 | int i; |
| 115 | |
| 116 | for (i = 0; i < htt->rx_ring.fill_cnt; i++) { |
| 117 | skb = htt->rx_ring.netbufs_ring[i]; |
| 118 | cb = ATH10K_SKB_CB(skb); |
| 119 | dma_unmap_single(htt->ar->dev, cb->paddr, |
| 120 | skb->len + skb_tailroom(skb), |
| 121 | DMA_FROM_DEVICE); |
| 122 | dev_kfree_skb_any(skb); |
| 123 | } |
| 124 | |
| 125 | htt->rx_ring.fill_cnt = 0; |
| 126 | } |
| 127 | |
| 128 | static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) |
| 129 | { |
| 130 | struct htt_rx_desc *rx_desc; |
| 131 | struct sk_buff *skb; |
| 132 | dma_addr_t paddr; |
| 133 | int ret = 0, idx; |
| 134 | |
Kalle Valo | 8cc7f26 | 2014-09-14 12:50:39 +0300 | [diff] [blame] | 135 | idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 136 | while (num > 0) { |
| 137 | skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); |
| 138 | if (!skb) { |
| 139 | ret = -ENOMEM; |
| 140 | goto fail; |
| 141 | } |
| 142 | |
| 143 | if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) |
| 144 | skb_pull(skb, |
| 145 | PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - |
| 146 | skb->data); |
| 147 | |
| 148 | /* Clear rx_desc attention word before posting to Rx ring */ |
| 149 | rx_desc = (struct htt_rx_desc *)skb->data; |
| 150 | rx_desc->attention.flags = __cpu_to_le32(0); |
| 151 | |
| 152 | paddr = dma_map_single(htt->ar->dev, skb->data, |
| 153 | skb->len + skb_tailroom(skb), |
| 154 | DMA_FROM_DEVICE); |
| 155 | |
| 156 | if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { |
| 157 | dev_kfree_skb_any(skb); |
| 158 | ret = -ENOMEM; |
| 159 | goto fail; |
| 160 | } |
| 161 | |
| 162 | ATH10K_SKB_CB(skb)->paddr = paddr; |
| 163 | htt->rx_ring.netbufs_ring[idx] = skb; |
| 164 | htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr); |
| 165 | htt->rx_ring.fill_cnt++; |
| 166 | |
| 167 | num--; |
| 168 | idx++; |
| 169 | idx &= htt->rx_ring.size_mask; |
| 170 | } |
| 171 | |
| 172 | fail: |
Kalle Valo | 8cc7f26 | 2014-09-14 12:50:39 +0300 | [diff] [blame] | 173 | *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 174 | return ret; |
| 175 | } |
| 176 | |
| 177 | static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) |
| 178 | { |
| 179 | lockdep_assert_held(&htt->rx_ring.lock); |
| 180 | return __ath10k_htt_rx_ring_fill_n(htt, num); |
| 181 | } |
| 182 | |
| 183 | static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) |
| 184 | { |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 185 | int ret, num_deficit, num_to_fill; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 186 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 187 | /* Refilling the whole RX ring buffer proves to be a bad idea. The |
| 188 | * reason is RX may take up significant amount of CPU cycles and starve |
| 189 | * other tasks, e.g. TX on an ethernet device while acting as a bridge |
| 190 | * with ath10k wlan interface. This ended up with very poor performance |
| 191 | * once CPU the host system was overwhelmed with RX on ath10k. |
| 192 | * |
| 193 | * By limiting the number of refills the replenishing occurs |
| 194 | * progressively. This in turns makes use of the fact tasklets are |
| 195 | * processed in FIFO order. This means actual RX processing can starve |
| 196 | * out refilling. If there's not enough buffers on RX ring FW will not |
| 197 | * report RX until it is refilled with enough buffers. This |
| 198 | * automatically balances load wrt to CPU power. |
| 199 | * |
| 200 | * This probably comes at a cost of lower maximum throughput but |
| 201 | * improves the avarage and stability. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 202 | spin_lock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 203 | num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; |
| 204 | num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); |
| 205 | num_deficit -= num_to_fill; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 206 | ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); |
| 207 | if (ret == -ENOMEM) { |
| 208 | /* |
| 209 | * Failed to fill it to the desired level - |
| 210 | * we'll start a timer and try again next time. |
| 211 | * As long as enough buffers are left in the ring for |
| 212 | * another A-MPDU rx, no special recovery is needed. |
| 213 | */ |
| 214 | mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + |
| 215 | msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 216 | } else if (num_deficit > 0) { |
| 217 | tasklet_schedule(&htt->rx_replenish_task); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 218 | } |
| 219 | spin_unlock_bh(&htt->rx_ring.lock); |
| 220 | } |
| 221 | |
| 222 | static void ath10k_htt_rx_ring_refill_retry(unsigned long arg) |
| 223 | { |
| 224 | struct ath10k_htt *htt = (struct ath10k_htt *)arg; |
Kalle Valo | af762c0 | 2014-09-14 12:50:17 +0300 | [diff] [blame] | 225 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 226 | ath10k_htt_rx_msdu_buff_replenish(htt); |
| 227 | } |
| 228 | |
Michal Kazior | 3e841fd | 2014-05-14 16:23:31 +0300 | [diff] [blame] | 229 | static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt) |
| 230 | { |
| 231 | struct sk_buff *skb; |
| 232 | int i; |
| 233 | |
| 234 | for (i = 0; i < htt->rx_ring.size; i++) { |
| 235 | skb = htt->rx_ring.netbufs_ring[i]; |
| 236 | if (!skb) |
| 237 | continue; |
| 238 | |
| 239 | dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr, |
| 240 | skb->len + skb_tailroom(skb), |
| 241 | DMA_FROM_DEVICE); |
| 242 | dev_kfree_skb_any(skb); |
| 243 | htt->rx_ring.netbufs_ring[i] = NULL; |
| 244 | } |
| 245 | } |
| 246 | |
Michal Kazior | 95bf21f | 2014-05-16 17:15:39 +0300 | [diff] [blame] | 247 | void ath10k_htt_rx_free(struct ath10k_htt *htt) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 248 | { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 249 | del_timer_sync(&htt->rx_ring.refill_retry_timer); |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 250 | tasklet_kill(&htt->rx_replenish_task); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 251 | tasklet_kill(&htt->txrx_compl_task); |
| 252 | |
| 253 | skb_queue_purge(&htt->tx_compl_q); |
| 254 | skb_queue_purge(&htt->rx_compl_q); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 255 | |
Michal Kazior | 3e841fd | 2014-05-14 16:23:31 +0300 | [diff] [blame] | 256 | ath10k_htt_rx_ring_clean_up(htt); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 257 | |
| 258 | dma_free_coherent(htt->ar->dev, |
| 259 | (htt->rx_ring.size * |
| 260 | sizeof(htt->rx_ring.paddrs_ring)), |
| 261 | htt->rx_ring.paddrs_ring, |
| 262 | htt->rx_ring.base_paddr); |
| 263 | |
| 264 | dma_free_coherent(htt->ar->dev, |
| 265 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 266 | htt->rx_ring.alloc_idx.vaddr, |
| 267 | htt->rx_ring.alloc_idx.paddr); |
| 268 | |
| 269 | kfree(htt->rx_ring.netbufs_ring); |
| 270 | } |
| 271 | |
| 272 | static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) |
| 273 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 274 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 275 | int idx; |
| 276 | struct sk_buff *msdu; |
| 277 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 278 | lockdep_assert_held(&htt->rx_ring.lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 279 | |
Michal Kazior | 8d60ee8 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 280 | if (htt->rx_ring.fill_cnt == 0) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 281 | ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); |
Michal Kazior | 8d60ee8 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 282 | return NULL; |
| 283 | } |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 284 | |
| 285 | idx = htt->rx_ring.sw_rd_idx.msdu_payld; |
| 286 | msdu = htt->rx_ring.netbufs_ring[idx]; |
Michal Kazior | 3e841fd | 2014-05-14 16:23:31 +0300 | [diff] [blame] | 287 | htt->rx_ring.netbufs_ring[idx] = NULL; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 288 | |
| 289 | idx++; |
| 290 | idx &= htt->rx_ring.size_mask; |
| 291 | htt->rx_ring.sw_rd_idx.msdu_payld = idx; |
| 292 | htt->rx_ring.fill_cnt--; |
| 293 | |
Michal Kazior | 4de0280 | 2014-10-23 17:04:23 +0300 | [diff] [blame^] | 294 | dma_unmap_single(htt->ar->dev, |
| 295 | ATH10K_SKB_CB(msdu)->paddr, |
| 296 | msdu->len + skb_tailroom(msdu), |
| 297 | DMA_FROM_DEVICE); |
| 298 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", |
| 299 | msdu->data, msdu->len + skb_tailroom(msdu)); |
| 300 | trace_ath10k_htt_rx_pop_msdu(ar, msdu->data, msdu->len + |
| 301 | skb_tailroom(msdu)); |
| 302 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 303 | return msdu; |
| 304 | } |
| 305 | |
| 306 | static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb) |
| 307 | { |
| 308 | struct sk_buff *next; |
| 309 | |
| 310 | while (skb) { |
| 311 | next = skb->next; |
| 312 | dev_kfree_skb_any(skb); |
| 313 | skb = next; |
| 314 | } |
| 315 | } |
| 316 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 317 | /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 318 | static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, |
| 319 | u8 **fw_desc, int *fw_desc_len, |
| 320 | struct sk_buff **head_msdu, |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 321 | struct sk_buff **tail_msdu, |
| 322 | u32 *attention) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 323 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 324 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 325 | int msdu_len, msdu_chaining = 0; |
Kalle Valo | af762c0 | 2014-09-14 12:50:17 +0300 | [diff] [blame] | 326 | struct sk_buff *msdu, *next; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 327 | struct htt_rx_desc *rx_desc; |
Rajkumar Manoharan | a0883cf | 2014-10-03 08:02:47 +0300 | [diff] [blame] | 328 | u32 tsf; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 329 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 330 | lockdep_assert_held(&htt->rx_ring.lock); |
| 331 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 332 | if (htt->rx_confused) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 333 | ath10k_warn(ar, "htt is confused. refusing rx\n"); |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 334 | return -1; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt); |
| 338 | while (msdu) { |
| 339 | int last_msdu, msdu_len_invalid, msdu_chained; |
| 340 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 341 | rx_desc = (struct htt_rx_desc *)msdu->data; |
| 342 | |
| 343 | /* FIXME: we must report msdu payload since this is what caller |
| 344 | * expects now */ |
| 345 | skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); |
| 346 | skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); |
| 347 | |
| 348 | /* |
| 349 | * Sanity check - confirm the HW is finished filling in the |
| 350 | * rx data. |
| 351 | * If the HW and SW are working correctly, then it's guaranteed |
| 352 | * that the HW's MAC DMA is done before this point in the SW. |
| 353 | * To prevent the case that we handle a stale Rx descriptor, |
| 354 | * just assert for now until we have a way to recover. |
| 355 | */ |
| 356 | if (!(__le32_to_cpu(rx_desc->attention.flags) |
| 357 | & RX_ATTENTION_FLAGS_MSDU_DONE)) { |
| 358 | ath10k_htt_rx_free_msdu_chain(*head_msdu); |
| 359 | *head_msdu = NULL; |
| 360 | msdu = NULL; |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 361 | ath10k_err(ar, "htt rx stopped. cannot recover\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 362 | htt->rx_confused = true; |
| 363 | break; |
| 364 | } |
| 365 | |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 366 | *attention |= __le32_to_cpu(rx_desc->attention.flags) & |
| 367 | (RX_ATTENTION_FLAGS_TKIP_MIC_ERR | |
| 368 | RX_ATTENTION_FLAGS_DECRYPT_ERR | |
| 369 | RX_ATTENTION_FLAGS_FCS_ERR | |
| 370 | RX_ATTENTION_FLAGS_MGMT_TYPE); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 371 | /* |
| 372 | * Copy the FW rx descriptor for this MSDU from the rx |
| 373 | * indication message into the MSDU's netbuf. HL uses the |
| 374 | * same rx indication message definition as LL, and simply |
| 375 | * appends new info (fields from the HW rx desc, and the |
| 376 | * MSDU payload itself). So, the offset into the rx |
| 377 | * indication message only has to account for the standard |
| 378 | * offset of the per-MSDU FW rx desc info within the |
| 379 | * message, and how many bytes of the per-MSDU FW rx desc |
| 380 | * info have already been consumed. (And the endianness of |
| 381 | * the host, since for a big-endian host, the rx ind |
| 382 | * message contents, including the per-MSDU rx desc bytes, |
| 383 | * were byteswapped during upload.) |
| 384 | */ |
| 385 | if (*fw_desc_len > 0) { |
| 386 | rx_desc->fw_desc.info0 = **fw_desc; |
| 387 | /* |
| 388 | * The target is expected to only provide the basic |
| 389 | * per-MSDU rx descriptors. Just to be sure, verify |
| 390 | * that the target has not attached extension data |
| 391 | * (e.g. LRO flow ID). |
| 392 | */ |
| 393 | |
| 394 | /* or more, if there's extension data */ |
| 395 | (*fw_desc)++; |
| 396 | (*fw_desc_len)--; |
| 397 | } else { |
| 398 | /* |
| 399 | * When an oversized AMSDU happened, FW will lost |
| 400 | * some of MSDU status - in this case, the FW |
| 401 | * descriptors provided will be less than the |
| 402 | * actual MSDUs inside this MPDU. Mark the FW |
| 403 | * descriptors so that it will still deliver to |
| 404 | * upper stack, if no CRC error for this MPDU. |
| 405 | * |
| 406 | * FIX THIS - the FW descriptors are actually for |
| 407 | * MSDUs in the end of this A-MSDU instead of the |
| 408 | * beginning. |
| 409 | */ |
| 410 | rx_desc->fw_desc.info0 = 0; |
| 411 | } |
| 412 | |
| 413 | msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) |
| 414 | & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | |
| 415 | RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); |
| 416 | msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0), |
| 417 | RX_MSDU_START_INFO0_MSDU_LENGTH); |
| 418 | msdu_chained = rx_desc->frag_info.ring2_more_count; |
| 419 | |
| 420 | if (msdu_len_invalid) |
| 421 | msdu_len = 0; |
| 422 | |
| 423 | skb_trim(msdu, 0); |
| 424 | skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); |
| 425 | msdu_len -= msdu->len; |
| 426 | |
| 427 | /* FIXME: Do chained buffers include htt_rx_desc or not? */ |
| 428 | while (msdu_chained--) { |
| 429 | struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt); |
| 430 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 431 | skb_trim(next, 0); |
| 432 | skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE)); |
| 433 | msdu_len -= next->len; |
| 434 | |
| 435 | msdu->next = next; |
| 436 | msdu = next; |
Michal Kazior | ede9c8e | 2014-05-14 16:23:31 +0300 | [diff] [blame] | 437 | msdu_chaining = 1; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 438 | } |
| 439 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 440 | last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) & |
| 441 | RX_MSDU_END_INFO0_LAST_MSDU; |
| 442 | |
Rajkumar Manoharan | a0883cf | 2014-10-03 08:02:47 +0300 | [diff] [blame] | 443 | tsf = __le32_to_cpu(rx_desc->ppdu_end.tsf_timestamp); |
| 444 | trace_ath10k_htt_rx_desc(ar, tsf, &rx_desc->attention, |
| 445 | sizeof(*rx_desc) - sizeof(u32)); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 446 | if (last_msdu) { |
| 447 | msdu->next = NULL; |
| 448 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 449 | } |
Kalle Valo | d8bb26b | 2014-09-14 12:50:33 +0300 | [diff] [blame] | 450 | |
| 451 | next = ath10k_htt_rx_netbuf_pop(htt); |
| 452 | msdu->next = next; |
| 453 | msdu = next; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 454 | } |
| 455 | *tail_msdu = msdu; |
| 456 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 457 | if (*head_msdu == NULL) |
| 458 | msdu_chaining = -1; |
| 459 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 460 | /* |
| 461 | * Don't refill the ring yet. |
| 462 | * |
| 463 | * First, the elements popped here are still in use - it is not |
| 464 | * safe to overwrite them until the matching call to |
| 465 | * mpdu_desc_list_next. Second, for efficiency it is preferable to |
| 466 | * refill the rx ring with 1 PPDU's worth of rx buffers (something |
| 467 | * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers |
| 468 | * (something like 3 buffers). Consequently, we'll rely on the txrx |
| 469 | * SW to tell us when it is done pulling all the PPDU's rx buffers |
| 470 | * out of the rx ring, and then refill it just once. |
| 471 | */ |
| 472 | |
| 473 | return msdu_chaining; |
| 474 | } |
| 475 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 476 | static void ath10k_htt_rx_replenish_task(unsigned long ptr) |
| 477 | { |
| 478 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; |
Kalle Valo | af762c0 | 2014-09-14 12:50:17 +0300 | [diff] [blame] | 479 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 480 | ath10k_htt_rx_msdu_buff_replenish(htt); |
| 481 | } |
| 482 | |
Michal Kazior | 95bf21f | 2014-05-16 17:15:39 +0300 | [diff] [blame] | 483 | int ath10k_htt_rx_alloc(struct ath10k_htt *htt) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 484 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 485 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 486 | dma_addr_t paddr; |
| 487 | void *vaddr; |
Kalle Valo | bd8bdbb | 2014-09-14 12:50:00 +0300 | [diff] [blame] | 488 | size_t size; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 489 | struct timer_list *timer = &htt->rx_ring.refill_retry_timer; |
| 490 | |
| 491 | htt->rx_ring.size = ath10k_htt_rx_ring_size(htt); |
| 492 | if (!is_power_of_2(htt->rx_ring.size)) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 493 | ath10k_warn(ar, "htt rx ring size is not power of 2\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 494 | return -EINVAL; |
| 495 | } |
| 496 | |
| 497 | htt->rx_ring.size_mask = htt->rx_ring.size - 1; |
| 498 | |
| 499 | /* |
| 500 | * Set the initial value for the level to which the rx ring |
| 501 | * should be filled, based on the max throughput and the |
| 502 | * worst likely latency for the host to fill the rx ring |
| 503 | * with new buffers. In theory, this fill level can be |
| 504 | * dynamically adjusted from the initial value set here, to |
| 505 | * reflect the actual host latency rather than a |
| 506 | * conservative assumption about the host latency. |
| 507 | */ |
| 508 | htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt); |
| 509 | |
| 510 | htt->rx_ring.netbufs_ring = |
Michal Kazior | 3e841fd | 2014-05-14 16:23:31 +0300 | [diff] [blame] | 511 | kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *), |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 512 | GFP_KERNEL); |
| 513 | if (!htt->rx_ring.netbufs_ring) |
| 514 | goto err_netbuf; |
| 515 | |
Kalle Valo | bd8bdbb | 2014-09-14 12:50:00 +0300 | [diff] [blame] | 516 | size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring); |
| 517 | |
| 518 | vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 519 | if (!vaddr) |
| 520 | goto err_dma_ring; |
| 521 | |
| 522 | htt->rx_ring.paddrs_ring = vaddr; |
| 523 | htt->rx_ring.base_paddr = paddr; |
| 524 | |
| 525 | vaddr = dma_alloc_coherent(htt->ar->dev, |
| 526 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 527 | &paddr, GFP_DMA); |
| 528 | if (!vaddr) |
| 529 | goto err_dma_idx; |
| 530 | |
| 531 | htt->rx_ring.alloc_idx.vaddr = vaddr; |
| 532 | htt->rx_ring.alloc_idx.paddr = paddr; |
| 533 | htt->rx_ring.sw_rd_idx.msdu_payld = 0; |
| 534 | *htt->rx_ring.alloc_idx.vaddr = 0; |
| 535 | |
| 536 | /* Initialize the Rx refill retry timer */ |
| 537 | setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt); |
| 538 | |
| 539 | spin_lock_init(&htt->rx_ring.lock); |
| 540 | |
| 541 | htt->rx_ring.fill_cnt = 0; |
| 542 | if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level)) |
| 543 | goto err_fill_ring; |
| 544 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 545 | tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task, |
| 546 | (unsigned long)htt); |
| 547 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 548 | skb_queue_head_init(&htt->tx_compl_q); |
| 549 | skb_queue_head_init(&htt->rx_compl_q); |
| 550 | |
| 551 | tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task, |
| 552 | (unsigned long)htt); |
| 553 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 554 | ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 555 | htt->rx_ring.size, htt->rx_ring.fill_level); |
| 556 | return 0; |
| 557 | |
| 558 | err_fill_ring: |
| 559 | ath10k_htt_rx_ring_free(htt); |
| 560 | dma_free_coherent(htt->ar->dev, |
| 561 | sizeof(*htt->rx_ring.alloc_idx.vaddr), |
| 562 | htt->rx_ring.alloc_idx.vaddr, |
| 563 | htt->rx_ring.alloc_idx.paddr); |
| 564 | err_dma_idx: |
| 565 | dma_free_coherent(htt->ar->dev, |
| 566 | (htt->rx_ring.size * |
| 567 | sizeof(htt->rx_ring.paddrs_ring)), |
| 568 | htt->rx_ring.paddrs_ring, |
| 569 | htt->rx_ring.base_paddr); |
| 570 | err_dma_ring: |
| 571 | kfree(htt->rx_ring.netbufs_ring); |
| 572 | err_netbuf: |
| 573 | return -ENOMEM; |
| 574 | } |
| 575 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 576 | static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, |
| 577 | enum htt_rx_mpdu_encrypt_type type) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 578 | { |
| 579 | switch (type) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 580 | case HTT_RX_MPDU_ENCRYPT_NONE: |
| 581 | return 0; |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 582 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
| 583 | case HTT_RX_MPDU_ENCRYPT_WEP104: |
| 584 | return IEEE80211_WEP_IV_LEN; |
| 585 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
| 586 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: |
| 587 | return IEEE80211_TKIP_IV_LEN; |
| 588 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
| 589 | return IEEE80211_CCMP_HDR_LEN; |
| 590 | case HTT_RX_MPDU_ENCRYPT_WEP128: |
| 591 | case HTT_RX_MPDU_ENCRYPT_WAPI: |
| 592 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 593 | } |
| 594 | |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 595 | ath10k_warn(ar, "unsupported encryption type %d\n", type); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 596 | return 0; |
| 597 | } |
| 598 | |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 599 | #define MICHAEL_MIC_LEN 8 |
| 600 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 601 | static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar, |
| 602 | enum htt_rx_mpdu_encrypt_type type) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 603 | { |
| 604 | switch (type) { |
| 605 | case HTT_RX_MPDU_ENCRYPT_NONE: |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 606 | return 0; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 607 | case HTT_RX_MPDU_ENCRYPT_WEP40: |
| 608 | case HTT_RX_MPDU_ENCRYPT_WEP104: |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 609 | return IEEE80211_WEP_ICV_LEN; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 610 | case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: |
| 611 | case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 612 | return IEEE80211_TKIP_ICV_LEN; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 613 | case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 614 | return IEEE80211_CCMP_MIC_LEN; |
| 615 | case HTT_RX_MPDU_ENCRYPT_WEP128: |
| 616 | case HTT_RX_MPDU_ENCRYPT_WAPI: |
| 617 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 618 | } |
| 619 | |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 620 | ath10k_warn(ar, "unsupported encryption type %d\n", type); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | /* Applies for first msdu in chain, before altering it. */ |
| 625 | static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb) |
| 626 | { |
| 627 | struct htt_rx_desc *rxd; |
| 628 | enum rx_msdu_decap_format fmt; |
| 629 | |
| 630 | rxd = (void *)skb->data - sizeof(*rxd); |
| 631 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 632 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 633 | |
| 634 | if (fmt == RX_MSDU_DECAP_RAW) |
| 635 | return (void *)skb->data; |
Kalle Valo | d8bb26b | 2014-09-14 12:50:33 +0300 | [diff] [blame] | 636 | |
| 637 | return (void *)skb->data - RX_HTT_HDR_STATUS_LEN; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 638 | } |
| 639 | |
| 640 | /* This function only applies for first msdu in an msdu chain */ |
| 641 | static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr) |
| 642 | { |
Kalle Valo | af762c0 | 2014-09-14 12:50:17 +0300 | [diff] [blame] | 643 | u8 *qc; |
| 644 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 645 | if (ieee80211_is_data_qos(hdr->frame_control)) { |
Kalle Valo | af762c0 | 2014-09-14 12:50:17 +0300 | [diff] [blame] | 646 | qc = ieee80211_get_qos_ctl(hdr); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 647 | if (qc[0] & 0x80) |
| 648 | return true; |
| 649 | } |
| 650 | return false; |
| 651 | } |
| 652 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 653 | struct rfc1042_hdr { |
| 654 | u8 llc_dsap; |
| 655 | u8 llc_ssap; |
| 656 | u8 llc_ctrl; |
| 657 | u8 snap_oui[3]; |
| 658 | __be16 snap_type; |
| 659 | } __packed; |
| 660 | |
| 661 | struct amsdu_subframe_hdr { |
| 662 | u8 dst[ETH_ALEN]; |
| 663 | u8 src[ETH_ALEN]; |
| 664 | __be16 len; |
| 665 | } __packed; |
| 666 | |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 667 | static const u8 rx_legacy_rate_idx[] = { |
| 668 | 3, /* 0x00 - 11Mbps */ |
| 669 | 2, /* 0x01 - 5.5Mbps */ |
| 670 | 1, /* 0x02 - 2Mbps */ |
| 671 | 0, /* 0x03 - 1Mbps */ |
| 672 | 3, /* 0x04 - 11Mbps */ |
| 673 | 2, /* 0x05 - 5.5Mbps */ |
| 674 | 1, /* 0x06 - 2Mbps */ |
| 675 | 0, /* 0x07 - 1Mbps */ |
| 676 | 10, /* 0x08 - 48Mbps */ |
| 677 | 8, /* 0x09 - 24Mbps */ |
| 678 | 6, /* 0x0A - 12Mbps */ |
| 679 | 4, /* 0x0B - 6Mbps */ |
| 680 | 11, /* 0x0C - 54Mbps */ |
| 681 | 9, /* 0x0D - 36Mbps */ |
| 682 | 7, /* 0x0E - 18Mbps */ |
| 683 | 5, /* 0x0F - 9Mbps */ |
| 684 | }; |
| 685 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 686 | static void ath10k_htt_rx_h_rates(struct ath10k *ar, |
Janusz Dziedzic | cfadd9b | 2014-03-24 21:23:16 +0100 | [diff] [blame] | 687 | enum ieee80211_band band, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 688 | u8 info0, u32 info1, u32 info2, |
Janusz Dziedzic | cfadd9b | 2014-03-24 21:23:16 +0100 | [diff] [blame] | 689 | struct ieee80211_rx_status *status) |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 690 | { |
| 691 | u8 cck, rate, rate_idx, bw, sgi, mcs, nss; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 692 | u8 preamble = 0; |
| 693 | |
| 694 | /* Check if valid fields */ |
| 695 | if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID)) |
| 696 | return; |
| 697 | |
| 698 | preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE); |
| 699 | |
| 700 | switch (preamble) { |
| 701 | case HTT_RX_LEGACY: |
| 702 | cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK; |
| 703 | rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE); |
| 704 | rate_idx = 0; |
| 705 | |
| 706 | if (rate < 0x08 || rate > 0x0F) |
| 707 | break; |
| 708 | |
| 709 | switch (band) { |
| 710 | case IEEE80211_BAND_2GHZ: |
| 711 | if (cck) |
| 712 | rate &= ~BIT(3); |
| 713 | rate_idx = rx_legacy_rate_idx[rate]; |
| 714 | break; |
| 715 | case IEEE80211_BAND_5GHZ: |
| 716 | rate_idx = rx_legacy_rate_idx[rate]; |
| 717 | /* We are using same rate table registering |
| 718 | HW - ath10k_rates[]. In case of 5GHz skip |
| 719 | CCK rates, so -4 here */ |
| 720 | rate_idx -= 4; |
| 721 | break; |
| 722 | default: |
| 723 | break; |
| 724 | } |
| 725 | |
| 726 | status->rate_idx = rate_idx; |
| 727 | break; |
| 728 | case HTT_RX_HT: |
| 729 | case HTT_RX_HT_WITH_TXBF: |
| 730 | /* HT-SIG - Table 20-11 in info1 and info2 */ |
| 731 | mcs = info1 & 0x1F; |
| 732 | nss = mcs >> 3; |
| 733 | bw = (info1 >> 7) & 1; |
| 734 | sgi = (info2 >> 7) & 1; |
| 735 | |
| 736 | status->rate_idx = mcs; |
| 737 | status->flag |= RX_FLAG_HT; |
| 738 | if (sgi) |
| 739 | status->flag |= RX_FLAG_SHORT_GI; |
| 740 | if (bw) |
| 741 | status->flag |= RX_FLAG_40MHZ; |
| 742 | break; |
| 743 | case HTT_RX_VHT: |
| 744 | case HTT_RX_VHT_WITH_TXBF: |
| 745 | /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2 |
| 746 | TODO check this */ |
| 747 | mcs = (info2 >> 4) & 0x0F; |
| 748 | nss = ((info1 >> 10) & 0x07) + 1; |
| 749 | bw = info1 & 3; |
| 750 | sgi = info2 & 1; |
| 751 | |
| 752 | status->rate_idx = mcs; |
| 753 | status->vht_nss = nss; |
| 754 | |
| 755 | if (sgi) |
| 756 | status->flag |= RX_FLAG_SHORT_GI; |
| 757 | |
| 758 | switch (bw) { |
| 759 | /* 20MHZ */ |
| 760 | case 0: |
| 761 | break; |
| 762 | /* 40MHZ */ |
| 763 | case 1: |
| 764 | status->flag |= RX_FLAG_40MHZ; |
| 765 | break; |
| 766 | /* 80MHZ */ |
| 767 | case 2: |
| 768 | status->vht_flag |= RX_VHT_FLAG_80MHZ; |
| 769 | } |
| 770 | |
| 771 | status->flag |= RX_FLAG_VHT; |
| 772 | break; |
| 773 | default: |
| 774 | break; |
| 775 | } |
| 776 | } |
| 777 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 778 | static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt, |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 779 | struct ieee80211_rx_status *rx_status, |
| 780 | struct sk_buff *skb, |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 781 | enum htt_rx_mpdu_encrypt_type enctype, |
| 782 | enum rx_msdu_decap_format fmt, |
| 783 | bool dot11frag) |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 784 | { |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 785 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 786 | |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 787 | rx_status->flag &= ~(RX_FLAG_DECRYPTED | |
| 788 | RX_FLAG_IV_STRIPPED | |
| 789 | RX_FLAG_MMIC_STRIPPED); |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 790 | |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 791 | if (enctype == HTT_RX_MPDU_ENCRYPT_NONE) |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 792 | return; |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 793 | |
| 794 | /* |
| 795 | * There's no explicit rx descriptor flag to indicate whether a given |
| 796 | * frame has been decrypted or not. We're forced to use the decap |
| 797 | * format as an implicit indication. However fragmentation rx is always |
| 798 | * raw and it probably never reports undecrypted raws. |
| 799 | * |
| 800 | * This makes sure sniffed frames are reported as-is without stripping |
| 801 | * the protected flag. |
| 802 | */ |
| 803 | if (fmt == RX_MSDU_DECAP_RAW && !dot11frag) |
| 804 | return; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 805 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 806 | rx_status->flag |= RX_FLAG_DECRYPTED | |
| 807 | RX_FLAG_IV_STRIPPED | |
| 808 | RX_FLAG_MMIC_STRIPPED; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 809 | hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) & |
| 810 | ~IEEE80211_FCTL_PROTECTED); |
| 811 | } |
| 812 | |
Janusz Dziedzic | 36653f0 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 813 | static bool ath10k_htt_rx_h_channel(struct ath10k *ar, |
| 814 | struct ieee80211_rx_status *status) |
| 815 | { |
| 816 | struct ieee80211_channel *ch; |
| 817 | |
| 818 | spin_lock_bh(&ar->data_lock); |
| 819 | ch = ar->scan_channel; |
| 820 | if (!ch) |
| 821 | ch = ar->rx_channel; |
| 822 | spin_unlock_bh(&ar->data_lock); |
| 823 | |
| 824 | if (!ch) |
| 825 | return false; |
| 826 | |
| 827 | status->band = ch->band; |
| 828 | status->freq = ch->center_freq; |
| 829 | |
| 830 | return true; |
| 831 | } |
| 832 | |
Janusz Dziedzic | 76f5329 | 2014-07-28 23:59:43 +0300 | [diff] [blame] | 833 | static const char * const tid_to_ac[] = { |
| 834 | "BE", |
| 835 | "BK", |
| 836 | "BK", |
| 837 | "BE", |
| 838 | "VI", |
| 839 | "VI", |
| 840 | "VO", |
| 841 | "VO", |
| 842 | }; |
| 843 | |
| 844 | static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) |
| 845 | { |
| 846 | u8 *qc; |
| 847 | int tid; |
| 848 | |
| 849 | if (!ieee80211_is_data_qos(hdr->frame_control)) |
| 850 | return ""; |
| 851 | |
| 852 | qc = ieee80211_get_qos_ctl(hdr); |
| 853 | tid = *qc & IEEE80211_QOS_CTL_TID_MASK; |
| 854 | if (tid < 8) |
| 855 | snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); |
| 856 | else |
| 857 | snprintf(out, size, "tid %d", tid); |
| 858 | |
| 859 | return out; |
| 860 | } |
| 861 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 862 | static void ath10k_process_rx(struct ath10k *ar, |
| 863 | struct ieee80211_rx_status *rx_status, |
| 864 | struct sk_buff *skb) |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 865 | { |
| 866 | struct ieee80211_rx_status *status; |
Janusz Dziedzic | 76f5329 | 2014-07-28 23:59:43 +0300 | [diff] [blame] | 867 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
| 868 | char tid[32]; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 869 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 870 | status = IEEE80211_SKB_RXCB(skb); |
| 871 | *status = *rx_status; |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 872 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 873 | ath10k_dbg(ar, ATH10K_DBG_DATA, |
Janusz Dziedzic | 76f5329 | 2014-07-28 23:59:43 +0300 | [diff] [blame] | 874 | "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 875 | skb, |
| 876 | skb->len, |
Janusz Dziedzic | 76f5329 | 2014-07-28 23:59:43 +0300 | [diff] [blame] | 877 | ieee80211_get_SA(hdr), |
| 878 | ath10k_get_tid(hdr, tid, sizeof(tid)), |
| 879 | is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? |
| 880 | "mcast" : "ucast", |
| 881 | (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4, |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 882 | status->flag == 0 ? "legacy" : "", |
| 883 | status->flag & RX_FLAG_HT ? "ht" : "", |
| 884 | status->flag & RX_FLAG_VHT ? "vht" : "", |
| 885 | status->flag & RX_FLAG_40MHZ ? "40" : "", |
| 886 | status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "", |
| 887 | status->flag & RX_FLAG_SHORT_GI ? "sgi " : "", |
| 888 | status->rate_idx, |
| 889 | status->vht_nss, |
| 890 | status->freq, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 891 | status->band, status->flag, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 892 | !!(status->flag & RX_FLAG_FAILED_FCS_CRC), |
Janusz Dziedzic | 76f5329 | 2014-07-28 23:59:43 +0300 | [diff] [blame] | 893 | !!(status->flag & RX_FLAG_MMIC_ERROR), |
| 894 | !!(status->flag & RX_FLAG_AMSDU_MORE)); |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 895 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 896 | skb->data, skb->len); |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 897 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 898 | ieee80211_rx(ar->hw, skb); |
Janusz Dziedzic | 73539b4 | 2014-03-24 21:23:15 +0100 | [diff] [blame] | 899 | } |
| 900 | |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 901 | static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr) |
| 902 | { |
| 903 | /* nwifi header is padded to 4 bytes. this fixes 4addr rx */ |
| 904 | return round_up(ieee80211_hdrlen(hdr->frame_control), 4); |
| 905 | } |
| 906 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 907 | static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt, |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 908 | struct ieee80211_rx_status *rx_status, |
| 909 | struct sk_buff *skb_in) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 910 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 911 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 912 | struct htt_rx_desc *rxd; |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 913 | struct sk_buff *skb = skb_in; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 914 | struct sk_buff *first; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 915 | enum rx_msdu_decap_format fmt; |
| 916 | enum htt_rx_mpdu_encrypt_type enctype; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 917 | struct ieee80211_hdr *hdr; |
Michal Kazior | 72bdeb8 | 2014-07-28 23:59:42 +0300 | [diff] [blame] | 918 | u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 919 | unsigned int hdr_len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 920 | |
| 921 | rxd = (void *)skb->data - sizeof(*rxd); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 922 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 923 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 924 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 925 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 926 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 927 | memcpy(hdr_buf, hdr, hdr_len); |
| 928 | hdr = (struct ieee80211_hdr *)hdr_buf; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 929 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 930 | first = skb; |
| 931 | while (skb) { |
| 932 | void *decap_hdr; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 933 | int len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 934 | |
| 935 | rxd = (void *)skb->data - sizeof(*rxd); |
| 936 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 937 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 938 | decap_hdr = (void *)rxd->rx_hdr_status; |
| 939 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 940 | skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); |
| 941 | |
| 942 | /* First frame in an A-MSDU chain has more decapped data. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 943 | if (skb == first) { |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 944 | len = round_up(ieee80211_hdrlen(hdr->frame_control), 4); |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 945 | len += round_up(ath10k_htt_rx_crypto_param_len(ar, |
| 946 | enctype), 4); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 947 | decap_hdr += len; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 948 | } |
| 949 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 950 | switch (fmt) { |
| 951 | case RX_MSDU_DECAP_RAW: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 952 | /* remove trailing FCS */ |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 953 | skb_trim(skb, skb->len - FCS_LEN); |
| 954 | break; |
| 955 | case RX_MSDU_DECAP_NATIVE_WIFI: |
Michal Kazior | 72bdeb8 | 2014-07-28 23:59:42 +0300 | [diff] [blame] | 956 | /* pull decapped header and copy SA & DA */ |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 957 | hdr = (struct ieee80211_hdr *)skb->data; |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 958 | hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); |
Kalle Valo | b25f32c | 2014-09-14 12:50:49 +0300 | [diff] [blame] | 959 | ether_addr_copy(da, ieee80211_get_DA(hdr)); |
| 960 | ether_addr_copy(sa, ieee80211_get_SA(hdr)); |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 961 | skb_pull(skb, hdr_len); |
| 962 | |
| 963 | /* push original 802.11 header */ |
| 964 | hdr = (struct ieee80211_hdr *)hdr_buf; |
| 965 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 966 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 967 | |
| 968 | /* original A-MSDU header has the bit set but we're |
| 969 | * not including A-MSDU subframe header */ |
| 970 | hdr = (struct ieee80211_hdr *)skb->data; |
| 971 | qos = ieee80211_get_qos_ctl(hdr); |
| 972 | qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; |
| 973 | |
Michal Kazior | 72bdeb8 | 2014-07-28 23:59:42 +0300 | [diff] [blame] | 974 | /* original 802.11 header has a different DA and in |
| 975 | * case of 4addr it may also have different SA |
| 976 | */ |
Kalle Valo | b25f32c | 2014-09-14 12:50:49 +0300 | [diff] [blame] | 977 | ether_addr_copy(ieee80211_get_DA(hdr), da); |
| 978 | ether_addr_copy(ieee80211_get_SA(hdr), sa); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 979 | break; |
| 980 | case RX_MSDU_DECAP_ETHERNET2_DIX: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 981 | /* strip ethernet header and insert decapped 802.11 |
| 982 | * header, amsdu subframe header and rfc1042 header */ |
| 983 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 984 | len = 0; |
| 985 | len += sizeof(struct rfc1042_hdr); |
| 986 | len += sizeof(struct amsdu_subframe_hdr); |
Michal Kazior | dfa95b5 | 2013-08-13 07:59:37 +0200 | [diff] [blame] | 987 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 988 | skb_pull(skb, sizeof(struct ethhdr)); |
| 989 | memcpy(skb_push(skb, len), decap_hdr, len); |
| 990 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 991 | break; |
| 992 | case RX_MSDU_DECAP_8023_SNAP_LLC: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 993 | /* insert decapped 802.11 header making a singly |
| 994 | * A-MSDU */ |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 995 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
| 996 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 997 | } |
| 998 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 999 | skb_in = skb; |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 1000 | ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt, |
| 1001 | false); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1002 | skb = skb->next; |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1003 | skb_in->next = NULL; |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 1004 | |
Kalle Valo | 652de35 | 2013-11-13 15:23:30 +0200 | [diff] [blame] | 1005 | if (skb) |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1006 | rx_status->flag |= RX_FLAG_AMSDU_MORE; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1007 | else |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1008 | rx_status->flag &= ~RX_FLAG_AMSDU_MORE; |
Kalle Valo | 652de35 | 2013-11-13 15:23:30 +0200 | [diff] [blame] | 1009 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1010 | ath10k_process_rx(htt->ar, rx_status, skb_in); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1011 | } |
| 1012 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 1013 | /* FIXME: It might be nice to re-assemble the A-MSDU when there's a |
| 1014 | * monitor interface active for sniffing purposes. */ |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1015 | } |
| 1016 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1017 | static void ath10k_htt_rx_msdu(struct ath10k_htt *htt, |
| 1018 | struct ieee80211_rx_status *rx_status, |
| 1019 | struct sk_buff *skb) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1020 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1021 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1022 | struct htt_rx_desc *rxd; |
| 1023 | struct ieee80211_hdr *hdr; |
| 1024 | enum rx_msdu_decap_format fmt; |
| 1025 | enum htt_rx_mpdu_encrypt_type enctype; |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1026 | int hdr_len; |
| 1027 | void *rfc1042; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1028 | |
| 1029 | /* This shouldn't happen. If it does than it may be a FW bug. */ |
| 1030 | if (skb->next) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1031 | ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1032 | ath10k_htt_rx_free_msdu_chain(skb->next); |
| 1033 | skb->next = NULL; |
| 1034 | } |
| 1035 | |
| 1036 | rxd = (void *)skb->data - sizeof(*rxd); |
| 1037 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 1038 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1039 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 1040 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1041 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 1042 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1043 | |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 1044 | skb->ip_summed = ath10k_htt_rx_get_csum_state(skb); |
| 1045 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1046 | switch (fmt) { |
| 1047 | case RX_MSDU_DECAP_RAW: |
| 1048 | /* remove trailing FCS */ |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1049 | skb_trim(skb, skb->len - FCS_LEN); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1050 | break; |
| 1051 | case RX_MSDU_DECAP_NATIVE_WIFI: |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1052 | /* Pull decapped header */ |
| 1053 | hdr = (struct ieee80211_hdr *)skb->data; |
Michal Kazior | d960c36 | 2014-02-25 09:29:57 +0200 | [diff] [blame] | 1054 | hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr); |
Michal Kazior | 784f69d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1055 | skb_pull(skb, hdr_len); |
| 1056 | |
| 1057 | /* Push original header */ |
| 1058 | hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status; |
| 1059 | hdr_len = ieee80211_hdrlen(hdr->frame_control); |
| 1060 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1061 | break; |
| 1062 | case RX_MSDU_DECAP_ETHERNET2_DIX: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1063 | /* strip ethernet header and insert decapped 802.11 header and |
| 1064 | * rfc1042 header */ |
| 1065 | |
| 1066 | rfc1042 = hdr; |
| 1067 | rfc1042 += roundup(hdr_len, 4); |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1068 | rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar, |
| 1069 | enctype), 4); |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1070 | |
| 1071 | skb_pull(skb, sizeof(struct ethhdr)); |
| 1072 | memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)), |
| 1073 | rfc1042, sizeof(struct rfc1042_hdr)); |
| 1074 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1075 | break; |
| 1076 | case RX_MSDU_DECAP_8023_SNAP_LLC: |
Michal Kazior | e3fbf8d | 2013-09-26 10:12:23 +0300 | [diff] [blame] | 1077 | /* remove A-MSDU subframe header and insert |
| 1078 | * decapped 802.11 header. rfc1042 header is already there */ |
| 1079 | |
| 1080 | skb_pull(skb, sizeof(struct amsdu_subframe_hdr)); |
| 1081 | memcpy(skb_push(skb, hdr_len), hdr, hdr_len); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1082 | break; |
| 1083 | } |
| 1084 | |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 1085 | ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false); |
Michal Kazior | f6dc209 | 2013-09-26 10:12:22 +0300 | [diff] [blame] | 1086 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1087 | ath10k_process_rx(htt->ar, rx_status, skb); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1088 | } |
| 1089 | |
Michal Kazior | 605f81a | 2013-07-31 10:47:56 +0200 | [diff] [blame] | 1090 | static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) |
| 1091 | { |
| 1092 | struct htt_rx_desc *rxd; |
| 1093 | u32 flags, info; |
| 1094 | bool is_ip4, is_ip6; |
| 1095 | bool is_tcp, is_udp; |
| 1096 | bool ip_csum_ok, tcpudp_csum_ok; |
| 1097 | |
| 1098 | rxd = (void *)skb->data - sizeof(*rxd); |
| 1099 | flags = __le32_to_cpu(rxd->attention.flags); |
| 1100 | info = __le32_to_cpu(rxd->msdu_start.info1); |
| 1101 | |
| 1102 | is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); |
| 1103 | is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); |
| 1104 | is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); |
| 1105 | is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); |
| 1106 | ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); |
| 1107 | tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); |
| 1108 | |
| 1109 | if (!is_ip4 && !is_ip6) |
| 1110 | return CHECKSUM_NONE; |
| 1111 | if (!is_tcp && !is_udp) |
| 1112 | return CHECKSUM_NONE; |
| 1113 | if (!ip_csum_ok) |
| 1114 | return CHECKSUM_NONE; |
| 1115 | if (!tcpudp_csum_ok) |
| 1116 | return CHECKSUM_NONE; |
| 1117 | |
| 1118 | return CHECKSUM_UNNECESSARY; |
| 1119 | } |
| 1120 | |
Ben Greear | bfa3536 | 2014-03-03 14:07:09 -0800 | [diff] [blame] | 1121 | static int ath10k_unchain_msdu(struct sk_buff *msdu_head) |
| 1122 | { |
| 1123 | struct sk_buff *next = msdu_head->next; |
| 1124 | struct sk_buff *to_free = next; |
| 1125 | int space; |
| 1126 | int total_len = 0; |
| 1127 | |
| 1128 | /* TODO: Might could optimize this by using |
| 1129 | * skb_try_coalesce or similar method to |
| 1130 | * decrease copying, or maybe get mac80211 to |
| 1131 | * provide a way to just receive a list of |
| 1132 | * skb? |
| 1133 | */ |
| 1134 | |
| 1135 | msdu_head->next = NULL; |
| 1136 | |
| 1137 | /* Allocate total length all at once. */ |
| 1138 | while (next) { |
| 1139 | total_len += next->len; |
| 1140 | next = next->next; |
| 1141 | } |
| 1142 | |
| 1143 | space = total_len - skb_tailroom(msdu_head); |
| 1144 | if ((space > 0) && |
| 1145 | (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) { |
| 1146 | /* TODO: bump some rx-oom error stat */ |
| 1147 | /* put it back together so we can free the |
| 1148 | * whole list at once. |
| 1149 | */ |
| 1150 | msdu_head->next = to_free; |
| 1151 | return -1; |
| 1152 | } |
| 1153 | |
| 1154 | /* Walk list again, copying contents into |
| 1155 | * msdu_head |
| 1156 | */ |
| 1157 | next = to_free; |
| 1158 | while (next) { |
| 1159 | skb_copy_from_linear_data(next, skb_put(msdu_head, next->len), |
| 1160 | next->len); |
| 1161 | next = next->next; |
| 1162 | } |
| 1163 | |
| 1164 | /* If here, we have consolidated skb. Free the |
| 1165 | * fragments and pass the main skb on up the |
| 1166 | * stack. |
| 1167 | */ |
| 1168 | ath10k_htt_rx_free_msdu_chain(to_free); |
| 1169 | return 0; |
| 1170 | } |
| 1171 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1172 | static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt, |
| 1173 | struct sk_buff *head, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1174 | enum htt_rx_mpdu_status status, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1175 | bool channel_set, |
| 1176 | u32 attention) |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1177 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1178 | struct ath10k *ar = htt->ar; |
| 1179 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1180 | if (head->len == 0) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1181 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1182 | "htt rx dropping due to zero-len\n"); |
| 1183 | return false; |
| 1184 | } |
| 1185 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1186 | if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1187 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1188 | "htt rx dropping due to decrypt-err\n"); |
| 1189 | return false; |
| 1190 | } |
| 1191 | |
Janusz Dziedzic | 36653f0 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 1192 | if (!channel_set) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1193 | ath10k_warn(ar, "no channel configured; ignoring frame!\n"); |
Janusz Dziedzic | 36653f0 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 1194 | return false; |
| 1195 | } |
| 1196 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1197 | /* Skip mgmt frames while we handle this in WMI */ |
Michal Kazior | f6b946e | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 1198 | if (attention & RX_ATTENTION_FLAGS_MGMT_TYPE) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1199 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n"); |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1200 | return false; |
| 1201 | } |
| 1202 | |
| 1203 | if (status != HTT_RX_IND_MPDU_STATUS_OK && |
| 1204 | status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR && |
| 1205 | status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER && |
Michal Kazior | 1bbc097 | 2014-04-08 09:45:47 +0300 | [diff] [blame] | 1206 | !htt->ar->monitor_started) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1207 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1208 | "htt rx ignoring frame w/ status %d\n", |
| 1209 | status); |
| 1210 | return false; |
| 1211 | } |
| 1212 | |
| 1213 | if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1214 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1215 | "htt rx CAC running\n"); |
| 1216 | return false; |
| 1217 | } |
| 1218 | |
| 1219 | return true; |
| 1220 | } |
| 1221 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1222 | static void ath10k_htt_rx_handler(struct ath10k_htt *htt, |
| 1223 | struct htt_rx_indication *rx) |
| 1224 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1225 | struct ath10k *ar = htt->ar; |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1226 | struct ieee80211_rx_status *rx_status = &htt->rx_status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1227 | struct htt_rx_indication_mpdu_range *mpdu_ranges; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1228 | enum htt_rx_mpdu_status status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1229 | struct ieee80211_hdr *hdr; |
| 1230 | int num_mpdu_ranges; |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1231 | u32 attention; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1232 | int fw_desc_len; |
| 1233 | u8 *fw_desc; |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1234 | bool channel_set; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1235 | int i, j; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1236 | int ret; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1237 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1238 | lockdep_assert_held(&htt->rx_ring.lock); |
| 1239 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1240 | fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes); |
| 1241 | fw_desc = (u8 *)&rx->fw_desc; |
| 1242 | |
| 1243 | num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), |
| 1244 | HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); |
| 1245 | mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); |
| 1246 | |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1247 | /* Fill this once, while this is per-ppdu */ |
Janusz Dziedzic | 2289188 | 2014-03-24 21:24:58 +0100 | [diff] [blame] | 1248 | if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) { |
| 1249 | memset(rx_status, 0, sizeof(*rx_status)); |
| 1250 | rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR + |
| 1251 | rx->ppdu.combined_rssi; |
| 1252 | } |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1253 | |
| 1254 | if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) { |
| 1255 | /* TSF available only in 32-bit */ |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1256 | rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff; |
| 1257 | rx_status->flag |= RX_FLAG_MACTIME_END; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1258 | } |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1259 | |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1260 | channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status); |
Janusz Dziedzic | 36653f0 | 2014-03-24 21:23:18 +0100 | [diff] [blame] | 1261 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1262 | if (channel_set) { |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1263 | ath10k_htt_rx_h_rates(htt->ar, rx_status->band, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1264 | rx->ppdu.info0, |
| 1265 | __le32_to_cpu(rx->ppdu.info1), |
| 1266 | __le32_to_cpu(rx->ppdu.info2), |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1267 | rx_status); |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1268 | } |
Janusz Dziedzic | e8dc1a9 | 2014-03-19 07:09:41 +0100 | [diff] [blame] | 1269 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1270 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1271 | rx, sizeof(*rx) + |
| 1272 | (sizeof(struct htt_rx_indication_mpdu_range) * |
| 1273 | num_mpdu_ranges)); |
| 1274 | |
| 1275 | for (i = 0; i < num_mpdu_ranges; i++) { |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1276 | status = mpdu_ranges[i].mpdu_range_status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1277 | |
| 1278 | for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) { |
| 1279 | struct sk_buff *msdu_head, *msdu_tail; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1280 | |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 1281 | attention = 0; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1282 | msdu_head = NULL; |
| 1283 | msdu_tail = NULL; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1284 | ret = ath10k_htt_rx_amsdu_pop(htt, |
| 1285 | &fw_desc, |
| 1286 | &fw_desc_len, |
| 1287 | &msdu_head, |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 1288 | &msdu_tail, |
| 1289 | &attention); |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1290 | |
| 1291 | if (ret < 0) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1292 | ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n", |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1293 | ret); |
| 1294 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1295 | continue; |
| 1296 | } |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1297 | |
Janusz Dziedzic | 2acc4eb | 2014-03-19 07:09:40 +0100 | [diff] [blame] | 1298 | if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head, |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1299 | status, |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1300 | channel_set, |
| 1301 | attention)) { |
Marek Puzyniak | e8a50f8 | 2013-11-20 09:59:47 +0200 | [diff] [blame] | 1302 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1303 | continue; |
| 1304 | } |
| 1305 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1306 | if (ret > 0 && |
| 1307 | ath10k_unchain_msdu(msdu_head) < 0) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1308 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1309 | continue; |
| 1310 | } |
| 1311 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1312 | if (attention & RX_ATTENTION_FLAGS_FCS_ERR) |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1313 | rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1314 | else |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1315 | rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1316 | |
Janusz Dziedzic | 78433f9 | 2014-03-24 21:23:21 +0100 | [diff] [blame] | 1317 | if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR) |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1318 | rx_status->flag |= RX_FLAG_MMIC_ERROR; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1319 | else |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1320 | rx_status->flag &= ~RX_FLAG_MMIC_ERROR; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1321 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1322 | hdr = ath10k_htt_rx_skb_get_hdr(msdu_head); |
| 1323 | |
| 1324 | if (ath10k_htt_rx_hdr_is_amsdu(hdr)) |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1325 | ath10k_htt_rx_amsdu(htt, rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1326 | else |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1327 | ath10k_htt_rx_msdu(htt, rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1328 | } |
| 1329 | } |
| 1330 | |
Michal Kazior | 6e712d4 | 2013-09-24 10:18:36 +0200 | [diff] [blame] | 1331 | tasklet_schedule(&htt->rx_replenish_task); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1332 | } |
| 1333 | |
| 1334 | static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt, |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 1335 | struct htt_rx_fragment_indication *frag) |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1336 | { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1337 | struct ath10k *ar = htt->ar; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1338 | struct sk_buff *msdu_head, *msdu_tail; |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1339 | enum htt_rx_mpdu_encrypt_type enctype; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1340 | struct htt_rx_desc *rxd; |
| 1341 | enum rx_msdu_decap_format fmt; |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1342 | struct ieee80211_rx_status *rx_status = &htt->rx_status; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1343 | struct ieee80211_hdr *hdr; |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1344 | int ret; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1345 | bool tkip_mic_err; |
| 1346 | bool decrypt_err; |
| 1347 | u8 *fw_desc; |
| 1348 | int fw_desc_len, hdrlen, paramlen; |
| 1349 | int trim; |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 1350 | u32 attention = 0; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1351 | |
| 1352 | fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes); |
| 1353 | fw_desc = (u8 *)frag->fw_msdu_rx_desc; |
| 1354 | |
| 1355 | msdu_head = NULL; |
| 1356 | msdu_tail = NULL; |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1357 | |
| 1358 | spin_lock_bh(&htt->rx_ring.lock); |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1359 | ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len, |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 1360 | &msdu_head, &msdu_tail, |
| 1361 | &attention); |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1362 | spin_unlock_bh(&htt->rx_ring.lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1363 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1364 | ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1365 | |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1366 | if (ret) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1367 | ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n", |
Janusz Dziedzic | d84dd60 | 2014-03-24 21:23:20 +0100 | [diff] [blame] | 1368 | ret); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1369 | ath10k_htt_rx_free_msdu_chain(msdu_head); |
| 1370 | return; |
| 1371 | } |
| 1372 | |
| 1373 | /* FIXME: implement signal strength */ |
Ben Greear | 4b81d17 | 2014-05-26 12:46:04 +0300 | [diff] [blame] | 1374 | rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1375 | |
| 1376 | hdr = (struct ieee80211_hdr *)msdu_head->data; |
| 1377 | rxd = (void *)msdu_head->data - sizeof(*rxd); |
Janusz Dziedzic | 0ccb7a3 | 2014-07-25 11:28:50 +0300 | [diff] [blame] | 1378 | tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); |
| 1379 | decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1380 | fmt = MS(__le32_to_cpu(rxd->msdu_start.info1), |
Kalle Valo | 5b07e07 | 2014-09-14 12:50:06 +0300 | [diff] [blame] | 1381 | RX_MSDU_START_INFO1_DECAP_FORMAT); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1382 | |
| 1383 | if (fmt != RX_MSDU_DECAP_RAW) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1384 | ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1385 | dev_kfree_skb_any(msdu_head); |
| 1386 | goto end; |
| 1387 | } |
| 1388 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1389 | enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), |
| 1390 | RX_MPDU_START_INFO0_ENCRYPT_TYPE); |
Michal Kazior | c071dcb | 2014-05-23 11:33:18 +0300 | [diff] [blame] | 1391 | ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt, |
| 1392 | true); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1393 | msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1394 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1395 | if (tkip_mic_err) |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1396 | ath10k_warn(ar, "tkip mic error\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1397 | |
| 1398 | if (decrypt_err) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1399 | ath10k_warn(ar, "decryption err in fragmented rx\n"); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1400 | dev_kfree_skb_any(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1401 | goto end; |
| 1402 | } |
| 1403 | |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1404 | if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) { |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1405 | hdrlen = ieee80211_hdrlen(hdr->frame_control); |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1406 | paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1407 | |
| 1408 | /* It is more efficient to move the header than the payload */ |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1409 | memmove((void *)msdu_head->data + paramlen, |
| 1410 | (void *)msdu_head->data, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1411 | hdrlen); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1412 | skb_pull(msdu_head, paramlen); |
| 1413 | hdr = (struct ieee80211_hdr *)msdu_head->data; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1414 | } |
| 1415 | |
| 1416 | /* remove trailing FCS */ |
| 1417 | trim = 4; |
| 1418 | |
| 1419 | /* remove crypto trailer */ |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1420 | trim += ath10k_htt_rx_crypto_tail_len(ar, enctype); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1421 | |
| 1422 | /* last fragment of TKIP frags has MIC */ |
| 1423 | if (!ieee80211_has_morefrags(hdr->frame_control) && |
Janusz Dziedzic | 87326c9 | 2014-03-24 21:23:19 +0100 | [diff] [blame] | 1424 | enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) |
Michal Kazior | 890d3b2 | 2014-10-23 17:04:22 +0300 | [diff] [blame] | 1425 | trim += MICHAEL_MIC_LEN; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1426 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1427 | if (trim > msdu_head->len) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1428 | ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n"); |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1429 | dev_kfree_skb_any(msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1430 | goto end; |
| 1431 | } |
| 1432 | |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1433 | skb_trim(msdu_head, msdu_head->len - trim); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1434 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1435 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ", |
Janusz Dziedzic | 85f6d7c | 2014-03-24 21:23:22 +0100 | [diff] [blame] | 1436 | msdu_head->data, msdu_head->len); |
Janusz Dziedzic | 6df92a3 | 2014-03-24 21:24:57 +0100 | [diff] [blame] | 1437 | ath10k_process_rx(htt->ar, rx_status, msdu_head); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1438 | |
| 1439 | end: |
| 1440 | if (fw_desc_len > 0) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1441 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1442 | "expecting more fragmented rx in one indication %d\n", |
| 1443 | fw_desc_len); |
| 1444 | } |
| 1445 | } |
| 1446 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1447 | static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar, |
| 1448 | struct sk_buff *skb) |
| 1449 | { |
| 1450 | struct ath10k_htt *htt = &ar->htt; |
| 1451 | struct htt_resp *resp = (struct htt_resp *)skb->data; |
| 1452 | struct htt_tx_done tx_done = {}; |
| 1453 | int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); |
| 1454 | __le16 msdu_id; |
| 1455 | int i; |
| 1456 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1457 | lockdep_assert_held(&htt->tx_lock); |
| 1458 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1459 | switch (status) { |
| 1460 | case HTT_DATA_TX_STATUS_NO_ACK: |
| 1461 | tx_done.no_ack = true; |
| 1462 | break; |
| 1463 | case HTT_DATA_TX_STATUS_OK: |
| 1464 | break; |
| 1465 | case HTT_DATA_TX_STATUS_DISCARD: |
| 1466 | case HTT_DATA_TX_STATUS_POSTPONE: |
| 1467 | case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL: |
| 1468 | tx_done.discard = true; |
| 1469 | break; |
| 1470 | default: |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1471 | ath10k_warn(ar, "unhandled tx completion status %d\n", status); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1472 | tx_done.discard = true; |
| 1473 | break; |
| 1474 | } |
| 1475 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1476 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1477 | resp->data_tx_completion.num_msdus); |
| 1478 | |
| 1479 | for (i = 0; i < resp->data_tx_completion.num_msdus; i++) { |
| 1480 | msdu_id = resp->data_tx_completion.msdus[i]; |
| 1481 | tx_done.msdu_id = __le16_to_cpu(msdu_id); |
| 1482 | ath10k_txrx_tx_unref(htt, &tx_done); |
| 1483 | } |
| 1484 | } |
| 1485 | |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1486 | static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) |
| 1487 | { |
| 1488 | struct htt_rx_addba *ev = &resp->rx_addba; |
| 1489 | struct ath10k_peer *peer; |
| 1490 | struct ath10k_vif *arvif; |
| 1491 | u16 info0, tid, peer_id; |
| 1492 | |
| 1493 | info0 = __le16_to_cpu(ev->info0); |
| 1494 | tid = MS(info0, HTT_RX_BA_INFO0_TID); |
| 1495 | peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); |
| 1496 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1497 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1498 | "htt rx addba tid %hu peer_id %hu size %hhu\n", |
| 1499 | tid, peer_id, ev->window_size); |
| 1500 | |
| 1501 | spin_lock_bh(&ar->data_lock); |
| 1502 | peer = ath10k_peer_find_by_id(ar, peer_id); |
| 1503 | if (!peer) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1504 | ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1505 | peer_id); |
| 1506 | spin_unlock_bh(&ar->data_lock); |
| 1507 | return; |
| 1508 | } |
| 1509 | |
| 1510 | arvif = ath10k_get_arvif(ar, peer->vdev_id); |
| 1511 | if (!arvif) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1512 | ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1513 | peer->vdev_id); |
| 1514 | spin_unlock_bh(&ar->data_lock); |
| 1515 | return; |
| 1516 | } |
| 1517 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1518 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1519 | "htt rx start rx ba session sta %pM tid %hu size %hhu\n", |
| 1520 | peer->addr, tid, ev->window_size); |
| 1521 | |
| 1522 | ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); |
| 1523 | spin_unlock_bh(&ar->data_lock); |
| 1524 | } |
| 1525 | |
| 1526 | static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) |
| 1527 | { |
| 1528 | struct htt_rx_delba *ev = &resp->rx_delba; |
| 1529 | struct ath10k_peer *peer; |
| 1530 | struct ath10k_vif *arvif; |
| 1531 | u16 info0, tid, peer_id; |
| 1532 | |
| 1533 | info0 = __le16_to_cpu(ev->info0); |
| 1534 | tid = MS(info0, HTT_RX_BA_INFO0_TID); |
| 1535 | peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); |
| 1536 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1537 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1538 | "htt rx delba tid %hu peer_id %hu\n", |
| 1539 | tid, peer_id); |
| 1540 | |
| 1541 | spin_lock_bh(&ar->data_lock); |
| 1542 | peer = ath10k_peer_find_by_id(ar, peer_id); |
| 1543 | if (!peer) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1544 | ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n", |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1545 | peer_id); |
| 1546 | spin_unlock_bh(&ar->data_lock); |
| 1547 | return; |
| 1548 | } |
| 1549 | |
| 1550 | arvif = ath10k_get_arvif(ar, peer->vdev_id); |
| 1551 | if (!arvif) { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1552 | ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1553 | peer->vdev_id); |
| 1554 | spin_unlock_bh(&ar->data_lock); |
| 1555 | return; |
| 1556 | } |
| 1557 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1558 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1559 | "htt rx stop rx ba session sta %pM tid %hu\n", |
| 1560 | peer->addr, tid); |
| 1561 | |
| 1562 | ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); |
| 1563 | spin_unlock_bh(&ar->data_lock); |
| 1564 | } |
| 1565 | |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1566 | void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) |
| 1567 | { |
Michal Kazior | edb8236 | 2013-07-05 16:15:14 +0300 | [diff] [blame] | 1568 | struct ath10k_htt *htt = &ar->htt; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1569 | struct htt_resp *resp = (struct htt_resp *)skb->data; |
| 1570 | |
| 1571 | /* confirm alignment */ |
| 1572 | if (!IS_ALIGNED((unsigned long)skb->data, 4)) |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1573 | ath10k_warn(ar, "unaligned htt message, expect trouble\n"); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1574 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1575 | ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1576 | resp->hdr.msg_type); |
| 1577 | switch (resp->hdr.msg_type) { |
| 1578 | case HTT_T2H_MSG_TYPE_VERSION_CONF: { |
| 1579 | htt->target_version_major = resp->ver_resp.major; |
| 1580 | htt->target_version_minor = resp->ver_resp.minor; |
| 1581 | complete(&htt->target_version_received); |
| 1582 | break; |
| 1583 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1584 | case HTT_T2H_MSG_TYPE_RX_IND: |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1585 | spin_lock_bh(&htt->rx_ring.lock); |
| 1586 | __skb_queue_tail(&htt->rx_compl_q, skb); |
| 1587 | spin_unlock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1588 | tasklet_schedule(&htt->txrx_compl_task); |
| 1589 | return; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1590 | case HTT_T2H_MSG_TYPE_PEER_MAP: { |
| 1591 | struct htt_peer_map_event ev = { |
| 1592 | .vdev_id = resp->peer_map.vdev_id, |
| 1593 | .peer_id = __le16_to_cpu(resp->peer_map.peer_id), |
| 1594 | }; |
| 1595 | memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); |
| 1596 | ath10k_peer_map_event(htt, &ev); |
| 1597 | break; |
| 1598 | } |
| 1599 | case HTT_T2H_MSG_TYPE_PEER_UNMAP: { |
| 1600 | struct htt_peer_unmap_event ev = { |
| 1601 | .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), |
| 1602 | }; |
| 1603 | ath10k_peer_unmap_event(htt, &ev); |
| 1604 | break; |
| 1605 | } |
| 1606 | case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { |
| 1607 | struct htt_tx_done tx_done = {}; |
| 1608 | int status = __le32_to_cpu(resp->mgmt_tx_completion.status); |
| 1609 | |
| 1610 | tx_done.msdu_id = |
| 1611 | __le32_to_cpu(resp->mgmt_tx_completion.desc_id); |
| 1612 | |
| 1613 | switch (status) { |
| 1614 | case HTT_MGMT_TX_STATUS_OK: |
| 1615 | break; |
| 1616 | case HTT_MGMT_TX_STATUS_RETRY: |
| 1617 | tx_done.no_ack = true; |
| 1618 | break; |
| 1619 | case HTT_MGMT_TX_STATUS_DROP: |
| 1620 | tx_done.discard = true; |
| 1621 | break; |
| 1622 | } |
| 1623 | |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1624 | spin_lock_bh(&htt->tx_lock); |
Michal Kazior | 0a89f8a | 2013-09-18 14:43:20 +0200 | [diff] [blame] | 1625 | ath10k_txrx_tx_unref(htt, &tx_done); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1626 | spin_unlock_bh(&htt->tx_lock); |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1627 | break; |
| 1628 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1629 | case HTT_T2H_MSG_TYPE_TX_COMPL_IND: |
| 1630 | spin_lock_bh(&htt->tx_lock); |
| 1631 | __skb_queue_tail(&htt->tx_compl_q, skb); |
| 1632 | spin_unlock_bh(&htt->tx_lock); |
| 1633 | tasklet_schedule(&htt->txrx_compl_task); |
| 1634 | return; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1635 | case HTT_T2H_MSG_TYPE_SEC_IND: { |
| 1636 | struct ath10k *ar = htt->ar; |
| 1637 | struct htt_security_indication *ev = &resp->security_indication; |
| 1638 | |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1639 | ath10k_dbg(ar, ATH10K_DBG_HTT, |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1640 | "sec ind peer_id %d unicast %d type %d\n", |
| 1641 | __le16_to_cpu(ev->peer_id), |
| 1642 | !!(ev->flags & HTT_SECURITY_IS_UNICAST), |
| 1643 | MS(ev->flags, HTT_SECURITY_TYPE)); |
| 1644 | complete(&ar->install_key_done); |
| 1645 | break; |
| 1646 | } |
| 1647 | case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1648 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1649 | skb->data, skb->len); |
| 1650 | ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind); |
| 1651 | break; |
| 1652 | } |
| 1653 | case HTT_T2H_MSG_TYPE_TEST: |
| 1654 | /* FIX THIS */ |
| 1655 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1656 | case HTT_T2H_MSG_TYPE_STATS_CONF: |
Michal Kazior | d35a6c1 | 2014-09-02 11:00:21 +0300 | [diff] [blame] | 1657 | trace_ath10k_htt_stats(ar, skb->data, skb->len); |
Kalle Valo | a9bf050 | 2013-09-03 11:43:55 +0300 | [diff] [blame] | 1658 | break; |
| 1659 | case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: |
Michal Kazior | 708b9bd | 2014-07-21 20:52:59 +0300 | [diff] [blame] | 1660 | /* Firmware can return tx frames if it's unable to fully |
| 1661 | * process them and suspects host may be able to fix it. ath10k |
| 1662 | * sends all tx frames as already inspected so this shouldn't |
| 1663 | * happen unless fw has a bug. |
| 1664 | */ |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1665 | ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); |
Michal Kazior | 708b9bd | 2014-07-21 20:52:59 +0300 | [diff] [blame] | 1666 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1667 | case HTT_T2H_MSG_TYPE_RX_ADDBA: |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1668 | ath10k_htt_rx_addba(ar, resp); |
| 1669 | break; |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1670 | case HTT_T2H_MSG_TYPE_RX_DELBA: |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1671 | ath10k_htt_rx_delba(ar, resp); |
| 1672 | break; |
Rajkumar Manoharan | bfdd793 | 2014-10-03 08:02:40 +0300 | [diff] [blame] | 1673 | case HTT_T2H_MSG_TYPE_PKTLOG: { |
| 1674 | struct ath10k_pktlog_hdr *hdr = |
| 1675 | (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload; |
| 1676 | |
| 1677 | trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, |
| 1678 | sizeof(*hdr) + |
| 1679 | __le16_to_cpu(hdr->size)); |
| 1680 | break; |
| 1681 | } |
Michal Kazior | aa5b4fb | 2014-07-23 12:20:33 +0200 | [diff] [blame] | 1682 | case HTT_T2H_MSG_TYPE_RX_FLUSH: { |
| 1683 | /* Ignore this event because mac80211 takes care of Rx |
| 1684 | * aggregation reordering. |
| 1685 | */ |
| 1686 | break; |
| 1687 | } |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1688 | default: |
Michal Kazior | 2358a54 | 2014-10-02 13:32:55 +0200 | [diff] [blame] | 1689 | ath10k_warn(ar, "htt event (%d) not handled\n", |
| 1690 | resp->hdr.msg_type); |
Michal Kazior | 7aa7a72 | 2014-08-25 12:09:38 +0200 | [diff] [blame] | 1691 | ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", |
Kalle Valo | 5e3dd15 | 2013-06-12 20:52:10 +0300 | [diff] [blame] | 1692 | skb->data, skb->len); |
| 1693 | break; |
| 1694 | }; |
| 1695 | |
| 1696 | /* Free the indication buffer */ |
| 1697 | dev_kfree_skb_any(skb); |
| 1698 | } |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1699 | |
| 1700 | static void ath10k_htt_txrx_compl_task(unsigned long ptr) |
| 1701 | { |
| 1702 | struct ath10k_htt *htt = (struct ath10k_htt *)ptr; |
| 1703 | struct htt_resp *resp; |
| 1704 | struct sk_buff *skb; |
| 1705 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1706 | spin_lock_bh(&htt->tx_lock); |
| 1707 | while ((skb = __skb_dequeue(&htt->tx_compl_q))) { |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1708 | ath10k_htt_rx_frm_tx_compl(htt->ar, skb); |
| 1709 | dev_kfree_skb_any(skb); |
| 1710 | } |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1711 | spin_unlock_bh(&htt->tx_lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1712 | |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1713 | spin_lock_bh(&htt->rx_ring.lock); |
| 1714 | while ((skb = __skb_dequeue(&htt->rx_compl_q))) { |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1715 | resp = (struct htt_resp *)skb->data; |
| 1716 | ath10k_htt_rx_handler(htt, &resp->rx_ind); |
| 1717 | dev_kfree_skb_any(skb); |
| 1718 | } |
Michal Kazior | 4596708 | 2014-02-27 18:50:05 +0200 | [diff] [blame] | 1719 | spin_unlock_bh(&htt->rx_ring.lock); |
Michal Kazior | 6c5151a | 2014-02-27 18:50:04 +0200 | [diff] [blame] | 1720 | } |