blob: d36c8212dcbf48735387e7b81997d208499ae036 [file] [log] [blame]
Bryan Wud7df69f2013-01-02 15:53:51 -08001/dts-v1/;
2
Stephen Warren1bd0bd42012-10-17 16:38:21 -06003#include "tegra30.dtsi"
Bryan Wud7df69f2013-01-02 15:53:51 -08004
5/ {
6 model = "NVIDIA Tegra30 Beaver evaluation board";
7 compatible = "nvidia,beaver", "nvidia,tegra30";
8
Stephen Warren553c0a22013-12-09 14:43:59 -07009 aliases {
10 rtc0 = "/i2c@7000d000/tps65911@2d";
11 rtc1 = "/rtc@7000e000";
12 };
13
Bryan Wud7df69f2013-01-02 15:53:51 -080014 memory {
Stephen Warren30022bb2013-05-13 09:47:31 +000015 reg = <0x80000000 0x7ff00000>;
Bryan Wud7df69f2013-01-02 15:53:51 -080016 };
17
Stephen Warren58ecb232013-11-25 17:53:16 -070018 pcie-controller@00003000 {
Thierry Redingbb034cb2013-08-09 16:49:28 +020019 status = "okay";
20 pex-clk-supply = <&sys_3v3_pexs_reg>;
21 vdd-supply = <&ldo1_reg>;
22 avdd-supply = <&ldo2_reg>;
23
24 pci@1,0 {
25 status = "okay";
Stephen Warren44fefab2013-08-09 16:49:29 +020026 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020027 };
28
29 pci@2,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020030 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020031 };
32
33 pci@3,0 {
Stephen Warren44fefab2013-08-09 16:49:29 +020034 status = "okay";
35 nvidia,num-lanes = <2>;
Thierry Redingbb034cb2013-08-09 16:49:28 +020036 };
37 };
38
Stephen Warren58ecb232013-11-25 17:53:16 -070039 host1x@50000000 {
40 hdmi@54280000 {
Thierry Reding9bd80b42013-08-12 17:49:03 +020041 status = "okay";
42
43 vdd-supply = <&sys_3v3_reg>;
44 pll-supply = <&vio_reg>;
45
46 nvidia,hpd-gpio =
47 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
48 nvidia,ddc-i2c-bus = <&hdmiddc>;
49 };
50 };
51
Stephen Warren58ecb232013-11-25 17:53:16 -070052 pinmux@70000868 {
Bryan Wud7df69f2013-01-02 15:53:51 -080053 pinctrl-names = "default";
54 pinctrl-0 = <&state_default>;
55
56 state_default: pinmux {
57 sdmmc1_clk_pz0 {
58 nvidia,pins = "sdmmc1_clk_pz0";
59 nvidia,function = "sdmmc1";
Laxman Dewangana47c6622013-12-05 16:14:09 +053060 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
61 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080062 };
63 sdmmc1_cmd_pz1 {
64 nvidia,pins = "sdmmc1_cmd_pz1",
65 "sdmmc1_dat0_py7",
66 "sdmmc1_dat1_py6",
67 "sdmmc1_dat2_py5",
68 "sdmmc1_dat3_py4";
69 nvidia,function = "sdmmc1";
Laxman Dewangana47c6622013-12-05 16:14:09 +053070 nvidia,pull = <TEGRA_PIN_PULL_UP>;
71 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080072 };
73 sdmmc3_clk_pa6 {
74 nvidia,pins = "sdmmc3_clk_pa6";
75 nvidia,function = "sdmmc3";
Laxman Dewangana47c6622013-12-05 16:14:09 +053076 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
77 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080078 };
79 sdmmc3_cmd_pa7 {
80 nvidia,pins = "sdmmc3_cmd_pa7",
81 "sdmmc3_dat0_pb7",
82 "sdmmc3_dat1_pb6",
83 "sdmmc3_dat2_pb5",
84 "sdmmc3_dat3_pb4";
85 nvidia,function = "sdmmc3";
Laxman Dewangana47c6622013-12-05 16:14:09 +053086 nvidia,pull = <TEGRA_PIN_PULL_UP>;
87 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080088 };
89 sdmmc4_clk_pcc4 {
90 nvidia,pins = "sdmmc4_clk_pcc4",
91 "sdmmc4_rst_n_pcc3";
92 nvidia,function = "sdmmc4";
Laxman Dewangana47c6622013-12-05 16:14:09 +053093 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
94 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -080095 };
96 sdmmc4_dat0_paa0 {
97 nvidia,pins = "sdmmc4_dat0_paa0",
98 "sdmmc4_dat1_paa1",
99 "sdmmc4_dat2_paa2",
100 "sdmmc4_dat3_paa3",
101 "sdmmc4_dat4_paa4",
102 "sdmmc4_dat5_paa5",
103 "sdmmc4_dat6_paa6",
104 "sdmmc4_dat7_paa7";
105 nvidia,function = "sdmmc4";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530106 nvidia,pull = <TEGRA_PIN_PULL_UP>;
107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800108 };
109 dap2_fs_pa2 {
110 nvidia,pins = "dap2_fs_pa2",
111 "dap2_sclk_pa3",
112 "dap2_din_pa4",
113 "dap2_dout_pa5";
114 nvidia,function = "i2s1";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530115 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116 nvidia,tristate = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800117 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300118 pex_l1_prsnt_n_pdd4 {
119 nvidia,pins = "pex_l1_prsnt_n_pdd4",
120 "pex_l1_clkreq_n_pdd6";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530121 nvidia,pull = <TEGRA_PIN_PULL_UP>;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300122 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800123 sdio3 {
124 nvidia,pins = "drive_sdio3";
Laxman Dewangana47c6622013-12-05 16:14:09 +0530125 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
126 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800127 nvidia,pull-down-strength = <46>;
128 nvidia,pull-up-strength = <42>;
129 nvidia,slew-rate-rising = <1>;
130 nvidia,slew-rate-falling = <1>;
131 };
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300132 gpv {
133 nvidia,pins = "drive_gpv";
134 nvidia,pull-up-strength = <16>;
135 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800136 };
137 };
138
139 serial@70006000 {
140 status = "okay";
Bryan Wud7df69f2013-01-02 15:53:51 -0800141 };
142
143 i2c@7000c000 {
144 status = "okay";
145 clock-frequency = <100000>;
146 };
147
148 i2c@7000c400 {
149 status = "okay";
150 clock-frequency = <100000>;
151 };
152
153 i2c@7000c500 {
154 status = "okay";
155 clock-frequency = <100000>;
156 };
157
Thierry Reding9bd80b42013-08-12 17:49:03 +0200158 hdmiddc: i2c@7000c700 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800159 status = "okay";
160 clock-frequency = <100000>;
161 };
162
163 i2c@7000d000 {
164 status = "okay";
165 clock-frequency = <100000>;
166
Stephen Warren58ecb232013-11-25 17:53:16 -0700167 rt5640: rt5640@1c {
Stephen Warren23037bb2013-03-27 16:53:20 -0600168 compatible = "realtek,rt5640";
169 reg = <0x1c>;
170 interrupt-parent = <&gpio>;
171 interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
172 realtek,ldo1-en-gpios =
173 <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
174 };
175
Bryan Wud7df69f2013-01-02 15:53:51 -0800176 pmic: tps65911@2d {
177 compatible = "ti,tps65911";
178 reg = <0x2d>;
179
Stephen Warren6cecf912013-02-13 12:51:51 -0700180 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800181 #interrupt-cells = <2>;
182 interrupt-controller;
183
184 ti,system-power-controller;
185
186 #gpio-cells = <2>;
187 gpio-controller;
188
189 vcc1-supply = <&vdd_5v_in_reg>;
190 vcc2-supply = <&vdd_5v_in_reg>;
191 vcc3-supply = <&vio_reg>;
192 vcc4-supply = <&vdd_5v_in_reg>;
193 vcc5-supply = <&vdd_5v_in_reg>;
194 vcc6-supply = <&vdd2_reg>;
195 vcc7-supply = <&vdd_5v_in_reg>;
196 vccio-supply = <&vdd_5v_in_reg>;
197
198 regulators {
199 #address-cells = <1>;
200 #size-cells = <0>;
201
202 vdd1_reg: vdd1 {
203 regulator-name = "vddio_ddr_1v2";
204 regulator-min-microvolt = <1200000>;
205 regulator-max-microvolt = <1200000>;
206 regulator-always-on;
207 };
208
209 vdd2_reg: vdd2 {
210 regulator-name = "vdd_1v5_gen";
211 regulator-min-microvolt = <1500000>;
212 regulator-max-microvolt = <1500000>;
213 regulator-always-on;
214 };
215
216 vddctrl_reg: vddctrl {
217 regulator-name = "vdd_cpu,vdd_sys";
218 regulator-min-microvolt = <1000000>;
219 regulator-max-microvolt = <1000000>;
220 regulator-always-on;
221 };
222
223 vio_reg: vio {
224 regulator-name = "vdd_1v8_gen";
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <1800000>;
227 regulator-always-on;
228 };
229
230 ldo1_reg: ldo1 {
231 regulator-name = "vdd_pexa,vdd_pexb";
232 regulator-min-microvolt = <1050000>;
233 regulator-max-microvolt = <1050000>;
234 };
235
236 ldo2_reg: ldo2 {
237 regulator-name = "vdd_sata,avdd_plle";
238 regulator-min-microvolt = <1050000>;
239 regulator-max-microvolt = <1050000>;
240 };
241
242 /* LDO3 is not connected to anything */
243
244 ldo4_reg: ldo4 {
245 regulator-name = "vdd_rtc";
246 regulator-min-microvolt = <1200000>;
247 regulator-max-microvolt = <1200000>;
248 regulator-always-on;
249 };
250
251 ldo5_reg: ldo5 {
252 regulator-name = "vddio_sdmmc,avdd_vdac";
253 regulator-min-microvolt = <3300000>;
254 regulator-max-microvolt = <3300000>;
255 regulator-always-on;
256 };
257
258 ldo6_reg: ldo6 {
259 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
260 regulator-min-microvolt = <1200000>;
261 regulator-max-microvolt = <1200000>;
262 };
263
264 ldo7_reg: ldo7 {
265 regulator-name = "vdd_pllm,x,u,a_p_c_s";
266 regulator-min-microvolt = <1200000>;
267 regulator-max-microvolt = <1200000>;
268 regulator-always-on;
269 };
270
271 ldo8_reg: ldo8 {
272 regulator-name = "vdd_ddr_hs";
273 regulator-min-microvolt = <1000000>;
274 regulator-max-microvolt = <1000000>;
275 regulator-always-on;
276 };
277 };
278 };
Stephen Warren57899052013-11-26 14:43:45 -0700279
280 tps62361@60 {
281 compatible = "ti,tps62361";
282 reg = <0x60>;
283
284 regulator-name = "tps62361-vout";
285 regulator-min-microvolt = <500000>;
286 regulator-max-microvolt = <1500000>;
287 regulator-boot-on;
288 regulator-always-on;
289 ti,vsel0-state-high;
290 ti,vsel1-state-high;
291 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800292 };
293
294 spi@7000da00 {
295 status = "okay";
296 spi-max-frequency = <25000000>;
297 spi-flash@1 {
298 compatible = "winbond,w25q32";
299 reg = <1>;
300 spi-max-frequency = <20000000>;
301 };
302 };
303
Stephen Warren58ecb232013-11-25 17:53:16 -0700304 pmc@7000e400 {
Bryan Wud7df69f2013-01-02 15:53:51 -0800305 status = "okay";
306 nvidia,invert-interrupt;
Joseph Lo47d2d632013-08-12 17:40:07 +0800307 nvidia,suspend-mode = <1>;
Joseph Loa44a0192013-04-03 19:31:52 +0800308 nvidia,cpu-pwr-good-time = <2000>;
309 nvidia,cpu-pwr-off-time = <200>;
310 nvidia,core-pwr-good-time = <3845 3845>;
311 nvidia,core-pwr-off-time = <0>;
312 nvidia,core-power-req-active-high;
313 nvidia,sys-clock-req-active-high;
Bryan Wud7df69f2013-01-02 15:53:51 -0800314 };
315
Stephen Warren57899052013-11-26 14:43:45 -0700316 ahub@70080000 {
317 i2s@70080400 {
318 status = "okay";
319 };
320 };
321
Bryan Wud7df69f2013-01-02 15:53:51 -0800322 sdhci@78000000 {
323 status = "okay";
Stephen Warren3325f1b2013-02-12 17:25:15 -0700324 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
325 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
326 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800327 bus-width = <4>;
328 };
329
330 sdhci@78000600 {
331 status = "okay";
332 bus-width = <8>;
Joseph Lo7a2617a2013-04-03 14:34:39 -0600333 non-removable;
Bryan Wud7df69f2013-01-02 15:53:51 -0800334 };
335
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300336 usb@7d008000 {
337 status = "okay";
338 };
339
340 usb-phy@7d008000 {
341 vbus-supply = <&usb3_vbus_reg>;
342 status = "okay";
343 };
344
Joseph Lo7021d122013-04-03 19:31:27 +0800345 clocks {
346 compatible = "simple-bus";
347 #address-cells = <1>;
348 #size-cells = <0>;
349
Stephen Warren58ecb232013-11-25 17:53:16 -0700350 clk32k_in: clock@0 {
Joseph Lo7021d122013-04-03 19:31:27 +0800351 compatible = "fixed-clock";
352 reg=<0>;
353 #clock-cells = <0>;
354 clock-frequency = <32768>;
355 };
356 };
357
Stephen Warren57899052013-11-26 14:43:45 -0700358 gpio-leds {
359 compatible = "gpio-leds";
360
361 gpled1 {
362 label = "LED1"; /* CR5A1 (blue) */
363 gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
364 };
365 gpled2 {
366 label = "LED2"; /* CR4A2 (green) */
367 gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
368 };
369 };
370
Bryan Wud7df69f2013-01-02 15:53:51 -0800371 regulators {
372 compatible = "simple-bus";
373 #address-cells = <1>;
374 #size-cells = <0>;
375
376 vdd_5v_in_reg: regulator@0 {
377 compatible = "regulator-fixed";
378 reg = <0>;
379 regulator-name = "vdd_5v_in";
380 regulator-min-microvolt = <5000000>;
381 regulator-max-microvolt = <5000000>;
382 regulator-always-on;
383 };
384
385 chargepump_5v_reg: regulator@1 {
386 compatible = "regulator-fixed";
387 reg = <1>;
388 regulator-name = "chargepump_5v";
389 regulator-min-microvolt = <5000000>;
390 regulator-max-microvolt = <5000000>;
391 regulator-boot-on;
392 regulator-always-on;
393 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700394 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800395 };
396
397 ddr_reg: regulator@2 {
398 compatible = "regulator-fixed";
399 reg = <2>;
400 regulator-name = "vdd_ddr";
401 regulator-min-microvolt = <1500000>;
402 regulator-max-microvolt = <1500000>;
403 regulator-always-on;
404 regulator-boot-on;
405 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700406 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800407 vin-supply = <&vdd_5v_in_reg>;
408 };
409
410 vdd_5v_sata_reg: regulator@3 {
411 compatible = "regulator-fixed";
412 reg = <3>;
413 regulator-name = "vdd_5v_sata";
414 regulator-min-microvolt = <5000000>;
415 regulator-max-microvolt = <5000000>;
416 regulator-always-on;
417 regulator-boot-on;
418 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700419 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800420 vin-supply = <&vdd_5v_in_reg>;
421 };
422
423 usb1_vbus_reg: regulator@4 {
424 compatible = "regulator-fixed";
425 reg = <4>;
426 regulator-name = "usb1_vbus";
427 regulator-min-microvolt = <5000000>;
428 regulator-max-microvolt = <5000000>;
429 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300430 gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800431 gpio-open-drain;
432 vin-supply = <&vdd_5v_in_reg>;
433 };
434
435 usb3_vbus_reg: regulator@5 {
436 compatible = "regulator-fixed";
437 reg = <5>;
438 regulator-name = "usb3_vbus";
439 regulator-min-microvolt = <5000000>;
440 regulator-max-microvolt = <5000000>;
441 enable-active-high;
Tuomas Tynkkynencc34c9f2013-08-01 18:00:17 +0300442 gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800443 gpio-open-drain;
444 vin-supply = <&vdd_5v_in_reg>;
445 };
446
447 sys_3v3_reg: regulator@6 {
448 compatible = "regulator-fixed";
449 reg = <6>;
450 regulator-name = "sys_3v3,vdd_3v3_alw";
451 regulator-min-microvolt = <3300000>;
452 regulator-max-microvolt = <3300000>;
453 regulator-always-on;
454 regulator-boot-on;
455 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700456 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800457 vin-supply = <&vdd_5v_in_reg>;
458 };
459
460 sys_3v3_pexs_reg: regulator@7 {
461 compatible = "regulator-fixed";
462 reg = <7>;
463 regulator-name = "sys_3v3_pexs";
464 regulator-min-microvolt = <3300000>;
465 regulator-max-microvolt = <3300000>;
466 regulator-always-on;
467 regulator-boot-on;
468 enable-active-high;
Stephen Warren3325f1b2013-02-12 17:25:15 -0700469 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
Bryan Wud7df69f2013-01-02 15:53:51 -0800470 vin-supply = <&sys_3v3_reg>;
471 };
472 };
Eric Browerb4dd3e02013-05-10 14:40:29 +0000473
Stephen Warren23037bb2013-03-27 16:53:20 -0600474 sound {
475 compatible = "nvidia,tegra-audio-rt5640-beaver",
476 "nvidia,tegra-audio-rt5640";
477 nvidia,model = "NVIDIA Tegra Beaver";
478
479 nvidia,audio-routing =
480 "Headphones", "HPOR",
Stephen Warrenac472282013-08-14 13:54:24 -0600481 "Headphones", "HPOL",
482 "Mic Jack", "MICBIAS1",
483 "IN2P", "Mic Jack";
Stephen Warren23037bb2013-03-27 16:53:20 -0600484
485 nvidia,i2s-controller = <&tegra_i2s1>;
486 nvidia,audio-codec = <&rt5640>;
487
488 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
489
490 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
491 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
492 <&tegra_car TEGRA30_CLK_EXTERN1>;
493 clock-names = "pll_a", "pll_a_out0", "mclk";
494 };
Bryan Wud7df69f2013-01-02 15:53:51 -0800495};