blob: f700ec18a91f4e92aa7d2e229faf08106b0152f6 [file] [log] [blame]
Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
Fuyun Liang434776a2018-01-12 16:23:10 +0800161void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100163{
Fuyun Liang434776a2018-01-12 16:23:10 +0800164 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
165
Salil76ad4f02017-08-02 16:59:45 +0100166 /* this defines the configuration for RL (Interrupt Rate Limiter).
167 * Rl defines rate of interrupts i.e. number of interrupts-per-second
168 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800170
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800171 if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
172 !tqp_vector->rx_group.coal.gl_adapt_enable)
Fuyun Liang434776a2018-01-12 16:23:10 +0800173 /* According to the hardware, the range of rl_reg is
174 * 0-59 and the unit is 4.
175 */
176 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
177
178 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
179}
180
181void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
182 u32 gl_value)
183{
184 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
185
186 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
187}
188
189void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
190 u32 gl_value)
191{
192 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
193
194 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100195}
196
Fuyun Liang5fd47892018-01-12 16:23:11 +0800197static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
198 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100199{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800200 struct hnae3_handle *h = priv->ae_handle;
201
Salil76ad4f02017-08-02 16:59:45 +0100202 /* initialize the configuration for interrupt coalescing.
203 * 1. GL (Interrupt Gap Limiter)
204 * 2. RL (Interrupt Rate Limiter)
205 */
206
Fuyun Liang5fd47892018-01-12 16:23:11 +0800207 /* Default: enable interrupt coalescing self-adaptive and GL */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800208 tqp_vector->tx_group.coal.gl_adapt_enable = 1;
209 tqp_vector->rx_group.coal.gl_adapt_enable = 1;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800210
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800211 tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
212 tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800213
Yunsheng Lindd38c722018-03-09 10:37:02 +0800214 /* Default: disable RL */
215 h->kinfo.int_rl_setting = 0;
216
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800217 tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
218 tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
Yunsheng Lindd38c722018-03-09 10:37:02 +0800219}
220
221static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
222 struct hns3_nic_priv *priv)
223{
224 struct hnae3_handle *h = priv->ae_handle;
225
Fuyun Liang5fd47892018-01-12 16:23:11 +0800226 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800227 tqp_vector->tx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800228 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +0800229 tqp_vector->rx_group.coal.int_gl);
Fuyun Liang5fd47892018-01-12 16:23:11 +0800230 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
Salil76ad4f02017-08-02 16:59:45 +0100231}
232
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800233static int hns3_nic_set_real_num_queue(struct net_device *netdev)
234{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800235 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800236 struct hnae3_knic_private_info *kinfo = &h->kinfo;
237 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
238 int ret;
239
240 ret = netif_set_real_num_tx_queues(netdev, queue_size);
241 if (ret) {
242 netdev_err(netdev,
243 "netif_set_real_num_tx_queues fail, ret=%d!\n",
244 ret);
245 return ret;
246 }
247
248 ret = netif_set_real_num_rx_queues(netdev, queue_size);
249 if (ret) {
250 netdev_err(netdev,
251 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
252 return ret;
253 }
254
255 return 0;
256}
257
Peng Li678335a12018-03-08 19:41:54 +0800258static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
259{
260 u16 free_tqps, max_rss_size, max_tqps;
261
262 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
263 max_tqps = h->kinfo.num_tc * max_rss_size;
264
265 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
266}
267
Salil76ad4f02017-08-02 16:59:45 +0100268static int hns3_nic_net_up(struct net_device *netdev)
269{
270 struct hns3_nic_priv *priv = netdev_priv(netdev);
271 struct hnae3_handle *h = priv->ae_handle;
272 int i, j;
273 int ret;
274
275 /* get irq resource for all vectors */
276 ret = hns3_nic_init_irq(priv);
277 if (ret) {
278 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
279 return ret;
280 }
281
282 /* enable the vectors */
283 for (i = 0; i < priv->vector_num; i++)
284 hns3_vector_enable(&priv->tqp_vector[i]);
285
286 /* start the ae_dev */
287 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
288 if (ret)
289 goto out_start_err;
290
Jian Shenb875cc32018-01-05 18:18:11 +0800291 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
292
Salil76ad4f02017-08-02 16:59:45 +0100293 return 0;
294
295out_start_err:
296 for (j = i - 1; j >= 0; j--)
297 hns3_vector_disable(&priv->tqp_vector[j]);
298
299 hns3_nic_uninit_irq(priv);
300
301 return ret;
302}
303
304static int hns3_nic_net_open(struct net_device *netdev)
305{
Lipengf8fa222c2017-11-02 20:45:20 +0800306 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100307 int ret;
308
309 netif_carrier_off(netdev);
310
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800311 ret = hns3_nic_set_real_num_queue(netdev);
312 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100313 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100314
315 ret = hns3_nic_net_up(netdev);
316 if (ret) {
317 netdev_err(netdev,
318 "hns net up fail, ret=%d!\n", ret);
319 return ret;
320 }
321
Lipengf8fa222c2017-11-02 20:45:20 +0800322 priv->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100323 return 0;
324}
325
326static void hns3_nic_net_down(struct net_device *netdev)
327{
328 struct hns3_nic_priv *priv = netdev_priv(netdev);
329 const struct hnae3_ae_ops *ops;
330 int i;
331
Jian Shenb875cc32018-01-05 18:18:11 +0800332 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
333 return;
334
Salil76ad4f02017-08-02 16:59:45 +0100335 /* stop ae_dev */
336 ops = priv->ae_handle->ae_algo->ops;
337 if (ops->stop)
338 ops->stop(priv->ae_handle);
339
340 /* disable vectors */
341 for (i = 0; i < priv->vector_num; i++)
342 hns3_vector_disable(&priv->tqp_vector[i]);
343
344 /* free irq resources */
345 hns3_nic_uninit_irq(priv);
346}
347
348static int hns3_nic_net_stop(struct net_device *netdev)
349{
350 netif_tx_stop_all_queues(netdev);
351 netif_carrier_off(netdev);
352
353 hns3_nic_net_down(netdev);
354
355 return 0;
356}
357
Salil76ad4f02017-08-02 16:59:45 +0100358static int hns3_nic_uc_sync(struct net_device *netdev,
359 const unsigned char *addr)
360{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800361 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100362
363 if (h->ae_algo->ops->add_uc_addr)
364 return h->ae_algo->ops->add_uc_addr(h, addr);
365
366 return 0;
367}
368
369static int hns3_nic_uc_unsync(struct net_device *netdev,
370 const unsigned char *addr)
371{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800372 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100373
374 if (h->ae_algo->ops->rm_uc_addr)
375 return h->ae_algo->ops->rm_uc_addr(h, addr);
376
377 return 0;
378}
379
380static int hns3_nic_mc_sync(struct net_device *netdev,
381 const unsigned char *addr)
382{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800383 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100384
Dan Carpenter720a8472017-08-10 12:56:14 +0300385 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100386 return h->ae_algo->ops->add_mc_addr(h, addr);
387
388 return 0;
389}
390
391static int hns3_nic_mc_unsync(struct net_device *netdev,
392 const unsigned char *addr)
393{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800394 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100395
Dan Carpenter720a8472017-08-10 12:56:14 +0300396 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100397 return h->ae_algo->ops->rm_mc_addr(h, addr);
398
399 return 0;
400}
401
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800402static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100403{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800404 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100405
406 if (h->ae_algo->ops->set_promisc_mode) {
407 if (netdev->flags & IFF_PROMISC)
408 h->ae_algo->ops->set_promisc_mode(h, 1);
409 else
410 h->ae_algo->ops->set_promisc_mode(h, 0);
411 }
412 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
413 netdev_err(netdev, "sync uc address fail\n");
414 if (netdev->flags & IFF_MULTICAST)
415 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
416 netdev_err(netdev, "sync mc address fail\n");
417}
418
419static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
420 u16 *mss, u32 *type_cs_vlan_tso)
421{
422 u32 l4_offset, hdr_len;
423 union l3_hdr_info l3;
424 union l4_hdr_info l4;
425 u32 l4_paylen;
426 int ret;
427
428 if (!skb_is_gso(skb))
429 return 0;
430
431 ret = skb_cow_head(skb, 0);
432 if (ret)
433 return ret;
434
435 l3.hdr = skb_network_header(skb);
436 l4.hdr = skb_transport_header(skb);
437
438 /* Software should clear the IPv4's checksum field when tso is
439 * needed.
440 */
441 if (l3.v4->version == 4)
442 l3.v4->check = 0;
443
444 /* tunnel packet.*/
445 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
446 SKB_GSO_GRE_CSUM |
447 SKB_GSO_UDP_TUNNEL |
448 SKB_GSO_UDP_TUNNEL_CSUM)) {
449 if ((!(skb_shinfo(skb)->gso_type &
450 SKB_GSO_PARTIAL)) &&
451 (skb_shinfo(skb)->gso_type &
452 SKB_GSO_UDP_TUNNEL_CSUM)) {
453 /* Software should clear the udp's checksum
454 * field when tso is needed.
455 */
456 l4.udp->check = 0;
457 }
458 /* reset l3&l4 pointers from outer to inner headers */
459 l3.hdr = skb_inner_network_header(skb);
460 l4.hdr = skb_inner_transport_header(skb);
461
462 /* Software should clear the IPv4's checksum field when
463 * tso is needed.
464 */
465 if (l3.v4->version == 4)
466 l3.v4->check = 0;
467 }
468
469 /* normal or tunnel packet*/
470 l4_offset = l4.hdr - skb->data;
471 hdr_len = (l4.tcp->doff * 4) + l4_offset;
472
473 /* remove payload length from inner pseudo checksum when tso*/
474 l4_paylen = skb->len - l4_offset;
475 csum_replace_by_diff(&l4.tcp->check,
476 (__force __wsum)htonl(l4_paylen));
477
478 /* find the txbd field values */
479 *paylen = skb->len - hdr_len;
480 hnae_set_bit(*type_cs_vlan_tso,
481 HNS3_TXD_TSO_B, 1);
482
483 /* get MSS for TSO */
484 *mss = skb_shinfo(skb)->gso_size;
485
486 return 0;
487}
488
Salil1898d4e2017-08-18 12:31:39 +0100489static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
490 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100491{
492 union {
493 struct iphdr *v4;
494 struct ipv6hdr *v6;
495 unsigned char *hdr;
496 } l3;
497 unsigned char *l4_hdr;
498 unsigned char *exthdr;
499 u8 l4_proto_tmp;
500 __be16 frag_off;
501
502 /* find outer header point */
503 l3.hdr = skb_network_header(skb);
504 l4_hdr = skb_inner_transport_header(skb);
505
506 if (skb->protocol == htons(ETH_P_IPV6)) {
507 exthdr = l3.hdr + sizeof(*l3.v6);
508 l4_proto_tmp = l3.v6->nexthdr;
509 if (l4_hdr != exthdr)
510 ipv6_skip_exthdr(skb, exthdr - skb->data,
511 &l4_proto_tmp, &frag_off);
512 } else if (skb->protocol == htons(ETH_P_IP)) {
513 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100514 } else {
515 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100516 }
517
518 *ol4_proto = l4_proto_tmp;
519
520 /* tunnel packet */
521 if (!skb->encapsulation) {
522 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100523 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100524 }
525
526 /* find inner header point */
527 l3.hdr = skb_inner_network_header(skb);
528 l4_hdr = skb_inner_transport_header(skb);
529
530 if (l3.v6->version == 6) {
531 exthdr = l3.hdr + sizeof(*l3.v6);
532 l4_proto_tmp = l3.v6->nexthdr;
533 if (l4_hdr != exthdr)
534 ipv6_skip_exthdr(skb, exthdr - skb->data,
535 &l4_proto_tmp, &frag_off);
536 } else if (l3.v4->version == 4) {
537 l4_proto_tmp = l3.v4->protocol;
538 }
539
540 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100541
542 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100543}
544
545static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
546 u8 il4_proto, u32 *type_cs_vlan_tso,
547 u32 *ol_type_vlan_len_msec)
548{
549 union {
550 struct iphdr *v4;
551 struct ipv6hdr *v6;
552 unsigned char *hdr;
553 } l3;
554 union {
555 struct tcphdr *tcp;
556 struct udphdr *udp;
557 struct gre_base_hdr *gre;
558 unsigned char *hdr;
559 } l4;
560 unsigned char *l2_hdr;
561 u8 l4_proto = ol4_proto;
562 u32 ol2_len;
563 u32 ol3_len;
564 u32 ol4_len;
565 u32 l2_len;
566 u32 l3_len;
567
568 l3.hdr = skb_network_header(skb);
569 l4.hdr = skb_transport_header(skb);
570
571 /* compute L2 header size for normal packet, defined in 2 Bytes */
572 l2_len = l3.hdr - skb->data;
573 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
574 HNS3_TXD_L2LEN_S, l2_len >> 1);
575
576 /* tunnel packet*/
577 if (skb->encapsulation) {
578 /* compute OL2 header size, defined in 2 Bytes */
579 ol2_len = l2_len;
580 hnae_set_field(*ol_type_vlan_len_msec,
581 HNS3_TXD_L2LEN_M,
582 HNS3_TXD_L2LEN_S, ol2_len >> 1);
583
584 /* compute OL3 header size, defined in 4 Bytes */
585 ol3_len = l4.hdr - l3.hdr;
586 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
587 HNS3_TXD_L3LEN_S, ol3_len >> 2);
588
589 /* MAC in UDP, MAC in GRE (0x6558)*/
590 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
591 /* switch MAC header ptr from outer to inner header.*/
592 l2_hdr = skb_inner_mac_header(skb);
593
594 /* compute OL4 header size, defined in 4 Bytes. */
595 ol4_len = l2_hdr - l4.hdr;
596 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
597 HNS3_TXD_L4LEN_S, ol4_len >> 2);
598
599 /* switch IP header ptr from outer to inner header */
600 l3.hdr = skb_inner_network_header(skb);
601
602 /* compute inner l2 header size, defined in 2 Bytes. */
603 l2_len = l3.hdr - l2_hdr;
604 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
605 HNS3_TXD_L2LEN_S, l2_len >> 1);
606 } else {
607 /* skb packet types not supported by hardware,
608 * txbd len fild doesn't be filled.
609 */
610 return;
611 }
612
613 /* switch L4 header pointer from outer to inner */
614 l4.hdr = skb_inner_transport_header(skb);
615
616 l4_proto = il4_proto;
617 }
618
619 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
620 l3_len = l4.hdr - l3.hdr;
621 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
622 HNS3_TXD_L3LEN_S, l3_len >> 2);
623
624 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
625 switch (l4_proto) {
626 case IPPROTO_TCP:
627 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
628 HNS3_TXD_L4LEN_S, l4.tcp->doff);
629 break;
630 case IPPROTO_SCTP:
631 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
632 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
633 break;
634 case IPPROTO_UDP:
635 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
636 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
637 break;
638 default:
639 /* skb packet types not supported by hardware,
640 * txbd len fild doesn't be filled.
641 */
642 return;
643 }
644}
645
646static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
647 u8 il4_proto, u32 *type_cs_vlan_tso,
648 u32 *ol_type_vlan_len_msec)
649{
650 union {
651 struct iphdr *v4;
652 struct ipv6hdr *v6;
653 unsigned char *hdr;
654 } l3;
655 u32 l4_proto = ol4_proto;
656
657 l3.hdr = skb_network_header(skb);
658
659 /* define OL3 type and tunnel type(OL4).*/
660 if (skb->encapsulation) {
661 /* define outer network header type.*/
662 if (skb->protocol == htons(ETH_P_IP)) {
663 if (skb_is_gso(skb))
664 hnae_set_field(*ol_type_vlan_len_msec,
665 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
666 HNS3_OL3T_IPV4_CSUM);
667 else
668 hnae_set_field(*ol_type_vlan_len_msec,
669 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
670 HNS3_OL3T_IPV4_NO_CSUM);
671
672 } else if (skb->protocol == htons(ETH_P_IPV6)) {
673 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
674 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
675 }
676
677 /* define tunnel type(OL4).*/
678 switch (l4_proto) {
679 case IPPROTO_UDP:
680 hnae_set_field(*ol_type_vlan_len_msec,
681 HNS3_TXD_TUNTYPE_M,
682 HNS3_TXD_TUNTYPE_S,
683 HNS3_TUN_MAC_IN_UDP);
684 break;
685 case IPPROTO_GRE:
686 hnae_set_field(*ol_type_vlan_len_msec,
687 HNS3_TXD_TUNTYPE_M,
688 HNS3_TXD_TUNTYPE_S,
689 HNS3_TUN_NVGRE);
690 break;
691 default:
692 /* drop the skb tunnel packet if hardware don't support,
693 * because hardware can't calculate csum when TSO.
694 */
695 if (skb_is_gso(skb))
696 return -EDOM;
697
698 /* the stack computes the IP header already,
699 * driver calculate l4 checksum when not TSO.
700 */
701 skb_checksum_help(skb);
702 return 0;
703 }
704
705 l3.hdr = skb_inner_network_header(skb);
706 l4_proto = il4_proto;
707 }
708
709 if (l3.v4->version == 4) {
710 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
711 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
712
713 /* the stack computes the IP header already, the only time we
714 * need the hardware to recompute it is in the case of TSO.
715 */
716 if (skb_is_gso(skb))
717 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
718
719 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
720 } else if (l3.v6->version == 6) {
721 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
722 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
723 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
724 }
725
726 switch (l4_proto) {
727 case IPPROTO_TCP:
728 hnae_set_field(*type_cs_vlan_tso,
729 HNS3_TXD_L4T_M,
730 HNS3_TXD_L4T_S,
731 HNS3_L4T_TCP);
732 break;
733 case IPPROTO_UDP:
734 hnae_set_field(*type_cs_vlan_tso,
735 HNS3_TXD_L4T_M,
736 HNS3_TXD_L4T_S,
737 HNS3_L4T_UDP);
738 break;
739 case IPPROTO_SCTP:
740 hnae_set_field(*type_cs_vlan_tso,
741 HNS3_TXD_L4T_M,
742 HNS3_TXD_L4T_S,
743 HNS3_L4T_SCTP);
744 break;
745 default:
746 /* drop the skb tunnel packet if hardware don't support,
747 * because hardware can't calculate csum when TSO.
748 */
749 if (skb_is_gso(skb))
750 return -EDOM;
751
752 /* the stack computes the IP header already,
753 * driver calculate l4 checksum when not TSO.
754 */
755 skb_checksum_help(skb);
756 return 0;
757 }
758
759 return 0;
760}
761
762static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
763{
764 /* Config bd buffer end */
765 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
766 HNS3_TXD_BDTYPE_M, 0);
767 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
768 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800769 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100770}
771
Peng Li9699cff2017-12-22 12:21:48 +0800772static int hns3_fill_desc_vtags(struct sk_buff *skb,
773 struct hns3_enet_ring *tx_ring,
774 u32 *inner_vlan_flag,
775 u32 *out_vlan_flag,
776 u16 *inner_vtag,
777 u16 *out_vtag)
778{
779#define HNS3_TX_VLAN_PRIO_SHIFT 13
780
781 if (skb->protocol == htons(ETH_P_8021Q) &&
782 !(tx_ring->tqp->handle->kinfo.netdev->features &
783 NETIF_F_HW_VLAN_CTAG_TX)) {
784 /* When HW VLAN acceleration is turned off, and the stack
785 * sets the protocol to 802.1q, the driver just need to
786 * set the protocol to the encapsulated ethertype.
787 */
788 skb->protocol = vlan_get_protocol(skb);
789 return 0;
790 }
791
792 if (skb_vlan_tag_present(skb)) {
793 u16 vlan_tag;
794
795 vlan_tag = skb_vlan_tag_get(skb);
796 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
797
798 /* Based on hw strategy, use out_vtag in two layer tag case,
799 * and use inner_vtag in one tag case.
800 */
801 if (skb->protocol == htons(ETH_P_8021Q)) {
802 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
803 *out_vtag = vlan_tag;
804 } else {
805 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
806 *inner_vtag = vlan_tag;
807 }
808 } else if (skb->protocol == htons(ETH_P_8021Q)) {
809 struct vlan_ethhdr *vhdr;
810 int rc;
811
812 rc = skb_cow_head(skb, 0);
813 if (rc < 0)
814 return rc;
815 vhdr = (struct vlan_ethhdr *)skb->data;
816 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
817 << HNS3_TX_VLAN_PRIO_SHIFT);
818 }
819
820 skb->protocol = vlan_get_protocol(skb);
821 return 0;
822}
823
Salil76ad4f02017-08-02 16:59:45 +0100824static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
825 int size, dma_addr_t dma, int frag_end,
826 enum hns_desc_type type)
827{
828 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
829 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
830 u32 ol_type_vlan_len_msec = 0;
831 u16 bdtp_fe_sc_vld_ra_ri = 0;
832 u32 type_cs_vlan_tso = 0;
833 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800834 u16 inner_vtag = 0;
835 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100836 u32 paylen = 0;
837 u16 mss = 0;
838 __be16 protocol;
839 u8 ol4_proto;
840 u8 il4_proto;
841 int ret;
842
843 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
844 desc_cb->priv = priv;
845 desc_cb->length = size;
846 desc_cb->dma = dma;
847 desc_cb->type = type;
848
849 /* now, fill the descriptor */
850 desc->addr = cpu_to_le64(dma);
851 desc->tx.send_size = cpu_to_le16((u16)size);
852 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
853 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
854
855 if (type == DESC_TYPE_SKB) {
856 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800857 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100858
Peng Li9699cff2017-12-22 12:21:48 +0800859 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
860 &ol_type_vlan_len_msec,
861 &inner_vtag, &out_vtag);
862 if (unlikely(ret))
863 return ret;
864
Salil76ad4f02017-08-02 16:59:45 +0100865 if (skb->ip_summed == CHECKSUM_PARTIAL) {
866 skb_reset_mac_len(skb);
867 protocol = skb->protocol;
868
Salil1898d4e2017-08-18 12:31:39 +0100869 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
870 if (ret)
871 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100872 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
873 &type_cs_vlan_tso,
874 &ol_type_vlan_len_msec);
875 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
876 &type_cs_vlan_tso,
877 &ol_type_vlan_len_msec);
878 if (ret)
879 return ret;
880
881 ret = hns3_set_tso(skb, &paylen, &mss,
882 &type_cs_vlan_tso);
883 if (ret)
884 return ret;
885 }
886
887 /* Set txbd */
888 desc->tx.ol_type_vlan_len_msec =
889 cpu_to_le32(ol_type_vlan_len_msec);
890 desc->tx.type_cs_vlan_tso_len =
891 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800892 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100893 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800894 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
895 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100896 }
897
898 /* move ring pointer to next.*/
899 ring_ptr_move_fw(ring, next_to_use);
900
901 return 0;
902}
903
904static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
905 int size, dma_addr_t dma, int frag_end,
906 enum hns_desc_type type)
907{
908 unsigned int frag_buf_num;
909 unsigned int k;
910 int sizeoflast;
911 int ret;
912
913 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
914 sizeoflast = size % HNS3_MAX_BD_SIZE;
915 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
916
917 /* When the frag size is bigger than hardware, split this frag */
918 for (k = 0; k < frag_buf_num; k++) {
919 ret = hns3_fill_desc(ring, priv,
920 (k == frag_buf_num - 1) ?
921 sizeoflast : HNS3_MAX_BD_SIZE,
922 dma + HNS3_MAX_BD_SIZE * k,
923 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
924 (type == DESC_TYPE_SKB && !k) ?
925 DESC_TYPE_SKB : DESC_TYPE_PAGE);
926 if (ret)
927 return ret;
928 }
929
930 return 0;
931}
932
933static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
934 struct hns3_enet_ring *ring)
935{
936 struct sk_buff *skb = *out_skb;
937 struct skb_frag_struct *frag;
938 int bdnum_for_frag;
939 int frag_num;
940 int buf_num;
941 int size;
942 int i;
943
944 size = skb_headlen(skb);
945 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
946
947 frag_num = skb_shinfo(skb)->nr_frags;
948 for (i = 0; i < frag_num; i++) {
949 frag = &skb_shinfo(skb)->frags[i];
950 size = skb_frag_size(frag);
951 bdnum_for_frag =
952 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
953 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
954 return -ENOMEM;
955
956 buf_num += bdnum_for_frag;
957 }
958
959 if (buf_num > ring_space(ring))
960 return -EBUSY;
961
962 *bnum = buf_num;
963 return 0;
964}
965
966static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
967 struct hns3_enet_ring *ring)
968{
969 struct sk_buff *skb = *out_skb;
970 int buf_num;
971
972 /* No. of segments (plus a header) */
973 buf_num = skb_shinfo(skb)->nr_frags + 1;
974
975 if (buf_num > ring_space(ring))
976 return -EBUSY;
977
978 *bnum = buf_num;
979
980 return 0;
981}
982
983static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
984{
985 struct device *dev = ring_to_dev(ring);
986 unsigned int i;
987
988 for (i = 0; i < ring->desc_num; i++) {
989 /* check if this is where we started */
990 if (ring->next_to_use == next_to_use_orig)
991 break;
992
993 /* unmap the descriptor dma address */
994 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
995 dma_unmap_single(dev,
996 ring->desc_cb[ring->next_to_use].dma,
997 ring->desc_cb[ring->next_to_use].length,
998 DMA_TO_DEVICE);
999 else
1000 dma_unmap_page(dev,
1001 ring->desc_cb[ring->next_to_use].dma,
1002 ring->desc_cb[ring->next_to_use].length,
1003 DMA_TO_DEVICE);
1004
1005 /* rollback one */
1006 ring_ptr_move_bw(ring, next_to_use);
1007 }
1008}
1009
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08001010netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +01001011{
1012 struct hns3_nic_priv *priv = netdev_priv(netdev);
1013 struct hns3_nic_ring_data *ring_data =
1014 &tx_ring_data(priv, skb->queue_mapping);
1015 struct hns3_enet_ring *ring = ring_data->ring;
1016 struct device *dev = priv->dev;
1017 struct netdev_queue *dev_queue;
1018 struct skb_frag_struct *frag;
1019 int next_to_use_head;
1020 int next_to_use_frag;
1021 dma_addr_t dma;
1022 int buf_num;
1023 int seg_num;
1024 int size;
1025 int ret;
1026 int i;
1027
1028 /* Prefetch the data used later */
1029 prefetch(skb->data);
1030
1031 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1032 case -EBUSY:
1033 u64_stats_update_begin(&ring->syncp);
1034 ring->stats.tx_busy++;
1035 u64_stats_update_end(&ring->syncp);
1036
1037 goto out_net_tx_busy;
1038 case -ENOMEM:
1039 u64_stats_update_begin(&ring->syncp);
1040 ring->stats.sw_err_cnt++;
1041 u64_stats_update_end(&ring->syncp);
1042 netdev_err(netdev, "no memory to xmit!\n");
1043
1044 goto out_err_tx_ok;
1045 default:
1046 break;
1047 }
1048
1049 /* No. of segments (plus a header) */
1050 seg_num = skb_shinfo(skb)->nr_frags + 1;
1051 /* Fill the first part */
1052 size = skb_headlen(skb);
1053
1054 next_to_use_head = ring->next_to_use;
1055
1056 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1057 if (dma_mapping_error(dev, dma)) {
1058 netdev_err(netdev, "TX head DMA map failed\n");
1059 ring->stats.sw_err_cnt++;
1060 goto out_err_tx_ok;
1061 }
1062
1063 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1064 DESC_TYPE_SKB);
1065 if (ret)
1066 goto head_dma_map_err;
1067
1068 next_to_use_frag = ring->next_to_use;
1069 /* Fill the fragments */
1070 for (i = 1; i < seg_num; i++) {
1071 frag = &skb_shinfo(skb)->frags[i - 1];
1072 size = skb_frag_size(frag);
1073 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1074 if (dma_mapping_error(dev, dma)) {
1075 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1076 ring->stats.sw_err_cnt++;
1077 goto frag_dma_map_err;
1078 }
1079 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1080 seg_num - 1 == i ? 1 : 0,
1081 DESC_TYPE_PAGE);
1082
1083 if (ret)
1084 goto frag_dma_map_err;
1085 }
1086
1087 /* Complete translate all packets */
1088 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1089 netdev_tx_sent_queue(dev_queue, skb->len);
1090
1091 wmb(); /* Commit all data before submit */
1092
1093 hnae_queue_xmit(ring->tqp, buf_num);
1094
1095 return NETDEV_TX_OK;
1096
1097frag_dma_map_err:
1098 hns_nic_dma_unmap(ring, next_to_use_frag);
1099
1100head_dma_map_err:
1101 hns_nic_dma_unmap(ring, next_to_use_head);
1102
1103out_err_tx_ok:
1104 dev_kfree_skb_any(skb);
1105 return NETDEV_TX_OK;
1106
1107out_net_tx_busy:
1108 netif_stop_subqueue(netdev, ring_data->queue_index);
1109 smp_mb(); /* Commit all data before submit */
1110
1111 return NETDEV_TX_BUSY;
1112}
1113
1114static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1115{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001116 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001117 struct sockaddr *mac_addr = p;
1118 int ret;
1119
1120 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1121 return -EADDRNOTAVAIL;
1122
Fuyun Liang590980552018-03-10 11:29:22 +08001123 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
Salil76ad4f02017-08-02 16:59:45 +01001124 if (ret) {
1125 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1126 return ret;
1127 }
1128
1129 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1130
1131 return 0;
1132}
1133
1134static int hns3_nic_set_features(struct net_device *netdev,
1135 netdev_features_t features)
1136{
Jian Shen181d4542018-01-12 16:23:16 +08001137 netdev_features_t changed = netdev->features ^ features;
Salil76ad4f02017-08-02 16:59:45 +01001138 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001139 struct hnae3_handle *h = priv->ae_handle;
Peng Li052ece62017-12-22 12:21:47 +08001140 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001141
Jian Shen181d4542018-01-12 16:23:16 +08001142 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1143 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1144 priv->ops.fill_desc = hns3_fill_desc_tso;
1145 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1146 } else {
1147 priv->ops.fill_desc = hns3_fill_desc;
1148 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1149 }
Salil76ad4f02017-08-02 16:59:45 +01001150 }
1151
Jian Shenbd368412018-01-12 16:23:17 +08001152 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1153 h->ae_algo->ops->enable_vlan_filter) {
Jian Shen181d4542018-01-12 16:23:16 +08001154 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1155 h->ae_algo->ops->enable_vlan_filter(h, true);
1156 else
1157 h->ae_algo->ops->enable_vlan_filter(h, false);
1158 }
Jian Shen391b5e92018-01-05 18:18:05 +08001159
Jian Shenbd368412018-01-12 16:23:17 +08001160 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1161 h->ae_algo->ops->enable_hw_strip_rxvtag) {
Peng Li052ece62017-12-22 12:21:47 +08001162 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1163 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1164 else
1165 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1166
1167 if (ret)
1168 return ret;
1169 }
1170
Salil76ad4f02017-08-02 16:59:45 +01001171 netdev->features = features;
1172 return 0;
1173}
1174
Peng Li6c88d9d2018-01-09 14:50:59 +08001175static void hns3_nic_get_stats64(struct net_device *netdev,
1176 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001177{
1178 struct hns3_nic_priv *priv = netdev_priv(netdev);
1179 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001180 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001181 struct hns3_enet_ring *ring;
1182 unsigned int start;
1183 unsigned int idx;
1184 u64 tx_bytes = 0;
1185 u64 rx_bytes = 0;
1186 u64 tx_pkts = 0;
1187 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001188 u64 tx_drop = 0;
1189 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001190
Jian Shenb875cc32018-01-05 18:18:11 +08001191 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1192 return;
1193
Jian Shenc5f65482018-01-05 18:18:10 +08001194 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1195
Salil76ad4f02017-08-02 16:59:45 +01001196 for (idx = 0; idx < queue_num; idx++) {
1197 /* fetch the tx stats */
1198 ring = priv->ring_data[idx].ring;
1199 do {
Salild36d36c2017-08-18 12:31:37 +01001200 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001201 tx_bytes += ring->stats.tx_bytes;
1202 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001203 tx_drop += ring->stats.tx_busy;
1204 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001205 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1206
1207 /* fetch the rx stats */
1208 ring = priv->ring_data[idx + queue_num].ring;
1209 do {
Salild36d36c2017-08-18 12:31:37 +01001210 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001211 rx_bytes += ring->stats.rx_bytes;
1212 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001213 rx_drop += ring->stats.non_vld_descs;
1214 rx_drop += ring->stats.err_pkt_len;
1215 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001216 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1217 }
1218
1219 stats->tx_bytes = tx_bytes;
1220 stats->tx_packets = tx_pkts;
1221 stats->rx_bytes = rx_bytes;
1222 stats->rx_packets = rx_pkts;
1223
1224 stats->rx_errors = netdev->stats.rx_errors;
1225 stats->multicast = netdev->stats.multicast;
1226 stats->rx_length_errors = netdev->stats.rx_length_errors;
1227 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1228 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1229
1230 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001231 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1232 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001233 stats->collisions = netdev->stats.collisions;
1234 stats->rx_over_errors = netdev->stats.rx_over_errors;
1235 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1236 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1237 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1238 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1239 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1240 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1241 stats->tx_window_errors = netdev->stats.tx_window_errors;
1242 stats->rx_compressed = netdev->stats.rx_compressed;
1243 stats->tx_compressed = netdev->stats.tx_compressed;
1244}
1245
1246static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1247 enum hns3_udp_tnl_type type)
1248{
1249 struct hns3_nic_priv *priv = netdev_priv(netdev);
1250 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1251 struct hnae3_handle *h = priv->ae_handle;
1252
1253 if (udp_tnl->used && udp_tnl->dst_port == port) {
1254 udp_tnl->used++;
1255 return;
1256 }
1257
1258 if (udp_tnl->used) {
1259 netdev_warn(netdev,
1260 "UDP tunnel [%d], port [%d] offload\n", type, port);
1261 return;
1262 }
1263
1264 udp_tnl->dst_port = port;
1265 udp_tnl->used = 1;
1266 /* TBD send command to hardware to add port */
1267 if (h->ae_algo->ops->add_tunnel_udp)
1268 h->ae_algo->ops->add_tunnel_udp(h, port);
1269}
1270
1271static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1272 enum hns3_udp_tnl_type type)
1273{
1274 struct hns3_nic_priv *priv = netdev_priv(netdev);
1275 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1276 struct hnae3_handle *h = priv->ae_handle;
1277
1278 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1279 netdev_warn(netdev,
1280 "Invalid UDP tunnel port %d\n", port);
1281 return;
1282 }
1283
1284 udp_tnl->used--;
1285 if (udp_tnl->used)
1286 return;
1287
1288 udp_tnl->dst_port = 0;
1289 /* TBD send command to hardware to del port */
1290 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001291 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001292}
1293
1294/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1295 * @netdev: This physical ports's netdev
1296 * @ti: Tunnel information
1297 */
1298static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1299 struct udp_tunnel_info *ti)
1300{
1301 u16 port_n = ntohs(ti->port);
1302
1303 switch (ti->type) {
1304 case UDP_TUNNEL_TYPE_VXLAN:
1305 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1306 break;
1307 case UDP_TUNNEL_TYPE_GENEVE:
1308 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1309 break;
1310 default:
1311 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1312 break;
1313 }
1314}
1315
1316static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1317 struct udp_tunnel_info *ti)
1318{
1319 u16 port_n = ntohs(ti->port);
1320
1321 switch (ti->type) {
1322 case UDP_TUNNEL_TYPE_VXLAN:
1323 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1324 break;
1325 case UDP_TUNNEL_TYPE_GENEVE:
1326 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1327 break;
1328 default:
1329 break;
1330 }
1331}
1332
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001333static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001334{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001335 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001336 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001337 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001338 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1339 u8 tc = mqprio_qopt->qopt.num_tc;
1340 u16 mode = mqprio_qopt->mode;
1341 u8 hw = mqprio_qopt->qopt.hw;
1342 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001343 unsigned int i;
1344 int ret;
1345
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001346 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1347 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1348 return -EOPNOTSUPP;
1349
Salil76ad4f02017-08-02 16:59:45 +01001350 if (tc > HNAE3_MAX_TC)
1351 return -EINVAL;
1352
Salil76ad4f02017-08-02 16:59:45 +01001353 if (!netdev)
1354 return -EINVAL;
1355
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001356 if_running = netif_running(netdev);
1357 if (if_running) {
1358 hns3_nic_net_stop(netdev);
1359 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001360 }
1361
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001362 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1363 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001364 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001365 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001366
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001367 if (tc <= 1) {
1368 netdev_reset_tc(netdev);
1369 } else {
1370 ret = netdev_set_num_tc(netdev, tc);
1371 if (ret)
1372 goto out;
1373
1374 for (i = 0; i < HNAE3_MAX_TC; i++) {
1375 if (!kinfo->tc_info[i].enable)
1376 continue;
1377
Salil76ad4f02017-08-02 16:59:45 +01001378 netdev_set_tc_queue(netdev,
1379 kinfo->tc_info[i].tc,
1380 kinfo->tc_info[i].tqp_count,
1381 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001382 }
Salil76ad4f02017-08-02 16:59:45 +01001383 }
1384
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001385 ret = hns3_nic_set_real_num_queue(netdev);
1386
1387out:
1388 if (if_running)
1389 hns3_nic_net_open(netdev);
1390
1391 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001392}
1393
Jiri Pirko2572ac52017-08-07 10:15:17 +02001394static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001395 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001396{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001397 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001398 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001399
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001400 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001401}
1402
1403static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1404 __be16 proto, u16 vid)
1405{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001406 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001407 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001408 int ret = -EIO;
1409
1410 if (h->ae_algo->ops->set_vlan_filter)
1411 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1412
Yunsheng Lin681ec392018-03-21 15:49:22 +08001413 if (!ret)
1414 set_bit(vid, priv->active_vlans);
1415
Salil76ad4f02017-08-02 16:59:45 +01001416 return ret;
1417}
1418
1419static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1420 __be16 proto, u16 vid)
1421{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001422 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin681ec392018-03-21 15:49:22 +08001423 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001424 int ret = -EIO;
1425
1426 if (h->ae_algo->ops->set_vlan_filter)
1427 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1428
Yunsheng Lin681ec392018-03-21 15:49:22 +08001429 if (!ret)
1430 clear_bit(vid, priv->active_vlans);
1431
Salil76ad4f02017-08-02 16:59:45 +01001432 return ret;
1433}
1434
Yunsheng Lin681ec392018-03-21 15:49:22 +08001435static void hns3_restore_vlan(struct net_device *netdev)
1436{
1437 struct hns3_nic_priv *priv = netdev_priv(netdev);
1438 u16 vid;
1439 int ret;
1440
1441 for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1442 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1443 if (ret)
1444 netdev_warn(netdev, "Restore vlan: %d filter, ret:%d\n",
1445 vid, ret);
1446 }
1447}
1448
Salil76ad4f02017-08-02 16:59:45 +01001449static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1450 u8 qos, __be16 vlan_proto)
1451{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001452 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001453 int ret = -EIO;
1454
1455 if (h->ae_algo->ops->set_vf_vlan_filter)
1456 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1457 qos, vlan_proto);
1458
1459 return ret;
1460}
1461
Salila8e8b7f2017-08-21 17:05:24 +01001462static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1463{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001464 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001465 bool if_running = netif_running(netdev);
1466 int ret;
1467
1468 if (!h->ae_algo->ops->set_mtu)
1469 return -EOPNOTSUPP;
1470
1471 /* if this was called with netdev up then bring netdevice down */
1472 if (if_running) {
1473 (void)hns3_nic_net_stop(netdev);
1474 msleep(100);
1475 }
1476
1477 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1478 if (ret) {
1479 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1480 ret);
1481 return ret;
1482 }
1483
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001484 netdev->mtu = new_mtu;
1485
Salila8e8b7f2017-08-21 17:05:24 +01001486 /* if the netdev was running earlier, bring it up again */
1487 if (if_running && hns3_nic_net_open(netdev))
1488 ret = -EINVAL;
1489
1490 return ret;
1491}
1492
Lipengf8fa222c2017-11-02 20:45:20 +08001493static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1494{
1495 struct hns3_nic_priv *priv = netdev_priv(ndev);
1496 struct hns3_enet_ring *tx_ring = NULL;
1497 int timeout_queue = 0;
1498 int hw_head, hw_tail;
1499 int i;
1500
1501 /* Find the stopped queue the same way the stack does */
1502 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1503 struct netdev_queue *q;
1504 unsigned long trans_start;
1505
1506 q = netdev_get_tx_queue(ndev, i);
1507 trans_start = q->trans_start;
1508 if (netif_xmit_stopped(q) &&
1509 time_after(jiffies,
1510 (trans_start + ndev->watchdog_timeo))) {
1511 timeout_queue = i;
1512 break;
1513 }
1514 }
1515
1516 if (i == ndev->num_tx_queues) {
1517 netdev_info(ndev,
1518 "no netdev TX timeout queue found, timeout count: %llu\n",
1519 priv->tx_timeout_count);
1520 return false;
1521 }
1522
1523 tx_ring = priv->ring_data[timeout_queue].ring;
1524
1525 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1526 HNS3_RING_TX_RING_HEAD_REG);
1527 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1528 HNS3_RING_TX_RING_TAIL_REG);
1529 netdev_info(ndev,
1530 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1531 priv->tx_timeout_count,
1532 timeout_queue,
1533 tx_ring->next_to_use,
1534 tx_ring->next_to_clean,
1535 hw_head,
1536 hw_tail,
1537 readl(tx_ring->tqp_vector->mask_addr));
1538
1539 return true;
1540}
1541
1542static void hns3_nic_net_timeout(struct net_device *ndev)
1543{
1544 struct hns3_nic_priv *priv = netdev_priv(ndev);
1545 unsigned long last_reset_time = priv->last_reset_time;
1546 struct hnae3_handle *h = priv->ae_handle;
1547
1548 if (!hns3_get_tx_timeo_queue_info(ndev))
1549 return;
1550
1551 priv->tx_timeout_count++;
1552
1553 /* This timeout is far away enough from last timeout,
1554 * if timeout again,set the reset type to PF reset
1555 */
1556 if (time_after(jiffies, (last_reset_time + 20 * HZ)))
1557 priv->reset_level = HNAE3_FUNC_RESET;
1558
1559 /* Don't do any new action before the next timeout */
1560 else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo)))
1561 return;
1562
1563 priv->last_reset_time = jiffies;
1564
1565 if (h->ae_algo->ops->reset_event)
1566 h->ae_algo->ops->reset_event(h, priv->reset_level);
1567
1568 priv->reset_level++;
1569 if (priv->reset_level > HNAE3_GLOBAL_RESET)
1570 priv->reset_level = HNAE3_GLOBAL_RESET;
1571}
1572
Salil76ad4f02017-08-02 16:59:45 +01001573static const struct net_device_ops hns3_nic_netdev_ops = {
1574 .ndo_open = hns3_nic_net_open,
1575 .ndo_stop = hns3_nic_net_stop,
1576 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001577 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001578 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001579 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001580 .ndo_set_features = hns3_nic_set_features,
1581 .ndo_get_stats64 = hns3_nic_get_stats64,
1582 .ndo_setup_tc = hns3_nic_setup_tc,
1583 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1584 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1585 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1586 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1587 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1588 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1589};
1590
1591/* hns3_probe - Device initialization routine
1592 * @pdev: PCI device information struct
1593 * @ent: entry in hns3_pci_tbl
1594 *
1595 * hns3_probe initializes a PF identified by a pci_dev structure.
1596 * The OS initialization, configuring of the PF private structure,
1597 * and a hardware reset occur.
1598 *
1599 * Returns 0 on success, negative on failure
1600 */
1601static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1602{
1603 struct hnae3_ae_dev *ae_dev;
1604 int ret;
1605
1606 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1607 GFP_KERNEL);
1608 if (!ae_dev) {
1609 ret = -ENOMEM;
1610 return ret;
1611 }
1612
1613 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001614 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001615 ae_dev->dev_type = HNAE3_DEV_KNIC;
1616 pci_set_drvdata(pdev, ae_dev);
1617
1618 return hnae3_register_ae_dev(ae_dev);
1619}
1620
1621/* hns3_remove - Device removal routine
1622 * @pdev: PCI device information struct
1623 */
1624static void hns3_remove(struct pci_dev *pdev)
1625{
1626 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1627
1628 hnae3_unregister_ae_dev(ae_dev);
1629
1630 devm_kfree(&pdev->dev, ae_dev);
1631
1632 pci_set_drvdata(pdev, NULL);
1633}
1634
1635static struct pci_driver hns3_driver = {
1636 .name = hns3_driver_name,
1637 .id_table = hns3_pci_tbl,
1638 .probe = hns3_probe,
1639 .remove = hns3_remove,
1640};
1641
1642/* set default feature to hns3 */
1643static void hns3_set_default_feature(struct net_device *netdev)
1644{
Jian Shen391b5e92018-01-05 18:18:05 +08001645 struct hnae3_handle *h = hns3_get_handle(netdev);
1646
Salil76ad4f02017-08-02 16:59:45 +01001647 netdev->priv_flags |= IFF_UNICAST_FLT;
1648
1649 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1650 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1651 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1652 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1653 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1654
1655 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1656
1657 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1658
1659 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1660 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001661 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001662 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1663 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1664 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1665 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1666
1667 netdev->vlan_features |=
1668 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1669 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1670 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1671 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1672 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1673
1674 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Jian Shen30ba2ab2018-01-05 18:18:06 +08001675 NETIF_F_HW_VLAN_CTAG_TX |
Salil76ad4f02017-08-02 16:59:45 +01001676 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1677 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1678 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1679 NETIF_F_GSO_UDP_TUNNEL_CSUM;
Jian Shen391b5e92018-01-05 18:18:05 +08001680
1681 if (!(h->flags & HNAE3_SUPPORT_VF))
Jian Shen30ba2ab2018-01-05 18:18:06 +08001682 netdev->hw_features |=
1683 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Salil76ad4f02017-08-02 16:59:45 +01001684}
1685
1686static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1687 struct hns3_desc_cb *cb)
1688{
1689 unsigned int order = hnae_page_order(ring);
1690 struct page *p;
1691
1692 p = dev_alloc_pages(order);
1693 if (!p)
1694 return -ENOMEM;
1695
1696 cb->priv = p;
1697 cb->page_offset = 0;
1698 cb->reuse_flag = 0;
1699 cb->buf = page_address(p);
1700 cb->length = hnae_page_size(ring);
1701 cb->type = DESC_TYPE_PAGE;
1702
Salil76ad4f02017-08-02 16:59:45 +01001703 return 0;
1704}
1705
1706static void hns3_free_buffer(struct hns3_enet_ring *ring,
1707 struct hns3_desc_cb *cb)
1708{
1709 if (cb->type == DESC_TYPE_SKB)
1710 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1711 else if (!HNAE3_IS_TX_RING(ring))
1712 put_page((struct page *)cb->priv);
1713 memset(cb, 0, sizeof(*cb));
1714}
1715
1716static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1717{
1718 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1719 cb->length, ring_to_dma_dir(ring));
1720
1721 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1722 return -EIO;
1723
1724 return 0;
1725}
1726
1727static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1728 struct hns3_desc_cb *cb)
1729{
1730 if (cb->type == DESC_TYPE_SKB)
1731 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1732 ring_to_dma_dir(ring));
1733 else
1734 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1735 ring_to_dma_dir(ring));
1736}
1737
1738static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1739{
1740 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1741 ring->desc[i].addr = 0;
1742}
1743
1744static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1745{
1746 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1747
1748 if (!ring->desc_cb[i].dma)
1749 return;
1750
1751 hns3_buffer_detach(ring, i);
1752 hns3_free_buffer(ring, cb);
1753}
1754
1755static void hns3_free_buffers(struct hns3_enet_ring *ring)
1756{
1757 int i;
1758
1759 for (i = 0; i < ring->desc_num; i++)
1760 hns3_free_buffer_detach(ring, i);
1761}
1762
1763/* free desc along with its attached buffer */
1764static void hns3_free_desc(struct hns3_enet_ring *ring)
1765{
1766 hns3_free_buffers(ring);
1767
1768 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1769 ring->desc_num * sizeof(ring->desc[0]),
1770 DMA_BIDIRECTIONAL);
1771 ring->desc_dma_addr = 0;
1772 kfree(ring->desc);
1773 ring->desc = NULL;
1774}
1775
1776static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1777{
1778 int size = ring->desc_num * sizeof(ring->desc[0]);
1779
1780 ring->desc = kzalloc(size, GFP_KERNEL);
1781 if (!ring->desc)
1782 return -ENOMEM;
1783
1784 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1785 size, DMA_BIDIRECTIONAL);
1786 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1787 ring->desc_dma_addr = 0;
1788 kfree(ring->desc);
1789 ring->desc = NULL;
1790 return -ENOMEM;
1791 }
1792
1793 return 0;
1794}
1795
1796static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1797 struct hns3_desc_cb *cb)
1798{
1799 int ret;
1800
1801 ret = hns3_alloc_buffer(ring, cb);
1802 if (ret)
1803 goto out;
1804
1805 ret = hns3_map_buffer(ring, cb);
1806 if (ret)
1807 goto out_with_buf;
1808
1809 return 0;
1810
1811out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001812 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001813out:
1814 return ret;
1815}
1816
1817static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1818{
1819 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1820
1821 if (ret)
1822 return ret;
1823
1824 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1825
1826 return 0;
1827}
1828
1829/* Allocate memory for raw pkg, and map with dma */
1830static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1831{
1832 int i, j, ret;
1833
1834 for (i = 0; i < ring->desc_num; i++) {
1835 ret = hns3_alloc_buffer_attach(ring, i);
1836 if (ret)
1837 goto out_buffer_fail;
1838 }
1839
1840 return 0;
1841
1842out_buffer_fail:
1843 for (j = i - 1; j >= 0; j--)
1844 hns3_free_buffer_detach(ring, j);
1845 return ret;
1846}
1847
1848/* detach a in-used buffer and replace with a reserved one */
1849static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1850 struct hns3_desc_cb *res_cb)
1851{
Lipengb9077422017-10-23 19:51:01 +08001852 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001853 ring->desc_cb[i] = *res_cb;
1854 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1855}
1856
1857static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1858{
1859 ring->desc_cb[i].reuse_flag = 0;
1860 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1861 + ring->desc_cb[i].page_offset);
1862}
1863
1864static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1865 int *pkts)
1866{
1867 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1868
1869 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1870 (*bytes) += desc_cb->length;
1871 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1872 hns3_free_buffer_detach(ring, ring->next_to_clean);
1873
1874 ring_ptr_move_fw(ring, next_to_clean);
1875}
1876
1877static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1878{
1879 int u = ring->next_to_use;
1880 int c = ring->next_to_clean;
1881
1882 if (unlikely(h > ring->desc_num))
1883 return 0;
1884
1885 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1886}
1887
Lipeng24e750c2017-10-23 19:51:07 +08001888bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001889{
1890 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1891 struct netdev_queue *dev_queue;
1892 int bytes, pkts;
1893 int head;
1894
1895 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1896 rmb(); /* Make sure head is ready before touch any data */
1897
1898 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001899 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001900
1901 if (!is_valid_clean_head(ring, head)) {
1902 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1903 ring->next_to_use, ring->next_to_clean);
1904
1905 u64_stats_update_begin(&ring->syncp);
1906 ring->stats.io_err_cnt++;
1907 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001908 return true;
Salil76ad4f02017-08-02 16:59:45 +01001909 }
1910
1911 bytes = 0;
1912 pkts = 0;
1913 while (head != ring->next_to_clean && budget) {
1914 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1915 /* Issue prefetch for next Tx descriptor */
1916 prefetch(&ring->desc_cb[ring->next_to_clean]);
1917 budget--;
1918 }
1919
1920 ring->tqp_vector->tx_group.total_bytes += bytes;
1921 ring->tqp_vector->tx_group.total_packets += pkts;
1922
1923 u64_stats_update_begin(&ring->syncp);
1924 ring->stats.tx_bytes += bytes;
1925 ring->stats.tx_pkts += pkts;
1926 u64_stats_update_end(&ring->syncp);
1927
1928 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1929 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1930
1931 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1932 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1933 /* Make sure that anybody stopping the queue after this
1934 * sees the new next_to_clean.
1935 */
1936 smp_mb();
1937 if (netif_tx_queue_stopped(dev_queue)) {
1938 netif_tx_wake_queue(dev_queue);
1939 ring->stats.restart_queue++;
1940 }
1941 }
1942
1943 return !!budget;
1944}
1945
1946static int hns3_desc_unused(struct hns3_enet_ring *ring)
1947{
1948 int ntc = ring->next_to_clean;
1949 int ntu = ring->next_to_use;
1950
1951 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1952}
1953
1954static void
1955hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1956{
1957 struct hns3_desc_cb *desc_cb;
1958 struct hns3_desc_cb res_cbs;
1959 int i, ret;
1960
1961 for (i = 0; i < cleand_count; i++) {
1962 desc_cb = &ring->desc_cb[ring->next_to_use];
1963 if (desc_cb->reuse_flag) {
1964 u64_stats_update_begin(&ring->syncp);
1965 ring->stats.reuse_pg_cnt++;
1966 u64_stats_update_end(&ring->syncp);
1967
1968 hns3_reuse_buffer(ring, ring->next_to_use);
1969 } else {
1970 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1971 if (ret) {
1972 u64_stats_update_begin(&ring->syncp);
1973 ring->stats.sw_err_cnt++;
1974 u64_stats_update_end(&ring->syncp);
1975
1976 netdev_err(ring->tqp->handle->kinfo.netdev,
1977 "hnae reserve buffer map failed.\n");
1978 break;
1979 }
1980 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1981 }
1982
1983 ring_ptr_move_fw(ring, next_to_use);
1984 }
1985
1986 wmb(); /* Make all data has been write before submit */
1987 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1988}
1989
1990/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1991 * @data: pointer to the start of the headers
1992 * @max: total length of section to find headers in
1993 *
1994 * This function is meant to determine the length of headers that will
1995 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1996 * motivation of doing this is to only perform one pull for IPv4 TCP
1997 * packets so that we can do basic things like calculating the gso_size
1998 * based on the average data per packet.
1999 */
2000static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
2001 unsigned int max_size)
2002{
2003 unsigned char *network;
2004 u8 hlen;
2005
2006 /* This should never happen, but better safe than sorry */
2007 if (max_size < ETH_HLEN)
2008 return max_size;
2009
2010 /* Initialize network frame pointer */
2011 network = data;
2012
2013 /* Set first protocol and move network header forward */
2014 network += ETH_HLEN;
2015
2016 /* Handle any vlan tag if present */
2017 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
2018 == HNS3_RX_FLAG_VLAN_PRESENT) {
2019 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
2020 return max_size;
2021
2022 network += VLAN_HLEN;
2023 }
2024
2025 /* Handle L3 protocols */
2026 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2027 == HNS3_RX_FLAG_L3ID_IPV4) {
2028 if ((typeof(max_size))(network - data) >
2029 (max_size - sizeof(struct iphdr)))
2030 return max_size;
2031
2032 /* Access ihl as a u8 to avoid unaligned access on ia64 */
2033 hlen = (network[0] & 0x0F) << 2;
2034
2035 /* Verify hlen meets minimum size requirements */
2036 if (hlen < sizeof(struct iphdr))
2037 return network - data;
2038
2039 /* Record next protocol if header is present */
2040 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2041 == HNS3_RX_FLAG_L3ID_IPV6) {
2042 if ((typeof(max_size))(network - data) >
2043 (max_size - sizeof(struct ipv6hdr)))
2044 return max_size;
2045
2046 /* Record next protocol */
2047 hlen = sizeof(struct ipv6hdr);
2048 } else {
2049 return network - data;
2050 }
2051
2052 /* Relocate pointer to start of L4 header */
2053 network += hlen;
2054
2055 /* Finally sort out TCP/UDP */
2056 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2057 == HNS3_RX_FLAG_L4ID_TCP) {
2058 if ((typeof(max_size))(network - data) >
2059 (max_size - sizeof(struct tcphdr)))
2060 return max_size;
2061
2062 /* Access doff as a u8 to avoid unaligned access on ia64 */
2063 hlen = (network[12] & 0xF0) >> 2;
2064
2065 /* Verify hlen meets minimum size requirements */
2066 if (hlen < sizeof(struct tcphdr))
2067 return network - data;
2068
2069 network += hlen;
2070 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2071 == HNS3_RX_FLAG_L4ID_UDP) {
2072 if ((typeof(max_size))(network - data) >
2073 (max_size - sizeof(struct udphdr)))
2074 return max_size;
2075
2076 network += sizeof(struct udphdr);
2077 }
2078
2079 /* If everything has gone correctly network should be the
2080 * data section of the packet and will be the end of the header.
2081 * If not then it probably represents the end of the last recognized
2082 * header.
2083 */
2084 if ((typeof(max_size))(network - data) < max_size)
2085 return network - data;
2086 else
2087 return max_size;
2088}
2089
2090static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2091 struct hns3_enet_ring *ring, int pull_len,
2092 struct hns3_desc_cb *desc_cb)
2093{
2094 struct hns3_desc *desc;
2095 int truesize, size;
2096 int last_offset;
2097 bool twobufs;
2098
2099 twobufs = ((PAGE_SIZE < 8192) &&
2100 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2101
2102 desc = &ring->desc[ring->next_to_clean];
2103 size = le16_to_cpu(desc->rx.size);
2104
Peng Lif8d291f2018-03-10 11:29:26 +08002105 truesize = hnae_buf_size(ring);
2106
2107 if (!twobufs)
Salil76ad4f02017-08-02 16:59:45 +01002108 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
Salil76ad4f02017-08-02 16:59:45 +01002109
2110 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
Peng Lif8d291f2018-03-10 11:29:26 +08002111 size - pull_len, truesize);
Salil76ad4f02017-08-02 16:59:45 +01002112
2113 /* Avoid re-using remote pages,flag default unreuse */
2114 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2115 return;
2116
2117 if (twobufs) {
2118 /* If we are only owner of page we can reuse it */
2119 if (likely(page_count(desc_cb->priv) == 1)) {
2120 /* Flip page offset to other buffer */
2121 desc_cb->page_offset ^= truesize;
2122
2123 desc_cb->reuse_flag = 1;
2124 /* bump ref count on page before it is given*/
2125 get_page(desc_cb->priv);
2126 }
2127 return;
2128 }
2129
2130 /* Move offset up to the next cache line */
2131 desc_cb->page_offset += truesize;
2132
2133 if (desc_cb->page_offset <= last_offset) {
2134 desc_cb->reuse_flag = 1;
2135 /* Bump ref count on page before it is given*/
2136 get_page(desc_cb->priv);
2137 }
2138}
2139
2140static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2141 struct hns3_desc *desc)
2142{
2143 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2144 int l3_type, l4_type;
2145 u32 bd_base_info;
2146 int ol4_type;
2147 u32 l234info;
2148
2149 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2150 l234info = le32_to_cpu(desc->rx.l234_info);
2151
2152 skb->ip_summed = CHECKSUM_NONE;
2153
2154 skb_checksum_none_assert(skb);
2155
2156 if (!(netdev->features & NETIF_F_RXCSUM))
2157 return;
2158
2159 /* check if hardware has done checksum */
2160 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2161 return;
2162
2163 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2164 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2165 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2166 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2167 netdev_err(netdev, "L3/L4 error pkt\n");
2168 u64_stats_update_begin(&ring->syncp);
2169 ring->stats.l3l4_csum_err++;
2170 u64_stats_update_end(&ring->syncp);
2171
2172 return;
2173 }
2174
2175 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2176 HNS3_RXD_L3ID_S);
2177 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2178 HNS3_RXD_L4ID_S);
2179
2180 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2181 switch (ol4_type) {
2182 case HNS3_OL4_TYPE_MAC_IN_UDP:
2183 case HNS3_OL4_TYPE_NVGRE:
2184 skb->csum_level = 1;
2185 case HNS3_OL4_TYPE_NO_TUN:
2186 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2187 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2188 (l3_type == HNS3_L3_TYPE_IPV6 &&
2189 (l4_type == HNS3_L4_TYPE_UDP ||
2190 l4_type == HNS3_L4_TYPE_TCP ||
2191 l4_type == HNS3_L4_TYPE_SCTP)))
2192 skb->ip_summed = CHECKSUM_UNNECESSARY;
2193 break;
2194 }
2195}
2196
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002197static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2198{
2199 napi_gro_receive(&ring->tqp_vector->napi, skb);
2200}
2201
Salil76ad4f02017-08-02 16:59:45 +01002202static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2203 struct sk_buff **out_skb, int *out_bnum)
2204{
2205 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2206 struct hns3_desc_cb *desc_cb;
2207 struct hns3_desc *desc;
2208 struct sk_buff *skb;
2209 unsigned char *va;
2210 u32 bd_base_info;
2211 int pull_len;
2212 u32 l234info;
2213 int length;
2214 int bnum;
2215
2216 desc = &ring->desc[ring->next_to_clean];
2217 desc_cb = &ring->desc_cb[ring->next_to_clean];
2218
2219 prefetch(desc);
2220
2221 length = le16_to_cpu(desc->rx.pkt_len);
2222 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2223 l234info = le32_to_cpu(desc->rx.l234_info);
2224
2225 /* Check valid BD */
2226 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2227 return -EFAULT;
2228
2229 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2230
2231 /* Prefetch first cache line of first page
2232 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2233 * line size is 64B so need to prefetch twice to make it 128B. But in
2234 * actual we can have greater size of caches with 128B Level 1 cache
2235 * lines. In such a case, single fetch would suffice to cache in the
2236 * relevant part of the header.
2237 */
2238 prefetch(va);
2239#if L1_CACHE_BYTES < 128
2240 prefetch(va + L1_CACHE_BYTES);
2241#endif
2242
2243 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2244 HNS3_RX_HEAD_SIZE);
2245 if (unlikely(!skb)) {
2246 netdev_err(netdev, "alloc rx skb fail\n");
2247
2248 u64_stats_update_begin(&ring->syncp);
2249 ring->stats.sw_err_cnt++;
2250 u64_stats_update_end(&ring->syncp);
2251
2252 return -ENOMEM;
2253 }
2254
2255 prefetchw(skb->data);
2256
Peng Li9699cff2017-12-22 12:21:48 +08002257 /* Based on hw strategy, the tag offloaded will be stored at
2258 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2259 * in one layer tag case.
2260 */
2261 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2262 u16 vlan_tag;
2263
2264 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2265 if (!(vlan_tag & VLAN_VID_MASK))
2266 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2267 if (vlan_tag & VLAN_VID_MASK)
2268 __vlan_hwaccel_put_tag(skb,
2269 htons(ETH_P_8021Q),
2270 vlan_tag);
2271 }
2272
Salil76ad4f02017-08-02 16:59:45 +01002273 bnum = 1;
2274 if (length <= HNS3_RX_HEAD_SIZE) {
2275 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2276
2277 /* We can reuse buffer as-is, just make sure it is local */
2278 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2279 desc_cb->reuse_flag = 1;
2280 else /* This page cannot be reused so discard it */
2281 put_page(desc_cb->priv);
2282
2283 ring_ptr_move_fw(ring, next_to_clean);
2284 } else {
2285 u64_stats_update_begin(&ring->syncp);
2286 ring->stats.seg_pkt_cnt++;
2287 u64_stats_update_end(&ring->syncp);
2288
2289 pull_len = hns3_nic_get_headlen(va, l234info,
2290 HNS3_RX_HEAD_SIZE);
2291 memcpy(__skb_put(skb, pull_len), va,
2292 ALIGN(pull_len, sizeof(long)));
2293
2294 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2295 ring_ptr_move_fw(ring, next_to_clean);
2296
2297 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2298 desc = &ring->desc[ring->next_to_clean];
2299 desc_cb = &ring->desc_cb[ring->next_to_clean];
2300 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2301 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2302 ring_ptr_move_fw(ring, next_to_clean);
2303 bnum++;
2304 }
2305 }
2306
2307 *out_bnum = bnum;
2308
2309 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2310 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2311 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2312 u64_stats_update_begin(&ring->syncp);
2313 ring->stats.non_vld_descs++;
2314 u64_stats_update_end(&ring->syncp);
2315
2316 dev_kfree_skb_any(skb);
2317 return -EINVAL;
2318 }
2319
2320 if (unlikely((!desc->rx.pkt_len) ||
2321 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2322 netdev_err(netdev, "truncated pkt\n");
2323 u64_stats_update_begin(&ring->syncp);
2324 ring->stats.err_pkt_len++;
2325 u64_stats_update_end(&ring->syncp);
2326
2327 dev_kfree_skb_any(skb);
2328 return -EFAULT;
2329 }
2330
2331 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2332 netdev_err(netdev, "L2 error pkt\n");
2333 u64_stats_update_begin(&ring->syncp);
2334 ring->stats.l2_err++;
2335 u64_stats_update_end(&ring->syncp);
2336
2337 dev_kfree_skb_any(skb);
2338 return -EFAULT;
2339 }
2340
2341 u64_stats_update_begin(&ring->syncp);
2342 ring->stats.rx_pkts++;
2343 ring->stats.rx_bytes += skb->len;
2344 u64_stats_update_end(&ring->syncp);
2345
2346 ring->tqp_vector->rx_group.total_bytes += skb->len;
2347
2348 hns3_rx_checksum(ring, skb, desc);
2349 return 0;
2350}
2351
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002352int hns3_clean_rx_ring(
2353 struct hns3_enet_ring *ring, int budget,
2354 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002355{
2356#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2357 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2358 int recv_pkts, recv_bds, clean_count, err;
2359 int unused_count = hns3_desc_unused(ring);
2360 struct sk_buff *skb = NULL;
2361 int num, bnum = 0;
2362
2363 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2364 rmb(); /* Make sure num taken effect before the other data is touched */
2365
2366 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2367 num -= unused_count;
2368
2369 while (recv_pkts < budget && recv_bds < num) {
2370 /* Reuse or realloc buffers */
2371 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2372 hns3_nic_alloc_rx_buffers(ring,
2373 clean_count + unused_count);
2374 clean_count = 0;
2375 unused_count = hns3_desc_unused(ring);
2376 }
2377
2378 /* Poll one pkt */
2379 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2380 if (unlikely(!skb)) /* This fault cannot be repaired */
2381 goto out;
2382
2383 recv_bds += bnum;
2384 clean_count += bnum;
2385 if (unlikely(err)) { /* Do jump the err */
2386 recv_pkts++;
2387 continue;
2388 }
2389
2390 /* Do update ip stack process */
2391 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002392 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002393
2394 recv_pkts++;
2395 }
2396
2397out:
2398 /* Make all data has been write before submit */
2399 if (clean_count + unused_count > 0)
2400 hns3_nic_alloc_rx_buffers(ring,
2401 clean_count + unused_count);
2402
2403 return recv_pkts;
2404}
2405
2406static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2407{
2408#define HNS3_RX_ULTRA_PACKET_RATE 40000
2409 enum hns3_flow_level_range new_flow_level;
2410 struct hns3_enet_tqp_vector *tqp_vector;
2411 int packets_per_secs;
2412 int bytes_per_usecs;
2413 u16 new_int_gl;
2414 int usecs;
2415
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002416 if (!ring_group->coal.int_gl)
Salil76ad4f02017-08-02 16:59:45 +01002417 return false;
2418
2419 if (ring_group->total_packets == 0) {
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002420 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2421 ring_group->coal.flow_level = HNS3_FLOW_LOW;
Salil76ad4f02017-08-02 16:59:45 +01002422 return true;
2423 }
2424
2425 /* Simple throttlerate management
2426 * 0-10MB/s lower (50000 ints/s)
2427 * 10-20MB/s middle (20000 ints/s)
2428 * 20-1249MB/s high (18000 ints/s)
2429 * > 40000pps ultra (8000 ints/s)
2430 */
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002431 new_flow_level = ring_group->coal.flow_level;
2432 new_int_gl = ring_group->coal.int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002433 tqp_vector = ring_group->ring->tqp_vector;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002434 usecs = (ring_group->coal.int_gl << 1);
Salil76ad4f02017-08-02 16:59:45 +01002435 bytes_per_usecs = ring_group->total_bytes / usecs;
2436 /* 1000000 microseconds */
2437 packets_per_secs = ring_group->total_packets * 1000000 / usecs;
2438
2439 switch (new_flow_level) {
2440 case HNS3_FLOW_LOW:
2441 if (bytes_per_usecs > 10)
2442 new_flow_level = HNS3_FLOW_MID;
2443 break;
2444 case HNS3_FLOW_MID:
2445 if (bytes_per_usecs > 20)
2446 new_flow_level = HNS3_FLOW_HIGH;
2447 else if (bytes_per_usecs <= 10)
2448 new_flow_level = HNS3_FLOW_LOW;
2449 break;
2450 case HNS3_FLOW_HIGH:
2451 case HNS3_FLOW_ULTRA:
2452 default:
2453 if (bytes_per_usecs <= 20)
2454 new_flow_level = HNS3_FLOW_MID;
2455 break;
2456 }
2457
2458 if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&
2459 (&tqp_vector->rx_group == ring_group))
2460 new_flow_level = HNS3_FLOW_ULTRA;
2461
2462 switch (new_flow_level) {
2463 case HNS3_FLOW_LOW:
2464 new_int_gl = HNS3_INT_GL_50K;
2465 break;
2466 case HNS3_FLOW_MID:
2467 new_int_gl = HNS3_INT_GL_20K;
2468 break;
2469 case HNS3_FLOW_HIGH:
2470 new_int_gl = HNS3_INT_GL_18K;
2471 break;
2472 case HNS3_FLOW_ULTRA:
2473 new_int_gl = HNS3_INT_GL_8K;
2474 break;
2475 default:
2476 break;
2477 }
2478
2479 ring_group->total_bytes = 0;
2480 ring_group->total_packets = 0;
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002481 ring_group->coal.flow_level = new_flow_level;
2482 if (new_int_gl != ring_group->coal.int_gl) {
2483 ring_group->coal.int_gl = new_int_gl;
Salil76ad4f02017-08-02 16:59:45 +01002484 return true;
2485 }
2486 return false;
2487}
2488
2489static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2490{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002491 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2492 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2493 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002494
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002495 if (rx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002496 rx_update = hns3_get_new_int_gl(rx_group);
2497 if (rx_update)
2498 hns3_set_vector_coalesce_rx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002499 rx_group->coal.int_gl);
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002500 }
2501
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002502 if (tx_group->coal.gl_adapt_enable) {
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002503 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2504 if (tx_update)
2505 hns3_set_vector_coalesce_tx_gl(tqp_vector,
Yunsheng Lin9bc727a2018-03-09 10:37:03 +08002506 tx_group->coal.int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002507 }
2508}
2509
2510static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2511{
2512 struct hns3_enet_ring *ring;
2513 int rx_pkt_total = 0;
2514
2515 struct hns3_enet_tqp_vector *tqp_vector =
2516 container_of(napi, struct hns3_enet_tqp_vector, napi);
2517 bool clean_complete = true;
2518 int rx_budget;
2519
2520 /* Since the actual Tx work is minimal, we can give the Tx a larger
2521 * budget and be more aggressive about cleaning up the Tx descriptors.
2522 */
2523 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2524 if (!hns3_clean_tx_ring(ring, budget))
2525 clean_complete = false;
2526 }
2527
2528 /* make sure rx ring budget not smaller than 1 */
2529 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2530
2531 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002532 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2533 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002534
2535 if (rx_cleaned >= rx_budget)
2536 clean_complete = false;
2537
2538 rx_pkt_total += rx_cleaned;
2539 }
2540
2541 tqp_vector->rx_group.total_packets += rx_pkt_total;
2542
2543 if (!clean_complete)
2544 return budget;
2545
2546 napi_complete(napi);
2547 hns3_update_new_int_gl(tqp_vector);
2548 hns3_mask_vector_irq(tqp_vector, 1);
2549
2550 return rx_pkt_total;
2551}
2552
2553static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2554 struct hnae3_ring_chain_node *head)
2555{
2556 struct pci_dev *pdev = tqp_vector->handle->pdev;
2557 struct hnae3_ring_chain_node *cur_chain = head;
2558 struct hnae3_ring_chain_node *chain;
2559 struct hns3_enet_ring *tx_ring;
2560 struct hns3_enet_ring *rx_ring;
2561
2562 tx_ring = tqp_vector->tx_group.ring;
2563 if (tx_ring) {
2564 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2565 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2566 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002567 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2568 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002569
2570 cur_chain->next = NULL;
2571
2572 while (tx_ring->next) {
2573 tx_ring = tx_ring->next;
2574
2575 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2576 GFP_KERNEL);
2577 if (!chain)
2578 return -ENOMEM;
2579
2580 cur_chain->next = chain;
2581 chain->tqp_index = tx_ring->tqp->tqp_index;
2582 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2583 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002584 hnae_set_field(chain->int_gl_idx,
2585 HNAE3_RING_GL_IDX_M,
2586 HNAE3_RING_GL_IDX_S,
2587 HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002588
2589 cur_chain = chain;
2590 }
2591 }
2592
2593 rx_ring = tqp_vector->rx_group.ring;
2594 if (!tx_ring && rx_ring) {
2595 cur_chain->next = NULL;
2596 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2597 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2598 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002599 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2600 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
Salil76ad4f02017-08-02 16:59:45 +01002601
2602 rx_ring = rx_ring->next;
2603 }
2604
2605 while (rx_ring) {
2606 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2607 if (!chain)
2608 return -ENOMEM;
2609
2610 cur_chain->next = chain;
2611 chain->tqp_index = rx_ring->tqp->tqp_index;
2612 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2613 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002614 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2615 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2616
Salil76ad4f02017-08-02 16:59:45 +01002617 cur_chain = chain;
2618
2619 rx_ring = rx_ring->next;
2620 }
2621
2622 return 0;
2623}
2624
2625static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2626 struct hnae3_ring_chain_node *head)
2627{
2628 struct pci_dev *pdev = tqp_vector->handle->pdev;
2629 struct hnae3_ring_chain_node *chain_tmp, *chain;
2630
2631 chain = head->next;
2632
2633 while (chain) {
2634 chain_tmp = chain->next;
2635 devm_kfree(&pdev->dev, chain);
2636 chain = chain_tmp;
2637 }
2638}
2639
2640static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2641 struct hns3_enet_ring *ring)
2642{
2643 ring->next = group->ring;
2644 group->ring = ring;
2645
2646 group->count++;
2647}
2648
2649static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2650{
2651 struct hnae3_ring_chain_node vector_ring_chain;
2652 struct hnae3_handle *h = priv->ae_handle;
2653 struct hns3_enet_tqp_vector *tqp_vector;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002654 int ret = 0;
2655 u16 i;
2656
2657 for (i = 0; i < priv->vector_num; i++) {
2658 tqp_vector = &priv->tqp_vector[i];
2659 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
2660 tqp_vector->num_tqps = 0;
2661 }
2662
2663 for (i = 0; i < h->kinfo.num_tqps; i++) {
2664 u16 vector_i = i % priv->vector_num;
2665 u16 tqp_num = h->kinfo.num_tqps;
2666
2667 tqp_vector = &priv->tqp_vector[vector_i];
2668
2669 hns3_add_ring_to_group(&tqp_vector->tx_group,
2670 priv->ring_data[i].ring);
2671
2672 hns3_add_ring_to_group(&tqp_vector->rx_group,
2673 priv->ring_data[i + tqp_num].ring);
2674
2675 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2676 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2677 tqp_vector->num_tqps++;
2678 }
2679
2680 for (i = 0; i < priv->vector_num; i++) {
2681 tqp_vector = &priv->tqp_vector[i];
2682
2683 tqp_vector->rx_group.total_bytes = 0;
2684 tqp_vector->rx_group.total_packets = 0;
2685 tqp_vector->tx_group.total_bytes = 0;
2686 tqp_vector->tx_group.total_packets = 0;
2687 tqp_vector->handle = h;
2688
2689 ret = hns3_get_vector_ring_chain(tqp_vector,
2690 &vector_ring_chain);
2691 if (ret)
2692 return ret;
2693
2694 ret = h->ae_algo->ops->map_ring_to_vector(h,
2695 tqp_vector->vector_irq, &vector_ring_chain);
2696
2697 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2698
2699 if (ret)
2700 return ret;
2701
2702 netif_napi_add(priv->netdev, &tqp_vector->napi,
2703 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2704 }
2705
2706 return 0;
2707}
2708
2709static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
2710{
2711 struct hnae3_handle *h = priv->ae_handle;
2712 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002713 struct hnae3_vector_info *vector;
2714 struct pci_dev *pdev = h->pdev;
2715 u16 tqp_num = h->kinfo.num_tqps;
2716 u16 vector_num;
2717 int ret = 0;
2718 u16 i;
2719
2720 /* RSS size, cpu online and vector_num should be the same */
2721 /* Should consider 2p/4p later */
2722 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2723 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2724 GFP_KERNEL);
2725 if (!vector)
2726 return -ENOMEM;
2727
2728 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2729
2730 priv->vector_num = vector_num;
2731 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2732 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2733 GFP_KERNEL);
Yunsheng Lindd38c722018-03-09 10:37:02 +08002734 if (!priv->tqp_vector) {
2735 ret = -ENOMEM;
2736 goto out;
Salil76ad4f02017-08-02 16:59:45 +01002737 }
2738
Yunsheng Lindd38c722018-03-09 10:37:02 +08002739 for (i = 0; i < priv->vector_num; i++) {
Salil76ad4f02017-08-02 16:59:45 +01002740 tqp_vector = &priv->tqp_vector[i];
Yunsheng Lindd38c722018-03-09 10:37:02 +08002741 tqp_vector->idx = i;
2742 tqp_vector->mask_addr = vector[i].io_addr;
2743 tqp_vector->vector_irq = vector[i].vector;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002744 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002745 }
2746
2747out:
2748 devm_kfree(&pdev->dev, vector);
2749 return ret;
2750}
2751
Yunsheng Lindd38c722018-03-09 10:37:02 +08002752static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
2753{
2754 group->ring = NULL;
2755 group->count = 0;
2756}
2757
Salil76ad4f02017-08-02 16:59:45 +01002758static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2759{
2760 struct hnae3_ring_chain_node vector_ring_chain;
2761 struct hnae3_handle *h = priv->ae_handle;
2762 struct hns3_enet_tqp_vector *tqp_vector;
Salil76ad4f02017-08-02 16:59:45 +01002763 int i, ret;
2764
2765 for (i = 0; i < priv->vector_num; i++) {
2766 tqp_vector = &priv->tqp_vector[i];
2767
2768 ret = hns3_get_vector_ring_chain(tqp_vector,
2769 &vector_ring_chain);
2770 if (ret)
2771 return ret;
2772
2773 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2774 tqp_vector->vector_irq, &vector_ring_chain);
2775 if (ret)
2776 return ret;
2777
Yunsheng Lin0d3e6632018-03-09 10:37:01 +08002778 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2779 if (ret)
2780 return ret;
2781
Salil76ad4f02017-08-02 16:59:45 +01002782 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2783
2784 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2785 (void)irq_set_affinity_hint(
2786 priv->tqp_vector[i].vector_irq,
2787 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002788 free_irq(priv->tqp_vector[i].vector_irq,
2789 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002790 }
2791
2792 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
Yunsheng Lindd38c722018-03-09 10:37:02 +08002793 hns3_clear_ring_group(&tqp_vector->rx_group);
2794 hns3_clear_ring_group(&tqp_vector->tx_group);
Salil76ad4f02017-08-02 16:59:45 +01002795 netif_napi_del(&priv->tqp_vector[i].napi);
2796 }
2797
Yunsheng Lindd38c722018-03-09 10:37:02 +08002798 return 0;
2799}
Salil76ad4f02017-08-02 16:59:45 +01002800
Yunsheng Lindd38c722018-03-09 10:37:02 +08002801static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
2802{
2803 struct hnae3_handle *h = priv->ae_handle;
2804 struct pci_dev *pdev = h->pdev;
2805 int i, ret;
2806
2807 for (i = 0; i < priv->vector_num; i++) {
2808 struct hns3_enet_tqp_vector *tqp_vector;
2809
2810 tqp_vector = &priv->tqp_vector[i];
2811 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2812 if (ret)
2813 return ret;
2814 }
2815
2816 devm_kfree(&pdev->dev, priv->tqp_vector);
Salil76ad4f02017-08-02 16:59:45 +01002817 return 0;
2818}
2819
2820static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2821 int ring_type)
2822{
2823 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2824 int queue_num = priv->ae_handle->kinfo.num_tqps;
2825 struct pci_dev *pdev = priv->ae_handle->pdev;
2826 struct hns3_enet_ring *ring;
2827
2828 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2829 if (!ring)
2830 return -ENOMEM;
2831
2832 if (ring_type == HNAE3_RING_TYPE_TX) {
2833 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002834 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002835 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2836 } else {
2837 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002838 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002839 ring->io_base = q->io_base;
2840 }
2841
2842 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2843
Salil76ad4f02017-08-02 16:59:45 +01002844 ring->tqp = q;
2845 ring->desc = NULL;
2846 ring->desc_cb = NULL;
2847 ring->dev = priv->dev;
2848 ring->desc_dma_addr = 0;
2849 ring->buf_size = q->buf_size;
2850 ring->desc_num = q->desc_num;
2851 ring->next_to_use = 0;
2852 ring->next_to_clean = 0;
2853
2854 return 0;
2855}
2856
2857static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2858 struct hns3_nic_priv *priv)
2859{
2860 int ret;
2861
2862 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2863 if (ret)
2864 return ret;
2865
2866 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2867 if (ret)
2868 return ret;
2869
2870 return 0;
2871}
2872
2873static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2874{
2875 struct hnae3_handle *h = priv->ae_handle;
2876 struct pci_dev *pdev = h->pdev;
2877 int i, ret;
2878
2879 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2880 sizeof(*priv->ring_data) * 2,
2881 GFP_KERNEL);
2882 if (!priv->ring_data)
2883 return -ENOMEM;
2884
2885 for (i = 0; i < h->kinfo.num_tqps; i++) {
2886 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2887 if (ret)
2888 goto err;
2889 }
2890
2891 return 0;
2892err:
2893 devm_kfree(&pdev->dev, priv->ring_data);
2894 return ret;
2895}
2896
Peng Li09f2af62017-12-22 12:21:41 +08002897static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2898{
2899 struct hnae3_handle *h = priv->ae_handle;
2900 int i;
2901
2902 for (i = 0; i < h->kinfo.num_tqps; i++) {
2903 devm_kfree(priv->dev, priv->ring_data[i].ring);
2904 devm_kfree(priv->dev,
2905 priv->ring_data[i + h->kinfo.num_tqps].ring);
2906 }
2907 devm_kfree(priv->dev, priv->ring_data);
2908}
2909
Salil76ad4f02017-08-02 16:59:45 +01002910static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2911{
2912 int ret;
2913
2914 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2915 return -EINVAL;
2916
2917 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2918 GFP_KERNEL);
2919 if (!ring->desc_cb) {
2920 ret = -ENOMEM;
2921 goto out;
2922 }
2923
2924 ret = hns3_alloc_desc(ring);
2925 if (ret)
2926 goto out_with_desc_cb;
2927
2928 if (!HNAE3_IS_TX_RING(ring)) {
2929 ret = hns3_alloc_ring_buffers(ring);
2930 if (ret)
2931 goto out_with_desc;
2932 }
2933
2934 return 0;
2935
2936out_with_desc:
2937 hns3_free_desc(ring);
2938out_with_desc_cb:
2939 kfree(ring->desc_cb);
2940 ring->desc_cb = NULL;
2941out:
2942 return ret;
2943}
2944
2945static void hns3_fini_ring(struct hns3_enet_ring *ring)
2946{
2947 hns3_free_desc(ring);
2948 kfree(ring->desc_cb);
2949 ring->desc_cb = NULL;
2950 ring->next_to_clean = 0;
2951 ring->next_to_use = 0;
2952}
2953
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002954static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002955{
2956 int bd_size_type;
2957
2958 switch (buf_size) {
2959 case 512:
2960 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2961 break;
2962 case 1024:
2963 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2964 break;
2965 case 2048:
2966 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2967 break;
2968 case 4096:
2969 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2970 break;
2971 default:
2972 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2973 }
2974
2975 return bd_size_type;
2976}
2977
2978static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2979{
2980 dma_addr_t dma = ring->desc_dma_addr;
2981 struct hnae3_queue *q = ring->tqp;
2982
2983 if (!HNAE3_IS_TX_RING(ring)) {
2984 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2985 (u32)dma);
2986 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2987 (u32)((dma >> 31) >> 1));
2988
2989 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2990 hns3_buf_size2type(ring->buf_size));
2991 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2992 ring->desc_num / 8 - 1);
2993
2994 } else {
2995 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2996 (u32)dma);
2997 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2998 (u32)((dma >> 31) >> 1));
2999
3000 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
3001 hns3_buf_size2type(ring->buf_size));
3002 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3003 ring->desc_num / 8 - 1);
3004 }
3005}
3006
Lipeng5668abd2017-10-10 16:42:04 +08003007int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003008{
3009 struct hnae3_handle *h = priv->ae_handle;
3010 int ring_num = h->kinfo.num_tqps * 2;
3011 int i, j;
3012 int ret;
3013
3014 for (i = 0; i < ring_num; i++) {
3015 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3016 if (ret) {
3017 dev_err(priv->dev,
3018 "Alloc ring memory fail! ret=%d\n", ret);
3019 goto out_when_alloc_ring_memory;
3020 }
3021
3022 hns3_init_ring_hw(priv->ring_data[i].ring);
3023
3024 u64_stats_init(&priv->ring_data[i].ring->syncp);
3025 }
3026
3027 return 0;
3028
3029out_when_alloc_ring_memory:
3030 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08003031 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01003032
3033 return -ENOMEM;
3034}
3035
Lipeng5668abd2017-10-10 16:42:04 +08003036int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01003037{
3038 struct hnae3_handle *h = priv->ae_handle;
3039 int i;
3040
3041 for (i = 0; i < h->kinfo.num_tqps; i++) {
3042 if (h->ae_algo->ops->reset_queue)
3043 h->ae_algo->ops->reset_queue(h, i);
3044
3045 hns3_fini_ring(priv->ring_data[i].ring);
3046 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3047 }
Salil76ad4f02017-08-02 16:59:45 +01003048 return 0;
3049}
3050
3051/* Set mac addr if it is configured. or leave it to the AE driver */
3052static void hns3_init_mac_addr(struct net_device *netdev)
3053{
3054 struct hns3_nic_priv *priv = netdev_priv(netdev);
3055 struct hnae3_handle *h = priv->ae_handle;
3056 u8 mac_addr_temp[ETH_ALEN];
3057
3058 if (h->ae_algo->ops->get_mac_addr) {
3059 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3060 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3061 }
3062
3063 /* Check if the MAC address is valid, if not get a random one */
3064 if (!is_valid_ether_addr(netdev->dev_addr)) {
3065 eth_hw_addr_random(netdev);
3066 dev_warn(priv->dev, "using random MAC address %pM\n",
3067 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01003068 }
Lipeng139e8792017-09-19 17:17:13 +01003069
3070 if (h->ae_algo->ops->set_mac_addr)
Fuyun Liang590980552018-03-10 11:29:22 +08003071 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
Lipeng139e8792017-09-19 17:17:13 +01003072
Salil76ad4f02017-08-02 16:59:45 +01003073}
3074
3075static void hns3_nic_set_priv_ops(struct net_device *netdev)
3076{
3077 struct hns3_nic_priv *priv = netdev_priv(netdev);
3078
3079 if ((netdev->features & NETIF_F_TSO) ||
3080 (netdev->features & NETIF_F_TSO6)) {
3081 priv->ops.fill_desc = hns3_fill_desc_tso;
3082 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3083 } else {
3084 priv->ops.fill_desc = hns3_fill_desc;
3085 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3086 }
3087}
3088
3089static int hns3_client_init(struct hnae3_handle *handle)
3090{
3091 struct pci_dev *pdev = handle->pdev;
3092 struct hns3_nic_priv *priv;
3093 struct net_device *netdev;
3094 int ret;
3095
3096 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
Peng Li678335a12018-03-08 19:41:54 +08003097 hns3_get_max_available_channels(handle));
Salil76ad4f02017-08-02 16:59:45 +01003098 if (!netdev)
3099 return -ENOMEM;
3100
3101 priv = netdev_priv(netdev);
3102 priv->dev = &pdev->dev;
3103 priv->netdev = netdev;
3104 priv->ae_handle = handle;
Lipengf8fa222c2017-11-02 20:45:20 +08003105 priv->last_reset_time = jiffies;
3106 priv->reset_level = HNAE3_FUNC_RESET;
3107 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003108
3109 handle->kinfo.netdev = netdev;
3110 handle->priv = (void *)priv;
3111
3112 hns3_init_mac_addr(netdev);
3113
3114 hns3_set_default_feature(netdev);
3115
3116 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3117 netdev->priv_flags |= IFF_UNICAST_FLT;
3118 netdev->netdev_ops = &hns3_nic_netdev_ops;
3119 SET_NETDEV_DEV(netdev, &pdev->dev);
3120 hns3_ethtool_set_ops(netdev);
3121 hns3_nic_set_priv_ops(netdev);
3122
3123 /* Carrier off reporting is important to ethtool even BEFORE open */
3124 netif_carrier_off(netdev);
3125
3126 ret = hns3_get_ring_config(priv);
3127 if (ret) {
3128 ret = -ENOMEM;
3129 goto out_get_ring_cfg;
3130 }
3131
Yunsheng Lindd38c722018-03-09 10:37:02 +08003132 ret = hns3_nic_alloc_vector_data(priv);
3133 if (ret) {
3134 ret = -ENOMEM;
3135 goto out_alloc_vector_data;
3136 }
3137
Salil76ad4f02017-08-02 16:59:45 +01003138 ret = hns3_nic_init_vector_data(priv);
3139 if (ret) {
3140 ret = -ENOMEM;
3141 goto out_init_vector_data;
3142 }
3143
3144 ret = hns3_init_all_ring(priv);
3145 if (ret) {
3146 ret = -ENOMEM;
3147 goto out_init_ring_data;
3148 }
3149
3150 ret = register_netdev(netdev);
3151 if (ret) {
3152 dev_err(priv->dev, "probe register netdev fail!\n");
3153 goto out_reg_netdev_fail;
3154 }
3155
Yunsheng Lin986743d2017-09-27 09:45:30 +08003156 hns3_dcbnl_setup(handle);
3157
Salila8e8b7f2017-08-21 17:05:24 +01003158 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3159 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3160
Salil76ad4f02017-08-02 16:59:45 +01003161 return ret;
3162
3163out_reg_netdev_fail:
3164out_init_ring_data:
3165 (void)hns3_nic_uninit_vector_data(priv);
Salil76ad4f02017-08-02 16:59:45 +01003166out_init_vector_data:
Yunsheng Lindd38c722018-03-09 10:37:02 +08003167 hns3_nic_dealloc_vector_data(priv);
3168out_alloc_vector_data:
3169 priv->ring_data = NULL;
Salil76ad4f02017-08-02 16:59:45 +01003170out_get_ring_cfg:
3171 priv->ae_handle = NULL;
3172 free_netdev(netdev);
3173 return ret;
3174}
3175
3176static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3177{
3178 struct net_device *netdev = handle->kinfo.netdev;
3179 struct hns3_nic_priv *priv = netdev_priv(netdev);
3180 int ret;
3181
3182 if (netdev->reg_state != NETREG_UNINITIALIZED)
3183 unregister_netdev(netdev);
3184
3185 ret = hns3_nic_uninit_vector_data(priv);
3186 if (ret)
3187 netdev_err(netdev, "uninit vector error\n");
3188
Yunsheng Lindd38c722018-03-09 10:37:02 +08003189 ret = hns3_nic_dealloc_vector_data(priv);
3190 if (ret)
3191 netdev_err(netdev, "dealloc vector error\n");
3192
Salil76ad4f02017-08-02 16:59:45 +01003193 ret = hns3_uninit_all_ring(priv);
3194 if (ret)
3195 netdev_err(netdev, "uninit ring error\n");
3196
Yunsheng Linec777892018-03-09 10:37:00 +08003197 hns3_put_ring_config(priv);
3198
Salil76ad4f02017-08-02 16:59:45 +01003199 priv->ring_data = NULL;
3200
3201 free_netdev(netdev);
3202}
3203
3204static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3205{
3206 struct net_device *netdev = handle->kinfo.netdev;
3207
3208 if (!netdev)
3209 return;
3210
3211 if (linkup) {
3212 netif_carrier_on(netdev);
3213 netif_tx_wake_all_queues(netdev);
3214 netdev_info(netdev, "link up\n");
3215 } else {
3216 netif_carrier_off(netdev);
3217 netif_tx_stop_all_queues(netdev);
3218 netdev_info(netdev, "link down\n");
3219 }
3220}
3221
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003222static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3223{
3224 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3225 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003226 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003227 int ret;
3228 u8 i;
3229
3230 if (tc > HNAE3_MAX_TC)
3231 return -EINVAL;
3232
3233 if (!ndev)
3234 return -ENODEV;
3235
Colin Ian King075cfdd2017-09-29 20:51:23 +01003236 if_running = netif_running(ndev);
3237
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003238 ret = netdev_set_num_tc(ndev, tc);
3239 if (ret)
3240 return ret;
3241
3242 if (if_running) {
3243 (void)hns3_nic_net_stop(ndev);
3244 msleep(100);
3245 }
3246
3247 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3248 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3249 if (ret)
3250 goto err_out;
3251
3252 if (tc <= 1) {
3253 netdev_reset_tc(ndev);
3254 goto out;
3255 }
3256
3257 for (i = 0; i < HNAE3_MAX_TC; i++) {
3258 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3259
3260 if (tc_info->enable)
3261 netdev_set_tc_queue(ndev,
3262 tc_info->tc,
3263 tc_info->tqp_count,
3264 tc_info->tqp_offset);
3265 }
3266
3267 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3268 netdev_set_prio_tc_map(ndev, i,
3269 kinfo->prio_tc[i]);
3270 }
3271
3272out:
3273 ret = hns3_nic_set_real_num_queue(ndev);
3274
3275err_out:
3276 if (if_running)
3277 (void)hns3_nic_net_open(ndev);
3278
3279 return ret;
3280}
3281
Lipengbb6b94a2017-11-02 20:45:21 +08003282static void hns3_recover_hw_addr(struct net_device *ndev)
3283{
3284 struct netdev_hw_addr_list *list;
3285 struct netdev_hw_addr *ha, *tmp;
3286
3287 /* go through and sync uc_addr entries to the device */
3288 list = &ndev->uc;
3289 list_for_each_entry_safe(ha, tmp, &list->list, list)
3290 hns3_nic_uc_sync(ndev, ha->addr);
3291
3292 /* go through and sync mc_addr entries to the device */
3293 list = &ndev->mc;
3294 list_for_each_entry_safe(ha, tmp, &list->list, list)
3295 hns3_nic_mc_sync(ndev, ha->addr);
3296}
3297
3298static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3299{
3300 dev_kfree_skb_any(skb);
3301}
3302
3303static void hns3_clear_all_ring(struct hnae3_handle *h)
3304{
3305 struct net_device *ndev = h->kinfo.netdev;
3306 struct hns3_nic_priv *priv = netdev_priv(ndev);
3307 u32 i;
3308
3309 for (i = 0; i < h->kinfo.num_tqps; i++) {
3310 struct netdev_queue *dev_queue;
3311 struct hns3_enet_ring *ring;
3312
3313 ring = priv->ring_data[i].ring;
3314 hns3_clean_tx_ring(ring, ring->desc_num);
3315 dev_queue = netdev_get_tx_queue(ndev,
3316 priv->ring_data[i].queue_index);
3317 netdev_tx_reset_queue(dev_queue);
3318
3319 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3320 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3321 }
3322}
3323
3324static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3325{
3326 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3327 struct net_device *ndev = kinfo->netdev;
3328
3329 if (!netif_running(ndev))
3330 return -EIO;
3331
3332 return hns3_nic_net_stop(ndev);
3333}
3334
3335static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3336{
3337 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3338 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
3339 int ret = 0;
3340
3341 if (netif_running(kinfo->netdev)) {
3342 ret = hns3_nic_net_up(kinfo->netdev);
3343 if (ret) {
3344 netdev_err(kinfo->netdev,
3345 "hns net up fail, ret=%d!\n", ret);
3346 return ret;
3347 }
3348
3349 priv->last_reset_time = jiffies;
3350 }
3351
3352 return ret;
3353}
3354
3355static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3356{
3357 struct net_device *netdev = handle->kinfo.netdev;
3358 struct hns3_nic_priv *priv = netdev_priv(netdev);
3359 int ret;
3360
3361 priv->reset_level = 1;
3362 hns3_init_mac_addr(netdev);
3363 hns3_nic_set_rx_mode(netdev);
3364 hns3_recover_hw_addr(netdev);
3365
Yunsheng Lin681ec392018-03-21 15:49:22 +08003366 /* Hardware table is only clear when pf resets */
3367 if (!(handle->flags & HNAE3_SUPPORT_VF))
3368 hns3_restore_vlan(netdev);
3369
Lipengbb6b94a2017-11-02 20:45:21 +08003370 /* Carrier off reporting is important to ethtool even BEFORE open */
3371 netif_carrier_off(netdev);
3372
3373 ret = hns3_get_ring_config(priv);
3374 if (ret)
3375 return ret;
3376
3377 ret = hns3_nic_init_vector_data(priv);
3378 if (ret)
3379 return ret;
3380
3381 ret = hns3_init_all_ring(priv);
3382 if (ret) {
3383 hns3_nic_uninit_vector_data(priv);
3384 priv->ring_data = NULL;
3385 }
3386
3387 return ret;
3388}
3389
3390static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3391{
3392 struct net_device *netdev = handle->kinfo.netdev;
3393 struct hns3_nic_priv *priv = netdev_priv(netdev);
3394 int ret;
3395
3396 hns3_clear_all_ring(handle);
3397
3398 ret = hns3_nic_uninit_vector_data(priv);
3399 if (ret) {
3400 netdev_err(netdev, "uninit vector error\n");
3401 return ret;
3402 }
3403
3404 ret = hns3_uninit_all_ring(priv);
3405 if (ret)
3406 netdev_err(netdev, "uninit ring error\n");
3407
Yunsheng Linec777892018-03-09 10:37:00 +08003408 hns3_put_ring_config(priv);
3409
Lipengbb6b94a2017-11-02 20:45:21 +08003410 priv->ring_data = NULL;
3411
3412 return ret;
3413}
3414
3415static int hns3_reset_notify(struct hnae3_handle *handle,
3416 enum hnae3_reset_notify_type type)
3417{
3418 int ret = 0;
3419
3420 switch (type) {
3421 case HNAE3_UP_CLIENT:
Salil Mehtae1586242018-01-19 15:20:53 +00003422 ret = hns3_reset_notify_up_enet(handle);
3423 break;
Lipengbb6b94a2017-11-02 20:45:21 +08003424 case HNAE3_DOWN_CLIENT:
3425 ret = hns3_reset_notify_down_enet(handle);
3426 break;
3427 case HNAE3_INIT_CLIENT:
3428 ret = hns3_reset_notify_init_enet(handle);
3429 break;
3430 case HNAE3_UNINIT_CLIENT:
3431 ret = hns3_reset_notify_uninit_enet(handle);
3432 break;
3433 default:
3434 break;
3435 }
3436
3437 return ret;
3438}
3439
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003440static void hns3_restore_coal(struct hns3_nic_priv *priv,
3441 struct hns3_enet_coalesce *tx,
3442 struct hns3_enet_coalesce *rx)
3443{
3444 u16 vector_num = priv->vector_num;
3445 int i;
3446
3447 for (i = 0; i < vector_num; i++) {
3448 memcpy(&priv->tqp_vector[i].tx_group.coal, tx,
3449 sizeof(struct hns3_enet_coalesce));
3450 memcpy(&priv->tqp_vector[i].rx_group.coal, rx,
3451 sizeof(struct hns3_enet_coalesce));
3452 }
3453}
3454
3455static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num,
3456 struct hns3_enet_coalesce *tx,
3457 struct hns3_enet_coalesce *rx)
Peng Li09f2af62017-12-22 12:21:41 +08003458{
3459 struct hns3_nic_priv *priv = netdev_priv(netdev);
3460 struct hnae3_handle *h = hns3_get_handle(netdev);
3461 int ret;
3462
3463 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3464 if (ret)
3465 return ret;
3466
3467 ret = hns3_get_ring_config(priv);
3468 if (ret)
3469 return ret;
3470
Yunsheng Lindd38c722018-03-09 10:37:02 +08003471 ret = hns3_nic_alloc_vector_data(priv);
3472 if (ret)
3473 goto err_alloc_vector;
3474
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003475 hns3_restore_coal(priv, tx, rx);
3476
Peng Li09f2af62017-12-22 12:21:41 +08003477 ret = hns3_nic_init_vector_data(priv);
3478 if (ret)
3479 goto err_uninit_vector;
3480
3481 ret = hns3_init_all_ring(priv);
3482 if (ret)
3483 goto err_put_ring;
3484
3485 return 0;
3486
3487err_put_ring:
3488 hns3_put_ring_config(priv);
3489err_uninit_vector:
3490 hns3_nic_uninit_vector_data(priv);
Yunsheng Lindd38c722018-03-09 10:37:02 +08003491err_alloc_vector:
3492 hns3_nic_dealloc_vector_data(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003493 return ret;
3494}
3495
3496static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3497{
3498 return (new_tqp_num / num_tc) * num_tc;
3499}
3500
3501int hns3_set_channels(struct net_device *netdev,
3502 struct ethtool_channels *ch)
3503{
3504 struct hns3_nic_priv *priv = netdev_priv(netdev);
3505 struct hnae3_handle *h = hns3_get_handle(netdev);
3506 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003507 struct hns3_enet_coalesce tx_coal, rx_coal;
Peng Li09f2af62017-12-22 12:21:41 +08003508 bool if_running = netif_running(netdev);
3509 u32 new_tqp_num = ch->combined_count;
3510 u16 org_tqp_num;
3511 int ret;
3512
3513 if (ch->rx_count || ch->tx_count)
3514 return -EINVAL;
3515
Peng Li678335a12018-03-08 19:41:54 +08003516 if (new_tqp_num > hns3_get_max_available_channels(h) ||
Peng Li09f2af62017-12-22 12:21:41 +08003517 new_tqp_num < kinfo->num_tc) {
3518 dev_err(&netdev->dev,
3519 "Change tqps fail, the tqp range is from %d to %d",
3520 kinfo->num_tc,
Peng Li678335a12018-03-08 19:41:54 +08003521 hns3_get_max_available_channels(h));
Peng Li09f2af62017-12-22 12:21:41 +08003522 return -EINVAL;
3523 }
3524
3525 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3526 if (kinfo->num_tqps == new_tqp_num)
3527 return 0;
3528
3529 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003530 hns3_nic_net_stop(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003531
3532 hns3_clear_all_ring(h);
3533
3534 ret = hns3_nic_uninit_vector_data(priv);
3535 if (ret) {
3536 dev_err(&netdev->dev,
3537 "Unbind vector with tqp fail, nothing is changed");
3538 goto open_netdev;
3539 }
3540
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003541 /* Changing the tqp num may also change the vector num,
3542 * ethtool only support setting and querying one coal
3543 * configuation for now, so save the vector 0' coal
3544 * configuation here in order to restore it.
3545 */
3546 memcpy(&tx_coal, &priv->tqp_vector[0].tx_group.coal,
3547 sizeof(struct hns3_enet_coalesce));
3548 memcpy(&rx_coal, &priv->tqp_vector[0].rx_group.coal,
3549 sizeof(struct hns3_enet_coalesce));
3550
Yunsheng Lindd38c722018-03-09 10:37:02 +08003551 hns3_nic_dealloc_vector_data(priv);
3552
Peng Li09f2af62017-12-22 12:21:41 +08003553 hns3_uninit_all_ring(priv);
Yunsheng Linec777892018-03-09 10:37:00 +08003554 hns3_put_ring_config(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003555
3556 org_tqp_num = h->kinfo.num_tqps;
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003557 ret = hns3_modify_tqp_num(netdev, new_tqp_num, &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003558 if (ret) {
Yunsheng Lin7a242b22018-03-09 10:37:04 +08003559 ret = hns3_modify_tqp_num(netdev, org_tqp_num,
3560 &tx_coal, &rx_coal);
Peng Li09f2af62017-12-22 12:21:41 +08003561 if (ret) {
3562 /* If revert to old tqp failed, fatal error occurred */
3563 dev_err(&netdev->dev,
3564 "Revert to old tqp num fail, ret=%d", ret);
3565 return ret;
3566 }
3567 dev_info(&netdev->dev,
3568 "Change tqp num fail, Revert to old tqp num");
3569 }
3570
3571open_netdev:
3572 if (if_running)
Fuyun Liang20e4bf982018-03-10 11:29:24 +08003573 hns3_nic_net_open(netdev);
Peng Li09f2af62017-12-22 12:21:41 +08003574
3575 return ret;
3576}
3577
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003578static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003579 .init_instance = hns3_client_init,
3580 .uninit_instance = hns3_client_uninit,
3581 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003582 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003583 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003584};
3585
3586/* hns3_init_module - Driver registration routine
3587 * hns3_init_module is the first routine called when the driver is
3588 * loaded. All it does is register with the PCI subsystem.
3589 */
3590static int __init hns3_init_module(void)
3591{
3592 int ret;
3593
3594 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3595 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3596
3597 client.type = HNAE3_CLIENT_KNIC;
3598 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3599 hns3_driver_name);
3600
3601 client.ops = &client_ops;
3602
3603 ret = hnae3_register_client(&client);
3604 if (ret)
3605 return ret;
3606
3607 ret = pci_register_driver(&hns3_driver);
3608 if (ret)
3609 hnae3_unregister_client(&client);
3610
3611 return ret;
3612}
3613module_init(hns3_init_module);
3614
3615/* hns3_exit_module - Driver exit cleanup routine
3616 * hns3_exit_module is called just before the driver is removed
3617 * from memory.
3618 */
3619static void __exit hns3_exit_module(void)
3620{
3621 pci_unregister_driver(&hns3_driver);
3622 hnae3_unregister_client(&client);
3623}
3624module_exit(hns3_exit_module);
3625
3626MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3627MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3628MODULE_LICENSE("GPL");
3629MODULE_ALIAS("pci:hns-nic");