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Yuval Mintzfe56b9e2015-10-26 11:02:25 +02001/* QLogic qed NIC Driver
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02002 * Copyright (c) 2015-2017 QLogic Corporation
Yuval Mintzfe56b9e2015-10-26 11:02:25 +02003 *
Mintz, Yuvale8f1cb52017-01-01 13:57:00 +02004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020031 */
32
33#ifndef _QED_MCP_H
34#define _QED_MCP_H
35
36#include <linux/types.h>
37#include <linux/delay.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020038#include <linux/slab.h>
Tomer Tayar5529bad2016-03-09 09:16:24 +020039#include <linux/spinlock.h>
Arun Easi1e128c82017-02-15 06:28:22 -080040#include <linux/qed/qed_fcoe_if.h>
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020041#include "qed_hsi.h"
Tomer Tayar5d24bcf2017-03-28 15:12:52 +030042#include "qed_dev_api.h"
Yuval Mintzfe56b9e2015-10-26 11:02:25 +020043
Yuval Mintzcc875c22015-10-26 11:02:31 +020044struct qed_mcp_link_speed_params {
45 bool autoneg;
46 u32 advertised_speeds; /* bitmask of DRV_SPEED_CAPABILITY */
47 u32 forced_speed; /* In Mb/s */
48};
49
50struct qed_mcp_link_pause_params {
51 bool autoneg;
52 bool forced_rx;
53 bool forced_tx;
54};
55
56struct qed_mcp_link_params {
57 struct qed_mcp_link_speed_params speed;
58 struct qed_mcp_link_pause_params pause;
59 u32 loopback_mode;
60};
61
62struct qed_mcp_link_capabilities {
63 u32 speed_capabilities;
sudarsana.kalluru@cavium.com34f91992017-05-04 08:15:04 -070064 bool default_speed_autoneg;
Yuval Mintzcc875c22015-10-26 11:02:31 +020065};
66
67struct qed_mcp_link_state {
68 bool link_up;
69
Manish Chopraa64b02d2016-04-26 10:56:10 -040070 u32 min_pf_rate;
71
Manish Chopra4b01e512016-04-26 10:56:09 -040072 /* Actual link speed in Mb/s */
73 u32 line_speed;
74
75 /* PF max speed in Mb/s, deduced from line_speed
76 * according to PF max bandwidth configuration.
77 */
78 u32 speed;
Yuval Mintzcc875c22015-10-26 11:02:31 +020079 bool full_duplex;
80
81 bool an;
82 bool an_complete;
83 bool parallel_detection;
84 bool pfc_enabled;
85
86#define QED_LINK_PARTNER_SPEED_1G_HD BIT(0)
87#define QED_LINK_PARTNER_SPEED_1G_FD BIT(1)
88#define QED_LINK_PARTNER_SPEED_10G BIT(2)
89#define QED_LINK_PARTNER_SPEED_20G BIT(3)
Sudarsana Reddy Kalluru054c67d2016-08-09 03:51:23 -040090#define QED_LINK_PARTNER_SPEED_25G BIT(4)
91#define QED_LINK_PARTNER_SPEED_40G BIT(5)
92#define QED_LINK_PARTNER_SPEED_50G BIT(6)
93#define QED_LINK_PARTNER_SPEED_100G BIT(7)
Yuval Mintzcc875c22015-10-26 11:02:31 +020094 u32 partner_adv_speed;
95
96 bool partner_tx_flow_ctrl_en;
97 bool partner_rx_flow_ctrl_en;
98
99#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
100#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
101#define QED_LINK_PARTNER_BOTH_PAUSE (3)
102 u8 partner_adv_pause;
103
104 bool sfp_tx_fault;
105};
106
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200107struct qed_mcp_function_info {
108 u8 pause_on_host;
109
110 enum qed_pci_personality protocol;
111
112 u8 bandwidth_min;
113 u8 bandwidth_max;
114
115 u8 mac[ETH_ALEN];
116
117 u64 wwn_port;
118 u64 wwn_node;
119
120#define QED_MCP_VLAN_UNSET (0xffff)
121 u16 ovlan;
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200122
123 u16 mtu;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200124};
125
126struct qed_mcp_nvm_common {
127 u32 offset;
128 u32 param;
129 u32 resp;
130 u32 cmd;
131};
132
133struct qed_mcp_drv_version {
134 u32 version;
135 u8 name[MCP_DRV_VER_STR_SIZE - 4];
136};
137
Sudarsana Reddy Kalluru6c754242016-08-16 10:51:03 -0400138struct qed_mcp_lan_stats {
139 u64 ucast_rx_pkts;
140 u64 ucast_tx_pkts;
141 u32 fcs_err;
142};
143
144struct qed_mcp_fcoe_stats {
145 u64 rx_pkts;
146 u64 tx_pkts;
147 u32 fcs_err;
148 u32 login_failure;
149};
150
151struct qed_mcp_iscsi_stats {
152 u64 rx_pdus;
153 u64 tx_pdus;
154 u64 rx_bytes;
155 u64 tx_bytes;
156};
157
158struct qed_mcp_rdma_stats {
159 u64 rx_pkts;
160 u64 tx_pkts;
161 u64 rx_bytes;
162 u64 tx_byts;
163};
164
165enum qed_mcp_protocol_type {
166 QED_MCP_LAN_STATS,
167 QED_MCP_FCOE_STATS,
168 QED_MCP_ISCSI_STATS,
169 QED_MCP_RDMA_STATS
170};
171
172union qed_mcp_protocol_stats {
173 struct qed_mcp_lan_stats lan_stats;
174 struct qed_mcp_fcoe_stats fcoe_stats;
175 struct qed_mcp_iscsi_stats iscsi_stats;
176 struct qed_mcp_rdma_stats rdma_stats;
177};
178
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200179enum qed_ov_eswitch {
180 QED_OV_ESWITCH_NONE,
181 QED_OV_ESWITCH_VEB,
182 QED_OV_ESWITCH_VEPA
183};
184
185enum qed_ov_client {
186 QED_OV_CLIENT_DRV,
187 QED_OV_CLIENT_USER,
188 QED_OV_CLIENT_VENDOR_SPEC
189};
190
191enum qed_ov_driver_state {
192 QED_OV_DRIVER_STATE_NOT_LOADED,
193 QED_OV_DRIVER_STATE_DISABLED,
194 QED_OV_DRIVER_STATE_ACTIVE
195};
196
197enum qed_ov_wol {
198 QED_OV_WOL_DEFAULT,
199 QED_OV_WOL_DISABLED,
200 QED_OV_WOL_ENABLED
201};
202
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200203/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200204 * @brief - returns the link params of the hw function
205 *
206 * @param p_hwfn
207 *
208 * @returns pointer to link params
209 */
210struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
211
212/**
213 * @brief - return the link state of the hw function
214 *
215 * @param p_hwfn
216 *
217 * @returns pointer to link state
218 */
219struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
220
221/**
222 * @brief - return the link capabilities of the hw function
223 *
224 * @param p_hwfn
225 *
226 * @returns pointer to link capabilities
227 */
228struct qed_mcp_link_capabilities
229 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
230
231/**
232 * @brief Request the MFW to set the the link according to 'link_input'.
233 *
234 * @param p_hwfn
235 * @param p_ptt
236 * @param b_up - raise link if `true'. Reset link if `false'.
237 *
238 * @return int
239 */
240int qed_mcp_set_link(struct qed_hwfn *p_hwfn,
241 struct qed_ptt *p_ptt,
242 bool b_up);
243
244/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200245 * @brief Get the management firmware version value
246 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300247 * @param p_hwfn
248 * @param p_ptt
249 * @param p_mfw_ver - mfw version value
250 * @param p_running_bundle_id - image id in nvram; Optional.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200251 *
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300252 * @return int - 0 - operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200253 */
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300254int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
255 struct qed_ptt *p_ptt,
256 u32 *p_mfw_ver, u32 *p_running_bundle_id);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200257
258/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200259 * @brief Get media type value of the port.
260 *
261 * @param cdev - qed dev pointer
262 * @param mfw_ver - media type value
263 *
264 * @return int -
265 * 0 - Operation was successul.
266 * -EBUSY - Operation failed
267 */
268int qed_mcp_get_media_type(struct qed_dev *cdev,
269 u32 *media_type);
270
271/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200272 * @brief General function for sending commands to the MCP
273 * mailbox. It acquire mutex lock for the entire
274 * operation, from sending the request until the MCP
275 * response. Waiting for MCP response will be checked up
276 * to 5 seconds every 5ms.
277 *
278 * @param p_hwfn - hw function
279 * @param p_ptt - PTT required for register access
280 * @param cmd - command to be sent to the MCP.
281 * @param param - Optional param
282 * @param o_mcp_resp - The MCP response code (exclude sequence).
283 * @param o_mcp_param- Optional parameter provided by the MCP
284 * response
285 * @return int - 0 - operation
286 * was successul.
287 */
288int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
289 struct qed_ptt *p_ptt,
290 u32 cmd,
291 u32 param,
292 u32 *o_mcp_resp,
293 u32 *o_mcp_param);
294
295/**
296 * @brief - drains the nig, allowing completion to pass in case of pauses.
297 * (Should be called only from sleepable context)
298 *
299 * @param p_hwfn
300 * @param p_ptt
301 */
302int qed_mcp_drain(struct qed_hwfn *p_hwfn,
303 struct qed_ptt *p_ptt);
304
305/**
Manish Chopracee4d262015-10-26 11:02:28 +0200306 * @brief Get the flash size value
307 *
308 * @param p_hwfn
309 * @param p_ptt
310 * @param p_flash_size - flash size in bytes to be filled.
311 *
312 * @return int - 0 - operation was successul.
313 */
314int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
315 struct qed_ptt *p_ptt,
316 u32 *p_flash_size);
317
318/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200319 * @brief Send driver version to MFW
320 *
321 * @param p_hwfn
322 * @param p_ptt
323 * @param version - Version value
324 * @param name - Protocol driver name
325 *
326 * @return int - 0 - operation was successul.
327 */
328int
329qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
330 struct qed_ptt *p_ptt,
331 struct qed_mcp_drv_version *p_ver);
332
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200333/**
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200334 * @brief Notify MFW about the change in base device properties
335 *
336 * @param p_hwfn
337 * @param p_ptt
338 * @param client - qed client type
339 *
340 * @return int - 0 - operation was successful.
341 */
342int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
343 struct qed_ptt *p_ptt,
344 enum qed_ov_client client);
345
346/**
347 * @brief Notify MFW about the driver state
348 *
349 * @param p_hwfn
350 * @param p_ptt
351 * @param drv_state - Driver state
352 *
353 * @return int - 0 - operation was successful.
354 */
355int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
356 struct qed_ptt *p_ptt,
357 enum qed_ov_driver_state drv_state);
358
359/**
360 * @brief Send MTU size to MFW
361 *
362 * @param p_hwfn
363 * @param p_ptt
364 * @param mtu - MTU size
365 *
366 * @return int - 0 - operation was successful.
367 */
368int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
369 struct qed_ptt *p_ptt, u16 mtu);
370
371/**
372 * @brief Send MAC address to MFW
373 *
374 * @param p_hwfn
375 * @param p_ptt
376 * @param mac - MAC address
377 *
378 * @return int - 0 - operation was successful.
379 */
380int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
381 struct qed_ptt *p_ptt, u8 *mac);
382
383/**
384 * @brief Send WOL mode to MFW
385 *
386 * @param p_hwfn
387 * @param p_ptt
388 * @param wol - WOL mode
389 *
390 * @return int - 0 - operation was successful.
391 */
392int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
393 struct qed_ptt *p_ptt,
394 enum qed_ov_wol wol);
395
396/**
Sudarsana Kalluru91420b82015-11-30 12:25:03 +0200397 * @brief Set LED status
398 *
399 * @param p_hwfn
400 * @param p_ptt
401 * @param mode - LED mode
402 *
403 * @return int - 0 - operation was successful.
404 */
405int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
406 struct qed_ptt *p_ptt,
407 enum qed_led_mode mode);
408
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400409/**
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200410 * @brief Read from nvm
411 *
412 * @param cdev
413 * @param addr - nvm offset
414 * @param p_buf - nvm read buffer
415 * @param len - buffer len
416 *
417 * @return int - 0 - operation was successful.
418 */
419int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
420
421/**
Sudarsana Reddy Kalluru03dc76c2016-04-28 20:20:52 -0400422 * @brief Bist register test
423 *
424 * @param p_hwfn - hw function
425 * @param p_ptt - PTT required for register access
426 *
427 * @return int - 0 - operation was successful.
428 */
429int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
430 struct qed_ptt *p_ptt);
431
432/**
433 * @brief Bist clock test
434 *
435 * @param p_hwfn - hw function
436 * @param p_ptt - PTT required for register access
437 *
438 * @return int - 0 - operation was successful.
439 */
440int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
441 struct qed_ptt *p_ptt);
442
Mintz, Yuval7a4b21b2016-10-31 07:14:22 +0200443/**
444 * @brief Bist nvm test - get number of images
445 *
446 * @param p_hwfn - hw function
447 * @param p_ptt - PTT required for register access
448 * @param num_images - number of images if operation was
449 * successful. 0 if not.
450 *
451 * @return int - 0 - operation was successful.
452 */
453int qed_mcp_bist_nvm_test_get_num_images(struct qed_hwfn *p_hwfn,
454 struct qed_ptt *p_ptt,
455 u32 *num_images);
456
457/**
458 * @brief Bist nvm test - get image attributes by index
459 *
460 * @param p_hwfn - hw function
461 * @param p_ptt - PTT required for register access
462 * @param p_image_att - Attributes of image
463 * @param image_index - Index of image to get information for
464 *
465 * @return int - 0 - operation was successful.
466 */
467int qed_mcp_bist_nvm_test_get_image_att(struct qed_hwfn *p_hwfn,
468 struct qed_ptt *p_ptt,
469 struct bist_nvm_image_att *p_image_att,
470 u32 image_index);
471
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200472/* Using hwfn number (and not pf_num) is required since in CMT mode,
473 * same pf_num may be used by two different hwfn
474 * TODO - this shouldn't really be in .h file, but until all fields
475 * required during hw-init will be placed in their correct place in shmem
476 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
477 */
478#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ? \
479 ((rel_pfid) | \
480 ((p_hwfn)->abs_pf_id & 1) << 3) : \
481 rel_pfid)
482#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
483
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200484#define MFW_PORT(_p_hwfn) ((_p_hwfn)->abs_pf_id % \
Tomer Tayar78cea9f2017-05-23 09:41:22 +0300485 ((_p_hwfn)->cdev->num_ports_in_engine * \
Mintz, Yuval9c79dda2017-03-14 16:23:54 +0200486 qed_device_num_engines((_p_hwfn)->cdev)))
487
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200488struct qed_mcp_info {
Tomer Tayar4ed1eea2017-03-23 15:50:15 +0200489 /* List for mailbox commands which were sent and wait for a response */
490 struct list_head cmd_list;
491
492 /* Spinlock used for protecting the access to the mailbox commands list
493 * and the sending of the commands.
494 */
495 spinlock_t cmd_lock;
Mintz, Yuval65ed2ff2017-02-20 22:43:39 +0200496
497 /* Spinlock used for syncing SW link-changes and link-changes
498 * originating from attention context.
499 */
500 spinlock_t link_lock;
Tomer Tayar5529bad2016-03-09 09:16:24 +0200501 bool block_mb_sending;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200502 u32 public_base;
503 u32 drv_mb_addr;
504 u32 mfw_mb_addr;
505 u32 port_addr;
506 u16 drv_mb_seq;
507 u16 drv_pulse_seq;
Yuval Mintzcc875c22015-10-26 11:02:31 +0200508 struct qed_mcp_link_params link_input;
509 struct qed_mcp_link_state link_output;
510 struct qed_mcp_link_capabilities link_capabilities;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200511 struct qed_mcp_function_info func_info;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200512 u8 *mfw_mb_cur;
513 u8 *mfw_mb_shadow;
514 u16 mfw_mb_length;
Tomer Tayar4ed1eea2017-03-23 15:50:15 +0200515 u32 mcp_hist;
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200516};
517
Tomer Tayar5529bad2016-03-09 09:16:24 +0200518struct qed_mcp_mb_params {
519 u32 cmd;
520 u32 param;
Tomer Tayar2f67af8c2017-03-23 15:50:16 +0200521 void *p_data_src;
522 u8 data_src_size;
523 void *p_data_dst;
524 u8 data_dst_size;
Tomer Tayar5529bad2016-03-09 09:16:24 +0200525 u32 mcp_resp;
526 u32 mcp_param;
527};
528
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200529/**
530 * @brief Initialize the interface with the MCP
531 *
532 * @param p_hwfn - HW func
533 * @param p_ptt - PTT required for register access
534 *
535 * @return int
536 */
537int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
538 struct qed_ptt *p_ptt);
539
540/**
541 * @brief Initialize the port interface with the MCP
542 *
543 * @param p_hwfn
544 * @param p_ptt
545 * Can only be called after `num_ports_in_engines' is set
546 */
547void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
548 struct qed_ptt *p_ptt);
549/**
550 * @brief Releases resources allocated during the init process.
551 *
552 * @param p_hwfn - HW func
553 * @param p_ptt - PTT required for register access
554 *
555 * @return int
556 */
557
558int qed_mcp_free(struct qed_hwfn *p_hwfn);
559
560/**
Yuval Mintzcc875c22015-10-26 11:02:31 +0200561 * @brief This function is called from the DPC context. After
562 * pointing PTT to the mfw mb, check for events sent by the MCP
563 * to the driver and ack them. In case a critical event
564 * detected, it will be handled here, otherwise the work will be
565 * queued to a sleepable work-queue.
566 *
567 * @param p_hwfn - HW function
568 * @param p_ptt - PTT required for register access
569 * @return int - 0 - operation
570 * was successul.
571 */
572int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
573 struct qed_ptt *p_ptt);
574
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300575enum qed_drv_role {
576 QED_DRV_ROLE_OS,
577 QED_DRV_ROLE_KDUMP,
578};
579
580struct qed_load_req_params {
581 /* Input params */
582 enum qed_drv_role drv_role;
583 u8 timeout_val;
584 bool avoid_eng_reset;
585 enum qed_override_force_load override_force_load;
586
587 /* Output params */
588 u32 load_code;
589};
590
Yuval Mintzcc875c22015-10-26 11:02:31 +0200591/**
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300592 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
593 * returns whether this PF is the first on the engine/port or function.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200594 *
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300595 * @param p_hwfn
596 * @param p_ptt
597 * @param p_params
598 *
599 * @return int - 0 - Operation was successful.
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200600 */
601int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
602 struct qed_ptt *p_ptt,
Tomer Tayar5d24bcf2017-03-28 15:12:52 +0300603 struct qed_load_req_params *p_params);
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200604
605/**
Tomer Tayar12263372017-03-28 15:12:50 +0300606 * @brief Sends a UNLOAD_REQ message to the MFW
607 *
608 * @param p_hwfn
609 * @param p_ptt
610 *
611 * @return int - 0 - Operation was successful.
612 */
613int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
614
615/**
616 * @brief Sends a UNLOAD_DONE message to the MFW
617 *
618 * @param p_hwfn
619 * @param p_ptt
620 *
621 * @return int - 0 - Operation was successful.
622 */
623int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
624
625/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200626 * @brief Read the MFW mailbox into Current buffer.
627 *
628 * @param p_hwfn
629 * @param p_ptt
630 */
631void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
632 struct qed_ptt *p_ptt);
633
634/**
Yuval Mintz0b55e272016-05-11 16:36:15 +0300635 * @brief Ack to mfw that driver finished FLR process for VFs
636 *
637 * @param p_hwfn
638 * @param p_ptt
639 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
640 *
641 * @param return int - 0 upon success.
642 */
643int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
644 struct qed_ptt *p_ptt, u32 *vfs_to_ack);
645
646/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200647 * @brief - calls during init to read shmem of all function-related info.
648 *
649 * @param p_hwfn
650 *
651 * @param return 0 upon success.
652 */
653int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
654 struct qed_ptt *p_ptt);
655
656/**
657 * @brief - Reset the MCP using mailbox command.
658 *
659 * @param p_hwfn
660 * @param p_ptt
661 *
662 * @param return 0 upon success.
663 */
664int qed_mcp_reset(struct qed_hwfn *p_hwfn,
665 struct qed_ptt *p_ptt);
666
667/**
Tomer Tayar41024262016-09-05 14:35:10 +0300668 * @brief - Sends an NVM read command request to the MFW to get
669 * a buffer.
670 *
671 * @param p_hwfn
672 * @param p_ptt
673 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
674 * DRV_MSG_CODE_NVM_READ_NVRAM commands
675 * @param param - [0:23] - Offset [24:31] - Size
676 * @param o_mcp_resp - MCP response
677 * @param o_mcp_param - MCP response param
678 * @param o_txn_size - Buffer size output
679 * @param o_buf - Pointer to the buffer returned by the MFW.
680 *
681 * @param return 0 upon success.
682 */
683int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
684 struct qed_ptt *p_ptt,
685 u32 cmd,
686 u32 param,
687 u32 *o_mcp_resp,
688 u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
689
690/**
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200691 * @brief indicates whether the MFW objects [under mcp_info] are accessible
692 *
693 * @param p_hwfn
694 *
695 * @return true iff MFW is running and mcp_info is initialized
696 */
697bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
Yuval Mintz1408cc1f2016-05-11 16:36:14 +0300698
699/**
700 * @brief request MFW to configure MSI-X for a VF
701 *
702 * @param p_hwfn
703 * @param p_ptt
704 * @param vf_id - absolute inside engine
705 * @param num_sbs - number of entries to request
706 *
707 * @return int
708 */
709int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
710 struct qed_ptt *p_ptt, u8 vf_id, u8 num);
711
Tomer Tayar41024262016-09-05 14:35:10 +0300712/**
713 * @brief - Halt the MCP.
714 *
715 * @param p_hwfn
716 * @param p_ptt
717 *
718 * @param return 0 upon success.
719 */
720int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
721
722/**
723 * @brief - Wake up the MCP.
724 *
725 * @param p_hwfn
726 * @param p_ptt
727 *
728 * @param return 0 upon success.
729 */
730int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
731
Manish Chopraa64b02d2016-04-26 10:56:10 -0400732int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
Manish Chopra4b01e512016-04-26 10:56:09 -0400733int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
734int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
735 struct qed_ptt *p_ptt,
736 struct qed_mcp_link_state *p_link,
737 u8 max_bw);
Manish Chopraa64b02d2016-04-26 10:56:10 -0400738int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
739 struct qed_ptt *p_ptt,
740 struct qed_mcp_link_state *p_link,
741 u8 min_bw);
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300742
Tomer Tayar41024262016-09-05 14:35:10 +0300743int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
744 struct qed_ptt *p_ptt, u32 mask_parities);
745
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200746/**
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300747 * @brief - Sets the MFW's max value for the given resource
748 *
749 * @param p_hwfn
750 * @param p_ptt
751 * @param res_id
752 * @param resc_max_val
753 * @param p_mcp_resp
754 *
755 * @return int - 0 - operation was successful.
756 */
757int
758qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
759 struct qed_ptt *p_ptt,
760 enum qed_resources res_id,
761 u32 resc_max_val, u32 *p_mcp_resp);
762
763/**
764 * @brief - Gets the MFW allocation info for the given resource
765 *
766 * @param p_hwfn
767 * @param p_ptt
768 * @param res_id
769 * @param p_mcp_resp
770 * @param p_resc_num
771 * @param p_resc_start
772 *
773 * @return int - 0 - operation was successful.
774 */
775int
776qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
777 struct qed_ptt *p_ptt,
778 enum qed_resources res_id,
779 u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
780
781/**
Sudarsana Kalluru0fefbfb2016-10-31 07:14:21 +0200782 * @brief Send eswitch mode to MFW
783 *
784 * @param p_hwfn
785 * @param p_ptt
786 * @param eswitch - eswitch mode
787 *
788 * @return int - 0 - operation was successful.
789 */
790int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
791 struct qed_ptt *p_ptt,
792 enum qed_ov_eswitch eswitch);
793
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300794#define QED_MCP_RESC_LOCK_MIN_VAL RESOURCE_DUMP
795#define QED_MCP_RESC_LOCK_MAX_VAL 31
796
797enum qed_resc_lock {
798 QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
sudarsana.kalluru@cavium.comdb82f702017-04-26 09:00:50 -0700799 QED_RESC_LOCK_PTP_PORT0,
800 QED_RESC_LOCK_PTP_PORT1,
801 QED_RESC_LOCK_PTP_PORT2,
802 QED_RESC_LOCK_PTP_PORT3,
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700803 QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
804 QED_RESC_LOCK_RESC_INVALID
Tomer Tayar9c8517c2017-03-28 15:12:55 +0300805};
Mintz, Yuval18a69e32017-03-28 15:12:53 +0300806
807/**
808 * @brief - Initiates PF FLR
809 *
810 * @param p_hwfn
811 * @param p_ptt
812 *
813 * @return int - 0 - operation was successful.
814 */
815int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
Tomer Tayar95691c92017-03-28 15:12:54 +0300816struct qed_resc_lock_params {
817 /* Resource number [valid values are 0..31] */
818 u8 resource;
819
820 /* Lock timeout value in seconds [default, none or 1..254] */
821 u8 timeout;
822#define QED_MCP_RESC_LOCK_TO_DEFAULT 0
823#define QED_MCP_RESC_LOCK_TO_NONE 255
824
825 /* Number of times to retry locking */
826 u8 retry_num;
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700827#define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT 10
Tomer Tayar95691c92017-03-28 15:12:54 +0300828
829 /* The interval in usec between retries */
830 u16 retry_interval;
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700831#define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT 10000
Tomer Tayar95691c92017-03-28 15:12:54 +0300832
833 /* Use sleep or delay between retries */
834 bool sleep_b4_retry;
835
836 /* Will be set as true if the resource is free and granted */
837 bool b_granted;
838
839 /* Will be filled with the resource owner.
840 * [0..15 = PF0-15, 16 = MFW]
841 */
842 u8 owner;
843};
844
845/**
846 * @brief Acquires MFW generic resource lock
847 *
848 * @param p_hwfn
849 * @param p_ptt
850 * @param p_params
851 *
852 * @return int - 0 - operation was successful.
853 */
854int
855qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
856 struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
857
858struct qed_resc_unlock_params {
859 /* Resource number [valid values are 0..31] */
860 u8 resource;
861
862 /* Allow to release a resource even if belongs to another PF */
863 bool b_force;
864
865 /* Will be set as true if the resource is released */
866 bool b_released;
867};
868
869/**
870 * @brief Releases MFW generic resource lock
871 *
872 * @param p_hwfn
873 * @param p_ptt
874 * @param p_params
875 *
876 * @return int - 0 - operation was successful.
877 */
878int
879qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
880 struct qed_ptt *p_ptt,
881 struct qed_resc_unlock_params *p_params);
882
sudarsana.kalluru@cavium.comf470f222017-04-26 09:00:49 -0700883/**
884 * @brief - default initialization for lock/unlock resource structs
885 *
886 * @param p_lock - lock params struct to be initialized; Can be NULL
887 * @param p_unlock - unlock params struct to be initialized; Can be NULL
888 * @param resource - the requested resource
889 * @paral b_is_permanent - disable retries & aging when set
890 */
891void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
892 struct qed_resc_unlock_params *p_unlock,
893 enum qed_resc_lock
894 resource, bool b_is_permanent);
895
Yuval Mintzfe56b9e2015-10-26 11:02:25 +0200896#endif