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Yuval Mintze712d522015-10-26 11:02:27 +02001/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
Alexander Duyckf9f082a2016-06-16 12:22:57 -070027#include <net/udp_tunnel.h>
Yuval Mintze712d522015-10-26 11:02:27 +020028#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
Ram Amranicee9fbd2016-10-01 21:59:56 +030039#include <linux/qed/qede_roce.h>
Yuval Mintze712d522015-10-26 11:02:27 +020040#include "qede.h"
41
Yuval Mintz5abd7e922016-02-24 16:52:50 +020042static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
Yuval Mintze712d522015-10-26 11:02:27 +020044
Yuval Mintz5abd7e922016-02-24 16:52:50 +020045MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
Yuval Mintze712d522015-10-26 11:02:27 +020046MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
Yuval Mintz0e7441d2016-02-24 16:52:45 +020056#define CHIP_NUM_57980S_10 0x1666
Yuval Mintze712d522015-10-26 11:02:27 +020057#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
Yuval Mintzfefb0202016-05-11 16:36:19 +030061#define CHIP_NUM_57980S_IOV 0x1664
Yuval Mintze712d522015-10-26 11:02:27 +020062
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
Yuval Mintzfefb0202016-05-11 16:36:19 +030070#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
Yuval Mintze712d522015-10-26 11:02:27 +020071#endif
72
Yuval Mintzfefb0202016-05-11 16:36:19 +030073enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
Yuval Mintze712d522015-10-26 11:02:27 +020078static const struct pci_device_id qede_pci_tbl[] = {
Yuval Mintzfefb0202016-05-11 16:36:19 +030079 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020085#ifdef CONFIG_QED_SRIOV
Yuval Mintzfefb0202016-05-11 16:36:19 +030086 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
Arnd Bergmann14b84e82016-06-01 15:29:13 +020087#endif
Yuval Mintze712d522015-10-26 11:02:27 +020088 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
Yuval Mintz29502192015-10-26 11:02:29 +020098static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200100static void qede_link_update(void *dev, struct qed_link_output *link);
Yuval Mintze712d522015-10-26 11:02:27 +0200101
Yuval Mintzfefb0202016-05-11 16:36:19 +0300102#ifdef CONFIG_QED_SRIOV
Moshe Shemesh79aab092016-09-22 12:11:15 +0300103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
104 __be16 vlan_proto)
Yuval Mintz08feecd2016-05-11 16:36:20 +0300105{
106 struct qede_dev *edev = netdev_priv(ndev);
107
108 if (vlan > 4095) {
109 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
110 return -EINVAL;
111 }
112
Moshe Shemesh79aab092016-09-22 12:11:15 +0300113 if (vlan_proto != htons(ETH_P_8021Q))
114 return -EPROTONOSUPPORT;
115
Yuval Mintz08feecd2016-05-11 16:36:20 +0300116 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
117 vlan, vf);
118
119 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
120}
121
Yuval Mintzeff16962016-05-11 16:36:21 +0300122static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
123{
124 struct qede_dev *edev = netdev_priv(ndev);
125
126 DP_VERBOSE(edev, QED_MSG_IOV,
127 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
128 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
129
130 if (!is_valid_ether_addr(mac)) {
131 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
132 return -EINVAL;
133 }
134
135 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
136}
137
Yuval Mintzfefb0202016-05-11 16:36:19 +0300138static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
139{
140 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300141 struct qed_dev_info *qed_info = &edev->dev_info.common;
142 int rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300143
144 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
145
Yuval Mintz831bfb0e2016-05-11 16:36:25 +0300146 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
147
148 /* Enable/Disable Tx switching for PF */
149 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
150 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
151 struct qed_update_vport_params params;
152
153 memset(&params, 0, sizeof(params));
154 params.vport_id = 0;
155 params.update_tx_switching_flg = 1;
156 params.tx_switching_flg = num_vfs_param ? 1 : 0;
157 edev->ops->vport_update(edev->cdev, &params);
158 }
159
160 return rc;
Yuval Mintzfefb0202016-05-11 16:36:19 +0300161}
162#endif
163
Yuval Mintze712d522015-10-26 11:02:27 +0200164static struct pci_driver qede_pci_driver = {
165 .name = "qede",
166 .id_table = qede_pci_tbl,
167 .probe = qede_probe,
168 .remove = qede_remove,
Yuval Mintzfefb0202016-05-11 16:36:19 +0300169#ifdef CONFIG_QED_SRIOV
170 .sriov_configure = qede_sriov_configure,
171#endif
Yuval Mintze712d522015-10-26 11:02:27 +0200172};
173
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400174static void qede_force_mac(void *dev, u8 *mac, bool forced)
Yuval Mintzeff16962016-05-11 16:36:21 +0300175{
176 struct qede_dev *edev = dev;
177
Yuval Mintzc3aaa402016-10-14 05:19:17 -0400178 /* MAC hints take effect only if we haven't set one already */
179 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
180 return;
181
Yuval Mintzeff16962016-05-11 16:36:21 +0300182 ether_addr_copy(edev->ndev->dev_addr, mac);
183 ether_addr_copy(edev->primary_mac, mac);
184}
185
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200186static struct qed_eth_cb_ops qede_ll_ops = {
187 {
188 .link_update = qede_link_update,
189 },
Yuval Mintzeff16962016-05-11 16:36:21 +0300190 .force_mac = qede_force_mac,
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +0200191};
192
Yuval Mintz29502192015-10-26 11:02:29 +0200193static int qede_netdev_event(struct notifier_block *this, unsigned long event,
194 void *ptr)
195{
196 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
197 struct ethtool_drvinfo drvinfo;
198 struct qede_dev *edev;
199
Ram Amranicee9fbd2016-10-01 21:59:56 +0300200 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
Yuval Mintz29502192015-10-26 11:02:29 +0200201 goto done;
202
203 /* Check whether this is a qede device */
204 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
205 goto done;
206
207 memset(&drvinfo, 0, sizeof(drvinfo));
208 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
209 if (strcmp(drvinfo.driver, "qede"))
210 goto done;
211 edev = netdev_priv(ndev);
212
Ram Amranicee9fbd2016-10-01 21:59:56 +0300213 switch (event) {
214 case NETDEV_CHANGENAME:
215 /* Notify qed of the name change */
216 if (!edev->ops || !edev->ops->common)
217 goto done;
218 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
219 break;
220 case NETDEV_CHANGEADDR:
221 edev = netdev_priv(ndev);
222 qede_roce_event_changeaddr(edev);
223 break;
224 }
Yuval Mintz29502192015-10-26 11:02:29 +0200225
226done:
227 return NOTIFY_DONE;
228}
229
230static struct notifier_block qede_netdev_notifier = {
231 .notifier_call = qede_netdev_event,
232};
233
Yuval Mintze712d522015-10-26 11:02:27 +0200234static
235int __init qede_init(void)
236{
237 int ret;
Yuval Mintze712d522015-10-26 11:02:27 +0200238
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300239 pr_info("qede_init: %s\n", version);
Yuval Mintze712d522015-10-26 11:02:27 +0200240
Rahul Verma95114342016-04-10 12:42:59 +0300241 qed_ops = qed_get_eth_ops();
Yuval Mintze712d522015-10-26 11:02:27 +0200242 if (!qed_ops) {
243 pr_notice("Failed to get qed ethtool operations\n");
244 return -EINVAL;
245 }
246
Yuval Mintz29502192015-10-26 11:02:29 +0200247 /* Must register notifier before pci ops, since we might miss
248 * interface rename after pci probe and netdev registeration.
249 */
250 ret = register_netdevice_notifier(&qede_netdev_notifier);
251 if (ret) {
252 pr_notice("Failed to register netdevice_notifier\n");
253 qed_put_eth_ops();
254 return -EINVAL;
255 }
256
Yuval Mintze712d522015-10-26 11:02:27 +0200257 ret = pci_register_driver(&qede_pci_driver);
258 if (ret) {
259 pr_notice("Failed to register driver\n");
Yuval Mintz29502192015-10-26 11:02:29 +0200260 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200261 qed_put_eth_ops();
262 return -EINVAL;
263 }
264
265 return 0;
266}
267
268static void __exit qede_cleanup(void)
269{
Yuval Mintz525ef5c2016-08-15 10:42:45 +0300270 if (debug & QED_LOG_INFO_MASK)
271 pr_info("qede_cleanup called\n");
Yuval Mintze712d522015-10-26 11:02:27 +0200272
Yuval Mintz29502192015-10-26 11:02:29 +0200273 unregister_netdevice_notifier(&qede_netdev_notifier);
Yuval Mintze712d522015-10-26 11:02:27 +0200274 pci_unregister_driver(&qede_pci_driver);
275 qed_put_eth_ops();
276}
277
278module_init(qede_init);
279module_exit(qede_cleanup);
280
281/* -------------------------------------------------------------------------
Yuval Mintz29502192015-10-26 11:02:29 +0200282 * START OF FAST-PATH
283 * -------------------------------------------------------------------------
284 */
285
286/* Unmap the data and free skb */
287static int qede_free_tx_pkt(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300288 struct qede_tx_queue *txq, int *len)
Yuval Mintz29502192015-10-26 11:02:29 +0200289{
290 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
291 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
292 struct eth_tx_1st_bd *first_bd;
293 struct eth_tx_bd *tx_data_bd;
294 int bds_consumed = 0;
295 int nbds;
296 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
297 int i, split_bd_len = 0;
298
299 if (unlikely(!skb)) {
300 DP_ERR(edev,
301 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
302 idx, txq->sw_tx_cons, txq->sw_tx_prod);
303 return -1;
304 }
305
306 *len = skb->len;
307
308 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
309
310 bds_consumed++;
311
312 nbds = first_bd->data.nbds;
313
314 if (data_split) {
315 struct eth_tx_bd *split = (struct eth_tx_bd *)
316 qed_chain_consume(&txq->tx_pbl);
317 split_bd_len = BD_UNMAP_LEN(split);
318 bds_consumed++;
319 }
320 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
321 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
322
323 /* Unmap the data of the skb frags */
324 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
325 tx_data_bd = (struct eth_tx_bd *)
326 qed_chain_consume(&txq->tx_pbl);
327 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
328 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
329 }
330
331 while (bds_consumed++ < nbds)
332 qed_chain_consume(&txq->tx_pbl);
333
334 /* Free skb */
335 dev_kfree_skb_any(skb);
336 txq->sw_tx_ring[idx].skb = NULL;
337 txq->sw_tx_ring[idx].flags = 0;
338
339 return 0;
340}
341
342/* Unmap the data and free skb when mapping failed during start_xmit */
343static void qede_free_failed_tx_pkt(struct qede_dev *edev,
344 struct qede_tx_queue *txq,
345 struct eth_tx_1st_bd *first_bd,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300346 int nbd, bool data_split)
Yuval Mintz29502192015-10-26 11:02:29 +0200347{
348 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
349 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
350 struct eth_tx_bd *tx_data_bd;
351 int i, split_bd_len = 0;
352
353 /* Return prod to its position before this skb was handled */
354 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300355 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200356
357 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
358
359 if (data_split) {
360 struct eth_tx_bd *split = (struct eth_tx_bd *)
361 qed_chain_produce(&txq->tx_pbl);
362 split_bd_len = BD_UNMAP_LEN(split);
363 nbd--;
364 }
365
366 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
367 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
368
369 /* Unmap the data of the skb frags */
370 for (i = 0; i < nbd; i++) {
371 tx_data_bd = (struct eth_tx_bd *)
372 qed_chain_produce(&txq->tx_pbl);
373 if (tx_data_bd->nbytes)
374 dma_unmap_page(&edev->pdev->dev,
375 BD_UNMAP_ADDR(tx_data_bd),
376 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
377 }
378
379 /* Return again prod to its position before this skb was handled */
380 qed_chain_set_prod(&txq->tx_pbl,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300381 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +0200382
383 /* Free skb */
384 dev_kfree_skb_any(skb);
385 txq->sw_tx_ring[idx].skb = NULL;
386 txq->sw_tx_ring[idx].flags = 0;
387}
388
389static u32 qede_xmit_type(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300390 struct sk_buff *skb, int *ipv6_ext)
Yuval Mintz29502192015-10-26 11:02:29 +0200391{
392 u32 rc = XMIT_L4_CSUM;
393 __be16 l3_proto;
394
395 if (skb->ip_summed != CHECKSUM_PARTIAL)
396 return XMIT_PLAIN;
397
398 l3_proto = vlan_get_protocol(skb);
399 if (l3_proto == htons(ETH_P_IPV6) &&
400 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
401 *ipv6_ext = 1;
402
Manish Chopraa1502412016-10-14 05:19:18 -0400403 if (skb->encapsulation) {
Manish Chopra14db81d2016-04-14 01:38:33 -0400404 rc |= XMIT_ENC;
Manish Chopraa1502412016-10-14 05:19:18 -0400405 if (skb_is_gso(skb)) {
406 unsigned short gso_type = skb_shinfo(skb)->gso_type;
407
408 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
409 (gso_type & SKB_GSO_GRE_CSUM))
410 rc |= XMIT_ENC_GSO_L4_CSUM;
411
412 rc |= XMIT_LSO;
413 return rc;
414 }
415 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400416
Yuval Mintz29502192015-10-26 11:02:29 +0200417 if (skb_is_gso(skb))
418 rc |= XMIT_LSO;
419
420 return rc;
421}
422
423static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
424 struct eth_tx_2nd_bd *second_bd,
425 struct eth_tx_3rd_bd *third_bd)
426{
427 u8 l4_proto;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500428 u16 bd2_bits1 = 0, bd2_bits2 = 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200429
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500430 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200431
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500432 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
Yuval Mintz29502192015-10-26 11:02:29 +0200433 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
434 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
435
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500436 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
Yuval Mintz29502192015-10-26 11:02:29 +0200437 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
438
439 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
440 l4_proto = ipv6_hdr(skb)->nexthdr;
441 else
442 l4_proto = ip_hdr(skb)->protocol;
443
444 if (l4_proto == IPPROTO_UDP)
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500445 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200446
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500447 if (third_bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200448 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500449 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
450 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
451 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
Yuval Mintz29502192015-10-26 11:02:29 +0200452
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500453 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
Yuval Mintz29502192015-10-26 11:02:29 +0200454 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
455}
456
457static int map_frag_to_bd(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300458 skb_frag_t *frag, struct eth_tx_bd *bd)
Yuval Mintz29502192015-10-26 11:02:29 +0200459{
460 dma_addr_t mapping;
461
462 /* Map skb non-linear frag data for DMA */
463 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300464 skb_frag_size(frag), DMA_TO_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +0200465 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
466 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
467 return -ENOMEM;
468 }
469
470 /* Setup the data pointer of the frag data */
471 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
472
473 return 0;
474}
475
Manish Chopra14db81d2016-04-14 01:38:33 -0400476static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
477{
478 if (is_encap_pkt)
479 return (skb_inner_transport_header(skb) +
480 inner_tcp_hdrlen(skb) - skb->data);
481 else
482 return (skb_transport_header(skb) +
483 tcp_hdrlen(skb) - skb->data);
484}
485
Yuval Mintzb1199b12016-02-24 16:52:46 +0200486/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
487#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
488static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
489 u8 xmit_type)
490{
491 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
492
493 if (xmit_type & XMIT_LSO) {
494 int hlen;
495
Manish Chopra14db81d2016-04-14 01:38:33 -0400496 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
Yuval Mintzb1199b12016-02-24 16:52:46 +0200497
498 /* linear payload would require its own BD */
499 if (skb_headlen(skb) > hlen)
500 allowed_frags--;
501 }
502
503 return (skb_shinfo(skb)->nr_frags > allowed_frags);
504}
505#endif
506
Manish Chopra312e0672016-06-30 02:35:20 -0400507static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
508{
509 /* wmb makes sure that the BDs data is updated before updating the
510 * producer, otherwise FW may read old data from the BDs.
511 */
512 wmb();
513 barrier();
514 writel(txq->tx_db.raw, txq->doorbell_addr);
515
516 /* mmiowb is needed to synchronize doorbell writes from more than one
517 * processor. It guarantees that the write arrives to the device before
518 * the queue lock is released and another start_xmit is called (possibly
519 * on another CPU). Without this barrier, the next doorbell can bypass
520 * this doorbell. This is applicable to IA64/Altix systems.
521 */
522 mmiowb();
523}
524
Yuval Mintz29502192015-10-26 11:02:29 +0200525/* Main transmit function */
Yuval Mintz1a635e42016-08-15 10:42:43 +0300526static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
527 struct net_device *ndev)
Yuval Mintz29502192015-10-26 11:02:29 +0200528{
529 struct qede_dev *edev = netdev_priv(ndev);
530 struct netdev_queue *netdev_txq;
531 struct qede_tx_queue *txq;
532 struct eth_tx_1st_bd *first_bd;
533 struct eth_tx_2nd_bd *second_bd = NULL;
534 struct eth_tx_3rd_bd *third_bd = NULL;
535 struct eth_tx_bd *tx_data_bd = NULL;
536 u16 txq_index;
537 u8 nbd = 0;
538 dma_addr_t mapping;
539 int rc, frag_idx = 0, ipv6_ext = 0;
540 u8 xmit_type;
541 u16 idx;
542 u16 hlen;
Dan Carpenter810810f2016-05-05 16:21:30 +0300543 bool data_split = false;
Yuval Mintz29502192015-10-26 11:02:29 +0200544
545 /* Get tx-queue context and netdev index */
546 txq_index = skb_get_queue_mapping(skb);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -0400547 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +0200548 txq = QEDE_TX_QUEUE(edev, txq_index);
549 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
550
Yuval Mintz1a635e42016-08-15 10:42:43 +0300551 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
Yuval Mintz29502192015-10-26 11:02:29 +0200552
553 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
554
Yuval Mintzb1199b12016-02-24 16:52:46 +0200555#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
556 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
557 if (skb_linearize(skb)) {
558 DP_NOTICE(edev,
559 "SKB linearization failed - silently dropping this SKB\n");
560 dev_kfree_skb_any(skb);
561 return NETDEV_TX_OK;
562 }
563 }
564#endif
565
Yuval Mintz29502192015-10-26 11:02:29 +0200566 /* Fill the entry in the SW ring and the BDs in the FW ring */
567 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
568 txq->sw_tx_ring[idx].skb = skb;
569 first_bd = (struct eth_tx_1st_bd *)
570 qed_chain_produce(&txq->tx_pbl);
571 memset(first_bd, 0, sizeof(*first_bd));
572 first_bd->data.bd_flags.bitfields =
573 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
574
575 /* Map skb linear data for DMA and set in the first BD */
576 mapping = dma_map_single(&edev->pdev->dev, skb->data,
577 skb_headlen(skb), DMA_TO_DEVICE);
578 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
579 DP_NOTICE(edev, "SKB mapping failed\n");
580 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
Manish Chopra312e0672016-06-30 02:35:20 -0400581 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200582 return NETDEV_TX_OK;
583 }
584 nbd++;
585 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
586
587 /* In case there is IPv6 with extension headers or LSO we need 2nd and
588 * 3rd BDs.
589 */
590 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
591 second_bd = (struct eth_tx_2nd_bd *)
592 qed_chain_produce(&txq->tx_pbl);
593 memset(second_bd, 0, sizeof(*second_bd));
594
595 nbd++;
596 third_bd = (struct eth_tx_3rd_bd *)
597 qed_chain_produce(&txq->tx_pbl);
598 memset(third_bd, 0, sizeof(*third_bd));
599
600 nbd++;
601 /* We need to fill in additional data in second_bd... */
602 tx_data_bd = (struct eth_tx_bd *)second_bd;
603 }
604
605 if (skb_vlan_tag_present(skb)) {
606 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
607 first_bd->data.bd_flags.bitfields |=
608 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
609 }
610
611 /* Fill the parsing flags & params according to the requested offload */
612 if (xmit_type & XMIT_L4_CSUM) {
613 /* We don't re-calculate IP checksum as it is already done by
614 * the upper stack
615 */
616 first_bd->data.bd_flags.bitfields |=
617 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
618
Manish Chopra14db81d2016-04-14 01:38:33 -0400619 if (xmit_type & XMIT_ENC) {
620 first_bd->data.bd_flags.bitfields |=
621 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300622 first_bd->data.bitfields |=
623 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
Manish Chopra14db81d2016-04-14 01:38:33 -0400624 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500625
Yuval Mintzd8c2c7e2016-08-22 13:25:11 +0300626 /* Legacy FW had flipped behavior in regard to this bit -
627 * I.e., needed to set to prevent FW from touching encapsulated
628 * packets when it didn't need to.
629 */
630 if (unlikely(txq->is_legacy))
631 first_bd->data.bitfields ^=
632 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
633
Yuval Mintz29502192015-10-26 11:02:29 +0200634 /* If the packet is IPv6 with extension header, indicate that
635 * to FW and pass few params, since the device cracker doesn't
636 * support parsing IPv6 with extension header/s.
637 */
638 if (unlikely(ipv6_ext))
639 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
640 }
641
642 if (xmit_type & XMIT_LSO) {
643 first_bd->data.bd_flags.bitfields |=
644 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
645 third_bd->data.lso_mss =
646 cpu_to_le16(skb_shinfo(skb)->gso_size);
647
Manish Chopra14db81d2016-04-14 01:38:33 -0400648 if (unlikely(xmit_type & XMIT_ENC)) {
649 first_bd->data.bd_flags.bitfields |=
650 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
Manish Chopraa1502412016-10-14 05:19:18 -0400651
652 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
653 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
654
655 first_bd->data.bd_flags.bitfields |= 1 << tmp;
656 }
Manish Chopra14db81d2016-04-14 01:38:33 -0400657 hlen = qede_get_skb_hlen(skb, true);
658 } else {
659 first_bd->data.bd_flags.bitfields |=
660 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
661 hlen = qede_get_skb_hlen(skb, false);
662 }
Yuval Mintz29502192015-10-26 11:02:29 +0200663
664 /* @@@TBD - if will not be removed need to check */
665 third_bd->data.bitfields |=
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500666 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
Yuval Mintz29502192015-10-26 11:02:29 +0200667
668 /* Make life easier for FW guys who can't deal with header and
669 * data on same BD. If we need to split, use the second bd...
670 */
671 if (unlikely(skb_headlen(skb) > hlen)) {
672 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
673 "TSO split header size is %d (%x:%x)\n",
674 first_bd->nbytes, first_bd->addr.hi,
675 first_bd->addr.lo);
676
677 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
678 le32_to_cpu(first_bd->addr.lo)) +
679 hlen;
680
681 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
682 le16_to_cpu(first_bd->nbytes) -
683 hlen);
684
685 /* this marks the BD as one that has no
686 * individual mapping
687 */
688 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
689
690 first_bd->nbytes = cpu_to_le16(hlen);
691
692 tx_data_bd = (struct eth_tx_bd *)third_bd;
693 data_split = true;
694 }
Yuval Mintz351a4ded2016-06-02 10:23:29 +0300695 } else {
696 first_bd->data.bitfields |=
697 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
698 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
Yuval Mintz29502192015-10-26 11:02:29 +0200699 }
700
701 /* Handle fragmented skb */
702 /* special handle for frags inside 2nd and 3rd bds.. */
703 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
704 rc = map_frag_to_bd(edev,
705 &skb_shinfo(skb)->frags[frag_idx],
706 tx_data_bd);
707 if (rc) {
708 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
709 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400710 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200711 return NETDEV_TX_OK;
712 }
713
714 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
715 tx_data_bd = (struct eth_tx_bd *)third_bd;
716 else
717 tx_data_bd = NULL;
718
719 frag_idx++;
720 }
721
722 /* map last frags into 4th, 5th .... */
723 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
724 tx_data_bd = (struct eth_tx_bd *)
725 qed_chain_produce(&txq->tx_pbl);
726
727 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
728
729 rc = map_frag_to_bd(edev,
730 &skb_shinfo(skb)->frags[frag_idx],
731 tx_data_bd);
732 if (rc) {
733 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
734 data_split);
Manish Chopra312e0672016-06-30 02:35:20 -0400735 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200736 return NETDEV_TX_OK;
737 }
738 }
739
740 /* update the first BD with the actual num BDs */
741 first_bd->data.nbds = nbd;
742
743 netdev_tx_sent_queue(netdev_txq, skb->len);
744
745 skb_tx_timestamp(skb);
746
747 /* Advance packet producer only before sending the packet since mapping
748 * of pages may fail.
749 */
750 txq->sw_tx_prod++;
751
752 /* 'next page' entries are counted in the producer value */
753 txq->tx_db.data.bd_prod =
754 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
755
Yuval Mintz039a3922016-08-16 18:40:18 +0300756 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
Manish Chopra312e0672016-06-30 02:35:20 -0400757 qede_update_tx_producer(txq);
Yuval Mintz29502192015-10-26 11:02:29 +0200758
759 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
760 < (MAX_SKB_FRAGS + 1))) {
Yuval Mintz039a3922016-08-16 18:40:18 +0300761 if (skb->xmit_more)
762 qede_update_tx_producer(txq);
763
Yuval Mintz29502192015-10-26 11:02:29 +0200764 netif_tx_stop_queue(netdev_txq);
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400765 txq->stopped_cnt++;
Yuval Mintz29502192015-10-26 11:02:29 +0200766 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
767 "Stop queue was called\n");
768 /* paired memory barrier is in qede_tx_int(), we have to keep
769 * ordering of set_bit() in netif_tx_stop_queue() and read of
770 * fp->bd_tx_cons
771 */
772 smp_mb();
773
774 if (qed_chain_get_elem_left(&txq->tx_pbl)
775 >= (MAX_SKB_FRAGS + 1) &&
776 (edev->state == QEDE_STATE_OPEN)) {
777 netif_tx_wake_queue(netdev_txq);
778 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
779 "Wake queue was called\n");
780 }
781 }
782
783 return NETDEV_TX_OK;
784}
785
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400786int qede_txq_has_work(struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200787{
788 u16 hw_bd_cons;
789
790 /* Tell compiler that consumer and producer can change */
791 barrier();
792 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
793 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
794 return 0;
795
796 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
797}
798
Yuval Mintz1a635e42016-08-15 10:42:43 +0300799static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +0200800{
801 struct netdev_queue *netdev_txq;
802 u16 hw_bd_cons;
803 unsigned int pkts_compl = 0, bytes_compl = 0;
804 int rc;
805
806 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
807
808 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
809 barrier();
810
811 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
812 int len = 0;
813
814 rc = qede_free_tx_pkt(edev, txq, &len);
815 if (rc) {
816 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
817 hw_bd_cons,
818 qed_chain_get_cons_idx(&txq->tx_pbl));
819 break;
820 }
821
822 bytes_compl += len;
823 pkts_compl++;
824 txq->sw_tx_cons++;
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -0400825 txq->xmit_pkts++;
Yuval Mintz29502192015-10-26 11:02:29 +0200826 }
827
828 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
829
830 /* Need to make the tx_bd_cons update visible to start_xmit()
831 * before checking for netif_tx_queue_stopped(). Without the
832 * memory barrier, there is a small possibility that
833 * start_xmit() will miss it and cause the queue to be stopped
834 * forever.
835 * On the other hand we need an rmb() here to ensure the proper
836 * ordering of bit testing in the following
837 * netif_tx_queue_stopped(txq) call.
838 */
839 smp_mb();
840
841 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
842 /* Taking tx_lock is needed to prevent reenabling the queue
843 * while it's empty. This could have happen if rx_action() gets
844 * suspended in qede_tx_int() after the condition before
845 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
846 *
847 * stops the queue->sees fresh tx_bd_cons->releases the queue->
848 * sends some packets consuming the whole queue again->
849 * stops the queue
850 */
851
852 __netif_tx_lock(netdev_txq, smp_processor_id());
853
854 if ((netif_tx_queue_stopped(netdev_txq)) &&
855 (edev->state == QEDE_STATE_OPEN) &&
856 (qed_chain_get_elem_left(&txq->tx_pbl)
857 >= (MAX_SKB_FRAGS + 1))) {
858 netif_tx_wake_queue(netdev_txq);
859 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
860 "Wake queue was called\n");
861 }
862
863 __netif_tx_unlock(netdev_txq);
864 }
865
866 return 0;
867}
868
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400869bool qede_has_rx_work(struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +0200870{
871 u16 hw_comp_cons, sw_comp_cons;
872
873 /* Tell compiler that status block fields can change */
874 barrier();
875
876 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
877 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
878
879 return hw_comp_cons != sw_comp_cons;
880}
881
882static bool qede_has_tx_work(struct qede_fastpath *fp)
883{
884 u8 tc;
885
886 for (tc = 0; tc < fp->edev->num_tc; tc++)
887 if (qede_txq_has_work(&fp->txqs[tc]))
888 return true;
889 return false;
890}
891
Manish Chopraf86af2d2016-04-20 03:03:27 -0400892static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
893{
894 qed_chain_consume(&rxq->rx_bd_ring);
895 rxq->sw_rx_cons++;
896}
897
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500898/* This function reuses the buffer(from an offset) from
899 * consumer index to producer index in the bd ring
Yuval Mintz29502192015-10-26 11:02:29 +0200900 */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500901static inline void qede_reuse_page(struct qede_dev *edev,
902 struct qede_rx_queue *rxq,
903 struct sw_rx_data *curr_cons)
Yuval Mintz29502192015-10-26 11:02:29 +0200904{
Yuval Mintz29502192015-10-26 11:02:29 +0200905 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500906 struct sw_rx_data *curr_prod;
907 dma_addr_t new_mapping;
Yuval Mintz29502192015-10-26 11:02:29 +0200908
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500909 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
910 *curr_prod = *curr_cons;
Yuval Mintz29502192015-10-26 11:02:29 +0200911
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500912 new_mapping = curr_prod->mapping + curr_prod->page_offset;
Yuval Mintz29502192015-10-26 11:02:29 +0200913
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500914 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
915 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
916
Yuval Mintz29502192015-10-26 11:02:29 +0200917 rxq->sw_rx_prod++;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500918 curr_cons->data = NULL;
919}
920
Manish Chopraf86af2d2016-04-20 03:03:27 -0400921/* In case of allocation failures reuse buffers
922 * from consumer index to produce buffers for firmware
923 */
Sudarsana Reddy Kalluru16f46bf2016-04-28 20:20:54 -0400924void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
925 struct qede_dev *edev, u8 count)
Manish Chopraf86af2d2016-04-20 03:03:27 -0400926{
927 struct sw_rx_data *curr_cons;
928
929 for (; count > 0; count--) {
930 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
931 qede_reuse_page(edev, rxq, curr_cons);
932 qede_rx_bd_ring_consume(rxq);
933 }
934}
935
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500936static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
937 struct qede_rx_queue *rxq,
938 struct sw_rx_data *curr_cons)
939{
940 /* Move to the next segment in the page */
941 curr_cons->page_offset += rxq->rx_buf_seg_size;
942
943 if (curr_cons->page_offset == PAGE_SIZE) {
Manish Chopraf86af2d2016-04-20 03:03:27 -0400944 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
945 /* Since we failed to allocate new buffer
946 * current buffer can be used again.
947 */
948 curr_cons->page_offset -= rxq->rx_buf_seg_size;
949
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500950 return -ENOMEM;
Manish Chopraf86af2d2016-04-20 03:03:27 -0400951 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500952
953 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
954 PAGE_SIZE, DMA_FROM_DEVICE);
955 } else {
956 /* Increment refcount of the page as we don't want
957 * network stack to take the ownership of the page
958 * which can be recycled multiple times by the driver.
959 */
Joonsoo Kim6d061f92016-05-19 17:10:46 -0700960 page_ref_inc(curr_cons->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -0500961 qede_reuse_page(edev, rxq, curr_cons);
962 }
963
964 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +0200965}
966
967static inline void qede_update_rx_prod(struct qede_dev *edev,
968 struct qede_rx_queue *rxq)
969{
970 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
971 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
972 struct eth_rx_prod_data rx_prods = {0};
973
974 /* Update producers */
975 rx_prods.bd_prod = cpu_to_le16(bd_prod);
976 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
977
978 /* Make sure that the BD and SGE data is updated before updating the
979 * producers since FW might read the BD/SGE right after the producer
980 * is updated.
981 */
982 wmb();
983
984 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
985 (u32 *)&rx_prods);
986
987 /* mmiowb is needed to synchronize doorbell writes from more than one
988 * processor. It guarantees that the write arrives to the device before
989 * the napi lock is released and another qede_poll is called (possibly
990 * on another CPU). Without this barrier, the next doorbell can bypass
991 * this doorbell. This is applicable to IA64/Altix systems.
992 */
993 mmiowb();
994}
995
996static u32 qede_get_rxhash(struct qede_dev *edev,
997 u8 bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +0300998 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
Yuval Mintz29502192015-10-26 11:02:29 +0200999{
1000 enum rss_hash_type htype;
1001
1002 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
1003
1004 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
1005 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
1006 (htype == RSS_HASH_TYPE_IPV6)) ?
1007 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
1008 return le32_to_cpu(rss_hash);
1009 }
1010 *rxhash_type = PKT_HASH_TYPE_NONE;
1011 return 0;
1012}
1013
1014static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
1015{
1016 skb_checksum_none_assert(skb);
1017
1018 if (csum_flag & QEDE_CSUM_UNNECESSARY)
1019 skb->ip_summed = CHECKSUM_UNNECESSARY;
Manish Chopra14db81d2016-04-14 01:38:33 -04001020
1021 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
1022 skb->csum_level = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02001023}
1024
1025static inline void qede_skb_receive(struct qede_dev *edev,
1026 struct qede_fastpath *fp,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001027 struct sk_buff *skb, u16 vlan_tag)
Yuval Mintz29502192015-10-26 11:02:29 +02001028{
1029 if (vlan_tag)
Yuval Mintz1a635e42016-08-15 10:42:43 +03001030 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
Yuval Mintz29502192015-10-26 11:02:29 +02001031
1032 napi_gro_receive(&fp->napi, skb);
1033}
1034
Manish Chopra55482ed2016-03-04 12:35:06 -05001035static void qede_set_gro_params(struct qede_dev *edev,
1036 struct sk_buff *skb,
1037 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1038{
1039 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1040
1041 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1042 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1043 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1044 else
1045 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1046
1047 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1048 cqe->header_len;
1049}
1050
1051static int qede_fill_frag_skb(struct qede_dev *edev,
1052 struct qede_rx_queue *rxq,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001053 u8 tpa_agg_index, u16 len_on_bd)
Manish Chopra55482ed2016-03-04 12:35:06 -05001054{
1055 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1056 NUM_RX_BDS_MAX];
1057 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1058 struct sk_buff *skb = tpa_info->skb;
1059
1060 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1061 goto out;
1062
1063 /* Add one frag and update the appropriate fields in the skb */
1064 skb_fill_page_desc(skb, tpa_info->frag_id++,
1065 current_bd->data, current_bd->page_offset,
1066 len_on_bd);
1067
1068 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001069 /* Incr page ref count to reuse on allocation failure
1070 * so that it doesn't get freed while freeing SKB.
1071 */
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001072 page_ref_inc(current_bd->data);
Manish Chopra55482ed2016-03-04 12:35:06 -05001073 goto out;
1074 }
1075
1076 qed_chain_consume(&rxq->rx_bd_ring);
1077 rxq->sw_rx_cons++;
1078
1079 skb->data_len += len_on_bd;
1080 skb->truesize += rxq->rx_buf_seg_size;
1081 skb->len += len_on_bd;
1082
1083 return 0;
1084
1085out:
Manish Chopraf86af2d2016-04-20 03:03:27 -04001086 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1087 qede_recycle_rx_bd_ring(rxq, edev, 1);
Manish Chopra55482ed2016-03-04 12:35:06 -05001088 return -ENOMEM;
1089}
1090
1091static void qede_tpa_start(struct qede_dev *edev,
1092 struct qede_rx_queue *rxq,
1093 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1094{
1095 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1096 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1097 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1098 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1099 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1100 struct sw_rx_data *sw_rx_data_cons;
1101 struct sw_rx_data *sw_rx_data_prod;
1102 enum pkt_hash_types rxhash_type;
1103 u32 rxhash;
1104
1105 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1106 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1107
1108 /* Use pre-allocated replacement buffer - we can't release the agg.
1109 * start until its over and we don't want to risk allocation failing
1110 * here, so re-allocate when aggregation will be over.
1111 */
Manish Chopra09ec8e72016-05-18 07:43:57 -04001112 sw_rx_data_prod->mapping = replace_buf->mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05001113
1114 sw_rx_data_prod->data = replace_buf->data;
1115 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1116 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1117 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1118
1119 rxq->sw_rx_prod++;
1120
1121 /* move partial skb from cons to pool (don't unmap yet)
1122 * save mapping, incase we drop the packet later on.
1123 */
1124 tpa_info->start_buf = *sw_rx_data_cons;
1125 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1126 le32_to_cpu(rx_bd_cons->addr.lo));
1127
1128 tpa_info->start_buf_mapping = mapping;
1129 rxq->sw_rx_cons++;
1130
1131 /* set tpa state to start only if we are able to allocate skb
1132 * for this aggregation, otherwise mark as error and aggregation will
1133 * be dropped
1134 */
1135 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1136 le16_to_cpu(cqe->len_on_first_bd));
1137 if (unlikely(!tpa_info->skb)) {
Manish Chopraf86af2d2016-04-20 03:03:27 -04001138 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
Manish Chopra55482ed2016-03-04 12:35:06 -05001139 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001140 goto cons_buf;
Manish Chopra55482ed2016-03-04 12:35:06 -05001141 }
1142
1143 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1144 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1145
1146 /* Start filling in the aggregation info */
1147 tpa_info->frag_id = 0;
1148 tpa_info->agg_state = QEDE_AGG_STATE_START;
1149
1150 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1151 cqe->rss_hash, &rxhash_type);
1152 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1153 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1154 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1155 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1156 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1157 else
1158 tpa_info->vlan_tag = 0;
1159
1160 /* This is needed in order to enable forwarding support */
1161 qede_set_gro_params(edev, tpa_info->skb, cqe);
1162
Manish Chopraf86af2d2016-04-20 03:03:27 -04001163cons_buf: /* We still need to handle bd_len_list to consume buffers */
Manish Chopra55482ed2016-03-04 12:35:06 -05001164 if (likely(cqe->ext_bd_len_list[0]))
1165 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1166 le16_to_cpu(cqe->ext_bd_len_list[0]));
1167
1168 if (unlikely(cqe->ext_bd_len_list[1])) {
1169 DP_ERR(edev,
1170 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1171 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1172 }
1173}
1174
Manish Chopra88f09bd2016-03-08 04:09:44 -05001175#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001176static void qede_gro_ip_csum(struct sk_buff *skb)
1177{
1178 const struct iphdr *iph = ip_hdr(skb);
1179 struct tcphdr *th;
1180
Manish Chopra55482ed2016-03-04 12:35:06 -05001181 skb_set_transport_header(skb, sizeof(struct iphdr));
1182 th = tcp_hdr(skb);
1183
1184 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1185 iph->saddr, iph->daddr, 0);
1186
1187 tcp_gro_complete(skb);
1188}
1189
1190static void qede_gro_ipv6_csum(struct sk_buff *skb)
1191{
1192 struct ipv6hdr *iph = ipv6_hdr(skb);
1193 struct tcphdr *th;
1194
Manish Chopra55482ed2016-03-04 12:35:06 -05001195 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1196 th = tcp_hdr(skb);
1197
1198 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1199 &iph->saddr, &iph->daddr, 0);
1200 tcp_gro_complete(skb);
1201}
Manish Chopra88f09bd2016-03-08 04:09:44 -05001202#endif
Manish Chopra55482ed2016-03-04 12:35:06 -05001203
1204static void qede_gro_receive(struct qede_dev *edev,
1205 struct qede_fastpath *fp,
1206 struct sk_buff *skb,
1207 u16 vlan_tag)
1208{
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001209 /* FW can send a single MTU sized packet from gro flow
1210 * due to aggregation timeout/last segment etc. which
1211 * is not expected to be a gro packet. If a skb has zero
1212 * frags then simply push it in the stack as non gso skb.
1213 */
1214 if (unlikely(!skb->data_len)) {
1215 skb_shinfo(skb)->gso_type = 0;
1216 skb_shinfo(skb)->gso_size = 0;
1217 goto send_skb;
1218 }
1219
Manish Chopra88f09bd2016-03-08 04:09:44 -05001220#ifdef CONFIG_INET
Manish Chopra55482ed2016-03-04 12:35:06 -05001221 if (skb_shinfo(skb)->gso_size) {
Manish Chopraaad94c02016-04-20 03:03:28 -04001222 skb_set_network_header(skb, 0);
1223
Manish Chopra55482ed2016-03-04 12:35:06 -05001224 switch (skb->protocol) {
1225 case htons(ETH_P_IP):
1226 qede_gro_ip_csum(skb);
1227 break;
1228 case htons(ETH_P_IPV6):
1229 qede_gro_ipv6_csum(skb);
1230 break;
1231 default:
1232 DP_ERR(edev,
1233 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1234 ntohs(skb->protocol));
1235 }
1236 }
Manish Chopra88f09bd2016-03-08 04:09:44 -05001237#endif
Manish Chopraee2fa8e2016-04-20 03:03:29 -04001238
1239send_skb:
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001240 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Manish Chopra55482ed2016-03-04 12:35:06 -05001241 qede_skb_receive(edev, fp, skb, vlan_tag);
1242}
1243
1244static inline void qede_tpa_cont(struct qede_dev *edev,
1245 struct qede_rx_queue *rxq,
1246 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1247{
1248 int i;
1249
1250 for (i = 0; cqe->len_list[i]; i++)
1251 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1252 le16_to_cpu(cqe->len_list[i]));
1253
1254 if (unlikely(i > 1))
1255 DP_ERR(edev,
1256 "Strange - TPA cont with more than a single len_list entry\n");
1257}
1258
1259static void qede_tpa_end(struct qede_dev *edev,
1260 struct qede_fastpath *fp,
1261 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1262{
1263 struct qede_rx_queue *rxq = fp->rxq;
1264 struct qede_agg_info *tpa_info;
1265 struct sk_buff *skb;
1266 int i;
1267
1268 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1269 skb = tpa_info->skb;
1270
1271 for (i = 0; cqe->len_list[i]; i++)
1272 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1273 le16_to_cpu(cqe->len_list[i]));
1274 if (unlikely(i > 1))
1275 DP_ERR(edev,
1276 "Strange - TPA emd with more than a single len_list entry\n");
1277
1278 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1279 goto err;
1280
1281 /* Sanity */
1282 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1283 DP_ERR(edev,
1284 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1285 cqe->num_of_bds, tpa_info->frag_id);
1286 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1287 DP_ERR(edev,
1288 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1289 le16_to_cpu(cqe->total_packet_len), skb->len);
1290
1291 memcpy(skb->data,
1292 page_address(tpa_info->start_buf.data) +
1293 tpa_info->start_cqe.placement_offset +
1294 tpa_info->start_buf.page_offset,
1295 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1296
1297 /* Recycle [mapped] start buffer for the next replacement */
1298 tpa_info->replace_buf = tpa_info->start_buf;
1299 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1300
1301 /* Finalize the SKB */
1302 skb->protocol = eth_type_trans(skb, edev->ndev);
1303 skb->ip_summed = CHECKSUM_UNNECESSARY;
1304
1305 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1306 * to skb_shinfo(skb)->gso_segs
1307 */
1308 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1309
1310 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1311
1312 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1313
1314 return;
1315err:
1316 /* The BD starting the aggregation is still mapped; Re-use it for
1317 * future aggregations [as replacement buffer]
1318 */
1319 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1320 sizeof(struct sw_rx_data));
1321 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1322 tpa_info->start_buf.data = NULL;
1323 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1324 dev_kfree_skb_any(tpa_info->skb);
1325 tpa_info->skb = NULL;
1326}
1327
Manish Chopra14db81d2016-04-14 01:38:33 -04001328static bool qede_tunn_exist(u16 flag)
1329{
1330 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1331 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1332}
1333
1334static u8 qede_check_tunn_csum(u16 flag)
1335{
1336 u16 csum_flag = 0;
1337 u8 tcsum = 0;
1338
1339 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1340 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1341 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1342 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1343
1344 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1345 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1346 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1347 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1348 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1349 }
1350
1351 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1352 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1353 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1354 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1355
1356 if (csum_flag & flag)
1357 return QEDE_CSUM_ERROR;
1358
1359 return QEDE_CSUM_UNNECESSARY | tcsum;
1360}
1361
1362static u8 qede_check_notunn_csum(u16 flag)
Yuval Mintz29502192015-10-26 11:02:29 +02001363{
1364 u16 csum_flag = 0;
1365 u8 csum = 0;
1366
Manish Chopra14db81d2016-04-14 01:38:33 -04001367 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1368 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
Yuval Mintz29502192015-10-26 11:02:29 +02001369 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1370 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1371 csum = QEDE_CSUM_UNNECESSARY;
1372 }
1373
1374 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1375 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1376
1377 if (csum_flag & flag)
1378 return QEDE_CSUM_ERROR;
1379
1380 return csum;
1381}
1382
Manish Chopra14db81d2016-04-14 01:38:33 -04001383static u8 qede_check_csum(u16 flag)
1384{
1385 if (!qede_tunn_exist(flag))
1386 return qede_check_notunn_csum(flag);
1387 else
1388 return qede_check_tunn_csum(flag);
1389}
1390
Manish Choprac72a6122016-06-30 02:35:18 -04001391static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1392 u16 flag)
1393{
1394 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1395
1396 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1397 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1398 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1399 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1400 return true;
1401
1402 return false;
1403}
1404
Yuval Mintz29502192015-10-26 11:02:29 +02001405static int qede_rx_int(struct qede_fastpath *fp, int budget)
1406{
1407 struct qede_dev *edev = fp->edev;
1408 struct qede_rx_queue *rxq = fp->rxq;
1409
1410 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1411 int rx_pkt = 0;
1412 u8 csum_flag;
1413
1414 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1415 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1416
1417 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1418 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1419 * read before it is written by FW, then FW writes CQE and SB, and then
1420 * the CPU reads the hw_comp_cons, it will use an old CQE.
1421 */
1422 rmb();
1423
1424 /* Loop to complete all indicated BDs */
1425 while (sw_comp_cons != hw_comp_cons) {
1426 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1427 enum pkt_hash_types rxhash_type;
1428 enum eth_rx_cqe_type cqe_type;
1429 struct sw_rx_data *sw_rx_data;
1430 union eth_rx_cqe *cqe;
1431 struct sk_buff *skb;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001432 struct page *data;
1433 __le16 flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001434 u16 len, pad;
1435 u32 rx_hash;
Yuval Mintz29502192015-10-26 11:02:29 +02001436
1437 /* Get the CQE from the completion ring */
1438 cqe = (union eth_rx_cqe *)
1439 qed_chain_consume(&rxq->rx_comp_ring);
1440 cqe_type = cqe->fast_path_regular.type;
1441
1442 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1443 edev->ops->eth_cqe_completion(
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001444 edev->cdev, fp->id,
Yuval Mintz29502192015-10-26 11:02:29 +02001445 (struct eth_slow_path_rx_cqe *)cqe);
1446 goto next_cqe;
1447 }
1448
Manish Chopra55482ed2016-03-04 12:35:06 -05001449 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1450 switch (cqe_type) {
1451 case ETH_RX_CQE_TYPE_TPA_START:
1452 qede_tpa_start(edev, rxq,
1453 &cqe->fast_path_tpa_start);
1454 goto next_cqe;
1455 case ETH_RX_CQE_TYPE_TPA_CONT:
1456 qede_tpa_cont(edev, rxq,
1457 &cqe->fast_path_tpa_cont);
1458 goto next_cqe;
1459 case ETH_RX_CQE_TYPE_TPA_END:
1460 qede_tpa_end(edev, fp,
1461 &cqe->fast_path_tpa_end);
1462 goto next_rx_only;
1463 default:
1464 break;
1465 }
1466 }
1467
Yuval Mintz29502192015-10-26 11:02:29 +02001468 /* Get the data from the SW ring */
1469 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1470 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1471 data = sw_rx_data->data;
1472
1473 fp_cqe = &cqe->fast_path_regular;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001474 len = le16_to_cpu(fp_cqe->len_on_first_bd);
Yuval Mintz29502192015-10-26 11:02:29 +02001475 pad = fp_cqe->placement_offset;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001476 flags = cqe->fast_path_regular.pars_flags.flags;
Yuval Mintz29502192015-10-26 11:02:29 +02001477
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001478 /* If this is an error packet then drop it */
1479 parse_flag = le16_to_cpu(flags);
Yuval Mintz29502192015-10-26 11:02:29 +02001480
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001481 csum_flag = qede_check_csum(parse_flag);
1482 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
Manish Choprac72a6122016-06-30 02:35:18 -04001483 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1484 parse_flag)) {
1485 rxq->rx_ip_frags++;
1486 goto alloc_skb;
1487 }
1488
Yuval Mintz29502192015-10-26 11:02:29 +02001489 DP_NOTICE(edev,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001490 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1491 sw_comp_cons, parse_flag);
1492 rxq->rx_hw_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001493 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1494 goto next_cqe;
Yuval Mintz29502192015-10-26 11:02:29 +02001495 }
1496
Manish Choprac72a6122016-06-30 02:35:18 -04001497alloc_skb:
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001498 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1499 if (unlikely(!skb)) {
1500 DP_NOTICE(edev,
Yuval Mintz525ef5c2016-08-15 10:42:45 +03001501 "skb allocation failed, dropping incoming packet\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001502 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001503 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001504 goto next_cqe;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001505 }
Yuval Mintz29502192015-10-26 11:02:29 +02001506
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001507 /* Copy data into SKB */
Manish Chopra3d789992016-06-30 02:35:21 -04001508 if (len + pad <= edev->rx_copybreak) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001509 memcpy(skb_put(skb, len),
1510 page_address(data) + pad +
1511 sw_rx_data->page_offset, len);
1512 qede_reuse_page(edev, rxq, sw_rx_data);
1513 } else {
1514 struct skb_frag_struct *frag;
1515 unsigned int pull_len;
1516 unsigned char *va;
1517
1518 frag = &skb_shinfo(skb)->frags[0];
1519
1520 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1521 pad + sw_rx_data->page_offset,
1522 len, rxq->rx_buf_seg_size);
1523
1524 va = skb_frag_address(frag);
1525 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1526
1527 /* Align the pull_len to optimize memcpy */
1528 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1529
1530 skb_frag_size_sub(frag, pull_len);
1531 frag->page_offset += pull_len;
1532 skb->data_len -= pull_len;
1533 skb->tail += pull_len;
1534
1535 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1536 sw_rx_data))) {
1537 DP_ERR(edev, "Failed to allocate rx buffer\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04001538 /* Incr page ref count to reuse on allocation
1539 * failure so that it doesn't get freed while
1540 * freeing SKB.
1541 */
1542
Joonsoo Kim0139aa72016-05-19 17:10:49 -07001543 page_ref_inc(sw_rx_data->data);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001544 rxq->rx_alloc_errors++;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001545 qede_recycle_rx_bd_ring(rxq, edev,
1546 fp_cqe->bd_num);
1547 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001548 goto next_cqe;
1549 }
1550 }
1551
Manish Chopraf86af2d2016-04-20 03:03:27 -04001552 qede_rx_bd_ring_consume(rxq);
1553
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001554 if (fp_cqe->bd_num != 1) {
1555 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1556 u8 num_frags;
1557
1558 pkt_len -= len;
1559
1560 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1561 num_frags--) {
1562 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1563 rxq->rx_buf_size : pkt_len;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001564 if (unlikely(!cur_size)) {
1565 DP_ERR(edev,
1566 "Still got %d BDs for mapping jumbo, but length became 0\n",
1567 num_frags);
1568 qede_recycle_rx_bd_ring(rxq, edev,
1569 num_frags);
1570 dev_kfree_skb_any(skb);
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001571 goto next_cqe;
Manish Chopraf86af2d2016-04-20 03:03:27 -04001572 }
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001573
Manish Chopraf86af2d2016-04-20 03:03:27 -04001574 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1575 qede_recycle_rx_bd_ring(rxq, edev,
1576 num_frags);
1577 dev_kfree_skb_any(skb);
1578 goto next_cqe;
1579 }
1580
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001581 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1582 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
Manish Chopraf86af2d2016-04-20 03:03:27 -04001583 qede_rx_bd_ring_consume(rxq);
1584
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001585 dma_unmap_page(&edev->pdev->dev,
1586 sw_rx_data->mapping,
1587 PAGE_SIZE, DMA_FROM_DEVICE);
1588
1589 skb_fill_page_desc(skb,
1590 skb_shinfo(skb)->nr_frags++,
1591 sw_rx_data->data, 0,
1592 cur_size);
1593
1594 skb->truesize += PAGE_SIZE;
1595 skb->data_len += cur_size;
1596 skb->len += cur_size;
1597 pkt_len -= cur_size;
1598 }
1599
Manish Chopraf86af2d2016-04-20 03:03:27 -04001600 if (unlikely(pkt_len))
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05001601 DP_ERR(edev,
1602 "Mapped all BDs of jumbo, but still have %d bytes\n",
1603 pkt_len);
1604 }
Yuval Mintz29502192015-10-26 11:02:29 +02001605
1606 skb->protocol = eth_type_trans(skb, edev->ndev);
1607
1608 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
Yuval Mintz1a635e42016-08-15 10:42:43 +03001609 fp_cqe->rss_hash, &rxhash_type);
Yuval Mintz29502192015-10-26 11:02:29 +02001610
1611 skb_set_hash(skb, rx_hash, rxhash_type);
1612
1613 qede_set_skb_csum(skb, csum_flag);
1614
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001615 skb_record_rx_queue(skb, fp->rxq->rxq_id);
Yuval Mintz29502192015-10-26 11:02:29 +02001616
1617 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
Manish Chopra55482ed2016-03-04 12:35:06 -05001618next_rx_only:
Yuval Mintz29502192015-10-26 11:02:29 +02001619 rx_pkt++;
1620
1621next_cqe: /* don't consume bd rx buffer */
1622 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1623 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1624 /* CR TPA - revisit how to handle budget in TPA perhaps
1625 * increase on "end"
1626 */
1627 if (rx_pkt == budget)
1628 break;
1629 } /* repeat while sw_comp_cons != hw_comp_cons... */
1630
1631 /* Update producers */
1632 qede_update_rx_prod(edev, rxq);
1633
Sudarsana Reddy Kalluru68db9ec2016-08-16 10:51:02 -04001634 rxq->rcv_pkts += rx_pkt;
1635
Yuval Mintz29502192015-10-26 11:02:29 +02001636 return rx_pkt;
1637}
1638
1639static int qede_poll(struct napi_struct *napi, int budget)
1640{
Yuval Mintz29502192015-10-26 11:02:29 +02001641 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
Manish Choprac7741692016-06-30 02:35:19 -04001642 napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001643 struct qede_dev *edev = fp->edev;
Manish Choprac7741692016-06-30 02:35:19 -04001644 int rx_work_done = 0;
1645 u8 tc;
Yuval Mintz29502192015-10-26 11:02:29 +02001646
Manish Choprac7741692016-06-30 02:35:19 -04001647 for (tc = 0; tc < edev->num_tc; tc++)
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001648 if (likely(fp->type & QEDE_FASTPATH_TX) &&
1649 qede_txq_has_work(&fp->txqs[tc]))
Manish Choprac7741692016-06-30 02:35:19 -04001650 qede_tx_int(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02001651
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001652 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1653 qede_has_rx_work(fp->rxq)) ?
Manish Choprac7741692016-06-30 02:35:19 -04001654 qede_rx_int(fp, budget) : 0;
1655 if (rx_work_done < budget) {
1656 qed_sb_update_sb_idx(fp->sb_info);
1657 /* *_has_*_work() reads the status block,
1658 * thus we need to ensure that status block indices
1659 * have been actually read (qed_sb_update_sb_idx)
1660 * prior to this check (*_has_*_work) so that
1661 * we won't write the "newer" value of the status block
1662 * to HW (if there was a DMA right after
1663 * qede_has_rx_work and if there is no rmb, the memory
1664 * reading (qed_sb_update_sb_idx) may be postponed
1665 * to right before *_ack_sb). In this case there
1666 * will never be another interrupt until there is
1667 * another update of the status block, while there
1668 * is still unhandled work.
1669 */
1670 rmb();
Yuval Mintz29502192015-10-26 11:02:29 +02001671
1672 /* Fall out from the NAPI loop if needed */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04001673 if (!((likely(fp->type & QEDE_FASTPATH_RX) &&
1674 qede_has_rx_work(fp->rxq)) ||
1675 (likely(fp->type & QEDE_FASTPATH_TX) &&
1676 qede_has_tx_work(fp)))) {
Manish Choprac7741692016-06-30 02:35:19 -04001677 napi_complete(napi);
Yuval Mintz29502192015-10-26 11:02:29 +02001678
Manish Choprac7741692016-06-30 02:35:19 -04001679 /* Update and reenable interrupts */
1680 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1681 1 /*update*/);
1682 } else {
1683 rx_work_done = budget;
Yuval Mintz29502192015-10-26 11:02:29 +02001684 }
1685 }
1686
Manish Choprac7741692016-06-30 02:35:19 -04001687 return rx_work_done;
Yuval Mintz29502192015-10-26 11:02:29 +02001688}
1689
1690static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1691{
1692 struct qede_fastpath *fp = fp_cookie;
1693
1694 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1695
1696 napi_schedule_irqoff(&fp->napi);
1697 return IRQ_HANDLED;
1698}
1699
1700/* -------------------------------------------------------------------------
1701 * END OF FAST-PATH
1702 * -------------------------------------------------------------------------
1703 */
1704
1705static int qede_open(struct net_device *ndev);
1706static int qede_close(struct net_device *ndev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02001707static int qede_set_mac_addr(struct net_device *ndev, void *p);
1708static void qede_set_rx_mode(struct net_device *ndev);
1709static void qede_config_rx_mode(struct net_device *ndev);
1710
1711static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1712 enum qed_filter_xcast_params_type opcode,
1713 unsigned char mac[ETH_ALEN])
1714{
1715 struct qed_filter_params filter_cmd;
1716
1717 memset(&filter_cmd, 0, sizeof(filter_cmd));
1718 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1719 filter_cmd.filter.ucast.type = opcode;
1720 filter_cmd.filter.ucast.mac_valid = 1;
1721 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1722
1723 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1724}
1725
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001726static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1727 enum qed_filter_xcast_params_type opcode,
1728 u16 vid)
1729{
1730 struct qed_filter_params filter_cmd;
1731
1732 memset(&filter_cmd, 0, sizeof(filter_cmd));
1733 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1734 filter_cmd.filter.ucast.type = opcode;
1735 filter_cmd.filter.ucast.vlan_valid = 1;
1736 filter_cmd.filter.ucast.vlan = vid;
1737
1738 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1739}
1740
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001741void qede_fill_by_demand_stats(struct qede_dev *edev)
1742{
1743 struct qed_eth_stats stats;
1744
1745 edev->ops->get_vport_stats(edev->cdev, &stats);
1746 edev->stats.no_buff_discards = stats.no_buff_discards;
Sudarsana Reddy Kalluru1a5a3662016-08-16 10:51:01 -04001747 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1748 edev->stats.ttl0_discard = stats.ttl0_discard;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001749 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1750 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1751 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1752 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1753 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1754 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1755 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1756 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1757
1758 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1759 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1760 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1761 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1762 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1763 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1764 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1765 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1766 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1767 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1768 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1769 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1770
1771 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
Yuval Mintzd4967cf2016-04-22 08:41:01 +03001772 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1773 edev->stats.rx_128_to_255_byte_packets =
1774 stats.rx_128_to_255_byte_packets;
1775 edev->stats.rx_256_to_511_byte_packets =
1776 stats.rx_256_to_511_byte_packets;
1777 edev->stats.rx_512_to_1023_byte_packets =
1778 stats.rx_512_to_1023_byte_packets;
1779 edev->stats.rx_1024_to_1518_byte_packets =
1780 stats.rx_1024_to_1518_byte_packets;
1781 edev->stats.rx_1519_to_1522_byte_packets =
1782 stats.rx_1519_to_1522_byte_packets;
1783 edev->stats.rx_1519_to_2047_byte_packets =
1784 stats.rx_1519_to_2047_byte_packets;
1785 edev->stats.rx_2048_to_4095_byte_packets =
1786 stats.rx_2048_to_4095_byte_packets;
1787 edev->stats.rx_4096_to_9216_byte_packets =
1788 stats.rx_4096_to_9216_byte_packets;
1789 edev->stats.rx_9217_to_16383_byte_packets =
1790 stats.rx_9217_to_16383_byte_packets;
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001791 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1792 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1793 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1794 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1795 edev->stats.rx_align_errors = stats.rx_align_errors;
1796 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1797 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1798 edev->stats.rx_jabbers = stats.rx_jabbers;
1799 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1800 edev->stats.rx_fragments = stats.rx_fragments;
1801 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1802 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1803 edev->stats.tx_128_to_255_byte_packets =
1804 stats.tx_128_to_255_byte_packets;
1805 edev->stats.tx_256_to_511_byte_packets =
1806 stats.tx_256_to_511_byte_packets;
1807 edev->stats.tx_512_to_1023_byte_packets =
1808 stats.tx_512_to_1023_byte_packets;
1809 edev->stats.tx_1024_to_1518_byte_packets =
1810 stats.tx_1024_to_1518_byte_packets;
1811 edev->stats.tx_1519_to_2047_byte_packets =
1812 stats.tx_1519_to_2047_byte_packets;
1813 edev->stats.tx_2048_to_4095_byte_packets =
1814 stats.tx_2048_to_4095_byte_packets;
1815 edev->stats.tx_4096_to_9216_byte_packets =
1816 stats.tx_4096_to_9216_byte_packets;
1817 edev->stats.tx_9217_to_16383_byte_packets =
1818 stats.tx_9217_to_16383_byte_packets;
1819 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1820 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1821 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1822 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1823 edev->stats.brb_truncates = stats.brb_truncates;
1824 edev->stats.brb_discards = stats.brb_discards;
1825 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1826}
1827
Yuval Mintz1a635e42016-08-15 10:42:43 +03001828static
1829struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1830 struct rtnl_link_stats64 *stats)
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02001831{
1832 struct qede_dev *edev = netdev_priv(dev);
1833
1834 qede_fill_by_demand_stats(edev);
1835
1836 stats->rx_packets = edev->stats.rx_ucast_pkts +
1837 edev->stats.rx_mcast_pkts +
1838 edev->stats.rx_bcast_pkts;
1839 stats->tx_packets = edev->stats.tx_ucast_pkts +
1840 edev->stats.tx_mcast_pkts +
1841 edev->stats.tx_bcast_pkts;
1842
1843 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1844 edev->stats.rx_mcast_bytes +
1845 edev->stats.rx_bcast_bytes;
1846
1847 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1848 edev->stats.tx_mcast_bytes +
1849 edev->stats.tx_bcast_bytes;
1850
1851 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1852 stats->multicast = edev->stats.rx_mcast_pkts +
1853 edev->stats.rx_bcast_pkts;
1854
1855 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1856
1857 stats->collisions = edev->stats.tx_total_collisions;
1858 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1859 stats->rx_frame_errors = edev->stats.rx_align_errors;
1860
1861 return stats;
1862}
1863
Yuval Mintz733def62016-05-11 16:36:22 +03001864#ifdef CONFIG_QED_SRIOV
Yuval Mintz73390ac2016-05-11 16:36:24 +03001865static int qede_get_vf_config(struct net_device *dev, int vfidx,
1866 struct ifla_vf_info *ivi)
1867{
1868 struct qede_dev *edev = netdev_priv(dev);
1869
1870 if (!edev->ops)
1871 return -EINVAL;
1872
1873 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1874}
1875
Yuval Mintz733def62016-05-11 16:36:22 +03001876static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1877 int min_tx_rate, int max_tx_rate)
1878{
1879 struct qede_dev *edev = netdev_priv(dev);
1880
Yuval Mintzbe7b6d62016-05-26 11:01:17 +03001881 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
Yuval Mintz733def62016-05-11 16:36:22 +03001882 max_tx_rate);
1883}
1884
Yuval Mintz6ddc7602016-05-11 16:36:23 +03001885static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1886{
1887 struct qede_dev *edev = netdev_priv(dev);
1888
1889 if (!edev->ops)
1890 return -EINVAL;
1891
1892 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1893}
1894
Yuval Mintz733def62016-05-11 16:36:22 +03001895static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1896 int link_state)
1897{
1898 struct qede_dev *edev = netdev_priv(dev);
1899
1900 if (!edev->ops)
1901 return -EINVAL;
1902
1903 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1904}
1905#endif
1906
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02001907static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1908{
1909 struct qed_update_vport_params params;
1910 int rc;
1911
1912 /* Proceed only if action actually needs to be performed */
1913 if (edev->accept_any_vlan == action)
1914 return;
1915
1916 memset(&params, 0, sizeof(params));
1917
1918 params.vport_id = 0;
1919 params.accept_any_vlan = action;
1920 params.update_accept_any_vlan_flg = 1;
1921
1922 rc = edev->ops->vport_update(edev->cdev, &params);
1923 if (rc) {
1924 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1925 action ? "enable" : "disable");
1926 } else {
1927 DP_INFO(edev, "%s accept-any-vlan\n",
1928 action ? "enabled" : "disabled");
1929 edev->accept_any_vlan = action;
1930 }
1931}
1932
1933static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1934{
1935 struct qede_dev *edev = netdev_priv(dev);
1936 struct qede_vlan *vlan, *tmp;
1937 int rc;
1938
1939 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1940
1941 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1942 if (!vlan) {
1943 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1944 return -ENOMEM;
1945 }
1946 INIT_LIST_HEAD(&vlan->list);
1947 vlan->vid = vid;
1948 vlan->configured = false;
1949
1950 /* Verify vlan isn't already configured */
1951 list_for_each_entry(tmp, &edev->vlan_list, list) {
1952 if (tmp->vid == vlan->vid) {
1953 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1954 "vlan already configured\n");
1955 kfree(vlan);
1956 return -EEXIST;
1957 }
1958 }
1959
1960 /* If interface is down, cache this VLAN ID and return */
1961 if (edev->state != QEDE_STATE_OPEN) {
1962 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1963 "Interface is down, VLAN %d will be configured when interface is up\n",
1964 vid);
1965 if (vid != 0)
1966 edev->non_configured_vlans++;
1967 list_add(&vlan->list, &edev->vlan_list);
1968
1969 return 0;
1970 }
1971
1972 /* Check for the filter limit.
1973 * Note - vlan0 has a reserved filter and can be added without
1974 * worrying about quota
1975 */
1976 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1977 (vlan->vid == 0)) {
1978 rc = qede_set_ucast_rx_vlan(edev,
1979 QED_FILTER_XCAST_TYPE_ADD,
1980 vlan->vid);
1981 if (rc) {
1982 DP_ERR(edev, "Failed to configure VLAN %d\n",
1983 vlan->vid);
1984 kfree(vlan);
1985 return -EINVAL;
1986 }
1987 vlan->configured = true;
1988
1989 /* vlan0 filter isn't consuming out of our quota */
1990 if (vlan->vid != 0)
1991 edev->configured_vlans++;
1992 } else {
1993 /* Out of quota; Activate accept-any-VLAN mode */
1994 if (!edev->non_configured_vlans)
1995 qede_config_accept_any_vlan(edev, true);
1996
1997 edev->non_configured_vlans++;
1998 }
1999
2000 list_add(&vlan->list, &edev->vlan_list);
2001
2002 return 0;
2003}
2004
2005static void qede_del_vlan_from_list(struct qede_dev *edev,
2006 struct qede_vlan *vlan)
2007{
2008 /* vlan0 filter isn't consuming out of our quota */
2009 if (vlan->vid != 0) {
2010 if (vlan->configured)
2011 edev->configured_vlans--;
2012 else
2013 edev->non_configured_vlans--;
2014 }
2015
2016 list_del(&vlan->list);
2017 kfree(vlan);
2018}
2019
2020static int qede_configure_vlan_filters(struct qede_dev *edev)
2021{
2022 int rc = 0, real_rc = 0, accept_any_vlan = 0;
2023 struct qed_dev_eth_info *dev_info;
2024 struct qede_vlan *vlan = NULL;
2025
2026 if (list_empty(&edev->vlan_list))
2027 return 0;
2028
2029 dev_info = &edev->dev_info;
2030
2031 /* Configure non-configured vlans */
2032 list_for_each_entry(vlan, &edev->vlan_list, list) {
2033 if (vlan->configured)
2034 continue;
2035
2036 /* We have used all our credits, now enable accept_any_vlan */
2037 if ((vlan->vid != 0) &&
2038 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2039 accept_any_vlan = 1;
2040 continue;
2041 }
2042
2043 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2044
2045 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2046 vlan->vid);
2047 if (rc) {
2048 DP_ERR(edev, "Failed to configure VLAN %u\n",
2049 vlan->vid);
2050 real_rc = rc;
2051 continue;
2052 }
2053
2054 vlan->configured = true;
2055 /* vlan0 filter doesn't consume our VLAN filter's quota */
2056 if (vlan->vid != 0) {
2057 edev->non_configured_vlans--;
2058 edev->configured_vlans++;
2059 }
2060 }
2061
2062 /* enable accept_any_vlan mode if we have more VLANs than credits,
2063 * or remove accept_any_vlan mode if we've actually removed
2064 * a non-configured vlan, and all remaining vlans are truly configured.
2065 */
2066
2067 if (accept_any_vlan)
2068 qede_config_accept_any_vlan(edev, true);
2069 else if (!edev->non_configured_vlans)
2070 qede_config_accept_any_vlan(edev, false);
2071
2072 return real_rc;
2073}
2074
2075static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2076{
2077 struct qede_dev *edev = netdev_priv(dev);
2078 struct qede_vlan *vlan = NULL;
2079 int rc;
2080
2081 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2082
2083 /* Find whether entry exists */
2084 list_for_each_entry(vlan, &edev->vlan_list, list)
2085 if (vlan->vid == vid)
2086 break;
2087
2088 if (!vlan || (vlan->vid != vid)) {
2089 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2090 "Vlan isn't configured\n");
2091 return 0;
2092 }
2093
2094 if (edev->state != QEDE_STATE_OPEN) {
2095 /* As interface is already down, we don't have a VPORT
2096 * instance to remove vlan filter. So just update vlan list
2097 */
2098 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2099 "Interface is down, removing VLAN from list only\n");
2100 qede_del_vlan_from_list(edev, vlan);
2101 return 0;
2102 }
2103
2104 /* Remove vlan */
Yuval Mintzc524e2f52016-07-27 14:45:19 +03002105 if (vlan->configured) {
2106 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2107 vid);
2108 if (rc) {
2109 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2110 return -EINVAL;
2111 }
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002112 }
2113
2114 qede_del_vlan_from_list(edev, vlan);
2115
2116 /* We have removed a VLAN - try to see if we can
2117 * configure non-configured VLAN from the list.
2118 */
2119 rc = qede_configure_vlan_filters(edev);
2120
2121 return rc;
2122}
2123
2124static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2125{
2126 struct qede_vlan *vlan = NULL;
2127
2128 if (list_empty(&edev->vlan_list))
2129 return;
2130
2131 list_for_each_entry(vlan, &edev->vlan_list, list) {
2132 if (!vlan->configured)
2133 continue;
2134
2135 vlan->configured = false;
2136
2137 /* vlan0 filter isn't consuming out of our quota */
2138 if (vlan->vid != 0) {
2139 edev->non_configured_vlans++;
2140 edev->configured_vlans--;
2141 }
2142
2143 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002144 "marked vlan %d as non-configured\n", vlan->vid);
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002145 }
2146
2147 edev->accept_any_vlan = false;
2148}
2149
Baoyou Xie94384512016-09-08 16:43:23 +08002150static int qede_set_features(struct net_device *dev, netdev_features_t features)
Yuval Mintzce2b8852016-05-26 11:01:18 +03002151{
2152 struct qede_dev *edev = netdev_priv(dev);
2153 netdev_features_t changes = features ^ dev->features;
2154 bool need_reload = false;
2155
2156 /* No action needed if hardware GRO is disabled during driver load */
2157 if (changes & NETIF_F_GRO) {
2158 if (dev->features & NETIF_F_GRO)
2159 need_reload = !edev->gro_disable;
2160 else
2161 need_reload = edev->gro_disable;
2162 }
2163
2164 if (need_reload && netif_running(edev->ndev)) {
2165 dev->features = features;
2166 qede_reload(edev, NULL, NULL);
2167 return 1;
2168 }
2169
2170 return 0;
2171}
2172
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002173static void qede_udp_tunnel_add(struct net_device *dev,
2174 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002175{
2176 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002177 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002178
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002179 switch (ti->type) {
2180 case UDP_TUNNEL_TYPE_VXLAN:
2181 if (edev->vxlan_dst_port)
2182 return;
2183
2184 edev->vxlan_dst_port = t_port;
2185
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002186 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002187 t_port);
2188
2189 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2190 break;
2191 case UDP_TUNNEL_TYPE_GENEVE:
2192 if (edev->geneve_dst_port)
2193 return;
2194
2195 edev->geneve_dst_port = t_port;
2196
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002197 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002198 t_port);
2199 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2200 break;
2201 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002202 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002203 }
Manish Choprab18e1702016-04-14 01:38:30 -04002204
Manish Choprab18e1702016-04-14 01:38:30 -04002205 schedule_delayed_work(&edev->sp_task, 0);
2206}
2207
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002208static void qede_udp_tunnel_del(struct net_device *dev,
2209 struct udp_tunnel_info *ti)
Manish Choprab18e1702016-04-14 01:38:30 -04002210{
2211 struct qede_dev *edev = netdev_priv(dev);
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002212 u16 t_port = ntohs(ti->port);
Manish Choprab18e1702016-04-14 01:38:30 -04002213
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002214 switch (ti->type) {
2215 case UDP_TUNNEL_TYPE_VXLAN:
2216 if (t_port != edev->vxlan_dst_port)
2217 return;
2218
2219 edev->vxlan_dst_port = 0;
2220
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002221 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002222 t_port);
2223
2224 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2225 break;
2226 case UDP_TUNNEL_TYPE_GENEVE:
2227 if (t_port != edev->geneve_dst_port)
2228 return;
2229
2230 edev->geneve_dst_port = 0;
2231
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002232 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002233 t_port);
2234 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2235 break;
2236 default:
Manish Choprab18e1702016-04-14 01:38:30 -04002237 return;
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002238 }
Manish Choprab18e1702016-04-14 01:38:30 -04002239
Manish Choprab18e1702016-04-14 01:38:30 -04002240 schedule_delayed_work(&edev->sp_task, 0);
2241}
Manish Chopra9a109dd2016-04-14 01:38:31 -04002242
Manish Chopra25695852016-10-14 05:19:19 -04002243/* 8B udp header + 8B base tunnel header + 32B option length */
2244#define QEDE_MAX_TUN_HDR_LEN 48
2245
2246static netdev_features_t qede_features_check(struct sk_buff *skb,
2247 struct net_device *dev,
2248 netdev_features_t features)
2249{
2250 if (skb->encapsulation) {
2251 u8 l4_proto = 0;
2252
2253 switch (vlan_get_protocol(skb)) {
2254 case htons(ETH_P_IP):
2255 l4_proto = ip_hdr(skb)->protocol;
2256 break;
2257 case htons(ETH_P_IPV6):
2258 l4_proto = ipv6_hdr(skb)->nexthdr;
2259 break;
2260 default:
2261 return features;
2262 }
2263
2264 /* Disable offloads for geneve tunnels, as HW can't parse
2265 * the geneve header which has option length greater than 32B.
2266 */
2267 if ((l4_proto == IPPROTO_UDP) &&
2268 ((skb_inner_mac_header(skb) -
2269 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
2270 return features & ~(NETIF_F_CSUM_MASK |
2271 NETIF_F_GSO_MASK);
2272 }
2273
2274 return features;
2275}
2276
Yuval Mintz29502192015-10-26 11:02:29 +02002277static const struct net_device_ops qede_netdev_ops = {
2278 .ndo_open = qede_open,
2279 .ndo_stop = qede_close,
2280 .ndo_start_xmit = qede_start_xmit,
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002281 .ndo_set_rx_mode = qede_set_rx_mode,
2282 .ndo_set_mac_address = qede_set_mac_addr,
Yuval Mintz29502192015-10-26 11:02:29 +02002283 .ndo_validate_addr = eth_validate_addr,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002284 .ndo_change_mtu = qede_change_mtu,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002285#ifdef CONFIG_QED_SRIOV
Yuval Mintzeff16962016-05-11 16:36:21 +03002286 .ndo_set_vf_mac = qede_set_vf_mac,
Yuval Mintz08feecd2016-05-11 16:36:20 +03002287 .ndo_set_vf_vlan = qede_set_vf_vlan,
2288#endif
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002289 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2290 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
Yuval Mintzce2b8852016-05-26 11:01:18 +03002291 .ndo_set_features = qede_set_features,
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002292 .ndo_get_stats64 = qede_get_stats64,
Yuval Mintz733def62016-05-11 16:36:22 +03002293#ifdef CONFIG_QED_SRIOV
2294 .ndo_set_vf_link_state = qede_set_vf_link_state,
Yuval Mintz6ddc7602016-05-11 16:36:23 +03002295 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
Yuval Mintz73390ac2016-05-11 16:36:24 +03002296 .ndo_get_vf_config = qede_get_vf_config,
Yuval Mintz733def62016-05-11 16:36:22 +03002297 .ndo_set_vf_rate = qede_set_vf_rate,
2298#endif
Alexander Duyckf9f082a2016-06-16 12:22:57 -07002299 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2300 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
Manish Chopra25695852016-10-14 05:19:19 -04002301 .ndo_features_check = qede_features_check,
Yuval Mintz29502192015-10-26 11:02:29 +02002302};
2303
2304/* -------------------------------------------------------------------------
Yuval Mintze712d522015-10-26 11:02:27 +02002305 * START OF PROBE / REMOVE
2306 * -------------------------------------------------------------------------
2307 */
2308
2309static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2310 struct pci_dev *pdev,
2311 struct qed_dev_eth_info *info,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002312 u32 dp_module, u8 dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002313{
2314 struct net_device *ndev;
2315 struct qede_dev *edev;
2316
2317 ndev = alloc_etherdev_mqs(sizeof(*edev),
Yuval Mintz1a635e42016-08-15 10:42:43 +03002318 info->num_queues, info->num_queues);
Yuval Mintze712d522015-10-26 11:02:27 +02002319 if (!ndev) {
2320 pr_err("etherdev allocation failed\n");
2321 return NULL;
2322 }
2323
2324 edev = netdev_priv(ndev);
2325 edev->ndev = ndev;
2326 edev->cdev = cdev;
2327 edev->pdev = pdev;
2328 edev->dp_module = dp_module;
2329 edev->dp_level = dp_level;
2330 edev->ops = qed_ops;
Yuval Mintz29502192015-10-26 11:02:29 +02002331 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2332 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
Yuval Mintze712d522015-10-26 11:02:27 +02002333
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002334 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2335 info->num_queues, info->num_queues);
2336
Yuval Mintze712d522015-10-26 11:02:27 +02002337 SET_NETDEV_DEV(ndev, &pdev->dev);
2338
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002339 memset(&edev->stats, 0, sizeof(edev->stats));
Yuval Mintze712d522015-10-26 11:02:27 +02002340 memcpy(&edev->dev_info, info, sizeof(*info));
2341
2342 edev->num_tc = edev->dev_info.num_tc;
2343
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002344 INIT_LIST_HEAD(&edev->vlan_list);
2345
Yuval Mintze712d522015-10-26 11:02:27 +02002346 return edev;
2347}
2348
2349static void qede_init_ndev(struct qede_dev *edev)
2350{
2351 struct net_device *ndev = edev->ndev;
2352 struct pci_dev *pdev = edev->pdev;
2353 u32 hw_features;
2354
2355 pci_set_drvdata(pdev, ndev);
2356
2357 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2358 ndev->base_addr = ndev->mem_start;
2359 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2360 ndev->irq = edev->dev_info.common.pci_irq;
2361
2362 ndev->watchdog_timeo = TX_TIMEOUT;
2363
Yuval Mintz29502192015-10-26 11:02:29 +02002364 ndev->netdev_ops = &qede_netdev_ops;
2365
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002366 qede_set_ethtool_ops(ndev);
2367
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04002368 ndev->priv_flags = IFF_UNICAST_FLT;
2369
Yuval Mintze712d522015-10-26 11:02:27 +02002370 /* user-changeble features */
2371 hw_features = NETIF_F_GRO | NETIF_F_SG |
2372 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2373 NETIF_F_TSO | NETIF_F_TSO6;
2374
Manish Chopra14db81d2016-04-14 01:38:33 -04002375 /* Encap features*/
2376 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
Manish Chopraa1502412016-10-14 05:19:18 -04002377 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
2378 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002379 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2380 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2381 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
Manish Chopraa1502412016-10-14 05:19:18 -04002382 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
2383 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2384 NETIF_F_GSO_GRE_CSUM;
Manish Chopra14db81d2016-04-14 01:38:33 -04002385
Yuval Mintze712d522015-10-26 11:02:27 +02002386 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2387 NETIF_F_HIGHDMA;
2388 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2389 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02002390 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
Yuval Mintze712d522015-10-26 11:02:27 +02002391
2392 ndev->hw_features = hw_features;
2393
2394 /* Set network device HW mac */
2395 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2396}
2397
2398/* This function converts from 32b param to two params of level and module
2399 * Input 32b decoding:
2400 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2401 * 'happy' flow, e.g. memory allocation failed.
2402 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2403 * and provide important parameters.
2404 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2405 * module. VERBOSE prints are for tracking the specific flow in low level.
2406 *
2407 * Notice that the level should be that of the lowest required logs.
2408 */
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02002409void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
Yuval Mintze712d522015-10-26 11:02:27 +02002410{
2411 *p_dp_level = QED_LEVEL_NOTICE;
2412 *p_dp_module = 0;
2413
2414 if (debug & QED_LOG_VERBOSE_MASK) {
2415 *p_dp_level = QED_LEVEL_VERBOSE;
2416 *p_dp_module = (debug & 0x3FFFFFFF);
2417 } else if (debug & QED_LOG_INFO_MASK) {
2418 *p_dp_level = QED_LEVEL_INFO;
2419 } else if (debug & QED_LOG_NOTICE_MASK) {
2420 *p_dp_level = QED_LEVEL_NOTICE;
2421 }
2422}
2423
Yuval Mintz29502192015-10-26 11:02:29 +02002424static void qede_free_fp_array(struct qede_dev *edev)
2425{
2426 if (edev->fp_array) {
2427 struct qede_fastpath *fp;
2428 int i;
2429
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002430 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002431 fp = &edev->fp_array[i];
2432
2433 kfree(fp->sb_info);
2434 kfree(fp->rxq);
2435 kfree(fp->txqs);
2436 }
2437 kfree(edev->fp_array);
2438 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002439
2440 edev->num_queues = 0;
2441 edev->fp_num_tx = 0;
2442 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002443}
2444
2445static int qede_alloc_fp_array(struct qede_dev *edev)
2446{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002447 u8 fp_combined, fp_rx = edev->fp_num_rx;
Yuval Mintz29502192015-10-26 11:02:29 +02002448 struct qede_fastpath *fp;
2449 int i;
2450
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002451 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
Yuval Mintz29502192015-10-26 11:02:29 +02002452 sizeof(*edev->fp_array), GFP_KERNEL);
2453 if (!edev->fp_array) {
2454 DP_NOTICE(edev, "fp array allocation failed\n");
2455 goto err;
2456 }
2457
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002458 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2459
2460 /* Allocate the FP elements for Rx queues followed by combined and then
2461 * the Tx. This ordering should be maintained so that the respective
2462 * queues (Rx or Tx) will be together in the fastpath array and the
2463 * associated ids will be sequential.
2464 */
2465 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02002466 fp = &edev->fp_array[i];
2467
2468 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2469 if (!fp->sb_info) {
2470 DP_NOTICE(edev, "sb info struct allocation failed\n");
2471 goto err;
2472 }
2473
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002474 if (fp_rx) {
2475 fp->type = QEDE_FASTPATH_RX;
2476 fp_rx--;
2477 } else if (fp_combined) {
2478 fp->type = QEDE_FASTPATH_COMBINED;
2479 fp_combined--;
2480 } else {
2481 fp->type = QEDE_FASTPATH_TX;
Yuval Mintz29502192015-10-26 11:02:29 +02002482 }
2483
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002484 if (fp->type & QEDE_FASTPATH_TX) {
2485 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs),
2486 GFP_KERNEL);
2487 if (!fp->txqs) {
2488 DP_NOTICE(edev,
2489 "TXQ array allocation failed\n");
2490 goto err;
2491 }
2492 }
2493
2494 if (fp->type & QEDE_FASTPATH_RX) {
2495 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2496 if (!fp->rxq) {
2497 DP_NOTICE(edev,
2498 "RXQ struct allocation failed\n");
2499 goto err;
2500 }
Yuval Mintz29502192015-10-26 11:02:29 +02002501 }
2502 }
2503
2504 return 0;
2505err:
2506 qede_free_fp_array(edev);
2507 return -ENOMEM;
2508}
2509
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002510static void qede_sp_task(struct work_struct *work)
2511{
2512 struct qede_dev *edev = container_of(work, struct qede_dev,
2513 sp_task.work);
Manish Choprab18e1702016-04-14 01:38:30 -04002514 struct qed_dev *cdev = edev->cdev;
2515
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002516 mutex_lock(&edev->qede_lock);
2517
2518 if (edev->state == QEDE_STATE_OPEN) {
2519 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2520 qede_config_rx_mode(edev->ndev);
2521 }
2522
Manish Choprab18e1702016-04-14 01:38:30 -04002523 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2524 struct qed_tunn_params tunn_params;
2525
2526 memset(&tunn_params, 0, sizeof(tunn_params));
2527 tunn_params.update_vxlan_port = 1;
2528 tunn_params.vxlan_port = edev->vxlan_dst_port;
2529 qed_ops->tunn_config(cdev, &tunn_params);
2530 }
2531
Manish Chopra9a109dd2016-04-14 01:38:31 -04002532 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2533 struct qed_tunn_params tunn_params;
2534
2535 memset(&tunn_params, 0, sizeof(tunn_params));
2536 tunn_params.update_geneve_port = 1;
2537 tunn_params.geneve_port = edev->geneve_dst_port;
2538 qed_ops->tunn_config(cdev, &tunn_params);
2539 }
2540
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002541 mutex_unlock(&edev->qede_lock);
2542}
2543
Yuval Mintze712d522015-10-26 11:02:27 +02002544static void qede_update_pf_params(struct qed_dev *cdev)
2545{
2546 struct qed_pf_params pf_params;
2547
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002548 /* 64 rx + 64 tx */
Yuval Mintze712d522015-10-26 11:02:27 +02002549 memset(&pf_params, 0, sizeof(struct qed_pf_params));
Sudarsana Reddy Kalluru8e0ddc02016-05-05 00:35:16 -04002550 pf_params.eth_pf_params.num_cons = 128;
Yuval Mintze712d522015-10-26 11:02:27 +02002551 qed_ops->common->update_pf_params(cdev, &pf_params);
2552}
2553
2554enum qede_probe_mode {
2555 QEDE_PROBE_NORMAL,
2556};
2557
2558static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002559 bool is_vf, enum qede_probe_mode mode)
Yuval Mintze712d522015-10-26 11:02:27 +02002560{
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002561 struct qed_probe_params probe_params;
Yuval Mintz1a635e42016-08-15 10:42:43 +03002562 struct qed_slowpath_params sp_params;
Yuval Mintze712d522015-10-26 11:02:27 +02002563 struct qed_dev_eth_info dev_info;
2564 struct qede_dev *edev;
2565 struct qed_dev *cdev;
2566 int rc;
2567
2568 if (unlikely(dp_level & QED_LEVEL_INFO))
2569 pr_notice("Starting qede probe\n");
2570
Yuval Mintz1408cc1f2016-05-11 16:36:14 +03002571 memset(&probe_params, 0, sizeof(probe_params));
2572 probe_params.protocol = QED_PROTOCOL_ETH;
2573 probe_params.dp_module = dp_module;
2574 probe_params.dp_level = dp_level;
2575 probe_params.is_vf = is_vf;
2576 cdev = qed_ops->common->probe(pdev, &probe_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002577 if (!cdev) {
2578 rc = -ENODEV;
2579 goto err0;
2580 }
2581
2582 qede_update_pf_params(cdev);
2583
2584 /* Start the Slowpath-process */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002585 memset(&sp_params, 0, sizeof(sp_params));
2586 sp_params.int_mode = QED_INT_MODE_MSIX;
2587 sp_params.drv_major = QEDE_MAJOR_VERSION;
2588 sp_params.drv_minor = QEDE_MINOR_VERSION;
2589 sp_params.drv_rev = QEDE_REVISION_VERSION;
2590 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2591 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2592 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
Yuval Mintze712d522015-10-26 11:02:27 +02002593 if (rc) {
2594 pr_notice("Cannot start slowpath\n");
2595 goto err1;
2596 }
2597
2598 /* Learn information crucial for qede to progress */
2599 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2600 if (rc)
2601 goto err2;
2602
2603 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2604 dp_level);
2605 if (!edev) {
2606 rc = -ENOMEM;
2607 goto err2;
2608 }
2609
Yuval Mintzfefb0202016-05-11 16:36:19 +03002610 if (is_vf)
2611 edev->flags |= QEDE_FLAG_IS_VF;
2612
Yuval Mintze712d522015-10-26 11:02:27 +02002613 qede_init_ndev(edev);
2614
Ram Amranicee9fbd2016-10-01 21:59:56 +03002615 rc = qede_roce_dev_add(edev);
2616 if (rc)
2617 goto err3;
2618
Yuval Mintz29502192015-10-26 11:02:29 +02002619 rc = register_netdev(edev->ndev);
2620 if (rc) {
2621 DP_NOTICE(edev, "Cannot register net-device\n");
Ram Amranicee9fbd2016-10-01 21:59:56 +03002622 goto err4;
Yuval Mintz29502192015-10-26 11:02:29 +02002623 }
2624
Yuval Mintze712d522015-10-26 11:02:27 +02002625 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2626
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02002627 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2628
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002629#ifdef CONFIG_DCB
Sudarsana Reddy Kalluru5fe118c2016-08-29 08:29:52 -04002630 if (!IS_VF(edev))
2631 qede_set_dcbnl_ops(edev->ndev);
Sudarsana Reddy Kalluru489e45a2016-06-08 06:22:12 -04002632#endif
2633
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002634 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2635 mutex_init(&edev->qede_lock);
Manish Chopra3d789992016-06-30 02:35:21 -04002636 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002637
Yuval Mintze712d522015-10-26 11:02:27 +02002638 DP_INFO(edev, "Ending successfully qede probe\n");
2639
2640 return 0;
2641
Ram Amranicee9fbd2016-10-01 21:59:56 +03002642err4:
2643 qede_roce_dev_remove(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02002644err3:
2645 free_netdev(edev->ndev);
Yuval Mintze712d522015-10-26 11:02:27 +02002646err2:
2647 qed_ops->common->slowpath_stop(cdev);
2648err1:
2649 qed_ops->common->remove(cdev);
2650err0:
2651 return rc;
2652}
2653
2654static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2655{
Yuval Mintzfefb0202016-05-11 16:36:19 +03002656 bool is_vf = false;
Yuval Mintze712d522015-10-26 11:02:27 +02002657 u32 dp_module = 0;
2658 u8 dp_level = 0;
2659
Yuval Mintzfefb0202016-05-11 16:36:19 +03002660 switch ((enum qede_pci_private)id->driver_data) {
2661 case QEDE_PRIVATE_VF:
2662 if (debug & QED_LOG_VERBOSE_MASK)
2663 dev_err(&pdev->dev, "Probing a VF\n");
2664 is_vf = true;
2665 break;
2666 default:
2667 if (debug & QED_LOG_VERBOSE_MASK)
2668 dev_err(&pdev->dev, "Probing a PF\n");
2669 }
2670
Yuval Mintze712d522015-10-26 11:02:27 +02002671 qede_config_debug(debug, &dp_module, &dp_level);
2672
Yuval Mintzfefb0202016-05-11 16:36:19 +03002673 return __qede_probe(pdev, dp_module, dp_level, is_vf,
Yuval Mintze712d522015-10-26 11:02:27 +02002674 QEDE_PROBE_NORMAL);
2675}
2676
2677enum qede_remove_mode {
2678 QEDE_REMOVE_NORMAL,
2679};
2680
2681static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2682{
2683 struct net_device *ndev = pci_get_drvdata(pdev);
2684 struct qede_dev *edev = netdev_priv(ndev);
2685 struct qed_dev *cdev = edev->cdev;
2686
2687 DP_INFO(edev, "Starting qede_remove\n");
2688
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02002689 cancel_delayed_work_sync(&edev->sp_task);
Ram Amranicee9fbd2016-10-01 21:59:56 +03002690
Yuval Mintz29502192015-10-26 11:02:29 +02002691 unregister_netdev(ndev);
2692
Ram Amranicee9fbd2016-10-01 21:59:56 +03002693 qede_roce_dev_remove(edev);
2694
Yuval Mintze712d522015-10-26 11:02:27 +02002695 edev->ops->common->set_power_state(cdev, PCI_D0);
2696
2697 pci_set_drvdata(pdev, NULL);
2698
2699 free_netdev(ndev);
2700
2701 /* Use global ops since we've freed edev */
2702 qed_ops->common->slowpath_stop(cdev);
2703 qed_ops->common->remove(cdev);
2704
Yuval Mintz525ef5c2016-08-15 10:42:45 +03002705 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
Yuval Mintze712d522015-10-26 11:02:27 +02002706}
2707
2708static void qede_remove(struct pci_dev *pdev)
2709{
2710 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2711}
Yuval Mintz29502192015-10-26 11:02:29 +02002712
2713/* -------------------------------------------------------------------------
2714 * START OF LOAD / UNLOAD
2715 * -------------------------------------------------------------------------
2716 */
2717
2718static int qede_set_num_queues(struct qede_dev *edev)
2719{
2720 int rc;
2721 u16 rss_num;
2722
2723 /* Setup queues according to possible resources*/
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002724 if (edev->req_queues)
2725 rss_num = edev->req_queues;
Sudarsana Kalluru8edf0492015-11-30 12:25:01 +02002726 else
2727 rss_num = netif_get_num_default_rss_queues() *
2728 edev->dev_info.common.num_hwfns;
Yuval Mintz29502192015-10-26 11:02:29 +02002729
2730 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2731
2732 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2733 if (rc > 0) {
2734 /* Managed to request interrupts for our queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002735 edev->num_queues = rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002736 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002737 QEDE_QUEUE_CNT(edev), rss_num);
Yuval Mintz29502192015-10-26 11:02:29 +02002738 rc = 0;
2739 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04002740
2741 edev->fp_num_tx = edev->req_num_tx;
2742 edev->fp_num_rx = edev->req_num_rx;
2743
Yuval Mintz29502192015-10-26 11:02:29 +02002744 return rc;
2745}
2746
2747static void qede_free_mem_sb(struct qede_dev *edev,
2748 struct qed_sb_info *sb_info)
2749{
2750 if (sb_info->sb_virt)
2751 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2752 (void *)sb_info->sb_virt, sb_info->sb_phys);
2753}
2754
2755/* This function allocates fast-path status block memory */
2756static int qede_alloc_mem_sb(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002757 struct qed_sb_info *sb_info, u16 sb_id)
Yuval Mintz29502192015-10-26 11:02:29 +02002758{
2759 struct status_block *sb_virt;
2760 dma_addr_t sb_phys;
2761 int rc;
2762
2763 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002764 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
Yuval Mintz29502192015-10-26 11:02:29 +02002765 if (!sb_virt) {
2766 DP_ERR(edev, "Status block allocation failed\n");
2767 return -ENOMEM;
2768 }
2769
2770 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2771 sb_virt, sb_phys, sb_id,
2772 QED_SB_TYPE_L2_QUEUE);
2773 if (rc) {
2774 DP_ERR(edev, "Status block initialization failed\n");
2775 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2776 sb_virt, sb_phys);
2777 return rc;
2778 }
2779
2780 return 0;
2781}
2782
2783static void qede_free_rx_buffers(struct qede_dev *edev,
2784 struct qede_rx_queue *rxq)
2785{
2786 u16 i;
2787
2788 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2789 struct sw_rx_data *rx_buf;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002790 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002791
2792 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2793 data = rx_buf->data;
2794
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002795 dma_unmap_page(&edev->pdev->dev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03002796 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002797
2798 rx_buf->data = NULL;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002799 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002800 }
2801}
2802
Yuval Mintz1a635e42016-08-15 10:42:43 +03002803static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2804{
Manish Chopra55482ed2016-03-04 12:35:06 -05002805 int i;
2806
2807 if (edev->gro_disable)
2808 return;
2809
2810 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2811 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2812 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2813
Manish Chopraf86af2d2016-04-20 03:03:27 -04002814 if (replace_buf->data) {
Manish Chopra55482ed2016-03-04 12:35:06 -05002815 dma_unmap_page(&edev->pdev->dev,
Manish Chopra09ec8e72016-05-18 07:43:57 -04002816 replace_buf->mapping,
Manish Chopra55482ed2016-03-04 12:35:06 -05002817 PAGE_SIZE, DMA_FROM_DEVICE);
2818 __free_page(replace_buf->data);
2819 }
2820 }
2821}
2822
Yuval Mintz1a635e42016-08-15 10:42:43 +03002823static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002824{
Manish Chopra55482ed2016-03-04 12:35:06 -05002825 qede_free_sge_mem(edev, rxq);
2826
Yuval Mintz29502192015-10-26 11:02:29 +02002827 /* Free rx buffers */
2828 qede_free_rx_buffers(edev, rxq);
2829
2830 /* Free the parallel SW ring */
2831 kfree(rxq->sw_rx_ring);
2832
2833 /* Free the real RQ ring used by FW */
2834 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2835 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2836}
2837
2838static int qede_alloc_rx_buffer(struct qede_dev *edev,
2839 struct qede_rx_queue *rxq)
2840{
2841 struct sw_rx_data *sw_rx_data;
2842 struct eth_rx_bd *rx_bd;
2843 dma_addr_t mapping;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002844 struct page *data;
Yuval Mintz29502192015-10-26 11:02:29 +02002845
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002846 data = alloc_pages(GFP_ATOMIC, 0);
Yuval Mintz29502192015-10-26 11:02:29 +02002847 if (unlikely(!data)) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002848 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
Yuval Mintz29502192015-10-26 11:02:29 +02002849 return -ENOMEM;
2850 }
2851
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002852 /* Map the entire page as it would be used
2853 * for multiple RX buffer segment size mapping.
2854 */
2855 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2856 PAGE_SIZE, DMA_FROM_DEVICE);
Yuval Mintz29502192015-10-26 11:02:29 +02002857 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002858 __free_page(data);
Yuval Mintz29502192015-10-26 11:02:29 +02002859 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2860 return -ENOMEM;
2861 }
2862
2863 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002864 sw_rx_data->page_offset = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02002865 sw_rx_data->data = data;
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002866 sw_rx_data->mapping = mapping;
Yuval Mintz29502192015-10-26 11:02:29 +02002867
2868 /* Advance PROD and get BD pointer */
2869 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2870 WARN_ON(!rx_bd);
2871 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2872 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2873
2874 rxq->sw_rx_prod++;
2875
2876 return 0;
2877}
2878
Yuval Mintz1a635e42016-08-15 10:42:43 +03002879static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
Manish Chopra55482ed2016-03-04 12:35:06 -05002880{
2881 dma_addr_t mapping;
2882 int i;
2883
2884 if (edev->gro_disable)
2885 return 0;
2886
2887 if (edev->ndev->mtu > PAGE_SIZE) {
2888 edev->gro_disable = 1;
2889 return 0;
2890 }
2891
2892 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2893 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2894 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2895
2896 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2897 if (unlikely(!replace_buf->data)) {
2898 DP_NOTICE(edev,
2899 "Failed to allocate TPA skb pool [replacement buffer]\n");
2900 goto err;
2901 }
2902
2903 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2904 rxq->rx_buf_size, DMA_FROM_DEVICE);
2905 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2906 DP_NOTICE(edev,
2907 "Failed to map TPA replacement buffer\n");
2908 goto err;
2909 }
2910
Manish Chopra09ec8e72016-05-18 07:43:57 -04002911 replace_buf->mapping = mapping;
Manish Chopra55482ed2016-03-04 12:35:06 -05002912 tpa_info->replace_buf.page_offset = 0;
2913
2914 tpa_info->replace_buf_mapping = mapping;
2915 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2916 }
2917
2918 return 0;
2919err:
2920 qede_free_sge_mem(edev, rxq);
2921 edev->gro_disable = 1;
2922 return -ENOMEM;
2923}
2924
Yuval Mintz29502192015-10-26 11:02:29 +02002925/* This function allocates all memory needed per Rx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002926static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
Yuval Mintz29502192015-10-26 11:02:29 +02002927{
Manish Chopraf86af2d2016-04-20 03:03:27 -04002928 int i, rc, size;
Yuval Mintz29502192015-10-26 11:02:29 +02002929
2930 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2931
Yuval Mintz1a635e42016-08-15 10:42:43 +03002932 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2933
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002934 if (rxq->rx_buf_size > PAGE_SIZE)
2935 rxq->rx_buf_size = PAGE_SIZE;
2936
2937 /* Segment size to spilt a page in multiple equal parts */
2938 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
Yuval Mintz29502192015-10-26 11:02:29 +02002939
2940 /* Allocate the parallel driver ring for Rx buffers */
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002941 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
Yuval Mintz29502192015-10-26 11:02:29 +02002942 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2943 if (!rxq->sw_rx_ring) {
2944 DP_ERR(edev, "Rx buffers ring allocation failed\n");
Manish Chopraf86af2d2016-04-20 03:03:27 -04002945 rc = -ENOMEM;
Yuval Mintz29502192015-10-26 11:02:29 +02002946 goto err;
2947 }
2948
2949 /* Allocate FW Rx ring */
2950 rc = edev->ops->common->chain_alloc(edev->cdev,
2951 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2952 QED_CHAIN_MODE_NEXT_PTR,
Yuval Mintza91eb522016-06-03 14:35:32 +03002953 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002954 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002955 sizeof(struct eth_rx_bd),
2956 &rxq->rx_bd_ring);
2957
2958 if (rc)
2959 goto err;
2960
2961 /* Allocate FW completion ring */
2962 rc = edev->ops->common->chain_alloc(edev->cdev,
2963 QED_CHAIN_USE_TO_CONSUME,
2964 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03002965 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintzfc48b7a2016-02-15 13:22:35 -05002966 RX_RING_SIZE,
Yuval Mintz29502192015-10-26 11:02:29 +02002967 sizeof(union eth_rx_cqe),
2968 &rxq->rx_comp_ring);
2969 if (rc)
2970 goto err;
2971
2972 /* Allocate buffers for the Rx ring */
2973 for (i = 0; i < rxq->num_rx_buffers; i++) {
2974 rc = qede_alloc_rx_buffer(edev, rxq);
Manish Chopraf86af2d2016-04-20 03:03:27 -04002975 if (rc) {
2976 DP_ERR(edev,
2977 "Rx buffers allocation failed at index %d\n", i);
2978 goto err;
2979 }
Yuval Mintz29502192015-10-26 11:02:29 +02002980 }
2981
Manish Chopraf86af2d2016-04-20 03:03:27 -04002982 rc = qede_alloc_sge_mem(edev, rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02002983err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04002984 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02002985}
2986
Yuval Mintz1a635e42016-08-15 10:42:43 +03002987static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002988{
2989 /* Free the parallel SW ring */
2990 kfree(txq->sw_tx_ring);
2991
2992 /* Free the real RQ ring used by FW */
2993 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2994}
2995
2996/* This function allocates all memory needed per Tx queue */
Yuval Mintz1a635e42016-08-15 10:42:43 +03002997static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
Yuval Mintz29502192015-10-26 11:02:29 +02002998{
2999 int size, rc;
3000 union eth_tx_bd_types *p_virt;
3001
3002 txq->num_tx_buffers = edev->q_num_tx_buffers;
3003
3004 /* Allocate the parallel driver ring for Tx buffers */
3005 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
3006 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
3007 if (!txq->sw_tx_ring) {
3008 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
3009 goto err;
3010 }
3011
3012 rc = edev->ops->common->chain_alloc(edev->cdev,
3013 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
3014 QED_CHAIN_MODE_PBL,
Yuval Mintza91eb522016-06-03 14:35:32 +03003015 QED_CHAIN_CNT_TYPE_U16,
Yuval Mintz29502192015-10-26 11:02:29 +02003016 NUM_TX_BDS_MAX,
Yuval Mintza91eb522016-06-03 14:35:32 +03003017 sizeof(*p_virt), &txq->tx_pbl);
Yuval Mintz29502192015-10-26 11:02:29 +02003018 if (rc)
3019 goto err;
3020
3021 return 0;
3022
3023err:
3024 qede_free_mem_txq(edev, txq);
3025 return -ENOMEM;
3026}
3027
3028/* This function frees all memory of a single fp */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003029static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003030{
3031 int tc;
3032
3033 qede_free_mem_sb(edev, fp->sb_info);
3034
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003035 if (fp->type & QEDE_FASTPATH_RX)
3036 qede_free_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003037
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003038 if (fp->type & QEDE_FASTPATH_TX)
3039 for (tc = 0; tc < edev->num_tc; tc++)
3040 qede_free_mem_txq(edev, &fp->txqs[tc]);
Yuval Mintz29502192015-10-26 11:02:29 +02003041}
3042
3043/* This function allocates all memory needed for a single fp (i.e. an entity
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003044 * which contains status block, one rx queue and/or multiple per-TC tx queues.
Yuval Mintz29502192015-10-26 11:02:29 +02003045 */
Yuval Mintz1a635e42016-08-15 10:42:43 +03003046static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
Yuval Mintz29502192015-10-26 11:02:29 +02003047{
3048 int rc, tc;
3049
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003050 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
Yuval Mintz29502192015-10-26 11:02:29 +02003051 if (rc)
3052 goto err;
3053
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003054 if (fp->type & QEDE_FASTPATH_RX) {
3055 rc = qede_alloc_mem_rxq(edev, fp->rxq);
Yuval Mintz29502192015-10-26 11:02:29 +02003056 if (rc)
3057 goto err;
3058 }
3059
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003060 if (fp->type & QEDE_FASTPATH_TX) {
3061 for (tc = 0; tc < edev->num_tc; tc++) {
3062 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
3063 if (rc)
3064 goto err;
3065 }
3066 }
3067
Yuval Mintz29502192015-10-26 11:02:29 +02003068 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003069err:
Manish Chopraf86af2d2016-04-20 03:03:27 -04003070 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003071}
3072
3073static void qede_free_mem_load(struct qede_dev *edev)
3074{
3075 int i;
3076
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003077 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003078 struct qede_fastpath *fp = &edev->fp_array[i];
3079
3080 qede_free_mem_fp(edev, fp);
3081 }
3082}
3083
3084/* This function allocates all qede memory at NIC load. */
3085static int qede_alloc_mem_load(struct qede_dev *edev)
3086{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003087 int rc = 0, queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003088
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003089 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3090 struct qede_fastpath *fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003091
3092 rc = qede_alloc_mem_fp(edev, fp);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003093 if (rc) {
Yuval Mintz29502192015-10-26 11:02:29 +02003094 DP_ERR(edev,
Manish Chopraf86af2d2016-04-20 03:03:27 -04003095 "Failed to allocate memory for fastpath - rss id = %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003096 queue_id);
Manish Chopraf86af2d2016-04-20 03:03:27 -04003097 qede_free_mem_load(edev);
3098 return rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003099 }
Yuval Mintz29502192015-10-26 11:02:29 +02003100 }
3101
3102 return 0;
3103}
3104
3105/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3106static void qede_init_fp(struct qede_dev *edev)
3107{
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003108 int queue_id, rxq_index = 0, txq_index = 0, tc;
Yuval Mintz29502192015-10-26 11:02:29 +02003109 struct qede_fastpath *fp;
3110
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003111 for_each_queue(queue_id) {
3112 fp = &edev->fp_array[queue_id];
Yuval Mintz29502192015-10-26 11:02:29 +02003113
3114 fp->edev = edev;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003115 fp->id = queue_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003116
3117 memset((void *)&fp->napi, 0, sizeof(fp->napi));
3118
3119 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
3120
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003121 if (fp->type & QEDE_FASTPATH_RX) {
3122 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
3123 fp->rxq->rxq_id = rxq_index++;
3124 }
Yuval Mintz29502192015-10-26 11:02:29 +02003125
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003126 if (fp->type & QEDE_FASTPATH_TX) {
3127 memset((void *)fp->txqs, 0,
3128 (edev->num_tc * sizeof(*fp->txqs)));
3129 for (tc = 0; tc < edev->num_tc; tc++) {
3130 fp->txqs[tc].index = txq_index +
3131 tc * QEDE_TSS_COUNT(edev);
3132 if (edev->dev_info.is_legacy)
3133 fp->txqs[tc].is_legacy = true;
3134 }
3135 txq_index++;
Yuval Mintz29502192015-10-26 11:02:29 +02003136 }
3137
3138 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003139 edev->ndev->name, queue_id);
Yuval Mintz29502192015-10-26 11:02:29 +02003140 }
Manish Chopra55482ed2016-03-04 12:35:06 -05003141
3142 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
Yuval Mintz29502192015-10-26 11:02:29 +02003143}
3144
3145static int qede_set_real_num_queues(struct qede_dev *edev)
3146{
3147 int rc = 0;
3148
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003149 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003150 if (rc) {
3151 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3152 return rc;
3153 }
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003154
3155 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
Yuval Mintz29502192015-10-26 11:02:29 +02003156 if (rc) {
3157 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3158 return rc;
3159 }
3160
3161 return 0;
3162}
3163
3164static void qede_napi_disable_remove(struct qede_dev *edev)
3165{
3166 int i;
3167
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003168 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003169 napi_disable(&edev->fp_array[i].napi);
3170
3171 netif_napi_del(&edev->fp_array[i].napi);
3172 }
3173}
3174
3175static void qede_napi_add_enable(struct qede_dev *edev)
3176{
3177 int i;
3178
3179 /* Add NAPI objects */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003180 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003181 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3182 qede_poll, NAPI_POLL_WEIGHT);
3183 napi_enable(&edev->fp_array[i].napi);
3184 }
3185}
3186
3187static void qede_sync_free_irqs(struct qede_dev *edev)
3188{
3189 int i;
3190
3191 for (i = 0; i < edev->int_info.used_cnt; i++) {
3192 if (edev->int_info.msix_cnt) {
3193 synchronize_irq(edev->int_info.msix[i].vector);
3194 free_irq(edev->int_info.msix[i].vector,
3195 &edev->fp_array[i]);
3196 } else {
3197 edev->ops->common->simd_handler_clean(edev->cdev, i);
3198 }
3199 }
3200
3201 edev->int_info.used_cnt = 0;
3202}
3203
3204static int qede_req_msix_irqs(struct qede_dev *edev)
3205{
3206 int i, rc;
3207
3208 /* Sanitize number of interrupts == number of prepared RSS queues */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003209 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
Yuval Mintz29502192015-10-26 11:02:29 +02003210 DP_ERR(edev,
3211 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003212 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
Yuval Mintz29502192015-10-26 11:02:29 +02003213 return -EINVAL;
3214 }
3215
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003216 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
Yuval Mintz29502192015-10-26 11:02:29 +02003217 rc = request_irq(edev->int_info.msix[i].vector,
3218 qede_msix_fp_int, 0, edev->fp_array[i].name,
3219 &edev->fp_array[i]);
3220 if (rc) {
3221 DP_ERR(edev, "Request fp %d irq failed\n", i);
3222 qede_sync_free_irqs(edev);
3223 return rc;
3224 }
3225 DP_VERBOSE(edev, NETIF_MSG_INTR,
3226 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3227 edev->fp_array[i].name, i,
3228 &edev->fp_array[i]);
3229 edev->int_info.used_cnt++;
3230 }
3231
3232 return 0;
3233}
3234
3235static void qede_simd_fp_handler(void *cookie)
3236{
3237 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3238
3239 napi_schedule_irqoff(&fp->napi);
3240}
3241
3242static int qede_setup_irqs(struct qede_dev *edev)
3243{
3244 int i, rc = 0;
3245
3246 /* Learn Interrupt configuration */
3247 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3248 if (rc)
3249 return rc;
3250
3251 if (edev->int_info.msix_cnt) {
3252 rc = qede_req_msix_irqs(edev);
3253 if (rc)
3254 return rc;
3255 edev->ndev->irq = edev->int_info.msix[0].vector;
3256 } else {
3257 const struct qed_common_ops *ops;
3258
3259 /* qed should learn receive the RSS ids and callbacks */
3260 ops = edev->ops->common;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003261 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
Yuval Mintz29502192015-10-26 11:02:29 +02003262 ops->simd_handler_config(edev->cdev,
3263 &edev->fp_array[i], i,
3264 qede_simd_fp_handler);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003265 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003266 }
3267 return 0;
3268}
3269
3270static int qede_drain_txq(struct qede_dev *edev,
Yuval Mintz1a635e42016-08-15 10:42:43 +03003271 struct qede_tx_queue *txq, bool allow_drain)
Yuval Mintz29502192015-10-26 11:02:29 +02003272{
3273 int rc, cnt = 1000;
3274
3275 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3276 if (!cnt) {
3277 if (allow_drain) {
3278 DP_NOTICE(edev,
3279 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3280 txq->index);
3281 rc = edev->ops->common->drain(edev->cdev);
3282 if (rc)
3283 return rc;
3284 return qede_drain_txq(edev, txq, false);
3285 }
3286 DP_NOTICE(edev,
3287 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3288 txq->index, txq->sw_tx_prod,
3289 txq->sw_tx_cons);
3290 return -ENODEV;
3291 }
3292 cnt--;
3293 usleep_range(1000, 2000);
3294 barrier();
3295 }
3296
3297 /* FW finished processing, wait for HW to transmit all tx packets */
3298 usleep_range(1000, 2000);
3299
3300 return 0;
3301}
3302
3303static int qede_stop_queues(struct qede_dev *edev)
3304{
3305 struct qed_update_vport_params vport_update_params;
3306 struct qed_dev *cdev = edev->cdev;
3307 int rc, tc, i;
3308
3309 /* Disable the vport */
3310 memset(&vport_update_params, 0, sizeof(vport_update_params));
3311 vport_update_params.vport_id = 0;
3312 vport_update_params.update_vport_active_flg = 1;
3313 vport_update_params.vport_active_flg = 0;
3314 vport_update_params.update_rss_flg = 0;
3315
3316 rc = edev->ops->vport_update(cdev, &vport_update_params);
3317 if (rc) {
3318 DP_ERR(edev, "Failed to update vport\n");
3319 return rc;
3320 }
3321
3322 /* Flush Tx queues. If needed, request drain from MCP */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003323 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003324 struct qede_fastpath *fp = &edev->fp_array[i];
3325
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003326 if (fp->type & QEDE_FASTPATH_TX) {
3327 for (tc = 0; tc < edev->num_tc; tc++) {
3328 struct qede_tx_queue *txq = &fp->txqs[tc];
Yuval Mintz29502192015-10-26 11:02:29 +02003329
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003330 rc = qede_drain_txq(edev, txq, true);
3331 if (rc)
3332 return rc;
3333 }
Yuval Mintz29502192015-10-26 11:02:29 +02003334 }
3335 }
3336
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003337 /* Stop all Queues in reverse order */
3338 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
Yuval Mintz29502192015-10-26 11:02:29 +02003339 struct qed_stop_rxq_params rx_params;
3340
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003341 /* Stop the Tx Queue(s) */
3342 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
3343 for (tc = 0; tc < edev->num_tc; tc++) {
3344 struct qed_stop_txq_params tx_params;
3345 u8 val;
Yuval Mintz29502192015-10-26 11:02:29 +02003346
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003347 tx_params.rss_id = i;
3348 val = edev->fp_array[i].txqs[tc].index;
3349 tx_params.tx_queue_id = val;
3350 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3351 if (rc) {
3352 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3353 tx_params.tx_queue_id);
3354 return rc;
3355 }
Yuval Mintz29502192015-10-26 11:02:29 +02003356 }
3357 }
3358
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003359 /* Stop the Rx Queue */
3360 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
3361 memset(&rx_params, 0, sizeof(rx_params));
3362 rx_params.rss_id = i;
3363 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003364
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003365 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3366 if (rc) {
3367 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3368 return rc;
3369 }
Yuval Mintz29502192015-10-26 11:02:29 +02003370 }
3371 }
3372
3373 /* Stop the vport */
3374 rc = edev->ops->vport_stop(cdev, 0);
3375 if (rc)
3376 DP_ERR(edev, "Failed to stop VPORT\n");
3377
3378 return rc;
3379}
3380
Yuval Mintza0d26d52016-06-19 15:18:13 +03003381static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
Yuval Mintz29502192015-10-26 11:02:29 +02003382{
3383 int rc, tc, i;
Manish Chopra088c8612016-03-04 12:35:05 -05003384 int vlan_removal_en = 1;
Yuval Mintz29502192015-10-26 11:02:29 +02003385 struct qed_dev *cdev = edev->cdev;
Yuval Mintz29502192015-10-26 11:02:29 +02003386 struct qed_update_vport_params vport_update_params;
3387 struct qed_queue_start_common_params q_params;
Yuval Mintzfefb0202016-05-11 16:36:19 +03003388 struct qed_dev_info *qed_info = &edev->dev_info.common;
Manish Chopra088c8612016-03-04 12:35:05 -05003389 struct qed_start_vport_params start = {0};
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003390 bool reset_rss_indir = false;
Yuval Mintz29502192015-10-26 11:02:29 +02003391
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003392 if (!edev->num_queues) {
Yuval Mintz29502192015-10-26 11:02:29 +02003393 DP_ERR(edev,
3394 "Cannot update V-VPORT as active as there are no Rx queues\n");
3395 return -EINVAL;
3396 }
3397
Manish Chopra55482ed2016-03-04 12:35:06 -05003398 start.gro_enable = !edev->gro_disable;
Manish Chopra088c8612016-03-04 12:35:05 -05003399 start.mtu = edev->ndev->mtu;
3400 start.vport_id = 0;
3401 start.drop_ttl0 = true;
3402 start.remove_inner_vlan = vlan_removal_en;
Yuval Mintz7f7a1442016-07-27 14:45:22 +03003403 start.clear_stats = clear_stats;
Manish Chopra088c8612016-03-04 12:35:05 -05003404
3405 rc = edev->ops->vport_start(cdev, &start);
Yuval Mintz29502192015-10-26 11:02:29 +02003406
3407 if (rc) {
3408 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3409 return rc;
3410 }
3411
3412 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3413 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
Manish Chopra088c8612016-03-04 12:35:05 -05003414 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
Yuval Mintz29502192015-10-26 11:02:29 +02003415
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003416 for_each_queue(i) {
Yuval Mintz29502192015-10-26 11:02:29 +02003417 struct qede_fastpath *fp = &edev->fp_array[i];
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003418 dma_addr_t p_phys_table;
3419 u32 page_cnt;
Yuval Mintz29502192015-10-26 11:02:29 +02003420
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003421 if (fp->type & QEDE_FASTPATH_RX) {
3422 struct qede_rx_queue *rxq = fp->rxq;
3423 __le16 *val;
Yuval Mintz29502192015-10-26 11:02:29 +02003424
3425 memset(&q_params, 0, sizeof(q_params));
3426 q_params.rss_id = i;
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003427 q_params.queue_id = rxq->rxq_id;
3428 q_params.vport_id = 0;
3429 q_params.sb = fp->sb_info->igu_sb_id;
3430 q_params.sb_idx = RX_PI;
3431
3432 p_phys_table =
3433 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3434 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3435
3436 rc = edev->ops->q_rx_start(cdev, &q_params,
3437 rxq->rx_buf_size,
3438 rxq->rx_bd_ring.p_phys_addr,
3439 p_phys_table,
3440 page_cnt,
3441 &rxq->hw_rxq_prod_addr);
3442 if (rc) {
3443 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3444 rc);
3445 return rc;
3446 }
3447
3448 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3449 rxq->hw_cons_ptr = val;
3450
3451 qede_update_rx_prod(edev, rxq);
3452 }
3453
3454 if (!(fp->type & QEDE_FASTPATH_TX))
3455 continue;
3456
3457 for (tc = 0; tc < edev->num_tc; tc++) {
3458 struct qede_tx_queue *txq = &fp->txqs[tc];
3459
3460 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3461 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
3462
3463 memset(&q_params, 0, sizeof(q_params));
3464 q_params.rss_id = i;
3465 q_params.queue_id = txq->index;
Yuval Mintz29502192015-10-26 11:02:29 +02003466 q_params.vport_id = 0;
3467 q_params.sb = fp->sb_info->igu_sb_id;
3468 q_params.sb_idx = TX_PI(tc);
3469
3470 rc = edev->ops->q_tx_start(cdev, &q_params,
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003471 p_phys_table, page_cnt,
Yuval Mintz29502192015-10-26 11:02:29 +02003472 &txq->doorbell_addr);
3473 if (rc) {
3474 DP_ERR(edev, "Start TXQ #%d failed %d\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003475 txq->index, rc);
Yuval Mintz29502192015-10-26 11:02:29 +02003476 return rc;
3477 }
3478
3479 txq->hw_cons_ptr =
3480 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3481 SET_FIELD(txq->tx_db.data.params,
3482 ETH_DB_DATA_DEST, DB_DEST_XCM);
3483 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3484 DB_AGG_CMD_SET);
3485 SET_FIELD(txq->tx_db.data.params,
3486 ETH_DB_DATA_AGG_VAL_SEL,
3487 DQ_XCM_ETH_TX_BD_PROD_CMD);
3488
3489 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3490 }
3491 }
3492
3493 /* Prepare and send the vport enable */
3494 memset(&vport_update_params, 0, sizeof(vport_update_params));
Manish Chopra088c8612016-03-04 12:35:05 -05003495 vport_update_params.vport_id = start.vport_id;
Yuval Mintz29502192015-10-26 11:02:29 +02003496 vport_update_params.update_vport_active_flg = 1;
3497 vport_update_params.vport_active_flg = 1;
3498
Yuval Mintz831bfb0e2016-05-11 16:36:25 +03003499 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3500 qed_info->tx_switching) {
3501 vport_update_params.update_tx_switching_flg = 1;
3502 vport_update_params.tx_switching_flg = 1;
3503 }
3504
Yuval Mintz29502192015-10-26 11:02:29 +02003505 /* Fill struct with RSS params */
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003506 if (QEDE_RSS_COUNT(edev) > 1) {
Yuval Mintz29502192015-10-26 11:02:29 +02003507 vport_update_params.update_rss_flg = 1;
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003508
3509 /* Need to validate current RSS config uses valid entries */
3510 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3511 if (edev->rss_params.rss_ind_table[i] >=
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003512 QEDE_RSS_COUNT(edev)) {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003513 reset_rss_indir = true;
3514 break;
3515 }
3516 }
3517
3518 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3519 reset_rss_indir) {
3520 u16 val;
3521
3522 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3523 u16 indir_val;
3524
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003525 val = QEDE_RSS_COUNT(edev);
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003526 indir_val = ethtool_rxfh_indir_default(i, val);
3527 edev->rss_params.rss_ind_table[i] = indir_val;
3528 }
3529 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3530 }
3531
3532 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3533 netdev_rss_key_fill(edev->rss_params.rss_key,
3534 sizeof(edev->rss_params.rss_key));
3535 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3536 }
3537
3538 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3539 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3540 QED_RSS_IPV6 |
3541 QED_RSS_IPV4_TCP |
3542 QED_RSS_IPV6_TCP;
3543 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3544 }
3545
3546 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3547 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003548 } else {
Sudarsana Reddy Kalluru961acde2016-04-10 12:43:01 +03003549 memset(&vport_update_params.rss_params, 0,
3550 sizeof(vport_update_params.rss_params));
Yuval Mintz29502192015-10-26 11:02:29 +02003551 }
Yuval Mintz29502192015-10-26 11:02:29 +02003552
3553 rc = edev->ops->vport_update(cdev, &vport_update_params);
3554 if (rc) {
3555 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3556 return rc;
3557 }
3558
3559 return 0;
3560}
3561
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003562static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3563 enum qed_filter_xcast_params_type opcode,
3564 unsigned char *mac, int num_macs)
3565{
3566 struct qed_filter_params filter_cmd;
3567 int i;
3568
3569 memset(&filter_cmd, 0, sizeof(filter_cmd));
3570 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3571 filter_cmd.filter.mcast.type = opcode;
3572 filter_cmd.filter.mcast.num = num_macs;
3573
3574 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3575 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3576
3577 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3578}
3579
Yuval Mintz29502192015-10-26 11:02:29 +02003580enum qede_unload_mode {
3581 QEDE_UNLOAD_NORMAL,
3582};
3583
3584static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3585{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003586 struct qed_link_params link_params;
Yuval Mintz29502192015-10-26 11:02:29 +02003587 int rc;
3588
3589 DP_INFO(edev, "Starting qede unload\n");
3590
Ram Amranicee9fbd2016-10-01 21:59:56 +03003591 qede_roce_dev_event_close(edev);
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003592 mutex_lock(&edev->qede_lock);
3593 edev->state = QEDE_STATE_CLOSED;
3594
Yuval Mintz29502192015-10-26 11:02:29 +02003595 /* Close OS Tx */
3596 netif_tx_disable(edev->ndev);
3597 netif_carrier_off(edev->ndev);
3598
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003599 /* Reset the link */
3600 memset(&link_params, 0, sizeof(link_params));
3601 link_params.link_up = false;
3602 edev->ops->common->set_link(edev->cdev, &link_params);
Yuval Mintz29502192015-10-26 11:02:29 +02003603 rc = qede_stop_queues(edev);
3604 if (rc) {
3605 qede_sync_free_irqs(edev);
3606 goto out;
3607 }
3608
3609 DP_INFO(edev, "Stopped Queues\n");
3610
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003611 qede_vlan_mark_nonconfigured(edev);
Yuval Mintz29502192015-10-26 11:02:29 +02003612 edev->ops->fastpath_stop(edev->cdev);
3613
3614 /* Release the interrupts */
3615 qede_sync_free_irqs(edev);
3616 edev->ops->common->set_fp_int(edev->cdev, 0);
3617
3618 qede_napi_disable_remove(edev);
3619
3620 qede_free_mem_load(edev);
3621 qede_free_fp_array(edev);
3622
3623out:
3624 mutex_unlock(&edev->qede_lock);
3625 DP_INFO(edev, "Ending qede unload\n");
3626}
3627
3628enum qede_load_mode {
3629 QEDE_LOAD_NORMAL,
Yuval Mintza0d26d52016-06-19 15:18:13 +03003630 QEDE_LOAD_RELOAD,
Yuval Mintz29502192015-10-26 11:02:29 +02003631};
3632
3633static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3634{
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003635 struct qed_link_params link_params;
3636 struct qed_link_output link_output;
Yuval Mintz29502192015-10-26 11:02:29 +02003637 int rc;
3638
3639 DP_INFO(edev, "Starting qede load\n");
3640
3641 rc = qede_set_num_queues(edev);
3642 if (rc)
3643 goto err0;
3644
3645 rc = qede_alloc_fp_array(edev);
3646 if (rc)
3647 goto err0;
3648
3649 qede_init_fp(edev);
3650
3651 rc = qede_alloc_mem_load(edev);
3652 if (rc)
3653 goto err1;
3654 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003655 QEDE_QUEUE_CNT(edev), edev->num_tc);
Yuval Mintz29502192015-10-26 11:02:29 +02003656
3657 rc = qede_set_real_num_queues(edev);
3658 if (rc)
3659 goto err2;
3660
3661 qede_napi_add_enable(edev);
3662 DP_INFO(edev, "Napi added and enabled\n");
3663
3664 rc = qede_setup_irqs(edev);
3665 if (rc)
3666 goto err3;
3667 DP_INFO(edev, "Setup IRQs succeeded\n");
3668
Yuval Mintza0d26d52016-06-19 15:18:13 +03003669 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
Yuval Mintz29502192015-10-26 11:02:29 +02003670 if (rc)
3671 goto err4;
3672 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3673
3674 /* Add primary mac and set Rx filters */
3675 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3676
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003677 mutex_lock(&edev->qede_lock);
3678 edev->state = QEDE_STATE_OPEN;
3679 mutex_unlock(&edev->qede_lock);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003680
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003681 /* Program un-configured VLANs */
3682 qede_configure_vlan_filters(edev);
3683
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003684 /* Ask for link-up using current configuration */
3685 memset(&link_params, 0, sizeof(link_params));
3686 link_params.link_up = true;
3687 edev->ops->common->set_link(edev->cdev, &link_params);
3688
3689 /* Query whether link is already-up */
3690 memset(&link_output, 0, sizeof(link_output));
3691 edev->ops->common->get_link(edev->cdev, &link_output);
Ram Amranicee9fbd2016-10-01 21:59:56 +03003692 qede_roce_dev_event_open(edev);
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003693 qede_link_update(edev, &link_output);
3694
Yuval Mintz29502192015-10-26 11:02:29 +02003695 DP_INFO(edev, "Ending successfully qede load\n");
3696
3697 return 0;
3698
3699err4:
3700 qede_sync_free_irqs(edev);
3701 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3702err3:
3703 qede_napi_disable_remove(edev);
3704err2:
3705 qede_free_mem_load(edev);
3706err1:
3707 edev->ops->common->set_fp_int(edev->cdev, 0);
3708 qede_free_fp_array(edev);
Sudarsana Reddy Kalluru9a4d7e82016-08-23 10:56:55 -04003709 edev->num_queues = 0;
3710 edev->fp_num_tx = 0;
3711 edev->fp_num_rx = 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003712err0:
3713 return rc;
3714}
3715
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003716void qede_reload(struct qede_dev *edev,
3717 void (*func)(struct qede_dev *, union qede_reload_args *),
3718 union qede_reload_args *args)
3719{
3720 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3721 /* Call function handler to update parameters
3722 * needed for function load.
3723 */
3724 if (func)
3725 func(edev, args);
3726
Yuval Mintza0d26d52016-06-19 15:18:13 +03003727 qede_load(edev, QEDE_LOAD_RELOAD);
Sudarsana Kalluru133fac02015-10-26 11:02:34 +02003728
3729 mutex_lock(&edev->qede_lock);
3730 qede_config_rx_mode(edev->ndev);
3731 mutex_unlock(&edev->qede_lock);
3732}
3733
Yuval Mintz29502192015-10-26 11:02:29 +02003734/* called with rtnl_lock */
3735static int qede_open(struct net_device *ndev)
3736{
3737 struct qede_dev *edev = netdev_priv(ndev);
Manish Choprab18e1702016-04-14 01:38:30 -04003738 int rc;
Yuval Mintz29502192015-10-26 11:02:29 +02003739
3740 netif_carrier_off(ndev);
3741
3742 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3743
Manish Choprab18e1702016-04-14 01:38:30 -04003744 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3745
3746 if (rc)
3747 return rc;
3748
Alexander Duyckf9f082a2016-06-16 12:22:57 -07003749 udp_tunnel_get_rx_info(ndev);
3750
Manish Choprab18e1702016-04-14 01:38:30 -04003751 return 0;
Yuval Mintz29502192015-10-26 11:02:29 +02003752}
3753
3754static int qede_close(struct net_device *ndev)
3755{
3756 struct qede_dev *edev = netdev_priv(ndev);
3757
3758 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3759
3760 return 0;
3761}
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003762
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003763static void qede_link_update(void *dev, struct qed_link_output *link)
3764{
3765 struct qede_dev *edev = dev;
3766
3767 if (!netif_running(edev->ndev)) {
3768 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3769 return;
3770 }
3771
3772 if (link->link_up) {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003773 if (!netif_carrier_ok(edev->ndev)) {
3774 DP_NOTICE(edev, "Link is up\n");
3775 netif_tx_start_all_queues(edev->ndev);
3776 netif_carrier_on(edev->ndev);
3777 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003778 } else {
Yuval Mintz8e025ae2016-02-24 16:52:47 +02003779 if (netif_carrier_ok(edev->ndev)) {
3780 DP_NOTICE(edev, "Link is down\n");
3781 netif_tx_disable(edev->ndev);
3782 netif_carrier_off(edev->ndev);
3783 }
Sudarsana Kallurua2ec6172015-10-26 11:02:32 +02003784 }
3785}
3786
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003787static int qede_set_mac_addr(struct net_device *ndev, void *p)
3788{
3789 struct qede_dev *edev = netdev_priv(ndev);
3790 struct sockaddr *addr = p;
3791 int rc;
3792
3793 ASSERT_RTNL(); /* @@@TBD To be removed */
3794
3795 DP_INFO(edev, "Set_mac_addr called\n");
3796
3797 if (!is_valid_ether_addr(addr->sa_data)) {
3798 DP_NOTICE(edev, "The MAC address is not valid\n");
3799 return -EFAULT;
3800 }
3801
Yuval Mintzeff16962016-05-11 16:36:21 +03003802 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3803 DP_NOTICE(edev, "qed prevents setting MAC\n");
3804 return -EINVAL;
3805 }
3806
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003807 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3808
3809 if (!netif_running(ndev)) {
3810 DP_NOTICE(edev, "The device is currently down\n");
3811 return 0;
3812 }
3813
3814 /* Remove the previous primary mac */
3815 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3816 edev->primary_mac);
3817 if (rc)
3818 return rc;
3819
3820 /* Add MAC filter according to the new unicast HW MAC address */
3821 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3822 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3823 edev->primary_mac);
3824}
3825
3826static int
3827qede_configure_mcast_filtering(struct net_device *ndev,
3828 enum qed_filter_rx_mode_type *accept_flags)
3829{
3830 struct qede_dev *edev = netdev_priv(ndev);
3831 unsigned char *mc_macs, *temp;
3832 struct netdev_hw_addr *ha;
3833 int rc = 0, mc_count;
3834 size_t size;
3835
3836 size = 64 * ETH_ALEN;
3837
3838 mc_macs = kzalloc(size, GFP_KERNEL);
3839 if (!mc_macs) {
3840 DP_NOTICE(edev,
3841 "Failed to allocate memory for multicast MACs\n");
3842 rc = -ENOMEM;
3843 goto exit;
3844 }
3845
3846 temp = mc_macs;
3847
3848 /* Remove all previously configured MAC filters */
3849 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3850 mc_macs, 1);
3851 if (rc)
3852 goto exit;
3853
3854 netif_addr_lock_bh(ndev);
3855
3856 mc_count = netdev_mc_count(ndev);
3857 if (mc_count < 64) {
3858 netdev_for_each_mc_addr(ha, ndev) {
3859 ether_addr_copy(temp, ha->addr);
3860 temp += ETH_ALEN;
3861 }
3862 }
3863
3864 netif_addr_unlock_bh(ndev);
3865
3866 /* Check for all multicast @@@TBD resource allocation */
3867 if ((ndev->flags & IFF_ALLMULTI) ||
3868 (mc_count > 64)) {
3869 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3870 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3871 } else {
3872 /* Add all multicast MAC filters */
3873 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3874 mc_macs, mc_count);
3875 }
3876
3877exit:
3878 kfree(mc_macs);
3879 return rc;
3880}
3881
3882static void qede_set_rx_mode(struct net_device *ndev)
3883{
3884 struct qede_dev *edev = netdev_priv(ndev);
3885
3886 DP_INFO(edev, "qede_set_rx_mode called\n");
3887
3888 if (edev->state != QEDE_STATE_OPEN) {
3889 DP_INFO(edev,
3890 "qede_set_rx_mode called while interface is down\n");
3891 } else {
3892 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3893 schedule_delayed_work(&edev->sp_task, 0);
3894 }
3895}
3896
3897/* Must be called with qede_lock held */
3898static void qede_config_rx_mode(struct net_device *ndev)
3899{
3900 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3901 struct qede_dev *edev = netdev_priv(ndev);
3902 struct qed_filter_params rx_mode;
3903 unsigned char *uc_macs, *temp;
3904 struct netdev_hw_addr *ha;
3905 int rc, uc_count;
3906 size_t size;
3907
3908 netif_addr_lock_bh(ndev);
3909
3910 uc_count = netdev_uc_count(ndev);
3911 size = uc_count * ETH_ALEN;
3912
3913 uc_macs = kzalloc(size, GFP_ATOMIC);
3914 if (!uc_macs) {
3915 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3916 netif_addr_unlock_bh(ndev);
3917 return;
3918 }
3919
3920 temp = uc_macs;
3921 netdev_for_each_uc_addr(ha, ndev) {
3922 ether_addr_copy(temp, ha->addr);
3923 temp += ETH_ALEN;
3924 }
3925
3926 netif_addr_unlock_bh(ndev);
3927
3928 /* Configure the struct for the Rx mode */
3929 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3930 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3931
3932 /* Remove all previous unicast secondary macs and multicast macs
3933 * (configrue / leave the primary mac)
3934 */
3935 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3936 edev->primary_mac);
3937 if (rc)
3938 goto out;
3939
3940 /* Check for promiscuous */
3941 if ((ndev->flags & IFF_PROMISC) ||
Yuval Mintz7b7e70f2016-10-14 05:19:20 -04003942 (uc_count > edev->dev_info.num_mac_filters - 1)) {
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003943 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3944 } else {
3945 /* Add MAC filters according to the unicast secondary macs */
3946 int i;
3947
3948 temp = uc_macs;
3949 for (i = 0; i < uc_count; i++) {
3950 rc = qede_set_ucast_rx_mac(edev,
3951 QED_FILTER_XCAST_TYPE_ADD,
3952 temp);
3953 if (rc)
3954 goto out;
3955
3956 temp += ETH_ALEN;
3957 }
3958
3959 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3960 if (rc)
3961 goto out;
3962 }
3963
Sudarsana Reddy Kalluru7c1bfca2016-02-18 17:00:40 +02003964 /* take care of VLAN mode */
3965 if (ndev->flags & IFF_PROMISC) {
3966 qede_config_accept_any_vlan(edev, true);
3967 } else if (!edev->non_configured_vlans) {
3968 /* It's possible that accept_any_vlan mode is set due to a
3969 * previous setting of IFF_PROMISC. If vlan credits are
3970 * sufficient, disable accept_any_vlan.
3971 */
3972 qede_config_accept_any_vlan(edev, false);
3973 }
3974
Sudarsana Kalluru0d8e0aa2015-10-26 11:02:30 +02003975 rx_mode.filter.accept_flags = accept_flags;
3976 edev->ops->filter_config(edev->cdev, &rx_mode);
3977out:
3978 kfree(uc_macs);
3979}