blob: 125228e77c505b65a857758b4cbd0e38ce78a2f7 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080032#include "drmP.h"
33#include "drm.h"
34#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080035#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010036#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include "i915_drm.h"
38#include "i915_drv.h"
39#include "intel_sdvo_regs.h"
40
Zhenyu Wang14571b42010-03-30 14:06:33 +080041#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
Chris Wilsona0b1c7a2011-09-30 22:56:41 +010044#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
Zhenyu Wang14571b42010-03-30 14:06:33 +080045
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
Akshay Joshi0206e352011-08-16 15:34:10 -040047 SDVO_TV_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080048
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000050#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080051#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010052#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Chris Wilson52220082011-06-20 14:45:50 +010053#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080054
Jesse Barnes79e53942008-11-07 14:24:08 -080055
Chris Wilson2e88e402010-08-07 11:01:27 +010056static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080057 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64};
65
66#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
Chris Wilsonea5b2132010-08-04 13:50:23 +010068struct intel_sdvo {
69 struct intel_encoder base;
70
Chris Wilsonf899fc62010-07-20 15:44:45 -070071 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070072 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073
Chris Wilsone957d772010-09-24 12:52:03 +010074 struct i2c_adapter ddc;
75
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /* Register for the SDVO device: SDVOB or SDVOC */
Daniel Vettereef4eac2012-03-23 23:43:35 +010077 uint32_t sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080078
Jesse Barnese2f0ba92009-02-02 15:11:52 -080079 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080081
Jesse Barnese2f0ba92009-02-02 15:11:52 -080082 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
Jesse Barnes79e53942008-11-07 14:24:08 -080086 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080087
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080089 int pixel_clock_min, pixel_clock_max;
90
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080091 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
Simon Farnsworthcc68c812011-09-21 17:13:30 +010097 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 /**
Chris Wilsone953fd72011-02-21 22:23:52 +0000103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
Daniel Vettereef4eac2012-03-23 23:43:35 +0100117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
Zhao Yakuice6feab2009-08-24 13:50:26 +0800120 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100121 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800129
Ma Ling7086c872009-05-13 11:20:06 +0800130 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800133 */
134 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800135
136 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
Eric Anholtc751ce42010-03-25 11:48:48 -0700141 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800142 uint8_t ddc_bus;
143
Chris Wilson6c9547f2010-08-25 10:05:17 +0100144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146};
147
148struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100149 struct intel_connector base;
150
Zhenyu Wang14571b42010-03-30 14:06:33 +0800151 /* Mark the type of connector */
152 uint16_t output_flag;
153
Daniel Vetterc3e5f672012-02-23 17:14:47 +0100154 enum hdmi_force_audio force_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100155
Zhenyu Wang14571b42010-03-30 14:06:33 +0800156 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100157 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800158 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100159 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800160
Zhao Yakuib9219c52009-09-10 15:45:46 +0800161 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100177 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800178
179 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100180 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800181
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100184
Zhao Yakuib9219c52009-09-10 15:45:46 +0800185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100199 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800200};
201
Chris Wilson890f3352010-09-14 16:46:59 +0100202static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100203{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100204 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100205}
206
Chris Wilsondf0e9242010-09-09 16:20:55 +0100207static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208{
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
211}
212
Chris Wilson615fb932010-08-04 13:50:24 +0100213static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214{
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216}
217
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800218static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100220static bool
221intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
223 int type);
224static bool
225intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800227
Jesse Barnes79e53942008-11-07 14:24:08 -0800228/**
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
232 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100233static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800234{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100235 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800236 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800237 u32 bval = val, cval = val;
238 int i;
239
Chris Wilsonea5b2132010-08-04 13:50:23 +0100240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800243 return;
244 }
245
Chris Wilsonea5b2132010-08-04 13:50:23 +0100246 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800247 cval = I915_READ(SDVOC);
248 } else {
249 bval = I915_READ(SDVOB);
250 }
251 /*
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
255 */
256 for (i = 0; i < 2; i++)
257 {
258 I915_WRITE(SDVOB, bval);
259 I915_READ(SDVOB);
260 I915_WRITE(SDVOC, cval);
261 I915_READ(SDVOC);
262 }
263}
264
Chris Wilson32aad862010-08-04 13:50:25 +0100265static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800266{
Jesse Barnes79e53942008-11-07 14:24:08 -0800267 struct i2c_msg msgs[] = {
268 {
Chris Wilsone957d772010-09-24 12:52:03 +0100269 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 .flags = 0,
271 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100272 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 },
274 {
Chris Wilsone957d772010-09-24 12:52:03 +0100275 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 .flags = I2C_M_RD,
277 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100278 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 }
280 };
Chris Wilson32aad862010-08-04 13:50:25 +0100281 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800282
Chris Wilsonf899fc62010-07-20 15:44:45 -0700283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800284 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800285
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800287 return false;
288}
289
Jesse Barnes79e53942008-11-07 14:24:08 -0800290#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100292static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800293 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100294 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800295} sdvo_cmd_names[] = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100339
Akshay Joshi0206e352011-08-16 15:34:10 -0400340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
Chris Wilsonc5521702010-08-04 13:50:28 +0100385
Akshay Joshi0206e352011-08-16 15:34:10 -0400386 /* HDMI op code */
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800407};
408
Daniel Vettereef4eac2012-03-23 23:43:35 +0100409#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800410
Chris Wilsonea5b2132010-08-04 13:50:23 +0100411static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100412 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800413{
Jesse Barnes79e53942008-11-07 14:24:08 -0800414 int i;
415
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800416 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100417 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800418 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800419 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800420 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800421 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400422 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800423 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800424 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800425 break;
426 }
427 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400428 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800429 DRM_LOG_KMS("(%02X)", cmd);
430 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800431}
Jesse Barnes79e53942008-11-07 14:24:08 -0800432
Jesse Barnes79e53942008-11-07 14:24:08 -0800433static const char *cmd_status_names[] = {
434 "Power on",
435 "Success",
436 "Not supported",
437 "Invalid arg",
438 "Pending",
439 "Target not specified",
440 "Scaling not supported"
441};
442
Chris Wilsone957d772010-09-24 12:52:03 +0100443static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444 const void *args, int args_len)
445{
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700446 u8 *buf, status;
447 struct i2c_msg *msgs;
448 int i, ret = true;
449
450 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
451 if (!buf)
452 return false;
453
454 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
455 if (!msgs)
456 return false;
Chris Wilsone957d772010-09-24 12:52:03 +0100457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700490 ret = false;
491 goto out;
Chris Wilsone957d772010-09-24 12:52:03 +0100492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700496 ret = false;
Chris Wilsone957d772010-09-24 12:52:03 +0100497 }
498
Ben Widawsky3bf3f452012-04-16 14:07:41 -0700499out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
Chris Wilsone957d772010-09-24 12:52:03 +0100503}
504
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100505static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800507{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100508 u8 retry = 5;
509 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800510 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800511
Chris Wilsond121a5d2011-01-25 15:00:01 +0000512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000532 goto log_fail;
533 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100534
Jesse Barnes79e53942008-11-07 14:24:08 -0800535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800537 else
yakui_zhao342dc382009-06-02 14:12:00 +0800538 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800539
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800542
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800550 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100551 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100552 return true;
553
554log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000555 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100556 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800557}
558
Hannes Ederb358d0a2008-12-18 21:18:47 +0100559static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800560{
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567}
568
Chris Wilsone957d772010-09-24 12:52:03 +0100569static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800571{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000572 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
Chris Wilson32aad862010-08-04 13:50:25 +0100578static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100584}
585
586static bool
587intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588{
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593}
594
595static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800596{
597 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800601}
602
603/**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100609static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800610{
611 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800612
Chris Wilson1a3665c2011-01-25 13:59:37 +0000613 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621}
622
Chris Wilsonea5b2132010-08-04 13:50:23 +0100623static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800624 u16 outputs)
625{
Chris Wilson32aad862010-08-04 13:50:25 +0100626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800629}
630
Chris Wilsonea5b2132010-08-04 13:50:23 +0100631static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800632 int mode)
633{
Chris Wilson32aad862010-08-04 13:50:25 +0100634 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
Chris Wilson32aad862010-08-04 13:50:25 +0100651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800653}
654
Chris Wilsonea5b2132010-08-04 13:50:23 +0100655static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800656 int *clock_min,
657 int *clock_max)
658{
659 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800660
Chris Wilson1a3665c2011-01-25 13:59:37 +0000661 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 return true;
671}
672
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800674 u16 outputs)
675{
Chris Wilson32aad862010-08-04 13:50:25 +0100676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800679}
680
Chris Wilsonea5b2132010-08-04 13:50:23 +0100681static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800682 struct intel_sdvo_dtd *dtd)
683{
Chris Wilson32aad862010-08-04 13:50:25 +0100684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800686}
687
Chris Wilsonea5b2132010-08-04 13:50:23 +0100688static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800689 struct intel_sdvo_dtd *dtd)
690{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100691 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693}
694
Chris Wilsonea5b2132010-08-04 13:50:23 +0100695static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800696 struct intel_sdvo_dtd *dtd)
697{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100698 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700}
701
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800702static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100703intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707{
708 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800709
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800710 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800711 args.clock = clock;
712 args.width = width;
713 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800714 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800715
Chris Wilsonea5b2132010-08-04 13:50:23 +0100716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800719 args.scaled = 1;
720
Chris Wilson32aad862010-08-04 13:50:25 +0100721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800724}
725
Chris Wilsonea5b2132010-08-04 13:50:23 +0100726static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800727 struct intel_sdvo_dtd *dtd)
728{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735}
Jesse Barnes79e53942008-11-07 14:24:08 -0800736
Chris Wilsonea5b2132010-08-04 13:50:23 +0100737static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800738{
Chris Wilson32aad862010-08-04 13:50:25 +0100739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800740}
741
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800742static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100743 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800744{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
Daniel Vetter66518192012-04-01 19:16:18 +0200748 int mode_clock;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200750 width = mode->hdisplay;
751 height = mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800752
753 /* do some mode translations */
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200754 h_blank_len = mode->htotal - mode->hdisplay;
755 h_sync_len = mode->hsync_end - mode->hsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200757 v_blank_len = mode->vtotal - mode->vdisplay;
758 v_sync_len = mode->vsync_end - mode->vsync_start;
Jesse Barnes79e53942008-11-07 14:24:08 -0800759
Daniel Vetterc6ebd4c2012-04-24 18:27:57 +0200760 h_sync_offset = mode->hsync_start - mode->hdisplay;
761 v_sync_offset = mode->vsync_start - mode->vdisplay;
Jesse Barnes79e53942008-11-07 14:24:08 -0800762
Daniel Vetter66518192012-04-01 19:16:18 +0200763 mode_clock = mode->clock;
764 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765 mode_clock /= 10;
766 dtd->part1.clock = mode_clock;
767
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800768 dtd->part1.h_active = width & 0xff;
769 dtd->part1.h_blank = h_blank_len & 0xff;
770 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800771 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772 dtd->part1.v_active = height & 0xff;
773 dtd->part1.v_blank = v_blank_len & 0xff;
774 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800775 ((v_blank_len >> 8) & 0xf);
776
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800777 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800778 dtd->part2.h_sync_width = h_sync_len & 0xff;
779 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800780 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800781 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800782 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783 ((v_sync_len & 0x30) >> 4);
784
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800785 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800786 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800787 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800788 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800789 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800790
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800791 dtd->part2.sdvo_flags = 0;
792 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
793 dtd->part2.reserved = 0;
794}
Jesse Barnes79e53942008-11-07 14:24:08 -0800795
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100797 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800799 mode->hdisplay = dtd->part1.h_active;
800 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
801 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800802 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
804 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
805 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
806 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
807
808 mode->vdisplay = dtd->part1.v_active;
809 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
810 mode->vsync_start = mode->vdisplay;
811 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800812 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
814 mode->vsync_end = mode->vsync_start +
815 (dtd->part2.v_sync_off_width & 0xf);
816 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
817 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
818 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
819
820 mode->clock = dtd->part1.clock * 10;
821
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800822 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800823 if (dtd->part2.dtd_flags & 0x2)
824 mode->flags |= DRM_MODE_FLAG_PHSYNC;
825 if (dtd->part2.dtd_flags & 0x4)
826 mode->flags |= DRM_MODE_FLAG_PVSYNC;
827}
828
Chris Wilsone27d8532010-10-22 09:15:22 +0100829static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800830{
Chris Wilsone27d8532010-10-22 09:15:22 +0100831 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832
Chris Wilson1a3665c2011-01-25 13:59:37 +0000833 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100834 return intel_sdvo_get_value(intel_sdvo,
835 SDVO_CMD_GET_SUPP_ENCODE,
836 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800837}
838
Chris Wilsonea5b2132010-08-04 13:50:23 +0100839static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700840 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841{
Chris Wilson32aad862010-08-04 13:50:25 +0100842 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800843}
844
Chris Wilsonea5b2132010-08-04 13:50:23 +0100845static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800846 uint8_t mode)
847{
Chris Wilson32aad862010-08-04 13:50:25 +0100848 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849}
850
851#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100852static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800853{
854 int i, j;
855 uint8_t set_buf_index[2];
856 uint8_t av_split;
857 uint8_t buf_size;
858 uint8_t buf[48];
859 uint8_t *pos;
860
Chris Wilson32aad862010-08-04 13:50:25 +0100861 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862
863 for (i = 0; i <= av_split; i++) {
864 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700865 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800866 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700867 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
868 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800869
870 pos = buf;
871 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700872 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800873 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700874 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800875 pos += 8;
876 }
877 }
878}
879#endif
880
David Härdeman3c17fe42010-09-24 21:44:32 +0200881static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800882{
883 struct dip_infoframe avi_if = {
884 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200885 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800886 .len = DIP_LEN_AVI,
887 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200888 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
889 uint8_t set_buf_index[2] = { 1, 0 };
Daniel Vetter81014b92012-05-12 20:22:00 +0200890 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
891 uint64_t *data = (uint64_t *)sdvo_data;
David Härdeman3c17fe42010-09-24 21:44:32 +0200892 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800893
David Härdeman3c17fe42010-09-24 21:44:32 +0200894 intel_dip_infoframe_csum(&avi_if);
895
Daniel Vetter81014b92012-05-12 20:22:00 +0200896 /* sdvo spec says that the ecc is handled by the hw, and it looks like
897 * we must not send the ecc field, either. */
898 memcpy(sdvo_data, &avi_if, 3);
899 sdvo_data[3] = avi_if.checksum;
900 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
901
Chris Wilsond121a5d2011-01-25 15:00:01 +0000902 if (!intel_sdvo_set_value(intel_sdvo,
903 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200904 set_buf_index, 2))
905 return false;
906
Daniel Vetter81014b92012-05-12 20:22:00 +0200907 for (i = 0; i < sizeof(sdvo_data); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000908 if (!intel_sdvo_set_value(intel_sdvo,
909 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200910 data, 8))
911 return false;
912 data++;
913 }
914
Chris Wilsond121a5d2011-01-25 15:00:01 +0000915 return intel_sdvo_set_value(intel_sdvo,
916 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200917 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800918}
919
Chris Wilson32aad862010-08-04 13:50:25 +0100920static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800921{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800922 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100923 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800924
Chris Wilson40039752010-08-04 13:50:26 +0100925 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800926 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100927 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800928
Chris Wilson32aad862010-08-04 13:50:25 +0100929 BUILD_BUG_ON(sizeof(format) != 6);
930 return intel_sdvo_set_value(intel_sdvo,
931 SDVO_CMD_SET_TV_FORMAT,
932 &format, sizeof(format));
933}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800934
Chris Wilson32aad862010-08-04 13:50:25 +0100935static bool
936intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
937 struct drm_display_mode *mode)
938{
939 struct intel_sdvo_dtd output_dtd;
940
941 if (!intel_sdvo_set_target_output(intel_sdvo,
942 intel_sdvo->attached_output))
943 return false;
944
945 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
946 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
947 return false;
948
949 return true;
950}
951
952static bool
953intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
954 struct drm_display_mode *mode,
955 struct drm_display_mode *adjusted_mode)
956{
Chris Wilson32aad862010-08-04 13:50:25 +0100957 /* Reset the input timing to the screen. Assume always input 0. */
958 if (!intel_sdvo_set_target_input(intel_sdvo))
959 return false;
960
961 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
962 mode->clock / 10,
963 mode->hdisplay,
964 mode->vdisplay))
965 return false;
966
967 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100968 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100969 return false;
970
Chris Wilson6c9547f2010-08-25 10:05:17 +0100971 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100972
Chris Wilson32aad862010-08-04 13:50:25 +0100973 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800974}
975
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800976static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
977 struct drm_display_mode *mode,
978 struct drm_display_mode *adjusted_mode)
979{
Chris Wilson890f3352010-09-14 16:46:59 +0100980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100981 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800982
Chris Wilson32aad862010-08-04 13:50:25 +0100983 /* We need to construct preferred input timings based on our
984 * output timings. To do that, we have to set the output
985 * timings, even though this isn't really the right place in
986 * the sequence to do it. Oh well.
987 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100988 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100989 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800990 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100991
Pavel Roskinc74696b2010-09-02 14:46:34 -0400992 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
993 mode,
994 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100995 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100996 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100997 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800998 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800999
Pavel Roskinc74696b2010-09-02 14:46:34 -04001000 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1001 mode,
1002 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001003 }
Chris Wilson32aad862010-08-04 13:50:25 +01001004
1005 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +01001006 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +01001007 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001008 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1009 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +01001010
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001011 return true;
1012}
1013
1014static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1015 struct drm_display_mode *mode,
1016 struct drm_display_mode *adjusted_mode)
1017{
1018 struct drm_device *dev = encoder->dev;
1019 struct drm_i915_private *dev_priv = dev->dev_private;
1020 struct drm_crtc *crtc = encoder->crtc;
1021 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +01001022 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001023 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001024 struct intel_sdvo_in_out_map in_out;
Daniel Vetter66518192012-04-01 19:16:18 +02001025 struct intel_sdvo_dtd input_dtd, output_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +01001026 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1027 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001028
1029 if (!mode)
1030 return;
1031
1032 /* First, set the input mapping for the first input to our controlled
1033 * output. This is only correct if we're a single-input device, in
1034 * which case the first input is the output from the appropriate SDVO
1035 * channel on the motherboard. In a two-input device, the first input
1036 * will be SDVOB and the second SDVOC.
1037 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001038 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001039 in_out.in1 = 0;
1040
Pavel Roskinc74696b2010-09-02 14:46:34 -04001041 intel_sdvo_set_value(intel_sdvo,
1042 SDVO_CMD_SET_IN_OUT_MAP,
1043 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001044
Chris Wilson6c9547f2010-08-25 10:05:17 +01001045 /* Set the output timings to the screen */
1046 if (!intel_sdvo_set_target_output(intel_sdvo,
1047 intel_sdvo->attached_output))
1048 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001049
Daniel Vetter66518192012-04-01 19:16:18 +02001050 /* lvds has a special fixed output timing. */
1051 if (intel_sdvo->is_lvds)
1052 intel_sdvo_get_dtd_from_mode(&output_dtd,
1053 intel_sdvo->sdvo_lvds_fixed_mode);
1054 else
1055 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1056 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001057
1058 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001059 if (!intel_sdvo_set_target_input(intel_sdvo))
1060 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001061
Chris Wilson97aaf912011-01-04 20:10:52 +00001062 if (intel_sdvo->has_hdmi_monitor) {
1063 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1064 intel_sdvo_set_colorimetry(intel_sdvo,
1065 SDVO_COLORIMETRY_RGB256);
1066 intel_sdvo_set_avi_infoframe(intel_sdvo);
1067 } else
1068 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001069
Chris Wilson6c9547f2010-08-25 10:05:17 +01001070 if (intel_sdvo->is_tv &&
1071 !intel_sdvo_set_tv_format(intel_sdvo))
1072 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001073
Daniel Vetter66518192012-04-01 19:16:18 +02001074 /* We have tried to get input timing in mode_fixup, and filled into
1075 * adjusted_mode.
1076 */
1077 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001078 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001079
Chris Wilson6c9547f2010-08-25 10:05:17 +01001080 switch (pixel_multiplier) {
1081 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001082 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1083 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1084 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001085 }
Chris Wilson32aad862010-08-04 13:50:25 +01001086 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1087 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001088
1089 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001090 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanoniba68e082012-01-06 19:45:34 -02001091 /* The real mode polarity is set by the SDVO commands, using
1092 * struct intel_sdvo_dtd. */
1093 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
Chris Wilsone953fd72011-02-21 22:23:52 +00001094 if (intel_sdvo->is_hdmi)
1095 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001096 if (INTEL_INFO(dev)->gen < 5)
1097 sdvox |= SDVO_BORDER_ENABLE;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001098 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001099 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001100 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001101 case SDVOB:
1102 sdvox &= SDVOB_PRESERVE_MASK;
1103 break;
1104 case SDVOC:
1105 sdvox &= SDVOC_PRESERVE_MASK;
1106 break;
1107 }
1108 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1109 }
Paulo Zanoni3573c412011-10-14 18:16:22 -03001110
1111 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1112 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1113 else
1114 sdvox |= TRANSCODER(intel_crtc->pipe);
1115
Chris Wilsonda79de92010-11-22 11:12:46 +00001116 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001117 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001118
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001119 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001120 /* done in crtc_mode_set as the dpll_md reg must be written early */
1121 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1122 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001123 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001124 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001125 }
1126
Chris Wilson6714afb2010-12-17 04:10:51 +00001127 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1128 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001129 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001130 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001131}
1132
1133static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1134{
1135 struct drm_device *dev = encoder->dev;
1136 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001137 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001138 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001139 u32 temp;
1140
1141 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001142 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001143 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001144 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001145
1146 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001147 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001148 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001150 }
1151 }
1152 } else {
1153 bool input1, input2;
1154 int i;
1155 u8 status;
1156
Chris Wilsonea5b2132010-08-04 13:50:23 +01001157 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001158 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001159 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001160 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001161 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001162
Chris Wilson32aad862010-08-04 13:50:25 +01001163 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001164 /* Warn if the device reported failure to sync.
1165 * A lot of SDVO devices fail to notify of sync, but it's
1166 * a given it the status is a success, we succeeded.
1167 */
1168 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001169 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001170 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001171 }
1172
1173 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001174 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1175 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001176 }
1177 return;
1178}
1179
Jesse Barnes79e53942008-11-07 14:24:08 -08001180static int intel_sdvo_mode_valid(struct drm_connector *connector,
1181 struct drm_display_mode *mode)
1182{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001183 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001184
1185 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1186 return MODE_NO_DBLESCAN;
1187
Chris Wilsonea5b2132010-08-04 13:50:23 +01001188 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001189 return MODE_CLOCK_LOW;
1190
Chris Wilsonea5b2132010-08-04 13:50:23 +01001191 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001192 return MODE_CLOCK_HIGH;
1193
Chris Wilson85454232010-08-08 14:28:23 +01001194 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001195 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001196 return MODE_PANEL;
1197
Chris Wilsonea5b2132010-08-04 13:50:23 +01001198 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001199 return MODE_PANEL;
1200 }
1201
Jesse Barnes79e53942008-11-07 14:24:08 -08001202 return MODE_OK;
1203}
1204
Chris Wilsonea5b2132010-08-04 13:50:23 +01001205static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001206{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001207 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001208 if (!intel_sdvo_get_value(intel_sdvo,
1209 SDVO_CMD_GET_DEVICE_CAPS,
1210 caps, sizeof(*caps)))
1211 return false;
1212
1213 DRM_DEBUG_KMS("SDVO capabilities:\n"
1214 " vendor_id: %d\n"
1215 " device_id: %d\n"
1216 " device_rev_id: %d\n"
1217 " sdvo_version_major: %d\n"
1218 " sdvo_version_minor: %d\n"
1219 " sdvo_inputs_mask: %d\n"
1220 " smooth_scaling: %d\n"
1221 " sharp_scaling: %d\n"
1222 " up_scaling: %d\n"
1223 " down_scaling: %d\n"
1224 " stall_support: %d\n"
1225 " output_flags: %d\n",
1226 caps->vendor_id,
1227 caps->device_id,
1228 caps->device_rev_id,
1229 caps->sdvo_version_major,
1230 caps->sdvo_version_minor,
1231 caps->sdvo_inputs_mask,
1232 caps->smooth_scaling,
1233 caps->sharp_scaling,
1234 caps->up_scaling,
1235 caps->down_scaling,
1236 caps->stall_support,
1237 caps->output_flags);
1238
1239 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001240}
1241
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001242static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -08001243{
1244 u8 response[2];
Jesse Barnes79e53942008-11-07 14:24:08 -08001245
Chris Wilson32aad862010-08-04 13:50:25 +01001246 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1247 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001248}
1249
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001250static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001251{
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001252 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
Jesse Barnes79e53942008-11-07 14:24:08 -08001253
Simon Farnsworthcc68c812011-09-21 17:13:30 +01001254 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001255}
1256
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001257static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001258intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001259{
Chris Wilsonbc652122011-01-25 13:28:29 +00001260 /* Is there more than one type of output? */
Adam Jackson22944882011-06-16 16:36:24 -04001261 return hweight16(intel_sdvo->caps.output_flags) > 1;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001262}
1263
Chris Wilsonf899fc62010-07-20 15:44:45 -07001264static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001265intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001266{
Chris Wilsone957d772010-09-24 12:52:03 +01001267 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1268 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001269}
1270
Chris Wilsonff482d82010-09-15 10:40:38 +01001271/* Mac mini hack -- use the same DDC as the analog connector */
1272static struct edid *
1273intel_sdvo_get_analog_edid(struct drm_connector *connector)
1274{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001275 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001276
Chris Wilson0c1dab82010-11-23 22:37:01 +00001277 return drm_get_edid(connector,
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001278 intel_gmbus_get_adapter(dev_priv,
1279 dev_priv->crt_ddc_pin));
Chris Wilsonff482d82010-09-15 10:40:38 +01001280}
1281
Ben Widawskyc43b5632012-04-16 14:07:40 -07001282static enum drm_connector_status
Adam Jackson8bf38482011-06-16 16:36:25 -04001283intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001284{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001285 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001286 enum drm_connector_status status;
1287 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001288
Chris Wilsone957d772010-09-24 12:52:03 +01001289 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001290
Chris Wilsonea5b2132010-08-04 13:50:23 +01001291 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001292 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001293
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001294 /*
1295 * Don't use the 1 as the argument of DDC bus switch to get
1296 * the EDID. It is used for SDVO SPD ROM.
1297 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001298 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001299 intel_sdvo->ddc_bus = ddc;
1300 edid = intel_sdvo_get_edid(connector);
1301 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001302 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001303 }
Chris Wilsone957d772010-09-24 12:52:03 +01001304 /*
1305 * If we found the EDID on the other bus,
1306 * assume that is the correct DDC bus.
1307 */
1308 if (edid == NULL)
1309 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001310 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001311
1312 /*
1313 * When there is no edid and no monitor is connected with VGA
1314 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001315 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001316 if (edid == NULL)
1317 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001318
Chris Wilson2f551c82010-09-15 10:42:50 +01001319 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001320 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001321 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001322 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1323 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001324 if (intel_sdvo->is_hdmi) {
1325 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1326 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1327 }
Chris Wilson139467432011-02-09 20:01:16 +00001328 } else
1329 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001330 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001331 kfree(edid);
1332 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001333
1334 if (status == connector_status_connected) {
1335 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001336 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1337 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001338 }
1339
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001340 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001341}
1342
Chris Wilson52220082011-06-20 14:45:50 +01001343static bool
1344intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1345 struct edid *edid)
1346{
1347 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1348 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1349
1350 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1351 connector_is_digital, monitor_is_digital);
1352 return connector_is_digital == monitor_is_digital;
1353}
1354
Chris Wilson7b334fc2010-09-09 23:51:02 +01001355static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001356intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001357{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001358 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001359 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001360 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001361 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001362
Chris Wilson32aad862010-08-04 13:50:25 +01001363 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001364 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001365 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001366
1367 /* add 30ms delay when the output type might be TV */
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01001368 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001369 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001370
Chris Wilson32aad862010-08-04 13:50:25 +01001371 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1372 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001373
Chris Wilsone957d772010-09-24 12:52:03 +01001374 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1375 response & 0xff, response >> 8,
1376 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001377
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001378 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001379 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001380
Chris Wilsonea5b2132010-08-04 13:50:23 +01001381 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001382
Chris Wilson97aaf912011-01-04 20:10:52 +00001383 intel_sdvo->has_hdmi_monitor = false;
1384 intel_sdvo->has_hdmi_audio = false;
1385
Chris Wilson615fb932010-08-04 13:50:24 +01001386 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001387 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001388 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson8bf38482011-06-16 16:36:25 -04001389 ret = intel_sdvo_tmds_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001390 else {
1391 struct edid *edid;
1392
1393 /* if we have an edid check it matches the connection */
1394 edid = intel_sdvo_get_edid(connector);
1395 if (edid == NULL)
1396 edid = intel_sdvo_get_analog_edid(connector);
1397 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001398 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1399 edid))
Chris Wilson139467432011-02-09 20:01:16 +00001400 ret = connector_status_connected;
Chris Wilson52220082011-06-20 14:45:50 +01001401 else
1402 ret = connector_status_disconnected;
1403
Chris Wilson139467432011-02-09 20:01:16 +00001404 connector->display_info.raw_edid = NULL;
1405 kfree(edid);
1406 } else
1407 ret = connector_status_connected;
1408 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001409
1410 /* May update encoder flag for like clock for SDVO TV, etc.*/
1411 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001412 intel_sdvo->is_tv = false;
1413 intel_sdvo->is_lvds = false;
1414 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001415
1416 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001417 intel_sdvo->is_tv = true;
1418 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001419 }
1420 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001421 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001422 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001423
1424 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001425}
1426
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001427static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001428{
Chris Wilsonff482d82010-09-15 10:40:38 +01001429 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001430
1431 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001432 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001433
Keith Packard57cdaf92009-09-04 13:07:54 +08001434 /*
1435 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1436 * link between analog and digital outputs. So, if the regular SDVO
1437 * DDC fails, check to see if the analog output is disconnected, in
1438 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001439 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001440 if (edid == NULL)
1441 edid = intel_sdvo_get_analog_edid(connector);
1442
Chris Wilsonff482d82010-09-15 10:40:38 +01001443 if (edid != NULL) {
Chris Wilson52220082011-06-20 14:45:50 +01001444 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1445 edid)) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001446 drm_mode_connector_update_edid_property(connector, edid);
1447 drm_add_edid_modes(connector, edid);
1448 }
Chris Wilson139467432011-02-09 20:01:16 +00001449
Chris Wilsonff482d82010-09-15 10:40:38 +01001450 connector->display_info.raw_edid = NULL;
1451 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001452 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001453}
1454
1455/*
1456 * Set of SDVO TV modes.
1457 * Note! This is in reply order (see loop in get_tv_modes).
1458 * XXX: all 60Hz refresh?
1459 */
Chris Wilsonb1f559e2011-01-26 09:49:47 +00001460static const struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001461 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1462 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001464 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1465 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001467 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1468 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001470 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1471 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001473 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1474 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1477 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1480 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1483 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1486 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1489 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1492 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1495 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001497 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1498 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001500 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1501 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001503 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1504 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001506 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1507 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001509 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1510 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001512 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1513 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001515 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1516 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518};
1519
1520static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1521{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001522 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001523 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001524 uint32_t reply = 0, format_map = 0;
1525 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001526
1527 /* Read the list of supported input resolutions for the selected TV
1528 * format.
1529 */
Chris Wilson40039752010-08-04 13:50:26 +01001530 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001531 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001532 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001533
Chris Wilson32aad862010-08-04 13:50:25 +01001534 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1535 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001536
Chris Wilson32aad862010-08-04 13:50:25 +01001537 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001538 if (!intel_sdvo_write_cmd(intel_sdvo,
1539 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001540 &tv_res, sizeof(tv_res)))
1541 return;
1542 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001543 return;
1544
1545 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001546 if (reply & (1 << i)) {
1547 struct drm_display_mode *nmode;
1548 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001549 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001550 if (nmode)
1551 drm_mode_probed_add(connector, nmode);
1552 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001553}
1554
Ma Ling7086c872009-05-13 11:20:06 +08001555static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1556{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001557 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001558 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001559 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001560
1561 /*
1562 * Attempt to get the mode list from DDC.
1563 * Assume that the preferred modes are
1564 * arranged in priority order.
1565 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001566 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001567 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001568 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001569
1570 /* Fetch modes from VBT */
1571 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001572 newmode = drm_mode_duplicate(connector->dev,
1573 dev_priv->sdvo_lvds_vbt_mode);
1574 if (newmode != NULL) {
1575 /* Guarantee the mode is preferred */
1576 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1577 DRM_MODE_TYPE_DRIVER);
1578 drm_mode_probed_add(connector, newmode);
1579 }
1580 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001581
1582end:
1583 list_for_each_entry(newmode, &connector->probed_modes, head) {
1584 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001585 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001586 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001587
Chris Wilson85454232010-08-08 14:28:23 +01001588 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001589 break;
1590 }
1591 }
1592
Ma Ling7086c872009-05-13 11:20:06 +08001593}
1594
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001595static int intel_sdvo_get_modes(struct drm_connector *connector)
1596{
Chris Wilson615fb932010-08-04 13:50:24 +01001597 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001598
Chris Wilson615fb932010-08-04 13:50:24 +01001599 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001600 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001601 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001602 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001603 else
1604 intel_sdvo_get_ddc_modes(connector);
1605
Chris Wilson32aad862010-08-04 13:50:25 +01001606 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001607}
1608
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001609static void
1610intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001611{
Chris Wilson615fb932010-08-04 13:50:24 +01001612 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001613 struct drm_device *dev = connector->dev;
1614
Chris Wilsonc5521702010-08-04 13:50:28 +01001615 if (intel_sdvo_connector->left)
1616 drm_property_destroy(dev, intel_sdvo_connector->left);
1617 if (intel_sdvo_connector->right)
1618 drm_property_destroy(dev, intel_sdvo_connector->right);
1619 if (intel_sdvo_connector->top)
1620 drm_property_destroy(dev, intel_sdvo_connector->top);
1621 if (intel_sdvo_connector->bottom)
1622 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1623 if (intel_sdvo_connector->hpos)
1624 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1625 if (intel_sdvo_connector->vpos)
1626 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1627 if (intel_sdvo_connector->saturation)
1628 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1629 if (intel_sdvo_connector->contrast)
1630 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1631 if (intel_sdvo_connector->hue)
1632 drm_property_destroy(dev, intel_sdvo_connector->hue);
1633 if (intel_sdvo_connector->sharpness)
1634 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1635 if (intel_sdvo_connector->flicker_filter)
1636 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1637 if (intel_sdvo_connector->flicker_filter_2d)
1638 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1639 if (intel_sdvo_connector->flicker_filter_adaptive)
1640 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1641 if (intel_sdvo_connector->tv_luma_filter)
1642 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1643 if (intel_sdvo_connector->tv_chroma_filter)
1644 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001645 if (intel_sdvo_connector->dot_crawl)
1646 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001647 if (intel_sdvo_connector->brightness)
1648 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001649}
1650
Jesse Barnes79e53942008-11-07 14:24:08 -08001651static void intel_sdvo_destroy(struct drm_connector *connector)
1652{
Chris Wilson615fb932010-08-04 13:50:24 +01001653 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001654
Chris Wilsonc5521702010-08-04 13:50:28 +01001655 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001656 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001657 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001658
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001659 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001660 drm_sysfs_connector_remove(connector);
1661 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001662 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001663}
1664
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001665static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1666{
1667 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1668 struct edid *edid;
1669 bool has_audio = false;
1670
1671 if (!intel_sdvo->is_hdmi)
1672 return false;
1673
1674 edid = intel_sdvo_get_edid(connector);
1675 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1676 has_audio = drm_detect_monitor_audio(edid);
1677
1678 return has_audio;
1679}
1680
Zhao Yakuice6feab2009-08-24 13:50:26 +08001681static int
1682intel_sdvo_set_property(struct drm_connector *connector,
1683 struct drm_property *property,
1684 uint64_t val)
1685{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001686 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001687 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001688 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001689 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001690 uint8_t cmd;
1691 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001692
1693 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001694 if (ret)
1695 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001696
Chris Wilson3f43c482011-05-12 22:17:24 +01001697 if (property == dev_priv->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001698 int i = val;
1699 bool has_audio;
1700
1701 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001702 return 0;
1703
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001704 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001705
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001706 if (i == HDMI_AUDIO_AUTO)
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001707 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1708 else
Daniel Vetterc3e5f672012-02-23 17:14:47 +01001709 has_audio = (i == HDMI_AUDIO_ON);
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001710
1711 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001712 return 0;
1713
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001714 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001715 goto done;
1716 }
1717
Chris Wilsone953fd72011-02-21 22:23:52 +00001718 if (property == dev_priv->broadcast_rgb_property) {
1719 if (val == !!intel_sdvo->color_range)
1720 return 0;
1721
1722 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001723 goto done;
1724 }
1725
Chris Wilsonc5521702010-08-04 13:50:28 +01001726#define CHECK_PROPERTY(name, NAME) \
1727 if (intel_sdvo_connector->name == property) { \
1728 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1729 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1730 cmd = SDVO_CMD_SET_##NAME; \
1731 intel_sdvo_connector->cur_##name = temp_value; \
1732 goto set_value; \
1733 }
1734
1735 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001736 if (val >= TV_FORMAT_NUM)
1737 return -EINVAL;
1738
Chris Wilson40039752010-08-04 13:50:26 +01001739 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001740 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001741 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001742
Chris Wilson40039752010-08-04 13:50:26 +01001743 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001744 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001745 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001746 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001747 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001748 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001749 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001750 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001751 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001752
Chris Wilson615fb932010-08-04 13:50:24 +01001753 intel_sdvo_connector->left_margin = temp_value;
1754 intel_sdvo_connector->right_margin = temp_value;
1755 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001756 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001757 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001758 goto set_value;
1759 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001760 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001761 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001762 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001763 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001764
Chris Wilson615fb932010-08-04 13:50:24 +01001765 intel_sdvo_connector->left_margin = temp_value;
1766 intel_sdvo_connector->right_margin = temp_value;
1767 temp_value = intel_sdvo_connector->max_hscan -
1768 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001769 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001770 goto set_value;
1771 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001772 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001773 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001774 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001775 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001776
Chris Wilson615fb932010-08-04 13:50:24 +01001777 intel_sdvo_connector->top_margin = temp_value;
1778 intel_sdvo_connector->bottom_margin = temp_value;
1779 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001780 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001781 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001782 goto set_value;
1783 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001784 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001785 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001786 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001787 return 0;
1788
Chris Wilson615fb932010-08-04 13:50:24 +01001789 intel_sdvo_connector->top_margin = temp_value;
1790 intel_sdvo_connector->bottom_margin = temp_value;
1791 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001792 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001793 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001794 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001795 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001796 CHECK_PROPERTY(hpos, HPOS)
1797 CHECK_PROPERTY(vpos, VPOS)
1798 CHECK_PROPERTY(saturation, SATURATION)
1799 CHECK_PROPERTY(contrast, CONTRAST)
1800 CHECK_PROPERTY(hue, HUE)
1801 CHECK_PROPERTY(brightness, BRIGHTNESS)
1802 CHECK_PROPERTY(sharpness, SHARPNESS)
1803 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1804 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1805 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1806 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1807 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001808 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001809 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001810
1811 return -EINVAL; /* unknown property */
1812
1813set_value:
1814 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1815 return -EIO;
1816
1817
1818done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001819 if (intel_sdvo->base.base.crtc) {
1820 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001821 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001822 crtc->y, crtc->fb);
1823 }
1824
Chris Wilson32aad862010-08-04 13:50:25 +01001825 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001826#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001827}
1828
Jesse Barnes79e53942008-11-07 14:24:08 -08001829static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1830 .dpms = intel_sdvo_dpms,
1831 .mode_fixup = intel_sdvo_mode_fixup,
1832 .prepare = intel_encoder_prepare,
1833 .mode_set = intel_sdvo_mode_set,
1834 .commit = intel_encoder_commit,
1835};
1836
1837static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001838 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001839 .detect = intel_sdvo_detect,
1840 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001841 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001842 .destroy = intel_sdvo_destroy,
1843};
1844
1845static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1846 .get_modes = intel_sdvo_get_modes,
1847 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001848 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001849};
1850
Hannes Ederb358d0a2008-12-18 21:18:47 +01001851static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001852{
Chris Wilson890f3352010-09-14 16:46:59 +01001853 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001854
Chris Wilsonea5b2132010-08-04 13:50:23 +01001855 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001856 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001857 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001858
Chris Wilsone957d772010-09-24 12:52:03 +01001859 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001860 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001861}
1862
1863static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1864 .destroy = intel_sdvo_enc_destroy,
1865};
1866
Chris Wilsonb66d8422010-08-12 15:26:41 +01001867static void
1868intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1869{
1870 uint16_t mask = 0;
1871 unsigned int num_bits;
1872
1873 /* Make a mask of outputs less than or equal to our own priority in the
1874 * list.
1875 */
1876 switch (sdvo->controlled_output) {
1877 case SDVO_OUTPUT_LVDS1:
1878 mask |= SDVO_OUTPUT_LVDS1;
1879 case SDVO_OUTPUT_LVDS0:
1880 mask |= SDVO_OUTPUT_LVDS0;
1881 case SDVO_OUTPUT_TMDS1:
1882 mask |= SDVO_OUTPUT_TMDS1;
1883 case SDVO_OUTPUT_TMDS0:
1884 mask |= SDVO_OUTPUT_TMDS0;
1885 case SDVO_OUTPUT_RGB1:
1886 mask |= SDVO_OUTPUT_RGB1;
1887 case SDVO_OUTPUT_RGB0:
1888 mask |= SDVO_OUTPUT_RGB0;
1889 break;
1890 }
1891
1892 /* Count bits to find what number we are in the priority list. */
1893 mask &= sdvo->caps.output_flags;
1894 num_bits = hweight16(mask);
1895 /* If more than 3 outputs, default to DDC bus 3 for now. */
1896 if (num_bits > 3)
1897 num_bits = 3;
1898
1899 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1900 sdvo->ddc_bus = 1 << num_bits;
1901}
Jesse Barnes79e53942008-11-07 14:24:08 -08001902
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001903/**
1904 * Choose the appropriate DDC bus for control bus switch command for this
1905 * SDVO output based on the controlled output.
1906 *
1907 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1908 * outputs, then LVDS outputs.
1909 */
1910static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001911intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001912 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001913{
Adam Jacksonb1083332010-04-23 16:07:40 -04001914 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001915
Daniel Vettereef4eac2012-03-23 23:43:35 +01001916 if (sdvo->is_sdvob)
Adam Jacksonb1083332010-04-23 16:07:40 -04001917 mapping = &(dev_priv->sdvo_mappings[0]);
1918 else
1919 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001920
Chris Wilsonb66d8422010-08-12 15:26:41 +01001921 if (mapping->initialized)
1922 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1923 else
1924 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001925}
1926
Chris Wilsone957d772010-09-24 12:52:03 +01001927static void
1928intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1929 struct intel_sdvo *sdvo, u32 reg)
1930{
1931 struct sdvo_device_mapping *mapping;
Adam Jackson46eb3032011-06-16 16:36:23 -04001932 u8 pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001933
Daniel Vettereef4eac2012-03-23 23:43:35 +01001934 if (sdvo->is_sdvob)
Chris Wilsone957d772010-09-24 12:52:03 +01001935 mapping = &dev_priv->sdvo_mappings[0];
1936 else
1937 mapping = &dev_priv->sdvo_mappings[1];
1938
1939 pin = GMBUS_PORT_DPB;
Adam Jackson46eb3032011-06-16 16:36:23 -04001940 if (mapping->initialized)
Chris Wilsone957d772010-09-24 12:52:03 +01001941 pin = mapping->i2c_pin;
Chris Wilsone957d772010-09-24 12:52:03 +01001942
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001943 if (intel_gmbus_is_port_valid(pin)) {
1944 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
Adam Jacksond5090b92011-06-16 16:36:28 -04001945 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
Chris Wilson63abf3e2010-12-08 16:48:21 +00001946 intel_gmbus_force_bit(sdvo->i2c, true);
Adam Jackson46eb3032011-06-16 16:36:23 -04001947 } else {
Daniel Kurtz3bd7d902012-03-28 02:36:14 +08001948 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
Adam Jackson46eb3032011-06-16 16:36:23 -04001949 }
Chris Wilsone957d772010-09-24 12:52:03 +01001950}
1951
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001952static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001953intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001954{
Chris Wilson97aaf912011-01-04 20:10:52 +00001955 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001956}
1957
yakui_zhao714605e2009-05-31 17:18:07 +08001958static u8
Daniel Vettereef4eac2012-03-23 23:43:35 +01001959intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
yakui_zhao714605e2009-05-31 17:18:07 +08001960{
1961 struct drm_i915_private *dev_priv = dev->dev_private;
1962 struct sdvo_device_mapping *my_mapping, *other_mapping;
1963
Daniel Vettereef4eac2012-03-23 23:43:35 +01001964 if (sdvo->is_sdvob) {
yakui_zhao714605e2009-05-31 17:18:07 +08001965 my_mapping = &dev_priv->sdvo_mappings[0];
1966 other_mapping = &dev_priv->sdvo_mappings[1];
1967 } else {
1968 my_mapping = &dev_priv->sdvo_mappings[1];
1969 other_mapping = &dev_priv->sdvo_mappings[0];
1970 }
1971
1972 /* If the BIOS described our SDVO device, take advantage of it. */
1973 if (my_mapping->slave_addr)
1974 return my_mapping->slave_addr;
1975
1976 /* If the BIOS only described a different SDVO device, use the
1977 * address that it isn't using.
1978 */
1979 if (other_mapping->slave_addr) {
1980 if (other_mapping->slave_addr == 0x70)
1981 return 0x72;
1982 else
1983 return 0x70;
1984 }
1985
1986 /* No SDVO device info is found for another DVO port,
1987 * so use mapping assumption we had before BIOS parsing.
1988 */
Daniel Vettereef4eac2012-03-23 23:43:35 +01001989 if (sdvo->is_sdvob)
yakui_zhao714605e2009-05-31 17:18:07 +08001990 return 0x70;
1991 else
1992 return 0x72;
1993}
1994
Zhenyu Wang14571b42010-03-30 14:06:33 +08001995static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001996intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1997 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001998{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001999 drm_connector_init(encoder->base.base.dev,
2000 &connector->base.base,
2001 &intel_sdvo_connector_funcs,
2002 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002003
Chris Wilsondf0e9242010-09-09 16:20:55 +01002004 drm_connector_helper_add(&connector->base.base,
2005 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002006
Peter Ross8f4839e2012-01-28 14:49:25 +01002007 connector->base.base.interlace_allowed = 1;
Chris Wilsondf0e9242010-09-09 16:20:55 +01002008 connector->base.base.doublescan_allowed = 0;
2009 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002010
Chris Wilsondf0e9242010-09-09 16:20:55 +01002011 intel_connector_attach_encoder(&connector->base, &encoder->base);
2012 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002013}
2014
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002015static void
2016intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2017{
2018 struct drm_device *dev = connector->base.base.dev;
2019
Chris Wilson3f43c482011-05-12 22:17:24 +01002020 intel_attach_force_audio_property(&connector->base.base);
Chris Wilsone953fd72011-02-21 22:23:52 +00002021 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2022 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002023}
2024
Zhenyu Wang14571b42010-03-30 14:06:33 +08002025static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002026intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002027{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002028 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002029 struct drm_connector *connector;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002030 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002031 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002032 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002033
Chris Wilson615fb932010-08-04 13:50:24 +01002034 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2035 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002036 return false;
2037
Zhenyu Wang14571b42010-03-30 14:06:33 +08002038 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002039 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002040 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002044 }
2045
Chris Wilson615fb932010-08-04 13:50:24 +01002046 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002047 connector = &intel_connector->base;
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002048 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2049 connector->polled = DRM_CONNECTOR_POLL_HPD;
2050 intel_sdvo->hotplug_active[0] |= 1 << device;
2051 /* Some SDVO devices have one-shot hotplug interrupts.
2052 * Ensure that they get re-enabled when an interrupt happens.
2053 */
2054 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2055 intel_sdvo_enable_hotplug(intel_encoder);
2056 }
2057 else
2058 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002059 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2060 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2061
Chris Wilsone27d8532010-10-22 09:15:22 +01002062 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002063 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002064 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002065 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002066 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2067 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002068
Chris Wilsondf0e9242010-09-09 16:20:55 +01002069 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002070 if (intel_sdvo->is_hdmi)
2071 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002072
2073 return true;
2074}
2075
2076static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002077intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002078{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002079 struct drm_encoder *encoder = &intel_sdvo->base.base;
2080 struct drm_connector *connector;
2081 struct intel_connector *intel_connector;
2082 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083
Chris Wilson615fb932010-08-04 13:50:24 +01002084 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2085 if (!intel_sdvo_connector)
2086 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002087
Chris Wilson615fb932010-08-04 13:50:24 +01002088 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002089 connector = &intel_connector->base;
2090 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2091 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092
Chris Wilson4ef69c72010-09-09 15:14:28 +01002093 intel_sdvo->controlled_output |= type;
2094 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002095
Chris Wilson4ef69c72010-09-09 15:14:28 +01002096 intel_sdvo->is_tv = true;
2097 intel_sdvo->base.needs_tv_clock = true;
2098 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002099
Chris Wilsondf0e9242010-09-09 16:20:55 +01002100 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002101
Chris Wilson4ef69c72010-09-09 15:14:28 +01002102 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002103 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002104
Chris Wilson4ef69c72010-09-09 15:14:28 +01002105 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002106 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002107
Chris Wilson4ef69c72010-09-09 15:14:28 +01002108 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002109
2110err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002111 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002112 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002113}
2114
2115static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002116intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002117{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002118 struct drm_encoder *encoder = &intel_sdvo->base.base;
2119 struct drm_connector *connector;
2120 struct intel_connector *intel_connector;
2121 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002122
Chris Wilson615fb932010-08-04 13:50:24 +01002123 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2124 if (!intel_sdvo_connector)
2125 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002126
Chris Wilson615fb932010-08-04 13:50:24 +01002127 intel_connector = &intel_sdvo_connector->base;
2128 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002129 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2130 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2131 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002132
Chris Wilson4ef69c72010-09-09 15:14:28 +01002133 if (device == 0) {
2134 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2135 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2136 } else if (device == 1) {
2137 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2138 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2139 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002140
Chris Wilson4ef69c72010-09-09 15:14:28 +01002141 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2142 (1 << INTEL_ANALOG_CLONE_BIT));
2143
Chris Wilsondf0e9242010-09-09 16:20:55 +01002144 intel_sdvo_connector_init(intel_sdvo_connector,
2145 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002146 return true;
2147}
2148
2149static bool
2150intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2151{
2152 struct drm_encoder *encoder = &intel_sdvo->base.base;
2153 struct drm_connector *connector;
2154 struct intel_connector *intel_connector;
2155 struct intel_sdvo_connector *intel_sdvo_connector;
2156
2157 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2158 if (!intel_sdvo_connector)
2159 return false;
2160
2161 intel_connector = &intel_sdvo_connector->base;
2162 connector = &intel_connector->base;
2163 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2164 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2165
2166 if (device == 0) {
2167 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2168 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2169 } else if (device == 1) {
2170 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2171 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2172 }
2173
2174 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002175 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002176
Chris Wilsondf0e9242010-09-09 16:20:55 +01002177 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002178 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002179 goto err;
2180
2181 return true;
2182
2183err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002184 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002185 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002186}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002187
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002188static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002189intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002190{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002191 intel_sdvo->is_tv = false;
2192 intel_sdvo->base.needs_tv_clock = false;
2193 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002194
Zhenyu Wang14571b42010-03-30 14:06:33 +08002195 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002196
Zhenyu Wang14571b42010-03-30 14:06:33 +08002197 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002198 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002199 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002200
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002202 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002203 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002204
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002206 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002207 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002208 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002209
Zhenyu Wang14571b42010-03-30 14:06:33 +08002210 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002211 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002213
Chris Wilsona0b1c7a2011-09-30 22:56:41 +01002214 if (flags & SDVO_OUTPUT_YPRPB0)
2215 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2216 return false;
2217
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002219 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002221
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002223 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002224 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002225
Zhenyu Wang14571b42010-03-30 14:06:33 +08002226 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002227 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002228 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002229
Zhenyu Wang14571b42010-03-30 14:06:33 +08002230 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002231 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002232 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002233
Zhenyu Wang14571b42010-03-30 14:06:33 +08002234 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002235 unsigned char bytes[2];
2236
Chris Wilsonea5b2132010-08-04 13:50:23 +01002237 intel_sdvo->controlled_output = 0;
2238 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002239 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002240 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002241 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002242 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002243 }
Jesse Barnes27f82272011-09-02 12:54:37 -07002244 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002245
Zhenyu Wang14571b42010-03-30 14:06:33 +08002246 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002247}
2248
Chris Wilson32aad862010-08-04 13:50:25 +01002249static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2250 struct intel_sdvo_connector *intel_sdvo_connector,
2251 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002252{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002253 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254 struct intel_sdvo_tv_format format;
2255 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002256
Chris Wilson32aad862010-08-04 13:50:25 +01002257 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2258 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002259
Chris Wilson1a3665c2011-01-25 13:59:37 +00002260 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002261 if (!intel_sdvo_get_value(intel_sdvo,
2262 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2263 &format, sizeof(format)))
2264 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002265
Chris Wilson32aad862010-08-04 13:50:25 +01002266 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002267
2268 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002269 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002270
Chris Wilson615fb932010-08-04 13:50:24 +01002271 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002272 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002273 if (format_map & (1 << i))
2274 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002275
2276
Chris Wilsonc5521702010-08-04 13:50:28 +01002277 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002278 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2279 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002280 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002281 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002282
Chris Wilson615fb932010-08-04 13:50:24 +01002283 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002284 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002285 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002286 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002287
Chris Wilson40039752010-08-04 13:50:26 +01002288 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002289 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002290 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002291 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002292
2293}
2294
Chris Wilsonc5521702010-08-04 13:50:28 +01002295#define ENHANCEMENT(name, NAME) do { \
2296 if (enhancements.name) { \
2297 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2298 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2299 return false; \
2300 intel_sdvo_connector->max_##name = data_value[0]; \
2301 intel_sdvo_connector->cur_##name = response; \
2302 intel_sdvo_connector->name = \
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002303 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
Chris Wilsonc5521702010-08-04 13:50:28 +01002304 if (!intel_sdvo_connector->name) return false; \
Chris Wilsonc5521702010-08-04 13:50:28 +01002305 drm_connector_attach_property(connector, \
2306 intel_sdvo_connector->name, \
2307 intel_sdvo_connector->cur_##name); \
2308 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2309 data_value[0], data_value[1], response); \
2310 } \
Akshay Joshi0206e352011-08-16 15:34:10 -04002311} while (0)
Chris Wilsonc5521702010-08-04 13:50:28 +01002312
2313static bool
2314intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2315 struct intel_sdvo_connector *intel_sdvo_connector,
2316 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002317{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002318 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002319 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002320 uint16_t response, data_value[2];
2321
Chris Wilsonc5521702010-08-04 13:50:28 +01002322 /* when horizontal overscan is supported, Add the left/right property */
2323 if (enhancements.overscan_h) {
2324 if (!intel_sdvo_get_value(intel_sdvo,
2325 SDVO_CMD_GET_MAX_OVERSCAN_H,
2326 &data_value, 4))
2327 return false;
2328
2329 if (!intel_sdvo_get_value(intel_sdvo,
2330 SDVO_CMD_GET_OVERSCAN_H,
2331 &response, 2))
2332 return false;
2333
2334 intel_sdvo_connector->max_hscan = data_value[0];
2335 intel_sdvo_connector->left_margin = data_value[0] - response;
2336 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2337 intel_sdvo_connector->left =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002338 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002339 if (!intel_sdvo_connector->left)
2340 return false;
2341
Chris Wilsonc5521702010-08-04 13:50:28 +01002342 drm_connector_attach_property(connector,
2343 intel_sdvo_connector->left,
2344 intel_sdvo_connector->left_margin);
2345
2346 intel_sdvo_connector->right =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002347 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002348 if (!intel_sdvo_connector->right)
2349 return false;
2350
Chris Wilsonc5521702010-08-04 13:50:28 +01002351 drm_connector_attach_property(connector,
2352 intel_sdvo_connector->right,
2353 intel_sdvo_connector->right_margin);
2354 DRM_DEBUG_KMS("h_overscan: max %d, "
2355 "default %d, current %d\n",
2356 data_value[0], data_value[1], response);
2357 }
2358
2359 if (enhancements.overscan_v) {
2360 if (!intel_sdvo_get_value(intel_sdvo,
2361 SDVO_CMD_GET_MAX_OVERSCAN_V,
2362 &data_value, 4))
2363 return false;
2364
2365 if (!intel_sdvo_get_value(intel_sdvo,
2366 SDVO_CMD_GET_OVERSCAN_V,
2367 &response, 2))
2368 return false;
2369
2370 intel_sdvo_connector->max_vscan = data_value[0];
2371 intel_sdvo_connector->top_margin = data_value[0] - response;
2372 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2373 intel_sdvo_connector->top =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002374 drm_property_create_range(dev, 0,
2375 "top_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002376 if (!intel_sdvo_connector->top)
2377 return false;
2378
Chris Wilsonc5521702010-08-04 13:50:28 +01002379 drm_connector_attach_property(connector,
2380 intel_sdvo_connector->top,
2381 intel_sdvo_connector->top_margin);
2382
2383 intel_sdvo_connector->bottom =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002384 drm_property_create_range(dev, 0,
2385 "bottom_margin", 0, data_value[0]);
Chris Wilsonc5521702010-08-04 13:50:28 +01002386 if (!intel_sdvo_connector->bottom)
2387 return false;
2388
Chris Wilsonc5521702010-08-04 13:50:28 +01002389 drm_connector_attach_property(connector,
2390 intel_sdvo_connector->bottom,
2391 intel_sdvo_connector->bottom_margin);
2392 DRM_DEBUG_KMS("v_overscan: max %d, "
2393 "default %d, current %d\n",
2394 data_value[0], data_value[1], response);
2395 }
2396
2397 ENHANCEMENT(hpos, HPOS);
2398 ENHANCEMENT(vpos, VPOS);
2399 ENHANCEMENT(saturation, SATURATION);
2400 ENHANCEMENT(contrast, CONTRAST);
2401 ENHANCEMENT(hue, HUE);
2402 ENHANCEMENT(sharpness, SHARPNESS);
2403 ENHANCEMENT(brightness, BRIGHTNESS);
2404 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2405 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2406 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2407 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2408 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2409
Chris Wilsone0442182010-08-04 13:50:29 +01002410 if (enhancements.dot_crawl) {
2411 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2412 return false;
2413
2414 intel_sdvo_connector->max_dot_crawl = 1;
2415 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2416 intel_sdvo_connector->dot_crawl =
Sascha Hauerd9bc3c02012-02-06 10:58:18 +01002417 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
Chris Wilsone0442182010-08-04 13:50:29 +01002418 if (!intel_sdvo_connector->dot_crawl)
2419 return false;
2420
Chris Wilsone0442182010-08-04 13:50:29 +01002421 drm_connector_attach_property(connector,
2422 intel_sdvo_connector->dot_crawl,
2423 intel_sdvo_connector->cur_dot_crawl);
2424 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2425 }
2426
Chris Wilsonc5521702010-08-04 13:50:28 +01002427 return true;
2428}
2429
2430static bool
2431intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2432 struct intel_sdvo_connector *intel_sdvo_connector,
2433 struct intel_sdvo_enhancements_reply enhancements)
2434{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002435 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002436 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2437 uint16_t response, data_value[2];
2438
2439 ENHANCEMENT(brightness, BRIGHTNESS);
2440
2441 return true;
2442}
2443#undef ENHANCEMENT
2444
2445static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2446 struct intel_sdvo_connector *intel_sdvo_connector)
2447{
2448 union {
2449 struct intel_sdvo_enhancements_reply reply;
2450 uint16_t response;
2451 } enhancements;
2452
Chris Wilson1a3665c2011-01-25 13:59:37 +00002453 BUILD_BUG_ON(sizeof(enhancements) != 2);
2454
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002455 enhancements.response = 0;
2456 intel_sdvo_get_value(intel_sdvo,
2457 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2458 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002459 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002460 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002461 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002462 }
Chris Wilson32aad862010-08-04 13:50:25 +01002463
Chris Wilsonc5521702010-08-04 13:50:28 +01002464 if (IS_TV(intel_sdvo_connector))
2465 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
Akshay Joshi0206e352011-08-16 15:34:10 -04002466 else if (IS_LVDS(intel_sdvo_connector))
Chris Wilsonc5521702010-08-04 13:50:28 +01002467 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2468 else
2469 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002470}
Chris Wilson32aad862010-08-04 13:50:25 +01002471
Chris Wilsone957d772010-09-24 12:52:03 +01002472static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2473 struct i2c_msg *msgs,
2474 int num)
2475{
2476 struct intel_sdvo *sdvo = adapter->algo_data;
2477
2478 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2479 return -EIO;
2480
2481 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2482}
2483
2484static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2485{
2486 struct intel_sdvo *sdvo = adapter->algo_data;
2487 return sdvo->i2c->algo->functionality(sdvo->i2c);
2488}
2489
2490static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2491 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2492 .functionality = intel_sdvo_ddc_proxy_func
2493};
2494
2495static bool
2496intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2497 struct drm_device *dev)
2498{
2499 sdvo->ddc.owner = THIS_MODULE;
2500 sdvo->ddc.class = I2C_CLASS_DDC;
2501 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2502 sdvo->ddc.dev.parent = &dev->pdev->dev;
2503 sdvo->ddc.algo_data = sdvo;
2504 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2505
2506 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002507}
2508
Daniel Vettereef4eac2012-03-23 23:43:35 +01002509bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
Jesse Barnes79e53942008-11-07 14:24:08 -08002510{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002511 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002512 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002513 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002514 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002515
Chris Wilsonea5b2132010-08-04 13:50:23 +01002516 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2517 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002518 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002519
Chris Wilson56184e32011-05-17 14:03:50 +01002520 intel_sdvo->sdvo_reg = sdvo_reg;
Daniel Vettereef4eac2012-03-23 23:43:35 +01002521 intel_sdvo->is_sdvob = is_sdvob;
2522 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
Chris Wilson56184e32011-05-17 14:03:50 +01002523 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Chris Wilsone957d772010-09-24 12:52:03 +01002524 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2525 kfree(intel_sdvo);
2526 return false;
2527 }
2528
Chris Wilson56184e32011-05-17 14:03:50 +01002529 /* encoder type will be decided later */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002530 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002531 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002532 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002533
Jesse Barnes79e53942008-11-07 14:24:08 -08002534 /* Read the regs to test if we can talk to the device */
2535 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002536 u8 byte;
2537
2538 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002539 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2540 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002541 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002542 }
2543 }
2544
Daniel Vettereef4eac2012-03-23 23:43:35 +01002545 if (intel_sdvo->is_sdvob)
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002546 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002547 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002548 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002549
Chris Wilson4ef69c72010-09-09 15:14:28 +01002550 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002551
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002552 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002553 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002554 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002555
Simon Farnsworthcc68c812011-09-21 17:13:30 +01002556 /* Set up hotplug command - note paranoia about contents of reply.
2557 * We assume that the hardware is in a sane state, and only touch
2558 * the bits we think we understand.
2559 */
2560 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2561 &intel_sdvo->hotplug_active, 2);
2562 intel_sdvo->hotplug_active[0] &= ~0x3;
2563
Chris Wilsonea5b2132010-08-04 13:50:23 +01002564 if (intel_sdvo_output_setup(intel_sdvo,
2565 intel_sdvo->caps.output_flags) != true) {
Daniel Vettereef4eac2012-03-23 23:43:35 +01002566 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2567 SDVO_NAME(intel_sdvo));
Chris Wilsonf899fc62010-07-20 15:44:45 -07002568 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002569 }
2570
Chris Wilsonea5b2132010-08-04 13:50:23 +01002571 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002572
Jesse Barnes79e53942008-11-07 14:24:08 -08002573 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002574 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002575 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002576
Chris Wilson32aad862010-08-04 13:50:25 +01002577 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2578 &intel_sdvo->pixel_clock_min,
2579 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002580 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002581
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002582 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002583 "clock range %dMHz - %dMHz, "
2584 "input 1: %c, input 2: %c, "
2585 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002586 SDVO_NAME(intel_sdvo),
2587 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2588 intel_sdvo->caps.device_rev_id,
2589 intel_sdvo->pixel_clock_min / 1000,
2590 intel_sdvo->pixel_clock_max / 1000,
2591 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2592 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002593 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002594 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002595 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002596 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002597 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002598 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002599
Chris Wilsonf899fc62010-07-20 15:44:45 -07002600err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002601 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002602 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002603 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002604
Eric Anholt7d573822009-01-02 13:33:00 -08002605 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002606}