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R Sricharan6b5de092012-05-10 19:46:00 +05301/*
Sricharan Rfa63d032013-06-07 18:52:47 +05302 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
R Sricharan6b5de092012-05-10 19:46:00 +05303 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussard98ef79572013-05-31 14:32:55 +020010#include "omap5.dtsi"
J Keerthye00c27e2013-06-13 10:00:11 +053011#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
R Sricharan6b5de092012-05-10 19:46:00 +053013
14/ {
Sricharan Rfa63d032013-06-07 18:52:47 +053015 model = "TI OMAP5 uEVM board";
16 compatible = "ti,omap5-uevm", "ti,omap5";
R Sricharan6b5de092012-05-10 19:46:00 +053017
18 memory {
19 device_type = "memory";
Santosh Shilimkar03178c62013-01-18 11:43:16 +053020 reg = <0x80000000 0x7F000000>; /* 2032 MB */
R Sricharan6b5de092012-05-10 19:46:00 +053021 };
Balaji T K5dd18b02012-08-07 12:48:21 +053022
23 vmmcsd_fixed: fixedregulator-mmcsd {
24 compatible = "regulator-fixed";
25 regulator-name = "vmmcsd_fixed";
26 regulator-min-microvolt = <3000000>;
27 regulator-max-microvolt = <3000000>;
28 };
Sourav Poddar5449fbc2012-07-25 11:03:27 +053029
Roger Quadrosed7f8e82013-06-07 18:52:48 +053030 /* HS USB Host PHY on PORT 2 */
31 hsusb2_phy: hsusb2_phy {
32 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030033 reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
Roger Quadros153030c2013-06-18 19:04:46 +030034 /**
35 * FIXME
36 * Put the right clock phandle here when available
37 * clocks = <&auxclk1>;
38 * clock-names = "main_clk";
39 */
40 clock-frequency = <19200000>;
Roger Quadrosed7f8e82013-06-07 18:52:48 +053041 };
42
Roger Quadrosed7f8e82013-06-07 18:52:48 +053043 /* HS USB Host PHY on PORT 3 */
44 hsusb3_phy: hsusb3_phy {
45 compatible = "usb-nop-xceiv";
Roger Quadros8ae9b592013-09-24 11:53:53 +030046 reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
Roger Quadrosed7f8e82013-06-07 18:52:48 +053047 };
48
Dan Murphy66155302013-06-07 18:52:49 +053049 leds {
50 compatible = "gpio-leds";
51 led@1 {
52 label = "omap5:blue:usr1";
53 gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
54 linux,default-trigger = "heartbeat";
55 default-state = "off";
56 };
57 };
Balaji T K5dd18b02012-08-07 12:48:21 +053058};
59
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030060&omap5_pmx_core {
61 pinctrl-names = "default";
62 pinctrl-0 = <
63 &twl6040_pins
64 &mcpdm_pins
65 &dmic_pins
66 &mcbsp1_pins
67 &mcbsp2_pins
Roger Quadrosed7f8e82013-06-07 18:52:48 +053068 &usbhost_pins
Dan Murphy66155302013-06-07 18:52:49 +053069 &led_gpio_pins
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030070 >;
71
72 twl6040_pins: pinmux_twl6040_pins {
73 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020074 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030075 >;
76 };
77
78 mcpdm_pins: pinmux_mcpdm_pins {
79 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020080 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
81 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
82 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
83 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
84 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030085 >;
86 };
87
88 dmic_pins: pinmux_dmic_pins {
89 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020090 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
91 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
92 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
93 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +030094 >;
95 };
96
97 mcbsp1_pins: pinmux_mcbsp1_pins {
98 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +020099 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
100 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
101 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
102 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300103 >;
104 };
105
106 mcbsp2_pins: pinmux_mcbsp2_pins {
107 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200108 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
109 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
110 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
111 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300112 >;
113 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530114
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200115 i2c1_pins: pinmux_i2c1_pins {
116 pinctrl-single,pins = <
117 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
118 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
119 >;
120 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530121
Sourav Poddar9be495c2013-02-13 14:58:22 +0530122 i2c5_pins: pinmux_i2c5_pins {
123 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200124 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
125 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
Sourav Poddar9be495c2013-02-13 14:58:22 +0530126 >;
127 };
Sourav Poddar392adaf2013-02-13 14:58:44 +0530128
129 mcspi2_pins: pinmux_mcspi2_pins {
130 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200131 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
132 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
133 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
134 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530135 >;
136 };
137
138 mcspi3_pins: pinmux_mcspi3_pins {
139 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200140 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
141 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
142 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
143 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530144 >;
145 };
146
147 mcspi4_pins: pinmux_mcspi4_pins {
148 pinctrl-single,pins = <
Florian Vaussardbcd3cca2013-05-31 14:32:59 +0200149 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
150 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
151 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
152 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
Sourav Poddar392adaf2013-02-13 14:58:44 +0530153 >;
154 };
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530155
156 usbhost_pins: pinmux_usbhost_pins {
157 pinctrl-single,pins = <
158 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
159 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
160
161 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
162 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
163
164 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
165 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
166 >;
167 };
Dan Murphy66155302013-06-07 18:52:49 +0530168
169 led_gpio_pins: pinmux_led_gpio_pins {
170 pinctrl-single,pins = <
171 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
172 >;
173 };
Sourav Poddared22fee2013-06-07 18:52:50 +0530174
175 uart1_pins: pinmux_uart1_pins {
176 pinctrl-single,pins = <
177 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
178 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
179 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
180 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
181 >;
182 };
183
184 uart3_pins: pinmux_uart3_pins {
185 pinctrl-single,pins = <
186 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
187 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
188 >;
189 };
190
191 uart5_pins: pinmux_uart5_pins {
192 pinctrl-single,pins = <
193 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
194 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
195 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
196 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
197 >;
198 };
199
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530200};
201
202&omap5_pmx_wkup {
203 pinctrl-names = "default";
204 pinctrl-0 = <
205 &usbhost_wkup_pins
206 >;
207
208 usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
209 pinctrl-single,pins = <
210 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
211 >;
212 };
Peter Ujfalusi8bbacc52012-10-04 14:57:28 +0300213};
214
Balaji T K5dd18b02012-08-07 12:48:21 +0530215&mmc1 {
Nishanth Menone18235a2013-07-29 12:03:02 -0500216 vmmc-supply = <&ldo9_reg>;
Balaji T K5dd18b02012-08-07 12:48:21 +0530217 bus-width = <4>;
218};
219
220&mmc2 {
221 vmmc-supply = <&vmmcsd_fixed>;
222 bus-width = <8>;
223 ti,non-removable;
224};
225
226&mmc3 {
227 bus-width = <4>;
228 ti,non-removable;
229};
230
231&mmc4 {
232 status = "disabled";
233};
234
235&mmc5 {
236 status = "disabled";
R Sricharan6b5de092012-05-10 19:46:00 +0530237};
Sourav Poddar08f3e212012-07-25 11:02:43 +0530238
Sourav Poddar9be495c2013-02-13 14:58:22 +0530239&i2c1 {
240 pinctrl-names = "default";
241 pinctrl-0 = <&i2c1_pins>;
242
243 clock-frequency = <400000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530244
245 palmas: palmas@48 {
246 compatible = "ti,palmas";
247 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
248 interrupt-parent = <&gic>;
249 reg = <0x48>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
252
Felipe Balbie3a412c2013-08-21 20:01:32 +0530253 extcon_usb3: palmas_usb {
254 compatible = "ti,palmas-usb-vid";
255 ti,enable-vbus-detection;
256 ti,enable-id-detection;
257 ti,wakeup;
258 };
259
J Keerthye00c27e2013-06-13 10:00:11 +0530260 palmas_pmic {
261 compatible = "ti,palmas-pmic";
262 interrupt-parent = <&palmas>;
263 interrupts = <14 IRQ_TYPE_NONE>;
264 interrupt-name = "short-irq";
265
266 ti,ldo6-vibrator;
267
268 regulators {
269 smps123_reg: smps123 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500270 /* VDD_OPP_MPU */
J Keerthye00c27e2013-06-13 10:00:11 +0530271 regulator-name = "smps123";
272 regulator-min-microvolt = < 600000>;
273 regulator-max-microvolt = <1500000>;
274 regulator-always-on;
275 regulator-boot-on;
276 };
277
278 smps45_reg: smps45 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500279 /* VDD_OPP_MM */
J Keerthye00c27e2013-06-13 10:00:11 +0530280 regulator-name = "smps45";
281 regulator-min-microvolt = < 600000>;
282 regulator-max-microvolt = <1310000>;
283 regulator-always-on;
284 regulator-boot-on;
285 };
286
287 smps6_reg: smps6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500288 /* VDD_DDR3 - over VDD_SMPS6 */
J Keerthye00c27e2013-06-13 10:00:11 +0530289 regulator-name = "smps6";
290 regulator-min-microvolt = <1200000>;
291 regulator-max-microvolt = <1200000>;
292 regulator-always-on;
293 regulator-boot-on;
294 };
295
296 smps7_reg: smps7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500297 /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */
J Keerthye00c27e2013-06-13 10:00:11 +0530298 regulator-name = "smps7";
299 regulator-min-microvolt = <1800000>;
300 regulator-max-microvolt = <1800000>;
301 regulator-always-on;
302 regulator-boot-on;
303 };
304
305 smps8_reg: smps8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500306 /* VDD_OPP_CORE */
J Keerthye00c27e2013-06-13 10:00:11 +0530307 regulator-name = "smps8";
308 regulator-min-microvolt = < 600000>;
309 regulator-max-microvolt = <1310000>;
310 regulator-always-on;
311 regulator-boot-on;
312 };
313
314 smps9_reg: smps9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500315 /* VDDA_2v1_AUD over VDD_2v1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530316 regulator-name = "smps9";
317 regulator-min-microvolt = <2100000>;
318 regulator-max-microvolt = <2100000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530319 ti,smps-range = <0x80>;
320 };
321
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530322 smps10_out2_reg: smps10_out2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500323 /* VBUS_5V_OTG */
Kishon Vijay Abraham I94489962013-08-12 15:07:01 +0530324 regulator-name = "smps10_out2";
325 regulator-min-microvolt = <5000000>;
326 regulator-max-microvolt = <5000000>;
327 regulator-always-on;
328 regulator-boot-on;
329 };
330
331 smps10_out1_reg: smps10_out1 {
332 /* VBUS_5V_OTG */
333 regulator-name = "smps10_out1";
J Keerthye00c27e2013-06-13 10:00:11 +0530334 regulator-min-microvolt = <5000000>;
335 regulator-max-microvolt = <5000000>;
336 regulator-always-on;
337 regulator-boot-on;
338 };
339
340 ldo1_reg: ldo1 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500341 /* VDDAPHY_CAM: vdda_csiport */
J Keerthye00c27e2013-06-13 10:00:11 +0530342 regulator-name = "ldo1";
Nishanth Menone18235a2013-07-29 12:03:02 -0500343 regulator-min-microvolt = <1500000>;
344 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530345 };
346
347 ldo2_reg: ldo2 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500348 /* VCC_2V8_DISP: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530349 regulator-name = "ldo2";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500350 regulator-min-microvolt = <2800000>;
351 regulator-max-microvolt = <2800000>;
352 /* Unused */
353 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530354 };
355
356 ldo3_reg: ldo3 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500357 /* VDDAPHY_MDM: vdda_lli */
J Keerthye00c27e2013-06-13 10:00:11 +0530358 regulator-name = "ldo3";
Nishanth Menone18235a2013-07-29 12:03:02 -0500359 regulator-min-microvolt = <1500000>;
360 regulator-max-microvolt = <1500000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530361 regulator-boot-on;
Nishanth Menone18235a2013-07-29 12:03:02 -0500362 /* Only if Modem is used */
363 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530364 };
365
366 ldo4_reg: ldo4 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500367 /* VDDAPHY_DISP: vdda_dsiport/hdmi */
J Keerthye00c27e2013-06-13 10:00:11 +0530368 regulator-name = "ldo4";
Nishanth Menone18235a2013-07-29 12:03:02 -0500369 regulator-min-microvolt = <1500000>;
370 regulator-max-microvolt = <1800000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530371 };
372
373 ldo5_reg: ldo5 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500374 /* VDDA_1V8_PHY: usb/sata/hdmi.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530375 regulator-name = "ldo5";
376 regulator-min-microvolt = <1800000>;
377 regulator-max-microvolt = <1800000>;
378 regulator-always-on;
379 regulator-boot-on;
380 };
381
382 ldo6_reg: ldo6 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500383 /* VDDS_1V2_WKUP: hsic/ldo_emu_wkup */
J Keerthye00c27e2013-06-13 10:00:11 +0530384 regulator-name = "ldo6";
Nishanth Menone18235a2013-07-29 12:03:02 -0500385 regulator-min-microvolt = <1200000>;
386 regulator-max-microvolt = <1200000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530387 regulator-always-on;
388 regulator-boot-on;
389 };
390
391 ldo7_reg: ldo7 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500392 /* VDD_VPP: vpp1 */
J Keerthye00c27e2013-06-13 10:00:11 +0530393 regulator-name = "ldo7";
Nishanth Menone18235a2013-07-29 12:03:02 -0500394 regulator-min-microvolt = <2000000>;
395 regulator-max-microvolt = <2000000>;
396 /* Only for efuse reprograming! */
397 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530398 };
399
400 ldo8_reg: ldo8 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500401 /* VDD_3v0: Does not go anywhere */
J Keerthye00c27e2013-06-13 10:00:11 +0530402 regulator-name = "ldo8";
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500403 regulator-min-microvolt = <3000000>;
404 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530405 regulator-boot-on;
Nishanth Menonbd3c5542013-07-29 12:03:03 -0500406 /* Unused */
407 status = "disabled";
J Keerthye00c27e2013-06-13 10:00:11 +0530408 };
409
410 ldo9_reg: ldo9 {
Nishanth Menon3709d322013-07-29 12:03:01 -0500411 /* VCC_DV_SDIO: vdds_sdcard */
J Keerthye00c27e2013-06-13 10:00:11 +0530412 regulator-name = "ldo9";
413 regulator-min-microvolt = <1800000>;
Nishanth Menone18235a2013-07-29 12:03:02 -0500414 regulator-max-microvolt = <3000000>;
J Keerthye00c27e2013-06-13 10:00:11 +0530415 regulator-boot-on;
416 };
417
418 ldoln_reg: ldoln {
Nishanth Menon3709d322013-07-29 12:03:01 -0500419 /* VDDA_1v8_REF: vdds_osc/mm_l4per.. */
J Keerthye00c27e2013-06-13 10:00:11 +0530420 regulator-name = "ldoln";
421 regulator-min-microvolt = <1800000>;
422 regulator-max-microvolt = <1800000>;
423 regulator-always-on;
424 regulator-boot-on;
425 };
426
427 ldousb_reg: ldousb {
Nishanth Menon3709d322013-07-29 12:03:01 -0500428 /* VDDA_3V_USB: VDDA_USBHS33 */
J Keerthye00c27e2013-06-13 10:00:11 +0530429 regulator-name = "ldousb";
430 regulator-min-microvolt = <3250000>;
431 regulator-max-microvolt = <3250000>;
432 regulator-always-on;
433 regulator-boot-on;
434 };
Nishanth Menone18235a2013-07-29 12:03:02 -0500435
436 regen3_reg: regen3 {
437 /* REGEN3 controls LDO9 supply to card */
438 regulator-name = "regen3";
439 regulator-always-on;
440 regulator-boot-on;
441 };
J Keerthye00c27e2013-06-13 10:00:11 +0530442 };
443 };
444 };
Sourav Poddar9be495c2013-02-13 14:58:22 +0530445};
446
Sourav Poddar9be495c2013-02-13 14:58:22 +0530447&i2c5 {
448 pinctrl-names = "default";
449 pinctrl-0 = <&i2c5_pins>;
450
451 clock-frequency = <400000>;
452};
453
Peter Ujfalusi42601d52012-10-04 14:57:24 +0300454&mcbsp3 {
455 status = "disabled";
456};
Lokesh Vutla4d2750f2012-11-05 18:22:52 +0530457
Roger Quadrosed7f8e82013-06-07 18:52:48 +0530458&usbhshost {
459 port2-mode = "ehci-hsic";
460 port3-mode = "ehci-hsic";
461};
462
463&usbhsehci {
464 phys = <0 &hsusb2_phy &hsusb3_phy>;
465};
466
Felipe Balbie3a412c2013-08-21 20:01:32 +0530467&usb3 {
468 extcon = <&extcon_usb3>;
469 vbus-supply = <&smps10_out1_reg>;
470};
471
Sourav Poddar392adaf2013-02-13 14:58:44 +0530472&mcspi1 {
473
474};
475
476&mcspi2 {
477 pinctrl-names = "default";
478 pinctrl-0 = <&mcspi2_pins>;
479};
480
481&mcspi3 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&mcspi3_pins>;
484};
485
486&mcspi4 {
487 pinctrl-names = "default";
488 pinctrl-0 = <&mcspi4_pins>;
489};
Sourav Poddared22fee2013-06-07 18:52:50 +0530490
491&uart1 {
492 pinctrl-names = "default";
493 pinctrl-0 = <&uart1_pins>;
494};
495
496&uart3 {
497 pinctrl-names = "default";
498 pinctrl-0 = <&uart3_pins>;
499};
500
501&uart5 {
502 pinctrl-names = "default";
503 pinctrl-0 = <&uart5_pins>;
504};