blob: cc5462556a83260a6ff6d062f90a8f19f59a575e [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#ifndef _MLXSW_SPECTRUM_H
38#define _MLXSW_SPECTRUM_H
39
40#include <linux/types.h>
41#include <linux/netdevice.h>
Jiri Pirko6cf3c972016-07-05 11:27:39 +020042#include <linux/rhashtable.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020043#include <linux/bitops.h>
44#include <linux/if_vlan.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010045#include <linux/list.h>
Ido Schimmel8e8dfe92016-04-06 17:10:10 +020046#include <linux/dcbnl.h>
Jiri Pirko5e9c16c2016-07-04 08:23:04 +020047#include <linux/in6.h>
Jiri Pirkob45f64d2016-09-26 12:52:31 +020048#include <linux/notifier.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020049
Elad Raz3a49b4f2016-01-10 21:06:28 +010050#include "port.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020051#include "core.h"
52
53#define MLXSW_SP_VFID_BASE VLAN_N_VID
Ido Schimmel99724c12016-07-04 08:23:14 +020054#define MLXSW_SP_VFID_MAX 6656 /* Bridged VLAN interfaces */
55
56#define MLXSW_SP_RFID_BASE 15360
Nogah Frankel8f8a62d2016-09-20 11:16:57 +020057#define MLXSW_SP_INVALID_RIF 0xffff
Ido Schimmel7f71eb42015-12-15 16:03:37 +010058
Elad Raz53ae6282016-01-10 21:06:26 +010059#define MLXSW_SP_MID_MAX 7000
60
Ido Schimmel18f1e702016-02-26 17:32:31 +010061#define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
62
Jiri Pirko53342022016-07-04 08:23:08 +020063#define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
64#define MLXSW_SP_LPM_TREE_MAX 22
65#define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
66
Ido Schimmel18f1e702016-02-26 17:32:31 +010067#define MLXSW_SP_PORT_BASE_SPEED 25000 /* Mb/s */
68
Ido Schimmel1a198442016-04-06 17:10:02 +020069#define MLXSW_SP_BYTES_PER_CELL 96
70
71#define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
Jiri Pirko0f433fa2016-04-14 18:19:24 +020072#define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
Ido Schimmel1a198442016-04-06 17:10:02 +020073
Jiri Pirkoc6022422016-07-05 11:27:46 +020074#define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
Nogah Frankel403547d2016-09-20 11:16:52 +020075#define MLXSW_SP_KVD_GRANULARITY 128
Jiri Pirkoc6022422016-07-05 11:27:46 +020076
Ido Schimmel9f7ec052016-04-06 17:10:14 +020077/* Maximum delay buffer needed in case of PAUSE frames, in cells.
78 * Assumes 100m cable and maximum MTU.
79 */
80#define MLXSW_SP_PAUSE_DELAY 612
81
Ido Schimmeld81a6bd2016-04-06 17:10:16 +020082#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
83
84static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
85{
86 delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
87 return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
88}
89
Jiri Pirko56ade8f2015-10-16 14:01:37 +020090struct mlxsw_sp_port;
91
Jiri Pirko0d65fc12015-12-03 12:12:28 +010092struct mlxsw_sp_upper {
93 struct net_device *dev;
94 unsigned int ref_count;
95};
96
Ido Schimmeld0ec8752016-06-20 23:04:12 +020097struct mlxsw_sp_fid {
Ido Schimmel1c800752016-06-20 23:04:20 +020098 void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel7f71eb42015-12-15 16:03:37 +010099 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200100 unsigned int ref_count;
101 struct net_device *dev;
Ido Schimmel99724c12016-07-04 08:23:14 +0200102 struct mlxsw_sp_rif *r;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200103 u16 fid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100104};
105
Ido Schimmelfa3054f2016-07-02 11:00:16 +0200106struct mlxsw_sp_rif {
107 struct net_device *dev;
Ido Schimmel99724c12016-07-04 08:23:14 +0200108 unsigned int ref_count;
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200109 struct mlxsw_sp_fid *f;
110 unsigned char addr[ETH_ALEN];
111 int mtu;
Ido Schimmelfa3054f2016-07-02 11:00:16 +0200112 u16 rif;
113};
114
Elad Raz3a49b4f2016-01-10 21:06:28 +0100115struct mlxsw_sp_mid {
116 struct list_head list;
117 unsigned char addr[ETH_ALEN];
118 u16 vid;
119 u16 mid;
120 unsigned int ref_count;
121};
122
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100123static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
124{
125 return MLXSW_SP_VFID_BASE + vfid;
126}
127
Ido Schimmelaac78a42015-12-15 16:03:42 +0100128static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
129{
130 return fid - MLXSW_SP_VFID_BASE;
131}
132
133static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
134{
Ido Schimmel99724c12016-07-04 08:23:14 +0200135 return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
136}
137
138static inline bool mlxsw_sp_fid_is_rfid(u16 fid)
139{
140 return fid >= MLXSW_SP_RFID_BASE;
141}
142
143static inline u16 mlxsw_sp_rif_sp_to_fid(u16 rif)
144{
145 return MLXSW_SP_RFID_BASE + rif;
Ido Schimmelaac78a42015-12-15 16:03:42 +0100146}
147
Jiri Pirko078f9c72016-04-14 18:19:19 +0200148struct mlxsw_sp_sb_pr {
149 enum mlxsw_reg_sbpr_mode mode;
150 u32 size;
151};
152
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200153struct mlxsw_cp_sb_occ {
154 u32 cur;
155 u32 max;
156};
157
Jiri Pirko078f9c72016-04-14 18:19:19 +0200158struct mlxsw_sp_sb_cm {
159 u32 min_buff;
160 u32 max_buff;
161 u8 pool;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200162 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200163};
164
165struct mlxsw_sp_sb_pm {
166 u32 min_buff;
167 u32 max_buff;
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200168 struct mlxsw_cp_sb_occ occ;
Jiri Pirko078f9c72016-04-14 18:19:19 +0200169};
170
171#define MLXSW_SP_SB_POOL_COUNT 4
172#define MLXSW_SP_SB_TC_COUNT 8
173
174struct mlxsw_sp_sb {
175 struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
176 struct {
177 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
178 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
179 } ports[MLXSW_PORT_MAX_PORTS];
180};
181
Jiri Pirko5e9c16c2016-07-04 08:23:04 +0200182#define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
183
184struct mlxsw_sp_prefix_usage {
185 DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
186};
187
Jiri Pirko53342022016-07-04 08:23:08 +0200188enum mlxsw_sp_l3proto {
189 MLXSW_SP_L3_PROTO_IPV4,
190 MLXSW_SP_L3_PROTO_IPV6,
191};
192
193struct mlxsw_sp_lpm_tree {
194 u8 id; /* tree ID */
195 unsigned int ref_count;
196 enum mlxsw_sp_l3proto proto;
197 struct mlxsw_sp_prefix_usage prefix_usage;
198};
199
Jiri Pirko6b75c482016-07-04 08:23:09 +0200200struct mlxsw_sp_fib;
201
202struct mlxsw_sp_vr {
203 u16 id; /* virtual router ID */
204 bool used;
205 enum mlxsw_sp_l3proto proto;
206 u32 tb_id; /* kernel fib table id */
207 struct mlxsw_sp_lpm_tree *lpm_tree;
208 struct mlxsw_sp_fib *fib;
209};
210
Yotam Gigi763b4b72016-07-21 12:03:17 +0200211enum mlxsw_sp_span_type {
212 MLXSW_SP_SPAN_EGRESS,
213 MLXSW_SP_SPAN_INGRESS
214};
215
216struct mlxsw_sp_span_inspected_port {
217 struct list_head list;
218 enum mlxsw_sp_span_type type;
219 u8 local_port;
220};
221
222struct mlxsw_sp_span_entry {
223 u8 local_port;
224 bool used;
225 struct list_head bound_ports_list;
226 int ref_count;
227 int id;
228};
229
230enum mlxsw_sp_port_mall_action_type {
231 MLXSW_SP_PORT_MALL_MIRROR,
232};
233
234struct mlxsw_sp_port_mall_mirror_tc_entry {
235 u8 to_local_port;
236 bool ingress;
237};
238
239struct mlxsw_sp_port_mall_tc_entry {
240 struct list_head list;
241 unsigned long cookie;
242 enum mlxsw_sp_port_mall_action_type type;
243 union {
244 struct mlxsw_sp_port_mall_mirror_tc_entry mirror;
245 };
246};
247
Jiri Pirko53342022016-07-04 08:23:08 +0200248struct mlxsw_sp_router {
249 struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
Nogah Frankel9497c042016-09-20 11:16:54 +0200250 struct mlxsw_sp_vr *vrs;
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200251 struct rhashtable neigh_ht;
Yotam Gigic723c7352016-07-05 11:27:43 +0200252 struct {
253 struct delayed_work dw;
254 unsigned long interval; /* ms */
255 } neighs_update;
Yotam Gigi0b2361d2016-07-05 11:27:52 +0200256 struct delayed_work nexthop_probe_dw;
257#define MLXSW_SP_UNRESOLVED_NH_PROBE_INTERVAL 5000 /* ms */
Jiri Pirkoa7ff87a2016-07-05 11:27:50 +0200258 struct list_head nexthop_group_list;
Yotam Gigib2157142016-07-05 11:27:51 +0200259 struct list_head nexthop_neighs_list;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200260 bool aborted;
Jiri Pirko53342022016-07-04 08:23:08 +0200261};
262
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200263struct mlxsw_sp {
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100264 struct {
265 struct list_head list;
Ido Schimmel99724c12016-07-04 08:23:14 +0200266 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200267 } vfids;
Elad Raz3a49b4f2016-01-10 21:06:28 +0100268 struct {
269 struct list_head list;
Ido Schimmeld8651fd2016-06-20 23:04:07 +0200270 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
Elad Raz3a49b4f2016-01-10 21:06:28 +0100271 } br_mids;
Ido Schimmel14d39462016-06-20 23:04:15 +0200272 struct list_head fids; /* VLAN-aware bridge FIDs */
Nogah Frankel8f8a62d2016-09-20 11:16:57 +0200273 struct mlxsw_sp_rif **rifs;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200274 struct mlxsw_sp_port **ports;
275 struct mlxsw_core *core;
276 const struct mlxsw_bus_info *bus_info;
277 unsigned char base_mac[ETH_ALEN];
278 struct {
279 struct delayed_work dw;
280#define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
281 unsigned int interval; /* ms */
282 } fdb_notify;
Ido Schimmel869f63a2016-03-08 12:59:33 -0800283#define MLXSW_SP_MIN_AGEING_TIME 10
284#define MLXSW_SP_MAX_AGEING_TIME 1000000
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200285#define MLXSW_SP_DEFAULT_AGEING_TIME 300
286 u32 ageing_time;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100287 struct mlxsw_sp_upper master_bridge;
Nogah Frankelce0bd2b2016-09-20 11:16:50 +0200288 struct mlxsw_sp_upper *lags;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100289 u8 port_to_module[MLXSW_PORT_MAX_PORTS];
Jiri Pirko078f9c72016-04-14 18:19:19 +0200290 struct mlxsw_sp_sb sb;
Jiri Pirko53342022016-07-04 08:23:08 +0200291 struct mlxsw_sp_router router;
Jiri Pirkob090ef02016-07-05 11:27:47 +0200292 struct {
293 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
294 } kvdl;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200295
296 struct {
297 struct mlxsw_sp_span_entry *entries;
298 int entries_count;
299 } span;
Jiri Pirkob45f64d2016-09-26 12:52:31 +0200300 struct notifier_block fib_nb;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200301};
302
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100303static inline struct mlxsw_sp_upper *
304mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
305{
306 return &mlxsw_sp->lags[lag_id];
307}
308
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200309struct mlxsw_sp_port_pcpu_stats {
310 u64 rx_packets;
311 u64 rx_bytes;
312 u64 tx_packets;
313 u64 tx_bytes;
314 struct u64_stats_sync syncp;
315 u32 tx_dropped;
316};
317
318struct mlxsw_sp_port {
Jiri Pirko932762b2016-04-08 19:11:21 +0200319 struct mlxsw_core_port core_port; /* must be first */
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200320 struct net_device *dev;
321 struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
322 struct mlxsw_sp *mlxsw_sp;
323 u8 local_port;
324 u8 stp_state;
Jiri Pirko0d9b9702015-10-28 10:16:56 +0100325 u8 learning:1,
326 learning_sync:1,
Ido Schimmel02930382015-10-28 10:16:58 +0100327 uc_flood:1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100328 bridged:1,
Ido Schimmel18f1e702016-02-26 17:32:31 +0100329 lagged:1,
330 split:1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200331 u16 pvid;
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100332 u16 lag_id;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100333 struct {
334 struct list_head list;
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200335 struct mlxsw_sp_fid *f;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100336 u16 vid;
337 } vport;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200338 struct {
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200339 u8 tx_pause:1,
Ido Schimmel0c83f882016-09-12 13:26:23 +0200340 rx_pause:1,
341 autoneg:1;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200342 } link;
343 struct {
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200344 struct ieee_ets *ets;
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200345 struct ieee_maxrate *maxrate;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200346 struct ieee_pfc *pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200347 } dcb;
Ido Schimmeld664b412016-06-09 09:51:40 +0200348 struct {
349 u8 module;
350 u8 width;
351 u8 lane;
352 } mapping;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200353 /* 802.1Q bridge VLANs */
Ido Schimmelbd40e9d2015-12-15 16:03:36 +0100354 unsigned long *active_vlans;
Elad Razfc1273a2016-01-06 13:01:11 +0100355 unsigned long *untagged_vlans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200356 /* VLAN interfaces */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100357 struct list_head vports_list;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200358 /* TC handles */
359 struct list_head mall_tc_list;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200360 struct {
361 #define MLXSW_HW_STATS_UPDATE_TIME HZ
362 struct rtnl_link_stats64 *cache;
363 struct delayed_work update_dw;
364 } hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200365};
366
Jiri Pirko7ce856a2016-07-04 08:23:12 +0200367struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
368void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
369
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200370static inline bool
371mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
372{
373 return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
374}
375
Jiri Pirko0d65fc12015-12-03 12:12:28 +0100376static inline struct mlxsw_sp_port *
377mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
378{
379 struct mlxsw_sp_port *mlxsw_sp_port;
380 u8 local_port;
381
382 local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
383 lag_id, port_index);
384 mlxsw_sp_port = mlxsw_sp->ports[local_port];
385 return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
386}
387
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100388static inline u16
389mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
390{
391 return mlxsw_sp_vport->vport.vid;
392}
393
Ido Schimmel6381b3a2016-06-20 23:04:16 +0200394static inline bool
395mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
396{
397 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
398
399 return vid != 0;
400}
401
Ido Schimmel41b996c2016-06-20 23:04:17 +0200402static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
403 struct mlxsw_sp_fid *f)
404{
405 mlxsw_sp_vport->vport.f = f;
406}
407
408static inline struct mlxsw_sp_fid *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200409mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100410{
Ido Schimmel41b996c2016-06-20 23:04:17 +0200411 return mlxsw_sp_vport->vport.f;
412}
413
414static inline struct net_device *
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +0200415mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel41b996c2016-06-20 23:04:17 +0200416{
417 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
418
Ido Schimmel56918b62016-06-20 23:04:18 +0200419 return f ? f->dev : NULL;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100420}
421
422static inline struct mlxsw_sp_port *
423mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
424{
425 struct mlxsw_sp_port *mlxsw_sp_vport;
426
427 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
428 vport.list) {
429 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
430 return mlxsw_sp_vport;
431 }
432
433 return NULL;
434}
435
Ido Schimmelaac78a42015-12-15 16:03:42 +0100436static inline struct mlxsw_sp_port *
Ido Schimmeld0ec8752016-06-20 23:04:12 +0200437mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
438 u16 fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100439{
440 struct mlxsw_sp_port *mlxsw_sp_vport;
441
442 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
443 vport.list) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200444 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
445
Ido Schimmel56918b62016-06-20 23:04:18 +0200446 if (f && f->fid == fid)
Ido Schimmelaac78a42015-12-15 16:03:42 +0100447 return mlxsw_sp_vport;
448 }
449
450 return NULL;
451}
452
Ido Schimmel701b1862016-07-04 08:23:16 +0200453static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
454 u16 fid)
455{
456 struct mlxsw_sp_fid *f;
457
458 list_for_each_entry(f, &mlxsw_sp->fids, list)
459 if (f->fid == fid)
460 return f;
461
462 return NULL;
463}
464
465static inline struct mlxsw_sp_fid *
466mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
467 const struct net_device *br_dev)
468{
469 struct mlxsw_sp_fid *f;
470
471 list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
472 if (f->dev == br_dev)
473 return f;
474
475 return NULL;
476}
477
Ido Schimmelfa3054f2016-07-02 11:00:16 +0200478static inline struct mlxsw_sp_rif *
479mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
480 const struct net_device *dev)
481{
482 int i;
483
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200484 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmelfa3054f2016-07-02 11:00:16 +0200485 if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
486 return mlxsw_sp->rifs[i];
487
488 return NULL;
489}
490
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200491enum mlxsw_sp_flood_table {
492 MLXSW_SP_FLOOD_TABLE_UC,
493 MLXSW_SP_FLOOD_TABLE_BM,
494};
495
496int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200497void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200498int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
Jiri Pirko0f433fa2016-04-14 18:19:24 +0200499int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
500 unsigned int sb_index, u16 pool_index,
501 struct devlink_sb_pool_info *pool_info);
502int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
503 unsigned int sb_index, u16 pool_index, u32 size,
504 enum devlink_sb_threshold_type threshold_type);
505int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
506 unsigned int sb_index, u16 pool_index,
507 u32 *p_threshold);
508int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
509 unsigned int sb_index, u16 pool_index,
510 u32 threshold);
511int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
512 unsigned int sb_index, u16 tc_index,
513 enum devlink_sb_pool_type pool_type,
514 u16 *p_pool_index, u32 *p_threshold);
515int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
516 unsigned int sb_index, u16 tc_index,
517 enum devlink_sb_pool_type pool_type,
518 u16 pool_index, u32 threshold);
Jiri Pirko2d0ed392016-04-14 18:19:30 +0200519int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
520 unsigned int sb_index);
521int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
522 unsigned int sb_index);
523int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
524 unsigned int sb_index, u16 pool_index,
525 u32 *p_cur, u32 *p_max);
526int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
527 unsigned int sb_index, u16 tc_index,
528 enum devlink_sb_pool_type pool_type,
529 u32 *p_cur, u32 *p_max);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200530
531int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
532void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
533int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
534void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
535void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
536int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
538 u16 vid);
539int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
540 u16 vid_end, bool is_member, bool untagged);
Ido Schimmele6060022016-06-20 23:04:11 +0200541int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200542 bool set);
Ido Schimmel4dc236c2016-01-27 15:20:16 +0100543void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
Ido Schimmel28a01d22016-02-18 11:30:02 +0100544int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200545int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200546int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
547 bool adding);
Ido Schimmel701b1862016-07-04 08:23:16 +0200548struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
549void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +0200550void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
551 struct mlxsw_sp_rif *r);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200552int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
554 bool dwrr, u8 dwrr_weight);
555int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
556 u8 switch_prio, u8 tclass);
557int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200558 u8 *prio_tc, bool pause_en,
559 struct ieee_pfc *my_pfc);
Ido Schimmelcc7cf512016-04-06 17:10:11 +0200560int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
561 enum mlxsw_reg_qeec_hr hr, u8 index,
562 u8 next_index, u32 maxrate);
Ido Schimmel584d73d2016-08-24 12:00:26 +0200563int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
564 u16 vid_begin, u16 vid_end,
565 bool learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200566
Ido Schimmelf00817d2016-04-06 17:10:09 +0200567#ifdef CONFIG_MLXSW_SPECTRUM_DCB
568
569int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
570void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
571
572#else
573
574static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
575{
576 return 0;
577}
578
579static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
580{}
581
582#endif
583
Ido Schimmel464dce12016-07-02 11:00:15 +0200584int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
585void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
Jiri Pirko6cf3c972016-07-05 11:27:39 +0200586int mlxsw_sp_router_neigh_construct(struct net_device *dev,
587 struct neighbour *n);
588void mlxsw_sp_router_neigh_destroy(struct net_device *dev,
589 struct neighbour *n);
Jiri Pirkoe7322632016-09-01 10:37:43 +0200590int mlxsw_sp_router_netevent_event(struct notifier_block *unused,
591 unsigned long event, void *ptr);
Ido Schimmel464dce12016-07-02 11:00:15 +0200592
Jiri Pirkob090ef02016-07-05 11:27:47 +0200593int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
594void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
595
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200596#endif