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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
605};
606
607static struct platform_device qcrypto_device = {
608 .name = "qcrypto",
609 .id = 0,
610 .num_resources = ARRAY_SIZE(qcrypto_resources),
611 .resource = qcrypto_resources,
612 .dev = {
613 .coherent_dma_mask = DMA_BIT_MASK(32),
614 .platform_data = &qcrypto_ce_hw_suppport,
615 },
616};
617#endif
618
619#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
620 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
621
622static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
623 .ce_shared = QCE_CE_SHARED,
624 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
625 .hw_key_support = QCE_HW_KEY_SUPPORT,
626 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
627};
628
629static struct platform_device qcedev_device = {
630 .name = "qce",
631 .id = 0,
632 .num_resources = ARRAY_SIZE(qcedev_resources),
633 .resource = qcedev_resources,
634 .dev = {
635 .coherent_dma_mask = DMA_BIT_MASK(32),
636 .platform_data = &qcedev_ce_hw_suppport,
637 },
638};
639#endif
640
641#if defined(CONFIG_HAPTIC_ISA1200) || \
642 defined(CONFIG_HAPTIC_ISA1200_MODULE)
643
644static const char *vregs_isa1200_name[] = {
645 "8058_s3",
646 "8901_l4",
647};
648
649static const int vregs_isa1200_val[] = {
650 1800000,/* uV */
651 2600000,
652};
653static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
654static struct msm_xo_voter *xo_handle_a1;
655
656static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800657{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658 int i, rc = 0;
659
660 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
661 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
662 regulator_disable(vregs_isa1200[i]);
663 if (rc < 0) {
664 pr_err("%s: vreg %s %s failed (%d)\n",
665 __func__, vregs_isa1200_name[i],
666 vreg_on ? "enable" : "disable", rc);
667 goto vreg_fail;
668 }
669 }
670
671 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
672 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
673 if (rc < 0) {
674 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
675 __func__, vreg_on ? "" : "de-", rc);
676 goto vreg_fail;
677 }
678 return 0;
679
680vreg_fail:
681 while (i--)
682 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
683 regulator_disable(vregs_isa1200[i]);
684 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800685}
686
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700687static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800690
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 if (enable == true) {
692 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
693 vregs_isa1200[i] = regulator_get(NULL,
694 vregs_isa1200_name[i]);
695 if (IS_ERR(vregs_isa1200[i])) {
696 pr_err("%s: regulator get of %s failed (%ld)\n",
697 __func__, vregs_isa1200_name[i],
698 PTR_ERR(vregs_isa1200[i]));
699 rc = PTR_ERR(vregs_isa1200[i]);
700 goto vreg_get_fail;
701 }
702 rc = regulator_set_voltage(vregs_isa1200[i],
703 vregs_isa1200_val[i], vregs_isa1200_val[i]);
704 if (rc) {
705 pr_err("%s: regulator_set_voltage(%s) failed\n",
706 __func__, vregs_isa1200_name[i]);
707 goto vreg_get_fail;
708 }
709 }
Steve Muckle9161d302010-02-11 11:50:40 -0800710
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700711 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
712 if (rc) {
713 pr_err("%s: unable to request gpio %d (%d)\n",
714 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
715 goto vreg_get_fail;
716 }
Steve Muckle9161d302010-02-11 11:50:40 -0800717
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700718 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
719 if (rc) {
720 pr_err("%s: Unable to set direction\n", __func__);;
721 goto free_gpio;
722 }
723
724 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
725 if (IS_ERR(xo_handle_a1)) {
726 rc = PTR_ERR(xo_handle_a1);
727 pr_err("%s: failed to get the handle for A1(%d)\n",
728 __func__, rc);
729 goto gpio_set_dir;
730 }
731 } else {
732 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
733 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
734
735 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
736 regulator_put(vregs_isa1200[i]);
737
738 msm_xo_put(xo_handle_a1);
739 }
740
741 return 0;
742gpio_set_dir:
743 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
744free_gpio:
745 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
746vreg_get_fail:
747 while (i)
748 regulator_put(vregs_isa1200[--i]);
749 return rc;
750}
751
752#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530753#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700754static struct isa1200_platform_data isa1200_1_pdata = {
755 .name = "vibrator",
756 .power_on = isa1200_power,
757 .dev_setup = isa1200_dev_setup,
758 /*gpio to enable haptic*/
759 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530760 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700761 .max_timeout = 15000,
762 .mode_ctrl = PWM_GEN_MODE,
763 .pwm_fd = {
764 .pwm_div = 256,
765 },
766 .is_erm = false,
767 .smart_en = true,
768 .ext_clk_en = true,
769 .chip_en = 1,
770};
771
772static struct i2c_board_info msm_isa1200_board_info[] = {
773 {
774 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
775 .platform_data = &isa1200_1_pdata,
776 },
777};
778#endif
779
780#if defined(CONFIG_BATTERY_BQ27520) || \
781 defined(CONFIG_BATTERY_BQ27520_MODULE)
782static struct bq27520_platform_data bq27520_pdata = {
783 .name = "fuel-gauge",
784 .vreg_name = "8058_s3",
785 .vreg_value = 1800000,
786 .soc_int = GPIO_BATT_GAUGE_INT_N,
787 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
788 .chip_en = GPIO_BATT_GAUGE_EN,
789 .enable_dlog = 0, /* if enable coulomb counter logger */
790};
791
792static struct i2c_board_info msm_bq27520_board_info[] = {
793 {
794 I2C_BOARD_INFO("bq27520", 0xaa>>1),
795 .platform_data = &bq27520_pdata,
796 },
797};
798#endif
799
800static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
801 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
802 .idle_supported = 1,
803 .suspend_supported = 1,
804 .idle_enabled = 0,
805 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700806 },
807
808 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
809 .idle_supported = 1,
810 .suspend_supported = 1,
811 .idle_enabled = 0,
812 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700813 },
814
815 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
816 .idle_supported = 1,
817 .suspend_supported = 1,
818 .idle_enabled = 1,
819 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700820 },
821
822 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
823 .idle_supported = 1,
824 .suspend_supported = 1,
825 .idle_enabled = 0,
826 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700827 },
828
829 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
830 .idle_supported = 1,
831 .suspend_supported = 1,
832 .idle_enabled = 0,
833 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700834 },
835
836 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
837 .idle_supported = 1,
838 .suspend_supported = 1,
839 .idle_enabled = 1,
840 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700841 },
842};
843
844static struct msm_cpuidle_state msm_cstates[] __initdata = {
845 {0, 0, "C0", "WFI",
846 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
847
848 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
849 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
850
851 {0, 2, "C2", "POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
853
854 {1, 0, "C0", "WFI",
855 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
856
857 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
858 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
859};
860
861static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
862 {
863 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
864 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
865 true,
866 1, 8000, 100000, 1,
867 },
868
869 {
870 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
871 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
872 true,
873 1500, 5000, 60100000, 3000,
874 },
875
876 {
877 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
878 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
879 false,
880 1800, 5000, 60350000, 3500,
881 },
882 {
883 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
884 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
885 false,
886 3800, 4500, 65350000, 5500,
887 },
888
889 {
890 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
891 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
892 false,
893 2800, 2500, 66850000, 4800,
894 },
895
896 {
897 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
898 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
899 false,
900 4800, 2000, 71850000, 6800,
901 },
902
903 {
904 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
905 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
906 false,
907 6800, 500, 75850000, 8800,
908 },
909
910 {
911 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
912 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
913 false,
914 7800, 0, 76350000, 9800,
915 },
916};
917
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600918static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
919 .mode = MSM_PM_BOOT_CONFIG_TZ,
920};
921
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700922#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
923
924#define ISP1763_INT_GPIO 117
925#define ISP1763_RST_GPIO 152
926static struct resource isp1763_resources[] = {
927 [0] = {
928 .flags = IORESOURCE_MEM,
929 .start = 0x1D000000,
930 .end = 0x1D005FFF, /* 24KB */
931 },
932 [1] = {
933 .flags = IORESOURCE_IRQ,
934 },
935};
936static void __init msm8x60_cfg_isp1763(void)
937{
938 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
939 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
940}
941
942static int isp1763_setup_gpio(int enable)
943{
944 int status = 0;
945
946 if (enable) {
947 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
948 if (status) {
949 pr_err("%s:Failed to request GPIO %d\n",
950 __func__, ISP1763_INT_GPIO);
951 return status;
952 }
953 status = gpio_direction_input(ISP1763_INT_GPIO);
954 if (status) {
955 pr_err("%s:Failed to configure GPIO %d\n",
956 __func__, ISP1763_INT_GPIO);
957 goto gpio_free_int;
958 }
959 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
960 if (status) {
961 pr_err("%s:Failed to request GPIO %d\n",
962 __func__, ISP1763_RST_GPIO);
963 goto gpio_free_int;
964 }
965 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
966 if (status) {
967 pr_err("%s:Failed to configure GPIO %d\n",
968 __func__, ISP1763_RST_GPIO);
969 goto gpio_free_rst;
970 }
971 pr_debug("\nISP GPIO configuration done\n");
972 return status;
973 }
974
975gpio_free_rst:
976 gpio_free(ISP1763_RST_GPIO);
977gpio_free_int:
978 gpio_free(ISP1763_INT_GPIO);
979
980 return status;
981}
982static struct isp1763_platform_data isp1763_pdata = {
983 .reset_gpio = ISP1763_RST_GPIO,
984 .setup_gpio = isp1763_setup_gpio
985};
986
987static struct platform_device isp1763_device = {
988 .name = "isp1763_usb",
989 .num_resources = ARRAY_SIZE(isp1763_resources),
990 .resource = isp1763_resources,
991 .dev = {
992 .platform_data = &isp1763_pdata
993 }
994};
995#endif
996
997#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +0530998static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700999static struct regulator *ldo6_3p3;
1000static struct regulator *ldo7_1p8;
1001static struct regulator *vdd_cx;
1002#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301003#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001004notify_vbus_state notify_vbus_state_func_ptr;
1005static int usb_phy_susp_dig_vol = 750000;
1006static int pmic_id_notif_supported;
1007
1008#ifdef CONFIG_USB_EHCI_MSM_72K
1009#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1010struct delayed_work pmic_id_det;
1011
1012static int __init usb_id_pin_rework_setup(char *support)
1013{
1014 if (strncmp(support, "true", 4) == 0)
1015 pmic_id_notif_supported = 1;
1016
1017 return 1;
1018}
1019__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1020
1021static void pmic_id_detect(struct work_struct *w)
1022{
1023 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1024 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1025
1026 if (notify_vbus_state_func_ptr)
1027 (*notify_vbus_state_func_ptr) (val);
1028}
1029
1030static irqreturn_t pmic_id_on_irq(int irq, void *data)
1031{
1032 /*
1033 * Spurious interrupts are observed on pmic gpio line
1034 * even though there is no state change on USB ID. Schedule the
1035 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001036 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001037 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001038
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 return IRQ_HANDLED;
1040}
1041
Anji jonnalaae745e92011-11-14 18:34:31 +05301042static int msm_hsusb_phy_id_setup_init(int init)
1043{
1044 unsigned ret;
1045
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301046 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1047 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1048 .level = PM8901_MPP_DIG_LEVEL_L5,
1049 };
1050
Anji jonnalaae745e92011-11-14 18:34:31 +05301051 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301052 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1053 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1054 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301055 if (ret < 0)
1056 pr_err("%s:MPP2 configuration failed\n", __func__);
1057 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301058 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1059 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1060 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301061 if (ret < 0)
1062 pr_err("%s:MPP2 un config failed\n", __func__);
1063 }
1064 return ret;
1065}
1066
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001067static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1068{
1069 unsigned ret = -ENODEV;
1070
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301071 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301072 .direction = PM_GPIO_DIR_IN,
1073 .pull = PM_GPIO_PULL_UP_1P5,
1074 .function = PM_GPIO_FUNC_NORMAL,
1075 .vin_sel = 2,
1076 .inv_int_pol = 0,
1077 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301078 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301079 .direction = PM_GPIO_DIR_IN,
1080 .pull = PM_GPIO_PULL_NO,
1081 .function = PM_GPIO_FUNC_NORMAL,
1082 .vin_sel = 2,
1083 .inv_int_pol = 0,
1084 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001085 if (!callback)
1086 return -EINVAL;
1087
1088 if (machine_is_msm8x60_fluid())
1089 return -ENOTSUPP;
1090
1091 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1092 pr_debug("%s: USB_ID pin is not routed to PMIC"
1093 "on V1 surf/ffa\n", __func__);
1094 return -ENOTSUPP;
1095 }
1096
Manu Gautam62158eb2011-11-24 16:20:46 +05301097 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1098 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001099 pr_debug("%s: USB_ID is not routed to PMIC"
1100 "on V2 ffa\n", __func__);
1101 return -ENOTSUPP;
1102 }
1103
1104 usb_phy_susp_dig_vol = 500000;
1105
1106 if (init) {
1107 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301108 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301109 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1110 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301111 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301113 __func__, ret);
1114 return ret;
1115 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001116 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1117 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1118 "msm_otg_id", NULL);
1119 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001120 pr_err("%s:pmic_usb_id interrupt registration failed",
1121 __func__);
1122 return ret;
1123 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301124 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001125 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301126 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001127 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301128 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1129 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301130 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301132 __func__, ret);
1133 return ret;
1134 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301135 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001136 cancel_delayed_work_sync(&pmic_id_det);
1137 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 }
1139 return 0;
1140}
1141#endif
1142
1143#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1144#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1145static int msm_hsusb_init_vddcx(int init)
1146{
1147 int ret = 0;
1148
1149 if (init) {
1150 vdd_cx = regulator_get(NULL, "8058_s1");
1151 if (IS_ERR(vdd_cx)) {
1152 return PTR_ERR(vdd_cx);
1153 }
1154
1155 ret = regulator_set_voltage(vdd_cx,
1156 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1157 USB_PHY_MAX_VDD_DIG_VOL);
1158 if (ret) {
1159 pr_err("%s: unable to set the voltage for regulator"
1160 "vdd_cx\n", __func__);
1161 regulator_put(vdd_cx);
1162 return ret;
1163 }
1164
1165 ret = regulator_enable(vdd_cx);
1166 if (ret) {
1167 pr_err("%s: unable to enable regulator"
1168 "vdd_cx\n", __func__);
1169 regulator_put(vdd_cx);
1170 }
1171 } else {
1172 ret = regulator_disable(vdd_cx);
1173 if (ret) {
1174 pr_err("%s: Unable to disable the regulator:"
1175 "vdd_cx\n", __func__);
1176 return ret;
1177 }
1178
1179 regulator_put(vdd_cx);
1180 }
1181
1182 return ret;
1183}
1184
1185static int msm_hsusb_config_vddcx(int high)
1186{
1187 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1188 int min_vol;
1189 int ret;
1190
1191 if (high)
1192 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1193 else
1194 min_vol = usb_phy_susp_dig_vol;
1195
1196 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1197 if (ret) {
1198 pr_err("%s: unable to set the voltage for regulator"
1199 "vdd_cx\n", __func__);
1200 return ret;
1201 }
1202
1203 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1204
1205 return ret;
1206}
1207
1208#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1209#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1210#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1211#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1212
1213#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1214#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1215#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1216#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1217static int msm_hsusb_ldo_init(int init)
1218{
1219 int rc = 0;
1220
1221 if (init) {
1222 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1223 if (IS_ERR(ldo6_3p3))
1224 return PTR_ERR(ldo6_3p3);
1225
1226 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1227 if (IS_ERR(ldo7_1p8)) {
1228 rc = PTR_ERR(ldo7_1p8);
1229 goto put_3p3;
1230 }
1231
1232 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1233 USB_PHY_3P3_VOL_MAX);
1234 if (rc) {
1235 pr_err("%s: Unable to set voltage level for"
1236 "ldo6_3p3 regulator\n", __func__);
1237 goto put_1p8;
1238 }
1239 rc = regulator_enable(ldo6_3p3);
1240 if (rc) {
1241 pr_err("%s: Unable to enable the regulator:"
1242 "ldo6_3p3\n", __func__);
1243 goto put_1p8;
1244 }
1245 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1246 USB_PHY_1P8_VOL_MAX);
1247 if (rc) {
1248 pr_err("%s: Unable to set voltage level for"
1249 "ldo7_1p8 regulator\n", __func__);
1250 goto disable_3p3;
1251 }
1252 rc = regulator_enable(ldo7_1p8);
1253 if (rc) {
1254 pr_err("%s: Unable to enable the regulator:"
1255 "ldo7_1p8\n", __func__);
1256 goto disable_3p3;
1257 }
1258
1259 return 0;
1260 }
1261
1262 regulator_disable(ldo7_1p8);
1263disable_3p3:
1264 regulator_disable(ldo6_3p3);
1265put_1p8:
1266 regulator_put(ldo7_1p8);
1267put_3p3:
1268 regulator_put(ldo6_3p3);
1269 return rc;
1270}
1271
1272static int msm_hsusb_ldo_enable(int on)
1273{
1274 int ret = 0;
1275
1276 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1277 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1278 return -ENODEV;
1279 }
1280
1281 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1282 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1283 return -ENODEV;
1284 }
1285
1286 if (on) {
1287 ret = regulator_set_optimum_mode(ldo7_1p8,
1288 USB_PHY_1P8_HPM_LOAD);
1289 if (ret < 0) {
1290 pr_err("%s: Unable to set HPM of the regulator:"
1291 "ldo7_1p8\n", __func__);
1292 return ret;
1293 }
1294 ret = regulator_set_optimum_mode(ldo6_3p3,
1295 USB_PHY_3P3_HPM_LOAD);
1296 if (ret < 0) {
1297 pr_err("%s: Unable to set HPM of the regulator:"
1298 "ldo6_3p3\n", __func__);
1299 regulator_set_optimum_mode(ldo7_1p8,
1300 USB_PHY_1P8_LPM_LOAD);
1301 return ret;
1302 }
1303 } else {
1304 ret = regulator_set_optimum_mode(ldo7_1p8,
1305 USB_PHY_1P8_LPM_LOAD);
1306 if (ret < 0)
1307 pr_err("%s: Unable to set LPM of the regulator:"
1308 "ldo7_1p8\n", __func__);
1309 ret = regulator_set_optimum_mode(ldo6_3p3,
1310 USB_PHY_3P3_LPM_LOAD);
1311 if (ret < 0)
1312 pr_err("%s: Unable to set LPM of the regulator:"
1313 "ldo6_3p3\n", __func__);
1314 }
1315
1316 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1317 return ret < 0 ? ret : 0;
1318 }
1319#endif
1320#ifdef CONFIG_USB_EHCI_MSM_72K
1321#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1322static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1323{
1324 static int vbus_is_on;
1325
1326 /* If VBUS is already on (or off), do nothing. */
1327 if (on == vbus_is_on)
1328 return;
1329 smb137b_otg_power(on);
1330 vbus_is_on = on;
1331}
1332#endif
1333static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1334{
1335 static struct regulator *votg_5v_switch;
1336 static struct regulator *ext_5v_reg;
1337 static int vbus_is_on;
1338
1339 /* If VBUS is already on (or off), do nothing. */
1340 if (on == vbus_is_on)
1341 return;
1342
1343 if (!votg_5v_switch) {
1344 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1345 if (IS_ERR(votg_5v_switch)) {
1346 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1347 return;
1348 }
1349 }
1350 if (!ext_5v_reg) {
1351 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1352 if (IS_ERR(ext_5v_reg)) {
1353 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1354 return;
1355 }
1356 }
1357 if (on) {
1358 if (regulator_enable(ext_5v_reg)) {
1359 pr_err("%s: Unable to enable the regulator:"
1360 " ext_5v_reg\n", __func__);
1361 return;
1362 }
1363 if (regulator_enable(votg_5v_switch)) {
1364 pr_err("%s: Unable to enable the regulator:"
1365 " votg_5v_switch\n", __func__);
1366 return;
1367 }
1368 } else {
1369 if (regulator_disable(votg_5v_switch))
1370 pr_err("%s: Unable to enable the regulator:"
1371 " votg_5v_switch\n", __func__);
1372 if (regulator_disable(ext_5v_reg))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " ext_5v_reg\n", __func__);
1375 }
1376
1377 vbus_is_on = on;
1378}
1379
1380static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1381 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1382 .power_budget = 390,
1383};
1384#endif
1385
1386#ifdef CONFIG_BATTERY_MSM8X60
1387static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1388 int init)
1389{
1390 int ret = -ENOTSUPP;
1391
1392#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1393 if (machine_is_msm8x60_fluid()) {
1394 if (init)
1395 msm_charger_register_vbus_sn(callback);
1396 else
1397 msm_charger_unregister_vbus_sn(callback);
1398 return 0;
1399 }
1400#endif
1401 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1402 * hence, irrespective of either peripheral only mode or
1403 * OTG (host and peripheral) modes, can depend on pmic for
1404 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001405 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001406 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1407 && (machine_is_msm8x60_surf() ||
1408 pmic_id_notif_supported)) {
1409 if (init)
1410 ret = msm_charger_register_vbus_sn(callback);
1411 else {
1412 msm_charger_unregister_vbus_sn(callback);
1413 ret = 0;
1414 }
1415 } else {
1416#if !defined(CONFIG_USB_EHCI_MSM_72K)
1417 if (init)
1418 ret = msm_charger_register_vbus_sn(callback);
1419 else {
1420 msm_charger_unregister_vbus_sn(callback);
1421 ret = 0;
1422 }
1423#endif
1424 }
1425 return ret;
1426}
1427#endif
1428
1429#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1430static struct msm_otg_platform_data msm_otg_pdata = {
1431 /* if usb link is in sps there is no need for
1432 * usb pclk as dayatona fabric clock will be
1433 * used instead
1434 */
1435 .pclk_src_name = "dfab_usb_hs_clk",
1436 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1437 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1438 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301439 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001440#ifdef CONFIG_USB_EHCI_MSM_72K
1441 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301442 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001443#endif
1444#ifdef CONFIG_USB_EHCI_MSM_72K
1445 .vbus_power = msm_hsusb_vbus_power,
1446#endif
1447#ifdef CONFIG_BATTERY_MSM8X60
1448 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1449#endif
1450 .ldo_init = msm_hsusb_ldo_init,
1451 .ldo_enable = msm_hsusb_ldo_enable,
1452 .config_vddcx = msm_hsusb_config_vddcx,
1453 .init_vddcx = msm_hsusb_init_vddcx,
1454#ifdef CONFIG_BATTERY_MSM8X60
1455 .chg_vbus_draw = msm_charger_vbus_draw,
1456#endif
1457};
1458#endif
1459
1460#ifdef CONFIG_USB_GADGET_MSM_72K
1461static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1462 .is_phy_status_timer_on = 1,
1463};
1464#endif
1465
1466#ifdef CONFIG_USB_G_ANDROID
1467
1468#define PID_MAGIC_ID 0x71432909
1469#define SERIAL_NUM_MAGIC_ID 0x61945374
1470#define SERIAL_NUMBER_LENGTH 127
1471#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1472
1473struct magic_num_struct {
1474 uint32_t pid;
1475 uint32_t serial_num;
1476};
1477
1478struct dload_struct {
1479 uint32_t reserved1;
1480 uint32_t reserved2;
1481 uint32_t reserved3;
1482 uint16_t reserved4;
1483 uint16_t pid;
1484 char serial_number[SERIAL_NUMBER_LENGTH];
1485 uint16_t reserved5;
1486 struct magic_num_struct
1487 magic_struct;
1488};
1489
1490static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1491{
1492 struct dload_struct __iomem *dload = 0;
1493
1494 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1495 if (!dload) {
1496 pr_err("%s: cannot remap I/O memory region: %08x\n",
1497 __func__, DLOAD_USB_BASE_ADD);
1498 return -ENXIO;
1499 }
1500
1501 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1502 __func__, dload, pid, snum);
1503 /* update pid */
1504 dload->magic_struct.pid = PID_MAGIC_ID;
1505 dload->pid = pid;
1506
1507 /* update serial number */
1508 dload->magic_struct.serial_num = 0;
1509 if (!snum)
1510 return 0;
1511
1512 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1513 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1514 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1515
1516 iounmap(dload);
1517
1518 return 0;
1519}
1520
1521static struct android_usb_platform_data android_usb_pdata = {
1522 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1523};
1524
1525static struct platform_device android_usb_device = {
1526 .name = "android_usb",
1527 .id = -1,
1528 .dev = {
1529 .platform_data = &android_usb_pdata,
1530 },
1531};
1532
1533
1534#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001535
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536#ifdef CONFIG_MSM_VPE
1537static struct resource msm_vpe_resources[] = {
1538 {
1539 .start = 0x05300000,
1540 .end = 0x05300000 + SZ_1M - 1,
1541 .flags = IORESOURCE_MEM,
1542 },
1543 {
1544 .start = INT_VPE,
1545 .end = INT_VPE,
1546 .flags = IORESOURCE_IRQ,
1547 },
1548};
1549
1550static struct platform_device msm_vpe_device = {
1551 .name = "msm_vpe",
1552 .id = 0,
1553 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1554 .resource = msm_vpe_resources,
1555};
1556#endif
1557
1558#ifdef CONFIG_MSM_CAMERA
1559#ifdef CONFIG_MSM_CAMERA_FLASH
1560#define VFE_CAMIF_TIMER1_GPIO 29
1561#define VFE_CAMIF_TIMER2_GPIO 30
1562#define VFE_CAMIF_TIMER3_GPIO_INT 31
1563#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1564static struct msm_camera_sensor_flash_src msm_flash_src = {
1565 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1566 ._fsrc.pmic_src.num_of_src = 2,
1567 ._fsrc.pmic_src.low_current = 100,
1568 ._fsrc.pmic_src.high_current = 300,
1569 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1570 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1571 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1572};
1573#ifdef CONFIG_IMX074
1574static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1575 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1576 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1577 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1578 .flash_recharge_duration = 50000,
1579 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1580};
1581#endif
1582#endif
1583
1584int msm_cam_gpio_tbl[] = {
1585 32,/*CAMIF_MCLK*/
1586 47,/*CAMIF_I2C_DATA*/
1587 48,/*CAMIF_I2C_CLK*/
1588 105,/*STANDBY*/
1589};
1590
1591enum msm_cam_stat{
1592 MSM_CAM_OFF,
1593 MSM_CAM_ON,
1594};
1595
1596static int config_gpio_table(enum msm_cam_stat stat)
1597{
1598 int rc = 0, i = 0;
1599 if (stat == MSM_CAM_ON) {
1600 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1601 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1602 if (unlikely(rc < 0)) {
1603 pr_err("%s not able to get gpio\n", __func__);
1604 for (i--; i >= 0; i--)
1605 gpio_free(msm_cam_gpio_tbl[i]);
1606 break;
1607 }
1608 }
1609 } else {
1610 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1611 gpio_free(msm_cam_gpio_tbl[i]);
1612 }
1613 return rc;
1614}
1615
1616static struct msm_camera_sensor_platform_info sensor_board_info = {
1617 .mount_angle = 0
1618};
1619
1620/*external regulator VREG_5V*/
1621static struct regulator *reg_flash_5V;
1622
1623static int config_camera_on_gpios_fluid(void)
1624{
1625 int rc = 0;
1626
1627 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1628 if (IS_ERR(reg_flash_5V)) {
1629 pr_err("'%s' regulator not found, rc=%ld\n",
1630 "8901_mpp0", IS_ERR(reg_flash_5V));
1631 return -ENODEV;
1632 }
1633
1634 rc = regulator_enable(reg_flash_5V);
1635 if (rc) {
1636 pr_err("'%s' regulator enable failed, rc=%d\n",
1637 "8901_mpp0", rc);
1638 regulator_put(reg_flash_5V);
1639 return rc;
1640 }
1641
1642#ifdef CONFIG_IMX074
1643 sensor_board_info.mount_angle = 90;
1644#endif
1645 rc = config_gpio_table(MSM_CAM_ON);
1646 if (rc < 0) {
1647 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1648 "failed\n", __func__);
1649 return rc;
1650 }
1651
1652 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1653 if (rc < 0) {
1654 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1655 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1656 regulator_disable(reg_flash_5V);
1657 regulator_put(reg_flash_5V);
1658 return rc;
1659 }
1660 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1661 msleep(20);
1662 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1663
1664
1665 /*Enable LED_FLASH_EN*/
1666 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1667 if (rc < 0) {
1668 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1669 "failed\n", __func__, GPIO_LED_FLASH_EN);
1670
1671 regulator_disable(reg_flash_5V);
1672 regulator_put(reg_flash_5V);
1673 config_gpio_table(MSM_CAM_OFF);
1674 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1675 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1676 return rc;
1677 }
1678 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1679 msleep(20);
1680 return rc;
1681}
1682
1683
1684static void config_camera_off_gpios_fluid(void)
1685{
1686 regulator_disable(reg_flash_5V);
1687 regulator_put(reg_flash_5V);
1688
1689 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1690 gpio_free(GPIO_LED_FLASH_EN);
1691
1692 config_gpio_table(MSM_CAM_OFF);
1693
1694 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1695 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1696}
1697static int config_camera_on_gpios(void)
1698{
1699 int rc = 0;
1700
1701 if (machine_is_msm8x60_fluid())
1702 return config_camera_on_gpios_fluid();
1703
1704 rc = config_gpio_table(MSM_CAM_ON);
1705 if (rc < 0) {
1706 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1707 "failed\n", __func__);
1708 return rc;
1709 }
1710
Jilai Wang971f97f2011-07-13 14:25:25 -04001711 if (!machine_is_msm8x60_dragon()) {
1712 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1713 if (rc < 0) {
1714 config_gpio_table(MSM_CAM_OFF);
1715 pr_err("%s: CAMSENSOR gpio %d request"
1716 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1717 return rc;
1718 }
1719 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1720 msleep(20);
1721 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001722 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001723
1724#ifdef CONFIG_MSM_CAMERA_FLASH
1725#ifdef CONFIG_IMX074
1726 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1727 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1728#endif
1729#endif
1730 return rc;
1731}
1732
1733static void config_camera_off_gpios(void)
1734{
1735 if (machine_is_msm8x60_fluid())
1736 return config_camera_off_gpios_fluid();
1737
1738
1739 config_gpio_table(MSM_CAM_OFF);
1740
Jilai Wang971f97f2011-07-13 14:25:25 -04001741 if (!machine_is_msm8x60_dragon()) {
1742 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1743 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1744 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001745}
1746
1747#ifdef CONFIG_QS_S5K4E1
1748
1749#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1750
1751static int config_camera_on_gpios_qs_cam_fluid(void)
1752{
1753 int rc = 0;
1754
1755 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1756 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1757 if (rc < 0) {
1758 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1759 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1760 return rc;
1761 }
1762 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1763 msleep(20);
1764 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1765 msleep(20);
1766
1767 /*
1768 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1769 * to enable 2.7V power to Camera
1770 */
1771 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1772 if (rc < 0) {
1773 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1774 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1775 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1776 gpio_free(QS_CAM_HC37_CAM_PD);
1777 return rc;
1778 }
1779 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1780 msleep(20);
1781 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1782 msleep(20);
1783
1784 rc = config_camera_on_gpios_fluid();
1785 if (rc < 0) {
1786 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1787 " failed\n", __func__);
1788 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1789 gpio_free(QS_CAM_HC37_CAM_PD);
1790 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1791 gpio_free(GPIO_AUX_CAM_2P7_EN);
1792 return rc;
1793 }
1794 return rc;
1795}
1796
1797static void config_camera_off_gpios_qs_cam_fluid(void)
1798{
1799 /*
1800 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1801 * to disable 2.7V power to Camera
1802 */
1803 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1804 gpio_free(GPIO_AUX_CAM_2P7_EN);
1805
1806 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1807 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1808 gpio_free(QS_CAM_HC37_CAM_PD);
1809
1810 config_camera_off_gpios_fluid();
1811 return;
1812}
1813
1814static int config_camera_on_gpios_qs_cam(void)
1815{
1816 int rc = 0;
1817
1818 if (machine_is_msm8x60_fluid())
1819 return config_camera_on_gpios_qs_cam_fluid();
1820
1821 rc = config_camera_on_gpios();
1822 return rc;
1823}
1824
1825static void config_camera_off_gpios_qs_cam(void)
1826{
1827 if (machine_is_msm8x60_fluid())
1828 return config_camera_off_gpios_qs_cam_fluid();
1829
1830 config_camera_off_gpios();
1831 return;
1832}
1833#endif
1834
1835static int config_camera_on_gpios_web_cam(void)
1836{
1837 int rc = 0;
1838 rc = config_gpio_table(MSM_CAM_ON);
1839 if (rc < 0) {
1840 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1841 "failed\n", __func__);
1842 return rc;
1843 }
1844
Jilai Wang53d27a82011-07-13 14:32:58 -04001845 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001846 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1847 if (rc < 0) {
1848 config_gpio_table(MSM_CAM_OFF);
1849 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1850 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1851 return rc;
1852 }
1853 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1854 }
1855 return rc;
1856}
1857
1858static void config_camera_off_gpios_web_cam(void)
1859{
1860 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001861 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001862 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1863 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1864 }
1865 return;
1866}
1867
1868#ifdef CONFIG_MSM_BUS_SCALING
1869static struct msm_bus_vectors cam_init_vectors[] = {
1870 {
1871 .src = MSM_BUS_MASTER_VFE,
1872 .dst = MSM_BUS_SLAVE_SMI,
1873 .ab = 0,
1874 .ib = 0,
1875 },
1876 {
1877 .src = MSM_BUS_MASTER_VFE,
1878 .dst = MSM_BUS_SLAVE_EBI_CH0,
1879 .ab = 0,
1880 .ib = 0,
1881 },
1882 {
1883 .src = MSM_BUS_MASTER_VPE,
1884 .dst = MSM_BUS_SLAVE_SMI,
1885 .ab = 0,
1886 .ib = 0,
1887 },
1888 {
1889 .src = MSM_BUS_MASTER_VPE,
1890 .dst = MSM_BUS_SLAVE_EBI_CH0,
1891 .ab = 0,
1892 .ib = 0,
1893 },
1894 {
1895 .src = MSM_BUS_MASTER_JPEG_ENC,
1896 .dst = MSM_BUS_SLAVE_SMI,
1897 .ab = 0,
1898 .ib = 0,
1899 },
1900 {
1901 .src = MSM_BUS_MASTER_JPEG_ENC,
1902 .dst = MSM_BUS_SLAVE_EBI_CH0,
1903 .ab = 0,
1904 .ib = 0,
1905 },
1906};
1907
1908static struct msm_bus_vectors cam_preview_vectors[] = {
1909 {
1910 .src = MSM_BUS_MASTER_VFE,
1911 .dst = MSM_BUS_SLAVE_SMI,
1912 .ab = 0,
1913 .ib = 0,
1914 },
1915 {
1916 .src = MSM_BUS_MASTER_VFE,
1917 .dst = MSM_BUS_SLAVE_EBI_CH0,
1918 .ab = 283115520,
1919 .ib = 452984832,
1920 },
1921 {
1922 .src = MSM_BUS_MASTER_VPE,
1923 .dst = MSM_BUS_SLAVE_SMI,
1924 .ab = 0,
1925 .ib = 0,
1926 },
1927 {
1928 .src = MSM_BUS_MASTER_VPE,
1929 .dst = MSM_BUS_SLAVE_EBI_CH0,
1930 .ab = 0,
1931 .ib = 0,
1932 },
1933 {
1934 .src = MSM_BUS_MASTER_JPEG_ENC,
1935 .dst = MSM_BUS_SLAVE_SMI,
1936 .ab = 0,
1937 .ib = 0,
1938 },
1939 {
1940 .src = MSM_BUS_MASTER_JPEG_ENC,
1941 .dst = MSM_BUS_SLAVE_EBI_CH0,
1942 .ab = 0,
1943 .ib = 0,
1944 },
1945};
1946
1947static struct msm_bus_vectors cam_video_vectors[] = {
1948 {
1949 .src = MSM_BUS_MASTER_VFE,
1950 .dst = MSM_BUS_SLAVE_SMI,
1951 .ab = 283115520,
1952 .ib = 452984832,
1953 },
1954 {
1955 .src = MSM_BUS_MASTER_VFE,
1956 .dst = MSM_BUS_SLAVE_EBI_CH0,
1957 .ab = 283115520,
1958 .ib = 452984832,
1959 },
1960 {
1961 .src = MSM_BUS_MASTER_VPE,
1962 .dst = MSM_BUS_SLAVE_SMI,
1963 .ab = 319610880,
1964 .ib = 511377408,
1965 },
1966 {
1967 .src = MSM_BUS_MASTER_VPE,
1968 .dst = MSM_BUS_SLAVE_EBI_CH0,
1969 .ab = 0,
1970 .ib = 0,
1971 },
1972 {
1973 .src = MSM_BUS_MASTER_JPEG_ENC,
1974 .dst = MSM_BUS_SLAVE_SMI,
1975 .ab = 0,
1976 .ib = 0,
1977 },
1978 {
1979 .src = MSM_BUS_MASTER_JPEG_ENC,
1980 .dst = MSM_BUS_SLAVE_EBI_CH0,
1981 .ab = 0,
1982 .ib = 0,
1983 },
1984};
1985
1986static struct msm_bus_vectors cam_snapshot_vectors[] = {
1987 {
1988 .src = MSM_BUS_MASTER_VFE,
1989 .dst = MSM_BUS_SLAVE_SMI,
1990 .ab = 566231040,
1991 .ib = 905969664,
1992 },
1993 {
1994 .src = MSM_BUS_MASTER_VFE,
1995 .dst = MSM_BUS_SLAVE_EBI_CH0,
1996 .ab = 69984000,
1997 .ib = 111974400,
1998 },
1999 {
2000 .src = MSM_BUS_MASTER_VPE,
2001 .dst = MSM_BUS_SLAVE_SMI,
2002 .ab = 0,
2003 .ib = 0,
2004 },
2005 {
2006 .src = MSM_BUS_MASTER_VPE,
2007 .dst = MSM_BUS_SLAVE_EBI_CH0,
2008 .ab = 0,
2009 .ib = 0,
2010 },
2011 {
2012 .src = MSM_BUS_MASTER_JPEG_ENC,
2013 .dst = MSM_BUS_SLAVE_SMI,
2014 .ab = 320864256,
2015 .ib = 513382810,
2016 },
2017 {
2018 .src = MSM_BUS_MASTER_JPEG_ENC,
2019 .dst = MSM_BUS_SLAVE_EBI_CH0,
2020 .ab = 320864256,
2021 .ib = 513382810,
2022 },
2023};
2024
2025static struct msm_bus_vectors cam_zsl_vectors[] = {
2026 {
2027 .src = MSM_BUS_MASTER_VFE,
2028 .dst = MSM_BUS_SLAVE_SMI,
2029 .ab = 566231040,
2030 .ib = 905969664,
2031 },
2032 {
2033 .src = MSM_BUS_MASTER_VFE,
2034 .dst = MSM_BUS_SLAVE_EBI_CH0,
2035 .ab = 706199040,
2036 .ib = 1129918464,
2037 },
2038 {
2039 .src = MSM_BUS_MASTER_VPE,
2040 .dst = MSM_BUS_SLAVE_SMI,
2041 .ab = 0,
2042 .ib = 0,
2043 },
2044 {
2045 .src = MSM_BUS_MASTER_VPE,
2046 .dst = MSM_BUS_SLAVE_EBI_CH0,
2047 .ab = 0,
2048 .ib = 0,
2049 },
2050 {
2051 .src = MSM_BUS_MASTER_JPEG_ENC,
2052 .dst = MSM_BUS_SLAVE_SMI,
2053 .ab = 320864256,
2054 .ib = 513382810,
2055 },
2056 {
2057 .src = MSM_BUS_MASTER_JPEG_ENC,
2058 .dst = MSM_BUS_SLAVE_EBI_CH0,
2059 .ab = 320864256,
2060 .ib = 513382810,
2061 },
2062};
2063
2064static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2065 {
2066 .src = MSM_BUS_MASTER_VFE,
2067 .dst = MSM_BUS_SLAVE_SMI,
2068 .ab = 212336640,
2069 .ib = 339738624,
2070 },
2071 {
2072 .src = MSM_BUS_MASTER_VFE,
2073 .dst = MSM_BUS_SLAVE_EBI_CH0,
2074 .ab = 25090560,
2075 .ib = 40144896,
2076 },
2077 {
2078 .src = MSM_BUS_MASTER_VPE,
2079 .dst = MSM_BUS_SLAVE_SMI,
2080 .ab = 239708160,
2081 .ib = 383533056,
2082 },
2083 {
2084 .src = MSM_BUS_MASTER_VPE,
2085 .dst = MSM_BUS_SLAVE_EBI_CH0,
2086 .ab = 79902720,
2087 .ib = 127844352,
2088 },
2089 {
2090 .src = MSM_BUS_MASTER_JPEG_ENC,
2091 .dst = MSM_BUS_SLAVE_SMI,
2092 .ab = 0,
2093 .ib = 0,
2094 },
2095 {
2096 .src = MSM_BUS_MASTER_JPEG_ENC,
2097 .dst = MSM_BUS_SLAVE_EBI_CH0,
2098 .ab = 0,
2099 .ib = 0,
2100 },
2101};
2102
2103static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2104 {
2105 .src = MSM_BUS_MASTER_VFE,
2106 .dst = MSM_BUS_SLAVE_SMI,
2107 .ab = 0,
2108 .ib = 0,
2109 },
2110 {
2111 .src = MSM_BUS_MASTER_VFE,
2112 .dst = MSM_BUS_SLAVE_EBI_CH0,
2113 .ab = 300902400,
2114 .ib = 481443840,
2115 },
2116 {
2117 .src = MSM_BUS_MASTER_VPE,
2118 .dst = MSM_BUS_SLAVE_SMI,
2119 .ab = 230307840,
2120 .ib = 368492544,
2121 },
2122 {
2123 .src = MSM_BUS_MASTER_VPE,
2124 .dst = MSM_BUS_SLAVE_EBI_CH0,
2125 .ab = 245113344,
2126 .ib = 392181351,
2127 },
2128 {
2129 .src = MSM_BUS_MASTER_JPEG_ENC,
2130 .dst = MSM_BUS_SLAVE_SMI,
2131 .ab = 106536960,
2132 .ib = 170459136,
2133 },
2134 {
2135 .src = MSM_BUS_MASTER_JPEG_ENC,
2136 .dst = MSM_BUS_SLAVE_EBI_CH0,
2137 .ab = 106536960,
2138 .ib = 170459136,
2139 },
2140};
2141
2142static struct msm_bus_paths cam_bus_client_config[] = {
2143 {
2144 ARRAY_SIZE(cam_init_vectors),
2145 cam_init_vectors,
2146 },
2147 {
2148 ARRAY_SIZE(cam_preview_vectors),
2149 cam_preview_vectors,
2150 },
2151 {
2152 ARRAY_SIZE(cam_video_vectors),
2153 cam_video_vectors,
2154 },
2155 {
2156 ARRAY_SIZE(cam_snapshot_vectors),
2157 cam_snapshot_vectors,
2158 },
2159 {
2160 ARRAY_SIZE(cam_zsl_vectors),
2161 cam_zsl_vectors,
2162 },
2163 {
2164 ARRAY_SIZE(cam_stereo_video_vectors),
2165 cam_stereo_video_vectors,
2166 },
2167 {
2168 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2169 cam_stereo_snapshot_vectors,
2170 },
2171};
2172
2173static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2174 cam_bus_client_config,
2175 ARRAY_SIZE(cam_bus_client_config),
2176 .name = "msm_camera",
2177};
2178#endif
2179
2180struct msm_camera_device_platform_data msm_camera_device_data = {
2181 .camera_gpio_on = config_camera_on_gpios,
2182 .camera_gpio_off = config_camera_off_gpios,
2183 .ioext.csiphy = 0x04800000,
2184 .ioext.csisz = 0x00000400,
2185 .ioext.csiirq = CSI_0_IRQ,
2186 .ioclk.mclk_clk_rate = 24000000,
2187 .ioclk.vfe_clk_rate = 228570000,
2188#ifdef CONFIG_MSM_BUS_SCALING
2189 .cam_bus_scale_table = &cam_bus_client_pdata,
2190#endif
2191};
2192
2193#ifdef CONFIG_QS_S5K4E1
2194struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2195 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2196 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2197 .ioext.csiphy = 0x04800000,
2198 .ioext.csisz = 0x00000400,
2199 .ioext.csiirq = CSI_0_IRQ,
2200 .ioclk.mclk_clk_rate = 24000000,
2201 .ioclk.vfe_clk_rate = 228570000,
2202#ifdef CONFIG_MSM_BUS_SCALING
2203 .cam_bus_scale_table = &cam_bus_client_pdata,
2204#endif
2205};
2206#endif
2207
2208struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2209 .camera_gpio_on = config_camera_on_gpios_web_cam,
2210 .camera_gpio_off = config_camera_off_gpios_web_cam,
2211 .ioext.csiphy = 0x04900000,
2212 .ioext.csisz = 0x00000400,
2213 .ioext.csiirq = CSI_1_IRQ,
2214 .ioclk.mclk_clk_rate = 24000000,
2215 .ioclk.vfe_clk_rate = 228570000,
2216#ifdef CONFIG_MSM_BUS_SCALING
2217 .cam_bus_scale_table = &cam_bus_client_pdata,
2218#endif
2219};
2220
2221struct resource msm_camera_resources[] = {
2222 {
2223 .start = 0x04500000,
2224 .end = 0x04500000 + SZ_1M - 1,
2225 .flags = IORESOURCE_MEM,
2226 },
2227 {
2228 .start = VFE_IRQ,
2229 .end = VFE_IRQ,
2230 .flags = IORESOURCE_IRQ,
2231 },
2232};
2233#ifdef CONFIG_MT9E013
2234static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2235 .mount_angle = 0
2236};
2237
2238static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2239 .flash_type = MSM_CAMERA_FLASH_LED,
2240 .flash_src = &msm_flash_src
2241};
2242
2243static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2244 .sensor_name = "mt9e013",
2245 .sensor_reset = 106,
2246 .sensor_pwd = 85,
2247 .vcm_pwd = 1,
2248 .vcm_enable = 0,
2249 .pdata = &msm_camera_device_data,
2250 .resource = msm_camera_resources,
2251 .num_resources = ARRAY_SIZE(msm_camera_resources),
2252 .flash_data = &flash_mt9e013,
2253 .strobe_flash_data = &strobe_flash_xenon,
2254 .sensor_platform_info = &mt9e013_sensor_8660_info,
2255 .csi_if = 1
2256};
2257struct platform_device msm_camera_sensor_mt9e013 = {
2258 .name = "msm_camera_mt9e013",
2259 .dev = {
2260 .platform_data = &msm_camera_sensor_mt9e013_data,
2261 },
2262};
2263#endif
2264
2265#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302266static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2267 .mount_angle = 180
2268};
2269
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002270static struct msm_camera_sensor_flash_data flash_imx074 = {
2271 .flash_type = MSM_CAMERA_FLASH_LED,
2272 .flash_src = &msm_flash_src
2273};
2274
2275static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2276 .sensor_name = "imx074",
2277 .sensor_reset = 106,
2278 .sensor_pwd = 85,
2279 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2280 .vcm_enable = 1,
2281 .pdata = &msm_camera_device_data,
2282 .resource = msm_camera_resources,
2283 .num_resources = ARRAY_SIZE(msm_camera_resources),
2284 .flash_data = &flash_imx074,
2285 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302286 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002287 .csi_if = 1
2288};
2289struct platform_device msm_camera_sensor_imx074 = {
2290 .name = "msm_camera_imx074",
2291 .dev = {
2292 .platform_data = &msm_camera_sensor_imx074_data,
2293 },
2294};
2295#endif
2296#ifdef CONFIG_WEBCAM_OV9726
2297
2298static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2299 .mount_angle = 0
2300};
2301
2302static struct msm_camera_sensor_flash_data flash_ov9726 = {
2303 .flash_type = MSM_CAMERA_FLASH_LED,
2304 .flash_src = &msm_flash_src
2305};
2306static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2307 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002308 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002309 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2310 .sensor_pwd = 85,
2311 .vcm_pwd = 1,
2312 .vcm_enable = 0,
2313 .pdata = &msm_camera_device_data_web_cam,
2314 .resource = msm_camera_resources,
2315 .num_resources = ARRAY_SIZE(msm_camera_resources),
2316 .flash_data = &flash_ov9726,
2317 .sensor_platform_info = &ov9726_sensor_8660_info,
2318 .csi_if = 1
2319};
2320struct platform_device msm_camera_sensor_webcam_ov9726 = {
2321 .name = "msm_camera_ov9726",
2322 .dev = {
2323 .platform_data = &msm_camera_sensor_ov9726_data,
2324 },
2325};
2326#endif
2327#ifdef CONFIG_WEBCAM_OV7692
2328static struct msm_camera_sensor_flash_data flash_ov7692 = {
2329 .flash_type = MSM_CAMERA_FLASH_LED,
2330 .flash_src = &msm_flash_src
2331};
2332static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2333 .sensor_name = "ov7692",
2334 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2335 .sensor_pwd = 85,
2336 .vcm_pwd = 1,
2337 .vcm_enable = 0,
2338 .pdata = &msm_camera_device_data_web_cam,
2339 .resource = msm_camera_resources,
2340 .num_resources = ARRAY_SIZE(msm_camera_resources),
2341 .flash_data = &flash_ov7692,
2342 .csi_if = 1
2343};
2344
2345static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2346 .name = "msm_camera_ov7692",
2347 .dev = {
2348 .platform_data = &msm_camera_sensor_ov7692_data,
2349 },
2350};
2351#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002352#ifdef CONFIG_VX6953
2353static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2354 .mount_angle = 270
2355};
2356
2357static struct msm_camera_sensor_flash_data flash_vx6953 = {
2358 .flash_type = MSM_CAMERA_FLASH_NONE,
2359 .flash_src = &msm_flash_src
2360};
2361
2362static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2363 .sensor_name = "vx6953",
2364 .sensor_reset = 63,
2365 .sensor_pwd = 63,
2366 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2367 .vcm_enable = 1,
2368 .pdata = &msm_camera_device_data,
2369 .resource = msm_camera_resources,
2370 .num_resources = ARRAY_SIZE(msm_camera_resources),
2371 .flash_data = &flash_vx6953,
2372 .sensor_platform_info = &vx6953_sensor_8660_info,
2373 .csi_if = 1
2374};
2375struct platform_device msm_camera_sensor_vx6953 = {
2376 .name = "msm_camera_vx6953",
2377 .dev = {
2378 .platform_data = &msm_camera_sensor_vx6953_data,
2379 },
2380};
2381#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002382#ifdef CONFIG_QS_S5K4E1
2383
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302384static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2385#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2386 .mount_angle = 90
2387#else
2388 .mount_angle = 0
2389#endif
2390};
2391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002392static char eeprom_data[864];
2393static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2394 .flash_type = MSM_CAMERA_FLASH_LED,
2395 .flash_src = &msm_flash_src
2396};
2397
2398static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2399 .sensor_name = "qs_s5k4e1",
2400 .sensor_reset = 106,
2401 .sensor_pwd = 85,
2402 .vcm_pwd = 1,
2403 .vcm_enable = 0,
2404 .pdata = &msm_camera_device_data_qs_cam,
2405 .resource = msm_camera_resources,
2406 .num_resources = ARRAY_SIZE(msm_camera_resources),
2407 .flash_data = &flash_qs_s5k4e1,
2408 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302409 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002410 .csi_if = 1,
2411 .eeprom_data = eeprom_data,
2412};
2413struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2414 .name = "msm_camera_qs_s5k4e1",
2415 .dev = {
2416 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2417 },
2418};
2419#endif
2420static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2421 #ifdef CONFIG_MT9E013
2422 {
2423 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2424 },
2425 #endif
2426 #ifdef CONFIG_IMX074
2427 {
2428 I2C_BOARD_INFO("imx074", 0x1A),
2429 },
2430 #endif
2431 #ifdef CONFIG_WEBCAM_OV7692
2432 {
2433 I2C_BOARD_INFO("ov7692", 0x78),
2434 },
2435 #endif
2436 #ifdef CONFIG_WEBCAM_OV9726
2437 {
2438 I2C_BOARD_INFO("ov9726", 0x10),
2439 },
2440 #endif
2441 #ifdef CONFIG_QS_S5K4E1
2442 {
2443 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2444 },
2445 #endif
2446};
Jilai Wang971f97f2011-07-13 14:25:25 -04002447
2448static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002449 #ifdef CONFIG_WEBCAM_OV9726
2450 {
2451 I2C_BOARD_INFO("ov9726", 0x10),
2452 },
2453 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002454 #ifdef CONFIG_VX6953
2455 {
2456 I2C_BOARD_INFO("vx6953", 0x20),
2457 },
2458 #endif
2459};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002460#endif
2461
2462#ifdef CONFIG_MSM_GEMINI
2463static struct resource msm_gemini_resources[] = {
2464 {
2465 .start = 0x04600000,
2466 .end = 0x04600000 + SZ_1M - 1,
2467 .flags = IORESOURCE_MEM,
2468 },
2469 {
2470 .start = INT_JPEG,
2471 .end = INT_JPEG,
2472 .flags = IORESOURCE_IRQ,
2473 },
2474};
2475
2476static struct platform_device msm_gemini_device = {
2477 .name = "msm_gemini",
2478 .resource = msm_gemini_resources,
2479 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2480};
2481#endif
2482
2483#ifdef CONFIG_I2C_QUP
2484static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2485{
2486}
2487
2488static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2489 .clk_freq = 384000,
2490 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002491 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2492};
2493
2494static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2495 .clk_freq = 100000,
2496 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002497 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2498};
2499
2500static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2501 .clk_freq = 100000,
2502 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002503 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2504};
2505
2506static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2507 .clk_freq = 100000,
2508 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002509 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2510};
2511
2512static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2513 .clk_freq = 100000,
2514 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002515 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2516};
2517
2518static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2519 .clk_freq = 100000,
2520 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002521 .use_gsbi_shared_mode = 1,
2522 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2523};
2524#endif
2525
2526#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2527static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2528 .max_clock_speed = 24000000,
2529};
2530
2531static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2532 .max_clock_speed = 24000000,
2533};
2534#endif
2535
2536#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537/* CODEC/TSSC SSBI */
2538static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2539 .controller_type = MSM_SBI_CTRL_SSBI,
2540};
2541#endif
2542
2543#ifdef CONFIG_BATTERY_MSM
2544/* Use basic value for fake MSM battery */
2545static struct msm_psy_batt_pdata msm_psy_batt_data = {
2546 .avail_chg_sources = AC_CHG,
2547};
2548
2549static struct platform_device msm_batt_device = {
2550 .name = "msm-battery",
2551 .id = -1,
2552 .dev.platform_data = &msm_psy_batt_data,
2553};
2554#endif
2555
2556#ifdef CONFIG_FB_MSM_LCDC_DSUB
2557/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2558 prim = 1024 x 600 x 4(bpp) x 2(pages)
2559 This is the difference. */
2560#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2561#else
2562#define MSM_FB_DSUB_PMEM_ADDER (0)
2563#endif
2564
2565/* Sensors DSPS platform data */
2566#ifdef CONFIG_MSM_DSPS
2567
2568static struct dsps_gpio_info dsps_surf_gpios[] = {
2569 {
2570 .name = "compass_rst_n",
2571 .num = GPIO_COMPASS_RST_N,
2572 .on_val = 1, /* device not in reset */
2573 .off_val = 0, /* device in reset */
2574 },
2575 {
2576 .name = "gpio_r_altimeter_reset_n",
2577 .num = GPIO_R_ALTIMETER_RESET_N,
2578 .on_val = 1, /* device not in reset */
2579 .off_val = 0, /* device in reset */
2580 }
2581};
2582
2583static struct dsps_gpio_info dsps_fluid_gpios[] = {
2584 {
2585 .name = "gpio_n_altimeter_reset_n",
2586 .num = GPIO_N_ALTIMETER_RESET_N,
2587 .on_val = 1, /* device not in reset */
2588 .off_val = 0, /* device in reset */
2589 }
2590};
2591
2592static void __init msm8x60_init_dsps(void)
2593{
2594 struct msm_dsps_platform_data *pdata =
2595 msm_dsps_device.dev.platform_data;
2596 /*
2597 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2598 * to the power supply and not controled via GPIOs. Fluid uses a
2599 * different IO-Expender (north) than used on surf/ffa.
2600 */
2601 if (machine_is_msm8x60_fluid()) {
2602 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002603 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2604 pdata->gpios = dsps_fluid_gpios;
2605 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2606 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002607 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2608 pdata->gpios = dsps_surf_gpios;
2609 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2610 }
2611
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002612 platform_device_register(&msm_dsps_device);
2613}
2614#endif /* CONFIG_MSM_DSPS */
2615
2616#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002617#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002618#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#endif
2621
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002622#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2623#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2624#elif defined(CONFIG_FB_MSM_TVOUT)
2625#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2626#else
2627#define MSM_FB_EXT_BUFT_SIZE 0
2628#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002629
Huaibin Yang335f4012011-12-02 14:11:48 -08002630#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
kuogee hsieha39040b2011-08-11 15:40:45 -07002631/* width x height x 3 bpp x 2 frame buffer */
2632#define MSM_FB_WRITEBACK_SIZE (1024 * 600 * 3 * 2)
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002633#define MSM_FB_WRITEBACK_OFFSET \
2634 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636#define MSM_FB_WRITEBACK_SIZE 0
2637#define MSM_FB_WRITEBACK_OFFSET 0
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638#endif
2639
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002640#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2641/* 4 bpp x 2 page HDMI case */
2642#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2643#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002644/* Note: must be multiple of 4096 */
2645#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
2646 MSM_FB_WRITEBACK_SIZE + \
2647 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002648#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002650#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2651#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2652#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002653#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002654#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002655
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002656static int writeback_offset(void)
2657{
2658 return MSM_FB_WRITEBACK_OFFSET;
2659}
2660
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002661#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2662#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002663#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002664
2665#define MSM_SMI_BASE 0x38000000
2666#define MSM_SMI_SIZE 0x4000000
2667
2668#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002669#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002670
2671#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2672#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2673#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2674
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002675#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2676#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002677#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002678
2679#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2680#define MSM_ION_HEAP_NUM 5
2681#else
2682#define MSM_ION_HEAP_NUM 2
2683#endif
2684
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002685static unsigned fb_size;
2686static int __init fb_size_setup(char *p)
2687{
2688 fb_size = memparse(p, NULL);
2689 return 0;
2690}
2691early_param("fb_size", fb_size_setup);
2692
2693static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2694static int __init pmem_kernel_ebi1_size_setup(char *p)
2695{
2696 pmem_kernel_ebi1_size = memparse(p, NULL);
2697 return 0;
2698}
2699early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2700
2701#ifdef CONFIG_ANDROID_PMEM
2702static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2703static int __init pmem_sf_size_setup(char *p)
2704{
2705 pmem_sf_size = memparse(p, NULL);
2706 return 0;
2707}
2708early_param("pmem_sf_size", pmem_sf_size_setup);
2709
2710static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2711
2712static int __init pmem_adsp_size_setup(char *p)
2713{
2714 pmem_adsp_size = memparse(p, NULL);
2715 return 0;
2716}
2717early_param("pmem_adsp_size", pmem_adsp_size_setup);
2718
2719static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2720
2721static int __init pmem_audio_size_setup(char *p)
2722{
2723 pmem_audio_size = memparse(p, NULL);
2724 return 0;
2725}
2726early_param("pmem_audio_size", pmem_audio_size_setup);
2727#endif
2728
2729static struct resource msm_fb_resources[] = {
2730 {
2731 .flags = IORESOURCE_DMA,
2732 }
2733};
2734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002735static int msm_fb_detect_panel(const char *name)
2736{
2737 if (machine_is_msm8x60_fluid()) {
2738 uint32_t soc_platform_version = socinfo_get_platform_version();
2739 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2740#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2741 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002742 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2743 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002744 return 0;
2745#endif
2746 } else { /*P3 and up use AUO panel */
2747#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2748 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002749 strnlen(LCDC_AUO_PANEL_NAME,
2750 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751 return 0;
2752#endif
2753 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002754#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2755 } else if machine_is_msm8x60_dragon() {
2756 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002757 strnlen(LCDC_NT35582_PANEL_NAME,
2758 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002759 return 0;
2760#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002761 } else {
2762 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002763 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2764 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002765 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002766
2767#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2768 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2769 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2770 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2771 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2772 PANEL_NAME_MAX_LEN)))
2773 return 0;
2774
2775 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2776 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2777 PANEL_NAME_MAX_LEN)))
2778 return 0;
2779
2780 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2781 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2782 PANEL_NAME_MAX_LEN)))
2783 return 0;
2784#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002785 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002786
2787 if (!strncmp(name, HDMI_PANEL_NAME,
2788 strnlen(HDMI_PANEL_NAME,
2789 PANEL_NAME_MAX_LEN)))
2790 return 0;
2791
2792 if (!strncmp(name, TVOUT_PANEL_NAME,
2793 strnlen(TVOUT_PANEL_NAME,
2794 PANEL_NAME_MAX_LEN)))
2795 return 0;
2796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002797 pr_warning("%s: not supported '%s'", __func__, name);
2798 return -ENODEV;
2799}
2800
2801static struct msm_fb_platform_data msm_fb_pdata = {
2802 .detect_client = msm_fb_detect_panel,
2803};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804
2805static struct platform_device msm_fb_device = {
2806 .name = "msm_fb",
2807 .id = 0,
2808 .num_resources = ARRAY_SIZE(msm_fb_resources),
2809 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811};
2812
2813#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002814#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002815static struct android_pmem_platform_data android_pmem_pdata = {
2816 .name = "pmem",
2817 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2818 .cached = 1,
2819 .memory_type = MEMTYPE_EBI1,
2820};
2821
2822static struct platform_device android_pmem_device = {
2823 .name = "android_pmem",
2824 .id = 0,
2825 .dev = {.platform_data = &android_pmem_pdata},
2826};
2827
2828static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2829 .name = "pmem_adsp",
2830 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2831 .cached = 0,
2832 .memory_type = MEMTYPE_EBI1,
2833};
2834
2835static struct platform_device android_pmem_adsp_device = {
2836 .name = "android_pmem",
2837 .id = 2,
2838 .dev = { .platform_data = &android_pmem_adsp_pdata },
2839};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002840#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002841static struct android_pmem_platform_data android_pmem_audio_pdata = {
2842 .name = "pmem_audio",
2843 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2844 .cached = 0,
2845 .memory_type = MEMTYPE_EBI1,
2846};
2847
2848static struct platform_device android_pmem_audio_device = {
2849 .name = "android_pmem",
2850 .id = 4,
2851 .dev = { .platform_data = &android_pmem_audio_pdata },
2852};
2853
Laura Abbott1e36a022011-06-22 17:08:13 -07002854#define PMEM_BUS_WIDTH(_bw) \
2855 { \
2856 .vectors = &(struct msm_bus_vectors){ \
2857 .src = MSM_BUS_MASTER_AMPSS_M0, \
2858 .dst = MSM_BUS_SLAVE_SMI, \
2859 .ib = (_bw), \
2860 .ab = 0, \
2861 }, \
2862 .num_paths = 1, \
2863 }
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002864#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Laura Abbott1e36a022011-06-22 17:08:13 -07002865static struct msm_bus_paths pmem_smi_table[] = {
2866 [0] = PMEM_BUS_WIDTH(0), /* Off */
2867 [1] = PMEM_BUS_WIDTH(1), /* On */
2868};
2869
2870static struct msm_bus_scale_pdata smi_client_pdata = {
2871 .usecase = pmem_smi_table,
2872 .num_usecases = ARRAY_SIZE(pmem_smi_table),
2873 .name = "pmem_smi",
2874};
2875
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002876int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002877{
2878 int bus_id = (int) data;
2879
2880 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002881 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002882}
2883
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002884int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002885{
2886 int bus_id = (int) data;
2887
2888 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002889 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002890}
2891
Alex Bird199980e2011-10-21 11:29:27 -07002892void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002893{
2894 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2895}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002896static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2897 .name = "pmem_smipool",
2898 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2899 .cached = 0,
2900 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002901 .request_region = request_smi_region,
2902 .release_region = release_smi_region,
2903 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002904 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002905};
2906static struct platform_device android_pmem_smipool_device = {
2907 .name = "android_pmem",
2908 .id = 7,
2909 .dev = { .platform_data = &android_pmem_smipool_pdata },
2910};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002911#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002912#endif
2913
2914#define GPIO_DONGLE_PWR_EN 258
2915static void setup_display_power(void);
2916static int lcdc_vga_enabled;
2917static int vga_enable_request(int enable)
2918{
2919 if (enable)
2920 lcdc_vga_enabled = 1;
2921 else
2922 lcdc_vga_enabled = 0;
2923 setup_display_power();
2924
2925 return 0;
2926}
2927
2928#define GPIO_BACKLIGHT_PWM0 0
2929#define GPIO_BACKLIGHT_PWM1 1
2930
2931static int pmic_backlight_gpio[2]
2932 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2933static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2934 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2935 .vga_switch = vga_enable_request,
2936};
2937
2938static struct platform_device lcdc_samsung_panel_device = {
2939 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2940 .id = 0,
2941 .dev = {
2942 .platform_data = &lcdc_samsung_panel_data,
2943 }
2944};
2945#if (!defined(CONFIG_SPI_QUP)) && \
2946 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2947 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2948
2949static int lcdc_spi_gpio_array_num[] = {
2950 LCDC_SPI_GPIO_CLK,
2951 LCDC_SPI_GPIO_CS,
2952 LCDC_SPI_GPIO_MOSI,
2953};
2954
2955static uint32_t lcdc_spi_gpio_config_data[] = {
2956 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2957 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2958 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2959 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2960 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2961 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2962};
2963
2964static void lcdc_config_spi_gpios(int enable)
2965{
2966 int n;
2967 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2968 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2969}
2970#endif
2971
2972#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2973#ifdef CONFIG_SPI_QUP
2974static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2975 {
2976 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2977 .mode = SPI_MODE_3,
2978 .bus_num = 1,
2979 .chip_select = 0,
2980 .max_speed_hz = 10800000,
2981 }
2982};
2983#endif /* CONFIG_SPI_QUP */
2984
2985static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2986#ifndef CONFIG_SPI_QUP
2987 .panel_config_gpio = lcdc_config_spi_gpios,
2988 .gpio_num = lcdc_spi_gpio_array_num,
2989#endif
2990};
2991
2992static struct platform_device lcdc_samsung_oled_panel_device = {
2993 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2994 .id = 0,
2995 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2996};
2997#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2998
2999#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3000#ifdef CONFIG_SPI_QUP
3001static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3002 {
3003 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3004 .mode = SPI_MODE_3,
3005 .bus_num = 1,
3006 .chip_select = 0,
3007 .max_speed_hz = 10800000,
3008 }
3009};
3010#endif
3011
3012static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3013#ifndef CONFIG_SPI_QUP
3014 .panel_config_gpio = lcdc_config_spi_gpios,
3015 .gpio_num = lcdc_spi_gpio_array_num,
3016#endif
3017};
3018
3019static struct platform_device lcdc_auo_wvga_panel_device = {
3020 .name = LCDC_AUO_PANEL_NAME,
3021 .id = 0,
3022 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3023};
3024#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3025
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003026#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3027
3028#define GPIO_NT35582_RESET 94
3029#define GPIO_NT35582_BL_EN_HW_PIN 24
3030#define GPIO_NT35582_BL_EN \
3031 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3032
3033static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3034
3035static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3036 .gpio_num = lcdc_nt35582_pmic_gpio,
3037};
3038
3039static struct platform_device lcdc_nt35582_panel_device = {
3040 .name = LCDC_NT35582_PANEL_NAME,
3041 .id = 0,
3042 .dev = {
3043 .platform_data = &lcdc_nt35582_panel_data,
3044 }
3045};
3046
3047static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3048 {
3049 .modalias = "lcdc_nt35582_spi",
3050 .mode = SPI_MODE_0,
3051 .bus_num = 0,
3052 .chip_select = 0,
3053 .max_speed_hz = 1100000,
3054 }
3055};
3056#endif
3057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003058#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3059static struct resource hdmi_msm_resources[] = {
3060 {
3061 .name = "hdmi_msm_qfprom_addr",
3062 .start = 0x00700000,
3063 .end = 0x007060FF,
3064 .flags = IORESOURCE_MEM,
3065 },
3066 {
3067 .name = "hdmi_msm_hdmi_addr",
3068 .start = 0x04A00000,
3069 .end = 0x04A00FFF,
3070 .flags = IORESOURCE_MEM,
3071 },
3072 {
3073 .name = "hdmi_msm_irq",
3074 .start = HDMI_IRQ,
3075 .end = HDMI_IRQ,
3076 .flags = IORESOURCE_IRQ,
3077 },
3078};
3079
3080static int hdmi_enable_5v(int on);
3081static int hdmi_core_power(int on, int show);
3082static int hdmi_cec_power(int on);
3083
3084static struct msm_hdmi_platform_data hdmi_msm_data = {
3085 .irq = HDMI_IRQ,
3086 .enable_5v = hdmi_enable_5v,
3087 .core_power = hdmi_core_power,
3088 .cec_power = hdmi_cec_power,
3089};
3090
3091static struct platform_device hdmi_msm_device = {
3092 .name = "hdmi_msm",
3093 .id = 0,
3094 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3095 .resource = hdmi_msm_resources,
3096 .dev.platform_data = &hdmi_msm_data,
3097};
3098#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3099
3100#ifdef CONFIG_FB_MSM_MIPI_DSI
3101static struct platform_device mipi_dsi_toshiba_panel_device = {
3102 .name = "mipi_toshiba",
3103 .id = 0,
3104};
3105
3106#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3107
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003108static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003109 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003110 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003111};
3112
3113static struct platform_device mipi_dsi_novatek_panel_device = {
3114 .name = "mipi_novatek",
3115 .id = 0,
3116 .dev = {
3117 .platform_data = &novatek_pdata,
3118 }
3119};
3120#endif
3121
3122static void __init msm8x60_allocate_memory_regions(void)
3123{
3124 void *addr;
3125 unsigned long size;
3126
3127 size = MSM_FB_SIZE;
3128 addr = alloc_bootmem_align(size, 0x1000);
3129 msm_fb_resources[0].start = __pa(addr);
3130 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3131 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3132 size, addr, __pa(addr));
3133
3134}
3135
3136#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3137 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3138/*virtual key support */
3139static ssize_t tma300_vkeys_show(struct kobject *kobj,
3140 struct kobj_attribute *attr, char *buf)
3141{
3142 return sprintf(buf,
3143 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3146 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3147 "\n");
3148}
3149
3150static struct kobj_attribute tma300_vkeys_attr = {
3151 .attr = {
3152 .mode = S_IRUGO,
3153 },
3154 .show = &tma300_vkeys_show,
3155};
3156
3157static struct attribute *tma300_properties_attrs[] = {
3158 &tma300_vkeys_attr.attr,
3159 NULL
3160};
3161
3162static struct attribute_group tma300_properties_attr_group = {
3163 .attrs = tma300_properties_attrs,
3164};
3165
3166static struct kobject *properties_kobj;
3167
3168
3169
3170#define CYTTSP_TS_GPIO_IRQ 61
3171static int cyttsp_platform_init(struct i2c_client *client)
3172{
3173 int rc = -EINVAL;
3174 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3175
3176 if (machine_is_msm8x60_fluid()) {
3177 pm8058_l5 = regulator_get(NULL, "8058_l5");
3178 if (IS_ERR(pm8058_l5)) {
3179 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3180 __func__, PTR_ERR(pm8058_l5));
3181 rc = PTR_ERR(pm8058_l5);
3182 return rc;
3183 }
3184 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3185 if (rc) {
3186 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3187 __func__, rc);
3188 goto reg_l5_put;
3189 }
3190
3191 rc = regulator_enable(pm8058_l5);
3192 if (rc) {
3193 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3194 __func__, rc);
3195 goto reg_l5_put;
3196 }
3197 }
3198 /* vote for s3 to enable i2c communication lines */
3199 pm8058_s3 = regulator_get(NULL, "8058_s3");
3200 if (IS_ERR(pm8058_s3)) {
3201 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3202 __func__, PTR_ERR(pm8058_s3));
3203 rc = PTR_ERR(pm8058_s3);
3204 goto reg_l5_disable;
3205 }
3206
3207 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3208 if (rc) {
3209 pr_err("%s: regulator_set_voltage() = %d\n",
3210 __func__, rc);
3211 goto reg_s3_put;
3212 }
3213
3214 rc = regulator_enable(pm8058_s3);
3215 if (rc) {
3216 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3217 __func__, rc);
3218 goto reg_s3_put;
3219 }
3220
3221 /* wait for vregs to stabilize */
3222 usleep_range(10000, 10000);
3223
3224 /* check this device active by reading first byte/register */
3225 rc = i2c_smbus_read_byte_data(client, 0x01);
3226 if (rc < 0) {
3227 pr_err("%s: i2c sanity check failed\n", __func__);
3228 goto reg_s3_disable;
3229 }
3230
3231 /* virtual keys */
3232 if (machine_is_msm8x60_fluid()) {
3233 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3234 properties_kobj = kobject_create_and_add("board_properties",
3235 NULL);
3236 if (properties_kobj)
3237 rc = sysfs_create_group(properties_kobj,
3238 &tma300_properties_attr_group);
3239 if (!properties_kobj || rc)
3240 pr_err("%s: failed to create board_properties\n",
3241 __func__);
3242 }
3243 return CY_OK;
3244
3245reg_s3_disable:
3246 regulator_disable(pm8058_s3);
3247reg_s3_put:
3248 regulator_put(pm8058_s3);
3249reg_l5_disable:
3250 if (machine_is_msm8x60_fluid())
3251 regulator_disable(pm8058_l5);
3252reg_l5_put:
3253 if (machine_is_msm8x60_fluid())
3254 regulator_put(pm8058_l5);
3255 return rc;
3256}
3257
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303258/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3259static int cyttsp_platform_suspend(struct i2c_client *client)
3260{
3261 msleep(20);
3262
3263 return CY_OK;
3264}
3265
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003266static int cyttsp_platform_resume(struct i2c_client *client)
3267{
3268 /* add any special code to strobe a wakeup pin or chip reset */
3269 msleep(10);
3270
3271 return CY_OK;
3272}
3273
3274static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3275 .flags = 0x04,
3276 .gen = CY_GEN3, /* or */
3277 .use_st = CY_USE_ST,
3278 .use_mt = CY_USE_MT,
3279 .use_hndshk = CY_SEND_HNDSHK,
3280 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303281 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003282 .use_gestures = CY_USE_GESTURES,
3283 /* activate up to 4 groups
3284 * and set active distance
3285 */
3286 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3287 CY_GEST_GRP3 | CY_GEST_GRP4 |
3288 CY_ACT_DIST,
3289 /* change act_intrvl to customize the Active power state
3290 * scanning/processing refresh interval for Operating mode
3291 */
3292 .act_intrvl = CY_ACT_INTRVL_DFLT,
3293 /* change tch_tmout to customize the touch timeout for the
3294 * Active power state for Operating mode
3295 */
3296 .tch_tmout = CY_TCH_TMOUT_DFLT,
3297 /* change lp_intrvl to customize the Low Power power state
3298 * scanning/processing refresh interval for Operating mode
3299 */
3300 .lp_intrvl = CY_LP_INTRVL_DFLT,
3301 .sleep_gpio = -1,
3302 .resout_gpio = -1,
3303 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3304 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303305 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003306 .init = cyttsp_platform_init,
3307};
3308
3309static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3310 .panel_maxx = 1083,
3311 .panel_maxy = 659,
3312 .disp_minx = 30,
3313 .disp_maxx = 1053,
3314 .disp_miny = 30,
3315 .disp_maxy = 629,
3316 .correct_fw_ver = 8,
3317 .fw_fname = "cyttsp_8660_ffa.hex",
3318 .flags = 0x00,
3319 .gen = CY_GEN2, /* or */
3320 .use_st = CY_USE_ST,
3321 .use_mt = CY_USE_MT,
3322 .use_hndshk = CY_SEND_HNDSHK,
3323 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303324 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003325 .use_gestures = CY_USE_GESTURES,
3326 /* activate up to 4 groups
3327 * and set active distance
3328 */
3329 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3330 CY_GEST_GRP3 | CY_GEST_GRP4 |
3331 CY_ACT_DIST,
3332 /* change act_intrvl to customize the Active power state
3333 * scanning/processing refresh interval for Operating mode
3334 */
3335 .act_intrvl = CY_ACT_INTRVL_DFLT,
3336 /* change tch_tmout to customize the touch timeout for the
3337 * Active power state for Operating mode
3338 */
3339 .tch_tmout = CY_TCH_TMOUT_DFLT,
3340 /* change lp_intrvl to customize the Low Power power state
3341 * scanning/processing refresh interval for Operating mode
3342 */
3343 .lp_intrvl = CY_LP_INTRVL_DFLT,
3344 .sleep_gpio = -1,
3345 .resout_gpio = -1,
3346 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3347 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303348 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003349 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303350 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003351};
3352static void cyttsp_set_params(void)
3353{
3354 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3355 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3356 cyttsp_fluid_pdata.panel_maxx = 539;
3357 cyttsp_fluid_pdata.panel_maxy = 994;
3358 cyttsp_fluid_pdata.disp_minx = 30;
3359 cyttsp_fluid_pdata.disp_maxx = 509;
3360 cyttsp_fluid_pdata.disp_miny = 60;
3361 cyttsp_fluid_pdata.disp_maxy = 859;
3362 cyttsp_fluid_pdata.correct_fw_ver = 4;
3363 } else {
3364 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3365 cyttsp_fluid_pdata.panel_maxx = 550;
3366 cyttsp_fluid_pdata.panel_maxy = 1013;
3367 cyttsp_fluid_pdata.disp_minx = 35;
3368 cyttsp_fluid_pdata.disp_maxx = 515;
3369 cyttsp_fluid_pdata.disp_miny = 69;
3370 cyttsp_fluid_pdata.disp_maxy = 869;
3371 cyttsp_fluid_pdata.correct_fw_ver = 5;
3372 }
3373
3374}
3375
3376static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3377 {
3378 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3379 .platform_data = &cyttsp_fluid_pdata,
3380#ifndef CY_USE_TIMER
3381 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3382#endif /* CY_USE_TIMER */
3383 },
3384};
3385
3386static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3387 {
3388 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3389 .platform_data = &cyttsp_tmg240_pdata,
3390#ifndef CY_USE_TIMER
3391 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3392#endif /* CY_USE_TIMER */
3393 },
3394};
3395#endif
3396
3397static struct regulator *vreg_tmg200;
3398
3399#define TS_PEN_IRQ_GPIO 61
3400static int tmg200_power(int vreg_on)
3401{
3402 int rc = -EINVAL;
3403
3404 if (!vreg_tmg200) {
3405 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3406 __func__, rc);
3407 return rc;
3408 }
3409
3410 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3411 regulator_disable(vreg_tmg200);
3412 if (rc < 0)
3413 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3414 __func__, vreg_on ? "enable" : "disable", rc);
3415
3416 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003417 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003418
3419 return rc;
3420}
3421
3422static int tmg200_dev_setup(bool enable)
3423{
3424 int rc;
3425
3426 if (enable) {
3427 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3428 if (IS_ERR(vreg_tmg200)) {
3429 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3430 __func__, PTR_ERR(vreg_tmg200));
3431 rc = PTR_ERR(vreg_tmg200);
3432 return rc;
3433 }
3434
3435 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3436 if (rc) {
3437 pr_err("%s: regulator_set_voltage() = %d\n",
3438 __func__, rc);
3439 goto reg_put;
3440 }
3441 } else {
3442 /* put voltage sources */
3443 regulator_put(vreg_tmg200);
3444 }
3445 return 0;
3446reg_put:
3447 regulator_put(vreg_tmg200);
3448 return rc;
3449}
3450
3451static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3452 .ts_name = "msm_tmg200_ts",
3453 .dis_min_x = 0,
3454 .dis_max_x = 1023,
3455 .dis_min_y = 0,
3456 .dis_max_y = 599,
3457 .min_tid = 0,
3458 .max_tid = 255,
3459 .min_touch = 0,
3460 .max_touch = 255,
3461 .min_width = 0,
3462 .max_width = 255,
3463 .power_on = tmg200_power,
3464 .dev_setup = tmg200_dev_setup,
3465 .nfingers = 2,
3466 .irq_gpio = TS_PEN_IRQ_GPIO,
3467 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3468};
3469
3470static struct i2c_board_info cy8ctmg200_board_info[] = {
3471 {
3472 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3473 .platform_data = &cy8ctmg200_pdata,
3474 }
3475};
3476
Zhang Chang Ken211df572011-07-05 19:16:39 -04003477static struct regulator *vreg_tma340;
3478
3479static int tma340_power(int vreg_on)
3480{
3481 int rc = -EINVAL;
3482
3483 if (!vreg_tma340) {
3484 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3485 __func__, rc);
3486 return rc;
3487 }
3488
3489 rc = vreg_on ? regulator_enable(vreg_tma340) :
3490 regulator_disable(vreg_tma340);
3491 if (rc < 0)
3492 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3493 __func__, vreg_on ? "enable" : "disable", rc);
3494
3495 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003496 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003497
3498 return rc;
3499}
3500
3501static struct kobject *tma340_prop_kobj;
3502
3503static int tma340_dragon_dev_setup(bool enable)
3504{
3505 int rc;
3506
3507 if (enable) {
3508 vreg_tma340 = regulator_get(NULL, "8901_l2");
3509 if (IS_ERR(vreg_tma340)) {
3510 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3511 __func__, PTR_ERR(vreg_tma340));
3512 rc = PTR_ERR(vreg_tma340);
3513 return rc;
3514 }
3515
3516 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3517 if (rc) {
3518 pr_err("%s: regulator_set_voltage() = %d\n",
3519 __func__, rc);
3520 goto reg_put;
3521 }
3522 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3523 tma340_prop_kobj = kobject_create_and_add("board_properties",
3524 NULL);
3525 if (tma340_prop_kobj) {
3526 rc = sysfs_create_group(tma340_prop_kobj,
3527 &tma300_properties_attr_group);
3528 if (rc) {
3529 kobject_put(tma340_prop_kobj);
3530 pr_err("%s: failed to create board_properties\n",
3531 __func__);
3532 goto reg_put;
3533 }
3534 }
3535
3536 } else {
3537 /* put voltage sources */
3538 regulator_put(vreg_tma340);
3539 /* destroy virtual keys */
3540 if (tma340_prop_kobj) {
3541 sysfs_remove_group(tma340_prop_kobj,
3542 &tma300_properties_attr_group);
3543 kobject_put(tma340_prop_kobj);
3544 }
3545 }
3546 return 0;
3547reg_put:
3548 regulator_put(vreg_tma340);
3549 return rc;
3550}
3551
3552
3553static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3554 .ts_name = "cy8ctma340",
3555 .dis_min_x = 0,
3556 .dis_max_x = 479,
3557 .dis_min_y = 0,
3558 .dis_max_y = 799,
3559 .min_tid = 0,
3560 .max_tid = 255,
3561 .min_touch = 0,
3562 .max_touch = 255,
3563 .min_width = 0,
3564 .max_width = 255,
3565 .power_on = tma340_power,
3566 .dev_setup = tma340_dragon_dev_setup,
3567 .nfingers = 2,
3568 .irq_gpio = TS_PEN_IRQ_GPIO,
3569 .resout_gpio = -1,
3570};
3571
3572static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3573 {
3574 I2C_BOARD_INFO("cy8ctma340", 0x24),
3575 .platform_data = &cy8ctma340_dragon_pdata,
3576 }
3577};
3578
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003579#ifdef CONFIG_SERIAL_MSM_HS
3580static int configure_uart_gpios(int on)
3581{
3582 int ret = 0, i;
3583 int uart_gpios[] = {53, 54, 55, 56};
3584 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3585 if (on) {
3586 ret = msm_gpiomux_get(uart_gpios[i]);
3587 if (unlikely(ret))
3588 break;
3589 } else {
3590 ret = msm_gpiomux_put(uart_gpios[i]);
3591 if (unlikely(ret))
3592 return ret;
3593 }
3594 }
3595 if (ret)
3596 for (; i >= 0; i--)
3597 msm_gpiomux_put(uart_gpios[i]);
3598 return ret;
3599}
3600static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3601 .inject_rx_on_wakeup = 1,
3602 .rx_to_inject = 0xFD,
3603 .gpio_config = configure_uart_gpios,
3604};
3605#endif
3606
3607
3608#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3609
3610static struct gpio_led gpio_exp_leds_config[] = {
3611 {
3612 .name = "left_led1:green",
3613 .gpio = GPIO_LEFT_LED_1,
3614 .active_low = 1,
3615 .retain_state_suspended = 0,
3616 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3617 },
3618 {
3619 .name = "left_led2:red",
3620 .gpio = GPIO_LEFT_LED_2,
3621 .active_low = 1,
3622 .retain_state_suspended = 0,
3623 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3624 },
3625 {
3626 .name = "left_led3:green",
3627 .gpio = GPIO_LEFT_LED_3,
3628 .active_low = 1,
3629 .retain_state_suspended = 0,
3630 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3631 },
3632 {
3633 .name = "wlan_led:orange",
3634 .gpio = GPIO_LEFT_LED_WLAN,
3635 .active_low = 1,
3636 .retain_state_suspended = 0,
3637 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3638 },
3639 {
3640 .name = "left_led5:green",
3641 .gpio = GPIO_LEFT_LED_5,
3642 .active_low = 1,
3643 .retain_state_suspended = 0,
3644 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3645 },
3646 {
3647 .name = "right_led1:green",
3648 .gpio = GPIO_RIGHT_LED_1,
3649 .active_low = 1,
3650 .retain_state_suspended = 0,
3651 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3652 },
3653 {
3654 .name = "right_led2:red",
3655 .gpio = GPIO_RIGHT_LED_2,
3656 .active_low = 1,
3657 .retain_state_suspended = 0,
3658 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3659 },
3660 {
3661 .name = "right_led3:green",
3662 .gpio = GPIO_RIGHT_LED_3,
3663 .active_low = 1,
3664 .retain_state_suspended = 0,
3665 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3666 },
3667 {
3668 .name = "bt_led:blue",
3669 .gpio = GPIO_RIGHT_LED_BT,
3670 .active_low = 1,
3671 .retain_state_suspended = 0,
3672 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3673 },
3674 {
3675 .name = "right_led5:green",
3676 .gpio = GPIO_RIGHT_LED_5,
3677 .active_low = 1,
3678 .retain_state_suspended = 0,
3679 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3680 },
3681};
3682
3683static struct gpio_led_platform_data gpio_leds_pdata = {
3684 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3685 .leds = gpio_exp_leds_config,
3686};
3687
3688static struct platform_device gpio_leds = {
3689 .name = "leds-gpio",
3690 .id = -1,
3691 .dev = {
3692 .platform_data = &gpio_leds_pdata,
3693 },
3694};
3695
3696static struct gpio_led fluid_gpio_leds[] = {
3697 {
3698 .name = "dual_led:green",
3699 .gpio = GPIO_LED1_GREEN_N,
3700 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3701 .active_low = 1,
3702 .retain_state_suspended = 0,
3703 },
3704 {
3705 .name = "dual_led:red",
3706 .gpio = GPIO_LED2_RED_N,
3707 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3708 .active_low = 1,
3709 .retain_state_suspended = 0,
3710 },
3711};
3712
3713static struct gpio_led_platform_data gpio_led_pdata = {
3714 .leds = fluid_gpio_leds,
3715 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3716};
3717
3718static struct platform_device fluid_leds_gpio = {
3719 .name = "leds-gpio",
3720 .id = -1,
3721 .dev = {
3722 .platform_data = &gpio_led_pdata,
3723 },
3724};
3725
3726#endif
3727
3728#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3729
3730static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3731 .phys_addr_base = 0x00106000,
3732 .reg_offsets = {
3733 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3734 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3735 },
3736 .phys_size = SZ_8K,
3737 .log_len = 4096, /* log's buffer length in bytes */
3738 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3739};
3740
3741static struct platform_device msm_rpm_log_device = {
3742 .name = "msm_rpm_log",
3743 .id = -1,
3744 .dev = {
3745 .platform_data = &msm_rpm_log_pdata,
3746 },
3747};
3748#endif
3749
3750#ifdef CONFIG_BATTERY_MSM8X60
3751static struct msm_charger_platform_data msm_charger_data = {
3752 .safety_time = 180,
3753 .update_time = 1,
3754 .max_voltage = 4200,
3755 .min_voltage = 3200,
3756};
3757
3758static struct platform_device msm_charger_device = {
3759 .name = "msm-charger",
3760 .id = -1,
3761 .dev = {
3762 .platform_data = &msm_charger_data,
3763 }
3764};
3765#endif
3766
3767/*
3768 * Consumer specific regulator names:
3769 * regulator name consumer dev_name
3770 */
3771static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3772 REGULATOR_SUPPLY("8058_l0", NULL),
3773};
3774static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3775 REGULATOR_SUPPLY("8058_l1", NULL),
3776};
3777static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3778 REGULATOR_SUPPLY("8058_l2", NULL),
3779};
3780static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3781 REGULATOR_SUPPLY("8058_l3", NULL),
3782};
3783static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3784 REGULATOR_SUPPLY("8058_l4", NULL),
3785};
3786static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3787 REGULATOR_SUPPLY("8058_l5", NULL),
3788};
3789static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3790 REGULATOR_SUPPLY("8058_l6", NULL),
3791};
3792static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3793 REGULATOR_SUPPLY("8058_l7", NULL),
3794};
3795static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3796 REGULATOR_SUPPLY("8058_l8", NULL),
3797};
3798static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3799 REGULATOR_SUPPLY("8058_l9", NULL),
3800};
3801static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3802 REGULATOR_SUPPLY("8058_l10", NULL),
3803};
3804static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3805 REGULATOR_SUPPLY("8058_l11", NULL),
3806};
3807static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3808 REGULATOR_SUPPLY("8058_l12", NULL),
3809};
3810static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3811 REGULATOR_SUPPLY("8058_l13", NULL),
3812};
3813static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3814 REGULATOR_SUPPLY("8058_l14", NULL),
3815};
3816static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3817 REGULATOR_SUPPLY("8058_l15", NULL),
3818};
3819static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3820 REGULATOR_SUPPLY("8058_l16", NULL),
3821};
3822static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3823 REGULATOR_SUPPLY("8058_l17", NULL),
3824};
3825static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3826 REGULATOR_SUPPLY("8058_l18", NULL),
3827};
3828static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3829 REGULATOR_SUPPLY("8058_l19", NULL),
3830};
3831static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3832 REGULATOR_SUPPLY("8058_l20", NULL),
3833};
3834static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3835 REGULATOR_SUPPLY("8058_l21", NULL),
3836};
3837static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3838 REGULATOR_SUPPLY("8058_l22", NULL),
3839};
3840static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3841 REGULATOR_SUPPLY("8058_l23", NULL),
3842};
3843static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3844 REGULATOR_SUPPLY("8058_l24", NULL),
3845};
3846static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3847 REGULATOR_SUPPLY("8058_l25", NULL),
3848};
3849static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3850 REGULATOR_SUPPLY("8058_s0", NULL),
3851};
3852static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3853 REGULATOR_SUPPLY("8058_s1", NULL),
3854};
3855static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3856 REGULATOR_SUPPLY("8058_s2", NULL),
3857};
3858static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3859 REGULATOR_SUPPLY("8058_s3", NULL),
3860};
3861static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3862 REGULATOR_SUPPLY("8058_s4", NULL),
3863};
3864static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3865 REGULATOR_SUPPLY("8058_lvs0", NULL),
3866};
3867static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3868 REGULATOR_SUPPLY("8058_lvs1", NULL),
3869};
3870static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3871 REGULATOR_SUPPLY("8058_ncp", NULL),
3872};
3873
3874static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3875 REGULATOR_SUPPLY("8901_l0", NULL),
3876};
3877static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3878 REGULATOR_SUPPLY("8901_l1", NULL),
3879};
3880static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3881 REGULATOR_SUPPLY("8901_l2", NULL),
3882};
3883static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3884 REGULATOR_SUPPLY("8901_l3", NULL),
3885};
3886static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3887 REGULATOR_SUPPLY("8901_l4", NULL),
3888};
3889static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3890 REGULATOR_SUPPLY("8901_l5", NULL),
3891};
3892static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3893 REGULATOR_SUPPLY("8901_l6", NULL),
3894};
3895static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3896 REGULATOR_SUPPLY("8901_s2", NULL),
3897};
3898static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3899 REGULATOR_SUPPLY("8901_s3", NULL),
3900};
3901static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3902 REGULATOR_SUPPLY("8901_s4", NULL),
3903};
3904static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3905 REGULATOR_SUPPLY("8901_lvs0", NULL),
3906};
3907static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3908 REGULATOR_SUPPLY("8901_lvs1", NULL),
3909};
3910static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3911 REGULATOR_SUPPLY("8901_lvs2", NULL),
3912};
3913static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3914 REGULATOR_SUPPLY("8901_lvs3", NULL),
3915};
3916static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3917 REGULATOR_SUPPLY("8901_mvs0", NULL),
3918};
3919
David Collins6f032ba2011-08-31 14:08:15 -07003920/* Pin control regulators */
3921static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3922 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3923};
3924static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3925 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3926};
3927static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3928 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3929};
3930static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3931 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3932};
3933static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3934 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3935};
3936static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3937 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3938};
3939
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003940#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3941 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003942 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003943 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003944 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003945 .init_data = { \
3946 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003947 .valid_modes_mask = _modes, \
3948 .valid_ops_mask = _ops, \
3949 .min_uV = _min_uV, \
3950 .max_uV = _max_uV, \
3951 .input_uV = _min_uV, \
3952 .apply_uV = _apply_uV, \
3953 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003954 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003955 .consumer_supplies = vreg_consumers_##_id, \
3956 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003957 ARRAY_SIZE(vreg_consumers_##_id), \
3958 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003959 .id = RPM_VREG_ID_##_id, \
3960 .default_uV = _default_uV, \
3961 .peak_uA = _peak_uA, \
3962 .avg_uA = _avg_uA, \
3963 .pull_down_enable = _pull_down, \
3964 .pin_ctrl = _pin_ctrl, \
3965 .freq = RPM_VREG_FREQ_##_freq, \
3966 .pin_fn = _pin_fn, \
3967 .force_mode = _force_mode, \
3968 .state = _state, \
3969 .sleep_selectable = _sleep_selectable, \
3970 }
3971
3972/* Pin control initialization */
3973#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3974 { \
3975 .init_data = { \
3976 .constraints = { \
3977 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3978 .always_on = _always_on, \
3979 }, \
3980 .num_consumer_supplies = \
3981 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3982 .consumer_supplies = vreg_consumers_##_id##_PC, \
3983 }, \
3984 .id = RPM_VREG_ID_##_id##_PC, \
3985 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003986 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003987 }
3988
3989/*
3990 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3991 * via the peak_uA value specified in the table below. If the value is less
3992 * than the high power min threshold for the regulator, then the regulator will
3993 * be set to LPM. Otherwise, it will be set to HPM.
3994 *
3995 * This value can be further overridden by specifying an initial mode via
3996 * .init_data.constraints.initial_mode.
3997 */
3998
David Collins6f032ba2011-08-31 14:08:15 -07003999#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4000 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004001 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4002 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4003 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4004 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4005 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004006 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4007 RPM_VREG_PIN_FN_8660_ENABLE, \
4008 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004009 _sleep_selectable, _always_on)
4010
David Collins6f032ba2011-08-31 14:08:15 -07004011#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4012 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004013 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4014 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4015 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4016 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4017 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004018 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4019 RPM_VREG_PIN_FN_8660_ENABLE, \
4020 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4021 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004022
David Collins6f032ba2011-08-31 14:08:15 -07004023#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004024 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4025 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004026 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4027 RPM_VREG_PIN_FN_8660_ENABLE, \
4028 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4029 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004030
David Collins6f032ba2011-08-31 14:08:15 -07004031#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004032 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4033 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004034 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4035 RPM_VREG_PIN_FN_8660_ENABLE, \
4036 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4037 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004038
David Collins6f032ba2011-08-31 14:08:15 -07004039#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4040#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4041#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4042#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4043#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004044
David Collins6f032ba2011-08-31 14:08:15 -07004045/* RPM early regulator constraints */
4046static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4047 /* ID a_on pd ss min_uV max_uV init_ip freq */
4048 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4049 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004050};
4051
David Collins6f032ba2011-08-31 14:08:15 -07004052/* RPM regulator constraints */
4053static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4054 /* ID a_on pd ss min_uV max_uV init_ip */
4055 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4056 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4057 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4058 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4059 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4060 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4061 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4062 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4063 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4064 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4065 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4066 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4067 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4068 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4069 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4070 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4071 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4072 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4073 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4074 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4075 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4076 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4077 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4078 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4079 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4080 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004081
David Collins6f032ba2011-08-31 14:08:15 -07004082 /* ID a_on pd ss min_uV max_uV init_ip freq */
4083 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4084 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4085 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4086
4087 /* ID a_on pd ss */
4088 RPM_VS(PM8058_LVS0, 0, 1, 0),
4089 RPM_VS(PM8058_LVS1, 0, 1, 0),
4090
4091 /* ID a_on pd ss min_uV max_uV */
4092 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4093
4094 /* ID a_on pd ss min_uV max_uV init_ip */
4095 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4096 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4099 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4100 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4101 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4102
4103 /* ID a_on pd ss min_uV max_uV init_ip freq */
4104 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4105 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4106 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4107
4108 /* ID a_on pd ss */
4109 RPM_VS(PM8901_LVS0, 1, 1, 0),
4110 RPM_VS(PM8901_LVS1, 0, 1, 0),
4111 RPM_VS(PM8901_LVS2, 0, 1, 0),
4112 RPM_VS(PM8901_LVS3, 0, 1, 0),
4113 RPM_VS(PM8901_MVS0, 0, 1, 0),
4114
4115 /* ID a_on pin_func pin_ctrl */
4116 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4119 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4120 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4121 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4122};
4123
4124static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4125 .init_data = rpm_regulator_early_init_data,
4126 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4127 .version = RPM_VREG_VERSION_8660,
4128 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4129 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4130};
4131
4132static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4133 .init_data = rpm_regulator_init_data,
4134 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4135 .version = RPM_VREG_VERSION_8660,
4136};
4137
4138static struct platform_device rpm_regulator_early_device = {
4139 .name = "rpm-regulator",
4140 .id = 0,
4141 .dev = {
4142 .platform_data = &rpm_regulator_early_pdata,
4143 },
4144};
4145
4146static struct platform_device rpm_regulator_device = {
4147 .name = "rpm-regulator",
4148 .id = 1,
4149 .dev = {
4150 .platform_data = &rpm_regulator_pdata,
4151 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004152};
4153
4154static struct platform_device *early_regulators[] __initdata = {
4155 &msm_device_saw_s0,
4156 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004157 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004158};
4159
4160static struct platform_device *early_devices[] __initdata = {
4161#ifdef CONFIG_MSM_BUS_SCALING
4162 &msm_bus_apps_fabric,
4163 &msm_bus_sys_fabric,
4164 &msm_bus_mm_fabric,
4165 &msm_bus_sys_fpb,
4166 &msm_bus_cpss_fpb,
4167#endif
4168 &msm_device_dmov_adm0,
4169 &msm_device_dmov_adm1,
4170};
4171
4172#if (defined(CONFIG_MARIMBA_CORE)) && \
4173 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4174
4175static int bluetooth_power(int);
4176static struct platform_device msm_bt_power_device = {
4177 .name = "bt_power",
4178 .id = -1,
4179 .dev = {
4180 .platform_data = &bluetooth_power,
4181 },
4182};
4183#endif
4184
4185static struct platform_device msm_tsens_device = {
4186 .name = "tsens-tm",
4187 .id = -1,
4188};
4189
4190static struct platform_device *rumi_sim_devices[] __initdata = {
4191 &smc91x_device,
4192 &msm_device_uart_dm12,
4193#ifdef CONFIG_I2C_QUP
4194 &msm_gsbi3_qup_i2c_device,
4195 &msm_gsbi4_qup_i2c_device,
4196 &msm_gsbi7_qup_i2c_device,
4197 &msm_gsbi8_qup_i2c_device,
4198 &msm_gsbi9_qup_i2c_device,
4199 &msm_gsbi12_qup_i2c_device,
4200#endif
4201#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004202 &msm_device_ssbi3,
4203#endif
4204#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004205#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004206 &android_pmem_device,
4207 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004208 &android_pmem_smipool_device,
4209#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004210 &android_pmem_audio_device,
4211#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004212#ifdef CONFIG_MSM_ROTATOR
4213 &msm_rotator_device,
4214#endif
4215 &msm_fb_device,
4216 &msm_kgsl_3d0,
4217 &msm_kgsl_2d0,
4218 &msm_kgsl_2d1,
4219 &lcdc_samsung_panel_device,
4220#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4221 &hdmi_msm_device,
4222#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4223#ifdef CONFIG_MSM_CAMERA
4224#ifdef CONFIG_MT9E013
4225 &msm_camera_sensor_mt9e013,
4226#endif
4227#ifdef CONFIG_IMX074
4228 &msm_camera_sensor_imx074,
4229#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004230#ifdef CONFIG_VX6953
4231 &msm_camera_sensor_vx6953,
4232#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004233#ifdef CONFIG_WEBCAM_OV7692
4234 &msm_camera_sensor_webcam_ov7692,
4235#endif
4236#ifdef CONFIG_WEBCAM_OV9726
4237 &msm_camera_sensor_webcam_ov9726,
4238#endif
4239#ifdef CONFIG_QS_S5K4E1
4240 &msm_camera_sensor_qs_s5k4e1,
4241#endif
4242#endif
4243#ifdef CONFIG_MSM_GEMINI
4244 &msm_gemini_device,
4245#endif
4246#ifdef CONFIG_MSM_VPE
4247 &msm_vpe_device,
4248#endif
4249 &msm_device_vidc,
4250};
4251
4252#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4253enum {
4254 SX150X_CORE,
4255 SX150X_DOCKING,
4256 SX150X_SURF,
4257 SX150X_LEFT_FHA,
4258 SX150X_RIGHT_FHA,
4259 SX150X_SOUTH,
4260 SX150X_NORTH,
4261 SX150X_CORE_FLUID,
4262};
4263
4264static struct sx150x_platform_data sx150x_data[] __initdata = {
4265 [SX150X_CORE] = {
4266 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4267 .oscio_is_gpo = false,
4268 .io_pullup_ena = 0x0c08,
4269 .io_pulldn_ena = 0x4060,
4270 .io_open_drain_ena = 0x000c,
4271 .io_polarity = 0,
4272 .irq_summary = -1, /* see fixup_i2c_configs() */
4273 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4274 },
4275 [SX150X_DOCKING] = {
4276 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4277 .oscio_is_gpo = false,
4278 .io_pullup_ena = 0x5e06,
4279 .io_pulldn_ena = 0x81b8,
4280 .io_open_drain_ena = 0,
4281 .io_polarity = 0,
4282 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4283 UI_INT2_N),
4284 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4285 GPIO_DOCKING_EXPANDER_BASE -
4286 GPIO_EXPANDER_GPIO_BASE,
4287 },
4288 [SX150X_SURF] = {
4289 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4290 .oscio_is_gpo = false,
4291 .io_pullup_ena = 0,
4292 .io_pulldn_ena = 0,
4293 .io_open_drain_ena = 0,
4294 .io_polarity = 0,
4295 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4296 UI_INT1_N),
4297 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4298 GPIO_SURF_EXPANDER_BASE -
4299 GPIO_EXPANDER_GPIO_BASE,
4300 },
4301 [SX150X_LEFT_FHA] = {
4302 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4303 .oscio_is_gpo = false,
4304 .io_pullup_ena = 0,
4305 .io_pulldn_ena = 0x40,
4306 .io_open_drain_ena = 0,
4307 .io_polarity = 0,
4308 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4309 UI_INT3_N),
4310 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4311 GPIO_LEFT_KB_EXPANDER_BASE -
4312 GPIO_EXPANDER_GPIO_BASE,
4313 },
4314 [SX150X_RIGHT_FHA] = {
4315 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4316 .oscio_is_gpo = true,
4317 .io_pullup_ena = 0,
4318 .io_pulldn_ena = 0,
4319 .io_open_drain_ena = 0,
4320 .io_polarity = 0,
4321 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4322 UI_INT3_N),
4323 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4324 GPIO_RIGHT_KB_EXPANDER_BASE -
4325 GPIO_EXPANDER_GPIO_BASE,
4326 },
4327 [SX150X_SOUTH] = {
4328 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4329 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4330 GPIO_SOUTH_EXPANDER_BASE -
4331 GPIO_EXPANDER_GPIO_BASE,
4332 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4333 },
4334 [SX150X_NORTH] = {
4335 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4336 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4337 GPIO_NORTH_EXPANDER_BASE -
4338 GPIO_EXPANDER_GPIO_BASE,
4339 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4340 .oscio_is_gpo = true,
4341 .io_open_drain_ena = 0x30,
4342 },
4343 [SX150X_CORE_FLUID] = {
4344 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4345 .oscio_is_gpo = false,
4346 .io_pullup_ena = 0x0408,
4347 .io_pulldn_ena = 0x4060,
4348 .io_open_drain_ena = 0x0008,
4349 .io_polarity = 0,
4350 .irq_summary = -1, /* see fixup_i2c_configs() */
4351 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4352 },
4353};
4354
4355#ifdef CONFIG_SENSORS_MSM_ADC
4356/* Configuration of EPM expander is done when client
4357 * request an adc read
4358 */
4359static struct sx150x_platform_data sx150x_epmdata = {
4360 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4361 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4362 GPIO_EPM_EXPANDER_BASE -
4363 GPIO_EXPANDER_GPIO_BASE,
4364 .irq_summary = -1,
4365};
4366#endif
4367
4368/* sx150x_low_power_cfg
4369 *
4370 * This data and init function are used to put unused gpio-expander output
4371 * lines into their low-power states at boot. The init
4372 * function must be deferred until a later init stage because the i2c
4373 * gpio expander drivers do not probe until after they are registered
4374 * (see register_i2c_devices) and the work-queues for those registrations
4375 * are processed. Because these lines are unused, there is no risk of
4376 * competing with a device driver for the gpio.
4377 *
4378 * gpio lines whose low-power states are input are naturally in their low-
4379 * power configurations once probed, see the platform data structures above.
4380 */
4381struct sx150x_low_power_cfg {
4382 unsigned gpio;
4383 unsigned val;
4384};
4385
4386static struct sx150x_low_power_cfg
4387common_sx150x_lp_cfgs[] __initdata = {
4388 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4389 {GPIO_EXT_GPS_LNA_EN, 0},
4390 {GPIO_MSM_WAKES_BT, 0},
4391 {GPIO_USB_UICC_EN, 0},
4392 {GPIO_BATT_GAUGE_EN, 0},
4393};
4394
4395static struct sx150x_low_power_cfg
4396surf_ffa_sx150x_lp_cfgs[] __initdata = {
4397 {GPIO_MIPI_DSI_RST_N, 0},
4398 {GPIO_DONGLE_PWR_EN, 0},
4399 {GPIO_CAP_TS_SLEEP, 1},
4400 {GPIO_WEB_CAMIF_RESET_N, 0},
4401};
4402
4403static void __init
4404cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4405{
4406 unsigned n;
4407 int rc;
4408
4409 for (n = 0; n < nelems; ++n) {
4410 rc = gpio_request(cfgs[n].gpio, NULL);
4411 if (!rc) {
4412 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4413 gpio_free(cfgs[n].gpio);
4414 }
4415
4416 if (rc) {
4417 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4418 __func__, cfgs[n].gpio, rc);
4419 }
Steve Muckle9161d302010-02-11 11:50:40 -08004420 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004421}
4422
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004423static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004424{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004425 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4426 ARRAY_SIZE(common_sx150x_lp_cfgs));
4427 if (!machine_is_msm8x60_fluid())
4428 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4429 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4430 return 0;
4431}
4432module_init(cfg_sx150xs_low_power);
4433
4434#ifdef CONFIG_I2C
4435static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4436 {
4437 I2C_BOARD_INFO("sx1509q", 0x3e),
4438 .platform_data = &sx150x_data[SX150X_CORE]
4439 },
4440};
4441
4442static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4443 {
4444 I2C_BOARD_INFO("sx1509q", 0x3f),
4445 .platform_data = &sx150x_data[SX150X_DOCKING]
4446 },
4447};
4448
4449static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4450 {
4451 I2C_BOARD_INFO("sx1509q", 0x70),
4452 .platform_data = &sx150x_data[SX150X_SURF]
4453 }
4454};
4455
4456static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4457 {
4458 I2C_BOARD_INFO("sx1508q", 0x21),
4459 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4460 },
4461 {
4462 I2C_BOARD_INFO("sx1508q", 0x22),
4463 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4464 }
4465};
4466
4467static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4468 {
4469 I2C_BOARD_INFO("sx1508q", 0x23),
4470 .platform_data = &sx150x_data[SX150X_SOUTH]
4471 },
4472 {
4473 I2C_BOARD_INFO("sx1508q", 0x20),
4474 .platform_data = &sx150x_data[SX150X_NORTH]
4475 }
4476};
4477
4478static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4479 {
4480 I2C_BOARD_INFO("sx1509q", 0x3e),
4481 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4482 },
4483};
4484
4485#ifdef CONFIG_SENSORS_MSM_ADC
4486static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4487 {
4488 I2C_BOARD_INFO("sx1509q", 0x3e),
4489 .platform_data = &sx150x_epmdata
4490 },
4491};
4492#endif
4493#endif
4494#endif
4495
4496#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004497
4498static struct adc_access_fn xoadc_fn = {
4499 pm8058_xoadc_select_chan_and_start_conv,
4500 pm8058_xoadc_read_adc_code,
4501 pm8058_xoadc_get_properties,
4502 pm8058_xoadc_slot_request,
4503 pm8058_xoadc_restore_slot,
4504 pm8058_xoadc_calibrate,
4505};
4506
4507#if defined(CONFIG_I2C) && \
4508 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4509static struct regulator *vreg_adc_epm1;
4510
4511static struct i2c_client *epm_expander_i2c_register_board(void)
4512
4513{
4514 struct i2c_adapter *i2c_adap;
4515 struct i2c_client *client = NULL;
4516 i2c_adap = i2c_get_adapter(0x0);
4517
4518 if (i2c_adap == NULL)
4519 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4520
4521 if (i2c_adap != NULL)
4522 client = i2c_new_device(i2c_adap,
4523 &fluid_expanders_i2c_epm_info[0]);
4524 return client;
4525
4526}
4527
4528static unsigned int msm_adc_gpio_configure_expander_enable(void)
4529{
4530 int rc = 0;
4531 static struct i2c_client *epm_i2c_client;
4532
4533 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4534
4535 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4536
4537 if (IS_ERR(vreg_adc_epm1)) {
4538 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4539 return 0;
4540 }
4541
4542 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4543 if (rc)
4544 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4545 "regulator set voltage failed\n");
4546
4547 rc = regulator_enable(vreg_adc_epm1);
4548 if (rc) {
4549 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4550 "Error while enabling regulator for epm s3 %d\n", rc);
4551 return rc;
4552 }
4553
4554 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4555 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4556
4557 msleep(1000);
4558
4559 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4560 if (!rc) {
4561 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4562 "Configure 5v boost\n");
4563 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4564 } else {
4565 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4566 "Error for epm 5v boost en\n");
4567 goto exit_vreg_epm;
4568 }
4569
4570 msleep(500);
4571
4572 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4573 if (!rc) {
4574 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4575 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4576 "Configure epm 3.3v\n");
4577 } else {
4578 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4579 "Error for gpio 3.3ven\n");
4580 goto exit_vreg_epm;
4581 }
4582 msleep(500);
4583
4584 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4585 "Trying to request EPM LVLSFT_EN\n");
4586 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4587 if (!rc) {
4588 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4589 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4590 "Configure the lvlsft\n");
4591 } else {
4592 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4593 "Error for epm lvlsft_en\n");
4594 goto exit_vreg_epm;
4595 }
4596
4597 msleep(500);
4598
4599 if (!epm_i2c_client)
4600 epm_i2c_client = epm_expander_i2c_register_board();
4601
4602 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4603 if (!rc)
4604 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4605 if (rc) {
4606 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4607 ": GPIO PWR MON Enable issue\n");
4608 goto exit_vreg_epm;
4609 }
4610
4611 msleep(1000);
4612
4613 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4614 if (!rc) {
4615 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4616 if (rc) {
4617 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4618 ": ADC1_PWDN error direction out\n");
4619 goto exit_vreg_epm;
4620 }
4621 }
4622
4623 msleep(100);
4624
4625 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4626 if (!rc) {
4627 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4628 if (rc) {
4629 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4630 ": ADC2_PWD error direction out\n");
4631 goto exit_vreg_epm;
4632 }
4633 }
4634
4635 msleep(1000);
4636
4637 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4638 if (!rc) {
4639 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4640 if (rc) {
4641 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4642 "Gpio request problem %d\n", rc);
4643 goto exit_vreg_epm;
4644 }
4645 }
4646
4647 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4648 if (!rc) {
4649 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4650 if (rc) {
4651 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4652 ": EPM_SPI_ADC1_CS_N error\n");
4653 goto exit_vreg_epm;
4654 }
4655 }
4656
4657 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4658 if (!rc) {
4659 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4660 if (rc) {
4661 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4662 ": EPM_SPI_ADC2_Cs_N error\n");
4663 goto exit_vreg_epm;
4664 }
4665 }
4666
4667 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4668 "the power monitor reset for epm\n");
4669
4670 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4671 if (!rc) {
4672 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4673 if (rc) {
4674 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4675 ": Error in the power mon reset\n");
4676 goto exit_vreg_epm;
4677 }
4678 }
4679
4680 msleep(1000);
4681
4682 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4683
4684 msleep(500);
4685
4686 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4687
4688 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4689
4690 return rc;
4691
4692exit_vreg_epm:
4693 regulator_disable(vreg_adc_epm1);
4694
4695 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4696 " rc = %d.\n", rc);
4697 return rc;
4698};
4699
4700static unsigned int msm_adc_gpio_configure_expander_disable(void)
4701{
4702 int rc = 0;
4703
4704 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4705 gpio_free(GPIO_PWR_MON_RESET_N);
4706
4707 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4708 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4709
4710 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4711 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4712
4713 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4714 gpio_free(GPIO_PWR_MON_START);
4715
4716 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4717 gpio_free(GPIO_ADC1_PWDN_N);
4718
4719 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4720 gpio_free(GPIO_ADC2_PWDN_N);
4721
4722 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4723 gpio_free(GPIO_PWR_MON_ENABLE);
4724
4725 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4726 gpio_free(GPIO_EPM_LVLSFT_EN);
4727
4728 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4729 gpio_free(GPIO_EPM_5V_BOOST_EN);
4730
4731 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4732 gpio_free(GPIO_EPM_3_3V_EN);
4733
4734 rc = regulator_disable(vreg_adc_epm1);
4735 if (rc)
4736 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4737 "Error while enabling regulator for epm s3 %d\n", rc);
4738 regulator_put(vreg_adc_epm1);
4739
4740 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4741 return rc;
4742};
4743
4744unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4745{
4746 int rc = 0;
4747
4748 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4749 cs_enable);
4750
4751 if (cs_enable < 16) {
4752 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4754 } else {
4755 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4756 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4757 }
4758 return rc;
4759};
4760
4761unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4762{
4763 int rc = 0;
4764
4765 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4766
4767 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4768
4769 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4770
4771 return rc;
4772};
4773#endif
4774
4775static struct msm_adc_channels msm_adc_channels_data[] = {
4776 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4777 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4778 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4779 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4780 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4781 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4782 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4783 CHAN_PATH_TYPE4,
4784 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4785 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4786 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4787 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4788 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4789 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4790 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4791 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4792 CHAN_PATH_TYPE12,
4793 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4794 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4795 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4796 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4797 CHAN_PATH_TYPE_NONE,
4798 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4799 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4800 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4801 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4802 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4803 scale_xtern_chgr_cur},
4804 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4805 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4806 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4807 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4808 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4809 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4810 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4811 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4812 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4813 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4814 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4815 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4816};
4817
4818static char *msm_adc_fluid_device_names[] = {
4819 "ADS_ADC1",
4820 "ADS_ADC2",
4821};
4822
4823static struct msm_adc_platform_data msm_adc_pdata = {
4824 .channel = msm_adc_channels_data,
4825 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4826#if defined(CONFIG_I2C) && \
4827 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4828 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4829 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4830 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4831 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4832#endif
4833};
4834
4835static struct platform_device msm_adc_device = {
4836 .name = "msm_adc",
4837 .id = -1,
4838 .dev = {
4839 .platform_data = &msm_adc_pdata,
4840 },
4841};
4842
4843static void pmic8058_xoadc_mpp_config(void)
4844{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304845 int rc, i;
4846 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304847 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304848 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304849 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304850 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304851 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304852 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304853 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304854 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304855 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304856 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304857 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4858 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304859 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004860
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304861 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4862 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4863 &xoadc_mpps[i].config);
4864 if (rc) {
4865 pr_err("%s: Config MPP %d of PM8058 failed\n",
4866 __func__, xoadc_mpps[i].mpp);
4867 }
4868 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004869}
4870
4871static struct regulator *vreg_ldo18_adc;
4872
4873static int pmic8058_xoadc_vreg_config(int on)
4874{
4875 int rc;
4876
4877 if (on) {
4878 rc = regulator_enable(vreg_ldo18_adc);
4879 if (rc)
4880 pr_err("%s: Enable of regulator ldo18_adc "
4881 "failed\n", __func__);
4882 } else {
4883 rc = regulator_disable(vreg_ldo18_adc);
4884 if (rc)
4885 pr_err("%s: Disable of regulator ldo18_adc "
4886 "failed\n", __func__);
4887 }
4888
4889 return rc;
4890}
4891
4892static int pmic8058_xoadc_vreg_setup(void)
4893{
4894 int rc;
4895
4896 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4897 if (IS_ERR(vreg_ldo18_adc)) {
4898 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4899 __func__, PTR_ERR(vreg_ldo18_adc));
4900 rc = PTR_ERR(vreg_ldo18_adc);
4901 goto fail;
4902 }
4903
4904 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4905 if (rc) {
4906 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4907 goto fail;
4908 }
4909
4910 return rc;
4911fail:
4912 regulator_put(vreg_ldo18_adc);
4913 return rc;
4914}
4915
4916static void pmic8058_xoadc_vreg_shutdown(void)
4917{
4918 regulator_put(vreg_ldo18_adc);
4919}
4920
4921/* usec. For this ADC,
4922 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4923 * Each channel has different configuration, thus at the time of starting
4924 * the conversion, xoadc will return actual conversion time
4925 * */
4926static struct adc_properties pm8058_xoadc_data = {
4927 .adc_reference = 2200, /* milli-voltage for this adc */
4928 .bitresolution = 15,
4929 .bipolar = 0,
4930 .conversiontime = 54,
4931};
4932
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304933static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004934 .xoadc_prop = &pm8058_xoadc_data,
4935 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4936 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4937 .xoadc_num = XOADC_PMIC_0,
4938 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4939 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4940};
4941#endif
4942
4943#ifdef CONFIG_MSM_SDIO_AL
4944
4945static unsigned mdm2ap_status = 140;
4946
4947static int configure_mdm2ap_status(int on)
4948{
4949 int ret = 0;
4950 if (on)
4951 ret = msm_gpiomux_get(mdm2ap_status);
4952 else
4953 ret = msm_gpiomux_put(mdm2ap_status);
4954
4955 if (ret)
4956 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4957 on);
4958
4959 return ret;
4960}
4961
4962
4963static int get_mdm2ap_status(void)
4964{
4965 return gpio_get_value(mdm2ap_status);
4966}
4967
4968static struct sdio_al_platform_data sdio_al_pdata = {
4969 .config_mdm2ap_status = configure_mdm2ap_status,
4970 .get_mdm2ap_status = get_mdm2ap_status,
4971 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004972 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004973 .peer_sdioc_version_major = 0x0004,
4974 .peer_sdioc_boot_version_minor = 0x0001,
4975 .peer_sdioc_boot_version_major = 0x0003
4976};
4977
4978struct platform_device msm_device_sdio_al = {
4979 .name = "msm_sdio_al",
4980 .id = -1,
4981 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004982 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004983 .platform_data = &sdio_al_pdata,
4984 },
4985};
4986
4987#endif /* CONFIG_MSM_SDIO_AL */
4988
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304989#define GPIO_VREG_ID_EXT_5V 0
4990
4991static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4992 REGULATOR_SUPPLY("ext_5v", NULL),
4993 REGULATOR_SUPPLY("8901_mpp0", NULL),
4994};
4995
4996#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4997 [GPIO_VREG_ID_##_id] = { \
4998 .init_data = { \
4999 .constraints = { \
5000 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5001 }, \
5002 .num_consumer_supplies = \
5003 ARRAY_SIZE(vreg_consumers_##_id), \
5004 .consumer_supplies = vreg_consumers_##_id, \
5005 }, \
5006 .regulator_name = _reg_name, \
5007 .active_low = _active_low, \
5008 .gpio_label = _gpio_label, \
5009 .gpio = _gpio, \
5010 }
5011
5012/* GPIO regulator constraints */
5013static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5014 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5015 PM8901_MPP_PM_TO_SYS(0), 0),
5016};
5017
5018/* GPIO regulator */
5019static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5020 .name = GPIO_REGULATOR_DEV_NAME,
5021 .id = PM8901_MPP_PM_TO_SYS(0),
5022 .dev = {
5023 .platform_data =
5024 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5025 },
5026};
5027
5028static void __init pm8901_vreg_mpp0_init(void)
5029{
5030 int rc;
5031
5032 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5033 .mpp = PM8901_MPP_PM_TO_SYS(0),
5034 .config = {
5035 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5036 .level = PM8901_MPP_DIG_LEVEL_VPH,
5037 },
5038 };
5039
5040 /*
5041 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5042 * implies that the regulator connected to MPP0 is enabled when
5043 * MPP0 is low.
5044 */
5045 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5046 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5047 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5048 } else {
5049 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5050 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5051 }
5052
5053 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5054 if (rc)
5055 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5056}
5057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005058static struct platform_device *charm_devices[] __initdata = {
5059 &msm_charm_modem,
5060#ifdef CONFIG_MSM_SDIO_AL
5061 &msm_device_sdio_al,
5062#endif
5063};
5064
Lei Zhou338cab82011-08-19 13:38:17 -04005065#ifdef CONFIG_SND_SOC_MSM8660_APQ
5066static struct platform_device *dragon_alsa_devices[] __initdata = {
5067 &msm_pcm,
5068 &msm_pcm_routing,
5069 &msm_cpudai0,
5070 &msm_cpudai1,
5071 &msm_cpudai_hdmi_rx,
5072 &msm_cpudai_bt_rx,
5073 &msm_cpudai_bt_tx,
5074 &msm_cpudai_fm_rx,
5075 &msm_cpudai_fm_tx,
5076 &msm_cpu_fe,
5077 &msm_stub_codec,
5078 &msm_lpa_pcm,
5079};
5080#endif
5081
5082static struct platform_device *asoc_devices[] __initdata = {
5083 &asoc_msm_pcm,
5084 &asoc_msm_dai0,
5085 &asoc_msm_dai1,
5086};
5087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005088static struct platform_device *surf_devices[] __initdata = {
5089 &msm_device_smd,
5090 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005091 &msm_pil_q6v3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005092#ifdef CONFIG_I2C_QUP
5093 &msm_gsbi3_qup_i2c_device,
5094 &msm_gsbi4_qup_i2c_device,
5095 &msm_gsbi7_qup_i2c_device,
5096 &msm_gsbi8_qup_i2c_device,
5097 &msm_gsbi9_qup_i2c_device,
5098 &msm_gsbi12_qup_i2c_device,
5099#endif
5100#ifdef CONFIG_SERIAL_MSM_HS
5101 &msm_device_uart_dm1,
5102#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305103#ifdef CONFIG_MSM_SSBI
5104 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305105 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305106#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005107#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005108 &msm_device_ssbi3,
5109#endif
5110#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5111 &isp1763_device,
5112#endif
5113
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005114#if defined (CONFIG_MSM_8x60_VOIP)
5115 &asoc_msm_mvs,
5116 &asoc_mvs_dai0,
5117 &asoc_mvs_dai1,
5118#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005119
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005120#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5121 &msm_device_otg,
5122#endif
5123#ifdef CONFIG_USB_GADGET_MSM_72K
5124 &msm_device_gadget_peripheral,
5125#endif
5126#ifdef CONFIG_USB_G_ANDROID
5127 &android_usb_device,
5128#endif
5129#ifdef CONFIG_BATTERY_MSM
5130 &msm_batt_device,
5131#endif
5132#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005133#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005134 &android_pmem_device,
5135 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005136 &android_pmem_smipool_device,
5137#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005138 &android_pmem_audio_device,
5139#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005140#ifdef CONFIG_MSM_ROTATOR
5141 &msm_rotator_device,
5142#endif
5143 &msm_fb_device,
5144 &msm_kgsl_3d0,
5145 &msm_kgsl_2d0,
5146 &msm_kgsl_2d1,
5147 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005148#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5149 &lcdc_nt35582_panel_device,
5150#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005151#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5152 &lcdc_samsung_oled_panel_device,
5153#endif
5154#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5155 &lcdc_auo_wvga_panel_device,
5156#endif
5157#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5158 &hdmi_msm_device,
5159#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5160#ifdef CONFIG_FB_MSM_MIPI_DSI
5161 &mipi_dsi_toshiba_panel_device,
5162 &mipi_dsi_novatek_panel_device,
5163#endif
5164#ifdef CONFIG_MSM_CAMERA
5165#ifdef CONFIG_MT9E013
5166 &msm_camera_sensor_mt9e013,
5167#endif
5168#ifdef CONFIG_IMX074
5169 &msm_camera_sensor_imx074,
5170#endif
5171#ifdef CONFIG_WEBCAM_OV7692
5172 &msm_camera_sensor_webcam_ov7692,
5173#endif
5174#ifdef CONFIG_WEBCAM_OV9726
5175 &msm_camera_sensor_webcam_ov9726,
5176#endif
5177#ifdef CONFIG_QS_S5K4E1
5178 &msm_camera_sensor_qs_s5k4e1,
5179#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005180#ifdef CONFIG_VX6953
5181 &msm_camera_sensor_vx6953,
5182#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005183#endif
5184#ifdef CONFIG_MSM_GEMINI
5185 &msm_gemini_device,
5186#endif
5187#ifdef CONFIG_MSM_VPE
5188 &msm_vpe_device,
5189#endif
5190
5191#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5192 &msm_rpm_log_device,
5193#endif
5194#if defined(CONFIG_MSM_RPM_STATS_LOG)
5195 &msm_rpm_stat_device,
5196#endif
5197 &msm_device_vidc,
5198#if (defined(CONFIG_MARIMBA_CORE)) && \
5199 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5200 &msm_bt_power_device,
5201#endif
5202#ifdef CONFIG_SENSORS_MSM_ADC
5203 &msm_adc_device,
5204#endif
David Collins6f032ba2011-08-31 14:08:15 -07005205 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005206
5207#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5208 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5209 &qcrypto_device,
5210#endif
5211
5212#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5213 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5214 &qcedev_device,
5215#endif
5216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005217
5218#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5219#ifdef CONFIG_MSM_USE_TSIF1
5220 &msm_device_tsif[1],
5221#else
5222 &msm_device_tsif[0],
5223#endif /* CONFIG_MSM_USE_TSIF1 */
5224#endif /* CONFIG_TSIF */
5225
5226#ifdef CONFIG_HW_RANDOM_MSM
5227 &msm_device_rng,
5228#endif
5229
5230 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005231 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005232#ifdef CONFIG_ION_MSM
5233 &ion_dev,
5234#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005235 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005236};
5237
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005238#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005239static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005240 .nr = MSM_ION_HEAP_NUM,
5241 .heaps = {
5242 {
5243 .id = ION_HEAP_SYSTEM_ID,
5244 .type = ION_HEAP_TYPE_SYSTEM,
5245 .name = ION_VMALLOC_HEAP_NAME,
5246 },
5247 {
5248 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5249 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5250 .name = ION_KMALLOC_HEAP_NAME,
5251 },
5252#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5253 {
5254 .id = ION_HEAP_EBI_ID,
5255 .type = ION_HEAP_TYPE_CARVEOUT,
5256 .name = ION_EBI1_HEAP_NAME,
5257 .size = MSM_ION_EBI_SIZE,
5258 .memory_type = ION_EBI_TYPE,
5259 },
5260 {
5261 .id = ION_HEAP_ADSP_ID,
5262 .type = ION_HEAP_TYPE_CARVEOUT,
5263 .name = ION_ADSP_HEAP_NAME,
5264 .size = MSM_ION_ADSP_SIZE,
5265 .memory_type = ION_EBI_TYPE,
5266 },
5267 {
5268 .id = ION_HEAP_SMI_ID,
5269 .type = ION_HEAP_TYPE_CARVEOUT,
5270 .name = ION_SMI_HEAP_NAME,
5271 .size = MSM_ION_SMI_SIZE,
5272 .memory_type = ION_SMI_TYPE,
5273 },
5274#endif
5275 }
5276};
5277
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005278static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005279 .name = "ion-msm",
5280 .id = 1,
5281 .dev = { .platform_data = &ion_pdata },
5282};
5283#endif
5284
5285
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005286static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5287 /* Kernel SMI memory pool for video core, used for firmware */
5288 /* and encoder, decoder scratch buffers */
5289 /* Kernel SMI memory pool should always precede the user space */
5290 /* SMI memory pool, as the video core will use offset address */
5291 /* from the Firmware base */
5292 [MEMTYPE_SMI_KERNEL] = {
5293 .start = KERNEL_SMI_BASE,
5294 .limit = KERNEL_SMI_SIZE,
5295 .size = KERNEL_SMI_SIZE,
5296 .flags = MEMTYPE_FLAGS_FIXED,
5297 },
5298 /* User space SMI memory pool for video core */
5299 /* used for encoder, decoder input & output buffers */
5300 [MEMTYPE_SMI] = {
5301 .start = USER_SMI_BASE,
5302 .limit = USER_SMI_SIZE,
5303 .flags = MEMTYPE_FLAGS_FIXED,
5304 },
5305 [MEMTYPE_EBI0] = {
5306 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5307 },
5308 [MEMTYPE_EBI1] = {
5309 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5310 },
5311};
5312
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005313static void reserve_ion_memory(void)
5314{
5315#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5316 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5317 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5318 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5319#endif
5320}
5321
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005322static void __init size_pmem_devices(void)
5323{
5324#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005325#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005326 android_pmem_adsp_pdata.size = pmem_adsp_size;
5327 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005328 android_pmem_pdata.size = pmem_sf_size;
5329#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005330 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5331#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005332}
5333
5334static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5335{
5336 msm8x60_reserve_table[p->memory_type].size += p->size;
5337}
5338
5339static void __init reserve_pmem_memory(void)
5340{
5341#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005342#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005343 reserve_memory_for(&android_pmem_adsp_pdata);
5344 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005345 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005346#endif
5347 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005348 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5349#endif
5350}
5351
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005352
5353
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005354static void __init msm8x60_calculate_reserve_sizes(void)
5355{
5356 size_pmem_devices();
5357 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005358 reserve_ion_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005359}
5360
5361static int msm8x60_paddr_to_memtype(unsigned int paddr)
5362{
5363 if (paddr >= 0x40000000 && paddr < 0x60000000)
5364 return MEMTYPE_EBI1;
5365 if (paddr >= 0x38000000 && paddr < 0x40000000)
5366 return MEMTYPE_SMI;
5367 return MEMTYPE_NONE;
5368}
5369
5370static struct reserve_info msm8x60_reserve_info __initdata = {
5371 .memtype_reserve_table = msm8x60_reserve_table,
5372 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5373 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5374};
5375
5376static void __init msm8x60_reserve(void)
5377{
5378 reserve_info = &msm8x60_reserve_info;
5379 msm_reserve();
5380}
5381
5382#define EXT_CHG_VALID_MPP 10
5383#define EXT_CHG_VALID_MPP_2 11
5384
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305385static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305386 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305387 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305388 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305389 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5390};
5391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005392#ifdef CONFIG_ISL9519_CHARGER
5393static int isl_detection_setup(void)
5394{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305395 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005396
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305397 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5398 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5399 &isl_mpp[i].config);
5400 if (ret) {
5401 pr_err("%s: Config MPP %d of PM8058 failed\n",
5402 __func__, isl_mpp[i].mpp);
5403 return ret;
5404 }
5405 }
5406
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005407 return ret;
5408}
5409
5410static struct isl_platform_data isl_data __initdata = {
5411 .chgcurrent = 700,
5412 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5413 .chg_detection_config = isl_detection_setup,
5414 .max_system_voltage = 4200,
5415 .min_system_voltage = 3200,
5416 .term_current = 120,
5417 .input_current = 2048,
5418};
5419
5420static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5421 {
5422 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305423 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005424 .platform_data = &isl_data,
5425 },
5426};
5427#endif
5428
5429#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5430static int smb137b_detection_setup(void)
5431{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305432 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005433
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305434 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5435 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5436 &isl_mpp[i].config);
5437 if (ret) {
5438 pr_err("%s: Config MPP %d of PM8058 failed\n",
5439 __func__, isl_mpp[i].mpp);
5440 return ret;
5441 }
5442 }
5443
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005444 return ret;
5445}
5446
5447static struct smb137b_platform_data smb137b_data __initdata = {
5448 .chg_detection_config = smb137b_detection_setup,
5449 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5450 .batt_mah_rating = 950,
5451};
5452
5453static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5454 {
5455 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305456 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005457 .platform_data = &smb137b_data,
5458 },
5459};
5460#endif
5461
5462#ifdef CONFIG_PMIC8058
5463#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305464#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005465
5466static int pm8058_gpios_init(void)
5467{
5468 int i;
5469 int rc;
5470 struct pm8058_gpio_cfg {
5471 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305472 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005473 };
5474
5475 struct pm8058_gpio_cfg gpio_cfgs[] = {
5476 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305477 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005478 {
5479 .direction = PM_GPIO_DIR_IN,
5480 .pull = PM_GPIO_PULL_DN,
5481 .vin_sel = 2,
5482 .function = PM_GPIO_FUNC_NORMAL,
5483 .inv_int_pol = 0,
5484 },
5485 },
5486#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5487 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305488 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005489 {
5490 .direction = PM_GPIO_DIR_IN,
5491 .pull = PM_GPIO_PULL_UP_30,
5492 .vin_sel = 2,
5493 .function = PM_GPIO_FUNC_NORMAL,
5494 .inv_int_pol = 0,
5495 },
5496 },
5497#endif
5498 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305499 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005500 {
5501 .direction = PM_GPIO_DIR_IN,
5502 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305503 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005504 .function = PM_GPIO_FUNC_NORMAL,
5505 .inv_int_pol = 0,
5506 },
5507 },
5508 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305509 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005510 {
5511 .direction = PM_GPIO_DIR_IN,
5512 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305513 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005514 .function = PM_GPIO_FUNC_NORMAL,
5515 .inv_int_pol = 0,
5516 },
5517 },
5518 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305519 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005520 {
5521 .direction = PM_GPIO_DIR_IN,
5522 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305523 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005524 .function = PM_GPIO_FUNC_NORMAL,
5525 .inv_int_pol = 0,
5526 },
5527 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005528 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305529 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005530 {
5531 .direction = PM_GPIO_DIR_OUT,
5532 .output_value = 1,
5533 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5534 .pull = PM_GPIO_PULL_DN,
5535 .out_strength = PM_GPIO_STRENGTH_HIGH,
5536 .function = PM_GPIO_FUNC_NORMAL,
5537 .vin_sel = 2,
5538 .inv_int_pol = 0,
5539 }
5540 },
5541 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305542 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005543 {
5544 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305545 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005546 .function = PM_GPIO_FUNC_NORMAL,
5547 .vin_sel = 2,
5548 .inv_int_pol = 0,
5549 }
5550 },
5551 };
5552
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305553#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5554 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305555 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305556 .direction = PM_GPIO_DIR_IN,
5557 .pull = PM_GPIO_PULL_UP_1P5,
5558 .vin_sel = 2,
5559 .function = PM_GPIO_FUNC_NORMAL,
5560 };
5561#endif
5562
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005563#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305564 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305565 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305566 .direction = PM_GPIO_DIR_OUT,
5567 .pull = PM_GPIO_PULL_NO,
5568 .out_strength = PM_GPIO_STRENGTH_HIGH,
5569 .function = PM_GPIO_FUNC_NORMAL,
5570 .inv_int_pol = 0,
5571 .vin_sel = 2,
5572 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5573 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005574 };
5575#endif
5576
5577#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5578 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305579 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005580 {
5581 .direction = PM_GPIO_DIR_IN,
5582 .pull = PM_GPIO_PULL_UP_1P5,
5583 .vin_sel = 2,
5584 .function = PM_GPIO_FUNC_NORMAL,
5585 .inv_int_pol = 0,
5586 }
5587 };
5588#endif
5589
5590#if defined(CONFIG_QS_S5K4E1)
5591 {
5592 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305593 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005594 {
5595 .direction = PM_GPIO_DIR_OUT,
5596 .output_value = 0,
5597 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5598 .pull = PM_GPIO_PULL_DN,
5599 .out_strength = PM_GPIO_STRENGTH_HIGH,
5600 .function = PM_GPIO_FUNC_NORMAL,
5601 .vin_sel = 2,
5602 .inv_int_pol = 0,
5603 }
5604 };
5605#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005606#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5607 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305608 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005609 {
5610 .direction = PM_GPIO_DIR_OUT,
5611 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5612 .output_value = 1,
5613 .pull = PM_GPIO_PULL_UP_30,
5614 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305615 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005616 .out_strength = PM_GPIO_STRENGTH_HIGH,
5617 .function = PM_GPIO_FUNC_NORMAL,
5618 .inv_int_pol = 0,
5619 }
5620 };
5621#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005622#if defined(CONFIG_HAPTIC_ISA1200) || \
5623 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5624 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305625 rc = pm8xxx_gpio_config(
5626 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5627 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005628 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305629 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005630 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305631 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305632 rc = pm8xxx_gpio_config(
5633 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5634 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305635 if (rc < 0) {
5636 pr_err("%s: pmic haptics ldo gpio config failed\n",
5637 __func__);
5638 }
5639
5640 }
5641#endif
5642
5643#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5644 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5645 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5646 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305647 rc = pm8xxx_gpio_config(
5648 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5649 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305650 if (rc < 0) {
5651 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5652 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005653 }
5654 }
5655#endif
5656
5657#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5658 /* Line_in only for 8660 ffa & surf */
5659 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005660 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005661 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305662 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005663 &line_in_gpio_cfg.cfg);
5664 if (rc < 0) {
5665 pr_err("%s pmic line_in gpio config failed\n",
5666 __func__);
5667 return rc;
5668 }
5669 }
5670#endif
5671
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005672#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5673 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305674 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005675 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5676 if (rc < 0) {
5677 pr_err("%s pmic gpio config failed\n", __func__);
5678 return rc;
5679 }
5680 }
5681#endif
5682
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005683#if defined(CONFIG_QS_S5K4E1)
5684 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5685 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305686 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005687 &qs_hc37_cam_pd_gpio_cfg.cfg);
5688 if (rc < 0) {
5689 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5690 __func__);
5691 return rc;
5692 }
5693 }
5694 }
5695#endif
5696
5697 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305698 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005699 &gpio_cfgs[i].cfg);
5700 if (rc < 0) {
5701 pr_err("%s pmic gpio config failed\n",
5702 __func__);
5703 return rc;
5704 }
5705 }
5706
5707 return 0;
5708}
5709
5710static const unsigned int ffa_keymap[] = {
5711 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5712 KEY(0, 1, KEY_UP), /* NAV - UP */
5713 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5714 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5715
5716 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5717 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5718 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5719 KEY(1, 3, KEY_VOLUMEDOWN),
5720
5721 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5722
5723 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5724 KEY(4, 1, KEY_UP), /* USER_UP */
5725 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5726 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5727 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5728
5729 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5730 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5731 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5732 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5733 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5734};
5735
Zhang Chang Ken683be172011-08-10 17:45:34 -04005736static const unsigned int dragon_keymap[] = {
5737 KEY(0, 0, KEY_MENU),
5738 KEY(0, 2, KEY_1),
5739 KEY(0, 3, KEY_4),
5740 KEY(0, 4, KEY_7),
5741
5742 KEY(1, 0, KEY_UP),
5743 KEY(1, 1, KEY_LEFT),
5744 KEY(1, 2, KEY_DOWN),
5745 KEY(1, 3, KEY_5),
5746 KEY(1, 4, KEY_8),
5747
5748 KEY(2, 0, KEY_HOME),
5749 KEY(2, 1, KEY_REPLY),
5750 KEY(2, 2, KEY_2),
5751 KEY(2, 3, KEY_6),
5752 KEY(2, 4, KEY_0),
5753
5754 KEY(3, 0, KEY_VOLUMEUP),
5755 KEY(3, 1, KEY_RIGHT),
5756 KEY(3, 2, KEY_3),
5757 KEY(3, 3, KEY_9),
5758 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5759
5760 KEY(4, 0, KEY_VOLUMEDOWN),
5761 KEY(4, 1, KEY_BACK),
5762 KEY(4, 2, KEY_CAMERA),
5763 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5764};
5765
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005766static struct matrix_keymap_data ffa_keymap_data = {
5767 .keymap_size = ARRAY_SIZE(ffa_keymap),
5768 .keymap = ffa_keymap,
5769};
5770
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305771static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005772 .input_name = "ffa-keypad",
5773 .input_phys_device = "ffa-keypad/input0",
5774 .num_rows = 6,
5775 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305776 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5777 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5778 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005779 .scan_delay_ms = 32,
5780 .row_hold_ns = 91500,
5781 .wakeup = 1,
5782 .keymap_data = &ffa_keymap_data,
5783};
5784
Zhang Chang Ken683be172011-08-10 17:45:34 -04005785static struct matrix_keymap_data dragon_keymap_data = {
5786 .keymap_size = ARRAY_SIZE(dragon_keymap),
5787 .keymap = dragon_keymap,
5788};
5789
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305790static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005791 .input_name = "dragon-keypad",
5792 .input_phys_device = "dragon-keypad/input0",
5793 .num_rows = 6,
5794 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305795 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5796 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5797 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005798 .scan_delay_ms = 32,
5799 .row_hold_ns = 91500,
5800 .wakeup = 1,
5801 .keymap_data = &dragon_keymap_data,
5802};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305803
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005804static const unsigned int fluid_keymap[] = {
5805 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5806 KEY(0, 1, KEY_UP), /* NAV - UP */
5807 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5808 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5809
5810 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5811 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5812 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5813 KEY(1, 3, KEY_VOLUMEUP),
5814
5815 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5816
5817 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5818 KEY(4, 1, KEY_UP), /* USER_UP */
5819 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5820 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5821 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5822
Jilai Wang9a895102011-07-12 14:00:35 -04005823 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005824 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5825 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5826 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5827 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5828};
5829
5830static struct matrix_keymap_data fluid_keymap_data = {
5831 .keymap_size = ARRAY_SIZE(fluid_keymap),
5832 .keymap = fluid_keymap,
5833};
5834
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305835static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005836 .input_name = "fluid-keypad",
5837 .input_phys_device = "fluid-keypad/input0",
5838 .num_rows = 6,
5839 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305840 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5841 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5842 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005843 .scan_delay_ms = 32,
5844 .row_hold_ns = 91500,
5845 .wakeup = 1,
5846 .keymap_data = &fluid_keymap_data,
5847};
5848
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305849static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005850 .initial_vibrate_ms = 500,
5851 .level_mV = 3000,
5852 .max_timeout_ms = 15000,
5853};
5854
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305855static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5856 .rtc_write_enable = false,
5857 .rtc_alarm_powerup = false,
5858};
5859
5860static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5861 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005862 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305863 .wakeup = 1,
5864};
5865
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005866#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5867
5868static struct othc_accessory_info othc_accessories[] = {
5869 {
5870 .accessory = OTHC_SVIDEO_OUT,
5871 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5872 | OTHC_ADC_DETECT,
5873 .key_code = SW_VIDEOOUT_INSERT,
5874 .enabled = false,
5875 .adc_thres = {
5876 .min_threshold = 20,
5877 .max_threshold = 40,
5878 },
5879 },
5880 {
5881 .accessory = OTHC_ANC_HEADPHONE,
5882 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5883 OTHC_SWITCH_DETECT,
5884 .gpio = PM8058_LINE_IN_DET_GPIO,
5885 .active_low = 1,
5886 .key_code = SW_HEADPHONE_INSERT,
5887 .enabled = true,
5888 },
5889 {
5890 .accessory = OTHC_ANC_HEADSET,
5891 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5892 .gpio = PM8058_LINE_IN_DET_GPIO,
5893 .active_low = 1,
5894 .key_code = SW_HEADPHONE_INSERT,
5895 .enabled = true,
5896 },
5897 {
5898 .accessory = OTHC_HEADPHONE,
5899 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5900 .key_code = SW_HEADPHONE_INSERT,
5901 .enabled = true,
5902 },
5903 {
5904 .accessory = OTHC_MICROPHONE,
5905 .detect_flags = OTHC_GPIO_DETECT,
5906 .gpio = PM8058_LINE_IN_DET_GPIO,
5907 .active_low = 1,
5908 .key_code = SW_MICROPHONE_INSERT,
5909 .enabled = true,
5910 },
5911 {
5912 .accessory = OTHC_HEADSET,
5913 .detect_flags = OTHC_MICBIAS_DETECT,
5914 .key_code = SW_HEADPHONE_INSERT,
5915 .enabled = true,
5916 },
5917};
5918
5919static struct othc_switch_info switch_info[] = {
5920 {
5921 .min_adc_threshold = 0,
5922 .max_adc_threshold = 100,
5923 .key_code = KEY_PLAYPAUSE,
5924 },
5925 {
5926 .min_adc_threshold = 100,
5927 .max_adc_threshold = 200,
5928 .key_code = KEY_REWIND,
5929 },
5930 {
5931 .min_adc_threshold = 200,
5932 .max_adc_threshold = 500,
5933 .key_code = KEY_FASTFORWARD,
5934 },
5935};
5936
5937static struct othc_n_switch_config switch_config = {
5938 .voltage_settling_time_ms = 0,
5939 .num_adc_samples = 3,
5940 .adc_channel = CHANNEL_ADC_HDSET,
5941 .switch_info = switch_info,
5942 .num_keys = ARRAY_SIZE(switch_info),
5943 .default_sw_en = true,
5944 .default_sw_idx = 0,
5945};
5946
5947static struct hsed_bias_config hsed_bias_config = {
5948 /* HSED mic bias config info */
5949 .othc_headset = OTHC_HEADSET_NO,
5950 .othc_lowcurr_thresh_uA = 100,
5951 .othc_highcurr_thresh_uA = 600,
5952 .othc_hyst_prediv_us = 7800,
5953 .othc_period_clkdiv_us = 62500,
5954 .othc_hyst_clk_us = 121000,
5955 .othc_period_clk_us = 312500,
5956 .othc_wakeup = 1,
5957};
5958
5959static struct othc_hsed_config hsed_config_1 = {
5960 .hsed_bias_config = &hsed_bias_config,
5961 /*
5962 * The detection delay and switch reporting delay are
5963 * required to encounter a hardware bug (spurious switch
5964 * interrupts on slow insertion/removal of the headset).
5965 * This will introduce a delay in reporting the accessory
5966 * insertion and removal to the userspace.
5967 */
5968 .detection_delay_ms = 1500,
5969 /* Switch info */
5970 .switch_debounce_ms = 1500,
5971 .othc_support_n_switch = false,
5972 .switch_config = &switch_config,
5973 .ir_gpio = -1,
5974 /* Accessory info */
5975 .accessories_support = true,
5976 .accessories = othc_accessories,
5977 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5978};
5979
5980static struct othc_regulator_config othc_reg = {
5981 .regulator = "8058_l5",
5982 .max_uV = 2850000,
5983 .min_uV = 2850000,
5984};
5985
5986/* MIC_BIAS0 is configured as normal MIC BIAS */
5987static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5988 .micbias_select = OTHC_MICBIAS_0,
5989 .micbias_capability = OTHC_MICBIAS,
5990 .micbias_enable = OTHC_SIGNAL_OFF,
5991 .micbias_regulator = &othc_reg,
5992};
5993
5994/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5995static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5996 .micbias_select = OTHC_MICBIAS_1,
5997 .micbias_capability = OTHC_MICBIAS_HSED,
5998 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
5999 .micbias_regulator = &othc_reg,
6000 .hsed_config = &hsed_config_1,
6001 .hsed_name = "8660_handset",
6002};
6003
6004/* MIC_BIAS2 is configured as normal MIC BIAS */
6005static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6006 .micbias_select = OTHC_MICBIAS_2,
6007 .micbias_capability = OTHC_MICBIAS,
6008 .micbias_enable = OTHC_SIGNAL_OFF,
6009 .micbias_regulator = &othc_reg,
6010};
6011
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006012
6013static void __init msm8x60_init_pm8058_othc(void)
6014{
6015 int i;
6016
6017 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6018 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6019 machine_is_msm8x60_fusn_ffa()) {
6020 /* 3-switch headset supported only by V2 FFA and FLUID */
6021 hsed_config_1.accessories_adc_support = true,
6022 /* ADC based accessory detection works only on V2 and FLUID */
6023 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6024 hsed_config_1.othc_support_n_switch = true;
6025 }
6026
6027 /* IR GPIO is absent on FLUID */
6028 if (machine_is_msm8x60_fluid())
6029 hsed_config_1.ir_gpio = -1;
6030
6031 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6032 if (machine_is_msm8x60_fluid()) {
6033 switch (othc_accessories[i].accessory) {
6034 case OTHC_ANC_HEADPHONE:
6035 case OTHC_ANC_HEADSET:
6036 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6037 break;
6038 case OTHC_MICROPHONE:
6039 othc_accessories[i].enabled = false;
6040 break;
6041 case OTHC_SVIDEO_OUT:
6042 othc_accessories[i].enabled = true;
6043 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6044 break;
6045 }
6046 }
6047 }
6048}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006049
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006050
6051static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6052{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306053 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006054 .direction = PM_GPIO_DIR_OUT,
6055 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6056 .output_value = 0,
6057 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306058 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006059 .out_strength = PM_GPIO_STRENGTH_HIGH,
6060 .function = PM_GPIO_FUNC_2,
6061 };
6062
6063 int rc = -EINVAL;
6064 int id, mode, max_mA;
6065
6066 id = mode = max_mA = 0;
6067 switch (ch) {
6068 case 0:
6069 case 1:
6070 case 2:
6071 if (on) {
6072 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306073 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6074 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006075 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306076 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006077 __func__, id, rc);
6078 }
6079 break;
6080
6081 case 6:
6082 id = PM_PWM_LED_FLASH;
6083 mode = PM_PWM_CONF_PWM1;
6084 max_mA = 300;
6085 break;
6086
6087 case 7:
6088 id = PM_PWM_LED_FLASH1;
6089 mode = PM_PWM_CONF_PWM1;
6090 max_mA = 300;
6091 break;
6092
6093 default:
6094 break;
6095 }
6096
6097 if (ch >= 6 && ch <= 7) {
6098 if (!on) {
6099 mode = PM_PWM_CONF_NONE;
6100 max_mA = 0;
6101 }
6102 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6103 if (rc)
6104 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6105 __func__, ch, rc);
6106 }
6107 return rc;
6108
6109}
6110
6111static struct pm8058_pwm_pdata pm8058_pwm_data = {
6112 .config = pm8058_pwm_config,
6113};
6114
6115#define PM8058_GPIO_INT 88
6116
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006117static struct pmic8058_led pmic8058_flash_leds[] = {
6118 [0] = {
6119 .name = "camera:flash0",
6120 .max_brightness = 15,
6121 .id = PMIC8058_ID_FLASH_LED_0,
6122 },
6123 [1] = {
6124 .name = "camera:flash1",
6125 .max_brightness = 15,
6126 .id = PMIC8058_ID_FLASH_LED_1,
6127 },
6128};
6129
6130static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6131 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6132 .leds = pmic8058_flash_leds,
6133};
6134
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006135static struct pmic8058_led pmic8058_dragon_leds[] = {
6136 [0] = {
6137 /* RED */
6138 .name = "led_drv0",
6139 .max_brightness = 15,
6140 .id = PMIC8058_ID_LED_0,
6141 },/* 300 mA flash led0 drv sink */
6142 [1] = {
6143 /* Yellow */
6144 .name = "led_drv1",
6145 .max_brightness = 15,
6146 .id = PMIC8058_ID_LED_1,
6147 },/* 300 mA flash led0 drv sink */
6148 [2] = {
6149 /* Green */
6150 .name = "led_drv2",
6151 .max_brightness = 15,
6152 .id = PMIC8058_ID_LED_2,
6153 },/* 300 mA flash led0 drv sink */
6154 [3] = {
6155 .name = "led_psensor",
6156 .max_brightness = 15,
6157 .id = PMIC8058_ID_LED_KB_LIGHT,
6158 },/* 300 mA flash led0 drv sink */
6159};
6160
6161static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6162 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6163 .leds = pmic8058_dragon_leds,
6164};
6165
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006166static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6167 [0] = {
6168 .name = "led:drv0",
6169 .max_brightness = 15,
6170 .id = PMIC8058_ID_FLASH_LED_0,
6171 },/* 300 mA flash led0 drv sink */
6172 [1] = {
6173 .name = "led:drv1",
6174 .max_brightness = 15,
6175 .id = PMIC8058_ID_FLASH_LED_1,
6176 },/* 300 mA flash led1 sink */
6177 [2] = {
6178 .name = "led:drv2",
6179 .max_brightness = 20,
6180 .id = PMIC8058_ID_LED_0,
6181 },/* 40 mA led0 sink */
6182 [3] = {
6183 .name = "keypad:drv",
6184 .max_brightness = 15,
6185 .id = PMIC8058_ID_LED_KB_LIGHT,
6186 },/* 300 mA keypad drv sink */
6187};
6188
6189static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6190 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6191 .leds = pmic8058_fluid_flash_leds,
6192};
6193
Terence Hampson90508a92011-08-09 10:40:08 -04006194static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306195 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006196 .max_source_current = 1800,
6197 .charger_type = CHG_TYPE_AC,
6198};
6199
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306200static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6201 .charger_data_valid = false,
6202};
6203
6204static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6205 .priority = 0,
6206};
6207
6208static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6209 .irq_base = PM8058_IRQ_BASE,
6210 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6211 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6212};
6213
6214static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6215 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6216};
6217
6218static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6219 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006220};
6221
6222static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306223 .irq_pdata = &pm8058_irq_pdata,
6224 .gpio_pdata = &pm8058_gpio_pdata,
6225 .mpp_pdata = &pm8058_mpp_pdata,
6226 .rtc_pdata = &pm8058_rtc_pdata,
6227 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6228 .othc0_pdata = &othc_config_pdata_0,
6229 .othc1_pdata = &othc_config_pdata_1,
6230 .othc2_pdata = &othc_config_pdata_2,
6231 .pwm_pdata = &pm8058_pwm_data,
6232 .misc_pdata = &pm8058_misc_pdata,
6233#ifdef CONFIG_SENSORS_MSM_ADC
6234 .xoadc_pdata = &pm8058_xoadc_pdata,
6235#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006236};
6237
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306238#ifdef CONFIG_MSM_SSBI
6239static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6240 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6241 .slave = {
6242 .name = "pm8058-core",
6243 .platform_data = &pm8058_platform_data,
6244 },
6245};
6246#endif
6247#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006248
6249#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6250 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6251#define TDISC_I2C_SLAVE_ADDR 0x67
6252#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6253#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6254
6255static const char *vregs_tdisc_name[] = {
6256 "8058_l5",
6257 "8058_s3",
6258};
6259
6260static const int vregs_tdisc_val[] = {
6261 2850000,/* uV */
6262 1800000,
6263};
6264static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6265
6266static int tdisc_shinetsu_setup(void)
6267{
6268 int rc, i;
6269
6270 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6271 if (rc) {
6272 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6273 __func__);
6274 return rc;
6275 }
6276
6277 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6278 if (rc) {
6279 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6280 __func__);
6281 goto fail_gpio_oe;
6282 }
6283
6284 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6285 if (rc) {
6286 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6287 __func__);
6288 gpio_free(GPIO_JOYSTICK_EN);
6289 goto fail_gpio_oe;
6290 }
6291
6292 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6293 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6294 if (IS_ERR(vregs_tdisc[i])) {
6295 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6296 __func__, vregs_tdisc_name[i],
6297 PTR_ERR(vregs_tdisc[i]));
6298 rc = PTR_ERR(vregs_tdisc[i]);
6299 goto vreg_get_fail;
6300 }
6301
6302 rc = regulator_set_voltage(vregs_tdisc[i],
6303 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6304 if (rc) {
6305 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6306 __func__, rc);
6307 goto vreg_set_voltage_fail;
6308 }
6309 }
6310
6311 return rc;
6312vreg_set_voltage_fail:
6313 i++;
6314vreg_get_fail:
6315 while (i)
6316 regulator_put(vregs_tdisc[--i]);
6317fail_gpio_oe:
6318 gpio_free(PMIC_GPIO_TDISC);
6319 return rc;
6320}
6321
6322static void tdisc_shinetsu_release(void)
6323{
6324 int i;
6325
6326 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6327 regulator_put(vregs_tdisc[i]);
6328
6329 gpio_free(PMIC_GPIO_TDISC);
6330 gpio_free(GPIO_JOYSTICK_EN);
6331}
6332
6333static int tdisc_shinetsu_enable(void)
6334{
6335 int i, rc = -EINVAL;
6336
6337 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6338 rc = regulator_enable(vregs_tdisc[i]);
6339 if (rc < 0) {
6340 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6341 __func__, vregs_tdisc_name[i], rc);
6342 goto vreg_fail;
6343 }
6344 }
6345
6346 /* Enable the OE (output enable) gpio */
6347 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6348 /* voltage and gpio stabilization delay */
6349 msleep(50);
6350
6351 return 0;
6352vreg_fail:
6353 while (i)
6354 regulator_disable(vregs_tdisc[--i]);
6355 return rc;
6356}
6357
6358static int tdisc_shinetsu_disable(void)
6359{
6360 int i, rc;
6361
6362 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6363 rc = regulator_disable(vregs_tdisc[i]);
6364 if (rc < 0) {
6365 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6366 __func__, vregs_tdisc_name[i], rc);
6367 goto tdisc_reg_fail;
6368 }
6369 }
6370
6371 /* Disable the OE (output enable) gpio */
6372 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6373
6374 return 0;
6375
6376tdisc_reg_fail:
6377 while (i)
6378 regulator_enable(vregs_tdisc[--i]);
6379 return rc;
6380}
6381
6382static struct tdisc_abs_values tdisc_abs = {
6383 .x_max = 32,
6384 .y_max = 32,
6385 .x_min = -32,
6386 .y_min = -32,
6387 .pressure_max = 32,
6388 .pressure_min = 0,
6389};
6390
6391static struct tdisc_platform_data tdisc_data = {
6392 .tdisc_setup = tdisc_shinetsu_setup,
6393 .tdisc_release = tdisc_shinetsu_release,
6394 .tdisc_enable = tdisc_shinetsu_enable,
6395 .tdisc_disable = tdisc_shinetsu_disable,
6396 .tdisc_wakeup = 0,
6397 .tdisc_gpio = PMIC_GPIO_TDISC,
6398 .tdisc_report_keys = true,
6399 .tdisc_report_relative = true,
6400 .tdisc_report_absolute = false,
6401 .tdisc_report_wheel = false,
6402 .tdisc_reverse_x = false,
6403 .tdisc_reverse_y = true,
6404 .tdisc_abs = &tdisc_abs,
6405};
6406
6407static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6408 {
6409 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6410 .irq = TDISC_INT,
6411 .platform_data = &tdisc_data,
6412 },
6413};
6414#endif
6415
6416#define PM_GPIO_CDC_RST_N 20
6417#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6418
6419static struct regulator *vreg_timpani_1;
6420static struct regulator *vreg_timpani_2;
6421
6422static unsigned int msm_timpani_setup_power(void)
6423{
6424 int rc;
6425
6426 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6427 if (IS_ERR(vreg_timpani_1)) {
6428 pr_err("%s: Unable to get 8058_l0\n", __func__);
6429 return -ENODEV;
6430 }
6431
6432 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6433 if (IS_ERR(vreg_timpani_2)) {
6434 pr_err("%s: Unable to get 8058_s3\n", __func__);
6435 regulator_put(vreg_timpani_1);
6436 return -ENODEV;
6437 }
6438
6439 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6440 if (rc) {
6441 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6442 goto fail;
6443 }
6444
6445 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6446 if (rc) {
6447 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6448 goto fail;
6449 }
6450
6451 rc = regulator_enable(vreg_timpani_1);
6452 if (rc) {
6453 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6454 goto fail;
6455 }
6456
6457 /* The settings for LDO0 should be set such that
6458 * it doesn't require to reset the timpani. */
6459 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6460 if (rc < 0) {
6461 pr_err("Timpani regulator optimum mode setting failed\n");
6462 goto fail;
6463 }
6464
6465 rc = regulator_enable(vreg_timpani_2);
6466 if (rc) {
6467 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6468 regulator_disable(vreg_timpani_1);
6469 goto fail;
6470 }
6471
6472 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6473 if (rc) {
6474 pr_err("%s: GPIO Request %d failed\n", __func__,
6475 GPIO_CDC_RST_N);
6476 regulator_disable(vreg_timpani_1);
6477 regulator_disable(vreg_timpani_2);
6478 goto fail;
6479 } else {
6480 gpio_direction_output(GPIO_CDC_RST_N, 1);
6481 usleep_range(1000, 1050);
6482 gpio_direction_output(GPIO_CDC_RST_N, 0);
6483 usleep_range(1000, 1050);
6484 gpio_direction_output(GPIO_CDC_RST_N, 1);
6485 gpio_free(GPIO_CDC_RST_N);
6486 }
6487 return rc;
6488
6489fail:
6490 regulator_put(vreg_timpani_1);
6491 regulator_put(vreg_timpani_2);
6492 return rc;
6493}
6494
6495static void msm_timpani_shutdown_power(void)
6496{
6497 int rc;
6498
6499 rc = regulator_disable(vreg_timpani_1);
6500 if (rc)
6501 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6502
6503 regulator_put(vreg_timpani_1);
6504
6505 rc = regulator_disable(vreg_timpani_2);
6506 if (rc)
6507 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6508
6509 regulator_put(vreg_timpani_2);
6510}
6511
6512/* Power analog function of codec */
6513static struct regulator *vreg_timpani_cdc_apwr;
6514static int msm_timpani_codec_power(int vreg_on)
6515{
6516 int rc = 0;
6517
6518 if (!vreg_timpani_cdc_apwr) {
6519
6520 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6521
6522 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6523 pr_err("%s: vreg_get failed (%ld)\n",
6524 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6525 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6526 return rc;
6527 }
6528 }
6529
6530 if (vreg_on) {
6531
6532 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6533 2200000, 2200000);
6534 if (rc) {
6535 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6536 __func__);
6537 goto vreg_fail;
6538 }
6539
6540 rc = regulator_enable(vreg_timpani_cdc_apwr);
6541 if (rc) {
6542 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6543 goto vreg_fail;
6544 }
6545 } else {
6546 rc = regulator_disable(vreg_timpani_cdc_apwr);
6547 if (rc) {
6548 pr_err("%s: vreg_disable failed %d\n",
6549 __func__, rc);
6550 goto vreg_fail;
6551 }
6552 }
6553
6554 return 0;
6555
6556vreg_fail:
6557 regulator_put(vreg_timpani_cdc_apwr);
6558 vreg_timpani_cdc_apwr = NULL;
6559 return rc;
6560}
6561
6562static struct marimba_codec_platform_data timpani_codec_pdata = {
6563 .marimba_codec_power = msm_timpani_codec_power,
6564};
6565
6566#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6567#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6568
6569static struct marimba_platform_data timpani_pdata = {
6570 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6571 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6572 .marimba_setup = msm_timpani_setup_power,
6573 .marimba_shutdown = msm_timpani_shutdown_power,
6574 .codec = &timpani_codec_pdata,
6575 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6576};
6577
6578#define TIMPANI_I2C_SLAVE_ADDR 0xD
6579
6580static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6581 {
6582 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6583 .platform_data = &timpani_pdata,
6584 },
6585};
6586
Lei Zhou338cab82011-08-19 13:38:17 -04006587#ifdef CONFIG_SND_SOC_WM8903
6588static struct wm8903_platform_data wm8903_pdata = {
6589 .gpio_cfg[2] = 0x3A8,
6590};
6591
6592#define WM8903_I2C_SLAVE_ADDR 0x34
6593static struct i2c_board_info wm8903_codec_i2c_info[] = {
6594 {
6595 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6596 .platform_data = &wm8903_pdata,
6597 },
6598};
6599#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006600#ifdef CONFIG_PMIC8901
6601
6602#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006603/*
6604 * Consumer specific regulator names:
6605 * regulator name consumer dev_name
6606 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006607static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6608 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6609};
6610static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6611 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6612};
6613
6614#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306615 _always_on) \
6616 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006617 .init_data = { \
6618 .constraints = { \
6619 .valid_modes_mask = _modes, \
6620 .valid_ops_mask = _ops, \
6621 .min_uV = _min_uV, \
6622 .max_uV = _max_uV, \
6623 .input_uV = _min_uV, \
6624 .apply_uV = _apply_uV, \
6625 .always_on = _always_on, \
6626 }, \
6627 .consumer_supplies = vreg_consumers_8901_##_id, \
6628 .num_consumer_supplies = \
6629 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6630 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306631 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006632 }
6633
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006634#define PM8901_VREG_INIT_VS(_id) \
6635 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306636 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006637
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306638static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006639 PM8901_VREG_INIT_VS(USB_OTG),
6640 PM8901_VREG_INIT_VS(HDMI_MVS),
6641};
6642
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306643static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6644 .priority = 1,
6645};
6646
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306647static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6648 .irq_base = PM8901_IRQ_BASE,
6649 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6650 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6651};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006652
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306653static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6654 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006655};
6656
6657static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306658 .irq_pdata = &pm8901_irq_pdata,
6659 .mpp_pdata = &pm8901_mpp_pdata,
6660 .regulator_pdatas = pm8901_vreg_init,
6661 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306662 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006663};
6664
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306665static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6666 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6667 .slave = {
6668 .name = "pm8901-core",
6669 .platform_data = &pm8901_platform_data,
6670 },
6671};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006672#endif /* CONFIG_PMIC8901 */
6673
6674#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6675 || defined(CONFIG_GPIO_SX150X_MODULE))
6676
6677static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006678static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006679
6680struct bahama_config_register{
6681 u8 reg;
6682 u8 value;
6683 u8 mask;
6684};
6685
6686enum version{
6687 VER_1_0,
6688 VER_2_0,
6689 VER_UNSUPPORTED = 0xFF
6690};
6691
6692static u8 read_bahama_ver(void)
6693{
6694 int rc;
6695 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6696 u8 bahama_version;
6697
6698 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6699 if (rc < 0) {
6700 printk(KERN_ERR
6701 "%s: version read failed: %d\n",
6702 __func__, rc);
6703 return VER_UNSUPPORTED;
6704 } else {
6705 printk(KERN_INFO
6706 "%s: version read got: 0x%x\n",
6707 __func__, bahama_version);
6708 }
6709
6710 switch (bahama_version) {
6711 case 0x08: /* varient of bahama v1 */
6712 case 0x10:
6713 case 0x00:
6714 return VER_1_0;
6715 case 0x09: /* variant of bahama v2 */
6716 return VER_2_0;
6717 default:
6718 return VER_UNSUPPORTED;
6719 }
6720}
6721
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006722static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006723static unsigned int msm_bahama_setup_power(void)
6724{
6725 int rc = 0;
6726 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006727
6728 if (machine_is_msm8x60_dragon())
6729 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6730
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006731 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6732
6733 if (IS_ERR(vreg_bahama)) {
6734 rc = PTR_ERR(vreg_bahama);
6735 pr_err("%s: regulator_get %s = %d\n", __func__,
6736 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006737 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006738 }
6739
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006740 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6741 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006742 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6743 msm_bahama_regulator, rc);
6744 goto unget;
6745 }
6746
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006747 rc = regulator_enable(vreg_bahama);
6748 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006749 pr_err("%s: regulator_enable %s = %d\n", __func__,
6750 msm_bahama_regulator, rc);
6751 goto unget;
6752 }
6753
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006754 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6755 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006756 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006757 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006758 goto unenable;
6759 }
6760
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006761 gpio_direction_output(msm_bahama_sys_rst, 0);
6762 usleep_range(1000, 1050);
6763 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6764 usleep_range(1000, 1050);
6765 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006766 return rc;
6767
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006768unenable:
6769 regulator_disable(vreg_bahama);
6770unget:
6771 regulator_put(vreg_bahama);
6772 return rc;
6773};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006774
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006775static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006776{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006777 if (msm_bahama_setup_power_enable) {
6778 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6779 gpio_free(msm_bahama_sys_rst);
6780 regulator_disable(vreg_bahama);
6781 regulator_put(vreg_bahama);
6782 msm_bahama_setup_power_enable = 0;
6783 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006784
6785 return 0;
6786};
6787
6788static unsigned int msm_bahama_core_config(int type)
6789{
6790 int rc = 0;
6791
6792 if (type == BAHAMA_ID) {
6793
6794 int i;
6795 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6796
6797 const struct bahama_config_register v20_init[] = {
6798 /* reg, value, mask */
6799 { 0xF4, 0x84, 0xFF }, /* AREG */
6800 { 0xF0, 0x04, 0xFF } /* DREG */
6801 };
6802
6803 if (read_bahama_ver() == VER_2_0) {
6804 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6805 u8 value = v20_init[i].value;
6806 rc = marimba_write_bit_mask(&config,
6807 v20_init[i].reg,
6808 &value,
6809 sizeof(v20_init[i].value),
6810 v20_init[i].mask);
6811 if (rc < 0) {
6812 printk(KERN_ERR
6813 "%s: reg %d write failed: %d\n",
6814 __func__, v20_init[i].reg, rc);
6815 return rc;
6816 }
6817 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6818 " mask 0x%02x\n",
6819 __func__, v20_init[i].reg,
6820 v20_init[i].value, v20_init[i].mask);
6821 }
6822 }
6823 }
6824 printk(KERN_INFO "core type: %d\n", type);
6825
6826 return rc;
6827}
6828
6829static struct regulator *fm_regulator_s3;
6830static struct msm_xo_voter *fm_clock;
6831
6832static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6833{
6834 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306835 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006836 .direction = PM_GPIO_DIR_IN,
6837 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306838 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006839 .function = PM_GPIO_FUNC_NORMAL,
6840 .inv_int_pol = 0,
6841 };
6842
6843 if (!fm_regulator_s3) {
6844 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6845 if (IS_ERR(fm_regulator_s3)) {
6846 rc = PTR_ERR(fm_regulator_s3);
6847 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6848 __func__, rc);
6849 goto out;
6850 }
6851 }
6852
6853
6854 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6855 if (rc < 0) {
6856 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6857 __func__, rc);
6858 goto fm_fail_put;
6859 }
6860
6861 rc = regulator_enable(fm_regulator_s3);
6862 if (rc < 0) {
6863 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6864 __func__, rc);
6865 goto fm_fail_put;
6866 }
6867
6868 /*Vote for XO clock*/
6869 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6870
6871 if (IS_ERR(fm_clock)) {
6872 rc = PTR_ERR(fm_clock);
6873 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6874 __func__, rc);
6875 goto fm_fail_switch;
6876 }
6877
6878 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6879 if (rc < 0) {
6880 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6881 __func__, rc);
6882 goto fm_fail_vote;
6883 }
6884
6885 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306886 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006887 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306888 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006889 __func__, rc);
6890 goto fm_fail_clock;
6891 }
6892 goto out;
6893
6894fm_fail_clock:
6895 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6896fm_fail_vote:
6897 msm_xo_put(fm_clock);
6898fm_fail_switch:
6899 regulator_disable(fm_regulator_s3);
6900fm_fail_put:
6901 regulator_put(fm_regulator_s3);
6902out:
6903 return rc;
6904};
6905
6906static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6907{
6908 int rc = 0;
6909 if (fm_regulator_s3 != NULL) {
6910 rc = regulator_disable(fm_regulator_s3);
6911 if (rc < 0) {
6912 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6913 __func__, rc);
6914 }
6915 regulator_put(fm_regulator_s3);
6916 fm_regulator_s3 = NULL;
6917 }
6918 printk(KERN_ERR "%s: Voting off for XO", __func__);
6919
6920 if (fm_clock != NULL) {
6921 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6922 if (rc < 0) {
6923 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6924 __func__, rc);
6925 }
6926 msm_xo_put(fm_clock);
6927 }
6928 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6929}
6930
6931/* Slave id address for FM/CDC/QMEMBIST
6932 * Values can be programmed using Marimba slave id 0
6933 * should there be a conflict with other I2C devices
6934 * */
6935#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6936#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6937
6938static struct marimba_fm_platform_data marimba_fm_pdata = {
6939 .fm_setup = fm_radio_setup,
6940 .fm_shutdown = fm_radio_shutdown,
6941 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6942 .is_fm_soc_i2s_master = false,
6943 .config_i2s_gpio = NULL,
6944};
6945
6946/*
6947Just initializing the BAHAMA related slave
6948*/
6949static struct marimba_platform_data marimba_pdata = {
6950 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6951 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6952 .bahama_setup = msm_bahama_setup_power,
6953 .bahama_shutdown = msm_bahama_shutdown_power,
6954 .bahama_core_config = msm_bahama_core_config,
6955 .fm = &marimba_fm_pdata,
6956 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6957};
6958
6959
6960static struct i2c_board_info msm_marimba_board_info[] = {
6961 {
6962 I2C_BOARD_INFO("marimba", 0xc),
6963 .platform_data = &marimba_pdata,
6964 }
6965};
6966#endif /* CONFIG_MAIMBA_CORE */
6967
6968#ifdef CONFIG_I2C
6969#define I2C_SURF 1
6970#define I2C_FFA (1 << 1)
6971#define I2C_RUMI (1 << 2)
6972#define I2C_SIM (1 << 3)
6973#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006974#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006975
6976struct i2c_registry {
6977 u8 machs;
6978 int bus;
6979 struct i2c_board_info *info;
6980 int len;
6981};
6982
6983static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006984#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6985 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006986 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006987 MSM_GSBI8_QUP_I2C_BUS_ID,
6988 core_expander_i2c_info,
6989 ARRAY_SIZE(core_expander_i2c_info),
6990 },
6991 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006992 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006993 MSM_GSBI8_QUP_I2C_BUS_ID,
6994 docking_expander_i2c_info,
6995 ARRAY_SIZE(docking_expander_i2c_info),
6996 },
6997 {
6998 I2C_SURF,
6999 MSM_GSBI8_QUP_I2C_BUS_ID,
7000 surf_expanders_i2c_info,
7001 ARRAY_SIZE(surf_expanders_i2c_info),
7002 },
7003 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007004 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007005 MSM_GSBI3_QUP_I2C_BUS_ID,
7006 fha_expanders_i2c_info,
7007 ARRAY_SIZE(fha_expanders_i2c_info),
7008 },
7009 {
7010 I2C_FLUID,
7011 MSM_GSBI3_QUP_I2C_BUS_ID,
7012 fluid_expanders_i2c_info,
7013 ARRAY_SIZE(fluid_expanders_i2c_info),
7014 },
7015 {
7016 I2C_FLUID,
7017 MSM_GSBI8_QUP_I2C_BUS_ID,
7018 fluid_core_expander_i2c_info,
7019 ARRAY_SIZE(fluid_core_expander_i2c_info),
7020 },
7021#endif
7022#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7023 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7024 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007025 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007026 MSM_GSBI3_QUP_I2C_BUS_ID,
7027 msm_i2c_gsbi3_tdisc_info,
7028 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7029 },
7030#endif
7031 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007032 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007033 MSM_GSBI3_QUP_I2C_BUS_ID,
7034 cy8ctmg200_board_info,
7035 ARRAY_SIZE(cy8ctmg200_board_info),
7036 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007037 {
7038 I2C_DRAGON,
7039 MSM_GSBI3_QUP_I2C_BUS_ID,
7040 cy8ctma340_dragon_board_info,
7041 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7042 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007043#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7044 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7045 {
7046 I2C_FLUID,
7047 MSM_GSBI3_QUP_I2C_BUS_ID,
7048 cyttsp_fluid_info,
7049 ARRAY_SIZE(cyttsp_fluid_info),
7050 },
7051 {
7052 I2C_FFA | I2C_SURF,
7053 MSM_GSBI3_QUP_I2C_BUS_ID,
7054 cyttsp_ffa_info,
7055 ARRAY_SIZE(cyttsp_ffa_info),
7056 },
7057#endif
7058#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007059 {
7060 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007061 MSM_GSBI4_QUP_I2C_BUS_ID,
7062 msm_camera_boardinfo,
7063 ARRAY_SIZE(msm_camera_boardinfo),
7064 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007065 {
7066 I2C_DRAGON,
7067 MSM_GSBI4_QUP_I2C_BUS_ID,
7068 msm_camera_dragon_boardinfo,
7069 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7070 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007071#endif
7072 {
7073 I2C_SURF | I2C_FFA | I2C_FLUID,
7074 MSM_GSBI7_QUP_I2C_BUS_ID,
7075 msm_i2c_gsbi7_timpani_info,
7076 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7077 },
7078#if defined(CONFIG_MARIMBA_CORE)
7079 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007080 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007081 MSM_GSBI7_QUP_I2C_BUS_ID,
7082 msm_marimba_board_info,
7083 ARRAY_SIZE(msm_marimba_board_info),
7084 },
7085#endif /* CONFIG_MARIMBA_CORE */
7086#ifdef CONFIG_ISL9519_CHARGER
7087 {
7088 I2C_SURF | I2C_FFA,
7089 MSM_GSBI8_QUP_I2C_BUS_ID,
7090 isl_charger_i2c_info,
7091 ARRAY_SIZE(isl_charger_i2c_info),
7092 },
7093#endif
7094#if defined(CONFIG_HAPTIC_ISA1200) || \
7095 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7096 {
7097 I2C_FLUID,
7098 MSM_GSBI8_QUP_I2C_BUS_ID,
7099 msm_isa1200_board_info,
7100 ARRAY_SIZE(msm_isa1200_board_info),
7101 },
7102#endif
7103#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7104 {
7105 I2C_FLUID,
7106 MSM_GSBI8_QUP_I2C_BUS_ID,
7107 smb137b_charger_i2c_info,
7108 ARRAY_SIZE(smb137b_charger_i2c_info),
7109 },
7110#endif
7111#if defined(CONFIG_BATTERY_BQ27520) || \
7112 defined(CONFIG_BATTERY_BQ27520_MODULE)
7113 {
7114 I2C_FLUID,
7115 MSM_GSBI8_QUP_I2C_BUS_ID,
7116 msm_bq27520_board_info,
7117 ARRAY_SIZE(msm_bq27520_board_info),
7118 },
7119#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007120#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7121 {
7122 I2C_DRAGON,
7123 MSM_GSBI8_QUP_I2C_BUS_ID,
7124 wm8903_codec_i2c_info,
7125 ARRAY_SIZE(wm8903_codec_i2c_info),
7126 },
7127#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007128};
7129#endif /* CONFIG_I2C */
7130
7131static void fixup_i2c_configs(void)
7132{
7133#ifdef CONFIG_I2C
7134#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7135 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7136 sx150x_data[SX150X_CORE].irq_summary =
7137 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007138 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7139 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007140 sx150x_data[SX150X_CORE].irq_summary =
7141 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7142 else if (machine_is_msm8x60_fluid())
7143 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7144 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7145#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007146#endif
7147}
7148
7149static void register_i2c_devices(void)
7150{
7151#ifdef CONFIG_I2C
7152 u8 mach_mask = 0;
7153 int i;
7154
7155 /* Build the matching 'supported_machs' bitmask */
7156 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7157 mach_mask = I2C_SURF;
7158 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7159 mach_mask = I2C_FFA;
7160 else if (machine_is_msm8x60_rumi3())
7161 mach_mask = I2C_RUMI;
7162 else if (machine_is_msm8x60_sim())
7163 mach_mask = I2C_SIM;
7164 else if (machine_is_msm8x60_fluid())
7165 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007166 else if (machine_is_msm8x60_dragon())
7167 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007168 else
7169 pr_err("unmatched machine ID in register_i2c_devices\n");
7170
7171 /* Run the array and install devices as appropriate */
7172 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7173 if (msm8x60_i2c_devices[i].machs & mach_mask)
7174 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7175 msm8x60_i2c_devices[i].info,
7176 msm8x60_i2c_devices[i].len);
7177 }
7178#endif
7179}
7180
7181static void __init msm8x60_init_uart12dm(void)
7182{
7183#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7184 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7185 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7186
7187 if (!fpga_mem)
7188 pr_err("%s(): Error getting memory\n", __func__);
7189
7190 /* Advanced mode */
7191 writew(0xFFFF, fpga_mem + 0x15C);
7192 /* FPGA_UART_SEL */
7193 writew(0, fpga_mem + 0x172);
7194 /* FPGA_GPIO_CONFIG_117 */
7195 writew(1, fpga_mem + 0xEA);
7196 /* FPGA_GPIO_CONFIG_118 */
7197 writew(1, fpga_mem + 0xEC);
7198 mb();
7199 iounmap(fpga_mem);
7200#endif
7201}
7202
7203#define MSM_GSBI9_PHYS 0x19900000
7204#define GSBI_DUAL_MODE_CODE 0x60
7205
7206static void __init msm8x60_init_buses(void)
7207{
7208#ifdef CONFIG_I2C_QUP
7209 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7210 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7211 writel_relaxed(0x6 << 4, gsbi_mem);
7212 /* Ensure protocol code is written before proceeding further */
7213 mb();
7214 iounmap(gsbi_mem);
7215
7216 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7217 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7218 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7219 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7220
7221#ifdef CONFIG_MSM_GSBI9_UART
7222 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7223 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7224 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7225 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7226 iounmap(gsbi_mem);
7227 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7228 }
7229#endif
7230 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7231 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7232#endif
7233#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7234 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7235#endif
7236#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007237 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7238#endif
7239
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307240#ifdef CONFIG_MSM_SSBI
7241 msm_device_ssbi_pmic1.dev.platform_data =
7242 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307243 msm_device_ssbi_pmic2.dev.platform_data =
7244 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307245#endif
7246
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007247 if (machine_is_msm8x60_fluid()) {
7248#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7249 (defined(CONFIG_SMB137B_CHARGER) || \
7250 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7251 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7252#endif
7253#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7254 msm_gsbi10_qup_spi_device.dev.platform_data =
7255 &msm_gsbi10_qup_spi_pdata;
7256#endif
7257 }
7258
7259#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7260 /*
7261 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7262 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7263 * and ID notifications are available only on V2 surf and FFA
7264 * with a hardware workaround.
7265 */
7266 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7267 (machine_is_msm8x60_surf() ||
7268 (machine_is_msm8x60_ffa() &&
7269 pmic_id_notif_supported)))
7270 msm_otg_pdata.phy_can_powercollapse = 1;
7271 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7272#endif
7273
7274#ifdef CONFIG_USB_GADGET_MSM_72K
7275 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7276#endif
7277
7278#ifdef CONFIG_SERIAL_MSM_HS
7279 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7280 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7281#endif
7282#ifdef CONFIG_MSM_GSBI9_UART
7283 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7284 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7285 if (IS_ERR(msm_device_uart_gsbi9))
7286 pr_err("%s(): Failed to create uart gsbi9 device\n",
7287 __func__);
7288 }
7289#endif
7290
7291#ifdef CONFIG_MSM_BUS_SCALING
7292
7293 /* RPM calls are only enabled on V2 */
7294 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7295 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7296 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7297 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7298 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7299 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7300 }
7301
7302 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7303 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7304 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7305 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7306 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7307#endif
7308}
7309
7310static void __init msm8x60_map_io(void)
7311{
7312 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7313 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007314
7315 if (socinfo_init() < 0)
7316 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007317}
7318
7319/*
7320 * Most segments of the EBI2 bus are disabled by default.
7321 */
7322static void __init msm8x60_init_ebi2(void)
7323{
7324 uint32_t ebi2_cfg;
7325 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007326 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7327
7328 if (IS_ERR(mem_clk)) {
7329 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7330 "msm_ebi2", "mem_clk");
7331 return;
7332 }
7333 clk_enable(mem_clk);
7334 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007335
7336 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7337 if (ebi2_cfg_ptr != 0) {
7338 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7339
7340 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007341 machine_is_msm8x60_fluid() ||
7342 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007343 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7344 else if (machine_is_msm8x60_sim())
7345 ebi2_cfg |= (1 << 4); /* CS2 */
7346 else if (machine_is_msm8x60_rumi3())
7347 ebi2_cfg |= (1 << 5); /* CS3 */
7348
7349 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7350 iounmap(ebi2_cfg_ptr);
7351 }
7352
7353 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007354 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007355 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7356 if (ebi2_cfg_ptr != 0) {
7357 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7358 writel_relaxed(0UL, ebi2_cfg_ptr);
7359
7360 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7361 * LAN9221 Ethernet controller reads and writes.
7362 * The lowest 4 bits are the read delay, the next
7363 * 4 are the write delay. */
7364 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7365#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7366 /*
7367 * RECOVERY=5, HOLD_WR=1
7368 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7369 * WAIT_WR=1, WAIT_RD=2
7370 */
7371 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7372 /*
7373 * HOLD_RD=1
7374 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7375 */
7376 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7377#else
7378 /* EBI2 CS3 muxed address/data,
7379 * two cyc addr enable */
7380 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7381
7382#endif
7383 iounmap(ebi2_cfg_ptr);
7384 }
7385 }
7386}
7387
7388static void __init msm8x60_configure_smc91x(void)
7389{
7390 if (machine_is_msm8x60_sim()) {
7391
7392 smc91x_resources[0].start = 0x1b800300;
7393 smc91x_resources[0].end = 0x1b8003ff;
7394
7395 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7396 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7397
7398 } else if (machine_is_msm8x60_rumi3()) {
7399
7400 smc91x_resources[0].start = 0x1d000300;
7401 smc91x_resources[0].end = 0x1d0003ff;
7402
7403 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7404 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7405 }
7406}
7407
7408static void __init msm8x60_init_tlmm(void)
7409{
7410 if (machine_is_msm8x60_rumi3())
7411 msm_gpio_install_direct_irq(0, 0, 1);
7412}
7413
7414#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7415 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7416 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7417 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7418 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7419
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007420/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007421#define MAX_SDCC_CONTROLLER 5
7422
7423struct msm_sdcc_gpio {
7424 /* maximum 10 GPIOs per SDCC controller */
7425 s16 no;
7426 /* name of this GPIO */
7427 const char *name;
7428 bool always_on;
7429 bool is_enabled;
7430};
7431
7432#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7433static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7434 {159, "sdc1_dat_0"},
7435 {160, "sdc1_dat_1"},
7436 {161, "sdc1_dat_2"},
7437 {162, "sdc1_dat_3"},
7438#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7439 {163, "sdc1_dat_4"},
7440 {164, "sdc1_dat_5"},
7441 {165, "sdc1_dat_6"},
7442 {166, "sdc1_dat_7"},
7443#endif
7444 {167, "sdc1_clk"},
7445 {168, "sdc1_cmd"}
7446};
7447#endif
7448
7449#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7450static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7451 {143, "sdc2_dat_0"},
7452 {144, "sdc2_dat_1", 1},
7453 {145, "sdc2_dat_2"},
7454 {146, "sdc2_dat_3"},
7455#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7456 {147, "sdc2_dat_4"},
7457 {148, "sdc2_dat_5"},
7458 {149, "sdc2_dat_6"},
7459 {150, "sdc2_dat_7"},
7460#endif
7461 {151, "sdc2_cmd"},
7462 {152, "sdc2_clk", 1}
7463};
7464#endif
7465
7466#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7467static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7468 {95, "sdc5_cmd"},
7469 {96, "sdc5_dat_3"},
7470 {97, "sdc5_clk", 1},
7471 {98, "sdc5_dat_2"},
7472 {99, "sdc5_dat_1", 1},
7473 {100, "sdc5_dat_0"}
7474};
7475#endif
7476
7477struct msm_sdcc_pad_pull_cfg {
7478 enum msm_tlmm_pull_tgt pull;
7479 u32 pull_val;
7480};
7481
7482struct msm_sdcc_pad_drv_cfg {
7483 enum msm_tlmm_hdrive_tgt drv;
7484 u32 drv_val;
7485};
7486
7487#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7488static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7489 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7490 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7491 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7492};
7493
7494static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7495 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7496 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7497};
7498
7499static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7500 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7501 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7502 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7503};
7504
7505static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7506 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7507 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7508};
7509#endif
7510
7511#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7512static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7513 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7514 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7515 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7516};
7517
7518static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7519 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7520 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7521};
7522
7523static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7524 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7525 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7526 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7527};
7528
7529static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7530 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7531 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7532};
7533#endif
7534
7535struct msm_sdcc_pin_cfg {
7536 /*
7537 * = 1 if controller pins are using gpios
7538 * = 0 if controller has dedicated MSM pins
7539 */
7540 u8 is_gpio;
7541 u8 cfg_sts;
7542 u8 gpio_data_size;
7543 struct msm_sdcc_gpio *gpio_data;
7544 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7545 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7546 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7547 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7548 u8 pad_drv_data_size;
7549 u8 pad_pull_data_size;
7550 u8 sdio_lpm_gpio_cfg;
7551};
7552
7553
7554static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7555#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7556 [0] = {
7557 .is_gpio = 1,
7558 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7559 .gpio_data = sdc1_gpio_cfg
7560 },
7561#endif
7562#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7563 [1] = {
7564 .is_gpio = 1,
7565 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7566 .gpio_data = sdc2_gpio_cfg
7567 },
7568#endif
7569#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7570 [2] = {
7571 .is_gpio = 0,
7572 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7573 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7574 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7575 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7576 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7577 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7578 },
7579#endif
7580#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7581 [3] = {
7582 .is_gpio = 0,
7583 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7584 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7585 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7586 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7587 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7588 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7589 },
7590#endif
7591#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7592 [4] = {
7593 .is_gpio = 1,
7594 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7595 .gpio_data = sdc5_gpio_cfg
7596 }
7597#endif
7598};
7599
7600static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7601{
7602 int rc = 0;
7603 struct msm_sdcc_pin_cfg *curr;
7604 int n;
7605
7606 curr = &sdcc_pin_cfg_data[dev_id - 1];
7607 if (!curr->gpio_data)
7608 goto out;
7609
7610 for (n = 0; n < curr->gpio_data_size; n++) {
7611 if (enable) {
7612
7613 if (curr->gpio_data[n].always_on &&
7614 curr->gpio_data[n].is_enabled)
7615 continue;
7616 pr_debug("%s: enable: %s\n", __func__,
7617 curr->gpio_data[n].name);
7618 rc = gpio_request(curr->gpio_data[n].no,
7619 curr->gpio_data[n].name);
7620 if (rc) {
7621 pr_err("%s: gpio_request(%d, %s)"
7622 "failed", __func__,
7623 curr->gpio_data[n].no,
7624 curr->gpio_data[n].name);
7625 goto free_gpios;
7626 }
7627 /* set direction as output for all GPIOs */
7628 rc = gpio_direction_output(
7629 curr->gpio_data[n].no, 1);
7630 if (rc) {
7631 pr_err("%s: gpio_direction_output"
7632 "(%d, 1) failed\n", __func__,
7633 curr->gpio_data[n].no);
7634 goto free_gpios;
7635 }
7636 curr->gpio_data[n].is_enabled = 1;
7637 } else {
7638 /*
7639 * now free this GPIO which will put GPIO
7640 * in low power mode and will also put GPIO
7641 * in input mode
7642 */
7643 if (curr->gpio_data[n].always_on)
7644 continue;
7645 pr_debug("%s: disable: %s\n", __func__,
7646 curr->gpio_data[n].name);
7647 gpio_free(curr->gpio_data[n].no);
7648 curr->gpio_data[n].is_enabled = 0;
7649 }
7650 }
7651 curr->cfg_sts = enable;
7652 goto out;
7653
7654free_gpios:
7655 for (; n >= 0; n--)
7656 gpio_free(curr->gpio_data[n].no);
7657out:
7658 return rc;
7659}
7660
7661static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7662{
7663 int rc = 0;
7664 struct msm_sdcc_pin_cfg *curr;
7665 int n;
7666
7667 curr = &sdcc_pin_cfg_data[dev_id - 1];
7668 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7669 goto out;
7670
7671 if (enable) {
7672 /*
7673 * set up the normal driver strength and
7674 * pull config for pads
7675 */
7676 for (n = 0; n < curr->pad_drv_data_size; n++) {
7677 if (curr->sdio_lpm_gpio_cfg) {
7678 if (curr->pad_drv_on_data[n].drv ==
7679 TLMM_HDRV_SDC4_DATA)
7680 continue;
7681 }
7682 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7683 curr->pad_drv_on_data[n].drv_val);
7684 }
7685 for (n = 0; n < curr->pad_pull_data_size; n++) {
7686 if (curr->sdio_lpm_gpio_cfg) {
7687 if (curr->pad_pull_on_data[n].pull ==
7688 TLMM_PULL_SDC4_DATA)
7689 continue;
7690 }
7691 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7692 curr->pad_pull_on_data[n].pull_val);
7693 }
7694 } else {
7695 /* set the low power config for pads */
7696 for (n = 0; n < curr->pad_drv_data_size; n++) {
7697 if (curr->sdio_lpm_gpio_cfg) {
7698 if (curr->pad_drv_off_data[n].drv ==
7699 TLMM_HDRV_SDC4_DATA)
7700 continue;
7701 }
7702 msm_tlmm_set_hdrive(
7703 curr->pad_drv_off_data[n].drv,
7704 curr->pad_drv_off_data[n].drv_val);
7705 }
7706 for (n = 0; n < curr->pad_pull_data_size; n++) {
7707 if (curr->sdio_lpm_gpio_cfg) {
7708 if (curr->pad_pull_off_data[n].pull ==
7709 TLMM_PULL_SDC4_DATA)
7710 continue;
7711 }
7712 msm_tlmm_set_pull(
7713 curr->pad_pull_off_data[n].pull,
7714 curr->pad_pull_off_data[n].pull_val);
7715 }
7716 }
7717 curr->cfg_sts = enable;
7718out:
7719 return rc;
7720}
7721
7722struct sdcc_reg {
7723 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7724 const char *reg_name;
7725 /*
7726 * is set voltage supported for this regulator?
7727 * 0 = not supported, 1 = supported
7728 */
7729 unsigned char set_voltage_sup;
7730 /* voltage level to be set */
7731 unsigned int level;
7732 /* VDD/VCC/VCCQ voltage regulator handle */
7733 struct regulator *reg;
7734 /* is this regulator enabled? */
7735 bool enabled;
7736 /* is this regulator needs to be always on? */
7737 bool always_on;
7738 /* is operating power mode setting required for this regulator? */
7739 bool op_pwr_mode_sup;
7740 /* Load values for low power and high power mode */
7741 unsigned int lpm_uA;
7742 unsigned int hpm_uA;
7743};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007744/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007745static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7746/* only SDCC1 requires VCCQ voltage */
7747static struct sdcc_reg sdcc_vccq_reg_data[1];
7748/* all SDCC controllers may require voting for VDD PAD voltage */
7749static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7750
7751struct sdcc_reg_data {
7752 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7753 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7754 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7755 unsigned char sts; /* regulator enable/disable status */
7756};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007757/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007758static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7759
7760static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7761{
7762 int rc = 0;
7763
7764 /* Get the regulator handle */
7765 vreg->reg = regulator_get(NULL, vreg->reg_name);
7766 if (IS_ERR(vreg->reg)) {
7767 rc = PTR_ERR(vreg->reg);
7768 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7769 __func__, vreg->reg_name, rc);
7770 goto out;
7771 }
7772
7773 /* Set the voltage level if required */
7774 if (vreg->set_voltage_sup) {
7775 rc = regulator_set_voltage(vreg->reg, vreg->level,
7776 vreg->level);
7777 if (rc) {
7778 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7779 __func__, vreg->reg_name, rc);
7780 goto vreg_put;
7781 }
7782 }
7783 goto out;
7784
7785vreg_put:
7786 regulator_put(vreg->reg);
7787out:
7788 return rc;
7789}
7790
7791static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7792{
7793 regulator_put(vreg->reg);
7794}
7795
7796/* this init function should be called only once for each SDCC */
7797static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7798{
7799 int rc = 0;
7800 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7801 struct sdcc_reg_data *curr;
7802
7803 curr = &sdcc_vreg_data[dev_id - 1];
7804 curr_vdd_reg = curr->vdd_data;
7805 curr_vccq_reg = curr->vccq_data;
7806 curr_vddp_reg = curr->vddp_data;
7807
7808 if (init) {
7809 /*
7810 * get the regulator handle from voltage regulator framework
7811 * and then try to set the voltage level for the regulator
7812 */
7813 if (curr_vdd_reg) {
7814 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7815 if (rc)
7816 goto out;
7817 }
7818 if (curr_vccq_reg) {
7819 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7820 if (rc)
7821 goto vdd_reg_deinit;
7822 }
7823 if (curr_vddp_reg) {
7824 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7825 if (rc)
7826 goto vccq_reg_deinit;
7827 }
7828 goto out;
7829 } else
7830 /* deregister with all regulators from regulator framework */
7831 goto vddp_reg_deinit;
7832
7833vddp_reg_deinit:
7834 if (curr_vddp_reg)
7835 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7836vccq_reg_deinit:
7837 if (curr_vccq_reg)
7838 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7839vdd_reg_deinit:
7840 if (curr_vdd_reg)
7841 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7842out:
7843 return rc;
7844}
7845
7846static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7847{
7848 int rc;
7849
7850 if (!vreg->enabled) {
7851 rc = regulator_enable(vreg->reg);
7852 if (rc) {
7853 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7854 __func__, vreg->reg_name, rc);
7855 goto out;
7856 }
7857 vreg->enabled = 1;
7858 }
7859
7860 /* Put always_on regulator in HPM (high power mode) */
7861 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7862 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7863 if (rc < 0) {
7864 pr_err("%s: reg=%s: HPM setting failed"
7865 " hpm_uA=%d, rc=%d\n",
7866 __func__, vreg->reg_name,
7867 vreg->hpm_uA, rc);
7868 goto vreg_disable;
7869 }
7870 rc = 0;
7871 }
7872 goto out;
7873
7874vreg_disable:
7875 regulator_disable(vreg->reg);
7876 vreg->enabled = 0;
7877out:
7878 return rc;
7879}
7880
7881static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7882{
7883 int rc;
7884
7885 /* Never disable always_on regulator */
7886 if (!vreg->always_on) {
7887 rc = regulator_disable(vreg->reg);
7888 if (rc) {
7889 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7890 __func__, vreg->reg_name, rc);
7891 goto out;
7892 }
7893 vreg->enabled = 0;
7894 }
7895
7896 /* Put always_on regulator in LPM (low power mode) */
7897 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7898 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7899 if (rc < 0) {
7900 pr_err("%s: reg=%s: LPM setting failed"
7901 " lpm_uA=%d, rc=%d\n",
7902 __func__,
7903 vreg->reg_name,
7904 vreg->lpm_uA, rc);
7905 goto out;
7906 }
7907 rc = 0;
7908 }
7909
7910out:
7911 return rc;
7912}
7913
7914static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7915{
7916 int rc = 0;
7917 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7918 struct sdcc_reg_data *curr;
7919
7920 curr = &sdcc_vreg_data[dev_id - 1];
7921 curr_vdd_reg = curr->vdd_data;
7922 curr_vccq_reg = curr->vccq_data;
7923 curr_vddp_reg = curr->vddp_data;
7924
7925 /* check if regulators are initialized or not? */
7926 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7927 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7928 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7929 /* initialize voltage regulators required for this SDCC */
7930 rc = msm_sdcc_vreg_init(dev_id, 1);
7931 if (rc) {
7932 pr_err("%s: regulator init failed = %d\n",
7933 __func__, rc);
7934 goto out;
7935 }
7936 }
7937
7938 if (curr->sts == enable)
7939 goto out;
7940
7941 if (curr_vdd_reg) {
7942 if (enable)
7943 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7944 else
7945 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7946 if (rc)
7947 goto out;
7948 }
7949
7950 if (curr_vccq_reg) {
7951 if (enable)
7952 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7953 else
7954 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7955 if (rc)
7956 goto out;
7957 }
7958
7959 if (curr_vddp_reg) {
7960 if (enable)
7961 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7962 else
7963 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7964 if (rc)
7965 goto out;
7966 }
7967 curr->sts = enable;
7968
7969out:
7970 return rc;
7971}
7972
7973static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7974{
7975 u32 rc_pin_cfg = 0;
7976 u32 rc_vreg_cfg = 0;
7977 u32 rc = 0;
7978 struct platform_device *pdev;
7979 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7980
7981 pdev = container_of(dv, struct platform_device, dev);
7982
7983 /* setup gpio/pad */
7984 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7985 if (curr_pin_cfg->cfg_sts == !!vdd)
7986 goto setup_vreg;
7987
7988 if (curr_pin_cfg->is_gpio)
7989 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7990 else
7991 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7992
7993setup_vreg:
7994 /* setup voltage regulators */
7995 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7996
7997 if (rc_pin_cfg || rc_vreg_cfg)
7998 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
7999
8000 return rc;
8001}
8002
8003static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8004{
8005 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8006 struct platform_device *pdev;
8007
8008 pdev = container_of(dv, struct platform_device, dev);
8009 /* setup gpio/pad */
8010 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8011
8012 if (curr_pin_cfg->cfg_sts == active)
8013 return;
8014
8015 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8016 if (curr_pin_cfg->is_gpio)
8017 msm_sdcc_setup_gpio(pdev->id, active);
8018 else
8019 msm_sdcc_setup_pad(pdev->id, active);
8020 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8021}
8022
8023static int msm_sdc3_get_wpswitch(struct device *dev)
8024{
8025 struct platform_device *pdev;
8026 int status;
8027 pdev = container_of(dev, struct platform_device, dev);
8028
8029 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8030 if (status) {
8031 pr_err("%s:Failed to request GPIO %d\n",
8032 __func__, GPIO_SDC_WP);
8033 } else {
8034 status = gpio_direction_input(GPIO_SDC_WP);
8035 if (!status) {
8036 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8037 pr_info("%s: WP Status for Slot %d = %d\n",
8038 __func__, pdev->id, status);
8039 }
8040 gpio_free(GPIO_SDC_WP);
8041 }
8042 return status;
8043}
8044
8045#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8046int sdc5_register_status_notify(void (*callback)(int, void *),
8047 void *dev_id)
8048{
8049 sdc5_status_notify_cb = callback;
8050 sdc5_status_notify_cb_devid = dev_id;
8051 return 0;
8052}
8053#endif
8054
8055#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8056int sdc2_register_status_notify(void (*callback)(int, void *),
8057 void *dev_id)
8058{
8059 sdc2_status_notify_cb = callback;
8060 sdc2_status_notify_cb_devid = dev_id;
8061 return 0;
8062}
8063#endif
8064
8065/* Interrupt handler for SDC2 and SDC5 detection
8066 * This function uses dual-edge interrputs settings in order
8067 * to get SDIO detection when the GPIO is rising and SDIO removal
8068 * when the GPIO is falling */
8069static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8070{
8071 int status;
8072
8073 if (!machine_is_msm8x60_fusion() &&
8074 !machine_is_msm8x60_fusn_ffa())
8075 return IRQ_NONE;
8076
8077 status = gpio_get_value(MDM2AP_SYNC);
8078 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8079 __func__, status);
8080
8081#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8082 if (sdc2_status_notify_cb) {
8083 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8084 sdc2_status_notify_cb(status,
8085 sdc2_status_notify_cb_devid);
8086 }
8087#endif
8088
8089#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8090 if (sdc5_status_notify_cb) {
8091 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8092 sdc5_status_notify_cb(status,
8093 sdc5_status_notify_cb_devid);
8094 }
8095#endif
8096 return IRQ_HANDLED;
8097}
8098
8099static int msm8x60_multi_sdio_init(void)
8100{
8101 int ret, irq_num;
8102
8103 if (!machine_is_msm8x60_fusion() &&
8104 !machine_is_msm8x60_fusn_ffa())
8105 return 0;
8106
8107 ret = msm_gpiomux_get(MDM2AP_SYNC);
8108 if (ret) {
8109 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8110 __func__, MDM2AP_SYNC, ret);
8111 return ret;
8112 }
8113
8114 irq_num = gpio_to_irq(MDM2AP_SYNC);
8115
8116 ret = request_irq(irq_num,
8117 msm8x60_multi_sdio_slot_status_irq,
8118 IRQ_TYPE_EDGE_BOTH,
8119 "sdio_multidetection", NULL);
8120
8121 if (ret) {
8122 pr_err("%s:Failed to request irq, ret=%d\n",
8123 __func__, ret);
8124 return ret;
8125 }
8126
8127 return ret;
8128}
8129
8130#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8131#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8132static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8133{
8134 int status;
8135
8136 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8137 , "SD_HW_Detect");
8138 if (status) {
8139 pr_err("%s:Failed to request GPIO %d\n", __func__,
8140 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8141 } else {
8142 status = gpio_direction_input(
8143 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8144 if (!status)
8145 status = !(gpio_get_value_cansleep(
8146 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8147 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8148 }
8149 return (unsigned int) status;
8150}
8151#endif
8152#endif
8153
8154#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8155static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8156{
8157 struct platform_device *pdev;
8158 enum msm_mpm_pin pin;
8159 int ret = 0;
8160
8161 pdev = container_of(dev, struct platform_device, dev);
8162
8163 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8164 if (pdev->id == 4)
8165 pin = MSM_MPM_PIN_SDC4_DAT1;
8166 else
8167 return -EINVAL;
8168
8169 switch (mode) {
8170 case SDC_DAT1_DISABLE:
8171 ret = msm_mpm_enable_pin(pin, 0);
8172 break;
8173 case SDC_DAT1_ENABLE:
8174 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8175 ret = msm_mpm_enable_pin(pin, 1);
8176 break;
8177 case SDC_DAT1_ENWAKE:
8178 ret = msm_mpm_set_pin_wake(pin, 1);
8179 break;
8180 case SDC_DAT1_DISWAKE:
8181 ret = msm_mpm_set_pin_wake(pin, 0);
8182 break;
8183 default:
8184 ret = -EINVAL;
8185 break;
8186 }
8187 return ret;
8188}
8189#endif
8190#endif
8191
8192#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8193static struct mmc_platform_data msm8x60_sdc1_data = {
8194 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8195 .translate_vdd = msm_sdcc_setup_power,
8196#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8197 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8198#else
8199 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8200#endif
8201 .msmsdcc_fmin = 400000,
8202 .msmsdcc_fmid = 24000000,
8203 .msmsdcc_fmax = 48000000,
8204 .nonremovable = 1,
8205 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008206};
8207#endif
8208
8209#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8210static struct mmc_platform_data msm8x60_sdc2_data = {
8211 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8212 .translate_vdd = msm_sdcc_setup_power,
8213 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8214 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8215 .msmsdcc_fmin = 400000,
8216 .msmsdcc_fmid = 24000000,
8217 .msmsdcc_fmax = 48000000,
8218 .nonremovable = 0,
8219 .pclk_src_dfab = 1,
8220 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008221#ifdef CONFIG_MSM_SDIO_AL
8222 .is_sdio_al_client = 1,
8223#endif
8224};
8225#endif
8226
8227#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8228static struct mmc_platform_data msm8x60_sdc3_data = {
8229 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8230 .translate_vdd = msm_sdcc_setup_power,
8231 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8232 .wpswitch = msm_sdc3_get_wpswitch,
8233#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8234 .status = msm8x60_sdcc_slot_status,
8235 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8236 PMIC_GPIO_SDC3_DET - 1),
8237 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8238#endif
8239 .msmsdcc_fmin = 400000,
8240 .msmsdcc_fmid = 24000000,
8241 .msmsdcc_fmax = 48000000,
8242 .nonremovable = 0,
8243 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008244};
8245#endif
8246
8247#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8248static struct mmc_platform_data msm8x60_sdc4_data = {
8249 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8250 .translate_vdd = msm_sdcc_setup_power,
8251 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8252 .msmsdcc_fmin = 400000,
8253 .msmsdcc_fmid = 24000000,
8254 .msmsdcc_fmax = 48000000,
8255 .nonremovable = 0,
8256 .pclk_src_dfab = 1,
8257 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008258};
8259#endif
8260
8261#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8262static struct mmc_platform_data msm8x60_sdc5_data = {
8263 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8264 .translate_vdd = msm_sdcc_setup_power,
8265 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8266 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8267 .msmsdcc_fmin = 400000,
8268 .msmsdcc_fmid = 24000000,
8269 .msmsdcc_fmax = 48000000,
8270 .nonremovable = 0,
8271 .pclk_src_dfab = 1,
8272 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008273#ifdef CONFIG_MSM_SDIO_AL
8274 .is_sdio_al_client = 1,
8275#endif
8276};
8277#endif
8278
8279static void __init msm8x60_init_mmc(void)
8280{
8281#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8282 /* SDCC1 : eMMC card connected */
8283 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8284 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8285 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8286 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308287 sdcc_vreg_data[0].vdd_data->always_on = 1;
8288 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8289 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8290 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008291
8292 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8293 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8294 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8295 sdcc_vreg_data[0].vccq_data->always_on = 1;
8296
8297 msm_add_sdcc(1, &msm8x60_sdc1_data);
8298#endif
8299#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8300 /*
8301 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8302 * and no card is connected on 8660 SURF/FFA/FLUID.
8303 */
8304 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8305 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8306 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8307 sdcc_vreg_data[1].vdd_data->level = 1800000;
8308
8309 sdcc_vreg_data[1].vccq_data = NULL;
8310
8311 if (machine_is_msm8x60_fusion())
8312 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8313 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8314#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8315 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8316 msm_sdcc_setup_gpio(2, 1);
8317#endif
8318 msm_add_sdcc(2, &msm8x60_sdc2_data);
8319 }
8320#endif
8321#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8322 /* SDCC3 : External card slot connected */
8323 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8324 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8325 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8326 sdcc_vreg_data[2].vdd_data->level = 2850000;
8327 sdcc_vreg_data[2].vdd_data->always_on = 1;
8328 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8329 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8330 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8331
8332 sdcc_vreg_data[2].vccq_data = NULL;
8333
8334 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8335 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8336 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8337 sdcc_vreg_data[2].vddp_data->level = 2850000;
8338 sdcc_vreg_data[2].vddp_data->always_on = 1;
8339 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8340 /* Sleep current required is ~300 uA. But min. RPM
8341 * vote can be in terms of mA (min. 1 mA).
8342 * So let's vote for 2 mA during sleep.
8343 */
8344 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8345 /* Max. Active current required is 16 mA */
8346 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8347
8348 if (machine_is_msm8x60_fluid())
8349 msm8x60_sdc3_data.wpswitch = NULL;
8350 msm_add_sdcc(3, &msm8x60_sdc3_data);
8351#endif
8352#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8353 /* SDCC4 : WLAN WCN1314 chip is connected */
8354 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8355 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8356 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8357 sdcc_vreg_data[3].vdd_data->level = 1800000;
8358
8359 sdcc_vreg_data[3].vccq_data = NULL;
8360
8361 msm_add_sdcc(4, &msm8x60_sdc4_data);
8362#endif
8363#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8364 /*
8365 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8366 * and no card is connected on 8660 SURF/FFA/FLUID.
8367 */
8368 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8369 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8370 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8371 sdcc_vreg_data[4].vdd_data->level = 1800000;
8372
8373 sdcc_vreg_data[4].vccq_data = NULL;
8374
8375 if (machine_is_msm8x60_fusion())
8376 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8377 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8378#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8379 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8380 msm_sdcc_setup_gpio(5, 1);
8381#endif
8382 msm_add_sdcc(5, &msm8x60_sdc5_data);
8383 }
8384#endif
8385}
8386
8387#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8388static inline void display_common_power(int on) {}
8389#else
8390
8391#define _GET_REGULATOR(var, name) do { \
8392 if (var == NULL) { \
8393 var = regulator_get(NULL, name); \
8394 if (IS_ERR(var)) { \
8395 pr_err("'%s' regulator not found, rc=%ld\n", \
8396 name, PTR_ERR(var)); \
8397 var = NULL; \
8398 } \
8399 } \
8400} while (0)
8401
8402static int dsub_regulator(int on)
8403{
8404 static struct regulator *dsub_reg;
8405 static struct regulator *mpp0_reg;
8406 static int dsub_reg_enabled;
8407 int rc = 0;
8408
8409 _GET_REGULATOR(dsub_reg, "8901_l3");
8410 if (IS_ERR(dsub_reg)) {
8411 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8412 __func__, PTR_ERR(dsub_reg));
8413 return PTR_ERR(dsub_reg);
8414 }
8415
8416 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8417 if (IS_ERR(mpp0_reg)) {
8418 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8419 __func__, PTR_ERR(mpp0_reg));
8420 return PTR_ERR(mpp0_reg);
8421 }
8422
8423 if (on && !dsub_reg_enabled) {
8424 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8425 if (rc) {
8426 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8427 " err=%d", __func__, rc);
8428 goto dsub_regulator_err;
8429 }
8430 rc = regulator_enable(dsub_reg);
8431 if (rc) {
8432 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8433 " err=%d", __func__, rc);
8434 goto dsub_regulator_err;
8435 }
8436 rc = regulator_enable(mpp0_reg);
8437 if (rc) {
8438 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8439 " err=%d", __func__, rc);
8440 goto dsub_regulator_err;
8441 }
8442 dsub_reg_enabled = 1;
8443 } else if (!on && dsub_reg_enabled) {
8444 rc = regulator_disable(dsub_reg);
8445 if (rc)
8446 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8447 " err=%d", __func__, rc);
8448 rc = regulator_disable(mpp0_reg);
8449 if (rc)
8450 printk(KERN_WARNING "%s: failed to disable reg "
8451 "8901_mpp0 err=%d", __func__, rc);
8452 dsub_reg_enabled = 0;
8453 }
8454
8455 return rc;
8456
8457dsub_regulator_err:
8458 regulator_put(mpp0_reg);
8459 regulator_put(dsub_reg);
8460 return rc;
8461}
8462
8463static int display_power_on;
8464static void setup_display_power(void)
8465{
8466 if (display_power_on)
8467 if (lcdc_vga_enabled) {
8468 dsub_regulator(1);
8469 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8470 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8471 if (machine_is_msm8x60_ffa() ||
8472 machine_is_msm8x60_fusn_ffa())
8473 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8474 } else {
8475 dsub_regulator(0);
8476 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8477 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8478 if (machine_is_msm8x60_ffa() ||
8479 machine_is_msm8x60_fusn_ffa())
8480 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8481 }
8482 else {
8483 dsub_regulator(0);
8484 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8485 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8486 /* BACKLIGHT */
8487 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8488 /* LVDS */
8489 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8490 }
8491}
8492
8493#define _GET_REGULATOR(var, name) do { \
8494 if (var == NULL) { \
8495 var = regulator_get(NULL, name); \
8496 if (IS_ERR(var)) { \
8497 pr_err("'%s' regulator not found, rc=%ld\n", \
8498 name, PTR_ERR(var)); \
8499 var = NULL; \
8500 } \
8501 } \
8502} while (0)
8503
8504#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8505
8506static void display_common_power(int on)
8507{
8508 int rc;
8509 static struct regulator *display_reg;
8510
8511 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8512 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8513 if (on) {
8514 /* LVDS */
8515 _GET_REGULATOR(display_reg, "8901_l2");
8516 if (!display_reg)
8517 return;
8518 rc = regulator_set_voltage(display_reg,
8519 3300000, 3300000);
8520 if (rc)
8521 goto out;
8522 rc = regulator_enable(display_reg);
8523 if (rc)
8524 goto out;
8525 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8526 "LVDS_STDN_OUT_N");
8527 if (rc) {
8528 printk(KERN_ERR "%s: LVDS gpio %d request"
8529 "failed\n", __func__,
8530 GPIO_LVDS_SHUTDOWN_N);
8531 goto out2;
8532 }
8533
8534 /* BACKLIGHT */
8535 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8536 if (rc) {
8537 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8538 "failed\n", __func__,
8539 GPIO_BACKLIGHT_EN);
8540 goto out3;
8541 }
8542
8543 if (machine_is_msm8x60_ffa() ||
8544 machine_is_msm8x60_fusn_ffa()) {
8545 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8546 "DONGLE_PWR_EN");
8547 if (rc) {
8548 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8549 " %d request failed\n", __func__,
8550 GPIO_DONGLE_PWR_EN);
8551 goto out4;
8552 }
8553 }
8554
8555 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8556 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8557 if (machine_is_msm8x60_ffa() ||
8558 machine_is_msm8x60_fusn_ffa())
8559 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8560 mdelay(20);
8561 display_power_on = 1;
8562 setup_display_power();
8563 } else {
8564 if (display_power_on) {
8565 display_power_on = 0;
8566 setup_display_power();
8567 mdelay(20);
8568 if (machine_is_msm8x60_ffa() ||
8569 machine_is_msm8x60_fusn_ffa())
8570 gpio_free(GPIO_DONGLE_PWR_EN);
8571 goto out4;
8572 }
8573 }
8574 }
8575#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8576 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8577 else if (machine_is_msm8x60_fluid()) {
8578 static struct regulator *fluid_reg;
8579 static struct regulator *fluid_reg2;
8580
8581 if (on) {
8582 _GET_REGULATOR(fluid_reg, "8901_l2");
8583 if (!fluid_reg)
8584 return;
8585 _GET_REGULATOR(fluid_reg2, "8058_s3");
8586 if (!fluid_reg2) {
8587 regulator_put(fluid_reg);
8588 return;
8589 }
8590 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8591 if (rc) {
8592 regulator_put(fluid_reg2);
8593 regulator_put(fluid_reg);
8594 return;
8595 }
8596 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8597 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8598 regulator_enable(fluid_reg);
8599 regulator_enable(fluid_reg2);
8600 msleep(20);
8601 gpio_direction_output(GPIO_RESX_N, 0);
8602 udelay(10);
8603 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8604 display_power_on = 1;
8605 setup_display_power();
8606 } else {
8607 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8608 gpio_free(GPIO_RESX_N);
8609 msleep(20);
8610 regulator_disable(fluid_reg2);
8611 regulator_disable(fluid_reg);
8612 regulator_put(fluid_reg2);
8613 regulator_put(fluid_reg);
8614 display_power_on = 0;
8615 setup_display_power();
8616 fluid_reg = NULL;
8617 fluid_reg2 = NULL;
8618 }
8619 }
8620#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008621#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8622 else if (machine_is_msm8x60_dragon()) {
8623 static struct regulator *dragon_reg;
8624 static struct regulator *dragon_reg2;
8625
8626 if (on) {
8627 _GET_REGULATOR(dragon_reg, "8901_l2");
8628 if (!dragon_reg)
8629 return;
8630 _GET_REGULATOR(dragon_reg2, "8058_l16");
8631 if (!dragon_reg2) {
8632 regulator_put(dragon_reg);
8633 dragon_reg = NULL;
8634 return;
8635 }
8636
8637 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8638 if (rc) {
8639 pr_err("%s: gpio %d request failed with rc=%d\n",
8640 __func__, GPIO_NT35582_BL_EN, rc);
8641 regulator_put(dragon_reg);
8642 regulator_put(dragon_reg2);
8643 dragon_reg = NULL;
8644 dragon_reg2 = NULL;
8645 return;
8646 }
8647
8648 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8649 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8650 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8651 pr_err("%s: config gpio '%d' failed!\n",
8652 __func__, GPIO_NT35582_RESET);
8653 gpio_free(GPIO_NT35582_BL_EN);
8654 regulator_put(dragon_reg);
8655 regulator_put(dragon_reg2);
8656 dragon_reg = NULL;
8657 dragon_reg2 = NULL;
8658 return;
8659 }
8660
8661 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8662 if (rc) {
8663 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8664 __func__, GPIO_NT35582_RESET, rc);
8665 gpio_free(GPIO_NT35582_BL_EN);
8666 regulator_put(dragon_reg);
8667 regulator_put(dragon_reg2);
8668 dragon_reg = NULL;
8669 dragon_reg2 = NULL;
8670 return;
8671 }
8672
8673 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8674 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8675 regulator_enable(dragon_reg);
8676 regulator_enable(dragon_reg2);
8677 msleep(20);
8678
8679 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8680 msleep(20);
8681 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8682 msleep(20);
8683 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8684 msleep(50);
8685
8686 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8687
8688 display_power_on = 1;
8689 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8690 gpio_free(GPIO_NT35582_RESET);
8691 gpio_free(GPIO_NT35582_BL_EN);
8692 regulator_disable(dragon_reg2);
8693 regulator_disable(dragon_reg);
8694 regulator_put(dragon_reg2);
8695 regulator_put(dragon_reg);
8696 display_power_on = 0;
8697 dragon_reg = NULL;
8698 dragon_reg2 = NULL;
8699 }
8700 }
8701#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008702 return;
8703
8704out4:
8705 gpio_free(GPIO_BACKLIGHT_EN);
8706out3:
8707 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8708out2:
8709 regulator_disable(display_reg);
8710out:
8711 regulator_put(display_reg);
8712 display_reg = NULL;
8713}
8714#undef _GET_REGULATOR
8715#endif
8716
8717static int mipi_dsi_panel_power(int on);
8718
8719#define LCDC_NUM_GPIO 28
8720#define LCDC_GPIO_START 0
8721
8722static void lcdc_samsung_panel_power(int on)
8723{
8724 int n, ret = 0;
8725
8726 display_common_power(on);
8727
8728 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8729 if (on) {
8730 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8731 if (unlikely(ret)) {
8732 pr_err("%s not able to get gpio\n", __func__);
8733 break;
8734 }
8735 } else
8736 gpio_free(LCDC_GPIO_START + n);
8737 }
8738
8739 if (ret) {
8740 for (n--; n >= 0; n--)
8741 gpio_free(LCDC_GPIO_START + n);
8742 }
8743
8744 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8745}
8746
8747#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8748#define _GET_REGULATOR(var, name) do { \
8749 var = regulator_get(NULL, name); \
8750 if (IS_ERR(var)) { \
8751 pr_err("'%s' regulator not found, rc=%ld\n", \
8752 name, IS_ERR(var)); \
8753 var = NULL; \
8754 return -ENODEV; \
8755 } \
8756} while (0)
8757
8758static int hdmi_enable_5v(int on)
8759{
8760 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8761 static struct regulator *reg_8901_mpp0; /* External 5V */
8762 static int prev_on;
8763 int rc;
8764
8765 if (on == prev_on)
8766 return 0;
8767
8768 if (!reg_8901_hdmi_mvs)
8769 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8770 if (!reg_8901_mpp0)
8771 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8772
8773 if (on) {
8774 rc = regulator_enable(reg_8901_mpp0);
8775 if (rc) {
8776 pr_err("'%s' regulator enable failed, rc=%d\n",
8777 "reg_8901_mpp0", rc);
8778 return rc;
8779 }
8780 rc = regulator_enable(reg_8901_hdmi_mvs);
8781 if (rc) {
8782 pr_err("'%s' regulator enable failed, rc=%d\n",
8783 "8901_hdmi_mvs", rc);
8784 return rc;
8785 }
8786 pr_info("%s(on): success\n", __func__);
8787 } else {
8788 rc = regulator_disable(reg_8901_hdmi_mvs);
8789 if (rc)
8790 pr_warning("'%s' regulator disable failed, rc=%d\n",
8791 "8901_hdmi_mvs", rc);
8792 rc = regulator_disable(reg_8901_mpp0);
8793 if (rc)
8794 pr_warning("'%s' regulator disable failed, rc=%d\n",
8795 "reg_8901_mpp0", rc);
8796 pr_info("%s(off): success\n", __func__);
8797 }
8798
8799 prev_on = on;
8800
8801 return 0;
8802}
8803
8804static int hdmi_core_power(int on, int show)
8805{
8806 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8807 static int prev_on;
8808 int rc;
8809
8810 if (on == prev_on)
8811 return 0;
8812
8813 if (!reg_8058_l16)
8814 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8815
8816 if (on) {
8817 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8818 if (!rc)
8819 rc = regulator_enable(reg_8058_l16);
8820 if (rc) {
8821 pr_err("'%s' regulator enable failed, rc=%d\n",
8822 "8058_l16", rc);
8823 return rc;
8824 }
8825 rc = gpio_request(170, "HDMI_DDC_CLK");
8826 if (rc) {
8827 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8828 "HDMI_DDC_CLK", 170, rc);
8829 goto error1;
8830 }
8831 rc = gpio_request(171, "HDMI_DDC_DATA");
8832 if (rc) {
8833 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8834 "HDMI_DDC_DATA", 171, rc);
8835 goto error2;
8836 }
8837 rc = gpio_request(172, "HDMI_HPD");
8838 if (rc) {
8839 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8840 "HDMI_HPD", 172, rc);
8841 goto error3;
8842 }
8843 pr_info("%s(on): success\n", __func__);
8844 } else {
8845 gpio_free(170);
8846 gpio_free(171);
8847 gpio_free(172);
8848 rc = regulator_disable(reg_8058_l16);
8849 if (rc)
8850 pr_warning("'%s' regulator disable failed, rc=%d\n",
8851 "8058_l16", rc);
8852 pr_info("%s(off): success\n", __func__);
8853 }
8854
8855 prev_on = on;
8856
8857 return 0;
8858
8859error3:
8860 gpio_free(171);
8861error2:
8862 gpio_free(170);
8863error1:
8864 regulator_disable(reg_8058_l16);
8865 return rc;
8866}
8867
8868static int hdmi_cec_power(int on)
8869{
8870 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8871 static int prev_on;
8872 int rc;
8873
8874 if (on == prev_on)
8875 return 0;
8876
8877 if (!reg_8901_l3)
8878 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8879
8880 if (on) {
8881 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8882 if (!rc)
8883 rc = regulator_enable(reg_8901_l3);
8884 if (rc) {
8885 pr_err("'%s' regulator enable failed, rc=%d\n",
8886 "8901_l3", rc);
8887 return rc;
8888 }
8889 rc = gpio_request(169, "HDMI_CEC_VAR");
8890 if (rc) {
8891 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8892 "HDMI_CEC_VAR", 169, rc);
8893 goto error;
8894 }
8895 pr_info("%s(on): success\n", __func__);
8896 } else {
8897 gpio_free(169);
8898 rc = regulator_disable(reg_8901_l3);
8899 if (rc)
8900 pr_warning("'%s' regulator disable failed, rc=%d\n",
8901 "8901_l3", rc);
8902 pr_info("%s(off): success\n", __func__);
8903 }
8904
8905 prev_on = on;
8906
8907 return 0;
8908error:
8909 regulator_disable(reg_8901_l3);
8910 return rc;
8911}
8912
8913#undef _GET_REGULATOR
8914
8915#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8916
8917static int lcdc_panel_power(int on)
8918{
8919 int flag_on = !!on;
8920 static int lcdc_power_save_on;
8921
8922 if (lcdc_power_save_on == flag_on)
8923 return 0;
8924
8925 lcdc_power_save_on = flag_on;
8926
8927 lcdc_samsung_panel_power(on);
8928
8929 return 0;
8930}
8931
8932#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008933static struct msm_bus_vectors mdp_init_vectors[] = {
8934 /* For now, 0th array entry is reserved.
8935 * Please leave 0 as is and don't use it
8936 */
8937 {
8938 .src = MSM_BUS_MASTER_MDP_PORT0,
8939 .dst = MSM_BUS_SLAVE_SMI,
8940 .ab = 0,
8941 .ib = 0,
8942 },
8943 /* Master and slaves can be from different fabrics */
8944 {
8945 .src = MSM_BUS_MASTER_MDP_PORT0,
8946 .dst = MSM_BUS_SLAVE_EBI_CH0,
8947 .ab = 0,
8948 .ib = 0,
8949 },
8950};
8951
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008952#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8953static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8954 /* If HDMI is used as primary */
8955 {
8956 .src = MSM_BUS_MASTER_MDP_PORT0,
8957 .dst = MSM_BUS_SLAVE_SMI,
8958 .ab = 2000000000,
8959 .ib = 2000000000,
8960 },
8961 /* Master and slaves can be from different fabrics */
8962 {
8963 .src = MSM_BUS_MASTER_MDP_PORT0,
8964 .dst = MSM_BUS_SLAVE_EBI_CH0,
8965 .ab = 2000000000,
8966 .ib = 2000000000,
8967 },
8968};
8969
8970static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8971 {
8972 ARRAY_SIZE(mdp_init_vectors),
8973 mdp_init_vectors,
8974 },
8975 {
8976 ARRAY_SIZE(hdmi_as_primary_vectors),
8977 hdmi_as_primary_vectors,
8978 },
8979 {
8980 ARRAY_SIZE(hdmi_as_primary_vectors),
8981 hdmi_as_primary_vectors,
8982 },
8983 {
8984 ARRAY_SIZE(hdmi_as_primary_vectors),
8985 hdmi_as_primary_vectors,
8986 },
8987 {
8988 ARRAY_SIZE(hdmi_as_primary_vectors),
8989 hdmi_as_primary_vectors,
8990 },
8991 {
8992 ARRAY_SIZE(hdmi_as_primary_vectors),
8993 hdmi_as_primary_vectors,
8994 },
8995};
8996#else
8997#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008998static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
8999 /* Default case static display/UI/2d/3d if FB SMI */
9000 {
9001 .src = MSM_BUS_MASTER_MDP_PORT0,
9002 .dst = MSM_BUS_SLAVE_SMI,
9003 .ab = 388800000,
9004 .ib = 486000000,
9005 },
9006 /* Master and slaves can be from different fabrics */
9007 {
9008 .src = MSM_BUS_MASTER_MDP_PORT0,
9009 .dst = MSM_BUS_SLAVE_EBI_CH0,
9010 .ab = 0,
9011 .ib = 0,
9012 },
9013};
9014
9015static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9016 /* Default case static display/UI/2d/3d if FB SMI */
9017 {
9018 .src = MSM_BUS_MASTER_MDP_PORT0,
9019 .dst = MSM_BUS_SLAVE_SMI,
9020 .ab = 0,
9021 .ib = 0,
9022 },
9023 /* Master and slaves can be from different fabrics */
9024 {
9025 .src = MSM_BUS_MASTER_MDP_PORT0,
9026 .dst = MSM_BUS_SLAVE_EBI_CH0,
9027 .ab = 388800000,
9028 .ib = 486000000 * 2,
9029 },
9030};
9031static struct msm_bus_vectors mdp_vga_vectors[] = {
9032 /* VGA and less video */
9033 {
9034 .src = MSM_BUS_MASTER_MDP_PORT0,
9035 .dst = MSM_BUS_SLAVE_SMI,
9036 .ab = 458092800,
9037 .ib = 572616000,
9038 },
9039 {
9040 .src = MSM_BUS_MASTER_MDP_PORT0,
9041 .dst = MSM_BUS_SLAVE_EBI_CH0,
9042 .ab = 458092800,
9043 .ib = 572616000 * 2,
9044 },
9045};
9046static struct msm_bus_vectors mdp_720p_vectors[] = {
9047 /* 720p and less video */
9048 {
9049 .src = MSM_BUS_MASTER_MDP_PORT0,
9050 .dst = MSM_BUS_SLAVE_SMI,
9051 .ab = 471744000,
9052 .ib = 589680000,
9053 },
9054 /* Master and slaves can be from different fabrics */
9055 {
9056 .src = MSM_BUS_MASTER_MDP_PORT0,
9057 .dst = MSM_BUS_SLAVE_EBI_CH0,
9058 .ab = 471744000,
9059 .ib = 589680000 * 2,
9060 },
9061};
9062
9063static struct msm_bus_vectors mdp_1080p_vectors[] = {
9064 /* 1080p and less video */
9065 {
9066 .src = MSM_BUS_MASTER_MDP_PORT0,
9067 .dst = MSM_BUS_SLAVE_SMI,
9068 .ab = 575424000,
9069 .ib = 719280000,
9070 },
9071 /* Master and slaves can be from different fabrics */
9072 {
9073 .src = MSM_BUS_MASTER_MDP_PORT0,
9074 .dst = MSM_BUS_SLAVE_EBI_CH0,
9075 .ab = 575424000,
9076 .ib = 719280000 * 2,
9077 },
9078};
9079
9080#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009081static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9082 /* Default case static display/UI/2d/3d if FB SMI */
9083 {
9084 .src = MSM_BUS_MASTER_MDP_PORT0,
9085 .dst = MSM_BUS_SLAVE_SMI,
9086 .ab = 175110000,
9087 .ib = 218887500,
9088 },
9089 /* Master and slaves can be from different fabrics */
9090 {
9091 .src = MSM_BUS_MASTER_MDP_PORT0,
9092 .dst = MSM_BUS_SLAVE_EBI_CH0,
9093 .ab = 0,
9094 .ib = 0,
9095 },
9096};
9097
9098static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9099 /* Default case static display/UI/2d/3d if FB SMI */
9100 {
9101 .src = MSM_BUS_MASTER_MDP_PORT0,
9102 .dst = MSM_BUS_SLAVE_SMI,
9103 .ab = 0,
9104 .ib = 0,
9105 },
9106 /* Master and slaves can be from different fabrics */
9107 {
9108 .src = MSM_BUS_MASTER_MDP_PORT0,
9109 .dst = MSM_BUS_SLAVE_EBI_CH0,
9110 .ab = 216000000,
9111 .ib = 270000000 * 2,
9112 },
9113};
9114static struct msm_bus_vectors mdp_vga_vectors[] = {
9115 /* VGA and less video */
9116 {
9117 .src = MSM_BUS_MASTER_MDP_PORT0,
9118 .dst = MSM_BUS_SLAVE_SMI,
9119 .ab = 216000000,
9120 .ib = 270000000,
9121 },
9122 {
9123 .src = MSM_BUS_MASTER_MDP_PORT0,
9124 .dst = MSM_BUS_SLAVE_EBI_CH0,
9125 .ab = 216000000,
9126 .ib = 270000000 * 2,
9127 },
9128};
9129
9130static struct msm_bus_vectors mdp_720p_vectors[] = {
9131 /* 720p and less video */
9132 {
9133 .src = MSM_BUS_MASTER_MDP_PORT0,
9134 .dst = MSM_BUS_SLAVE_SMI,
9135 .ab = 230400000,
9136 .ib = 288000000,
9137 },
9138 /* Master and slaves can be from different fabrics */
9139 {
9140 .src = MSM_BUS_MASTER_MDP_PORT0,
9141 .dst = MSM_BUS_SLAVE_EBI_CH0,
9142 .ab = 230400000,
9143 .ib = 288000000 * 2,
9144 },
9145};
9146
9147static struct msm_bus_vectors mdp_1080p_vectors[] = {
9148 /* 1080p and less video */
9149 {
9150 .src = MSM_BUS_MASTER_MDP_PORT0,
9151 .dst = MSM_BUS_SLAVE_SMI,
9152 .ab = 334080000,
9153 .ib = 417600000,
9154 },
9155 /* Master and slaves can be from different fabrics */
9156 {
9157 .src = MSM_BUS_MASTER_MDP_PORT0,
9158 .dst = MSM_BUS_SLAVE_EBI_CH0,
9159 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009160 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009161 },
9162};
9163
9164#endif
9165static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9166 {
9167 ARRAY_SIZE(mdp_init_vectors),
9168 mdp_init_vectors,
9169 },
9170 {
9171 ARRAY_SIZE(mdp_sd_smi_vectors),
9172 mdp_sd_smi_vectors,
9173 },
9174 {
9175 ARRAY_SIZE(mdp_sd_ebi_vectors),
9176 mdp_sd_ebi_vectors,
9177 },
9178 {
9179 ARRAY_SIZE(mdp_vga_vectors),
9180 mdp_vga_vectors,
9181 },
9182 {
9183 ARRAY_SIZE(mdp_720p_vectors),
9184 mdp_720p_vectors,
9185 },
9186 {
9187 ARRAY_SIZE(mdp_1080p_vectors),
9188 mdp_1080p_vectors,
9189 },
9190};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009191#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009192static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9193 mdp_bus_scale_usecases,
9194 ARRAY_SIZE(mdp_bus_scale_usecases),
9195 .name = "mdp",
9196};
9197
9198#endif
9199#ifdef CONFIG_MSM_BUS_SCALING
9200static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9201 /* For now, 0th array entry is reserved.
9202 * Please leave 0 as is and don't use it
9203 */
9204 {
9205 .src = MSM_BUS_MASTER_MDP_PORT0,
9206 .dst = MSM_BUS_SLAVE_SMI,
9207 .ab = 0,
9208 .ib = 0,
9209 },
9210 /* Master and slaves can be from different fabrics */
9211 {
9212 .src = MSM_BUS_MASTER_MDP_PORT0,
9213 .dst = MSM_BUS_SLAVE_EBI_CH0,
9214 .ab = 0,
9215 .ib = 0,
9216 },
9217};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009218#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9219static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9220 /* For now, 0th array entry is reserved.
9221 * Please leave 0 as is and don't use it
9222 */
9223 {
9224 .src = MSM_BUS_MASTER_MDP_PORT0,
9225 .dst = MSM_BUS_SLAVE_SMI,
9226 .ab = 2000000000,
9227 .ib = 2000000000,
9228 },
9229 /* Master and slaves can be from different fabrics */
9230 {
9231 .src = MSM_BUS_MASTER_MDP_PORT0,
9232 .dst = MSM_BUS_SLAVE_EBI_CH0,
9233 .ab = 2000000000,
9234 .ib = 2000000000,
9235 },
9236};
9237#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009238static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9239 /* For now, 0th array entry is reserved.
9240 * Please leave 0 as is and don't use it
9241 */
9242 {
9243 .src = MSM_BUS_MASTER_MDP_PORT0,
9244 .dst = MSM_BUS_SLAVE_SMI,
9245 .ab = 566092800,
9246 .ib = 707616000,
9247 },
9248 /* Master and slaves can be from different fabrics */
9249 {
9250 .src = MSM_BUS_MASTER_MDP_PORT0,
9251 .dst = MSM_BUS_SLAVE_EBI_CH0,
9252 .ab = 566092800,
9253 .ib = 707616000,
9254 },
9255};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009256#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009257static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9258 {
9259 ARRAY_SIZE(dtv_bus_init_vectors),
9260 dtv_bus_init_vectors,
9261 },
9262 {
9263 ARRAY_SIZE(dtv_bus_def_vectors),
9264 dtv_bus_def_vectors,
9265 },
9266};
9267static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9268 dtv_bus_scale_usecases,
9269 ARRAY_SIZE(dtv_bus_scale_usecases),
9270 .name = "dtv",
9271};
9272
9273static struct lcdc_platform_data dtv_pdata = {
9274 .bus_scale_table = &dtv_bus_scale_pdata,
9275};
9276#endif
9277
9278
9279static struct lcdc_platform_data lcdc_pdata = {
9280 .lcdc_power_save = lcdc_panel_power,
9281};
9282
9283
9284#define MDP_VSYNC_GPIO 28
9285
9286/*
9287 * MIPI_DSI only use 8058_LDO0 which need always on
9288 * therefore it need to be put at low power mode if
9289 * it was not used instead of turn it off.
9290 */
9291static int mipi_dsi_panel_power(int on)
9292{
9293 int flag_on = !!on;
9294 static int mipi_dsi_power_save_on;
9295 static struct regulator *ldo0;
9296 int rc = 0;
9297
9298 if (mipi_dsi_power_save_on == flag_on)
9299 return 0;
9300
9301 mipi_dsi_power_save_on = flag_on;
9302
9303 if (ldo0 == NULL) { /* init */
9304 ldo0 = regulator_get(NULL, "8058_l0");
9305 if (IS_ERR(ldo0)) {
9306 pr_debug("%s: LDO0 failed\n", __func__);
9307 rc = PTR_ERR(ldo0);
9308 return rc;
9309 }
9310
9311 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9312 if (rc)
9313 goto out;
9314
9315 rc = regulator_enable(ldo0);
9316 if (rc)
9317 goto out;
9318 }
9319
9320 if (on) {
9321 /* set ldo0 to HPM */
9322 rc = regulator_set_optimum_mode(ldo0, 100000);
9323 if (rc < 0)
9324 goto out;
9325 } else {
9326 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309327 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009328 if (rc < 0)
9329 goto out;
9330 }
9331
9332 return 0;
9333out:
9334 regulator_disable(ldo0);
9335 regulator_put(ldo0);
9336 ldo0 = NULL;
9337 return rc;
9338}
9339
9340static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9341 .vsync_gpio = MDP_VSYNC_GPIO,
9342 .dsi_power_save = mipi_dsi_panel_power,
9343};
9344
9345#ifdef CONFIG_FB_MSM_TVOUT
9346static struct regulator *reg_8058_l13;
9347
9348static int atv_dac_power(int on)
9349{
9350 int rc = 0;
9351 #define _GET_REGULATOR(var, name) do { \
9352 var = regulator_get(NULL, name); \
9353 if (IS_ERR(var)) { \
9354 pr_info("'%s' regulator not found, rc=%ld\n", \
9355 name, IS_ERR(var)); \
9356 var = NULL; \
9357 return -ENODEV; \
9358 } \
9359 } while (0)
9360
9361 if (!reg_8058_l13)
9362 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9363 #undef _GET_REGULATOR
9364
9365 if (on) {
9366 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9367 if (rc) {
9368 pr_info("%s: '%s' regulator set voltage failed,\
9369 rc=%d\n", __func__, "8058_l13", rc);
9370 return rc;
9371 }
9372
9373 rc = regulator_enable(reg_8058_l13);
9374 if (rc) {
9375 pr_err("%s: '%s' regulator enable failed,\
9376 rc=%d\n", __func__, "8058_l13", rc);
9377 return rc;
9378 }
9379 } else {
9380 rc = regulator_force_disable(reg_8058_l13);
9381 if (rc)
9382 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9383 __func__, "8058_l13", rc);
9384 }
9385 return rc;
9386
9387}
9388#endif
9389
9390#ifdef CONFIG_FB_MSM_MIPI_DSI
9391int mdp_core_clk_rate_table[] = {
9392 85330000,
9393 85330000,
9394 160000000,
9395 200000000,
9396};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009397#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9398int mdp_core_clk_rate_table[] = {
9399 200000000,
9400 200000000,
9401 200000000,
9402 200000000,
9403};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009404#else
9405int mdp_core_clk_rate_table[] = {
9406 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009407 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009408 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009409 200000000,
9410};
9411#endif
9412
9413static struct msm_panel_common_pdata mdp_pdata = {
9414 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009415#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9416 .mdp_core_clk_rate = 200000000,
9417#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009418 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009419#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009420 .mdp_core_clk_table = mdp_core_clk_rate_table,
9421 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9422#ifdef CONFIG_MSM_BUS_SCALING
9423 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9424#endif
9425 .mdp_rev = MDP_REV_41,
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07009426 .writeback_offset = writeback_offset,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009427};
9428
9429#ifdef CONFIG_FB_MSM_TVOUT
9430
9431#ifdef CONFIG_MSM_BUS_SCALING
9432static struct msm_bus_vectors atv_bus_init_vectors[] = {
9433 /* For now, 0th array entry is reserved.
9434 * Please leave 0 as is and don't use it
9435 */
9436 {
9437 .src = MSM_BUS_MASTER_MDP_PORT0,
9438 .dst = MSM_BUS_SLAVE_SMI,
9439 .ab = 0,
9440 .ib = 0,
9441 },
9442 /* Master and slaves can be from different fabrics */
9443 {
9444 .src = MSM_BUS_MASTER_MDP_PORT0,
9445 .dst = MSM_BUS_SLAVE_EBI_CH0,
9446 .ab = 0,
9447 .ib = 0,
9448 },
9449};
9450static struct msm_bus_vectors atv_bus_def_vectors[] = {
9451 /* For now, 0th array entry is reserved.
9452 * Please leave 0 as is and don't use it
9453 */
9454 {
9455 .src = MSM_BUS_MASTER_MDP_PORT0,
9456 .dst = MSM_BUS_SLAVE_SMI,
9457 .ab = 236390400,
9458 .ib = 265939200,
9459 },
9460 /* Master and slaves can be from different fabrics */
9461 {
9462 .src = MSM_BUS_MASTER_MDP_PORT0,
9463 .dst = MSM_BUS_SLAVE_EBI_CH0,
9464 .ab = 236390400,
9465 .ib = 265939200,
9466 },
9467};
9468static struct msm_bus_paths atv_bus_scale_usecases[] = {
9469 {
9470 ARRAY_SIZE(atv_bus_init_vectors),
9471 atv_bus_init_vectors,
9472 },
9473 {
9474 ARRAY_SIZE(atv_bus_def_vectors),
9475 atv_bus_def_vectors,
9476 },
9477};
9478static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9479 atv_bus_scale_usecases,
9480 ARRAY_SIZE(atv_bus_scale_usecases),
9481 .name = "atv",
9482};
9483#endif
9484
9485static struct tvenc_platform_data atv_pdata = {
9486 .poll = 0,
9487 .pm_vid_en = atv_dac_power,
9488#ifdef CONFIG_MSM_BUS_SCALING
9489 .bus_scale_table = &atv_bus_scale_pdata,
9490#endif
9491};
9492#endif
9493
9494static void __init msm_fb_add_devices(void)
9495{
9496#ifdef CONFIG_FB_MSM_LCDC_DSUB
9497 mdp_pdata.mdp_core_clk_table = NULL;
9498 mdp_pdata.num_mdp_clk = 0;
9499 mdp_pdata.mdp_core_clk_rate = 200000000;
9500#endif
9501 if (machine_is_msm8x60_rumi3())
9502 msm_fb_register_device("mdp", NULL);
9503 else
9504 msm_fb_register_device("mdp", &mdp_pdata);
9505
9506 msm_fb_register_device("lcdc", &lcdc_pdata);
9507 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9508#ifdef CONFIG_MSM_BUS_SCALING
9509 msm_fb_register_device("dtv", &dtv_pdata);
9510#endif
9511#ifdef CONFIG_FB_MSM_TVOUT
9512 msm_fb_register_device("tvenc", &atv_pdata);
9513 msm_fb_register_device("tvout_device", NULL);
9514#endif
9515}
9516
9517#if (defined(CONFIG_MARIMBA_CORE)) && \
9518 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9519
9520static const struct {
9521 char *name;
9522 int vmin;
9523 int vmax;
9524} bt_regs_info[] = {
9525 { "8058_s3", 1800000, 1800000 },
9526 { "8058_s2", 1300000, 1300000 },
9527 { "8058_l8", 2900000, 3050000 },
9528};
9529
9530static struct {
9531 bool enabled;
9532} bt_regs_status[] = {
9533 { false },
9534 { false },
9535 { false },
9536};
9537static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9538
9539static int bahama_bt(int on)
9540{
9541 int rc;
9542 int i;
9543 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9544
9545 struct bahama_variant_register {
9546 const size_t size;
9547 const struct bahama_config_register *set;
9548 };
9549
9550 const struct bahama_config_register *p;
9551
9552 u8 version;
9553
9554 const struct bahama_config_register v10_bt_on[] = {
9555 { 0xE9, 0x00, 0xFF },
9556 { 0xF4, 0x80, 0xFF },
9557 { 0xE4, 0x00, 0xFF },
9558 { 0xE5, 0x00, 0x0F },
9559#ifdef CONFIG_WLAN
9560 { 0xE6, 0x38, 0x7F },
9561 { 0xE7, 0x06, 0xFF },
9562#endif
9563 { 0xE9, 0x21, 0xFF },
9564 { 0x01, 0x0C, 0x1F },
9565 { 0x01, 0x08, 0x1F },
9566 };
9567
9568 const struct bahama_config_register v20_bt_on_fm_off[] = {
9569 { 0x11, 0x0C, 0xFF },
9570 { 0x13, 0x01, 0xFF },
9571 { 0xF4, 0x80, 0xFF },
9572 { 0xF0, 0x00, 0xFF },
9573 { 0xE9, 0x00, 0xFF },
9574#ifdef CONFIG_WLAN
9575 { 0x81, 0x00, 0x7F },
9576 { 0x82, 0x00, 0xFF },
9577 { 0xE6, 0x38, 0x7F },
9578 { 0xE7, 0x06, 0xFF },
9579#endif
9580 { 0xE9, 0x21, 0xFF },
9581 };
9582
9583 const struct bahama_config_register v20_bt_on_fm_on[] = {
9584 { 0x11, 0x0C, 0xFF },
9585 { 0x13, 0x01, 0xFF },
9586 { 0xF4, 0x86, 0xFF },
9587 { 0xF0, 0x06, 0xFF },
9588 { 0xE9, 0x00, 0xFF },
9589#ifdef CONFIG_WLAN
9590 { 0x81, 0x00, 0x7F },
9591 { 0x82, 0x00, 0xFF },
9592 { 0xE6, 0x38, 0x7F },
9593 { 0xE7, 0x06, 0xFF },
9594#endif
9595 { 0xE9, 0x21, 0xFF },
9596 };
9597
9598 const struct bahama_config_register v10_bt_off[] = {
9599 { 0xE9, 0x00, 0xFF },
9600 };
9601
9602 const struct bahama_config_register v20_bt_off_fm_off[] = {
9603 { 0xF4, 0x84, 0xFF },
9604 { 0xF0, 0x04, 0xFF },
9605 { 0xE9, 0x00, 0xFF }
9606 };
9607
9608 const struct bahama_config_register v20_bt_off_fm_on[] = {
9609 { 0xF4, 0x86, 0xFF },
9610 { 0xF0, 0x06, 0xFF },
9611 { 0xE9, 0x00, 0xFF }
9612 };
9613 const struct bahama_variant_register bt_bahama[2][3] = {
9614 {
9615 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9616 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9617 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9618 },
9619 {
9620 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9621 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9622 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9623 }
9624 };
9625
9626 u8 offset = 0; /* index into bahama configs */
9627
9628 on = on ? 1 : 0;
9629 version = read_bahama_ver();
9630
9631 if (version == VER_UNSUPPORTED) {
9632 dev_err(&msm_bt_power_device.dev,
9633 "%s: unsupported version\n",
9634 __func__);
9635 return -EIO;
9636 }
9637
9638 if (version == VER_2_0) {
9639 if (marimba_get_fm_status(&config))
9640 offset = 0x01;
9641 }
9642
9643 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9644 if (on && (version == VER_2_0)) {
9645 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9646 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9647 && (bt_regs_status[i].enabled == true)) {
9648 if (regulator_disable(bt_regs[i])) {
9649 dev_err(&msm_bt_power_device.dev,
9650 "%s: regulator disable failed",
9651 __func__);
9652 }
9653 bt_regs_status[i].enabled = false;
9654 break;
9655 }
9656 }
9657 }
9658
9659 p = bt_bahama[on][version + offset].set;
9660
9661 dev_info(&msm_bt_power_device.dev,
9662 "%s: found version %d\n", __func__, version);
9663
9664 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9665 u8 value = (p+i)->value;
9666 rc = marimba_write_bit_mask(&config,
9667 (p+i)->reg,
9668 &value,
9669 sizeof((p+i)->value),
9670 (p+i)->mask);
9671 if (rc < 0) {
9672 dev_err(&msm_bt_power_device.dev,
9673 "%s: reg %d write failed: %d\n",
9674 __func__, (p+i)->reg, rc);
9675 return rc;
9676 }
9677 dev_dbg(&msm_bt_power_device.dev,
9678 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9679 __func__, (p+i)->reg,
9680 value, (p+i)->mask);
9681 }
9682 /* Update BT Status */
9683 if (on)
9684 marimba_set_bt_status(&config, true);
9685 else
9686 marimba_set_bt_status(&config, false);
9687
9688 return 0;
9689}
9690
9691static int bluetooth_use_regulators(int on)
9692{
9693 int i, recover = -1, rc = 0;
9694
9695 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9696 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9697 bt_regs_info[i].name) :
9698 (regulator_put(bt_regs[i]), NULL);
9699 if (IS_ERR(bt_regs[i])) {
9700 rc = PTR_ERR(bt_regs[i]);
9701 dev_err(&msm_bt_power_device.dev,
9702 "regulator %s get failed (%d)\n",
9703 bt_regs_info[i].name, rc);
9704 recover = i - 1;
9705 bt_regs[i] = NULL;
9706 break;
9707 }
9708
9709 if (!on)
9710 continue;
9711
9712 rc = regulator_set_voltage(bt_regs[i],
9713 bt_regs_info[i].vmin,
9714 bt_regs_info[i].vmax);
9715 if (rc < 0) {
9716 dev_err(&msm_bt_power_device.dev,
9717 "regulator %s voltage set (%d)\n",
9718 bt_regs_info[i].name, rc);
9719 recover = i;
9720 break;
9721 }
9722 }
9723
9724 if (on && (recover > -1))
9725 for (i = recover; i >= 0; i--) {
9726 regulator_put(bt_regs[i]);
9727 bt_regs[i] = NULL;
9728 }
9729
9730 return rc;
9731}
9732
9733static int bluetooth_switch_regulators(int on)
9734{
9735 int i, rc = 0;
9736
9737 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9738 if (on && (bt_regs_status[i].enabled == false)) {
9739 rc = regulator_enable(bt_regs[i]);
9740 if (rc < 0) {
9741 dev_err(&msm_bt_power_device.dev,
9742 "regulator %s %s failed (%d)\n",
9743 bt_regs_info[i].name,
9744 "enable", rc);
9745 if (i > 0) {
9746 while (--i) {
9747 regulator_disable(bt_regs[i]);
9748 bt_regs_status[i].enabled
9749 = false;
9750 }
9751 break;
9752 }
9753 }
9754 bt_regs_status[i].enabled = true;
9755 } else if (!on && (bt_regs_status[i].enabled == true)) {
9756 rc = regulator_disable(bt_regs[i]);
9757 if (rc < 0) {
9758 dev_err(&msm_bt_power_device.dev,
9759 "regulator %s %s failed (%d)\n",
9760 bt_regs_info[i].name,
9761 "disable", rc);
9762 break;
9763 }
9764 bt_regs_status[i].enabled = false;
9765 }
9766 }
9767 return rc;
9768}
9769
9770static struct msm_xo_voter *bt_clock;
9771
9772static int bluetooth_power(int on)
9773{
9774 int rc = 0;
9775 int id;
9776
9777 /* In case probe function fails, cur_connv_type would be -1 */
9778 id = adie_get_detected_connectivity_type();
9779 if (id != BAHAMA_ID) {
9780 pr_err("%s: unexpected adie connectivity type: %d\n",
9781 __func__, id);
9782 return -ENODEV;
9783 }
9784
9785 if (on) {
9786
9787 rc = bluetooth_use_regulators(1);
9788 if (rc < 0)
9789 goto out;
9790
9791 rc = bluetooth_switch_regulators(1);
9792
9793 if (rc < 0)
9794 goto fail_put;
9795
9796 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9797
9798 if (IS_ERR(bt_clock)) {
9799 pr_err("Couldn't get TCXO_D0 voter\n");
9800 goto fail_switch;
9801 }
9802
9803 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9804
9805 if (rc < 0) {
9806 pr_err("Failed to vote for TCXO_DO ON\n");
9807 goto fail_vote;
9808 }
9809
9810 rc = bahama_bt(1);
9811
9812 if (rc < 0)
9813 goto fail_clock;
9814
9815 msleep(10);
9816
9817 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9818
9819 if (rc < 0) {
9820 pr_err("Failed to vote for TCXO_DO pin control\n");
9821 goto fail_vote;
9822 }
9823 } else {
9824 /* check for initial RFKILL block (power off) */
9825 /* some RFKILL versions/configurations rfkill_register */
9826 /* calls here for an initial set_block */
9827 /* avoid calling i2c and regulator before unblock (on) */
9828 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9829 dev_info(&msm_bt_power_device.dev,
9830 "%s: initialized OFF/blocked\n", __func__);
9831 goto out;
9832 }
9833
9834 bahama_bt(0);
9835
9836fail_clock:
9837 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9838fail_vote:
9839 msm_xo_put(bt_clock);
9840fail_switch:
9841 bluetooth_switch_regulators(0);
9842fail_put:
9843 bluetooth_use_regulators(0);
9844 }
9845
9846out:
9847 if (rc < 0)
9848 on = 0;
9849 dev_info(&msm_bt_power_device.dev,
9850 "Bluetooth power switch: state %d result %d\n", on, rc);
9851
9852 return rc;
9853}
9854
9855#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9856
9857static void __init msm8x60_cfg_smsc911x(void)
9858{
9859 smsc911x_resources[1].start =
9860 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9861 smsc911x_resources[1].end =
9862 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9863}
9864
9865#ifdef CONFIG_MSM_RPM
9866static struct msm_rpm_platform_data msm_rpm_data = {
9867 .reg_base_addrs = {
9868 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9869 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9870 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9871 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9872 },
9873
9874 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9875 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9876 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9877 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9878 .msm_apps_ipc_rpm_val = 4,
9879};
9880#endif
9881
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009882void msm_fusion_setup_pinctrl(void)
9883{
9884 struct msm_xo_voter *a1;
9885
9886 if (socinfo_get_platform_subtype() == 0x3) {
9887 /*
9888 * Vote for the A1 clock to be in pin control mode before
9889 * the external images are loaded.
9890 */
9891 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9892 BUG_ON(!a1);
9893 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9894 }
9895}
9896
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009897struct msm_board_data {
9898 struct msm_gpiomux_configs *gpiomux_cfgs;
9899};
9900
9901static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9902 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9903};
9904
9905static struct msm_board_data msm8x60_sim_board_data __initdata = {
9906 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9907};
9908
9909static struct msm_board_data msm8x60_surf_board_data __initdata = {
9910 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9911};
9912
9913static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9914 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9915};
9916
9917static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9918 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9919};
9920
9921static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9922 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9923};
9924
9925static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9926 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9927};
9928
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009929static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9930 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9931};
9932
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009933static void __init msm8x60_init(struct msm_board_data *board_data)
9934{
9935 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309936#ifdef CONFIG_USB_EHCI_MSM_72K
9937 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9938 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9939 .level = PM8901_MPP_DIG_LEVEL_L5,
9940 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9941 };
9942#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309943 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009944
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009945 /*
9946 * Initialize RPM first as other drivers and devices may need
9947 * it for their initialization.
9948 */
9949#ifdef CONFIG_MSM_RPM
9950 BUG_ON(msm_rpm_init(&msm_rpm_data));
9951#endif
9952 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9953 ARRAY_SIZE(msm_rpmrs_levels)));
9954 if (msm_xo_init())
9955 pr_err("Failed to initialize XO votes\n");
9956
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009957 msm8x60_check_2d_hardware();
9958
9959 /* Change SPM handling of core 1 if PMM 8160 is present. */
9960 soc_platform_version = socinfo_get_platform_version();
9961 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9962 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9963 struct msm_spm_platform_data *spm_data;
9964
9965 spm_data = &msm_spm_data_v1[1];
9966 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9967 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9968
9969 spm_data = &msm_spm_data[1];
9970 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9971 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9972 }
9973
9974 /*
9975 * Initialize SPM before acpuclock as the latter calls into SPM
9976 * driver to set ACPU voltages.
9977 */
9978 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9979 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9980 else
9981 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9982
9983 /*
9984 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
9985 * devices so that the RPM doesn't drop into a low power mode that an
9986 * un-reworked SURF cannot resume from.
9987 */
9988 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -07009989 int i;
9990
9991 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
9992 if (rpm_regulator_init_data[i].id
9993 == RPM_VREG_ID_PM8901_L4
9994 || rpm_regulator_init_data[i].id
9995 == RPM_VREG_ID_PM8901_L6)
9996 rpm_regulator_init_data[i]
9997 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009998 }
9999
10000 /*
10001 * Disable regulator info printing so that regulator registration
10002 * messages do not enter the kmsg log.
10003 */
10004 regulator_suppress_info_printing();
10005
10006 /* Initialize regulators needed for clock_init. */
10007 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10008
Stephen Boydbb600ae2011-08-02 20:11:40 -070010009 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010010
10011 /* Buses need to be initialized before early-device registration
10012 * to get the platform data for fabrics.
10013 */
10014 msm8x60_init_buses();
10015 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10016 /* CPU frequency control is not supported on simulated targets. */
10017 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010018 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010019
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010020 /*
10021 * Enable EBI2 only for boards which make use of it. Leave
10022 * it disabled for all others for additional power savings.
10023 */
10024 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10025 machine_is_msm8x60_rumi3() ||
10026 machine_is_msm8x60_sim() ||
10027 machine_is_msm8x60_fluid() ||
10028 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010029 msm8x60_init_ebi2();
10030 msm8x60_init_tlmm();
10031 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10032 msm8x60_init_uart12dm();
10033 msm8x60_init_mmc();
10034
10035#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10036 msm8x60_init_pm8058_othc();
10037#endif
10038
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010039 if (machine_is_msm8x60_fluid())
10040 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10041 else if (machine_is_msm8x60_dragon())
10042 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10043 else
10044 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010045
Jilai Wang53d27a82011-07-13 14:32:58 -040010046 /* Specify reset pin for OV9726 */
10047 if (machine_is_msm8x60_dragon()) {
10048 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10049 ov9726_sensor_8660_info.mount_angle = 270;
10050 }
10051
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010052#ifdef CONFIG_BATTERY_MSM8X60
10053 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10054 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10055 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10056 platform_device_register(&msm_charger_device);
10057#endif
10058
10059 if (machine_is_msm8x60_dragon())
10060 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10061 if (!machine_is_msm8x60_fluid())
10062 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10063
10064 /* configure pmic leds */
10065 if (machine_is_msm8x60_fluid())
10066 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10067 else if (machine_is_msm8x60_dragon())
10068 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10069 else
10070 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10071
10072 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10073 machine_is_msm8x60_dragon()) {
10074 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10075 }
10076
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010077 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10078 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010079 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010080 msm8x60_cfg_smsc911x();
10081 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10082 platform_add_devices(msm_footswitch_devices,
10083 msm_num_footswitch_devices);
10084 platform_add_devices(surf_devices,
10085 ARRAY_SIZE(surf_devices));
10086
10087#ifdef CONFIG_MSM_DSPS
10088 if (machine_is_msm8x60_fluid()) {
10089 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10090 msm8x60_init_dsps();
10091 }
10092#endif
10093
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010094 pm8901_vreg_mpp0_init();
10095
10096 platform_device_register(&msm8x60_8901_mpp_vreg);
10097
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010098#ifdef CONFIG_USB_EHCI_MSM_72K
10099 /*
10100 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10101 * fluid
10102 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010103 if (machine_is_msm8x60_fluid())
10104 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10105 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010106#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010107
10108#ifdef CONFIG_SND_SOC_MSM8660_APQ
10109 if (machine_is_msm8x60_dragon())
10110 platform_add_devices(dragon_alsa_devices,
10111 ARRAY_SIZE(dragon_alsa_devices));
10112 else
10113#endif
10114 platform_add_devices(asoc_devices,
10115 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010116 } else {
10117 msm8x60_configure_smc91x();
10118 platform_add_devices(rumi_sim_devices,
10119 ARRAY_SIZE(rumi_sim_devices));
10120 }
10121#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010122 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10123 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010124 msm8x60_cfg_isp1763();
10125#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010126
10127 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10128 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10129
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010130
10131#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10132 if (machine_is_msm8x60_fluid())
10133 platform_device_register(&msm_gsbi10_qup_spi_device);
10134 else
10135 platform_device_register(&msm_gsbi1_qup_spi_device);
10136#endif
10137
10138#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10139 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10140 if (machine_is_msm8x60_fluid())
10141 cyttsp_set_params();
10142#endif
10143 if (!machine_is_msm8x60_sim())
10144 msm_fb_add_devices();
10145 fixup_i2c_configs();
10146 register_i2c_devices();
10147
Terence Hampson1c73fef2011-07-19 17:10:49 -040010148 if (machine_is_msm8x60_dragon())
10149 smsc911x_config.reset_gpio
10150 = GPIO_ETHERNET_RESET_N_DRAGON;
10151
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010152 platform_device_register(&smsc911x_device);
10153
10154#if (defined(CONFIG_SPI_QUP)) && \
10155 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010156 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10157 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010158
10159 if (machine_is_msm8x60_fluid()) {
10160#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10161 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10162 spi_register_board_info(lcdc_samsung_spi_board_info,
10163 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10164 } else
10165#endif
10166 {
10167#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10168 spi_register_board_info(lcdc_auo_spi_board_info,
10169 ARRAY_SIZE(lcdc_auo_spi_board_info));
10170#endif
10171 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010172#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10173 } else if (machine_is_msm8x60_dragon()) {
10174 spi_register_board_info(lcdc_nt35582_spi_board_info,
10175 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10176#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010177 }
10178#endif
10179
10180 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10181 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10182 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10183 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010184 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010185
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010186 pm8058_gpios_init();
10187
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010188#ifdef CONFIG_SENSORS_MSM_ADC
10189 if (machine_is_msm8x60_fluid()) {
10190 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10191 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10192 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10193 msm_adc_pdata.gpio_config = APROC_CONFIG;
10194 else
10195 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10196 }
10197 msm_adc_pdata.target_hw = MSM_8x60;
10198#endif
10199#ifdef CONFIG_MSM8X60_AUDIO
10200 msm_snddev_init();
10201#endif
10202#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10203 if (machine_is_msm8x60_fluid())
10204 platform_device_register(&fluid_leds_gpio);
10205 else
10206 platform_device_register(&gpio_leds);
10207#endif
10208
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010209 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010210
10211 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10212 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010213}
10214
10215static void __init msm8x60_rumi3_init(void)
10216{
10217 msm8x60_init(&msm8x60_rumi3_board_data);
10218}
10219
10220static void __init msm8x60_sim_init(void)
10221{
10222 msm8x60_init(&msm8x60_sim_board_data);
10223}
10224
10225static void __init msm8x60_surf_init(void)
10226{
10227 msm8x60_init(&msm8x60_surf_board_data);
10228}
10229
10230static void __init msm8x60_ffa_init(void)
10231{
10232 msm8x60_init(&msm8x60_ffa_board_data);
10233}
10234
10235static void __init msm8x60_fluid_init(void)
10236{
10237 msm8x60_init(&msm8x60_fluid_board_data);
10238}
10239
10240static void __init msm8x60_charm_surf_init(void)
10241{
10242 msm8x60_init(&msm8x60_charm_surf_board_data);
10243}
10244
10245static void __init msm8x60_charm_ffa_init(void)
10246{
10247 msm8x60_init(&msm8x60_charm_ffa_board_data);
10248}
10249
10250static void __init msm8x60_charm_init_early(void)
10251{
10252 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010253}
10254
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010255static void __init msm8x60_dragon_init(void)
10256{
10257 msm8x60_init(&msm8x60_dragon_board_data);
10258}
10259
Steve Mucklea55df6e2010-01-07 12:43:24 -080010260MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10261 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010262 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010263 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010264 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010265 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010266 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010267MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010268
10269MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10270 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010271 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010272 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010273 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010274 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010275 .init_early = msm8x60_charm_init_early,
10276MACHINE_END
10277
10278MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10279 .map_io = msm8x60_map_io,
10280 .reserve = msm8x60_reserve,
10281 .init_irq = msm8x60_init_irq,
10282 .init_machine = msm8x60_surf_init,
10283 .timer = &msm_timer,
10284 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010285MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010286
10287MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10288 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010289 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010290 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010291 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010292 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010293 .init_early = msm8x60_charm_init_early,
10294MACHINE_END
10295
10296MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10297 .map_io = msm8x60_map_io,
10298 .reserve = msm8x60_reserve,
10299 .init_irq = msm8x60_init_irq,
10300 .init_machine = msm8x60_fluid_init,
10301 .timer = &msm_timer,
10302 .init_early = msm8x60_charm_init_early,
10303MACHINE_END
10304
10305MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10306 .map_io = msm8x60_map_io,
10307 .reserve = msm8x60_reserve,
10308 .init_irq = msm8x60_init_irq,
10309 .init_machine = msm8x60_charm_surf_init,
10310 .timer = &msm_timer,
10311 .init_early = msm8x60_charm_init_early,
10312MACHINE_END
10313
10314MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10315 .map_io = msm8x60_map_io,
10316 .reserve = msm8x60_reserve,
10317 .init_irq = msm8x60_init_irq,
10318 .init_machine = msm8x60_charm_ffa_init,
10319 .timer = &msm_timer,
10320 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010321MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010322
10323MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10324 .map_io = msm8x60_map_io,
10325 .reserve = msm8x60_reserve,
10326 .init_irq = msm8x60_init_irq,
10327 .init_machine = msm8x60_dragon_init,
10328 .timer = &msm_timer,
10329 .init_early = msm8x60_charm_init_early,
10330MACHINE_END