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Jeyaprakash Soundrapandian2474e8f2012-01-03 15:59:57 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#ifndef __ASM__ARCH_CAMERA_H
15#define __ASM__ARCH_CAMERA_H
16
17#include <linux/list.h>
18#include <linux/poll.h>
19#include <linux/cdev.h>
20#include <linux/platform_device.h>
21#include <linux/wakelock.h>
Kevin Chaneb6b6072012-01-17 11:54:54 -080022#include <linux/regulator/consumer.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include "linux/types.h"
24
25#include <mach/board.h>
26#include <media/msm_camera.h>
Ankit Premrajka748a70a2011-11-01 08:22:04 -070027#include <linux/ion.h>
Laura Abbott5b1e6f12012-05-28 08:13:55 -070028#include <mach/iommu_domains.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070029
30#define CONFIG_MSM_CAMERA_DEBUG
31#ifdef CONFIG_MSM_CAMERA_DEBUG
32#define CDBG(fmt, args...) pr_debug(fmt, ##args)
33#else
34#define CDBG(fmt, args...) do { } while (0)
35#endif
36
37#define PAD_TO_2K(a, b) ((!b) ? a : (((a)+2047) & ~2047))
38
39#define MSM_CAMERA_MSG 0
40#define MSM_CAMERA_EVT 1
41#define NUM_WB_EXP_NEUTRAL_REGION_LINES 4
42#define NUM_WB_EXP_STAT_OUTPUT_BUFFERS 3
43#define NUM_AUTOFOCUS_MULTI_WINDOW_GRIDS 16
44#define NUM_STAT_OUTPUT_BUFFERS 3
45#define NUM_AF_STAT_OUTPUT_BUFFERS 3
Mingcheng Zhu996be182011-10-16 16:04:23 -070046#define max_control_command_size 512
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070047#define CROP_LEN 36
48
49enum vfe_mode_of_operation{
50 VFE_MODE_OF_OPERATION_CONTINUOUS,
51 VFE_MODE_OF_OPERATION_SNAPSHOT,
52 VFE_MODE_OF_OPERATION_VIDEO,
53 VFE_MODE_OF_OPERATION_RAW_SNAPSHOT,
54 VFE_MODE_OF_OPERATION_ZSL,
Jignesh Mehta6cf8a742012-02-04 23:40:50 -080055 VFE_MODE_OF_OPERATION_JPEG_SNAPSHOT,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070056 VFE_LAST_MODE_OF_OPERATION_ENUM
57};
58
59enum msm_queue {
60 MSM_CAM_Q_CTRL, /* control command or control command status */
61 MSM_CAM_Q_VFE_EVT, /* adsp event */
62 MSM_CAM_Q_VFE_MSG, /* adsp message */
63 MSM_CAM_Q_V4L2_REQ, /* v4l2 request */
64 MSM_CAM_Q_VPE_MSG, /* vpe message */
65 MSM_CAM_Q_PP_MSG, /* pp message */
66};
67
68enum vfe_resp_msg {
69 VFE_EVENT,
70 VFE_MSG_GENERAL,
71 VFE_MSG_SNAPSHOT,
72 VFE_MSG_OUTPUT_P, /* preview (continuous mode ) */
73 VFE_MSG_OUTPUT_T, /* thumbnail (snapshot mode )*/
74 VFE_MSG_OUTPUT_S, /* main image (snapshot mode )*/
75 VFE_MSG_OUTPUT_V, /* video (continuous mode ) */
76 VFE_MSG_STATS_AEC,
77 VFE_MSG_STATS_AF,
78 VFE_MSG_STATS_AWB,
Kiran Kumar H Ndd128472011-12-01 09:35:34 -080079 VFE_MSG_STATS_RS, /* 10 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070080 VFE_MSG_STATS_CS,
81 VFE_MSG_STATS_IHIST,
82 VFE_MSG_STATS_SKIN,
83 VFE_MSG_STATS_WE, /* AEC + AWB */
84 VFE_MSG_SYNC_TIMER0,
85 VFE_MSG_SYNC_TIMER1,
86 VFE_MSG_SYNC_TIMER2,
87 VFE_MSG_COMMON,
Kiran Kumar H N0fb9dcf2011-07-17 12:31:53 -070088 VFE_MSG_V32_START,
Kiran Kumar H Ndd128472011-12-01 09:35:34 -080089 VFE_MSG_V32_START_RECORDING, /* 20 */
Kiran Kumar H N0fb9dcf2011-07-17 12:31:53 -070090 VFE_MSG_V32_CAPTURE,
Jignesh Mehta6cf8a742012-02-04 23:40:50 -080091 VFE_MSG_V32_JPEG_CAPTURE,
Kiran Kumar H N0fb9dcf2011-07-17 12:31:53 -070092 VFE_MSG_OUTPUT_IRQ,
Suresh Vankadara055cb8e2012-01-18 00:50:04 +053093 VFE_MSG_V2X_PREVIEW,
94 VFE_MSG_V2X_CAPTURE,
Kiran Kumar H Ndd128472011-12-01 09:35:34 -080095 VFE_MSG_OUTPUT_PRIMARY,
96 VFE_MSG_OUTPUT_SECONDARY,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097};
98
99enum vpe_resp_msg {
100 VPE_MSG_GENERAL,
101 VPE_MSG_OUTPUT_V, /* video (continuous mode ) */
102 VPE_MSG_OUTPUT_ST_L,
103 VPE_MSG_OUTPUT_ST_R,
104};
105
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700106enum msm_stereo_state {
107 STEREO_VIDEO_IDLE,
108 STEREO_VIDEO_ACTIVE,
109 STEREO_SNAP_IDLE,
110 STEREO_SNAP_STARTED,
111 STEREO_SNAP_BUFFER1_PROCESSING,
112 STEREO_SNAP_BUFFER2_PROCESSING,
113 STEREO_RAW_SNAP_IDLE,
114 STEREO_RAW_SNAP_STARTED,
115};
116
117enum msm_ispif_intftype {
118 PIX0,
119 RDI0,
120 PIX1,
121 RDI1,
122 PIX2,
123 RDI2,
124};
125
126enum msm_ispif_vc {
127 VC0,
128 VC1,
129 VC2,
130 VC3,
131};
132
133enum msm_ispif_cid {
134 CID0,
135 CID1,
136 CID2,
137 CID3,
138 CID4,
139 CID5,
140 CID6,
141 CID7,
142 CID8,
143 CID9,
144 CID10,
145 CID11,
146 CID12,
147 CID13,
148 CID14,
149 CID15,
150};
151
152struct msm_ispif_params {
153 uint8_t intftype;
154 uint16_t cid_mask;
155 uint8_t csid;
156};
Shuzhen Wanga3c1a122011-08-04 15:33:27 -0700157
158struct msm_ispif_params_list {
159 uint32_t len;
160 struct msm_ispif_params params[3];
161};
162
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700163struct msm_vpe_phy_info {
164 uint32_t sbuf_phy;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530165 uint32_t planar0_off;
166 uint32_t planar1_off;
167 uint32_t planar2_off;
168 uint32_t p0_phy;
169 uint32_t p1_phy;
170 uint32_t p2_phy;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700171 uint8_t output_id; /* VFE31_OUTPUT_MODE_PT/S/V */
172 uint32_t frame_id;
173};
174
175struct msm_camera_csid_vc_cfg {
176 uint8_t cid;
177 uint8_t dt;
178 uint8_t decode_format;
179};
180
181struct msm_camera_csid_lut_params {
182 uint8_t num_cid;
183 struct msm_camera_csid_vc_cfg *vc_cfg;
184};
185
186struct msm_camera_csid_params {
187 uint8_t lane_cnt;
188 uint8_t lane_assign;
189 struct msm_camera_csid_lut_params lut_params;
190};
191
192struct msm_camera_csiphy_params {
193 uint8_t lane_cnt;
194 uint8_t settle_cnt;
Hody Hung9ba65cf2012-01-17 17:34:51 -0800195 uint8_t lane_mask;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700196};
197
Kevin Chana980f392011-08-01 20:55:00 -0700198struct msm_camera_csi2_params {
199 struct msm_camera_csid_params csid_params;
200 struct msm_camera_csiphy_params csiphy_params;
201};
202
Kevin Chan3be11612012-03-22 20:05:40 -0700203#ifndef CONFIG_MSM_CAMERA_V4L2
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700204#define VFE31_OUTPUT_MODE_PT (0x1 << 0)
205#define VFE31_OUTPUT_MODE_S (0x1 << 1)
206#define VFE31_OUTPUT_MODE_V (0x1 << 2)
207#define VFE31_OUTPUT_MODE_P (0x1 << 3)
208#define VFE31_OUTPUT_MODE_T (0x1 << 4)
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530209#define VFE31_OUTPUT_MODE_P_ALL_CHNLS (0x1 << 5)
Kevin Chan3be11612012-03-22 20:05:40 -0700210#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700211
212#define CSI_EMBED_DATA 0x12
Hody Hungdf045322012-04-10 16:52:46 -0700213#define CSI_RESERVED_DATA_0 0x13
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800214#define CSI_YUV422_8 0x1E
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700215#define CSI_RAW8 0x2A
216#define CSI_RAW10 0x2B
217#define CSI_RAW12 0x2C
218
219#define CSI_DECODE_6BIT 0
220#define CSI_DECODE_8BIT 1
221#define CSI_DECODE_10BIT 2
Sreesudhan Ramakrish Ramkumar8f11b8b2012-01-04 17:09:05 -0800222#define CSI_DECODE_DPCM_10_8_10 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700223
224struct msm_vfe_phy_info {
225 uint32_t sbuf_phy;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530226 uint32_t planar0_off;
227 uint32_t planar1_off;
228 uint32_t planar2_off;
229 uint32_t p0_phy;
230 uint32_t p1_phy;
231 uint32_t p2_phy;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700232 uint8_t output_id; /* VFE31_OUTPUT_MODE_PT/S/V */
233 uint32_t frame_id;
234};
235
236struct msm_vfe_stats_msg {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700237 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238 uint32_t aec_buff;
239 uint32_t awb_buff;
240 uint32_t af_buff;
241 uint32_t ihist_buff;
242 uint32_t rs_buff;
243 uint32_t cs_buff;
244 uint32_t skin_buff;
245 uint32_t status_bits;
246 uint32_t frame_id;
247};
248
249struct video_crop_t{
250 uint32_t in1_w;
251 uint32_t out1_w;
252 uint32_t in1_h;
253 uint32_t out1_h;
254 uint32_t in2_w;
255 uint32_t out2_w;
256 uint32_t in2_h;
257 uint32_t out2_h;
258 uint8_t update_flag;
259};
260
261struct msm_vpe_buf_info {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530262 uint32_t p0_phy;
263 uint32_t p1_phy;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700264 struct timespec ts;
265 uint32_t frame_id;
266 struct video_crop_t vpe_crop;
267};
268
269struct msm_vfe_resp {
270 enum vfe_resp_msg type;
271 struct msm_cam_evt_msg evt_msg;
272 struct msm_vfe_phy_info phy;
273 struct msm_vfe_stats_msg stats_msg;
274 struct msm_vpe_buf_info vpe_bf;
275 void *extdata;
276 int32_t extlen;
277};
278
279struct msm_vpe_resp {
280 enum vpe_resp_msg type;
281 struct msm_cam_evt_msg evt_msg;
282 struct msm_vpe_phy_info phy;
283 void *extdata;
284 int32_t extlen;
285};
286
287struct msm_vpe_callback {
288 void (*vpe_resp)(struct msm_vpe_resp *,
289 enum msm_queue, void *syncdata,
290 void *time_stamp, gfp_t gfp);
291 void* (*vpe_alloc)(int, void *syncdata, gfp_t gfp);
292 void (*vpe_free)(void *ptr);
293};
294
295struct msm_vfe_callback {
296 void (*vfe_resp)(struct msm_vfe_resp *,
297 enum msm_queue, void *syncdata,
298 gfp_t gfp);
299 void* (*vfe_alloc)(int, void *syncdata, gfp_t gfp);
300 void (*vfe_free)(void *ptr);
301};
302
303struct msm_camvfe_fn {
304 int (*vfe_init)(struct msm_vfe_callback *,
305 struct platform_device *);
306 int (*vfe_enable)(struct camera_enable_cmd *);
307 int (*vfe_config)(struct msm_vfe_cfg_cmd *, void *);
308 int (*vfe_disable)(struct camera_enable_cmd *,
309 struct platform_device *dev);
310 void (*vfe_release)(struct platform_device *);
311 void (*vfe_stop)(void);
312};
313
314struct msm_camvfe_params {
315 struct msm_vfe_cfg_cmd *vfe_cfg;
316 void *data;
317};
318
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700319struct msm_mctl_pp_params {
320 struct msm_mctl_pp_cmd *cmd;
321 void *data;
322};
323
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324struct msm_camvpe_fn {
325 int (*vpe_reg)(struct msm_vpe_callback *);
326 int (*vpe_cfg_update) (void *);
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530327 void (*send_frame_to_vpe) (uint32_t planar0_off, uint32_t planar1_off,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700328 struct timespec *ts, int output_id);
329 int (*vpe_config)(struct msm_vpe_cfg_cmd *, void *);
330 void (*vpe_cfg_offset)(int frame_pack, uint32_t pyaddr,
331 uint32_t pcbcraddr, struct timespec *ts, int output_id,
332 struct msm_st_half st_half, int frameid);
333 int *dis;
334};
335
336struct msm_sensor_ctrl {
337 int (*s_init)(const struct msm_camera_sensor_info *);
338 int (*s_release)(void);
339 int (*s_config)(void __user *);
340 enum msm_camera_type s_camera_type;
341 uint32_t s_mount_angle;
342 enum msm_st_frame_packing s_video_packing;
343 enum msm_st_frame_packing s_snap_packing;
344};
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700345
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700346struct msm_strobe_flash_ctrl {
347 int (*strobe_flash_init)
348 (struct msm_camera_sensor_strobe_flash_data *);
349 int (*strobe_flash_release)
350 (struct msm_camera_sensor_strobe_flash_data *, int32_t);
351 int (*strobe_flash_charge)(int32_t, int32_t, uint32_t);
352};
353
354/* this structure is used in kernel */
355struct msm_queue_cmd {
356 struct list_head list_config;
357 struct list_head list_control;
358 struct list_head list_frame;
359 struct list_head list_pict;
360 struct list_head list_vpe_frame;
Kevin Chan94b4c832012-03-02 21:27:16 -0800361 struct list_head list_eventdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700362 enum msm_queue type;
363 void *command;
364 atomic_t on_heap;
365 struct timespec ts;
366 uint32_t error_code;
367};
368
369struct msm_device_queue {
370 struct list_head list;
371 spinlock_t lock;
372 wait_queue_head_t wait;
373 int max;
374 int len;
375 const char *name;
376};
377
Kevin Chan047053e2012-04-19 11:30:33 -0700378struct msm_mctl_stats_t {
379 struct hlist_head pmem_stats_list;
380 spinlock_t pmem_stats_spinlock;
381};
382
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700383struct msm_sync {
384 /* These two queues are accessed from a process context only
385 * They contain pmem descriptors for the preview frames and the stats
386 * coming from the camera sensor.
387 */
388 struct hlist_head pmem_frames;
389 struct hlist_head pmem_stats;
390
391 /* The message queue is used by the control thread to send commands
392 * to the config thread, and also by the DSP to send messages to the
393 * config thread. Thus it is the only queue that is accessed from
394 * both interrupt and process context.
395 */
396 struct msm_device_queue event_q;
397
398 /* This queue contains preview frames. It is accessed by the DSP (in
399 * in interrupt context, and by the frame thread.
400 */
401 struct msm_device_queue frame_q;
402 int unblock_poll_frame;
403 int unblock_poll_pic_frame;
404
405 /* This queue contains snapshot frames. It is accessed by the DSP (in
406 * interrupt context, and by the control thread.
407 */
408 struct msm_device_queue pict_q;
409 int get_pic_abort;
410 struct msm_device_queue vpe_q;
411
412 struct msm_camera_sensor_info *sdata;
413 struct msm_camvfe_fn vfefn;
414 struct msm_camvpe_fn vpefn;
415 struct msm_sensor_ctrl sctrl;
416 struct msm_strobe_flash_ctrl sfctrl;
417 struct wake_lock wake_lock;
418 struct platform_device *pdev;
419 int16_t ignore_qcmd_type;
420 uint8_t ignore_qcmd;
421 uint8_t opencnt;
422 void *cropinfo;
423 int croplen;
424 int core_powered_on;
425
426 struct fd_roi_info fdroiinfo;
427
428 atomic_t vpe_enable;
429 uint32_t pp_mask;
430 uint8_t pp_frame_avail;
431 struct msm_queue_cmd *pp_prev;
432 struct msm_queue_cmd *pp_snap;
433 struct msm_queue_cmd *pp_thumb;
434 int video_fd;
435
436 const char *apps_id;
437
438 struct mutex lock;
439 struct list_head list;
440 uint8_t liveshot_enabled;
441 struct msm_cam_v4l2_device *pcam_sync;
442
443 uint8_t stereocam_enabled;
444 struct msm_queue_cmd *pp_stereocam;
445 struct msm_queue_cmd *pp_stereocam2;
446 struct msm_queue_cmd *pp_stereosnap;
447 enum msm_stereo_state stereo_state;
448 int stcam_quality_ind;
449 uint32_t stcam_conv_value;
450
451 spinlock_t pmem_frame_spinlock;
452 spinlock_t pmem_stats_spinlock;
453 spinlock_t abort_pict_lock;
454 int snap_count;
455 int thumb_count;
456};
457
458#define MSM_APPS_ID_V4L2 "msm_v4l2"
459#define MSM_APPS_ID_PROP "msm_qct"
460
461struct msm_cam_device {
462 struct msm_sync *sync; /* most-frequently accessed */
463 struct device *device;
464 struct cdev cdev;
465 /* opened is meaningful only for the config and frame nodes,
466 * which may be opened only once.
467 */
468 atomic_t opened;
469};
470
471struct msm_control_device {
472 struct msm_cam_device *pmsm;
473
474 /* Used for MSM_CAM_IOCTL_CTRL_CMD_DONE responses */
475 uint8_t ctrl_data[max_control_command_size];
476 struct msm_ctrl_cmd ctrl;
477 struct msm_queue_cmd qcmd;
478
479 /* This queue used by the config thread to send responses back to the
480 * control thread. It is accessed only from a process context.
481 */
482 struct msm_device_queue ctrl_q;
483};
484
485struct register_address_value_pair {
486 uint16_t register_address;
487 uint16_t register_value;
488};
489
490struct msm_pmem_region {
491 struct hlist_node list;
492 unsigned long paddr;
493 unsigned long len;
494 struct file *file;
495 struct msm_pmem_info info;
Ankit Premrajka748a70a2011-11-01 08:22:04 -0700496 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700497};
498
499struct axidata {
500 uint32_t bufnum1;
501 uint32_t bufnum2;
502 uint32_t bufnum3;
503 struct msm_pmem_region *region;
504};
505
506#ifdef CONFIG_MSM_CAMERA_FLASH
507int msm_camera_flash_set_led_state(
508 struct msm_camera_sensor_flash_data *fdata,
509 unsigned led_state);
510int msm_strobe_flash_init(struct msm_sync *sync, uint32_t sftype);
511int msm_flash_ctrl(struct msm_camera_sensor_info *sdata,
512 struct flash_ctrl_data *flash_info);
513#else
514static inline int msm_camera_flash_set_led_state(
515 struct msm_camera_sensor_flash_data *fdata,
516 unsigned led_state)
517{
518 return -ENOTSUPP;
519}
520static inline int msm_strobe_flash_init(
521 struct msm_sync *sync, uint32_t sftype)
522{
523 return -ENOTSUPP;
524}
525static inline int msm_flash_ctrl(
526 struct msm_camera_sensor_info *sdata,
527 struct flash_ctrl_data *flash_info)
528{
529 return -ENOTSUPP;
530}
531#endif
532
533
534
535void msm_camvfe_init(void);
536int msm_camvfe_check(void *);
537void msm_camvfe_fn_init(struct msm_camvfe_fn *, void *);
538void msm_camvpe_fn_init(struct msm_camvpe_fn *, void *);
539int msm_camera_drv_start(struct platform_device *dev,
540 int (*sensor_probe)(const struct msm_camera_sensor_info *,
541 struct msm_sensor_ctrl *));
542
543enum msm_camio_clk_type {
544 CAMIO_VFE_MDC_CLK,
545 CAMIO_MDC_CLK,
546 CAMIO_VFE_CLK,
547 CAMIO_VFE_AXI_CLK,
548
549 CAMIO_VFE_CAMIF_CLK,
550 CAMIO_VFE_PBDG_CLK,
551 CAMIO_CAM_MCLK_CLK,
552 CAMIO_CAMIF_PAD_PBDG_CLK,
553
554 CAMIO_CSI0_VFE_CLK,
555 CAMIO_CSI1_VFE_CLK,
556 CAMIO_VFE_PCLK,
557
558 CAMIO_CSI_SRC_CLK,
559 CAMIO_CSI0_CLK,
560 CAMIO_CSI1_CLK,
561 CAMIO_CSI0_PCLK,
562 CAMIO_CSI1_PCLK,
563
564 CAMIO_CSI1_SRC_CLK,
565 CAMIO_CSI_PIX_CLK,
Sreesudhan Ramakrish Ramkumard6e9cb92011-10-12 17:55:18 -0700566 CAMIO_CSI_PIX1_CLK,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700567 CAMIO_CSI_RDI_CLK,
Sreesudhan Ramakrish Ramkumard6e9cb92011-10-12 17:55:18 -0700568 CAMIO_CSI_RDI1_CLK,
569 CAMIO_CSI_RDI2_CLK,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700570 CAMIO_CSIPHY0_TIMER_CLK,
571 CAMIO_CSIPHY1_TIMER_CLK,
572
573 CAMIO_JPEG_CLK,
574 CAMIO_JPEG_PCLK,
575 CAMIO_VPE_CLK,
576 CAMIO_VPE_PCLK,
577
578 CAMIO_CSI0_PHY_CLK,
579 CAMIO_CSI1_PHY_CLK,
580 CAMIO_CSIPHY_TIMER_SRC_CLK,
Jignesh Mehta95dd6e12011-11-18 17:21:16 -0800581 CAMIO_IMEM_CLK,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700582
583 CAMIO_MAX_CLK
584};
585
586enum msm_camio_clk_src_type {
587 MSM_CAMIO_CLK_SRC_INTERNAL,
588 MSM_CAMIO_CLK_SRC_EXTERNAL,
589 MSM_CAMIO_CLK_SRC_MAX
590};
591
592enum msm_s_test_mode {
593 S_TEST_OFF,
594 S_TEST_1,
595 S_TEST_2,
596 S_TEST_3
597};
598
599enum msm_s_resolution {
600 S_QTR_SIZE,
601 S_FULL_SIZE,
602 S_INVALID_SIZE
603};
604
605enum msm_s_reg_update {
606 /* Sensor egisters that need to be updated during initialization */
607 S_REG_INIT,
608 /* Sensor egisters that needs periodic I2C writes */
609 S_UPDATE_PERIODIC,
610 /* All the sensor Registers will be updated */
611 S_UPDATE_ALL,
612 /* Not valid update */
613 S_UPDATE_INVALID
614};
615
616enum msm_s_setting {
617 S_RES_PREVIEW,
618 S_RES_CAPTURE
619};
620
621enum msm_bus_perf_setting {
622 S_INIT,
623 S_PREVIEW,
624 S_VIDEO,
625 S_CAPTURE,
626 S_ZSL,
627 S_STEREO_VIDEO,
628 S_STEREO_CAPTURE,
629 S_DEFAULT,
630 S_EXIT
631};
632
Kevin Chan85af4552011-10-25 15:07:58 -0700633struct msm_cam_clk_info {
634 const char *clk_name;
635 long clk_rate;
636};
637
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700638int msm_camio_enable(struct platform_device *dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700639int msm_camio_vpe_clk_enable(uint32_t);
640int msm_camio_vpe_clk_disable(void);
641
Kevin Chanbb8ef862012-02-14 13:03:04 -0800642void msm_camio_mode_config(enum msm_camera_i2c_mux_mode mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700643int msm_camio_clk_enable(enum msm_camio_clk_type clk);
644int msm_camio_clk_disable(enum msm_camio_clk_type clk);
645int msm_camio_clk_config(uint32_t freq);
646void msm_camio_clk_rate_set(int rate);
Shuzhen Wange49436a2011-09-28 16:07:27 -0700647int msm_camio_vfe_clk_rate_set(int rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700648void msm_camio_clk_rate_set_2(struct clk *clk, int rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700649void msm_camio_clk_axi_rate_set(int rate);
650void msm_disable_io_gpio_clk(struct platform_device *);
651
652void msm_camio_camif_pad_reg_reset(void);
653void msm_camio_camif_pad_reg_reset_2(void);
654
655void msm_camio_vfe_blk_reset(void);
Suresh Vankadara3a9722a2012-05-21 10:09:05 +0530656void msm_camio_vfe_blk_reset_2(void);
657void msm_camio_vfe_blk_reset_3(void);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658
Nishant Pandit24153d82011-08-27 16:05:13 +0530659int32_t msm_camio_3d_enable(const struct msm_camera_sensor_info *sinfo);
660void msm_camio_3d_disable(void);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661void msm_camio_clk_sel(enum msm_camio_clk_src_type);
662void msm_camio_disable(struct platform_device *);
663int msm_camio_probe_on(struct platform_device *);
664int msm_camio_probe_off(struct platform_device *);
665int msm_camio_sensor_clk_off(struct platform_device *);
666int msm_camio_sensor_clk_on(struct platform_device *);
667int msm_camio_csi_config(struct msm_camera_csi_params *csi_params);
668int msm_camio_csiphy_config(struct msm_camera_csiphy_params *csiphy_params);
669int msm_camio_csid_config(struct msm_camera_csid_params *csid_params);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700670int add_axi_qos(void);
671int update_axi_qos(uint32_t freq);
672void release_axi_qos(void);
Kiran Kumar H N3ee46812012-04-13 16:57:57 -0700673void msm_camera_io_w(u32 data, void __iomem *addr);
674void msm_camera_io_w_mb(u32 data, void __iomem *addr);
675u32 msm_camera_io_r(void __iomem *addr);
676u32 msm_camera_io_r_mb(void __iomem *addr);
677void msm_camera_io_dump(void __iomem *addr, int size);
678void msm_camera_io_memcpy(void __iomem *dest_addr,
679 void __iomem *src_addr, u32 len);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700680void msm_camio_set_perf_lvl(enum msm_bus_perf_setting);
Kevin Chan09f4e662011-12-16 08:17:02 -0800681void msm_camio_bus_scale_cfg(
682 struct msm_bus_scale_pdata *, enum msm_bus_perf_setting);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700683
Shuzhen Wanga3c1a122011-08-04 15:33:27 -0700684void *msm_isp_sync_alloc(int size, gfp_t gfp);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700685
686void msm_isp_sync_free(void *ptr);
Kevin Chan85af4552011-10-25 15:07:58 -0700687
688int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
689 struct clk **clk_ptr, int num_clk, int enable);
Jeyaprakash Soundrapandian2474e8f2012-01-03 15:59:57 -0800690int msm_cam_core_reset(void);
Kevin Chaneb6b6072012-01-17 11:54:54 -0800691
692int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
693 int num_vreg, struct regulator **reg_ptr, int config);
694int msm_camera_enable_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
695 int num_vreg, struct regulator **reg_ptr, int enable);
696
697int msm_camera_config_gpio_table
698 (struct msm_camera_sensor_info *sinfo, int gpio_en);
699int msm_camera_request_gpio_table
700 (struct msm_camera_sensor_info *sinfo, int gpio_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700701#endif