blob: 03640d4f9392afff67d6b7e4d3aea342854077a4 [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053021#include <linux/mfd/wcd9xxx/core.h>
22#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
23#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
24#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053025#include <sound/pcm.h>
26#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080032#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070033#include <linux/kernel.h>
34#include <linux/gpio.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#include "wcd9310.h"
36
Kiran Kandi1e6371d2012-03-29 11:48:57 -070037#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
38 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
39 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
40
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070041
42#define NUM_DECIMATORS 10
43#define NUM_INTERPOLATORS 7
44#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080045#define TABLA_CFILT_FAST_MODE 0x00
46#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080047#define MBHC_FW_READ_ATTEMPTS 15
48#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070049
Joonwoo Park03324832012-03-19 19:36:16 -070050enum {
51 MBHC_USE_HPHL_TRIGGER = 1,
52 MBHC_USE_MB_TRIGGER = 2
53};
54
55#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070056#define NUM_ATTEMPTS_INSERT_DETECT 25
57#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070058
Joonwoo Park2cc13f02012-05-09 12:44:25 -070059#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
60 SND_JACK_OC_HPHR | SND_JACK_UNSUPPORTED)
Patrick Lai49efeac2011-11-03 11:01:12 -070061
Santosh Mardie15e2302011-11-15 10:39:23 +053062#define TABLA_I2S_MASTER_MODE_MASK 0x08
63
Patrick Laic7cae882011-11-18 11:52:49 -080064#define TABLA_OCP_ATTEMPT 1
65
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080066#define AIF1_PB 1
67#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080068#define AIF2_PB 3
Kiran Kandi1e6371d2012-03-29 11:48:57 -070069#define AIF2_CAP 4
Neema Shetty3fb1b802012-04-27 13:53:24 -070070#define AIF3_CAP 5
Kiran Kandi1e6371d2012-03-29 11:48:57 -070071
Neema Shetty3fb1b802012-04-27 13:53:24 -070072#define NUM_CODEC_DAIS 5
Kuirong Wang0f8ade32012-02-27 16:29:45 -080073#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080074
75struct tabla_codec_dai_data {
76 u32 rate;
77 u32 *ch_num;
78 u32 ch_act;
79 u32 ch_tot;
80};
81
Joonwoo Park0976d012011-12-22 11:48:18 -080082#define TABLA_MCLK_RATE_12288KHZ 12288000
83#define TABLA_MCLK_RATE_9600KHZ 9600000
84
Joonwoo Parkf4267c22012-01-10 13:25:24 -080085#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080086#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080087
Joonwoo Park03324832012-03-19 19:36:16 -070088#define TABLA_MBHC_BUTTON_MIN 0x8000
89
Joonwoo Park03324832012-03-19 19:36:16 -070090#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070091#define TABLA_MBHC_FAKE_INSERT_HIGH 80
92#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -070093
94#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
95
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070096#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 200
97
Joonwoo Parkcf473b42012-03-29 19:48:16 -070098#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
99#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700100
101#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
102#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
103
104#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
105
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700106#define TABLA_MBHC_GND_MIC_SWAP_THRESHOLD 2
107
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700108#define TABLA_ACQUIRE_LOCK(x) do { mutex_lock(&x); } while (0)
109#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
110
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
112static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
113static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800114static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800115static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700116
117enum tabla_bandgap_type {
118 TABLA_BANDGAP_OFF = 0,
119 TABLA_BANDGAP_AUDIO_MODE,
120 TABLA_BANDGAP_MBHC_MODE,
121};
122
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700123struct mbhc_micbias_regs {
124 u16 cfilt_val;
125 u16 cfilt_ctl;
126 u16 mbhc_reg;
127 u16 int_rbias;
128 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800129 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700130};
131
Ben Romberger1f045a72011-11-04 10:14:57 -0700132/* Codec supports 2 IIR filters */
133enum {
134 IIR1 = 0,
135 IIR2,
136 IIR_MAX,
137};
138/* Codec supports 5 bands */
139enum {
140 BAND1 = 0,
141 BAND2,
142 BAND3,
143 BAND4,
144 BAND5,
145 BAND_MAX,
146};
147
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800148enum {
149 COMPANDER_1 = 0,
150 COMPANDER_2,
151 COMPANDER_MAX,
152};
153
154enum {
155 COMPANDER_FS_8KHZ = 0,
156 COMPANDER_FS_16KHZ,
157 COMPANDER_FS_32KHZ,
158 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700159 COMPANDER_FS_96KHZ,
160 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800161 COMPANDER_FS_MAX,
162};
163
Joonwoo Parka9444452011-12-08 18:48:27 -0800164/* Flags to track of PA and DAC state.
165 * PA and DAC should be tracked separately as AUXPGA loopback requires
166 * only PA to be turned on without DAC being on. */
167enum tabla_priv_ack_flags {
168 TABLA_HPHL_PA_OFF_ACK = 0,
169 TABLA_HPHR_PA_OFF_ACK,
170 TABLA_HPHL_DAC_OFF_ACK,
171 TABLA_HPHR_DAC_OFF_ACK
172};
173
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800174
175struct comp_sample_dependent_params {
176 u32 peak_det_timeout;
177 u32 rms_meter_div_fact;
178 u32 rms_meter_resamp_fact;
179};
180
Joonwoo Park0976d012011-12-22 11:48:18 -0800181/* Data used by MBHC */
182struct mbhc_internal_cal_data {
183 u16 dce_z;
184 u16 dce_mb;
185 u16 sta_z;
186 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800187 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800188 u32 t_dce;
189 u32 t_sta;
190 u32 micb_mv;
191 u16 v_ins_hu;
192 u16 v_ins_h;
193 u16 v_b1_hu;
194 u16 v_b1_h;
195 u16 v_b1_huc;
196 u16 v_brh;
197 u16 v_brl;
198 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800199 u8 npoll;
200 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700201 s16 adj_v_hs_max;
202 u16 adj_v_ins_hu;
203 u16 adj_v_ins_h;
204 s16 v_inval_ins_low;
205 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800206};
207
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800208struct tabla_reg_address {
209 u16 micb_4_ctl;
210 u16 micb_4_int_rbias;
211 u16 micb_4_mbhc;
212};
213
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700214enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700215 PLUG_TYPE_INVALID = -1,
216 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700217 PLUG_TYPE_HEADSET,
218 PLUG_TYPE_HEADPHONE,
219 PLUG_TYPE_HIGH_HPH,
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700220 PLUG_TYPE_GND_MIC_SWAP,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700221};
222
223enum tabla_mbhc_state {
224 MBHC_STATE_NONE = -1,
225 MBHC_STATE_POTENTIAL,
226 MBHC_STATE_POTENTIAL_RECOVERY,
227 MBHC_STATE_RELEASE,
228};
229
Kiran Kandid8cf5212012-03-02 15:34:53 -0800230struct hpf_work {
231 struct tabla_priv *tabla;
232 u32 decimator;
233 u8 tx_hpf_cut_of_freq;
234 struct delayed_work dwork;
235};
236
237static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
238
Bradley Rubin229c6a52011-07-12 16:18:48 -0700239struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700240 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800241 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700242 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700243 u32 cfilt1_cnt;
244 u32 cfilt2_cnt;
245 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700246 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700247 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700248 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700249 bool clock_active;
250 bool config_mode_active;
251 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800252 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700253 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700254 enum tabla_mbhc_state mbhc_state;
255 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800256 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700257
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530258 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700259 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700260
261 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700262 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700263 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700264
265 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700266 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700267
Joonwoo Parka9444452011-12-08 18:48:27 -0800268 /* track PA/DAC state */
269 unsigned long hph_pa_dac_state;
270
Santosh Mardie15e2302011-11-15 10:39:23 +0530271 /*track tabla interface type*/
272 u8 intf_type;
273
Patrick Lai49efeac2011-11-03 11:01:12 -0700274 u32 hph_status; /* track headhpone status */
275 /* define separate work for left and right headphone OCP to avoid
276 * additional checking on which OCP event to report so no locking
277 * to ensure synchronization is required
278 */
279 struct work_struct hphlocp_work; /* reporting left hph ocp off */
280 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800281
Patrick Laic7cae882011-11-18 11:52:49 -0800282 u8 hphlocp_cnt; /* headphone left ocp retry */
283 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800284
Patrick Lai64b43262011-12-06 17:29:15 -0800285 /* Work to perform MBHC Firmware Read */
286 struct delayed_work mbhc_firmware_dwork;
287 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800288
289 /* num of slim ports required */
290 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800291
292 /*compander*/
293 int comp_enabled[COMPANDER_MAX];
294 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800295
296 /* Maintain the status of AUX PGA */
297 int aux_pga_cnt;
298 u8 aux_l_gain;
299 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700300
Joonwoo Park03324832012-03-19 19:36:16 -0700301 struct delayed_work mbhc_insert_dwork;
302 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700303
304 u8 current_plug;
305 struct work_struct hs_correct_plug_work;
306 bool hs_detect_work_stop;
307 bool hs_polling_irq_prepared;
308 bool lpi_enabled; /* low power insertion detection */
309 bool in_gpio_handler;
310 /* Currently, only used for mbhc purpose, to protect
311 * concurrent execution of mbhc threaded irq handlers and
312 * kill race between DAPM and MBHC.But can serve as a
313 * general lock to protect codec resource
314 */
315 struct mutex codec_resource_lock;
316
Bradley Rubincb3950a2011-08-18 13:07:26 -0700317#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700318 struct dentry *debugfs_poke;
319 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700320#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700321};
322
Bradley Rubincb3950a2011-08-18 13:07:26 -0700323
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800324static const u32 comp_shift[] = {
325 0,
326 2,
327};
328
329static const int comp_rx_path[] = {
330 COMPANDER_1,
331 COMPANDER_1,
332 COMPANDER_2,
333 COMPANDER_2,
334 COMPANDER_2,
335 COMPANDER_2,
336 COMPANDER_MAX,
337};
338
339static const struct comp_sample_dependent_params comp_samp_params[] = {
340 {
341 .peak_det_timeout = 0x2,
342 .rms_meter_div_fact = 0x8 << 4,
343 .rms_meter_resamp_fact = 0x21,
344 },
345 {
346 .peak_det_timeout = 0x3,
347 .rms_meter_div_fact = 0x9 << 4,
348 .rms_meter_resamp_fact = 0x28,
349 },
350
351 {
352 .peak_det_timeout = 0x5,
353 .rms_meter_div_fact = 0xB << 4,
354 .rms_meter_resamp_fact = 0x28,
355 },
356
357 {
358 .peak_det_timeout = 0x5,
359 .rms_meter_div_fact = 0xB << 4,
360 .rms_meter_resamp_fact = 0x28,
361 },
362};
363
Kuirong Wange9c8a222012-03-28 16:24:09 -0700364static unsigned short rx_digital_gain_reg[] = {
365 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
366 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
367 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
368 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
369 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
370 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
371 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
372};
373
374
375static unsigned short tx_digital_gain_reg[] = {
376 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
377 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
378 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
379 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
380 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
381 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
382 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
383 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
384 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
385 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
386};
387
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700388static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
389 struct snd_kcontrol *kcontrol, int event)
390{
391 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700392
393 pr_debug("%s %d\n", __func__, event);
394 switch (event) {
395 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
397 0x01);
398 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
399 usleep_range(200, 200);
400 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
401 break;
402 case SND_SOC_DAPM_PRE_PMD:
403 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
404 0x10);
405 usleep_range(20, 20);
406 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
407 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
408 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
409 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
410 0x00);
411 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700412 break;
413 }
414 return 0;
415}
416
Bradley Rubina7096d02011-08-03 18:29:02 -0700417static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
418 struct snd_ctl_elem_value *ucontrol)
419{
420 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
421 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
422 ucontrol->value.integer.value[0] = tabla->anc_slot;
423 return 0;
424}
425
426static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol)
428{
429 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
430 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
431 tabla->anc_slot = ucontrol->value.integer.value[0];
432 return 0;
433}
434
Kiran Kandid2d86b52011-09-09 17:44:28 -0700435static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
436 struct snd_ctl_elem_value *ucontrol)
437{
438 u8 ear_pa_gain;
439 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
440
441 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
442
443 ear_pa_gain = ear_pa_gain >> 5;
444
445 if (ear_pa_gain == 0x00) {
446 ucontrol->value.integer.value[0] = 0;
447 } else if (ear_pa_gain == 0x04) {
448 ucontrol->value.integer.value[0] = 1;
449 } else {
450 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
451 __func__, ear_pa_gain);
452 return -EINVAL;
453 }
454
455 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
456
457 return 0;
458}
459
460static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
461 struct snd_ctl_elem_value *ucontrol)
462{
463 u8 ear_pa_gain;
464 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
465
466 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
467 ucontrol->value.integer.value[0]);
468
469 switch (ucontrol->value.integer.value[0]) {
470 case 0:
471 ear_pa_gain = 0x00;
472 break;
473 case 1:
474 ear_pa_gain = 0x80;
475 break;
476 default:
477 return -EINVAL;
478 }
479
480 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
481 return 0;
482}
483
Ben Romberger1f045a72011-11-04 10:14:57 -0700484static int tabla_get_iir_enable_audio_mixer(
485 struct snd_kcontrol *kcontrol,
486 struct snd_ctl_elem_value *ucontrol)
487{
488 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
489 int iir_idx = ((struct soc_multi_mixer_control *)
490 kcontrol->private_value)->reg;
491 int band_idx = ((struct soc_multi_mixer_control *)
492 kcontrol->private_value)->shift;
493
494 ucontrol->value.integer.value[0] =
495 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
496 (1 << band_idx);
497
498 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
499 iir_idx, band_idx,
500 (uint32_t)ucontrol->value.integer.value[0]);
501 return 0;
502}
503
504static int tabla_put_iir_enable_audio_mixer(
505 struct snd_kcontrol *kcontrol,
506 struct snd_ctl_elem_value *ucontrol)
507{
508 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
509 int iir_idx = ((struct soc_multi_mixer_control *)
510 kcontrol->private_value)->reg;
511 int band_idx = ((struct soc_multi_mixer_control *)
512 kcontrol->private_value)->shift;
513 int value = ucontrol->value.integer.value[0];
514
515 /* Mask first 5 bits, 6-8 are reserved */
516 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
517 (1 << band_idx), (value << band_idx));
518
519 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
520 iir_idx, band_idx, value);
521 return 0;
522}
523static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
524 int iir_idx, int band_idx,
525 int coeff_idx)
526{
527 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800528 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700529 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800530 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700531
532 /* Mask bits top 2 bits since they are reserved */
533 return ((snd_soc_read(codec,
534 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
535 (snd_soc_read(codec,
536 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
537 (snd_soc_read(codec,
538 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
539 (snd_soc_read(codec,
540 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
541 0x3FFFFFFF;
542}
543
544static int tabla_get_iir_band_audio_mixer(
545 struct snd_kcontrol *kcontrol,
546 struct snd_ctl_elem_value *ucontrol)
547{
548 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
549 int iir_idx = ((struct soc_multi_mixer_control *)
550 kcontrol->private_value)->reg;
551 int band_idx = ((struct soc_multi_mixer_control *)
552 kcontrol->private_value)->shift;
553
554 ucontrol->value.integer.value[0] =
555 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
556 ucontrol->value.integer.value[1] =
557 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
558 ucontrol->value.integer.value[2] =
559 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
560 ucontrol->value.integer.value[3] =
561 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
562 ucontrol->value.integer.value[4] =
563 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
564
565 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
566 "%s: IIR #%d band #%d b1 = 0x%x\n"
567 "%s: IIR #%d band #%d b2 = 0x%x\n"
568 "%s: IIR #%d band #%d a1 = 0x%x\n"
569 "%s: IIR #%d band #%d a2 = 0x%x\n",
570 __func__, iir_idx, band_idx,
571 (uint32_t)ucontrol->value.integer.value[0],
572 __func__, iir_idx, band_idx,
573 (uint32_t)ucontrol->value.integer.value[1],
574 __func__, iir_idx, band_idx,
575 (uint32_t)ucontrol->value.integer.value[2],
576 __func__, iir_idx, band_idx,
577 (uint32_t)ucontrol->value.integer.value[3],
578 __func__, iir_idx, band_idx,
579 (uint32_t)ucontrol->value.integer.value[4]);
580 return 0;
581}
582
583static void set_iir_band_coeff(struct snd_soc_codec *codec,
584 int iir_idx, int band_idx,
585 int coeff_idx, uint32_t value)
586{
587 /* Mask top 3 bits, 6-8 are reserved */
588 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800589 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700590 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800591 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700592
593 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800594 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700595 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800596 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700597
598 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800599 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700600 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800601 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700602
Ben Romberger0915aae2012-02-06 23:32:43 -0800603 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700604 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800605 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700606
Ben Romberger0915aae2012-02-06 23:32:43 -0800607 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700608 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800609 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700610}
611
612static int tabla_put_iir_band_audio_mixer(
613 struct snd_kcontrol *kcontrol,
614 struct snd_ctl_elem_value *ucontrol)
615{
616 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
617 int iir_idx = ((struct soc_multi_mixer_control *)
618 kcontrol->private_value)->reg;
619 int band_idx = ((struct soc_multi_mixer_control *)
620 kcontrol->private_value)->shift;
621
622 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
623 ucontrol->value.integer.value[0]);
624 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
625 ucontrol->value.integer.value[1]);
626 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
627 ucontrol->value.integer.value[2]);
628 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
629 ucontrol->value.integer.value[3]);
630 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
631 ucontrol->value.integer.value[4]);
632
633 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
634 "%s: IIR #%d band #%d b1 = 0x%x\n"
635 "%s: IIR #%d band #%d b2 = 0x%x\n"
636 "%s: IIR #%d band #%d a1 = 0x%x\n"
637 "%s: IIR #%d band #%d a2 = 0x%x\n",
638 __func__, iir_idx, band_idx,
639 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
640 __func__, iir_idx, band_idx,
641 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
642 __func__, iir_idx, band_idx,
643 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
644 __func__, iir_idx, band_idx,
645 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
646 __func__, iir_idx, band_idx,
647 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
648 return 0;
649}
650
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800651static int tabla_compander_gain_offset(
652 struct snd_soc_codec *codec, u32 enable,
653 unsigned int reg, int mask, int event)
654{
655 int pa_mode = snd_soc_read(codec, reg) & mask;
656 int gain_offset = 0;
657 /* if PMU && enable is 1-> offset is 3
658 * if PMU && enable is 0-> offset is 0
659 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
660 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
661 */
662
663 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
664 gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
665 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
666 gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
667 return gain_offset;
668}
669
670
671static int tabla_config_gain_compander(
672 struct snd_soc_codec *codec,
673 u32 compander, u32 enable, int event)
674{
675 int value = 0;
676 int mask = 1 << 4;
677 int gain = 0;
678 int gain_offset;
679 if (compander >= COMPANDER_MAX) {
680 pr_err("%s: Error, invalid compander channel\n", __func__);
681 return -EINVAL;
682 }
683
684 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
685 value = 1 << 4;
686
687 if (compander == COMPANDER_1) {
688 gain_offset = tabla_compander_gain_offset(codec, enable,
689 TABLA_A_RX_HPH_L_GAIN, mask, event);
690 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
691 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
692 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
693 0xFF, gain - gain_offset);
694 gain_offset = tabla_compander_gain_offset(codec, enable,
695 TABLA_A_RX_HPH_R_GAIN, mask, event);
696 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
697 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
698 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
699 0xFF, gain - gain_offset);
700 } else if (compander == COMPANDER_2) {
701 gain_offset = tabla_compander_gain_offset(codec, enable,
702 TABLA_A_RX_LINE_1_GAIN, mask, event);
703 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
704 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
705 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
706 0xFF, gain - gain_offset);
707 gain_offset = tabla_compander_gain_offset(codec, enable,
708 TABLA_A_RX_LINE_3_GAIN, mask, event);
709 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
710 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
711 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
712 0xFF, gain - gain_offset);
713 gain_offset = tabla_compander_gain_offset(codec, enable,
714 TABLA_A_RX_LINE_2_GAIN, mask, event);
715 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
716 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
717 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
718 0xFF, gain - gain_offset);
719 gain_offset = tabla_compander_gain_offset(codec, enable,
720 TABLA_A_RX_LINE_4_GAIN, mask, event);
721 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
722 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
723 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
724 0xFF, gain - gain_offset);
725 }
726 return 0;
727}
728static int tabla_get_compander(struct snd_kcontrol *kcontrol,
729 struct snd_ctl_elem_value *ucontrol)
730{
731
732 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
733 int comp = ((struct soc_multi_mixer_control *)
734 kcontrol->private_value)->max;
735 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
736
737 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
738
739 return 0;
740}
741
742static int tabla_set_compander(struct snd_kcontrol *kcontrol,
743 struct snd_ctl_elem_value *ucontrol)
744{
745 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
746 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
747 int comp = ((struct soc_multi_mixer_control *)
748 kcontrol->private_value)->max;
749 int value = ucontrol->value.integer.value[0];
750
751 if (value == tabla->comp_enabled[comp]) {
752 pr_debug("%s: compander #%d enable %d no change\n",
753 __func__, comp, value);
754 return 0;
755 }
756 tabla->comp_enabled[comp] = value;
757 return 0;
758}
759
760
761static int tabla_config_compander(struct snd_soc_dapm_widget *w,
762 struct snd_kcontrol *kcontrol,
763 int event)
764{
765 struct snd_soc_codec *codec = w->codec;
766 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
767 u32 rate = tabla->comp_fs[w->shift];
768
769 switch (event) {
770 case SND_SOC_DAPM_PRE_PMU:
771 if (tabla->comp_enabled[w->shift] != 0) {
772 /* Enable both L/R compander clocks */
773 snd_soc_update_bits(codec,
774 TABLA_A_CDC_CLK_RX_B2_CTL,
775 0x03 << comp_shift[w->shift],
776 0x03 << comp_shift[w->shift]);
777 /* Clar the HALT for the compander*/
778 snd_soc_update_bits(codec,
779 TABLA_A_CDC_COMP1_B1_CTL +
780 w->shift * 8, 1 << 2, 0);
781 /* Toggle compander reset bits*/
782 snd_soc_update_bits(codec,
783 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
784 0x03 << comp_shift[w->shift],
785 0x03 << comp_shift[w->shift]);
786 snd_soc_update_bits(codec,
787 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
788 0x03 << comp_shift[w->shift], 0);
789 tabla_config_gain_compander(codec, w->shift, 1, event);
790 /* Update the RMS meter resampling*/
791 snd_soc_update_bits(codec,
792 TABLA_A_CDC_COMP1_B3_CTL +
793 w->shift * 8, 0xFF, 0x01);
794 /* Wait for 1ms*/
795 usleep_range(1000, 1000);
796 }
797 break;
798 case SND_SOC_DAPM_POST_PMU:
799 /* Set sample rate dependent paramater*/
800 if (tabla->comp_enabled[w->shift] != 0) {
801 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
802 w->shift * 8, 0x03, rate);
803 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
804 w->shift * 8, 0x0F,
805 comp_samp_params[rate].peak_det_timeout);
806 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
807 w->shift * 8, 0xF0,
808 comp_samp_params[rate].rms_meter_div_fact);
809 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
810 w->shift * 8, 0xFF,
811 comp_samp_params[rate].rms_meter_resamp_fact);
812 /* Compander enable -> 0x370/0x378*/
813 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
814 w->shift * 8, 0x03, 0x03);
815 }
816 break;
817 case SND_SOC_DAPM_PRE_PMD:
818 /* Halt the compander*/
819 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
820 w->shift * 8, 1 << 2, 1 << 2);
821 break;
822 case SND_SOC_DAPM_POST_PMD:
823 /* Restore the gain */
824 tabla_config_gain_compander(codec, w->shift,
825 tabla->comp_enabled[w->shift], event);
826 /* Disable the compander*/
827 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
828 w->shift * 8, 0x03, 0x00);
829 /* Turn off the clock for compander in pair*/
830 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
831 0x03 << comp_shift[w->shift], 0);
832 break;
833 }
834 return 0;
835}
836
Kiran Kandid2d86b52011-09-09 17:44:28 -0700837static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
838static const struct soc_enum tabla_ear_pa_gain_enum[] = {
839 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
840};
841
Santosh Mardi024010f2011-10-18 06:27:21 +0530842/*cut of frequency for high pass filter*/
843static const char *cf_text[] = {
844 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
845};
846
847static const struct soc_enum cf_dec1_enum =
848 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
849
850static const struct soc_enum cf_dec2_enum =
851 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
852
853static const struct soc_enum cf_dec3_enum =
854 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
855
856static const struct soc_enum cf_dec4_enum =
857 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
858
859static const struct soc_enum cf_dec5_enum =
860 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
861
862static const struct soc_enum cf_dec6_enum =
863 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
864
865static const struct soc_enum cf_dec7_enum =
866 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
867
868static const struct soc_enum cf_dec8_enum =
869 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
870
871static const struct soc_enum cf_dec9_enum =
872 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
873
874static const struct soc_enum cf_dec10_enum =
875 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
876
877static const struct soc_enum cf_rxmix1_enum =
878 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
879
880static const struct soc_enum cf_rxmix2_enum =
881 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
882
883static const struct soc_enum cf_rxmix3_enum =
884 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
885
886static const struct soc_enum cf_rxmix4_enum =
887 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
888
889static const struct soc_enum cf_rxmix5_enum =
890 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
891;
892static const struct soc_enum cf_rxmix6_enum =
893 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
894
895static const struct soc_enum cf_rxmix7_enum =
896 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
897
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700898static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700899
900 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
901 tabla_pa_gain_get, tabla_pa_gain_put),
902
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700903 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
904 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700905 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
906 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700907 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
908 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700909 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
910 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700911 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
912 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700913
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700914 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
915 line_gain),
916 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
917 line_gain),
918
Bradley Rubin410383f2011-07-22 13:44:23 -0700919 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
920 -84, 40, digital_gain),
921 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
922 -84, 40, digital_gain),
923 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
924 -84, 40, digital_gain),
925 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
926 -84, 40, digital_gain),
927 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
928 -84, 40, digital_gain),
929 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
930 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800931 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
932 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700933
Bradley Rubin410383f2011-07-22 13:44:23 -0700934 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700935 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700936 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700937 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700938 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
939 digital_gain),
940 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
941 digital_gain),
942 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
943 digital_gain),
944 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
945 digital_gain),
946 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
947 digital_gain),
948 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
949 digital_gain),
950 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
951 digital_gain),
952 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
953 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700954 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
955 40, digital_gain),
956 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
957 40, digital_gain),
958 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
959 40, digital_gain),
960 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
961 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700962 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
963 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700964 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
965 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700966 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
967 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700968
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800969 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
970 aux_pga_gain),
971 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
972 aux_pga_gain),
973
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700974 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800975 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700976 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700977
978 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
979 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530980 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
981 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
982 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
983 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
984 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
985 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
986 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
987 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
988 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
989 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
990
991 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
992 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
993 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
994 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
995 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
996 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
997 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
998 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
999 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
1000 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
1001
1002 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
1003 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1004 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1005 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1006 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1007 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1008 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1009
1010 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1011 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1012 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1013 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1014 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1015 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1016 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001017
1018 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1019 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1020 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1021 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1022 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1023 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1024 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1025 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1026 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1027 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1028 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1029 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1030 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1031 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1032 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1033 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1034 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1035 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1036 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1037 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1038
1039 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1040 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1041 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1042 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1043 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1044 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1045 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1046 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1047 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1048 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1049 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1050 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1051 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1052 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1053 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1054 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1055 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1056 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1057 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1058 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001059 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1060 tabla_get_compander, tabla_set_compander),
1061 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1062 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001063};
1064
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001065static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1066 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1067};
1068
1069static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1070 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1071};
1072
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001073static const char *rx_mix1_text[] = {
1074 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1075 "RX5", "RX6", "RX7"
1076};
1077
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001078static const char *rx_mix2_text[] = {
1079 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1080};
1081
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001082static const char *rx_dsm_text[] = {
1083 "CIC_OUT", "DSM_INV"
1084};
1085
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001086static const char *sb_tx1_mux_text[] = {
1087 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1088 "DEC1"
1089};
1090
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001091static const char *sb_tx2_mux_text[] = {
1092 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1093 "DEC2"
1094};
1095
1096static const char *sb_tx3_mux_text[] = {
1097 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1098 "DEC3"
1099};
1100
1101static const char *sb_tx4_mux_text[] = {
1102 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1103 "DEC4"
1104};
1105
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001106static const char *sb_tx5_mux_text[] = {
1107 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1108 "DEC5"
1109};
1110
1111static const char *sb_tx6_mux_text[] = {
1112 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1113 "DEC6"
1114};
1115
1116static const char const *sb_tx7_to_tx10_mux_text[] = {
1117 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1118 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1119 "DEC9", "DEC10"
1120};
1121
1122static const char *dec1_mux_text[] = {
1123 "ZERO", "DMIC1", "ADC6",
1124};
1125
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001126static const char *dec2_mux_text[] = {
1127 "ZERO", "DMIC2", "ADC5",
1128};
1129
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001130static const char *dec3_mux_text[] = {
1131 "ZERO", "DMIC3", "ADC4",
1132};
1133
1134static const char *dec4_mux_text[] = {
1135 "ZERO", "DMIC4", "ADC3",
1136};
1137
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138static const char *dec5_mux_text[] = {
1139 "ZERO", "DMIC5", "ADC2",
1140};
1141
1142static const char *dec6_mux_text[] = {
1143 "ZERO", "DMIC6", "ADC1",
1144};
1145
1146static const char const *dec7_mux_text[] = {
1147 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1148};
1149
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001150static const char *dec8_mux_text[] = {
1151 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1152};
1153
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001154static const char *dec9_mux_text[] = {
1155 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1156};
1157
1158static const char *dec10_mux_text[] = {
1159 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1160};
1161
Bradley Rubin229c6a52011-07-12 16:18:48 -07001162static const char const *anc_mux_text[] = {
1163 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1164 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1165};
1166
1167static const char const *anc1_fb_mux_text[] = {
1168 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1169};
1170
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001171static const char *iir1_inp1_text[] = {
1172 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1173 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1174};
1175
1176static const struct soc_enum rx_mix1_inp1_chain_enum =
1177 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1178
Bradley Rubin229c6a52011-07-12 16:18:48 -07001179static const struct soc_enum rx_mix1_inp2_chain_enum =
1180 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1181
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001182static const struct soc_enum rx2_mix1_inp1_chain_enum =
1183 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1184
Bradley Rubin229c6a52011-07-12 16:18:48 -07001185static const struct soc_enum rx2_mix1_inp2_chain_enum =
1186 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1187
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001188static const struct soc_enum rx3_mix1_inp1_chain_enum =
1189 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1190
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001191static const struct soc_enum rx3_mix1_inp2_chain_enum =
1192 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1193
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001194static const struct soc_enum rx4_mix1_inp1_chain_enum =
1195 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1196
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001197static const struct soc_enum rx4_mix1_inp2_chain_enum =
1198 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1199
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001200static const struct soc_enum rx5_mix1_inp1_chain_enum =
1201 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1202
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001203static const struct soc_enum rx5_mix1_inp2_chain_enum =
1204 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1205
1206static const struct soc_enum rx6_mix1_inp1_chain_enum =
1207 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1208
1209static const struct soc_enum rx6_mix1_inp2_chain_enum =
1210 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1211
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001212static const struct soc_enum rx7_mix1_inp1_chain_enum =
1213 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1214
1215static const struct soc_enum rx7_mix1_inp2_chain_enum =
1216 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1217
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001218static const struct soc_enum rx1_mix2_inp1_chain_enum =
1219 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1220
1221static const struct soc_enum rx1_mix2_inp2_chain_enum =
1222 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1223
1224static const struct soc_enum rx2_mix2_inp1_chain_enum =
1225 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1226
1227static const struct soc_enum rx2_mix2_inp2_chain_enum =
1228 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1229
1230static const struct soc_enum rx3_mix2_inp1_chain_enum =
1231 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1232
1233static const struct soc_enum rx3_mix2_inp2_chain_enum =
1234 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1235
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001236static const struct soc_enum rx4_dsm_enum =
1237 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1238
1239static const struct soc_enum rx6_dsm_enum =
1240 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1241
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001242static const struct soc_enum sb_tx1_mux_enum =
1243 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1244
1245static const struct soc_enum sb_tx2_mux_enum =
1246 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1247
1248static const struct soc_enum sb_tx3_mux_enum =
1249 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1250
1251static const struct soc_enum sb_tx4_mux_enum =
1252 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1253
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001254static const struct soc_enum sb_tx5_mux_enum =
1255 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1256
1257static const struct soc_enum sb_tx6_mux_enum =
1258 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1259
1260static const struct soc_enum sb_tx7_mux_enum =
1261 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1262 sb_tx7_to_tx10_mux_text);
1263
1264static const struct soc_enum sb_tx8_mux_enum =
1265 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1266 sb_tx7_to_tx10_mux_text);
1267
Kiran Kandi3426e512011-09-13 22:50:10 -07001268static const struct soc_enum sb_tx9_mux_enum =
1269 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1270 sb_tx7_to_tx10_mux_text);
1271
1272static const struct soc_enum sb_tx10_mux_enum =
1273 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1274 sb_tx7_to_tx10_mux_text);
1275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001276static const struct soc_enum dec1_mux_enum =
1277 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1278
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001279static const struct soc_enum dec2_mux_enum =
1280 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1281
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001282static const struct soc_enum dec3_mux_enum =
1283 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1284
1285static const struct soc_enum dec4_mux_enum =
1286 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1287
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001288static const struct soc_enum dec5_mux_enum =
1289 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1290
1291static const struct soc_enum dec6_mux_enum =
1292 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1293
1294static const struct soc_enum dec7_mux_enum =
1295 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1296
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001297static const struct soc_enum dec8_mux_enum =
1298 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1299
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001300static const struct soc_enum dec9_mux_enum =
1301 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1302
1303static const struct soc_enum dec10_mux_enum =
1304 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1305
Bradley Rubin229c6a52011-07-12 16:18:48 -07001306static const struct soc_enum anc1_mux_enum =
1307 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1308
1309static const struct soc_enum anc2_mux_enum =
1310 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1311
1312static const struct soc_enum anc1_fb_mux_enum =
1313 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1314
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001315static const struct soc_enum iir1_inp1_mux_enum =
1316 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1317
1318static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1319 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1320
Bradley Rubin229c6a52011-07-12 16:18:48 -07001321static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1322 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1323
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001324static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1325 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1326
Bradley Rubin229c6a52011-07-12 16:18:48 -07001327static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1328 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1329
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001330static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1331 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1332
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001333static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1334 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1335
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001336static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1337 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1338
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001339static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1340 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1341
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001342static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1343 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1344
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001345static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1346 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1347
1348static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1349 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1350
1351static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1352 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1353
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001354static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1355 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1356
1357static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1358 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1359
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001360static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1361 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1362
1363static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1364 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1365
1366static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1367 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1368
1369static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1370 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1371
1372static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1373 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1374
1375static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1376 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1377
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001378static const struct snd_kcontrol_new rx4_dsm_mux =
1379 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1380
1381static const struct snd_kcontrol_new rx6_dsm_mux =
1382 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1383
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001384static const struct snd_kcontrol_new sb_tx1_mux =
1385 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1386
1387static const struct snd_kcontrol_new sb_tx2_mux =
1388 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1389
1390static const struct snd_kcontrol_new sb_tx3_mux =
1391 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1392
1393static const struct snd_kcontrol_new sb_tx4_mux =
1394 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1395
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001396static const struct snd_kcontrol_new sb_tx5_mux =
1397 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1398
1399static const struct snd_kcontrol_new sb_tx6_mux =
1400 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1401
1402static const struct snd_kcontrol_new sb_tx7_mux =
1403 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1404
1405static const struct snd_kcontrol_new sb_tx8_mux =
1406 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1407
Kiran Kandi3426e512011-09-13 22:50:10 -07001408static const struct snd_kcontrol_new sb_tx9_mux =
1409 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1410
1411static const struct snd_kcontrol_new sb_tx10_mux =
1412 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1413
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001414
Kiran Kandi59a96b12012-01-16 02:20:03 -08001415static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1416 struct snd_ctl_elem_value *ucontrol)
1417{
1418 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1419 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1420 struct snd_soc_codec *codec = w->codec;
1421 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1422 unsigned int dec_mux, decimator;
1423 char *dec_name = NULL;
1424 char *widget_name = NULL;
1425 char *temp;
1426 u16 tx_mux_ctl_reg;
1427 u8 adc_dmic_sel = 0x0;
1428 int ret = 0;
1429
1430 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1431 return -EINVAL;
1432
1433 dec_mux = ucontrol->value.enumerated.item[0];
1434
1435 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1436 if (!widget_name)
1437 return -ENOMEM;
1438 temp = widget_name;
1439
1440 dec_name = strsep(&widget_name, " ");
1441 widget_name = temp;
1442 if (!dec_name) {
1443 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1444 ret = -EINVAL;
1445 goto out;
1446 }
1447
1448 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1449 if (ret < 0) {
1450 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1451 ret = -EINVAL;
1452 goto out;
1453 }
1454
1455 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1456 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1457 dec_mux);
1458
1459
1460 switch (decimator) {
1461 case 1:
1462 case 2:
1463 case 3:
1464 case 4:
1465 case 5:
1466 case 6:
1467 if (dec_mux == 1)
1468 adc_dmic_sel = 0x1;
1469 else
1470 adc_dmic_sel = 0x0;
1471 break;
1472 case 7:
1473 case 8:
1474 case 9:
1475 case 10:
1476 if ((dec_mux == 1) || (dec_mux == 2))
1477 adc_dmic_sel = 0x1;
1478 else
1479 adc_dmic_sel = 0x0;
1480 break;
1481 default:
1482 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1483 ret = -EINVAL;
1484 goto out;
1485 }
1486
1487 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1488
1489 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1490
1491 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1492
1493out:
1494 kfree(widget_name);
1495 return ret;
1496}
1497
1498#define WCD9310_DEC_ENUM(xname, xenum) \
1499{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1500 .info = snd_soc_info_enum_double, \
1501 .get = snd_soc_dapm_get_enum_double, \
1502 .put = wcd9310_put_dec_enum, \
1503 .private_value = (unsigned long)&xenum }
1504
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001505static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001506 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001507
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001508static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001509 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001510
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001511static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001512 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001513
1514static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001515 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001516
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001517static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001518 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001519
1520static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001521 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001522
1523static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001524 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001525
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001526static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001527 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001528
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001529static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001530 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001531
1532static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001533 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001534
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001535static const struct snd_kcontrol_new iir1_inp1_mux =
1536 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1537
Kiran Kandi59a96b12012-01-16 02:20:03 -08001538static const struct snd_kcontrol_new anc1_mux =
1539 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1540
Bradley Rubin229c6a52011-07-12 16:18:48 -07001541static const struct snd_kcontrol_new anc2_mux =
1542 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001543
Bradley Rubin229c6a52011-07-12 16:18:48 -07001544static const struct snd_kcontrol_new anc1_fb_mux =
1545 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001546
Bradley Rubin229c6a52011-07-12 16:18:48 -07001547static const struct snd_kcontrol_new dac1_switch[] = {
1548 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1549};
1550static const struct snd_kcontrol_new hphl_switch[] = {
1551 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1552};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001553
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001554static const struct snd_kcontrol_new hphl_pa_mix[] = {
1555 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1556 7, 1, 0),
1557 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1558 7, 1, 0),
1559 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1560 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1561 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1562 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1563};
1564
1565static const struct snd_kcontrol_new hphr_pa_mix[] = {
1566 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1567 6, 1, 0),
1568 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1569 6, 1, 0),
1570 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1571 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1572 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1573 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1574};
1575
1576static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1577 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1578 5, 1, 0),
1579 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1580 5, 1, 0),
1581 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1582 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1583 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1584 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1585};
1586
1587static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1588 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1589 4, 1, 0),
1590 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1591 4, 1, 0),
1592 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1593 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1594 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1595 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1596};
1597
1598static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1599 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1600 3, 1, 0),
1601 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1602 3, 1, 0),
1603 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1604 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1605 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1606 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1607};
1608
1609static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1610 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1611 2, 1, 0),
1612 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1613 2, 1, 0),
1614 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1615 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1616 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1617 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1618};
1619
1620static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1621 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1622 1, 1, 0),
1623 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1624 1, 1, 0),
1625 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1626 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1627 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1628 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1629};
1630
1631static const struct snd_kcontrol_new ear_pa_mix[] = {
1632 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1633 0, 1, 0),
1634 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1635 0, 1, 0),
1636 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1637 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1638 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1639 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1640};
1641
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001642static const struct snd_kcontrol_new lineout3_ground_switch =
1643 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1644
1645static const struct snd_kcontrol_new lineout4_ground_switch =
1646 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001647
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001648static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001649 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001650{
1651 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1652
1653 pr_debug("%s %d\n", __func__, enable);
1654
1655 if (enable) {
1656 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001657 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1658 } else {
1659 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001660 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001661 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07001662 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001663 }
1664}
1665
1666static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1667 struct snd_kcontrol *kcontrol, int event)
1668{
1669 struct snd_soc_codec *codec = w->codec;
1670 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001671 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001672
1673 pr_debug("%s %d\n", __func__, event);
1674
1675 if (w->reg == TABLA_A_TX_1_2_EN)
1676 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1677 else if (w->reg == TABLA_A_TX_3_4_EN)
1678 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1679 else if (w->reg == TABLA_A_TX_5_6_EN)
1680 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1681 else {
1682 pr_err("%s: Error, invalid adc register\n", __func__);
1683 return -EINVAL;
1684 }
1685
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001686 if (w->shift == 3)
1687 init_bit_shift = 6;
1688 else if (w->shift == 7)
1689 init_bit_shift = 7;
1690 else {
1691 pr_err("%s: Error, invalid init bit postion adc register\n",
1692 __func__);
1693 return -EINVAL;
1694 }
1695
1696
1697
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001698 switch (event) {
1699 case SND_SOC_DAPM_PRE_PMU:
1700 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001701 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1702 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001703 break;
1704 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001705
1706 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1707
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001708 break;
1709 case SND_SOC_DAPM_POST_PMD:
1710 tabla_codec_enable_adc_block(codec, 0);
1711 break;
1712 }
1713 return 0;
1714}
1715
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001716static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
1717{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001718 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1719 0x80);
1720 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
1721 0x04);
1722 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1723 0x01);
1724 usleep_range(1000, 1000);
1725 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1726 0x00);
1727}
1728
1729static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
1730 enum tabla_bandgap_type choice)
1731{
1732 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1733
1734 /* TODO lock resources accessed by audio streams and threaded
1735 * interrupt handlers
1736 */
1737
1738 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
1739 tabla->bandgap_type);
1740
1741 if (tabla->bandgap_type == choice)
1742 return;
1743
1744 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
1745 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1746 tabla_codec_enable_audio_mode_bandgap(codec);
1747 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001748 /* bandgap mode becomes fast,
1749 * mclk should be off or clk buff source souldn't be VBG
1750 * Let's turn off mclk always */
1751 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001752 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
1753 0x2);
1754 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1755 0x80);
1756 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
1757 0x4);
1758 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1759 0x01);
1760 usleep_range(1000, 1000);
1761 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1762 0x00);
1763 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
1764 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1765 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1766 usleep_range(100, 100);
1767 tabla_codec_enable_audio_mode_bandgap(codec);
1768 } else if (choice == TABLA_BANDGAP_OFF) {
1769 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1770 } else {
1771 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
1772 }
1773 tabla->bandgap_type = choice;
1774}
1775
1776static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
1777{
1778 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1779 pr_debug("%s\n", __func__);
1780 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001781 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001782 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
1783 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001784 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001785 tabla->clock_active = false;
1786}
1787
1788static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
1789{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001790 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001791 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001792 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001793 return 1;
1794 else {
1795 BUG_ON(1);
1796 return -EINVAL;
1797 }
1798}
1799
1800static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1801{
1802 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1803
1804 if (enable) {
1805 tabla->rx_bias_count++;
1806 if (tabla->rx_bias_count == 1)
1807 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1808 0x80, 0x80);
1809 } else {
1810 tabla->rx_bias_count--;
1811 if (!tabla->rx_bias_count)
1812 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1813 0x80, 0x00);
1814 }
1815}
1816
1817static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
1818 int enable)
1819{
1820 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1821
1822 pr_debug("%s: enable = %d\n", __func__, enable);
1823 if (enable) {
1824 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001825 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001826 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
1827 usleep_range(5, 5);
1828 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001829 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001830 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001831 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001832 usleep_range(10, 10);
1833 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001834 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001835 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
1836 } else {
1837 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001838 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001839 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001840 /* clk source to ext clk and clk buff ref to VBG */
1841 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001842 }
1843 tabla->config_mode_active = enable ? true : false;
1844
1845 return 0;
1846}
1847
1848static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001849 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001850{
1851 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1852
1853 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
1854
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001855 /* transit to RCO requires mclk off */
1856 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001857 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001858 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001859 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001860 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001861 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001862 } else {
1863 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001864 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
1865
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001866 if (tabla->mbhc_polling_active) {
1867 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
1868 tabla_codec_enable_config_mode(codec, 0);
1869 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001870 }
1871
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001872 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001873 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001874 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001875 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
1876 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
1877 usleep_range(50, 50);
1878 tabla->clock_active = true;
1879 return 0;
1880}
1881
1882static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
1883 struct snd_kcontrol *kcontrol, int event)
1884{
1885 struct snd_soc_codec *codec = w->codec;
1886 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1887
1888 pr_debug("%s: %d\n", __func__, event);
1889
1890 switch (event) {
1891 case SND_SOC_DAPM_PRE_PMU:
1892 tabla_codec_enable_bandgap(codec,
1893 TABLA_BANDGAP_AUDIO_MODE);
1894 tabla_enable_rx_bias(codec, 1);
1895
1896 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1897 0x08, 0x08);
1898 /* Enable Zero Cross detect for AUX PGA channel
1899 * and set the initial AUX PGA gain to NEG_0P0_DB
1900 * to avoid glitches.
1901 */
1902 if (w->reg == TABLA_A_AUX_L_EN) {
1903 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1904 0x20, 0x20);
1905 tabla->aux_l_gain = snd_soc_read(codec,
1906 TABLA_A_AUX_L_GAIN);
1907 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1908 } else {
1909 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1910 0x20, 0x20);
1911 tabla->aux_r_gain = snd_soc_read(codec,
1912 TABLA_A_AUX_R_GAIN);
1913 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1914 }
1915 if (tabla->aux_pga_cnt++ == 1
1916 && !tabla->mclk_enabled) {
1917 tabla_codec_enable_clock_block(codec, 1);
1918 pr_debug("AUX PGA enabled RC osc\n");
1919 }
1920 break;
1921
1922 case SND_SOC_DAPM_POST_PMU:
1923 if (w->reg == TABLA_A_AUX_L_EN)
1924 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1925 tabla->aux_l_gain);
1926 else
1927 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1928 tabla->aux_r_gain);
1929 break;
1930
1931 case SND_SOC_DAPM_PRE_PMD:
1932 /* Mute AUX PGA channel in use before disabling AUX PGA */
1933 if (w->reg == TABLA_A_AUX_L_EN) {
1934 tabla->aux_l_gain = snd_soc_read(codec,
1935 TABLA_A_AUX_L_GAIN);
1936 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1937 } else {
1938 tabla->aux_r_gain = snd_soc_read(codec,
1939 TABLA_A_AUX_R_GAIN);
1940 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1941 }
1942 break;
1943
1944 case SND_SOC_DAPM_POST_PMD:
1945 tabla_enable_rx_bias(codec, 0);
1946
1947 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1948 0x08, 0x00);
1949 if (w->reg == TABLA_A_AUX_L_EN) {
1950 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1951 tabla->aux_l_gain);
1952 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1953 0x20, 0x00);
1954 } else {
1955 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1956 tabla->aux_r_gain);
1957 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1958 0x20, 0x00);
1959 }
1960
1961 if (tabla->aux_pga_cnt-- == 0) {
1962 if (tabla->mbhc_polling_active)
1963 tabla_codec_enable_bandgap(codec,
1964 TABLA_BANDGAP_MBHC_MODE);
1965 else
1966 tabla_codec_enable_bandgap(codec,
1967 TABLA_BANDGAP_OFF);
1968
1969 if (!tabla->mclk_enabled &&
1970 !tabla->mbhc_polling_active) {
1971 tabla_codec_enable_clock_block(codec, 0);
1972 }
1973 }
1974 break;
1975 }
1976 return 0;
1977}
1978
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001979static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1980 struct snd_kcontrol *kcontrol, int event)
1981{
1982 struct snd_soc_codec *codec = w->codec;
1983 u16 lineout_gain_reg;
1984
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001985 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001986
1987 switch (w->shift) {
1988 case 0:
1989 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1990 break;
1991 case 1:
1992 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1993 break;
1994 case 2:
1995 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1996 break;
1997 case 3:
1998 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1999 break;
2000 case 4:
2001 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
2002 break;
2003 default:
2004 pr_err("%s: Error, incorrect lineout register value\n",
2005 __func__);
2006 return -EINVAL;
2007 }
2008
2009 switch (event) {
2010 case SND_SOC_DAPM_PRE_PMU:
2011 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2012 break;
2013 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002014 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002015 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002016 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002017 break;
2018 case SND_SOC_DAPM_POST_PMD:
2019 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2020 break;
2021 }
2022 return 0;
2023}
2024
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002025
2026static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002027 struct snd_kcontrol *kcontrol, int event)
2028{
2029 struct snd_soc_codec *codec = w->codec;
Kiran Kandi59a96b12012-01-16 02:20:03 -08002030 u16 tx_dmic_ctl_reg;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002031 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002032 unsigned int dmic;
2033 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002034
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002035 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2036 if (ret < 0) {
2037 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002038 return -EINVAL;
2039 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002040
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002041 switch (dmic) {
2042 case 1:
2043 case 2:
2044 dmic_clk_sel = 0x02;
2045 dmic_clk_en = 0x01;
2046 break;
2047
2048 case 3:
2049 case 4:
2050 dmic_clk_sel = 0x08;
2051 dmic_clk_en = 0x04;
2052 break;
2053
2054 case 5:
2055 case 6:
2056 dmic_clk_sel = 0x20;
2057 dmic_clk_en = 0x10;
2058 break;
2059
2060 default:
2061 pr_err("%s: Invalid DMIC Selection\n", __func__);
2062 return -EINVAL;
2063 }
2064
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002065 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
2066
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002067 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002069 switch (event) {
2070 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002071
2072 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2073 dmic_clk_sel, dmic_clk_sel);
2074
2075 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
2076
2077 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2078 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002079 break;
2080 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002081 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2082 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002083 break;
2084 }
2085 return 0;
2086}
2087
Bradley Rubin229c6a52011-07-12 16:18:48 -07002088static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
2089 struct snd_kcontrol *kcontrol, int event)
2090{
2091 struct snd_soc_codec *codec = w->codec;
2092 const char *filename;
2093 const struct firmware *fw;
2094 int i;
2095 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07002096 int num_anc_slots;
2097 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002098 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07002099 u32 anc_writes_size = 0;
2100 int anc_size_remaining;
2101 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002102 u16 reg;
2103 u8 mask, val, old_val;
2104
2105 pr_debug("%s %d\n", __func__, event);
2106 switch (event) {
2107 case SND_SOC_DAPM_PRE_PMU:
2108
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002109 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07002110
2111 ret = request_firmware(&fw, filename, codec->dev);
2112 if (ret != 0) {
2113 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
2114 ret);
2115 return -ENODEV;
2116 }
2117
Bradley Rubina7096d02011-08-03 18:29:02 -07002118 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07002119 dev_err(codec->dev, "Not enough data\n");
2120 release_firmware(fw);
2121 return -ENOMEM;
2122 }
2123
2124 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07002125 anc_head = (struct anc_header *)(fw->data);
2126 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
2127 anc_size_remaining = fw->size - sizeof(struct anc_header);
2128 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002129
Bradley Rubina7096d02011-08-03 18:29:02 -07002130 if (tabla->anc_slot >= num_anc_slots) {
2131 dev_err(codec->dev, "Invalid ANC slot selected\n");
2132 release_firmware(fw);
2133 return -EINVAL;
2134 }
2135
2136 for (i = 0; i < num_anc_slots; i++) {
2137
2138 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
2139 dev_err(codec->dev, "Invalid register format\n");
2140 release_firmware(fw);
2141 return -EINVAL;
2142 }
2143 anc_writes_size = (u32)(*anc_ptr);
2144 anc_size_remaining -= sizeof(u32);
2145 anc_ptr += 1;
2146
2147 if (anc_writes_size * TABLA_PACKED_REG_SIZE
2148 > anc_size_remaining) {
2149 dev_err(codec->dev, "Invalid register format\n");
2150 release_firmware(fw);
2151 return -ENOMEM;
2152 }
2153
2154 if (tabla->anc_slot == i)
2155 break;
2156
2157 anc_size_remaining -= (anc_writes_size *
2158 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07002159 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07002160 }
2161 if (i == num_anc_slots) {
2162 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07002163 release_firmware(fw);
2164 return -ENOMEM;
2165 }
2166
Bradley Rubina7096d02011-08-03 18:29:02 -07002167 for (i = 0; i < anc_writes_size; i++) {
2168 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07002169 mask, val);
2170 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002171 snd_soc_write(codec, reg, (old_val & ~mask) |
2172 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07002173 }
2174 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002175
2176 break;
2177 case SND_SOC_DAPM_POST_PMD:
2178 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
2179 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
2180 break;
2181 }
2182 return 0;
2183}
2184
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002185/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002186static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2187{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002188 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002189 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2190 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002191
Joonwoo Park03324832012-03-19 19:36:16 -07002192 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002193 if (!tabla->mbhc_polling_active) {
2194 pr_debug("Polling is not active, do not start polling\n");
2195 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002196 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002197 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002198
2199 if (!tabla->no_mic_headset_override) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002200 if (mbhc_state == MBHC_STATE_POTENTIAL) {
2201 pr_debug("%s recovering MBHC state macine\n", __func__);
2202 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
Joonwoo Park03324832012-03-19 19:36:16 -07002203 /* set to max button press threshold */
2204 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2205 0x7F);
2206 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2207 0xFF);
2208 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2209 (TABLA_IS_1_X(tabla_core->version) ?
2210 0x07 : 0x7F));
2211 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2212 0xFF);
2213 /* set to max */
2214 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2215 0x7F);
2216 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2217 0xFF);
2218 }
2219 }
2220
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002221 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2222 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2223 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002224 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002225}
2226
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002227/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002228static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2229{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002230 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2231
Joonwoo Park03324832012-03-19 19:36:16 -07002232 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002233 if (!tabla->mbhc_polling_active) {
2234 pr_debug("polling not active, nothing to pause\n");
2235 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002236 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002237
2238 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002239 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002240}
2241
Joonwoo Park03324832012-03-19 19:36:16 -07002242static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002243{
2244 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2245 u8 reg_mode_val, cur_mode_val;
2246 bool mbhc_was_polling = false;
2247
2248 if (mode)
2249 reg_mode_val = TABLA_CFILT_FAST_MODE;
2250 else
2251 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2252
2253 cur_mode_val = snd_soc_read(codec,
2254 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2255
2256 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002257 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002258 if (tabla->mbhc_polling_active) {
2259 tabla_codec_pause_hs_polling(codec);
2260 mbhc_was_polling = true;
2261 }
2262 snd_soc_update_bits(codec,
2263 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2264 if (mbhc_was_polling)
2265 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002266 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002267 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2268 cur_mode_val, reg_mode_val);
2269 } else {
2270 pr_debug("%s: CFILT Value is already %x\n",
2271 __func__, cur_mode_val);
2272 }
2273}
2274
2275static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2276 u8 cfilt_sel, int inc)
2277{
2278 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2279 u32 *cfilt_cnt_ptr = NULL;
2280 u16 micb_cfilt_reg;
2281
2282 switch (cfilt_sel) {
2283 case TABLA_CFILT1_SEL:
2284 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2285 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2286 break;
2287 case TABLA_CFILT2_SEL:
2288 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2289 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2290 break;
2291 case TABLA_CFILT3_SEL:
2292 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2293 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2294 break;
2295 default:
2296 return; /* should not happen */
2297 }
2298
2299 if (inc) {
2300 if (!(*cfilt_cnt_ptr)++) {
2301 /* Switch CFILT to slow mode if MBHC CFILT being used */
2302 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2303 tabla_codec_switch_cfilt_mode(codec, 0);
2304
2305 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2306 }
2307 } else {
2308 /* check if count not zero, decrement
2309 * then check if zero, go ahead disable cfilter
2310 */
2311 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2312 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2313
2314 /* Switch CFILT to fast mode if MBHC CFILT being used */
2315 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2316 tabla_codec_switch_cfilt_mode(codec, 1);
2317 }
2318 }
2319}
2320
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002321static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2322{
2323 int rc = -EINVAL;
2324 unsigned min_mv, max_mv;
2325
2326 switch (ldoh_v) {
2327 case TABLA_LDOH_1P95_V:
2328 min_mv = 160;
2329 max_mv = 1800;
2330 break;
2331 case TABLA_LDOH_2P35_V:
2332 min_mv = 200;
2333 max_mv = 2200;
2334 break;
2335 case TABLA_LDOH_2P75_V:
2336 min_mv = 240;
2337 max_mv = 2600;
2338 break;
2339 case TABLA_LDOH_2P85_V:
2340 min_mv = 250;
2341 max_mv = 2700;
2342 break;
2343 default:
2344 goto done;
2345 }
2346
2347 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2348 goto done;
2349
2350 for (rc = 4; rc <= 44; rc++) {
2351 min_mv = max_mv * (rc) / 44;
2352 if (min_mv >= cfilt_mv) {
2353 rc -= 4;
2354 break;
2355 }
2356 }
2357done:
2358 return rc;
2359}
2360
2361static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2362{
2363 u8 hph_reg_val = 0;
2364 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2365
2366 return (hph_reg_val & 0x30) ? true : false;
2367}
2368
Joonwoo Parka9444452011-12-08 18:48:27 -08002369static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2370{
2371 u8 hph_reg_val = 0;
2372 if (left)
2373 hph_reg_val = snd_soc_read(codec,
2374 TABLA_A_RX_HPH_L_DAC_CTL);
2375 else
2376 hph_reg_val = snd_soc_read(codec,
2377 TABLA_A_RX_HPH_R_DAC_CTL);
2378
2379 return (hph_reg_val & 0xC0) ? true : false;
2380}
2381
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002382static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2383{
2384 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2385}
2386
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002387/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002388static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2389 int usec)
2390{
2391 int cfilt_k_val;
2392 bool set = true;
2393 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2394
2395 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2396 tabla->mbhc_micbias_switched) {
2397 pr_debug("%s: set mic V to micbias V\n", __func__);
2398 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2399 tabla_turn_onoff_override(codec, true);
2400 while (1) {
2401 cfilt_k_val = tabla_find_k_value(
2402 tabla->pdata->micbias.ldoh_v,
2403 set ? tabla->mbhc_data.micb_mv :
2404 VDDIO_MICBIAS_MV);
2405 snd_soc_update_bits(codec,
2406 tabla->mbhc_bias_regs.cfilt_val,
2407 0xFC, (cfilt_k_val << 2));
2408 if (!set)
2409 break;
2410 usleep_range(usec, usec);
2411 set = false;
2412 }
2413 tabla_turn_onoff_override(codec, false);
2414 }
2415}
2416
2417/* called under codec_resource_lock acquisition */
2418static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2419 int vddio_switch, bool restartpolling,
2420 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002421{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002422 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002423 bool override;
2424 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002425
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002426 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2427 (!checkpolling || tabla->mbhc_polling_active)) {
2428 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002429 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002430 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2431 if (!override)
2432 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002433 /* Adjust threshold if Mic Bias voltage changes */
2434 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002435 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002436 tabla->pdata->micbias.ldoh_v,
2437 VDDIO_MICBIAS_MV);
2438 usleep_range(10000, 10000);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002439 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002440 tabla->mbhc_bias_regs.cfilt_val,
2441 0xFC, (cfilt_k_val << 2));
2442 usleep_range(10000, 10000);
2443 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2444 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2445 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2446 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2447 0xFF);
2448 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2449 __func__);
2450 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002451
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002452 /* enable MIC BIAS Switch to VDDIO */
2453 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2454 0x80, 0x80);
2455 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2456 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002457 if (!override)
2458 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002459 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002460 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002461
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002462 tabla->mbhc_micbias_switched = true;
2463 pr_debug("%s: VDDIO switch enabled\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002464 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2465 if ((!checkpolling || tabla->mbhc_polling_active) &&
2466 restartpolling)
2467 tabla_codec_pause_hs_polling(codec);
2468 /* Reprogram thresholds */
2469 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2470 cfilt_k_val = tabla_find_k_value(
2471 tabla->pdata->micbias.ldoh_v,
2472 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002473 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002474 tabla->mbhc_bias_regs.cfilt_val,
2475 0xFC, (cfilt_k_val << 2));
2476 usleep_range(10000, 10000);
2477 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2478 tabla->mbhc_data.v_ins_hu & 0xFF);
2479 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2480 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2481 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2482 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002483 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002484
2485 /* Disable MIC BIAS Switch to VDDIO */
2486 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2487 0x80, 0x00);
2488 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2489 0x10, 0x00);
2490
2491 if ((!checkpolling || tabla->mbhc_polling_active) &&
2492 restartpolling)
2493 tabla_codec_start_hs_polling(codec);
2494
2495 tabla->mbhc_micbias_switched = false;
2496 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002497 }
2498}
2499
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002500static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2501 int vddio_switch)
2502{
2503 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2504}
2505
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002506static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2507 struct snd_kcontrol *kcontrol, int event)
2508{
2509 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002510 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2511 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002512 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002513 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002514 char *internal1_text = "Internal1";
2515 char *internal2_text = "Internal2";
2516 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517
2518 pr_debug("%s %d\n", __func__, event);
2519 switch (w->reg) {
2520 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002521 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002522 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002523 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002524 break;
2525 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002526 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002527 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002528 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002529 break;
2530 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002531 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002532 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002533 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002534 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002535 case TABLA_1_A_MICB_4_CTL:
2536 case TABLA_2_A_MICB_4_CTL:
2537 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002538 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002539 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002540 break;
2541 default:
2542 pr_err("%s: Error, invalid micbias register\n", __func__);
2543 return -EINVAL;
2544 }
2545
2546 switch (event) {
2547 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002548 /* Decide whether to switch the micbias for MBHC */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002549 if (w->reg == tabla->mbhc_bias_regs.ctl_reg) {
2550 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002551 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002552 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2553 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002554
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002555 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002556 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002557
2558 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002559 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002560 else if (strnstr(w->name, internal2_text, 30))
2561 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2562 else if (strnstr(w->name, internal3_text, 30))
2563 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2564
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002565 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002566 case SND_SOC_DAPM_POST_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002567
2568 usleep_range(20000, 20000);
2569
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002570 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002571 tabla->mbhc_cfg.micbias == micb_line) {
2572 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002573 tabla_codec_pause_hs_polling(codec);
2574 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002575 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002576 }
2577 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002578
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002579 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park03324832012-03-19 19:36:16 -07002580 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002581 tabla_is_hph_pa_on(codec)) {
2582 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002583 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002584 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2585 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002586
Bradley Rubin229c6a52011-07-12 16:18:48 -07002587 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002588 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002589 else if (strnstr(w->name, internal2_text, 30))
2590 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2591 else if (strnstr(w->name, internal3_text, 30))
2592 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2593
Patrick Lai3043fba2011-08-01 14:15:57 -07002594 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002595 break;
2596 }
2597
2598 return 0;
2599}
2600
Kiran Kandid8cf5212012-03-02 15:34:53 -08002601
2602static void tx_hpf_corner_freq_callback(struct work_struct *work)
2603{
2604 struct delayed_work *hpf_delayed_work;
2605 struct hpf_work *hpf_work;
2606 struct tabla_priv *tabla;
2607 struct snd_soc_codec *codec;
2608 u16 tx_mux_ctl_reg;
2609 u8 hpf_cut_of_freq;
2610
2611 hpf_delayed_work = to_delayed_work(work);
2612 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2613 tabla = hpf_work->tabla;
2614 codec = hpf_work->tabla->codec;
2615 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2616
2617 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2618 (hpf_work->decimator - 1) * 8;
2619
2620 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
2621 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
2622
2623 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
2624}
2625
2626#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
2627#define CF_MIN_3DB_4HZ 0x0
2628#define CF_MIN_3DB_75HZ 0x1
2629#define CF_MIN_3DB_150HZ 0x2
2630
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
2632 struct snd_kcontrol *kcontrol, int event)
2633{
2634 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08002635 unsigned int decimator;
2636 char *dec_name = NULL;
2637 char *widget_name = NULL;
2638 char *temp;
2639 int ret = 0;
2640 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
2641 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002642 int offset;
2643
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644
2645 pr_debug("%s %d\n", __func__, event);
2646
Kiran Kandid8cf5212012-03-02 15:34:53 -08002647 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
2648 if (!widget_name)
2649 return -ENOMEM;
2650 temp = widget_name;
2651
2652 dec_name = strsep(&widget_name, " ");
2653 widget_name = temp;
2654 if (!dec_name) {
2655 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
2656 ret = -EINVAL;
2657 goto out;
2658 }
2659
2660 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
2661 if (ret < 0) {
2662 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
2663 ret = -EINVAL;
2664 goto out;
2665 }
2666
2667 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
2668 w->name, dec_name, decimator);
2669
Kuirong Wange9c8a222012-03-28 16:24:09 -07002670 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002671 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002672 offset = 0;
2673 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002674 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002675 offset = 8;
2676 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002677 pr_err("%s: Error, incorrect dec\n", __func__);
2678 return -EINVAL;
2679 }
2680
Kiran Kandid8cf5212012-03-02 15:34:53 -08002681 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
2682 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
2683
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002684 switch (event) {
2685 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002686
2687 // Enableable TX digital mute */
2688 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002690 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
2691 1 << w->shift);
2692 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08002693
2694 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
2695
2696 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
2697
2698 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
2699 dec_hpf_cut_of_freq;
2700
2701 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
2702
2703 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
2704 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2705 CF_MIN_3DB_150HZ << 4);
2706 }
2707
2708 /* enable HPF */
2709 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
2710
2711 break;
2712
2713 case SND_SOC_DAPM_POST_PMU:
2714
2715 /* Disable TX digital mute */
2716 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
2717
2718 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
2719 CF_MIN_3DB_150HZ) {
2720
2721 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
2722 msecs_to_jiffies(300));
2723 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07002724 /* apply the digital gain after the decimator is enabled*/
2725 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2726 snd_soc_write(codec,
2727 tx_digital_gain_reg[w->shift + offset],
2728 snd_soc_read(codec,
2729 tx_digital_gain_reg[w->shift + offset])
2730 );
2731
Kiran Kandid8cf5212012-03-02 15:34:53 -08002732 break;
2733
2734 case SND_SOC_DAPM_PRE_PMD:
2735
2736 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2737 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
2738 break;
2739
2740 case SND_SOC_DAPM_POST_PMD:
2741
2742 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
2743 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2744 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
2745
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002746 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002747 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08002748out:
2749 kfree(widget_name);
2750 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751}
2752
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002753static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002754 struct snd_kcontrol *kcontrol, int event)
2755{
2756 struct snd_soc_codec *codec = w->codec;
2757
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002758 pr_debug("%s %d %s\n", __func__, event, w->name);
2759
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002760 switch (event) {
2761 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002762 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2763 1 << w->shift, 1 << w->shift);
2764 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2765 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002766 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002767 case SND_SOC_DAPM_POST_PMU:
2768 /* apply the digital gain after the interpolator is enabled*/
2769 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2770 snd_soc_write(codec,
2771 rx_digital_gain_reg[w->shift],
2772 snd_soc_read(codec,
2773 rx_digital_gain_reg[w->shift])
2774 );
2775 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002776 }
2777 return 0;
2778}
2779
Bradley Rubin229c6a52011-07-12 16:18:48 -07002780static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
2781 struct snd_kcontrol *kcontrol, int event)
2782{
2783 switch (event) {
2784 case SND_SOC_DAPM_POST_PMU:
2785 case SND_SOC_DAPM_POST_PMD:
2786 usleep_range(1000, 1000);
2787 break;
2788 }
2789 return 0;
2790}
2791
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002792static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
2793 struct snd_kcontrol *kcontrol, int event)
2794{
2795 struct snd_soc_codec *codec = w->codec;
2796
2797 pr_debug("%s %d\n", __func__, event);
2798
2799 switch (event) {
2800 case SND_SOC_DAPM_PRE_PMU:
2801 tabla_enable_rx_bias(codec, 1);
2802 break;
2803 case SND_SOC_DAPM_POST_PMD:
2804 tabla_enable_rx_bias(codec, 0);
2805 break;
2806 }
2807 return 0;
2808}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002809static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
2810 struct snd_kcontrol *kcontrol, int event)
2811{
2812 struct snd_soc_codec *codec = w->codec;
2813
2814 pr_debug("%s %s %d\n", __func__, w->name, event);
2815
2816 switch (event) {
2817 case SND_SOC_DAPM_PRE_PMU:
2818 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
2819 break;
2820 case SND_SOC_DAPM_POST_PMD:
2821 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
2822 break;
2823 }
2824 return 0;
2825}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002826
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002827static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
2828 struct snd_soc_jack *jack, int status,
2829 int mask)
2830{
2831 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07002832 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002833}
2834
Patrick Lai49efeac2011-11-03 11:01:12 -07002835static void hphocp_off_report(struct tabla_priv *tabla,
2836 u32 jack_status, int irq)
2837{
2838 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07002839 if (!tabla) {
2840 pr_err("%s: Bad tabla private data\n", __func__);
2841 return;
2842 }
Patrick Lai49efeac2011-11-03 11:01:12 -07002843
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002844 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07002845 codec = tabla->codec;
2846 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07002847 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002848 if (tabla->mbhc_cfg.headset_jack)
2849 tabla_snd_soc_jack_report(tabla,
2850 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002851 tabla->hph_status,
2852 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08002853 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
2854 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08002855 /* reset retry counter as PA is turned off signifying
2856 * start of new OCP detection session
2857 */
2858 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
2859 tabla->hphlocp_cnt = 0;
2860 else
2861 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302862 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07002863 }
2864}
2865
2866static void hphlocp_off_report(struct work_struct *work)
2867{
2868 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2869 hphlocp_work);
2870 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
2871}
2872
2873static void hphrocp_off_report(struct work_struct *work)
2874{
2875 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2876 hphrocp_work);
2877 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
2878}
2879
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002880static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
2881 struct snd_kcontrol *kcontrol, int event)
2882{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002883 struct snd_soc_codec *codec = w->codec;
2884 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2885 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002886 pr_debug("%s: event = %d\n", __func__, event);
2887
2888 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002889 case SND_SOC_DAPM_PRE_PMU:
2890 mbhc_micb_ctl_val = snd_soc_read(codec,
2891 tabla->mbhc_bias_regs.ctl_reg);
2892
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002893 if (!(mbhc_micb_ctl_val & 0x80)) {
2894 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002895 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002896 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2897 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002898 break;
2899
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002900 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07002901 /* schedule work is required because at the time HPH PA DAPM
2902 * event callback is called by DAPM framework, CODEC dapm mutex
2903 * would have been locked while snd_soc_jack_report also
2904 * attempts to acquire same lock.
2905 */
Joonwoo Parka9444452011-12-08 18:48:27 -08002906 if (w->shift == 5) {
2907 clear_bit(TABLA_HPHL_PA_OFF_ACK,
2908 &tabla->hph_pa_dac_state);
2909 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
2910 &tabla->hph_pa_dac_state);
2911 if (tabla->hph_status & SND_JACK_OC_HPHL)
2912 schedule_work(&tabla->hphlocp_work);
2913 } else if (w->shift == 4) {
2914 clear_bit(TABLA_HPHR_PA_OFF_ACK,
2915 &tabla->hph_pa_dac_state);
2916 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
2917 &tabla->hph_pa_dac_state);
2918 if (tabla->hph_status & SND_JACK_OC_HPHR)
2919 schedule_work(&tabla->hphrocp_work);
2920 }
2921
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002922 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07002923 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002924 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002925
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002926 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
2927 w->name);
2928 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002929 break;
2930 }
2931 return 0;
2932}
2933
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002934static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002935 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002936{
2937 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002938 unsigned int cfilt;
2939
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002940 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002941 case TABLA_MICBIAS1:
2942 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
2943 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
2944 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
2945 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
2946 break;
2947 case TABLA_MICBIAS2:
2948 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
2949 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
2950 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
2951 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
2952 break;
2953 case TABLA_MICBIAS3:
2954 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
2955 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
2956 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
2957 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
2958 break;
2959 case TABLA_MICBIAS4:
2960 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002961 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
2962 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
2963 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002964 break;
2965 default:
2966 /* Should never reach here */
2967 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07002968 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002969 }
2970
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002971 micbias_regs->cfilt_sel = cfilt;
2972
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002973 switch (cfilt) {
2974 case TABLA_CFILT1_SEL:
2975 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
2976 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002977 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002978 break;
2979 case TABLA_CFILT2_SEL:
2980 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
2981 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002982 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002983 break;
2984 case TABLA_CFILT3_SEL:
2985 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
2986 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002987 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002988 break;
2989 }
2990}
Santosh Mardie15e2302011-11-15 10:39:23 +05302991static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
2992 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
2993 4, 0, NULL, 0),
2994 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
2995 0, NULL, 0),
2996};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002997
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002998static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
2999 struct snd_kcontrol *kcontrol, int event)
3000{
3001 struct snd_soc_codec *codec = w->codec;
3002
3003 pr_debug("%s %s %d\n", __func__, w->name, event);
3004
3005 switch (event) {
3006 case SND_SOC_DAPM_PRE_PMU:
3007 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3008 break;
3009
3010 case SND_SOC_DAPM_POST_PMD:
3011 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3012 break;
3013 }
3014 return 0;
3015}
3016
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003017static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
3018 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303019 0, tabla_codec_enable_micbias,
3020 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3021 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003022};
3023
3024static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
3025 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303026 0, tabla_codec_enable_micbias,
3027 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3028 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003029};
3030
Santosh Mardie15e2302011-11-15 10:39:23 +05303031static const struct snd_soc_dapm_route audio_i2s_map[] = {
3032 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3033 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3034 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3035 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3036 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3037
3038 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3039 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3040 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3041 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3042};
3043
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003044static const struct snd_soc_dapm_route audio_map[] = {
3045 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003046
3047 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
3048 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
3049
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003050 {"SLIM TX2", NULL, "SLIM TX2 MUX"},
3051 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3052
3053 {"SLIM TX3", NULL, "SLIM TX3 MUX"},
3054 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003055 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3056 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3057 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3058 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3059 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3060 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3061 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003062
3063 {"SLIM TX4", NULL, "SLIM TX4 MUX"},
3064 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3065
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003066 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
3067 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003068 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3069 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3070 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3071 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3072 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3073 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3074 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003075
3076 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
3077 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3078
3079 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
3080 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003081 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003082 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3083 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003084 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3085 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003086 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3087 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003088 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3089 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003090 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3091 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3092 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3093 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3094 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3095 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3096 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003097
3098 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003099 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3100 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3101 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003102 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003103 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3104 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003105 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3106 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3107 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3108 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003109
Kiran Kandi3426e512011-09-13 22:50:10 -07003110 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
3111 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3112 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3113 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3114 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3115 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3116 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3117 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3118 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3119 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3120 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3121
3122 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
3123 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3124 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3125 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3126 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3127 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3128 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3129 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3130 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3131 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3132 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3133
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003134 /* Earpiece (RX MIX1) */
3135 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003136 {"EAR PA", NULL, "EAR_PA_MIXER"},
3137 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003138 {"DAC1", NULL, "CP"},
3139
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003140 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3141 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003142 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003143
3144 /* Headset (RX MIX1 and RX MIX2) */
3145 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003146 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003147
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003148 {"HPHL", NULL, "HPHL_PA_MIXER"},
3149 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3150
3151 {"HPHR", NULL, "HPHR_PA_MIXER"},
3152 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003153
3154 {"HPHL DAC", NULL, "CP"},
3155 {"HPHR DAC", NULL, "CP"},
3156
3157 {"ANC", NULL, "ANC1 MUX"},
3158 {"ANC", NULL, "ANC2 MUX"},
3159 {"ANC1 MUX", "ADC1", "ADC1"},
3160 {"ANC1 MUX", "ADC2", "ADC2"},
3161 {"ANC1 MUX", "ADC3", "ADC3"},
3162 {"ANC1 MUX", "ADC4", "ADC4"},
3163 {"ANC2 MUX", "ADC1", "ADC1"},
3164 {"ANC2 MUX", "ADC2", "ADC2"},
3165 {"ANC2 MUX", "ADC3", "ADC3"},
3166 {"ANC2 MUX", "ADC4", "ADC4"},
3167
Bradley Rubine1d08622011-07-20 18:01:35 -07003168 {"ANC", NULL, "CDC_CONN"},
3169
Bradley Rubin229c6a52011-07-12 16:18:48 -07003170 {"DAC1", "Switch", "RX1 CHAIN"},
3171 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003172 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003173
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003174 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3175 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3176 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3177 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3178 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003179
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003180 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3181 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3182 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3183 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3184 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3185 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3186 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3187 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3188 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3189 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003190
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003191 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003192 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3193
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003194 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3195 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003196 {"RX1 CHAIN", NULL, "ANC"},
3197 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003198
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003199 {"CP", NULL, "RX_BIAS"},
3200 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3201 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3202 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3203 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003204 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003205
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003206 {"RX1 MIX1", NULL, "COMP1_CLK"},
3207 {"RX2 MIX1", NULL, "COMP1_CLK"},
3208 {"RX3 MIX1", NULL, "COMP2_CLK"},
3209 {"RX5 MIX1", NULL, "COMP2_CLK"},
3210
3211
Bradley Rubin229c6a52011-07-12 16:18:48 -07003212 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3213 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
3214 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3215 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003216 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3217 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3218 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3219 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3220 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3221 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3222 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3223 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003224 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3225 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003226 {"RX1 MIX2", NULL, "RX1 MIX1"},
3227 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3228 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3229 {"RX2 MIX2", NULL, "RX2 MIX1"},
3230 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3231 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3232 {"RX3 MIX2", NULL, "RX3 MIX1"},
3233 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3234 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003235
Bradley Rubin229c6a52011-07-12 16:18:48 -07003236 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3237 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303238 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3239 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003240 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3241 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003242 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
3243 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3244 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303245 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3246 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003247 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3248 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003249 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
3250 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3251 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303252 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3253 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003254 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3255 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003256 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003257 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3258 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303259 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3260 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003261 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3262 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003263 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003264 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3265 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303266 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3267 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003268 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3269 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003270 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003271 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3272 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303273 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3274 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003275 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3276 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003277 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003278 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3279 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303280 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3281 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003282 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3283 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003284 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003285 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3286 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303287 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
3288 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003289 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3290 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003291 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003292 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3293 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303294 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3295 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003296 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3297 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003298 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003299 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
3300 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303301 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
3302 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003303 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
3304 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003305 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003306 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
3307 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303308 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
3309 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003310 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
3311 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003312 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003313 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
3314 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303315 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
3316 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003317 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
3318 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003319 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003320 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
3321 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303322 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
3323 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003324 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
3325 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003326 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003327 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
3328 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303329 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
3330 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003331 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
3332 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003333 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003334 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
3335 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
3336 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
3337 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
3338 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
3339 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003340
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003341 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003342 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003343 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003344 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003345 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003346 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003347 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003348 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003349 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003350 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003351 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003352 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003353 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003354 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003355 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003356 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003357 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003358 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003359 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003360 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003361 {"DEC7 MUX", "DMIC6", "DMIC6"},
3362 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003363 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003364 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003365 {"DEC8 MUX", "DMIC2", "DMIC2"},
3366 {"DEC8 MUX", "DMIC5", "DMIC5"},
3367 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003368 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003369 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003370 {"DEC9 MUX", "DMIC4", "DMIC4"},
3371 {"DEC9 MUX", "DMIC5", "DMIC5"},
3372 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003373 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003374 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003375 {"DEC10 MUX", "DMIC3", "DMIC3"},
3376 {"DEC10 MUX", "DMIC6", "DMIC6"},
3377 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003378 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003379 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003380
3381 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003382 {"ADC1", NULL, "AMIC1"},
3383 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003384 {"ADC3", NULL, "AMIC3"},
3385 {"ADC4", NULL, "AMIC4"},
3386 {"ADC5", NULL, "AMIC5"},
3387 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003388
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003389 /* AUX PGA Connections */
3390 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3391 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3392 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3393 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3394 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3395 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3396 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3397 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3398 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3399 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3400 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3401 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3402 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3403 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3404 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3405 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3406 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3407 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3408 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3409 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3410 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3411 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3412 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3413 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3414 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3415 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3416 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3417 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3418 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3419 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3420 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3421 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3422 {"AUX_PGA_Left", NULL, "AMIC5"},
3423 {"AUX_PGA_Right", NULL, "AMIC6"},
3424
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003425 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003426 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
3427 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
3428 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
3429 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
3430 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003431 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003432 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
3433 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
3434 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
3435 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003436
3437 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
3438 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
3439 {"MIC BIAS1 External", NULL, "LDO_H"},
3440 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
3441 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
3442 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
3443 {"MIC BIAS2 External", NULL, "LDO_H"},
3444 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
3445 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
3446 {"MIC BIAS3 External", NULL, "LDO_H"},
3447 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003448};
3449
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003450static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
3451
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003452 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003453 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3454
3455 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
3456
3457 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003458 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003459 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
3460
3461 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3462 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3463
3464 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3465 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
3466 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
3467};
3468
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003469
3470static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
3471
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003472 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003473 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3474
3475 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
3476
3477 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
3478
3479 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3480 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3481
3482 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3483};
3484
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003485static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
3486{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003487 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303488 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003489
3490 if (TABLA_IS_1_X(tabla_core->version)) {
3491 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
3492 if (tabla_1_reg_readable[i] == reg)
3493 return 1;
3494 }
3495 } else {
3496 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
3497 if (tabla_2_reg_readable[i] == reg)
3498 return 1;
3499 }
3500 }
3501
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003502 return tabla_reg_readable[reg];
3503}
Kuirong Wange9c8a222012-03-28 16:24:09 -07003504static bool tabla_is_digital_gain_register(unsigned int reg)
3505{
3506 bool rtn = false;
3507 switch (reg) {
3508 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
3509 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
3510 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
3511 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
3512 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
3513 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
3514 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
3515 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
3516 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
3517 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
3518 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
3519 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
3520 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
3521 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
3522 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
3523 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
3524 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
3525 rtn = true;
3526 break;
3527 default:
3528 break;
3529 }
3530 return rtn;
3531}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003532static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
3533{
3534 /* Registers lower than 0x100 are top level registers which can be
3535 * written by the Tabla core driver.
3536 */
3537
3538 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
3539 return 1;
3540
Ben Romberger1f045a72011-11-04 10:14:57 -07003541 /* IIR Coeff registers are not cacheable */
3542 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
3543 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
3544 return 1;
3545
Kuirong Wange9c8a222012-03-28 16:24:09 -07003546 /* Digital gain register is not cacheable so we have to write
3547 * the setting even it is the same
3548 */
3549 if (tabla_is_digital_gain_register(reg))
3550 return 1;
3551
Joonwoo Parkab2c5872012-05-03 15:16:02 -07003552 /* HPH status registers */
3553 if (reg == TABLA_A_RX_HPH_L_STATUS || reg == TABLA_A_RX_HPH_R_STATUS)
3554 return 1;
3555
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003556 return 0;
3557}
3558
3559#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
3560static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
3561 unsigned int value)
3562{
3563 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003564 BUG_ON(reg > TABLA_MAX_REGISTER);
3565
3566 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003567 ret = snd_soc_cache_write(codec, reg, value);
3568 if (ret != 0)
3569 dev_err(codec->dev, "Cache write to %x failed: %d\n",
3570 reg, ret);
3571 }
3572
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303573 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003574}
3575static unsigned int tabla_read(struct snd_soc_codec *codec,
3576 unsigned int reg)
3577{
3578 unsigned int val;
3579 int ret;
3580
3581 BUG_ON(reg > TABLA_MAX_REGISTER);
3582
3583 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
3584 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003585 ret = snd_soc_cache_read(codec, reg, &val);
3586 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003587 return val;
3588 } else
3589 dev_err(codec->dev, "Cache read from %x failed: %d\n",
3590 reg, ret);
3591 }
3592
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303593 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003594 return val;
3595}
3596
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003597static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
3598{
3599 s16 v_ins;
3600 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3601 tabla->mbhc_micbias_switched)
3602 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
3603 (s16)tabla->mbhc_data.adj_v_ins_h;
3604 else
3605 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
3606 (s16)tabla->mbhc_data.v_ins_h;
3607 return v_ins;
3608}
3609
3610static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
3611{
3612 s16 v_hs_max;
3613 struct tabla_mbhc_plug_type_cfg *plug_type;
3614
3615 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
3616 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3617 tabla->mbhc_micbias_switched)
3618 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
3619 else
3620 v_hs_max = plug_type->v_hs_max;
3621 return v_hs_max;
3622}
3623
Bradley Rubincb1e2732011-06-23 16:49:20 -07003624static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
3625{
Joonwoo Parkc0672392012-01-11 11:03:14 -08003626 u8 *n_ready, *n_cic;
Joonwoo Park0976d012011-12-22 11:48:18 -08003627 struct tabla_mbhc_btn_detect_cfg *btn_det;
3628 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003629 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
3630
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003631 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003632
Joonwoo Park0976d012011-12-22 11:48:18 -08003633 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003634 v_ins_hu & 0xFF);
Joonwoo Park0976d012011-12-22 11:48:18 -08003635 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003636 (v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003637
Joonwoo Park0976d012011-12-22 11:48:18 -08003638 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
3639 tabla->mbhc_data.v_b1_hu & 0xFF);
3640 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
3641 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
3642
3643 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
3644 tabla->mbhc_data.v_b1_h & 0xFF);
3645 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
3646 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
3647
3648 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
3649 tabla->mbhc_data.v_brh & 0xFF);
3650 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
3651 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
3652
3653 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
3654 tabla->mbhc_data.v_brl & 0xFF);
3655 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
3656 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
3657
Joonwoo Parkc0672392012-01-11 11:03:14 -08003658 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003659 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08003660 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003661 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
3662 tabla->mbhc_data.npoll);
3663 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
3664 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08003665 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003666 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
3667 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003668}
3669
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003670static int tabla_startup(struct snd_pcm_substream *substream,
3671 struct snd_soc_dai *dai)
3672{
Kuirong Wanga545e722012-02-06 19:12:54 -08003673 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003674 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3675 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003676 if ((tabla_core != NULL) &&
3677 (tabla_core->dev != NULL) &&
3678 (tabla_core->dev->parent != NULL))
3679 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003680
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003681 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003682}
3683
3684static void tabla_shutdown(struct snd_pcm_substream *substream,
3685 struct snd_soc_dai *dai)
3686{
Kuirong Wanga545e722012-02-06 19:12:54 -08003687 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003688 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3689 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003690 if ((tabla_core != NULL) &&
3691 (tabla_core->dev != NULL) &&
3692 (tabla_core->dev->parent != NULL)) {
3693 pm_runtime_mark_last_busy(tabla_core->dev->parent);
3694 pm_runtime_put(tabla_core->dev->parent);
3695 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003696}
3697
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003698int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003699{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003700 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3701
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003702 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
3703 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003704 if (dapm)
3705 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003706 if (mclk_enable) {
3707 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003708
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003709 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07003710 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003711 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003712 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003713 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003714 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003715 tabla_codec_calibrate_hs_polling(codec);
3716 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303717 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003718 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303719 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003720 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303721 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003722 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003723 } else {
3724
3725 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003726 if (dapm)
3727 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003728 pr_err("Error, MCLK already diabled\n");
3729 return -EINVAL;
3730 }
3731 tabla->mclk_enabled = false;
3732
3733 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003734 tabla_codec_pause_hs_polling(codec);
3735 tabla_codec_disable_clock_block(codec);
3736 tabla_codec_enable_bandgap(codec,
3737 TABLA_BANDGAP_MBHC_MODE);
3738 tabla_enable_rx_bias(codec, 1);
3739 tabla_codec_enable_clock_block(codec, 1);
3740 tabla_codec_calibrate_hs_polling(codec);
3741 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003742 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
3743 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303744 } else {
3745 tabla_codec_disable_clock_block(codec);
3746 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003747 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003748 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003749 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003750 if (dapm)
3751 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003752 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003753}
3754
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003755static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
3756 int clk_id, unsigned int freq, int dir)
3757{
3758 pr_debug("%s\n", __func__);
3759 return 0;
3760}
3761
3762static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3763{
Santosh Mardie15e2302011-11-15 10:39:23 +05303764 u8 val = 0;
3765 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3766
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003767 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05303768 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3769 case SND_SOC_DAIFMT_CBS_CFS:
3770 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303771 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003772 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303773 snd_soc_update_bits(dai->codec,
3774 TABLA_A_CDC_CLK_TX_I2S_CTL,
3775 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003776 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303777 snd_soc_update_bits(dai->codec,
3778 TABLA_A_CDC_CLK_RX_I2S_CTL,
3779 TABLA_I2S_MASTER_MODE_MASK, 0);
3780 }
3781 break;
3782 case SND_SOC_DAIFMT_CBM_CFM:
3783 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303784 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303785 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003786 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303787 snd_soc_update_bits(dai->codec,
3788 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003789 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303790 snd_soc_update_bits(dai->codec,
3791 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
3792 }
3793 break;
3794 default:
3795 return -EINVAL;
3796 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003797 return 0;
3798}
3799
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003800static int tabla_set_channel_map(struct snd_soc_dai *dai,
3801 unsigned int tx_num, unsigned int *tx_slot,
3802 unsigned int rx_num, unsigned int *rx_slot)
3803
3804{
3805 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3806 u32 i = 0;
3807 if (!tx_slot && !rx_slot) {
3808 pr_err("%s: Invalid\n", __func__);
3809 return -EINVAL;
3810 }
3811 pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
3812
Neema Shettyd3a89262012-02-16 10:23:50 -08003813 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003814 for (i = 0; i < rx_num; i++) {
3815 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
3816 tabla->dai[dai->id - 1].ch_act = 0;
3817 tabla->dai[dai->id - 1].ch_tot = rx_num;
3818 }
Neema Shetty3fb1b802012-04-27 13:53:24 -07003819 } else if (dai->id == AIF1_CAP || dai->id == AIF2_CAP ||
3820 dai->id == AIF3_CAP) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003821 for (i = 0; i < tx_num; i++) {
3822 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
3823 tabla->dai[dai->id - 1].ch_act = 0;
3824 tabla->dai[dai->id - 1].ch_tot = tx_num;
3825 }
3826 }
3827 return 0;
3828}
3829
3830static int tabla_get_channel_map(struct snd_soc_dai *dai,
3831 unsigned int *tx_num, unsigned int *tx_slot,
3832 unsigned int *rx_num, unsigned int *rx_slot)
3833
3834{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303835 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003836
3837 u32 cnt = 0;
3838 u32 tx_ch[SLIM_MAX_TX_PORTS];
3839 u32 rx_ch[SLIM_MAX_RX_PORTS];
3840
3841 if (!rx_slot && !tx_slot) {
3842 pr_err("%s: Invalid\n", __func__);
3843 return -EINVAL;
3844 }
3845 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
3846 /* for virtual port, codec driver needs to do
3847 * housekeeping, for now should be ok
3848 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303849 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003850 if (dai->id == AIF1_PB) {
3851 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3852 while (cnt < *rx_num) {
3853 rx_slot[cnt] = rx_ch[cnt];
3854 cnt++;
3855 }
3856 } else if (dai->id == AIF1_CAP) {
3857 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3858 while (cnt < *tx_num) {
3859 tx_slot[cnt] = tx_ch[6 + cnt];
3860 cnt++;
3861 }
Neema Shettyd3a89262012-02-16 10:23:50 -08003862 } else if (dai->id == AIF2_PB) {
3863 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3864 while (cnt < *rx_num) {
3865 rx_slot[cnt] = rx_ch[5 + cnt];
3866 cnt++;
3867 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003868 } else if (dai->id == AIF2_CAP) {
3869 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3870 tx_slot[0] = tx_ch[cnt];
3871 tx_slot[1] = tx_ch[1 + cnt];
Kiran Kandi323d7102012-04-18 19:56:14 -07003872 tx_slot[2] = tx_ch[5 + cnt];
Kiran Kandie408b842012-05-17 19:48:04 -07003873 tx_slot[3] = tx_ch[3 + cnt];
Neema Shetty3fb1b802012-04-27 13:53:24 -07003874 } else if (dai->id == AIF3_CAP) {
3875 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3876 tx_slot[cnt] = tx_ch[2 + cnt];
3877 tx_slot[cnt + 1] = tx_ch[4 + cnt];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003878 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003879
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003880 return 0;
3881}
3882
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003883static int tabla_hw_params(struct snd_pcm_substream *substream,
3884 struct snd_pcm_hw_params *params,
3885 struct snd_soc_dai *dai)
3886{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003887 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05303888 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07003889 u8 path, shift;
3890 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003891 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003892 u32 compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003893
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003894 pr_debug("%s: DAI-ID %x rate %d\n", __func__, dai->id,
3895 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003896
3897 switch (params_rate(params)) {
3898 case 8000:
3899 tx_fs_rate = 0x00;
3900 rx_fs_rate = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003901 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003902 break;
3903 case 16000:
3904 tx_fs_rate = 0x01;
3905 rx_fs_rate = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003906 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003907 break;
3908 case 32000:
3909 tx_fs_rate = 0x02;
3910 rx_fs_rate = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003911 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003912 break;
3913 case 48000:
3914 tx_fs_rate = 0x03;
3915 rx_fs_rate = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003916 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003917 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003918 case 96000:
3919 tx_fs_rate = 0x04;
3920 rx_fs_rate = 0x80;
3921 compander_fs = COMPANDER_FS_96KHZ;
3922 break;
3923 case 192000:
3924 tx_fs_rate = 0x05;
3925 rx_fs_rate = 0xA0;
3926 compander_fs = COMPANDER_FS_192KHZ;
3927 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003928 default:
3929 pr_err("%s: Invalid sampling rate %d\n", __func__,
3930 params_rate(params));
3931 return -EINVAL;
3932 }
3933
3934
3935 /**
3936 * If current dai is a tx dai, set sample rate to
3937 * all the txfe paths that are currently not active
3938 */
Neema Shetty3fb1b802012-04-27 13:53:24 -07003939 if ((dai->id == AIF1_CAP) || (dai->id == AIF2_CAP) ||
3940 (dai->id == AIF3_CAP)) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003941
3942 tx_state = snd_soc_read(codec,
3943 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
3944
3945 for (path = 1, shift = 0;
3946 path <= NUM_DECIMATORS; path++, shift++) {
3947
3948 if (path == BITS_PER_REG + 1) {
3949 shift = 0;
3950 tx_state = snd_soc_read(codec,
3951 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
3952 }
3953
3954 if (!(tx_state & (1 << shift))) {
3955 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
3956 + (BITS_PER_REG*(path-1));
3957 snd_soc_update_bits(codec, tx_fs_reg,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003958 0x07, tx_fs_rate);
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003959 }
3960 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303961 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303962 switch (params_format(params)) {
3963 case SNDRV_PCM_FORMAT_S16_LE:
3964 snd_soc_update_bits(codec,
3965 TABLA_A_CDC_CLK_TX_I2S_CTL,
3966 0x20, 0x20);
3967 break;
3968 case SNDRV_PCM_FORMAT_S32_LE:
3969 snd_soc_update_bits(codec,
3970 TABLA_A_CDC_CLK_TX_I2S_CTL,
3971 0x20, 0x00);
3972 break;
3973 default:
3974 pr_err("invalid format\n");
3975 break;
3976 }
3977 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003978 0x07, tx_fs_rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003979 } else {
3980 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05303981 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003982 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003983 /**
3984 * TODO: Need to handle case where same RX chain takes 2 or more inputs
3985 * with varying sample rates
3986 */
3987
3988 /**
3989 * If current dai is a rx dai, set sample rate to
3990 * all the rx paths that are currently not active
3991 */
Neema Shettyd3a89262012-02-16 10:23:50 -08003992 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003993
3994 rx_state = snd_soc_read(codec,
3995 TABLA_A_CDC_CLK_RX_B1_CTL);
3996
3997 for (path = 1, shift = 0;
3998 path <= NUM_INTERPOLATORS; path++, shift++) {
3999
4000 if (!(rx_state & (1 << shift))) {
4001 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
4002 + (BITS_PER_REG*(path-1));
4003 snd_soc_update_bits(codec, rx_fs_reg,
4004 0xE0, rx_fs_rate);
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004005 if (comp_rx_path[shift] < COMPANDER_MAX)
4006 tabla->comp_fs[comp_rx_path[shift]]
4007 = compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004008 }
4009 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304010 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304011 switch (params_format(params)) {
4012 case SNDRV_PCM_FORMAT_S16_LE:
4013 snd_soc_update_bits(codec,
4014 TABLA_A_CDC_CLK_RX_I2S_CTL,
4015 0x20, 0x20);
4016 break;
4017 case SNDRV_PCM_FORMAT_S32_LE:
4018 snd_soc_update_bits(codec,
4019 TABLA_A_CDC_CLK_RX_I2S_CTL,
4020 0x20, 0x00);
4021 break;
4022 default:
4023 pr_err("invalid format\n");
4024 break;
4025 }
4026 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
4027 0x03, (rx_fs_rate >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004028 } else {
4029 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304030 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004031 }
4032
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004033 return 0;
4034}
4035
4036static struct snd_soc_dai_ops tabla_dai_ops = {
4037 .startup = tabla_startup,
4038 .shutdown = tabla_shutdown,
4039 .hw_params = tabla_hw_params,
4040 .set_sysclk = tabla_set_dai_sysclk,
4041 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004042 .set_channel_map = tabla_set_channel_map,
4043 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004044};
4045
4046static struct snd_soc_dai_driver tabla_dai[] = {
4047 {
4048 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004049 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004050 .playback = {
4051 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004052 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004053 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004054 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004055 .rate_min = 8000,
4056 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004057 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004058 },
4059 .ops = &tabla_dai_ops,
4060 },
4061 {
4062 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004063 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004064 .capture = {
4065 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004066 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004067 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004068 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004069 .rate_min = 8000,
4070 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004071 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004072 },
4073 .ops = &tabla_dai_ops,
4074 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004075 {
4076 .name = "tabla_rx2",
4077 .id = AIF2_PB,
4078 .playback = {
4079 .stream_name = "AIF2 Playback",
4080 .rates = WCD9310_RATES,
4081 .formats = TABLA_FORMATS,
4082 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004083 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004084 .channels_min = 1,
4085 .channels_max = 2,
4086 },
4087 .ops = &tabla_dai_ops,
4088 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004089 {
4090 .name = "tabla_tx2",
4091 .id = AIF2_CAP,
4092 .capture = {
4093 .stream_name = "AIF2 Capture",
4094 .rates = WCD9310_RATES,
4095 .formats = TABLA_FORMATS,
4096 .rate_max = 192000,
4097 .rate_min = 8000,
4098 .channels_min = 1,
4099 .channels_max = 4,
4100 },
4101 .ops = &tabla_dai_ops,
4102 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07004103 {
4104 .name = "tabla_tx3",
4105 .id = AIF3_CAP,
4106 .capture = {
4107 .stream_name = "AIF3 Capture",
4108 .rates = WCD9310_RATES,
4109 .formats = TABLA_FORMATS,
4110 .rate_max = 48000,
4111 .rate_min = 8000,
4112 .channels_min = 1,
4113 .channels_max = 2,
4114 },
4115 .ops = &tabla_dai_ops,
4116 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004117};
Santosh Mardie15e2302011-11-15 10:39:23 +05304118
4119static struct snd_soc_dai_driver tabla_i2s_dai[] = {
4120 {
4121 .name = "tabla_i2s_rx1",
4122 .id = 1,
4123 .playback = {
4124 .stream_name = "AIF1 Playback",
4125 .rates = WCD9310_RATES,
4126 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004127 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304128 .rate_min = 8000,
4129 .channels_min = 1,
4130 .channels_max = 4,
4131 },
4132 .ops = &tabla_dai_ops,
4133 },
4134 {
4135 .name = "tabla_i2s_tx1",
4136 .id = 2,
4137 .capture = {
4138 .stream_name = "AIF1 Capture",
4139 .rates = WCD9310_RATES,
4140 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004141 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304142 .rate_min = 8000,
4143 .channels_min = 1,
4144 .channels_max = 4,
4145 },
4146 .ops = &tabla_dai_ops,
4147 },
4148};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004149
4150static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
4151 struct snd_kcontrol *kcontrol, int event)
4152{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304153 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004154 struct snd_soc_codec *codec = w->codec;
4155 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4156 u32 j = 0;
4157 u32 ret = 0;
4158 codec->control_data = dev_get_drvdata(codec->dev->parent);
4159 tabla = codec->control_data;
4160 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304161 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004162 return 0;
4163 switch (event) {
4164 case SND_SOC_DAPM_POST_PMU:
4165 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004166 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004167 (tabla_dai[j].id == AIF2_CAP) ||
4168 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004169 continue;
4170 if (!strncmp(w->sname,
4171 tabla_dai[j].playback.stream_name, 13)) {
4172 ++tabla_p->dai[j].ch_act;
4173 break;
4174 }
4175 }
4176 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304177 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
4178 tabla_p->dai[j].ch_num,
4179 tabla_p->dai[j].ch_tot,
4180 tabla_p->dai[j].rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004181 break;
4182 case SND_SOC_DAPM_POST_PMD:
4183 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004184 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004185 (tabla_dai[j].id == AIF2_CAP) ||
4186 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004187 continue;
4188 if (!strncmp(w->sname,
4189 tabla_dai[j].playback.stream_name, 13)) {
4190 --tabla_p->dai[j].ch_act;
4191 break;
4192 }
4193 }
4194 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304195 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004196 tabla_p->dai[j].ch_num,
4197 tabla_p->dai[j].ch_tot);
Bharath Ramachandramurthyda6fa7a2012-03-30 14:35:32 -07004198 usleep_range(5000, 5000);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004199 tabla_p->dai[j].rate = 0;
4200 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304201 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004202 tabla_p->dai[j].ch_tot = 0;
4203 }
4204 }
4205 return ret;
4206}
4207
4208static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
4209 struct snd_kcontrol *kcontrol, int event)
4210{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304211 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004212 struct snd_soc_codec *codec = w->codec;
4213 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4214 /* index to the DAI ID, for now hardcoding */
4215 u32 j = 0;
4216 u32 ret = 0;
4217
4218 codec->control_data = dev_get_drvdata(codec->dev->parent);
4219 tabla = codec->control_data;
4220
4221 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304222 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004223 return 0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004224
4225 pr_debug("%s(): %s %d\n", __func__, w->name, event);
4226
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004227 switch (event) {
4228 case SND_SOC_DAPM_POST_PMU:
4229 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004230 if (tabla_dai[j].id == AIF1_PB ||
4231 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004232 continue;
4233 if (!strncmp(w->sname,
4234 tabla_dai[j].capture.stream_name, 13)) {
4235 ++tabla_p->dai[j].ch_act;
4236 break;
4237 }
4238 }
4239 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304240 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004241 tabla_p->dai[j].ch_num,
4242 tabla_p->dai[j].ch_tot,
4243 tabla_p->dai[j].rate);
4244 break;
4245 case SND_SOC_DAPM_POST_PMD:
4246 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004247 if (tabla_dai[j].id == AIF1_PB ||
4248 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004249 continue;
4250 if (!strncmp(w->sname,
4251 tabla_dai[j].capture.stream_name, 13)) {
4252 --tabla_p->dai[j].ch_act;
4253 break;
4254 }
4255 }
4256 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304257 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004258 tabla_p->dai[j].ch_num,
4259 tabla_p->dai[j].ch_tot);
4260 tabla_p->dai[j].rate = 0;
4261 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304262 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004263 tabla_p->dai[j].ch_tot = 0;
4264 }
4265 }
4266 return ret;
4267}
4268
4269/* Todo: Have seperate dapm widgets for I2S and Slimbus.
4270 * Might Need to have callbacks registered only for slimbus
4271 */
4272static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
4273 /*RX stuff */
4274 SND_SOC_DAPM_OUTPUT("EAR"),
4275
4276 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
4277
4278 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
4279 ARRAY_SIZE(dac1_switch)),
4280
4281 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
4282 0, tabla_codec_enable_slimrx,
4283 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4284 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
4285 0, tabla_codec_enable_slimrx,
4286 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4287
4288 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
4289 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
4290
Neema Shettyd3a89262012-02-16 10:23:50 -08004291 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
4292 0, tabla_codec_enable_slimrx,
4293 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4294 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
4295 0, tabla_codec_enable_slimrx,
4296 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4297
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004298 /* Headphone */
4299 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
4300 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
4301 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4302 SND_SOC_DAPM_POST_PMD),
4303 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
4304 hphl_switch, ARRAY_SIZE(hphl_switch)),
4305
4306 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
4307 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4308 SND_SOC_DAPM_POST_PMD),
4309
4310 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
4311 tabla_hphr_dac_event,
4312 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4313
4314 /* Speaker */
4315 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
4316 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
4317 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
4318 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
4319 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
4320
4321 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
4322 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4323 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4324 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
4325 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4326 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4327 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
4328 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4329 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4330 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
4331 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4332 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4333 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
4334 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4335 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4336
4337 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
4338 , tabla_lineout_dac_event,
4339 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4340 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
4341 , tabla_lineout_dac_event,
4342 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4343 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
4344 , tabla_lineout_dac_event,
4345 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4346 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
4347 &lineout3_ground_switch),
4348 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
4349 , tabla_lineout_dac_event,
4350 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4351 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
4352 &lineout4_ground_switch),
4353 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
4354 , tabla_lineout_dac_event,
4355 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4356
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004357 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004358 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4359 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004360 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004361 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4362 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004363 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004364 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4365 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004366 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004367 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4368 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004369 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004370 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4371 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004372 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004373 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4374 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004375 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004376 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4377 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004378
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004379 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4380 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4381 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4382
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004383 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
4384 &rx4_dsm_mux, tabla_codec_reset_interpolator,
4385 SND_SOC_DAPM_PRE_PMU),
4386
4387 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
4388 &rx6_dsm_mux, tabla_codec_reset_interpolator,
4389 SND_SOC_DAPM_PRE_PMU),
4390
4391 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
4392 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
4393
4394 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4395 &rx_mix1_inp1_mux),
4396 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4397 &rx_mix1_inp2_mux),
4398 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4399 &rx2_mix1_inp1_mux),
4400 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4401 &rx2_mix1_inp2_mux),
4402 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4403 &rx3_mix1_inp1_mux),
4404 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4405 &rx3_mix1_inp2_mux),
4406 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4407 &rx4_mix1_inp1_mux),
4408 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4409 &rx4_mix1_inp2_mux),
4410 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4411 &rx5_mix1_inp1_mux),
4412 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4413 &rx5_mix1_inp2_mux),
4414 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4415 &rx6_mix1_inp1_mux),
4416 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4417 &rx6_mix1_inp2_mux),
4418 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4419 &rx7_mix1_inp1_mux),
4420 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4421 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004422 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4423 &rx1_mix2_inp1_mux),
4424 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4425 &rx1_mix2_inp2_mux),
4426 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4427 &rx2_mix2_inp1_mux),
4428 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4429 &rx2_mix2_inp2_mux),
4430 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4431 &rx3_mix2_inp1_mux),
4432 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4433 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004434
4435 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
4436 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
4437 SND_SOC_DAPM_PRE_PMD),
4438
4439 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
4440 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
4441 SND_SOC_DAPM_POST_PMD),
4442
4443 /* TX */
4444
4445 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
4446 0),
4447
4448 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
4449 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
4450
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004451 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
4452 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4453 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4454 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
4455 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4456 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4457
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004458 SND_SOC_DAPM_INPUT("AMIC1"),
4459 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
4460 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4461 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4462 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
4463 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4464 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4465 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
4466 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4467 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4468 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
4469 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4470 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4471
4472 SND_SOC_DAPM_INPUT("AMIC3"),
4473 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
4474 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4475 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4476
4477 SND_SOC_DAPM_INPUT("AMIC4"),
4478 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
4479 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4480 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4481
4482 SND_SOC_DAPM_INPUT("AMIC5"),
4483 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
4484 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4485
4486 SND_SOC_DAPM_INPUT("AMIC6"),
4487 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
4488 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4489
4490 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004491 &dec1_mux, tabla_codec_enable_dec,
4492 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4493 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004494
4495 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004496 &dec2_mux, tabla_codec_enable_dec,
4497 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4498 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004499
4500 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004501 &dec3_mux, tabla_codec_enable_dec,
4502 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4503 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004504
4505 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004506 &dec4_mux, tabla_codec_enable_dec,
4507 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4508 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004509
4510 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004511 &dec5_mux, tabla_codec_enable_dec,
4512 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4513 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004514
4515 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004516 &dec6_mux, tabla_codec_enable_dec,
4517 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4518 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004519
4520 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004521 &dec7_mux, tabla_codec_enable_dec,
4522 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4523 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004524
4525 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004526 &dec8_mux, tabla_codec_enable_dec,
4527 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4528 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004529
4530 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004531 &dec9_mux, tabla_codec_enable_dec,
4532 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4533 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004534
4535 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004536 &dec10_mux, tabla_codec_enable_dec,
4537 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4538 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004539
4540 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
4541 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
4542
4543 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
4544 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
4545 SND_SOC_DAPM_POST_PMD),
4546
4547 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
4548
4549 SND_SOC_DAPM_INPUT("AMIC2"),
4550 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
4551 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4552 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4553 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
4554 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4555 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4556 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
4557 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4558 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4559 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
4560 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4561 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4562 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
4563 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4564 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4565 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
4566 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4567 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4568 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
4569 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4570 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4571 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
4572 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4573 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4574
4575 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004576 SND_SOC_DAPM_AIF_OUT_E("SLIM TX1", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4577 0, tabla_codec_enable_slimtx,
4578 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4579
4580 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, 0, 0, &sb_tx2_mux),
4581 SND_SOC_DAPM_AIF_OUT_E("SLIM TX2", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4582 0, tabla_codec_enable_slimtx,
4583 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4584
4585 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, 0, 0, &sb_tx3_mux),
Neema Shetty3fb1b802012-04-27 13:53:24 -07004586 SND_SOC_DAPM_AIF_OUT_E("SLIM TX3", "AIF3 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004587 0, tabla_codec_enable_slimtx,
4588 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4589
4590 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, 0, 0, &sb_tx4_mux),
Kiran Kandie408b842012-05-17 19:48:04 -07004591 SND_SOC_DAPM_AIF_OUT_E("SLIM TX4", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004592 0, tabla_codec_enable_slimtx,
4593 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004594
4595 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
Neema Shetty3fb1b802012-04-27 13:53:24 -07004596 SND_SOC_DAPM_AIF_OUT_E("SLIM TX5", "AIF3 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004597 0, tabla_codec_enable_slimtx,
4598 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004599
4600 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004601 SND_SOC_DAPM_AIF_OUT_E("SLIM TX6", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4602 0, tabla_codec_enable_slimtx,
4603 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004604
4605 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
4606 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
4607 0, tabla_codec_enable_slimtx,
4608 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4609
4610 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
4611 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
4612 0, tabla_codec_enable_slimtx,
4613 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4614
4615 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
4616 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
4617 0, 0, tabla_codec_enable_slimtx,
4618 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4619
4620 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
4621 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
4622 0, 0, tabla_codec_enable_slimtx,
4623 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4624
4625 /* Digital Mic Inputs */
4626 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
4627 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4628 SND_SOC_DAPM_POST_PMD),
4629
4630 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
4631 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4632 SND_SOC_DAPM_POST_PMD),
4633
4634 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
4635 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4636 SND_SOC_DAPM_POST_PMD),
4637
4638 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
4639 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4640 SND_SOC_DAPM_POST_PMD),
4641
4642 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
4643 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4644 SND_SOC_DAPM_POST_PMD),
4645 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
4646 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4647 SND_SOC_DAPM_POST_PMD),
4648
4649 /* Sidetone */
4650 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
4651 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08004652
4653 /* AUX PGA */
4654 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
4655 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4656 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4657 SND_SOC_DAPM_POST_PMD),
4658
4659 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
4660 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4661 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4662 SND_SOC_DAPM_POST_PMD),
4663
4664 /* Lineout, ear and HPH PA Mixers */
4665 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
4666 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
4667
4668 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
4669 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
4670
4671 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
4672 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
4673
4674 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
4675 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
4676
4677 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
4678 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
4679
4680 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
4681 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
4682
4683 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
4684 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
4685
4686 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
4687 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004688};
4689
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004690static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004691{
4692 u8 bias_msb, bias_lsb;
4693 short bias_value;
4694
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004695 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
4696 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
4697 bias_value = (bias_msb << 8) | bias_lsb;
4698 return bias_value;
4699}
4700
4701static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
4702{
4703 u8 bias_msb, bias_lsb;
4704 short bias_value;
4705
4706 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
4707 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
4708 bias_value = (bias_msb << 8) | bias_lsb;
4709 return bias_value;
4710}
4711
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004712static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004713{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004714 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
4715}
4716
4717static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
4718 bool override_bypass, bool noreldetection)
4719{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004720 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004721 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4722
4723 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4724 if (noreldetection)
4725 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004726
Joonwoo Park925914c2012-01-05 13:35:18 -08004727 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004728 if (!override_bypass)
4729 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004730 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004731 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4732 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
4733 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08004734 usleep_range(tabla->mbhc_data.t_sta_dce,
4735 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004736 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08004737 usleep_range(tabla->mbhc_data.t_dce,
4738 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004739 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004740 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004741 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004742 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
4743 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08004744 usleep_range(tabla->mbhc_data.t_sta_dce,
4745 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08004746 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
4747 usleep_range(tabla->mbhc_data.t_sta,
4748 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004749 bias_value = tabla_codec_read_sta_result(codec);
4750 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4751 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004752 }
Joonwoo Park925914c2012-01-05 13:35:18 -08004753 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004754 if (!override_bypass)
4755 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
4756
4757 if (noreldetection)
4758 tabla_turn_onoff_rel_detection(codec, true);
4759 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004760
Bradley Rubincb1e2732011-06-23 16:49:20 -07004761 return bias_value;
4762}
4763
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004764static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
4765 bool norel)
4766{
4767 return __tabla_codec_sta_dce(codec, dce, false, norel);
4768}
4769
4770/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004771static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004772{
4773 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004774 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004775 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004776
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004777 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004778 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004779 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07004780 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004781 }
4782
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004783 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004784 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004785 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004786 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004787 tabla_codec_enable_clock_block(codec, 1);
4788 }
4789
4790 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
4791
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004792 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004793 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
4794 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07004795
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004796 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004797
4798 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004799 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004800
4801 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
4802 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
4803 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
4804
4805 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004806 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4807 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004808
Joonwoo Park925914c2012-01-05 13:35:18 -08004809 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004810 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4811
Bradley Rubincb1e2732011-06-23 16:49:20 -07004812 tabla_codec_calibrate_hs_polling(codec);
4813
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004814 /* don't flip override */
4815 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08004816 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
4817 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004818 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004819
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004820 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004821}
4822
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004823static int tabla_cancel_btn_work(struct tabla_priv *tabla)
4824{
4825 int r = 0;
4826 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
4827
4828 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
4829 /* if scheduled mbhc_btn_dwork is canceled from here,
4830 * we have to unlock from here instead btn_work */
4831 wcd9xxx_unlock_sleep(core);
4832 r = 1;
4833 }
4834 return r;
4835}
4836
4837/* called under codec_resource_lock acquisition */
4838void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07004839{
4840 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004841 u8 wg_time;
4842
4843 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
4844 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07004845
4846 /* If headphone PA is on, check if userspace receives
4847 * removal event to sync-up PA's state */
4848 if (tabla_is_hph_pa_on(codec)) {
4849 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
4850 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
4851 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
4852 } else {
4853 pr_debug("%s PA is off\n", __func__);
4854 }
4855
4856 if (tabla_is_hph_dac_on(codec, 1))
4857 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
4858 if (tabla_is_hph_dac_on(codec, 0))
4859 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004860
4861 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
4862 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
4863 0xC0, 0x00);
4864 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
4865 0xC0, 0x00);
4866 usleep_range(wg_time * 1000, wg_time * 1000);
4867}
4868
4869static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
4870{
4871 bool pa_turned_on = false;
4872 struct snd_soc_codec *codec = tabla->codec;
4873 u8 wg_time;
4874
4875 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
4876 wg_time += 1;
4877
4878 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
4879 &tabla->hph_pa_dac_state)) {
4880 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
4881 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
4882 0xC0, 0xC0);
4883 }
4884 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
4885 &tabla->hph_pa_dac_state)) {
4886 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
4887 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
4888 0xC0, 0xC0);
4889 }
4890
4891 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
4892 &tabla->hph_pa_dac_state)) {
4893 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
4894 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
4895 1 << 4);
4896 pa_turned_on = true;
4897 }
4898 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
4899 &tabla->hph_pa_dac_state)) {
4900 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
4901 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
4902 1 << 5);
4903 pa_turned_on = true;
4904 }
4905
4906 if (pa_turned_on) {
4907 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
4908 __func__);
4909 usleep_range(wg_time * 1000, wg_time * 1000);
4910 }
4911}
4912
4913/* called under codec_resource_lock acquisition */
4914static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
4915 enum snd_jack_types jack_type)
4916{
4917 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4918
4919 if (!insertion) {
4920 /* Report removal */
4921 tabla->hph_status &= ~jack_type;
4922 if (tabla->mbhc_cfg.headset_jack) {
4923 /* cancel possibly scheduled btn work and
4924 * report release if we reported button press */
4925 if (tabla_cancel_btn_work(tabla)) {
4926 pr_debug("%s: button press is canceled\n",
4927 __func__);
4928 } else if (tabla->buttons_pressed) {
4929 pr_debug("%s: Reporting release for reported "
4930 "button press %d\n", __func__,
4931 jack_type);
4932 tabla_snd_soc_jack_report(tabla,
4933 tabla->mbhc_cfg.button_jack, 0,
4934 tabla->buttons_pressed);
4935 tabla->buttons_pressed &=
4936 ~TABLA_JACK_BUTTON_MASK;
4937 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07004938 pr_debug("%s: Reporting removal %d(%x)\n", __func__,
4939 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004940 tabla_snd_soc_jack_report(tabla,
4941 tabla->mbhc_cfg.headset_jack,
4942 tabla->hph_status,
4943 TABLA_JACK_MASK);
4944 }
4945 tabla_set_and_turnoff_hph_padac(codec);
4946 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
4947 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4948 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
4949 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4950 tabla->current_plug = PLUG_TYPE_NONE;
4951 tabla->mbhc_polling_active = false;
4952 } else {
4953 /* Report insertion */
4954 tabla->hph_status |= jack_type;
4955
4956 if (jack_type == SND_JACK_HEADPHONE)
4957 tabla->current_plug = PLUG_TYPE_HEADPHONE;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07004958 else if (jack_type == SND_JACK_UNSUPPORTED)
4959 tabla->current_plug = PLUG_TYPE_GND_MIC_SWAP;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004960 else if (jack_type == SND_JACK_HEADSET) {
4961 tabla->mbhc_polling_active = true;
4962 tabla->current_plug = PLUG_TYPE_HEADSET;
4963 }
4964 if (tabla->mbhc_cfg.headset_jack) {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07004965 pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
4966 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004967 tabla_snd_soc_jack_report(tabla,
4968 tabla->mbhc_cfg.headset_jack,
4969 tabla->hph_status,
4970 TABLA_JACK_MASK);
4971 }
4972 tabla_clr_and_turnon_hph_padac(tabla);
4973 }
Joonwoo Park03324832012-03-19 19:36:16 -07004974}
4975
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004976static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07004977 int insertion, int trigger,
4978 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004979{
4980 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004981 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08004982 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004983 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08004984 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004985 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004986
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004987 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004988 pr_err("Error, no tabla calibration\n");
4989 return -EINVAL;
4990 }
4991
4992 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
4993
Joonwoo Park03324832012-03-19 19:36:16 -07004994 /* Make sure mic bias and Mic line schmitt trigger
4995 * are turned OFF
4996 */
4997 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
4998 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
4999
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005000 if (insertion) {
Joonwoo Park03324832012-03-19 19:36:16 -07005001 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005002
Joonwoo Park03324832012-03-19 19:36:16 -07005003 /* DAPM can manipulate PA/DAC bits concurrently */
5004 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005005 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005006 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005007
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005008 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005009 /* Enable HPH Schmitt Trigger */
5010 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
5011 0x11);
5012 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
5013 plug_det->hph_current << 2);
5014 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
5015 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005016 }
5017 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005018 /* enable the mic line schmitt trigger */
5019 snd_soc_update_bits(codec,
5020 tabla->mbhc_bias_regs.mbhc_reg,
5021 0x60, plug_det->mic_current << 5);
5022 snd_soc_update_bits(codec,
5023 tabla->mbhc_bias_regs.mbhc_reg,
5024 0x80, 0x80);
5025 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
5026 snd_soc_update_bits(codec,
5027 tabla->mbhc_bias_regs.ctl_reg, 0x01,
5028 0x00);
5029 snd_soc_update_bits(codec,
5030 tabla->mbhc_bias_regs.mbhc_reg,
5031 0x10, 0x10);
5032 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005033
5034 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005035 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005036 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005037 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005038 /* Make sure the HPH schmitt trigger is OFF */
5039 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
5040
5041 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07005042 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
5043 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005044 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08005045 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005046 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5047 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005048 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005049 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5050 0x10, 0x10);
5051
5052 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005053 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005054 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005055
5056 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005057 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005058 if (!(tabla->clock_active)) {
5059 tabla_codec_enable_config_mode(codec, 1);
5060 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005061 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005062 usleep_range(generic->t_shutdown_plug_rem,
5063 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005064 tabla_codec_enable_config_mode(codec, 0);
5065 } else
5066 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005067 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005068 }
5069
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005070 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005071
5072 /* If central bandgap disabled */
5073 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
5074 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005075 usleep_range(generic->t_bg_fast_settle,
5076 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005077 central_bias_enabled = 1;
5078 }
5079
5080 /* If LDO_H disabled */
5081 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
5082 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
5083 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005084 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005085 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
5086
5087 if (central_bias_enabled)
5088 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
5089 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005090
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005091 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005092 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005093
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305094 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005095 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
5096 return 0;
5097}
5098
Joonwoo Park0976d012011-12-22 11:48:18 -08005099static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
5100 s16 vin_mv)
5101{
Joonwoo Park0976d012011-12-22 11:48:18 -08005102 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005103 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08005104 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07005105 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005106
5107 tabla = snd_soc_codec_get_drvdata(codec);
5108 mb_mv = tabla->mbhc_data.micb_mv;
5109
5110 if (mb_mv == 0) {
5111 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
5112 return -EINVAL;
5113 }
5114
5115 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005116 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
5117 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005118 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005119 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
5120 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005121 }
5122 in = (u32) diff * vin_mv;
5123
Joonwoo Park03324832012-03-19 19:36:16 -07005124 value = (u16) (in / mb_mv) + zero;
5125 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005126}
5127
5128static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
5129 u16 bias_value)
5130{
5131 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005132 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08005133 s32 mv;
5134
5135 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005136 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005137 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005138 z = (tabla->mbhc_data.dce_z);
5139 mb = (tabla->mbhc_data.dce_mb);
5140 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005141 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005142 z = (tabla->mbhc_data.sta_z);
5143 mb = (tabla->mbhc_data.sta_mb);
5144 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005145 }
5146
5147 return mv;
5148}
5149
Joonwoo Park03324832012-03-19 19:36:16 -07005150static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005151{
5152 struct delayed_work *delayed_work;
5153 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005154 short bias_value;
5155 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07005156 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005157
5158 pr_debug("%s:\n", __func__);
5159
5160 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07005161 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005162 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005163
5164 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005165 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005166 bias_value = tabla_codec_read_sta_result(tabla->codec);
5167 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305168 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005169 bias_value = tabla_codec_read_dce_result(tabla->codec);
5170 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305171 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005172 pr_debug("%s: Reporting long button press event"
5173 " STA: %d, DCE: %d\n", __func__,
5174 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005175 tabla_snd_soc_jack_report(tabla,
5176 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07005177 tabla->buttons_pressed,
5178 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005179 }
5180 } else {
5181 pr_err("%s: Bad tabla private data\n", __func__);
5182 }
5183
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005184 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005185 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005186}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07005187
Joonwoo Park0976d012011-12-22 11:48:18 -08005188void tabla_mbhc_cal(struct snd_soc_codec *codec)
5189{
5190 struct tabla_priv *tabla;
5191 struct tabla_mbhc_btn_detect_cfg *btn_det;
5192 u8 cfilt_mode, bg_mode;
5193 u8 ncic, nmeas, navg;
5194 u32 mclk_rate;
5195 u32 dce_wait, sta_wait;
5196 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005197 void *calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08005198
5199 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005200 calibration = tabla->mbhc_cfg.calibration;
5201
5202 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5203 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08005204
5205 /* First compute the DCE / STA wait times
5206 * depending on tunable parameters.
5207 * The value is computed in microseconds
5208 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005209 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005210 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08005211 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005212 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
5213 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
5214 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08005215 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
5216 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08005217
5218 tabla->mbhc_data.t_dce = dce_wait;
5219 tabla->mbhc_data.t_sta = sta_wait;
5220
5221 /* LDOH and CFILT are already configured during pdata handling.
5222 * Only need to make sure CFILT and bandgap are in Fast mode.
5223 * Need to restore defaults once calculation is done.
5224 */
5225 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
5226 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
5227 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
5228 0x02);
5229
5230 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
5231 * to perform ADC calibration
5232 */
5233 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005234 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08005235 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
5236 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
5237 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
5238 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
5239
5240 /* DCE measurement for 0 volts */
5241 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5242 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5243 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005244 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5245 usleep_range(100, 100);
5246 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5247 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5248 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
5249
5250 /* DCE measurment for MB voltage */
5251 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5252 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
5253 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5254 usleep_range(100, 100);
5255 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5256 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5257 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
5258
5259 /* Sta measuremnt for 0 volts */
5260 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5261 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5262 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005263 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5264 usleep_range(100, 100);
5265 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5266 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5267 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
5268
5269 /* STA Measurement for MB Voltage */
5270 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5271 usleep_range(100, 100);
5272 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5273 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5274 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
5275
5276 /* Restore default settings. */
5277 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5278 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5279 cfilt_mode);
5280 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
5281
5282 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
5283 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005284
5285 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5286 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005287}
5288
5289void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
5290 const enum tabla_mbhc_btn_det_mem mem)
5291{
5292 void *ret = &btn_det->_v_btn_low;
5293
5294 switch (mem) {
5295 case TABLA_BTN_DET_GAIN:
5296 ret += sizeof(btn_det->_n_cic);
5297 case TABLA_BTN_DET_N_CIC:
5298 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08005299 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08005300 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
5301 case TABLA_BTN_DET_V_BTN_HIGH:
5302 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
5303 case TABLA_BTN_DET_V_BTN_LOW:
5304 /* do nothing */
5305 break;
5306 default:
5307 ret = NULL;
5308 }
5309
5310 return ret;
5311}
5312
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005313static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
5314 bool tovddio)
5315{
5316 int r;
5317 int vddio_k, mb_k;
5318 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5319 VDDIO_MICBIAS_MV);
5320 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5321 tabla->mbhc_data.micb_mv);
5322 if (tovddio)
5323 r = v * vddio_k / mb_k;
5324 else
5325 r = v * mb_k / vddio_k;
5326 return r;
5327}
5328
Joonwoo Park0976d012011-12-22 11:48:18 -08005329static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
5330{
5331 struct tabla_priv *tabla;
5332 s16 btn_mv = 0, btn_delta_mv;
5333 struct tabla_mbhc_btn_detect_cfg *btn_det;
5334 struct tabla_mbhc_plug_type_cfg *plug_type;
5335 u16 *btn_high;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005336 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08005337 int i;
5338
5339 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005340 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5341 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005342
Joonwoo Parkc0672392012-01-11 11:03:14 -08005343 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005344 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07005345 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08005346 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005347 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005348 tabla->mbhc_data.npoll = 7;
5349 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005350 }
Joonwoo Park0976d012011-12-22 11:48:18 -08005351
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005352 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
5353 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08005354 n_ready[tabla_codec_mclk_index(tabla)]) +
5355 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08005356 tabla->mbhc_data.v_ins_hu =
5357 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
5358 tabla->mbhc_data.v_ins_h =
5359 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
5360
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005361 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
5362 if (tabla->mbhc_cfg.gpio)
5363 tabla->mbhc_data.v_inval_ins_high =
5364 TABLA_MBHC_FAKE_INSERT_HIGH;
5365 else
5366 tabla->mbhc_data.v_inval_ins_high =
5367 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
5368
5369 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
5370 tabla->mbhc_data.adj_v_hs_max =
5371 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
5372 tabla->mbhc_data.adj_v_ins_hu =
5373 tabla_codec_v_sta_dce(codec, STA,
5374 tabla->mbhc_data.adj_v_hs_max);
5375 tabla->mbhc_data.adj_v_ins_h =
5376 tabla_codec_v_sta_dce(codec, DCE,
5377 tabla->mbhc_data.adj_v_hs_max);
5378 tabla->mbhc_data.v_inval_ins_low =
5379 tabla_scale_v_micb_vddio(tabla,
5380 tabla->mbhc_data.v_inval_ins_low,
5381 false);
5382 tabla->mbhc_data.v_inval_ins_high =
5383 tabla_scale_v_micb_vddio(tabla,
5384 tabla->mbhc_data.v_inval_ins_high,
5385 false);
5386 }
5387
Joonwoo Park0976d012011-12-22 11:48:18 -08005388 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
5389 for (i = 0; i < btn_det->num_btn; i++)
5390 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
5391
5392 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
5393 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
Joonwoo Park0976d012011-12-22 11:48:18 -08005394 tabla->mbhc_data.v_b1_hu =
5395 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
5396
5397 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
5398
5399 tabla->mbhc_data.v_b1_huc =
5400 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
5401
5402 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
Joonwoo Park03324832012-03-19 19:36:16 -07005403 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
Joonwoo Park0976d012011-12-22 11:48:18 -08005404
5405 tabla->mbhc_data.v_no_mic =
5406 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
5407}
5408
5409void tabla_mbhc_init(struct snd_soc_codec *codec)
5410{
5411 struct tabla_priv *tabla;
5412 struct tabla_mbhc_general_cfg *generic;
5413 struct tabla_mbhc_btn_detect_cfg *btn_det;
5414 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08005415 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305416 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08005417
5418 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005419 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
5420 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005421
Joonwoo Park0976d012011-12-22 11:48:18 -08005422 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005423 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005424 snd_soc_update_bits(codec,
5425 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
5426 0x07, n);
5427 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
5428 btn_det->c[n]);
5429 }
5430 }
5431 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
5432 btn_det->nc);
5433
5434 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
5435 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08005436 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08005437
5438 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08005439 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
5440 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005441
5442 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
5443 generic->mbhc_nsa << 4);
5444
5445 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
5446 btn_det->n_meas);
5447
5448 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
5449
5450 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
5451
5452 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
5453 btn_det->mbhc_nsc << 3);
5454
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005455 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
5456 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08005457
5458 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07005459
5460 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005461}
5462
Patrick Lai64b43262011-12-06 17:29:15 -08005463static bool tabla_mbhc_fw_validate(const struct firmware *fw)
5464{
5465 u32 cfg_offset;
5466 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
5467 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
5468
5469 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
5470 return false;
5471
5472 /* previous check guarantees that there is enough fw data up
5473 * to num_btn
5474 */
5475 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
5476 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
5477 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
5478 return false;
5479
5480 /* previous check guarantees that there is enough fw data up
5481 * to start of impedance detection configuration
5482 */
5483 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
5484 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
5485
5486 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
5487 return false;
5488
5489 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
5490 return false;
5491
5492 return true;
5493}
Joonwoo Park03324832012-03-19 19:36:16 -07005494
Joonwoo Parkfee17432012-04-16 16:33:55 -07005495/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005496static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07005497 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005498{
5499 s16 *v_btn_low, *v_btn_high;
5500 struct tabla_mbhc_btn_detect_cfg *btn_det;
5501 int i, btn = -1;
5502
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005503 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005504 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
5505 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305506 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07005507
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005508 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07005509 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005510 btn = i;
5511 break;
5512 }
5513 }
5514
5515 if (btn == -1)
5516 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07005517 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005518
5519 return btn;
5520}
5521
5522static int tabla_get_button_mask(const int btn)
5523{
5524 int mask = 0;
5525 switch (btn) {
5526 case 0:
5527 mask = SND_JACK_BTN_0;
5528 break;
5529 case 1:
5530 mask = SND_JACK_BTN_1;
5531 break;
5532 case 2:
5533 mask = SND_JACK_BTN_2;
5534 break;
5535 case 3:
5536 mask = SND_JACK_BTN_3;
5537 break;
5538 case 4:
5539 mask = SND_JACK_BTN_4;
5540 break;
5541 case 5:
5542 mask = SND_JACK_BTN_5;
5543 break;
5544 case 6:
5545 mask = SND_JACK_BTN_6;
5546 break;
5547 case 7:
5548 mask = SND_JACK_BTN_7;
5549 break;
5550 }
5551 return mask;
5552}
5553
Bradley Rubincb1e2732011-06-23 16:49:20 -07005554static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005555{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005556 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07005557 short dce, sta;
5558 s32 mv, mv_s, stamv_s;
5559 bool vddio;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005560 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005561 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005562 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005563 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005564 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005565 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305566 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07005567 int n_btn_meas = d->n_btn_meas;
5568 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07005569
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005570 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005571
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005572 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
5573 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
5574 pr_debug("%s: mbhc is being recovered, skip button press\n",
5575 __func__);
5576 goto done;
5577 }
5578
5579 priv->mbhc_state = MBHC_STATE_POTENTIAL;
5580
5581 if (!priv->mbhc_polling_active) {
5582 pr_warn("%s: mbhc polling is not active, skip button press\n",
5583 __func__);
5584 goto done;
5585 }
Joonwoo Park03324832012-03-19 19:36:16 -07005586
5587 dce = tabla_codec_read_dce_result(codec);
5588 mv = tabla_codec_sta_dce_v(codec, 1, dce);
5589
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005590 /* If GPIO interrupt already kicked in, ignore button press */
5591 if (priv->in_gpio_handler) {
5592 pr_debug("%s: GPIO State Changed, ignore button press\n",
5593 __func__);
5594 btn = -1;
5595 goto done;
5596 }
5597
Joonwoo Parkfee17432012-04-16 16:33:55 -07005598 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
5599 priv->mbhc_micbias_switched);
5600 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
5601
Joonwoo Park03324832012-03-19 19:36:16 -07005602 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
5603 if (priv->mbhc_last_resume &&
5604 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
5605 pr_debug("%s: Button is already released shortly after "
5606 "resume\n", __func__);
5607 n_btn_meas = 0;
5608 } else {
5609 pr_debug("%s: Button is already released without "
5610 "resume", __func__);
5611 sta = tabla_codec_read_sta_result(codec);
Joonwoo Parkfee17432012-04-16 16:33:55 -07005612 stamv_s = tabla_codec_sta_dce_v(codec, 0, sta);
5613 if (vddio)
5614 stamv_s = tabla_scale_v_micb_vddio(priv,
5615 stamv_s,
5616 false);
5617 btn = tabla_determine_button(priv, mv_s);
5618 if (btn != tabla_determine_button(priv, stamv_s))
Joonwoo Park03324832012-03-19 19:36:16 -07005619 btn = -1;
5620 goto done;
5621 }
5622 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005623
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005624 /* determine pressed button */
Joonwoo Parkfee17432012-04-16 16:33:55 -07005625 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
5626 pr_debug("%s: meas %d - DCE %d,%d,%d button %d\n", __func__,
5627 meas - 1, dce, mv, mv_s, btnmeas[meas - 1]);
Joonwoo Park03324832012-03-19 19:36:16 -07005628 if (n_btn_meas == 0)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005629 btn = btnmeas[0];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005630 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07005631 dce = tabla_codec_sta_dce(codec, 1, false);
5632 mv = tabla_codec_sta_dce_v(codec, 1, dce);
5633 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
5634
5635 btnmeas[meas] = tabla_determine_button(priv, mv_s);
5636 pr_debug("%s: meas %d - DCE %d,%d,%d button %d\n",
5637 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005638 /* if large enough measurements are collected,
5639 * start to check if last all n_btn_con measurements were
5640 * in same button low/high range */
5641 if (meas + 1 >= d->n_btn_con) {
5642 for (i = 0; i < d->n_btn_con; i++)
5643 if ((btnmeas[meas] < 0) ||
5644 (btnmeas[meas] != btnmeas[meas - i]))
5645 break;
5646 if (i == d->n_btn_con) {
5647 /* button pressed */
5648 btn = btnmeas[meas];
5649 break;
Joonwoo Park03324832012-03-19 19:36:16 -07005650 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
5651 /* if left measurements are less than n_btn_con,
5652 * it's impossible to find button number */
5653 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005654 }
5655 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005656 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005657
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005658 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005659 if (priv->in_gpio_handler) {
5660 pr_debug("%s: GPIO already triggered, ignore button "
5661 "press\n", __func__);
5662 goto done;
5663 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005664 mask = tabla_get_button_mask(btn);
5665 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07005666 wcd9xxx_lock_sleep(core);
5667 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
5668 msecs_to_jiffies(400)) == 0) {
5669 WARN(1, "Button pressed twice without release"
5670 "event\n");
5671 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005672 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08005673 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005674 pr_debug("%s: bogus button press, too short press?\n",
5675 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005676 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005677
Joonwoo Park03324832012-03-19 19:36:16 -07005678 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005679 pr_debug("%s: leave\n", __func__);
5680 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005681 return IRQ_HANDLED;
5682}
5683
Joonwoo Park03324832012-03-19 19:36:16 -07005684static int tabla_is_fake_press(struct tabla_priv *priv)
5685{
5686 int i;
5687 int r = 0;
5688 struct snd_soc_codec *codec = priv->codec;
5689 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005690 s16 mb_v, v_ins_hu, v_ins_h;
5691
5692 v_ins_hu = tabla_get_current_v_ins(priv, true);
5693 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07005694
5695 for (i = 0; i < dces; i++) {
5696 usleep_range(10000, 10000);
5697 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005698 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07005699 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
5700 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005701 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
5702 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07005703 r = 1;
5704 break;
5705 }
5706 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005707 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07005708 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
5709 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005710 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
5711 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07005712 r = 1;
5713 break;
5714 }
5715 }
5716 }
5717
5718 return r;
5719}
5720
Bradley Rubincb1e2732011-06-23 16:49:20 -07005721static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005722{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08005723 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08005724 struct tabla_priv *priv = data;
5725 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005726
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005727 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005728
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005729 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
5730 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005731
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005732 tabla_codec_drive_v_to_micbias(codec, 10000);
5733
Joonwoo Park03324832012-03-19 19:36:16 -07005734 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005735 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005736 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07005737 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005738 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005739 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005740 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005741 priv->mbhc_cfg.button_jack, 0,
5742 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005743 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005744 if (tabla_is_fake_press(priv)) {
5745 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005746 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005747 } else if (priv->mbhc_cfg.button_jack) {
5748 if (priv->in_gpio_handler) {
5749 pr_debug("%s: GPIO kicked in, ignore\n",
5750 __func__);
5751 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005752 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005753 "press and release\n",
5754 __func__);
5755 tabla_snd_soc_jack_report(priv,
5756 priv->mbhc_cfg.button_jack,
5757 priv->buttons_pressed,
5758 priv->buttons_pressed);
5759 tabla_snd_soc_jack_report(priv,
5760 priv->mbhc_cfg.button_jack, 0,
5761 priv->buttons_pressed);
5762 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005763 }
5764 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005765
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005766 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
5767 }
5768
Joonwoo Park03324832012-03-19 19:36:16 -07005769 tabla_codec_calibrate_hs_polling(codec);
5770
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005771 if (priv->mbhc_cfg.gpio)
5772 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07005773
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005774 tabla_codec_start_hs_polling(codec);
5775
5776 pr_debug("%s: leave\n", __func__);
5777 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005778 return IRQ_HANDLED;
5779}
5780
Bradley Rubincb1e2732011-06-23 16:49:20 -07005781static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
5782{
5783 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08005784 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005785 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005786
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005787 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005788 tabla_codec_enable_config_mode(codec, 1);
5789
5790 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
5791 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005792
Joonwoo Park0976d012011-12-22 11:48:18 -08005793 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
5794
5795 usleep_range(generic->t_shutdown_plug_rem,
5796 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005797
5798 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005799 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005800 tabla_codec_enable_config_mode(codec, 0);
5801
5802 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
5803}
5804
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005805static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005806{
5807 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005808
5809 tabla_codec_shutdown_hs_removal_detect(codec);
5810
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005811 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05305812 tabla_codec_disable_clock_block(codec);
5813 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005814 }
5815
5816 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005817 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005818}
5819
Patrick Lai49efeac2011-11-03 11:01:12 -07005820static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
5821{
5822 struct tabla_priv *tabla = data;
5823 struct snd_soc_codec *codec;
5824
5825 pr_info("%s: received HPHL OCP irq\n", __func__);
5826
5827 if (tabla) {
5828 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08005829 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
5830 pr_info("%s: retry\n", __func__);
5831 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5832 0x00);
5833 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5834 0x10);
5835 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305836 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08005837 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5838 tabla->hphlocp_cnt = 0;
5839 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005840 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08005841 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005842 tabla->mbhc_cfg.headset_jack,
5843 tabla->hph_status,
5844 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07005845 }
5846 } else {
5847 pr_err("%s: Bad tabla private data\n", __func__);
5848 }
5849
5850 return IRQ_HANDLED;
5851}
5852
5853static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
5854{
5855 struct tabla_priv *tabla = data;
5856 struct snd_soc_codec *codec;
5857
5858 pr_info("%s: received HPHR OCP irq\n", __func__);
5859
5860 if (tabla) {
5861 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08005862 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
5863 pr_info("%s: retry\n", __func__);
5864 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5865 0x00);
5866 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5867 0x10);
5868 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305869 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08005870 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5871 tabla->hphrocp_cnt = 0;
5872 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005873 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08005874 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005875 tabla->mbhc_cfg.headset_jack,
5876 tabla->hph_status,
5877 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07005878 }
5879 } else {
5880 pr_err("%s: Bad tabla private data\n", __func__);
5881 }
5882
5883 return IRQ_HANDLED;
5884}
5885
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005886static bool tabla_is_inval_ins_range(struct snd_soc_codec *codec,
5887 s32 mic_volt, bool highhph, bool *highv)
Joonwoo Park03324832012-03-19 19:36:16 -07005888{
5889 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005890 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005891 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005892
5893 /* Perform this check only when the high voltage headphone
5894 * needs to be considered as invalid
5895 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005896 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005897 *highv = mic_volt > v_hs_max;
5898 if (!highhph && *highv)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005899 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005900 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
5901 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005902 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005903
5904 return invalid;
5905}
5906
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005907static bool tabla_is_inval_ins_delta(struct snd_soc_codec *codec,
5908 int mic_volt, int mic_volt_prev,
5909 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005910{
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005911 return abs(mic_volt - mic_volt_prev) > threshold;
Joonwoo Park03324832012-03-19 19:36:16 -07005912}
5913
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005914/* called under codec_resource_lock acquisition */
5915void tabla_find_plug_and_report(struct snd_soc_codec *codec,
5916 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07005917{
5918 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005919
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005920 if (plug_type == PLUG_TYPE_HEADPHONE &&
5921 tabla->current_plug == PLUG_TYPE_NONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005922 /* Nothing was reported previously
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005923 * report a headphone or unsupported
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005924 */
5925 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
5926 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005927 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
5928 if (tabla->current_plug == PLUG_TYPE_HEADSET)
5929 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
5930 else if (tabla->current_plug == PLUG_TYPE_HEADPHONE)
5931 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
5932
5933 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
5934 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005935 } else if (plug_type == PLUG_TYPE_HEADSET) {
5936 /* If Headphone was reported previously, this will
5937 * only report the mic line
5938 */
5939 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
5940 msleep(100);
5941 tabla_codec_start_hs_polling(codec);
5942 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
5943 if (tabla->current_plug == PLUG_TYPE_NONE)
5944 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
5945 tabla_codec_cleanup_hs_polling(codec);
5946 pr_debug("setup mic trigger for further detection\n");
5947 tabla->lpi_enabled = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005948 tabla_codec_enable_hs_detect(codec, 1,
5949 MBHC_USE_MB_TRIGGER |
5950 MBHC_USE_HPHL_TRIGGER,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005951 false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005952 } else {
5953 WARN(1, "Unexpected current plug_type %d, plug_type %d\n",
5954 tabla->current_plug, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005955 }
5956}
5957
5958/* should be called under interrupt context that hold suspend */
5959static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla)
5960{
5961 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
5962 tabla->hs_detect_work_stop = false;
5963 wcd9xxx_lock_sleep(tabla->codec->control_data);
5964 schedule_work(&tabla->hs_correct_plug_work);
5965}
5966
5967/* called under codec_resource_lock acquisition */
5968static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla)
5969{
5970 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
5971 tabla->hs_detect_work_stop = true;
5972 wmb();
5973 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
5974 if (cancel_work_sync(&tabla->hs_correct_plug_work)) {
5975 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
5976 wcd9xxx_unlock_sleep(tabla->codec->control_data);
5977 }
5978 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
5979}
5980
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005981static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
5982{
5983 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
5984 tabla->mbhc_cfg.gpio_level_insert);
5985}
5986
Joonwoo Park41956722012-04-18 13:13:07 -07005987/* called under codec_resource_lock acquisition */
5988static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
5989{
5990 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
5991 if (on)
5992 usleep_range(5000, 5000);
5993}
5994
5995/* called under codec_resource_lock acquisition and mbhc override = 1 */
5996static enum tabla_mbhc_plug_type
5997tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
5998{
5999 int i;
6000 bool gndswitch, vddioswitch;
6001 int scaled;
6002 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
6003 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6004 const bool vddio = (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV);
6005 int num_det = (MBHC_NUM_DCE_PLUG_DETECT + vddio);
6006 enum tabla_mbhc_plug_type plug_type[num_det];
6007 s16 mb_v[num_det];
6008 s32 mic_mv[num_det];
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006009 bool inval;
6010 bool highdelta;
6011 bool ahighv = false, highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006012
6013 /* make sure override is on */
6014 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
6015
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006016 /* GND and MIC swap detection requires at least 2 rounds of DCE */
6017 BUG_ON(num_det < 2);
6018
6019 plug_type_ptr =
6020 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6021
6022 plug_type[0] = PLUG_TYPE_INVALID;
6023
Joonwoo Park41956722012-04-18 13:13:07 -07006024 /* performs DCEs for N times
6025 * 1st: check if voltage is in invalid range
6026 * 2nd - N-2nd: check voltage range and delta
6027 * N-1st: check voltage range, delta with HPHR GND switch
6028 * Nth: check voltage range with VDDIO switch if micbias V != vddio V*/
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006029 for (i = 0; i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07006030 gndswitch = (i == (num_det - 1 - vddio));
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006031 vddioswitch = (vddio && ((i == num_det - 1) ||
6032 (i == num_det - 2)));
Joonwoo Park41956722012-04-18 13:13:07 -07006033 if (i == 0) {
6034 mb_v[i] = tabla_codec_setup_hs_polling(codec);
6035 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006036 inval = tabla_is_inval_ins_range(codec, mic_mv[i],
6037 highhph, &highv);
6038 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006039 scaled = mic_mv[i];
Joonwoo Park41956722012-04-18 13:13:07 -07006040 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006041 if (vddioswitch)
6042 __tabla_codec_switch_micbias(tabla->codec, 1,
6043 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006044 if (gndswitch)
6045 tabla_codec_hphr_gnd_switch(codec, true);
6046 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
6047 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006048 if (vddioswitch)
6049 scaled = tabla_scale_v_micb_vddio(tabla,
Joonwoo Park41956722012-04-18 13:13:07 -07006050 mic_mv[i],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006051 false);
6052 else
6053 scaled = mic_mv[i];
6054 /* !gndswitch & vddioswitch means the previous DCE
6055 * was done with gndswitch, don't compare with DCE
6056 * with gndswitch */
6057 highdelta = tabla_is_inval_ins_delta(codec, scaled,
6058 mic_mv[i - !gndswitch - vddioswitch],
6059 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV);
6060 inval = (tabla_is_inval_ins_range(codec, mic_mv[i],
6061 highhph, &highv) ||
6062 highdelta);
6063 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006064 if (gndswitch)
6065 tabla_codec_hphr_gnd_switch(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006066 if (vddioswitch)
6067 __tabla_codec_switch_micbias(tabla->codec, 0,
6068 false, false);
6069 /* claim UNSUPPORTED plug insertion when
6070 * good headset is detected but HPHR GND switch makes
6071 * delta difference */
6072 if (i == (num_det - 2) && highdelta && !ahighv)
6073 plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
6074 else if (i == (num_det - 1) && inval)
6075 plug_type[0] = PLUG_TYPE_INVALID;
Joonwoo Park41956722012-04-18 13:13:07 -07006076 }
6077 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006078 "VDDIO %d, inval %d\n", __func__,
Joonwoo Park41956722012-04-18 13:13:07 -07006079 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006080 vddioswitch, inval);
6081 /* don't need to run further DCEs */
6082 if (ahighv && inval)
6083 break;
6084 mic_mv[i] = scaled;
Joonwoo Park41956722012-04-18 13:13:07 -07006085 }
6086
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006087 for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
6088 i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07006089 /*
6090 * If we are here, means none of the all
6091 * measurements are fake, continue plug type detection.
6092 * If all three measurements do not produce same
6093 * plug type, restart insertion detection
6094 */
6095 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
6096 plug_type[i] = PLUG_TYPE_HEADPHONE;
6097 pr_debug("%s: Detect attempt %d, detected Headphone\n",
6098 __func__, i);
6099 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
6100 plug_type[i] = PLUG_TYPE_HIGH_HPH;
6101 pr_debug("%s: Detect attempt %d, detected High "
6102 "Headphone\n", __func__, i);
6103 } else {
6104 plug_type[i] = PLUG_TYPE_HEADSET;
6105 pr_debug("%s: Detect attempt %d, detected Headset\n",
6106 __func__, i);
6107 }
6108
6109 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
6110 pr_err("%s: Detect attempt %d and %d are not same",
6111 __func__, i - 1, i);
6112 plug_type[0] = PLUG_TYPE_INVALID;
6113 inval = true;
6114 break;
6115 }
6116 }
6117
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006118 pr_debug("%s: Detected plug type %d\n", __func__, plug_type[0]);
Joonwoo Park41956722012-04-18 13:13:07 -07006119 return plug_type[0];
6120}
6121
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006122static void tabla_hs_correct_gpio_plug(struct work_struct *work)
6123{
6124 struct tabla_priv *tabla;
6125 struct snd_soc_codec *codec;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006126 int retry = 0, pt_gnd_mic_swap_cnt = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006127 bool correction = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006128 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006129 unsigned long timeout;
6130
6131 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
6132 codec = tabla->codec;
6133
6134 pr_debug("%s: enter\n", __func__);
6135 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6136
6137 /* Keep override on during entire plug type correction work.
6138 *
6139 * This is okay under the assumption that any GPIO irqs which use
6140 * MBHC block cancel and sync this work so override is off again
6141 * prior to GPIO interrupt handler's MBHC block usage.
6142 * Also while this correction work is running, we can guarantee
6143 * DAPM doesn't use any MBHC block as this work only runs with
6144 * headphone detection.
6145 */
6146 tabla_turn_onoff_override(codec, true);
6147
6148 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6149 while (!time_after(jiffies, timeout)) {
6150 ++retry;
6151 rmb();
6152 if (tabla->hs_detect_work_stop) {
6153 pr_debug("%s: stop requested\n", __func__);
6154 break;
6155 }
6156
6157 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
6158 if (tabla_hs_gpio_level_remove(tabla)) {
6159 pr_debug("%s: GPIO value is low\n", __func__);
6160 break;
6161 }
6162
6163 /* can race with removal interrupt */
6164 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07006165 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006166 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6167
Joonwoo Park41956722012-04-18 13:13:07 -07006168 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006169 pr_debug("Invalid plug in attempt # %d\n", retry);
6170 if (retry == NUM_ATTEMPTS_TO_REPORT &&
6171 tabla->current_plug == PLUG_TYPE_NONE) {
6172 tabla_codec_report_plug(codec, 1,
6173 SND_JACK_HEADPHONE);
6174 }
Joonwoo Park41956722012-04-18 13:13:07 -07006175 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006176 pr_debug("Good headphone detected, continue polling mic\n");
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006177 if (tabla->current_plug == PLUG_TYPE_NONE)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006178 tabla_codec_report_plug(codec, 1,
6179 SND_JACK_HEADPHONE);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006180 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006181 if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6182 pt_gnd_mic_swap_cnt++;
6183 if (pt_gnd_mic_swap_cnt <
6184 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD)
6185 continue;
6186 else if (pt_gnd_mic_swap_cnt >
6187 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD) {
6188 /* This is due to GND/MIC switch didn't
6189 * work, Report unsupported plug */
6190 } else if (tabla->mbhc_cfg.swap_gnd_mic) {
6191 /* if switch is toggled, check again,
6192 * otherwise report unsupported plug */
6193 if (tabla->mbhc_cfg.swap_gnd_mic(codec))
6194 continue;
6195 }
6196 } else
6197 pt_gnd_mic_swap_cnt = 0;
6198
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006199 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6200 /* Turn off override */
6201 tabla_turn_onoff_override(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006202 /* The valid plug also includes PLUG_TYPE_GND_MIC_SWAP
6203 */
Joonwoo Park41956722012-04-18 13:13:07 -07006204 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006205 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6206 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07006207 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006208 correction = true;
6209 break;
6210 }
6211 }
6212
6213 /* Turn off override */
6214 if (!correction)
6215 tabla_turn_onoff_override(codec, false);
6216
6217 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
6218 pr_debug("%s: leave\n", __func__);
6219 /* unlock sleep */
6220 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6221}
6222
6223/* called under codec_resource_lock acquisition */
6224static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
6225{
Joonwoo Park41956722012-04-18 13:13:07 -07006226 enum tabla_mbhc_plug_type plug_type;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006227 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006228
6229 pr_debug("%s: enter\n", __func__);
6230
6231 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07006232 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006233 tabla_turn_onoff_override(codec, false);
6234
6235 if (tabla_hs_gpio_level_remove(tabla)) {
6236 pr_debug("%s: GPIO value is low when determining plug\n",
6237 __func__);
6238 return;
6239 }
6240
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006241 if (plug_type == PLUG_TYPE_INVALID ||
6242 plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006243 tabla_schedule_hs_detect_plug(tabla);
Joonwoo Park41956722012-04-18 13:13:07 -07006244 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006245 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6246
6247 tabla_schedule_hs_detect_plug(tabla);
6248 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07006249 pr_debug("%s: Valid plug found, determine plug type %d\n",
6250 __func__, plug_type);
6251 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006252 }
6253}
6254
6255/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006256static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
6257{
Joonwoo Park41956722012-04-18 13:13:07 -07006258 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006259 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6260 const struct tabla_mbhc_plug_detect_cfg *plug_det =
6261 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park03324832012-03-19 19:36:16 -07006262
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006263 /* Turn on the override,
6264 * tabla_codec_setup_hs_polling requires override on */
6265 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006266
6267 if (plug_det->t_ins_complete > 20)
6268 msleep(plug_det->t_ins_complete);
6269 else
6270 usleep_range(plug_det->t_ins_complete * 1000,
6271 plug_det->t_ins_complete * 1000);
6272
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006273 if (tabla->mbhc_cfg.gpio) {
6274 /* Turn off the override */
6275 tabla_turn_onoff_override(codec, false);
6276 if (tabla_hs_gpio_level_remove(tabla))
6277 pr_debug("%s: GPIO value is low when determining "
6278 "plug\n", __func__);
6279 else
6280 tabla_codec_decide_gpio_plug(codec);
6281 return;
6282 }
6283
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006284 plug_type = tabla_codec_get_plug_type(codec, false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006285 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006286
Joonwoo Park41956722012-04-18 13:13:07 -07006287 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006288 pr_debug("%s: Invalid plug type detected\n", __func__);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006289 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006290 tabla_codec_cleanup_hs_polling(codec);
6291 tabla_codec_enable_hs_detect(codec, 1,
6292 MBHC_USE_MB_TRIGGER |
6293 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006294 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6295 pr_debug("%s: GND-MIC swapped plug type detected\n", __func__);
6296 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6297 tabla_codec_cleanup_hs_polling(codec);
6298 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006299 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07006300 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006301 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6302 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006303 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006304 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07006305 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006306 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6307
Joonwoo Park03324832012-03-19 19:36:16 -07006308 /* avoid false button press detect */
6309 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07006310 tabla_codec_start_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006311 }
6312}
6313
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006314/* called only from interrupt which is under codec_resource_lock acquisition */
6315static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006316{
Bradley Rubincb1e2732011-06-23 16:49:20 -07006317 struct snd_soc_codec *codec = priv->codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006318
6319 if (!is_removal) {
6320 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
6321
6322 rmb();
6323 if (priv->lpi_enabled)
6324 msleep(100);
6325
6326 rmb();
6327 if (!priv->lpi_enabled) {
6328 pr_debug("%s: lpi is disabled\n", __func__);
6329 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
6330 priv->mbhc_cfg.gpio_level_insert) {
6331 pr_debug("%s: Valid insertion, "
6332 "detect plug type\n", __func__);
6333 tabla_codec_decide_gpio_plug(codec);
6334 } else {
6335 pr_debug("%s: Invalid insertion, "
6336 "stop plug detection\n", __func__);
6337 }
6338 } else {
6339 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
6340 }
6341}
6342
6343/* called only from interrupt which is under codec_resource_lock acquisition */
6344static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
6345 bool is_mb_trigger)
6346{
Joonwoo Park03324832012-03-19 19:36:16 -07006347 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006348 struct snd_soc_codec *codec = priv->codec;
6349 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006350
6351 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006352 /* cancel possiblely running hs detect work */
6353 tabla_cancel_hs_detect_plug(priv);
6354
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006355 /*
6356 * If headphone is removed while playback is in progress,
6357 * it is possible that micbias will be switched to VDDIO.
6358 */
Joonwoo Park03324832012-03-19 19:36:16 -07006359 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006360 if (priv->current_plug == PLUG_TYPE_HEADPHONE)
6361 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6362 else if (priv->current_plug == PLUG_TYPE_GND_MIC_SWAP)
6363 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
6364 else
6365 WARN(1, "%s: Unexpected current plug type %d\n",
6366 __func__, priv->current_plug);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006367 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006368 tabla_codec_enable_hs_detect(codec, 1,
6369 MBHC_USE_MB_TRIGGER |
6370 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006371 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006372 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07006373 pr_debug("%s: Waiting for Headphone left trigger\n",
6374 __func__);
6375 wcd9xxx_lock_sleep(core);
6376 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
6377 usecs_to_jiffies(1000000)) == 0) {
6378 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
6379 __func__);
6380 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08006381 }
Joonwoo Park03324832012-03-19 19:36:16 -07006382 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
6383 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006384 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006385 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
6386 if (ret != 0) {
6387 pr_debug("%s: Complete plug insertion, Detecting plug "
6388 "type\n", __func__);
6389 tabla_codec_detect_plug_type(codec);
6390 wcd9xxx_unlock_sleep(core);
6391 } else {
6392 wcd9xxx_enable_irq(codec->control_data,
6393 TABLA_IRQ_MBHC_INSERTION);
6394 pr_err("%s: Error detecting plug insertion\n",
6395 __func__);
6396 }
Joonwoo Park03324832012-03-19 19:36:16 -07006397 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006398}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08006399
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006400static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
6401{
6402 bool is_mb_trigger, is_removal;
6403 struct tabla_priv *priv = data;
6404 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006405
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006406 pr_debug("%s: enter\n", __func__);
6407 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6408 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
6409
6410 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
6411 0x10);
6412 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
6413 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
6414
6415 /* Turn off both HPH and MIC line schmitt triggers */
6416 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6417 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
6418 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6419
6420 if (priv->mbhc_cfg.gpio)
6421 tabla_hs_insert_irq_gpio(priv, is_removal);
6422 else
6423 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
6424
6425 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006426 return IRQ_HANDLED;
6427}
6428
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006429static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
6430{
6431 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006432 const struct tabla_mbhc_plug_type_cfg *plug_type =
6433 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6434 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006435
6436 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006437 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006438}
6439
6440/* called under codec_resource_lock acquisition
6441 * returns true if mic voltage range is back to normal insertion
6442 * returns false either if timedout or removed */
6443static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
6444{
6445 int i;
6446 bool timedout, settled = false;
6447 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
6448 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
6449 unsigned long retry = 0, timeout;
6450 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006451 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006452
6453 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6454 while (!(timedout = time_after(jiffies, timeout))) {
6455 retry++;
6456 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6457 pr_debug("%s: GPIO indicates removal\n", __func__);
6458 break;
6459 }
6460
6461 if (tabla->mbhc_cfg.gpio) {
6462 if (retry > 1)
6463 msleep(250);
6464 else
6465 msleep(50);
6466 }
6467
6468 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6469 pr_debug("%s: GPIO indicates removal\n", __func__);
6470 break;
6471 }
6472
6473 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
6474 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
6475 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6476 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
6477 __func__, retry, mic_mv[i], mb_v[i]);
6478 }
6479
6480 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6481 pr_debug("%s: GPIO indicates removal\n", __func__);
6482 break;
6483 }
6484
6485 if (tabla->current_plug == PLUG_TYPE_NONE) {
6486 pr_debug("%s : headset/headphone is removed\n",
6487 __func__);
6488 break;
6489 }
6490
6491 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
6492 if (!is_valid_mic_voltage(codec, mic_mv[i]))
6493 break;
6494
6495 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6496 pr_debug("%s: MIC voltage settled\n", __func__);
6497 settled = true;
6498 msleep(200);
6499 break;
6500 }
6501
6502 /* only for non-GPIO remove irq */
6503 if (!tabla->mbhc_cfg.gpio) {
6504 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006505 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006506 break;
6507 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6508 pr_debug("%s: Headset is removed\n", __func__);
6509 break;
6510 }
6511 }
6512 }
6513
6514 if (timedout)
6515 pr_debug("%s: Microphone did not settle in %d seconds\n",
6516 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
6517 return settled;
6518}
6519
6520/* called only from interrupt which is under codec_resource_lock acquisition */
6521static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
6522{
6523 struct snd_soc_codec *codec = priv->codec;
6524
6525 if (tabla_hs_remove_settle(codec))
6526 tabla_codec_start_hs_polling(codec);
6527 pr_debug("%s: remove settle done\n", __func__);
6528}
6529
6530/* called only from interrupt which is under codec_resource_lock acquisition */
6531static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006532{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006533 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006534 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006535 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08006536 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006537 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006538 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006539
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006540 if (priv->current_plug != PLUG_TYPE_HEADSET) {
6541 pr_debug("%s(): Headset is not inserted, ignore removal\n",
6542 __func__);
6543 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6544 0x08, 0x08);
6545 return;
6546 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006547
Joonwoo Park0976d012011-12-22 11:48:18 -08006548 usleep_range(generic->t_shutdown_plug_rem,
6549 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006550
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006551 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006552 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006553 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
6554 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006555 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006556 pr_debug("%s: checking false removal\n", __func__);
6557 msleep(500);
6558 removed = !tabla_hs_remove_settle(codec);
6559 pr_debug("%s: headset %sactually removed\n", __func__,
6560 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006561 break;
6562 }
6563 min_us -= priv->mbhc_data.t_dce;
6564 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006565
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006566 if (removed) {
6567 /* cancel possiblely running hs detect work */
6568 tabla_cancel_hs_detect_plug(priv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006569 /*
6570 * If this removal is not false, first check the micbias
6571 * switch status and switch it to LDOH if it is already
6572 * switched to VDDIO.
6573 */
Joonwoo Park03324832012-03-19 19:36:16 -07006574 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07006575
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006576 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6577 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006578 tabla_codec_enable_hs_detect(codec, 1,
6579 MBHC_USE_MB_TRIGGER |
6580 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006581 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006582 } else {
6583 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006584 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006585}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006586
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006587static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
6588{
6589 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006590 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006591 pr_debug("%s: enter, removal interrupt\n", __func__);
6592
6593 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006594 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
6595 priv->mbhc_micbias_switched);
6596 if (vddio)
6597 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
6598
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006599 if (priv->mbhc_cfg.gpio)
6600 tabla_hs_remove_irq_gpio(priv);
6601 else
6602 tabla_hs_remove_irq_nogpio(priv);
6603
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006604 /* if driver turned off vddio switch and headset is not removed,
6605 * turn on the vddio switch back, if headset is removed then vddio
6606 * switch is off by time now and shouldn't be turn on again from here */
6607 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
6608 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006609 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006610
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006611 return IRQ_HANDLED;
6612}
6613
Joonwoo Park03324832012-03-19 19:36:16 -07006614void mbhc_insert_work(struct work_struct *work)
6615{
6616 struct delayed_work *dwork;
6617 struct tabla_priv *tabla;
6618 struct snd_soc_codec *codec;
6619 struct wcd9xxx *tabla_core;
6620
6621 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006622 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07006623 codec = tabla->codec;
6624 tabla_core = dev_get_drvdata(codec->dev->parent);
6625
6626 pr_debug("%s:\n", __func__);
6627
6628 /* Turn off both HPH and MIC line schmitt triggers */
6629 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6630 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
6631 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6632 wcd9xxx_disable_irq_sync(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
6633 tabla_codec_detect_plug_type(codec);
6634 wcd9xxx_unlock_sleep(tabla_core);
6635}
6636
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006637static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
6638{
6639 bool insert;
6640 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6641 bool is_removed = false;
6642
6643 pr_debug("%s: enter\n", __func__);
6644
6645 tabla->in_gpio_handler = true;
6646 /* Wait here for debounce time */
6647 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
6648 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
6649
6650 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6651
6652 /* cancel pending button press */
6653 if (tabla_cancel_btn_work(tabla))
6654 pr_debug("%s: button press is canceled\n", __func__);
6655
6656 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
6657 tabla->mbhc_cfg.gpio_level_insert);
6658 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
6659 tabla->lpi_enabled = false;
6660 wmb();
6661
6662 /* cancel detect plug */
6663 tabla_cancel_hs_detect_plug(tabla);
6664
6665 /* Disable Mic Bias pull down and HPH Switch to GND */
6666 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
6667 0x00);
6668 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
6669 tabla_codec_detect_plug_type(codec);
6670 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
6671 tabla->lpi_enabled = false;
6672 wmb();
6673
6674 /* cancel detect plug */
6675 tabla_cancel_hs_detect_plug(tabla);
6676
6677 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
6678 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6679 is_removed = true;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006680 } else if (tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP) {
6681 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
6682 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006683 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
6684 tabla_codec_pause_hs_polling(codec);
6685 tabla_codec_cleanup_hs_polling(codec);
6686 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6687 is_removed = true;
6688 }
6689
6690 if (is_removed) {
6691 /* Enable Mic Bias pull down and HPH Switch to GND */
6692 snd_soc_update_bits(codec,
6693 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6694 0x01);
6695 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
6696 0x01);
6697 /* Make sure mic trigger is turned off */
6698 snd_soc_update_bits(codec,
6699 tabla->mbhc_bias_regs.ctl_reg,
6700 0x01, 0x01);
6701 snd_soc_update_bits(codec,
6702 tabla->mbhc_bias_regs.mbhc_reg,
6703 0x90, 0x00);
6704 /* Reset MBHC State Machine */
6705 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6706 0x08, 0x08);
6707 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6708 0x08, 0x00);
6709 /* Turn off override */
6710 tabla_turn_onoff_override(codec, false);
6711 }
6712 }
6713
6714 tabla->in_gpio_handler = false;
6715 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6716 pr_debug("%s: leave\n", __func__);
6717}
6718
6719static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
6720{
6721 int r = IRQ_HANDLED;
6722 struct snd_soc_codec *codec = data;
6723
6724 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
6725 pr_warn("%s: failed to hold suspend\n", __func__);
6726 r = IRQ_NONE;
6727 } else {
6728 tabla_hs_gpio_handler(codec);
6729 wcd9xxx_unlock_sleep(codec->control_data);
6730 }
6731
6732 return r;
6733}
6734
6735static void mbhc_fw_read(struct work_struct *work)
6736{
6737 struct delayed_work *dwork;
6738 struct tabla_priv *tabla;
6739 struct snd_soc_codec *codec;
6740 const struct firmware *fw;
6741 int ret = -1, retry = 0, rc;
6742
6743 dwork = to_delayed_work(work);
6744 tabla = container_of(dwork, struct tabla_priv,
6745 mbhc_firmware_dwork);
6746 codec = tabla->codec;
6747
6748 while (retry < MBHC_FW_READ_ATTEMPTS) {
6749 retry++;
6750 pr_info("%s:Attempt %d to request MBHC firmware\n",
6751 __func__, retry);
6752 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
6753 codec->dev);
6754
6755 if (ret != 0) {
6756 usleep_range(MBHC_FW_READ_TIMEOUT,
6757 MBHC_FW_READ_TIMEOUT);
6758 } else {
6759 pr_info("%s: MBHC Firmware read succesful\n", __func__);
6760 break;
6761 }
6762 }
6763
6764 if (ret != 0) {
6765 pr_err("%s: Cannot load MBHC firmware use default cal\n",
6766 __func__);
6767 } else if (tabla_mbhc_fw_validate(fw) == false) {
6768 pr_err("%s: Invalid MBHC cal data size use default cal\n",
6769 __func__);
6770 release_firmware(fw);
6771 } else {
6772 tabla->mbhc_cfg.calibration = (void *)fw->data;
6773 tabla->mbhc_fw = fw;
6774 }
6775
6776 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6777 tabla_mbhc_init(codec);
6778 tabla_mbhc_cal(codec);
6779 tabla_mbhc_calc_thres(codec);
6780 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
6781 tabla_codec_calibrate_hs_polling(codec);
6782 if (!tabla->mbhc_cfg.gpio) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006783 rc = tabla_codec_enable_hs_detect(codec, 1,
6784 MBHC_USE_MB_TRIGGER |
6785 MBHC_USE_HPHL_TRIGGER,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006786 false);
6787
6788 if (IS_ERR_VALUE(rc))
6789 pr_err("%s: Failed to setup MBHC detection\n",
6790 __func__);
6791 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006792 /* Enable Mic Bias pull down and HPH Switch to GND */
6793 snd_soc_update_bits(codec,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006794 tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
6795 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x01);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006796 INIT_WORK(&tabla->hs_correct_plug_work,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006797 tabla_hs_correct_gpio_plug);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006798 }
6799
6800}
6801
Joonwoo Park03324832012-03-19 19:36:16 -07006802int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006803 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07006804{
6805 struct tabla_priv *tabla;
6806 int rc = 0;
6807
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006808 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07006809 pr_err("Error: no codec or calibration\n");
6810 return -EINVAL;
6811 }
6812
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006813 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
6814 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07006815 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006816 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07006817 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006818 pr_err("Error: unsupported clock rate %d\n",
6819 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07006820 return -EINVAL;
6821 }
6822
6823 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006824 tabla->mbhc_cfg = *cfg;
6825 tabla->in_gpio_handler = false;
6826 tabla->current_plug = PLUG_TYPE_NONE;
6827 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07006828 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
6829
6830 /* Put CFILT in fast mode by default */
6831 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
6832 0x40, TABLA_CFILT_FAST_MODE);
6833 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
6834 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
6835 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
6836 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
6837 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
6838
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006839 if (!tabla->mbhc_cfg.read_fw_bin) {
6840 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006841 tabla_mbhc_init(codec);
6842 tabla_mbhc_cal(codec);
6843 tabla_mbhc_calc_thres(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006844 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006845 tabla_codec_calibrate_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006846 if (!tabla->mbhc_cfg.gpio) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006847 rc = tabla_codec_enable_hs_detect(codec, 1,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006848 MBHC_USE_MB_TRIGGER |
6849 MBHC_USE_HPHL_TRIGGER,
6850 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006851 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006852 /* Enable Mic Bias pull down and HPH Switch to GND */
6853 snd_soc_update_bits(codec,
6854 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6855 0x01);
6856 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
6857 0x01);
6858 INIT_WORK(&tabla->hs_correct_plug_work,
6859 tabla_hs_correct_gpio_plug);
6860 }
Joonwoo Park03324832012-03-19 19:36:16 -07006861 } else {
6862 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
6863 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
6864 }
6865
6866 if (!IS_ERR_VALUE(rc)) {
6867 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
6868 wcd9xxx_enable_irq(codec->control_data,
6869 TABLA_IRQ_HPH_PA_OCPL_FAULT);
6870 wcd9xxx_enable_irq(codec->control_data,
6871 TABLA_IRQ_HPH_PA_OCPR_FAULT);
6872 }
6873
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006874 if (!IS_ERR_VALUE(rc) && tabla->mbhc_cfg.gpio) {
6875 rc = request_threaded_irq(tabla->mbhc_cfg.gpio_irq, NULL,
6876 tabla_mechanical_plug_detect_irq,
6877 (IRQF_TRIGGER_RISING |
6878 IRQF_TRIGGER_FALLING),
6879 "tabla-gpio", codec);
6880 if (!IS_ERR_VALUE(rc)) {
6881 rc = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
6882 /* Bootup time detection */
6883 tabla_hs_gpio_handler(codec);
6884 }
6885 }
6886
Joonwoo Park03324832012-03-19 19:36:16 -07006887 return rc;
6888}
6889EXPORT_SYMBOL_GPL(tabla_hs_detect);
6890
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006891static unsigned long slimbus_value;
6892
6893static irqreturn_t tabla_slimbus_irq(int irq, void *data)
6894{
6895 struct tabla_priv *priv = data;
6896 struct snd_soc_codec *codec = priv->codec;
6897 int i, j;
6898 u8 val;
6899
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306900 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
6901 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006902 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
6903 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306904 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006905 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
6906 if (val & 0x1)
6907 pr_err_ratelimited("overflow error on port %x,"
6908 " value %x\n", i*8 + j, val);
6909 if (val & 0x2)
6910 pr_err_ratelimited("underflow error on port %x,"
6911 " value %x\n", i*8 + j, val);
6912 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306913 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006914 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
6915 }
6916
6917 return IRQ_HANDLED;
6918}
6919
Patrick Lai3043fba2011-08-01 14:15:57 -07006920static int tabla_handle_pdata(struct tabla_priv *tabla)
6921{
6922 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306923 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07006924 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05306925 u8 leg_mode = pdata->amic_settings.legacy_mode;
6926 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
6927 u8 txfe_buff = pdata->amic_settings.txfe_buff;
6928 u8 flag = pdata->amic_settings.use_pdata;
6929 u8 i = 0, j = 0;
6930 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07006931
6932 if (!pdata) {
6933 rc = -ENODEV;
6934 goto done;
6935 }
6936
6937 /* Make sure settings are correct */
6938 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
6939 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
6940 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
6941 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
6942 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
6943 rc = -EINVAL;
6944 goto done;
6945 }
6946
6947 /* figure out k value */
6948 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
6949 pdata->micbias.cfilt1_mv);
6950 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
6951 pdata->micbias.cfilt2_mv);
6952 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
6953 pdata->micbias.cfilt3_mv);
6954
6955 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
6956 rc = -EINVAL;
6957 goto done;
6958 }
6959
6960 /* Set voltage level and always use LDO */
6961 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
6962 (pdata->micbias.ldoh_v << 2));
6963
6964 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
6965 (k1 << 2));
6966 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
6967 (k2 << 2));
6968 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
6969 (k3 << 2));
6970
6971 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
6972 (pdata->micbias.bias1_cfilt_sel << 5));
6973 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
6974 (pdata->micbias.bias2_cfilt_sel << 5));
6975 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
6976 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08006977 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
6978 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07006979
Santosh Mardi22920282011-10-26 02:38:40 +05306980 for (i = 0; i < 6; j++, i += 2) {
6981 if (flag & (0x01 << i)) {
6982 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
6983 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
6984 val_txfe = val_txfe |
6985 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
6986 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
6987 0x10, value);
6988 snd_soc_update_bits(codec,
6989 TABLA_A_TX_1_2_TEST_EN + j * 10,
6990 0x30, val_txfe);
6991 }
6992 if (flag & (0x01 << (i + 1))) {
6993 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
6994 val_txfe = (txfe_bypass &
6995 (0x01 << (i + 1))) ? 0x02 : 0x00;
6996 val_txfe |= (txfe_buff &
6997 (0x01 << (i + 1))) ? 0x01 : 0x00;
6998 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
6999 0x01, value);
7000 snd_soc_update_bits(codec,
7001 TABLA_A_TX_1_2_TEST_EN + j * 10,
7002 0x03, val_txfe);
7003 }
7004 }
7005 if (flag & 0x40) {
7006 value = (leg_mode & 0x40) ? 0x10 : 0x00;
7007 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
7008 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
7009 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
7010 0x13, value);
7011 }
Patrick Lai49efeac2011-11-03 11:01:12 -07007012
7013 if (pdata->ocp.use_pdata) {
7014 /* not defined in CODEC specification */
7015 if (pdata->ocp.hph_ocp_limit == 1 ||
7016 pdata->ocp.hph_ocp_limit == 5) {
7017 rc = -EINVAL;
7018 goto done;
7019 }
7020 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
7021 0x0F, pdata->ocp.num_attempts);
7022 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
7023 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
7024 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
7025 0xE0, (pdata->ocp.hph_ocp_limit << 5));
7026 }
Joonwoo Park03324832012-03-19 19:36:16 -07007027
7028 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
7029 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
7030 if (pdata->regulator[i].min_uV == 1800000 &&
7031 pdata->regulator[i].max_uV == 1800000) {
7032 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7033 0x1C);
7034 } else if (pdata->regulator[i].min_uV == 2200000 &&
7035 pdata->regulator[i].max_uV == 2200000) {
7036 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7037 0x1E);
7038 } else {
7039 pr_err("%s: unsupported CDC_VDDA_RX voltage "
7040 "min %d, max %d\n", __func__,
7041 pdata->regulator[i].min_uV,
7042 pdata->regulator[i].max_uV);
7043 rc = -EINVAL;
7044 }
7045 break;
7046 }
7047 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007048done:
7049 return rc;
7050}
7051
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007052static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
7053
7054 /* Tabla 1.1 MICBIAS changes */
7055 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
7056 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
7057 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007058
7059 /* Tabla 1.1 HPH changes */
7060 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
7061 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
7062
7063 /* Tabla 1.1 EAR PA changes */
7064 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
7065 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
7066 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
7067
7068 /* Tabla 1.1 Lineout_5 Changes */
7069 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
7070
7071 /* Tabla 1.1 RX Changes */
7072 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
7073 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
7074 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
7075 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
7076 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
7077 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
7078 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
7079
7080 /* Tabla 1.1 RX1 and RX2 Changes */
7081 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
7082 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
7083
7084 /* Tabla 1.1 RX3 to RX7 Changes */
7085 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
7086 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
7087 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
7088 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
7089 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
7090
7091 /* Tabla 1.1 CLASSG Changes */
7092 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
7093};
7094
7095static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007096 /* Tabla 2.0 MICBIAS changes */
7097 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
7098};
7099
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007100static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
7101 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
7102};
7103
7104static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
7105 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
7106};
7107
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007108static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
7109{
7110 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307111 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007112
7113 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
7114 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
7115 tabla_1_1_reg_defaults[i].val);
7116
7117 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
7118 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
7119 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007120
7121 if (TABLA_IS_1_X(tabla_core->version)) {
7122 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
7123 i++)
7124 snd_soc_write(codec,
7125 tabla_1_x_only_reg_2_0_defaults[i].reg,
7126 tabla_1_x_only_reg_2_0_defaults[i].val);
7127 } else {
7128 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
7129 snd_soc_write(codec,
7130 tabla_2_only_reg_2_0_defaults[i].reg,
7131 tabla_2_only_reg_2_0_defaults[i].val);
7132 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007133}
7134
7135static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08007136 /* Initialize current threshold to 350MA
7137 * number of wait and run cycles to 4096
7138 */
Patrick Lai49efeac2011-11-03 11:01:12 -07007139 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08007140 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007141
Santosh Mardi32171012011-10-28 23:32:06 +05307142 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
7143
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007144 /* Initialize gain registers to use register gain */
7145 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
7146 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
7147 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
7148 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
7149 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
7150 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
7151
7152 /* Initialize mic biases to differential mode */
7153 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
7154 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
7155 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007156
7157 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
7158
7159 /* Use 16 bit sample size for TX1 to TX6 */
7160 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
7161 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
7162 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
7163 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
7164 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
7165 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
7166
7167 /* Use 16 bit sample size for TX7 to TX10 */
7168 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
7169 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
7170 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
7171 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
7172
7173 /* Use 16 bit sample size for RX */
7174 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
7175 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
7176
7177 /*enable HPF filter for TX paths */
7178 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
7179 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
7180 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
7181 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
7182 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
7183 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
7184 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
7185 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
7186 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
7187 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
7188};
7189
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007190static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
7191 /* Initialize mic biases to differential mode */
7192 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7193};
7194
7195static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
7196 /* Initialize mic biases to differential mode */
7197 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7198};
7199
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007200static void tabla_codec_init_reg(struct snd_soc_codec *codec)
7201{
7202 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307203 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007204
7205 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
7206 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
7207 tabla_codec_reg_init_val[i].mask,
7208 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007209 if (TABLA_IS_1_X(tabla_core->version)) {
7210 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
7211 snd_soc_update_bits(codec,
7212 tabla_1_x_codec_reg_init_val[i].reg,
7213 tabla_1_x_codec_reg_init_val[i].mask,
7214 tabla_1_x_codec_reg_init_val[i].val);
7215 } else {
7216 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
7217 i++)
7218 snd_soc_update_bits(codec,
7219 tabla_2_higher_codec_reg_init_val[i].reg,
7220 tabla_2_higher_codec_reg_init_val[i].mask,
7221 tabla_2_higher_codec_reg_init_val[i].val);
7222 }
7223}
7224
7225static void tabla_update_reg_address(struct tabla_priv *priv)
7226{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307227 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007228 struct tabla_reg_address *reg_addr = &priv->reg_addr;
7229
7230 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007231 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
7232 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007233 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007234 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007235 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
7236 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007237 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007238 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007239}
7240
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007241#ifdef CONFIG_DEBUG_FS
7242static int codec_debug_open(struct inode *inode, struct file *file)
7243{
7244 file->private_data = inode->i_private;
7245 return 0;
7246}
7247
7248static ssize_t codec_debug_write(struct file *filp,
7249 const char __user *ubuf, size_t cnt, loff_t *ppos)
7250{
7251 char lbuf[32];
7252 char *buf;
7253 int rc;
7254 struct tabla_priv *tabla = filp->private_data;
7255
7256 if (cnt > sizeof(lbuf) - 1)
7257 return -EINVAL;
7258
7259 rc = copy_from_user(lbuf, ubuf, cnt);
7260 if (rc)
7261 return -EFAULT;
7262
7263 lbuf[cnt] = '\0';
7264 buf = (char *)lbuf;
7265 tabla->no_mic_headset_override = (*strsep(&buf, " ") == '0') ?
7266 false : true;
7267 return rc;
7268}
7269
7270static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
7271 size_t count, loff_t *pos)
7272{
7273 const int size = 768;
7274 char buffer[size];
7275 int n = 0;
7276 struct tabla_priv *tabla = file->private_data;
7277 struct snd_soc_codec *codec = tabla->codec;
7278 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007279 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
7280 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007281
7282 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
7283 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
7284 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
7285 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
7286 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
7287 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
7288 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
7289 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
7290 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
7291 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
7292 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
7293 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007294 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007295 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007296 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
7297 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
7298 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
7299 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
7300 p->v_ins_h == v_ins_h_cur ? "*" : "");
7301 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
7302 p->adj_v_ins_hu,
7303 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
7304 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
7305 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
7306 p->adj_v_ins_h,
7307 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
7308 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007309 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
7310 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
7311 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
7312 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
7313 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
7314 p->v_b1_huc,
7315 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
7316 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
7317 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
7318 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
7319 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
7320 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
7321 p->v_no_mic,
7322 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
7323 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
7324 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
7325 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007326 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
7327 p->v_inval_ins_low);
7328 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
7329 p->v_inval_ins_high);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007330 if (tabla->mbhc_cfg.gpio)
7331 n += scnprintf(buffer + n, size - n, "GPIO insert = %d\n",
7332 tabla_hs_gpio_level_remove(tabla));
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007333 buffer[n] = 0;
7334
7335 return simple_read_from_buffer(buf, count, pos, buffer, n);
7336}
7337
7338static const struct file_operations codec_debug_ops = {
7339 .open = codec_debug_open,
7340 .write = codec_debug_write,
7341};
7342
7343static const struct file_operations codec_mbhc_debug_ops = {
7344 .open = codec_debug_open,
7345 .read = codec_mbhc_debug_read,
7346};
7347#endif
7348
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007349static int tabla_codec_probe(struct snd_soc_codec *codec)
7350{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307351 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007352 struct tabla_priv *tabla;
7353 struct snd_soc_dapm_context *dapm = &codec->dapm;
7354 int ret = 0;
7355 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007356 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007357
7358 codec->control_data = dev_get_drvdata(codec->dev->parent);
7359 control = codec->control_data;
7360
7361 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
7362 if (!tabla) {
7363 dev_err(codec->dev, "Failed to allocate private data\n");
7364 return -ENOMEM;
7365 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08007366 for (i = 0 ; i < NUM_DECIMATORS; i++) {
7367 tx_hpf_work[i].tabla = tabla;
7368 tx_hpf_work[i].decimator = i + 1;
7369 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
7370 tx_hpf_corner_freq_callback);
7371 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007372
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007373 /* Make sure mbhc micbias register addresses are zeroed out */
7374 memset(&tabla->mbhc_bias_regs, 0,
7375 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07007376 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007377
Joonwoo Park0976d012011-12-22 11:48:18 -08007378 /* Make sure mbhc intenal calibration data is zeroed out */
7379 memset(&tabla->mbhc_data, 0,
7380 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08007381 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08007382 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
7383 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007384 snd_soc_codec_set_drvdata(codec, tabla);
7385
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07007386 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007387 tabla->bandgap_type = TABLA_BANDGAP_OFF;
7388 tabla->clock_active = false;
7389 tabla->config_mode_active = false;
7390 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08007391 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07007392 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007393 tabla->hs_polling_irq_prepared = false;
7394 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007395 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007396 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07007397 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08007398 for (i = 0; i < COMPANDER_MAX; i++) {
7399 tabla->comp_enabled[i] = 0;
7400 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
7401 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007402 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307403 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08007404 tabla->aux_pga_cnt = 0;
7405 tabla->aux_l_gain = 0x1F;
7406 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007407 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05307408 tabla_update_reg_defaults(codec);
7409 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05307410 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07007411 if (IS_ERR_VALUE(ret)) {
7412 pr_err("%s: bad pdata\n", __func__);
7413 goto err_pdata;
7414 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007415
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007416 snd_soc_add_controls(codec, tabla_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007417 ARRAY_SIZE(tabla_snd_controls));
7418 if (TABLA_IS_1_X(control->version))
7419 snd_soc_add_controls(codec, tabla_1_x_snd_controls,
7420 ARRAY_SIZE(tabla_1_x_snd_controls));
7421 else
7422 snd_soc_add_controls(codec, tabla_2_higher_snd_controls,
7423 ARRAY_SIZE(tabla_2_higher_snd_controls));
7424
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007425 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007426 ARRAY_SIZE(tabla_dapm_widgets));
7427 if (TABLA_IS_1_X(control->version))
7428 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
7429 ARRAY_SIZE(tabla_1_x_dapm_widgets));
7430 else
7431 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
7432 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
7433
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307434 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05307435 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
7436 ARRAY_SIZE(tabla_dapm_i2s_widgets));
7437 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
7438 ARRAY_SIZE(audio_i2s_map));
7439 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007440 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07007441
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007442 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007443 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007444 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
7445 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007446 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007447 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007448 } else {
7449 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307450 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007451 goto err_pdata;
7452 }
7453
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007454 snd_soc_dapm_sync(dapm);
7455
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307456 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007457 tabla_hs_insert_irq, "Headset insert detect", tabla);
7458 if (ret) {
7459 pr_err("%s: Failed to request irq %d\n", __func__,
7460 TABLA_IRQ_MBHC_INSERTION);
7461 goto err_insert_irq;
7462 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307463 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007464
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307465 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007466 tabla_hs_remove_irq, "Headset remove detect", tabla);
7467 if (ret) {
7468 pr_err("%s: Failed to request irq %d\n", __func__,
7469 TABLA_IRQ_MBHC_REMOVAL);
7470 goto err_remove_irq;
7471 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007472
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307473 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07007474 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007475 if (ret) {
7476 pr_err("%s: Failed to request irq %d\n", __func__,
7477 TABLA_IRQ_MBHC_POTENTIAL);
7478 goto err_potential_irq;
7479 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007480
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307481 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07007482 tabla_release_handler, "Button Release detect", tabla);
7483 if (ret) {
7484 pr_err("%s: Failed to request irq %d\n", __func__,
7485 TABLA_IRQ_MBHC_RELEASE);
7486 goto err_release_irq;
7487 }
7488
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307489 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007490 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
7491 if (ret) {
7492 pr_err("%s: Failed to request irq %d\n", __func__,
7493 TABLA_IRQ_SLIMBUS);
7494 goto err_slimbus_irq;
7495 }
7496
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307497 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
7498 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007499 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
7500
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307501 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07007502 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
7503 "HPH_L OCP detect", tabla);
7504 if (ret) {
7505 pr_err("%s: Failed to request irq %d\n", __func__,
7506 TABLA_IRQ_HPH_PA_OCPL_FAULT);
7507 goto err_hphl_ocp_irq;
7508 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307509 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07007510
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307511 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07007512 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
7513 "HPH_R OCP detect", tabla);
7514 if (ret) {
7515 pr_err("%s: Failed to request irq %d\n", __func__,
7516 TABLA_IRQ_HPH_PA_OCPR_FAULT);
7517 goto err_hphr_ocp_irq;
7518 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307519 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007520 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
7521 switch (tabla_dai[i].id) {
7522 case AIF1_PB:
7523 ch_cnt = tabla_dai[i].playback.channels_max;
7524 break;
7525 case AIF1_CAP:
7526 ch_cnt = tabla_dai[i].capture.channels_max;
7527 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08007528 case AIF2_PB:
7529 ch_cnt = tabla_dai[i].playback.channels_max;
7530 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07007531 case AIF2_CAP:
7532 ch_cnt = tabla_dai[i].capture.channels_max;
7533 break;
Neema Shetty3fb1b802012-04-27 13:53:24 -07007534 case AIF3_CAP:
7535 ch_cnt = tabla_dai[i].capture.channels_max;
7536 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007537 default:
7538 continue;
7539 }
7540 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
7541 ch_cnt), GFP_KERNEL);
7542 }
Patrick Lai49efeac2011-11-03 11:01:12 -07007543
Bradley Rubincb3950a2011-08-18 13:07:26 -07007544#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007545 if (ret == 0) {
7546 tabla->debugfs_poke =
7547 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
7548 &codec_debug_ops);
7549 tabla->debugfs_mbhc =
7550 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
7551 NULL, tabla, &codec_mbhc_debug_ops);
7552 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07007553#endif
7554
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007555 return ret;
7556
Patrick Lai49efeac2011-11-03 11:01:12 -07007557err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307558 wcd9xxx_free_irq(codec->control_data,
7559 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07007560err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307561 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007562err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307563 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007564err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307565 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007566err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307567 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007568err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307569 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007570err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07007571err_pdata:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007572 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007573 kfree(tabla);
7574 return ret;
7575}
7576static int tabla_codec_remove(struct snd_soc_codec *codec)
7577{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007578 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007579 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307580 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
7581 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
7582 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
7583 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
7584 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007585 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007586 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007587 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007588 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08007589 if (tabla->mbhc_fw)
7590 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007591 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
7592 kfree(tabla->dai[i].ch_num);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007593 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007594#ifdef CONFIG_DEBUG_FS
7595 debugfs_remove(tabla->debugfs_poke);
7596 debugfs_remove(tabla->debugfs_mbhc);
7597#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007598 kfree(tabla);
7599 return 0;
7600}
7601static struct snd_soc_codec_driver soc_codec_dev_tabla = {
7602 .probe = tabla_codec_probe,
7603 .remove = tabla_codec_remove,
7604 .read = tabla_read,
7605 .write = tabla_write,
7606
7607 .readable_register = tabla_readable,
7608 .volatile_register = tabla_volatile,
7609
7610 .reg_cache_size = TABLA_CACHE_SIZE,
7611 .reg_cache_default = tabla_reg_defaults,
7612 .reg_word_size = 1,
7613};
Bradley Rubincb3950a2011-08-18 13:07:26 -07007614
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007615#ifdef CONFIG_PM
7616static int tabla_suspend(struct device *dev)
7617{
Joonwoo Park816b8e62012-01-23 16:03:21 -08007618 dev_dbg(dev, "%s: system suspend\n", __func__);
7619 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007620}
7621
7622static int tabla_resume(struct device *dev)
7623{
Joonwoo Park03324832012-03-19 19:36:16 -07007624 struct platform_device *pdev = to_platform_device(dev);
7625 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Park816b8e62012-01-23 16:03:21 -08007626 dev_dbg(dev, "%s: system resume\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07007627 tabla->mbhc_last_resume = jiffies;
Joonwoo Park816b8e62012-01-23 16:03:21 -08007628 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007629}
7630
7631static const struct dev_pm_ops tabla_pm_ops = {
7632 .suspend = tabla_suspend,
7633 .resume = tabla_resume,
7634};
7635#endif
7636
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007637static int __devinit tabla_probe(struct platform_device *pdev)
7638{
Santosh Mardie15e2302011-11-15 10:39:23 +05307639 int ret = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307640 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05307641 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
7642 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307643 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05307644 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
7645 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
7646 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007647}
7648static int __devexit tabla_remove(struct platform_device *pdev)
7649{
7650 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007651 return 0;
7652}
7653static struct platform_driver tabla_codec_driver = {
7654 .probe = tabla_probe,
7655 .remove = tabla_remove,
7656 .driver = {
7657 .name = "tabla_codec",
7658 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007659#ifdef CONFIG_PM
7660 .pm = &tabla_pm_ops,
7661#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007662 },
7663};
7664
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007665static struct platform_driver tabla1x_codec_driver = {
7666 .probe = tabla_probe,
7667 .remove = tabla_remove,
7668 .driver = {
7669 .name = "tabla1x_codec",
7670 .owner = THIS_MODULE,
7671#ifdef CONFIG_PM
7672 .pm = &tabla_pm_ops,
7673#endif
7674 },
7675};
7676
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007677static int __init tabla_codec_init(void)
7678{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007679 int rtn = platform_driver_register(&tabla_codec_driver);
7680 if (rtn == 0) {
7681 rtn = platform_driver_register(&tabla1x_codec_driver);
7682 if (rtn != 0)
7683 platform_driver_unregister(&tabla_codec_driver);
7684 }
7685 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007686}
7687
7688static void __exit tabla_codec_exit(void)
7689{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007690 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007691 platform_driver_unregister(&tabla_codec_driver);
7692}
7693
7694module_init(tabla_codec_init);
7695module_exit(tabla_codec_exit);
7696
7697MODULE_DESCRIPTION("Tabla codec driver");
7698MODULE_VERSION("1.0");
7699MODULE_LICENSE("GPL v2");