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Russell King5e742ad2005-08-18 10:08:15 +01001/*
2 * linux/drivers/mfd/mcp-sa11x0.c
3 *
4 * Copyright (C) 2001-2005 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
9 *
10 * SA11x0 MCP (Multimedia Communications Port) driver.
11 *
12 * MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
13 */
14#include <linux/module.h>
15#include <linux/init.h>
Russell King45c7f752012-01-20 23:09:42 +000016#include <linux/io.h>
Russell King5e742ad2005-08-18 10:08:15 +010017#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
20#include <linux/spinlock.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010021#include <linux/platform_device.h>
Russell King2796e392012-01-21 09:34:30 +000022#include <linux/pm.h>
Thomas Kunzec8602ed2009-02-10 14:54:57 +010023#include <linux/mfd/mcp.h>
Russell King5e742ad2005-08-18 10:08:15 +010024
Russell Kinga09e64f2008-08-05 16:14:15 +010025#include <mach/hardware.h>
Russell King5e742ad2005-08-18 10:08:15 +010026#include <asm/mach-types.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010027#include <mach/mcp.h>
Russell King5e742ad2005-08-18 10:08:15 +010028
Russell Kingc4592ce2012-01-20 22:30:15 +000029#define DRIVER_NAME "sa11x0-mcp"
Russell King5e742ad2005-08-18 10:08:15 +010030
31struct mcp_sa11x0 {
Russell King45c7f752012-01-20 23:09:42 +000032 void __iomem *base0;
33 void __iomem *base1;
34 u32 mccr0;
35 u32 mccr1;
Russell King5e742ad2005-08-18 10:08:15 +010036};
37
Russell King45c7f752012-01-20 23:09:42 +000038/* Register offsets */
39#define MCCR0(m) ((m)->base0 + 0x00)
40#define MCDR0(m) ((m)->base0 + 0x08)
41#define MCDR1(m) ((m)->base0 + 0x0c)
42#define MCDR2(m) ((m)->base0 + 0x10)
43#define MCSR(m) ((m)->base0 + 0x18)
44#define MCCR1(m) ((m)->base1 + 0x00)
45
Russell King5e742ad2005-08-18 10:08:15 +010046#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
47
48static void
49mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
50{
Russell King45c7f752012-01-20 23:09:42 +000051 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010052
53 divisor /= 32;
54
Russell King45c7f752012-01-20 23:09:42 +000055 m->mccr0 &= ~0x00007f00;
56 m->mccr0 |= divisor << 8;
57 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +010058}
59
60static void
61mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
62{
Russell King45c7f752012-01-20 23:09:42 +000063 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010064
65 divisor /= 32;
66
Russell King45c7f752012-01-20 23:09:42 +000067 m->mccr0 &= ~0x0000007f;
68 m->mccr0 |= divisor;
69 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +010070}
71
72/*
73 * Write data to the device. The bit should be set after 3 subframe
74 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
75 * We really should try doing something more productive while we
76 * wait.
77 */
78static void
79mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
80{
Russell King45c7f752012-01-20 23:09:42 +000081 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +010082 int ret = -ETIME;
83 int i;
84
Russell King45c7f752012-01-20 23:09:42 +000085 writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));
Russell King5e742ad2005-08-18 10:08:15 +010086
87 for (i = 0; i < 2; i++) {
88 udelay(mcp->rw_timeout);
Russell King45c7f752012-01-20 23:09:42 +000089 if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
Russell King5e742ad2005-08-18 10:08:15 +010090 ret = 0;
91 break;
92 }
93 }
94
95 if (ret < 0)
96 printk(KERN_WARNING "mcp: write timed out\n");
97}
98
99/*
100 * Read data from the device. The bit should be set after 3 subframe
101 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
102 * We really should try doing something more productive while we
103 * wait.
104 */
105static unsigned int
106mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
107{
Russell King45c7f752012-01-20 23:09:42 +0000108 struct mcp_sa11x0 *m = priv(mcp);
Russell King5e742ad2005-08-18 10:08:15 +0100109 int ret = -ETIME;
110 int i;
111
Russell King45c7f752012-01-20 23:09:42 +0000112 writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));
Russell King5e742ad2005-08-18 10:08:15 +0100113
114 for (i = 0; i < 2; i++) {
115 udelay(mcp->rw_timeout);
Russell King45c7f752012-01-20 23:09:42 +0000116 if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
117 ret = readl_relaxed(MCDR2(m)) & 0xffff;
Russell King5e742ad2005-08-18 10:08:15 +0100118 break;
119 }
120 }
121
122 if (ret < 0)
123 printk(KERN_WARNING "mcp: read timed out\n");
124
125 return ret;
126}
127
128static void mcp_sa11x0_enable(struct mcp *mcp)
129{
Russell King45c7f752012-01-20 23:09:42 +0000130 struct mcp_sa11x0 *m = priv(mcp);
131
132 writel(-1, MCSR(m));
133 m->mccr0 |= MCCR0_MCE;
134 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100135}
136
137static void mcp_sa11x0_disable(struct mcp *mcp)
138{
Russell King45c7f752012-01-20 23:09:42 +0000139 struct mcp_sa11x0 *m = priv(mcp);
140
141 m->mccr0 &= ~MCCR0_MCE;
142 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100143}
144
145/*
146 * Our methods.
147 */
148static struct mcp_ops mcp_sa11x0 = {
149 .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
150 .set_audio_divisor = mcp_sa11x0_set_audio_divisor,
151 .reg_write = mcp_sa11x0_write,
152 .reg_read = mcp_sa11x0_read,
153 .enable = mcp_sa11x0_enable,
154 .disable = mcp_sa11x0_disable,
155};
156
Russell King45c7f752012-01-20 23:09:42 +0000157static int mcp_sa11x0_probe(struct platform_device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100158{
Russell King45c7f752012-01-20 23:09:42 +0000159 struct mcp_plat_data *data = dev->dev.platform_data;
160 struct resource *mem0, *mem1;
161 struct mcp_sa11x0 *m;
Russell King5e742ad2005-08-18 10:08:15 +0100162 struct mcp *mcp;
163 int ret;
164
Russell King323cdfc2005-08-18 10:10:46 +0100165 if (!data)
Russell King5e742ad2005-08-18 10:08:15 +0100166 return -ENODEV;
167
Russell King45c7f752012-01-20 23:09:42 +0000168 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
169 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
170 if (!mem0 || !mem1)
171 return -ENXIO;
Russell King5e742ad2005-08-18 10:08:15 +0100172
Russell King45c7f752012-01-20 23:09:42 +0000173 if (!request_mem_region(mem0->start, resource_size(mem0),
174 DRIVER_NAME)) {
175 ret = -EBUSY;
176 goto err_mem0;
177 }
178
179 if (!request_mem_region(mem1->start, resource_size(mem1),
180 DRIVER_NAME)) {
181 ret = -EBUSY;
182 goto err_mem1;
183 }
184
185 mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
Russell King5e742ad2005-08-18 10:08:15 +0100186 if (!mcp) {
187 ret = -ENOMEM;
Russell King45c7f752012-01-20 23:09:42 +0000188 goto err_alloc;
Russell King5e742ad2005-08-18 10:08:15 +0100189 }
190
191 mcp->owner = THIS_MODULE;
192 mcp->ops = &mcp_sa11x0;
Russell King323cdfc2005-08-18 10:10:46 +0100193 mcp->sclk_rate = data->sclk_rate;
Russell King5e742ad2005-08-18 10:08:15 +0100194
Russell King45c7f752012-01-20 23:09:42 +0000195 m = priv(mcp);
196 m->mccr0 = data->mccr0 | 0x7f7f;
197 m->mccr1 = data->mccr1;
198
199 m->base0 = ioremap(mem0->start, resource_size(mem0));
200 m->base1 = ioremap(mem1->start, resource_size(mem1));
201 if (!m->base0 || !m->base1) {
202 ret = -ENOMEM;
203 goto err_ioremap;
204 }
205
206 platform_set_drvdata(dev, mcp);
Russell King5e742ad2005-08-18 10:08:15 +0100207
Russell King216f63c2012-01-20 17:37:21 +0000208 /*
Russell King323cdfc2005-08-18 10:10:46 +0100209 * Initialise device. Note that we initially
210 * set the sampling rate to minimum.
211 */
Russell King45c7f752012-01-20 23:09:42 +0000212 writel_relaxed(-1, MCSR(m));
213 writel_relaxed(m->mccr1, MCCR1(m));
214 writel_relaxed(m->mccr0, MCCR0(m));
Russell King5e742ad2005-08-18 10:08:15 +0100215
216 /*
217 * Calculate the read/write timeout (us) from the bit clock
218 * rate. This is the period for 3 64-bit frames. Always
219 * round this time up.
220 */
221 mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
222 mcp->sclk_rate;
223
Russell Kingabe06082012-01-20 22:13:52 +0000224 ret = mcp_host_add(mcp, data->codec_pdata);
Russell King5e742ad2005-08-18 10:08:15 +0100225 if (ret == 0)
Russell King45c7f752012-01-20 23:09:42 +0000226 return 0;
Russell King5e742ad2005-08-18 10:08:15 +0100227
Russell King45c7f752012-01-20 23:09:42 +0000228 platform_set_drvdata(dev, NULL);
229
230 err_ioremap:
231 iounmap(m->base1);
232 iounmap(m->base0);
Russell King30816ac2012-01-20 22:51:07 +0000233 mcp_host_free(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000234 err_alloc:
235 release_mem_region(mem1->start, resource_size(mem1));
236 err_mem1:
237 release_mem_region(mem0->start, resource_size(mem0));
238 err_mem0:
Russell King5e742ad2005-08-18 10:08:15 +0100239 return ret;
240}
241
Russell King216f63c2012-01-20 17:37:21 +0000242static int mcp_sa11x0_remove(struct platform_device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100243{
Russell King216f63c2012-01-20 17:37:21 +0000244 struct mcp *mcp = platform_get_drvdata(dev);
Russell King45c7f752012-01-20 23:09:42 +0000245 struct mcp_sa11x0 *m = priv(mcp);
246 struct resource *mem0, *mem1;
247
Russell Kinga4b54ac2012-01-21 18:26:17 +0000248 if (m->mccr0 & MCCR0_MCE)
249 dev_warn(&dev->dev,
250 "device left active (missing disable call?)\n");
251
Russell King45c7f752012-01-20 23:09:42 +0000252 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
253 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
Russell King5e742ad2005-08-18 10:08:15 +0100254
Russell King216f63c2012-01-20 17:37:21 +0000255 platform_set_drvdata(dev, NULL);
Russell King30816ac2012-01-20 22:51:07 +0000256 mcp_host_del(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000257 iounmap(m->base1);
258 iounmap(m->base0);
Russell King30816ac2012-01-20 22:51:07 +0000259 mcp_host_free(mcp);
Russell King45c7f752012-01-20 23:09:42 +0000260 release_mem_region(mem1->start, resource_size(mem1));
261 release_mem_region(mem0->start, resource_size(mem0));
Russell King5e742ad2005-08-18 10:08:15 +0100262
263 return 0;
264}
265
Russell King2796e392012-01-21 09:34:30 +0000266#ifdef CONFIG_PM_SLEEP
267static int mcp_sa11x0_suspend(struct device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100268{
Russell King2796e392012-01-21 09:34:30 +0000269 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
Russell King5e742ad2005-08-18 10:08:15 +0100270
Russell Kinga4b54ac2012-01-21 18:26:17 +0000271 if (m->mccr0 & MCCR0_MCE)
272 dev_warn(dev, "device left active (missing disable call?)\n");
273
Russell King45c7f752012-01-20 23:09:42 +0000274 writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
Russell King9480e302005-10-28 09:52:56 -0700275
Russell King5e742ad2005-08-18 10:08:15 +0100276 return 0;
277}
278
Russell King2796e392012-01-21 09:34:30 +0000279static int mcp_sa11x0_resume(struct device *dev)
Russell King5e742ad2005-08-18 10:08:15 +0100280{
Russell King2796e392012-01-21 09:34:30 +0000281 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
Russell King5e742ad2005-08-18 10:08:15 +0100282
Russell King45c7f752012-01-20 23:09:42 +0000283 writel_relaxed(m->mccr1, MCCR1(m));
284 writel_relaxed(m->mccr0, MCCR0(m));
Russell King9480e302005-10-28 09:52:56 -0700285
Russell King5e742ad2005-08-18 10:08:15 +0100286 return 0;
287}
Russell King2796e392012-01-21 09:34:30 +0000288#endif
289
290static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
Russell Kinga6aecae2012-01-21 18:03:00 +0000291#ifdef CONFIG_PM_SLEEP
292 .suspend = mcp_sa11x0_suspend,
293 .freeze = mcp_sa11x0_suspend,
294 .poweroff = mcp_sa11x0_suspend,
295 .resume_noirq = mcp_sa11x0_resume,
296 .thaw_noirq = mcp_sa11x0_resume,
297 .restore_noirq = mcp_sa11x0_resume,
298#endif
Russell King2796e392012-01-21 09:34:30 +0000299};
Russell King5e742ad2005-08-18 10:08:15 +0100300
Russell King3ae5eae2005-11-09 22:32:44 +0000301static struct platform_driver mcp_sa11x0_driver = {
Russell King5e742ad2005-08-18 10:08:15 +0100302 .probe = mcp_sa11x0_probe,
303 .remove = mcp_sa11x0_remove,
Russell King3ae5eae2005-11-09 22:32:44 +0000304 .driver = {
Russell Kingc4592ce2012-01-20 22:30:15 +0000305 .name = DRIVER_NAME,
306 .owner = THIS_MODULE,
Russell King2796e392012-01-21 09:34:30 +0000307 .pm = &mcp_sa11x0_pm_ops,
Russell King3ae5eae2005-11-09 22:32:44 +0000308 },
Russell King5e742ad2005-08-18 10:08:15 +0100309};
310
311/*
312 * This needs re-working
313 */
Mark Brown65349d62011-11-23 22:58:34 +0000314module_platform_driver(mcp_sa11x0_driver);
Russell King5e742ad2005-08-18 10:08:15 +0100315
Russell Kingc4592ce2012-01-20 22:30:15 +0000316MODULE_ALIAS("platform:" DRIVER_NAME);
Russell King5e742ad2005-08-18 10:08:15 +0100317MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
318MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
319MODULE_LICENSE("GPL");