blob: 9698e91f6a37e23984d771bbdf8fff228aa8048e [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080052
Jesse Barnes79e53942008-11-07 14:24:08 -080053
Chris Wilson2e88e402010-08-07 11:01:27 +010054static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080055 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
61 "SECAM_60"
62};
63
64#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
Chris Wilsonea5b2132010-08-04 13:50:23 +010066struct intel_sdvo {
67 struct intel_encoder base;
68
Chris Wilsonf899fc62010-07-20 15:44:45 -070069 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070070 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080071
Chris Wilsone957d772010-09-24 12:52:03 +010072 struct i2c_adapter ddc;
73
Jesse Barnese2f0ba92009-02-02 15:11:52 -080074 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070075 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080076
Jesse Barnese2f0ba92009-02-02 15:11:52 -080077 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080079
Jesse Barnese2f0ba92009-02-02 15:11:52 -080080 /*
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
83 */
Jesse Barnes79e53942008-11-07 14:24:08 -080084 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080085
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080087 int pixel_clock_min, pixel_clock_max;
88
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080089 /*
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
92 */
93 uint16_t attached_output;
94
Jesse Barnese2f0ba92009-02-02 15:11:52 -080095 /**
Chris Wilsone953fd72011-02-21 22:23:52 +000096 * This is used to select the color range of RBG outputs in HDMI mode.
97 * It is only valid when using TMDS encoding and 8 bit per color mode.
98 */
99 uint32_t color_range;
100
101 /**
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800102 * This is set if we're going to treat the device as TV-out.
103 *
104 * While we have these nice friendly flags for output types that ought
105 * to decide this for us, the S-Video output on our HDMI+S-Video card
106 * shows up as RGB1 (VGA).
107 */
108 bool is_tv;
109
Zhao Yakuice6feab2009-08-24 13:50:26 +0800110 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100111 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800112
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800113 /**
114 * This is set if we treat the device as HDMI, instead of DVI.
115 */
116 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000117 bool has_hdmi_monitor;
118 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800119
Ma Ling7086c872009-05-13 11:20:06 +0800120 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100121 * This is set if we detect output of sdvo device as LVDS and
122 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800123 */
124 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800125
126 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800127 * This is sdvo fixed pannel mode pointer
128 */
129 struct drm_display_mode *sdvo_lvds_fixed_mode;
130
Eric Anholtc751ce42010-03-25 11:48:48 -0700131 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800132 uint8_t ddc_bus;
133
Chris Wilson6c9547f2010-08-25 10:05:17 +0100134 /* Input timings for adjusted_mode */
135 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800136};
137
138struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100139 struct intel_connector base;
140
Zhenyu Wang14571b42010-03-30 14:06:33 +0800141 /* Mark the type of connector */
142 uint16_t output_flag;
143
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100144 int force_audio;
145
Zhenyu Wang14571b42010-03-30 14:06:33 +0800146 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100147 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800148 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100149 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800150
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100151 struct drm_property *force_audio_property;
152
Zhao Yakuib9219c52009-09-10 15:45:46 +0800153 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100154 struct drm_property *left;
155 struct drm_property *right;
156 struct drm_property *top;
157 struct drm_property *bottom;
158 struct drm_property *hpos;
159 struct drm_property *vpos;
160 struct drm_property *contrast;
161 struct drm_property *saturation;
162 struct drm_property *hue;
163 struct drm_property *sharpness;
164 struct drm_property *flicker_filter;
165 struct drm_property *flicker_filter_adaptive;
166 struct drm_property *flicker_filter_2d;
167 struct drm_property *tv_chroma_filter;
168 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100169 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800170
171 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100172 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800173
174 /* Add variable to record current setting for the above property */
175 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100176
Zhao Yakuib9219c52009-09-10 15:45:46 +0800177 /* this is to get the range of margin.*/
178 u32 max_hscan, max_vscan;
179 u32 max_hpos, cur_hpos;
180 u32 max_vpos, cur_vpos;
181 u32 cur_brightness, max_brightness;
182 u32 cur_contrast, max_contrast;
183 u32 cur_saturation, max_saturation;
184 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100185 u32 cur_sharpness, max_sharpness;
186 u32 cur_flicker_filter, max_flicker_filter;
187 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
188 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
189 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
190 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100191 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800192};
193
Chris Wilson890f3352010-09-14 16:46:59 +0100194static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100195{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100196 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100197}
198
Chris Wilsondf0e9242010-09-09 16:20:55 +0100199static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
200{
201 return container_of(intel_attached_encoder(connector),
202 struct intel_sdvo, base);
203}
204
Chris Wilson615fb932010-08-04 13:50:24 +0100205static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
206{
207 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
208}
209
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800210static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100211intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100212static bool
213intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
214 struct intel_sdvo_connector *intel_sdvo_connector,
215 int type);
216static bool
217intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800219
Jesse Barnes79e53942008-11-07 14:24:08 -0800220/**
221 * Writes the SDVOB or SDVOC with the given value, but always writes both
222 * SDVOB and SDVOC to work around apparent hardware issues (according to
223 * comments in the BIOS).
224 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100225static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800226{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100227 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800228 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800229 u32 bval = val, cval = val;
230 int i;
231
Chris Wilsonea5b2132010-08-04 13:50:23 +0100232 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
233 I915_WRITE(intel_sdvo->sdvo_reg, val);
234 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800235 return;
236 }
237
Chris Wilsonea5b2132010-08-04 13:50:23 +0100238 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800239 cval = I915_READ(SDVOC);
240 } else {
241 bval = I915_READ(SDVOB);
242 }
243 /*
244 * Write the registers twice for luck. Sometimes,
245 * writing them only once doesn't appear to 'stick'.
246 * The BIOS does this too. Yay, magic
247 */
248 for (i = 0; i < 2; i++)
249 {
250 I915_WRITE(SDVOB, bval);
251 I915_READ(SDVOB);
252 I915_WRITE(SDVOC, cval);
253 I915_READ(SDVOC);
254 }
255}
256
Chris Wilson32aad862010-08-04 13:50:25 +0100257static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800258{
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 struct i2c_msg msgs[] = {
260 {
Chris Wilsone957d772010-09-24 12:52:03 +0100261 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800262 .flags = 0,
263 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100264 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 },
266 {
Chris Wilsone957d772010-09-24 12:52:03 +0100267 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800268 .flags = I2C_M_RD,
269 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100270 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 }
272 };
Chris Wilson32aad862010-08-04 13:50:25 +0100273 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800274
Chris Wilsonf899fc62010-07-20 15:44:45 -0700275 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800276 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800277
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800278 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800279 return false;
280}
281
Jesse Barnes79e53942008-11-07 14:24:08 -0800282#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
283/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100284static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800285 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100286 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800287} sdvo_cmd_names[] = {
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100331
Zhao Yakuib9219c52009-09-10 15:45:46 +0800332 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
377
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800378 /* HDMI op code */
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800399};
400
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800401#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100402#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800403
Chris Wilsonea5b2132010-08-04 13:50:23 +0100404static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100405 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800406{
Jesse Barnes79e53942008-11-07 14:24:08 -0800407 int i;
408
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800409 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100410 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800411 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800412 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800413 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800414 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400415 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800417 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800418 break;
419 }
420 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400421 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800422 DRM_LOG_KMS("(%02X)", cmd);
423 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800424}
Jesse Barnes79e53942008-11-07 14:24:08 -0800425
Jesse Barnes79e53942008-11-07 14:24:08 -0800426static const char *cmd_status_names[] = {
427 "Power on",
428 "Success",
429 "Not supported",
430 "Invalid arg",
431 "Pending",
432 "Target not specified",
433 "Scaling not supported"
434};
435
Chris Wilsone957d772010-09-24 12:52:03 +0100436static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
437 const void *args, int args_len)
438{
439 u8 buf[args_len*2 + 2], status;
440 struct i2c_msg msgs[args_len + 3];
441 int i, ret;
442
443 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
444
445 for (i = 0; i < args_len; i++) {
446 msgs[i].addr = intel_sdvo->slave_addr;
447 msgs[i].flags = 0;
448 msgs[i].len = 2;
449 msgs[i].buf = buf + 2 *i;
450 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
451 buf[2*i + 1] = ((u8*)args)[i];
452 }
453 msgs[i].addr = intel_sdvo->slave_addr;
454 msgs[i].flags = 0;
455 msgs[i].len = 2;
456 msgs[i].buf = buf + 2*i;
457 buf[2*i + 0] = SDVO_I2C_OPCODE;
458 buf[2*i + 1] = cmd;
459
460 /* the following two are to read the response */
461 status = SDVO_I2C_CMD_STATUS;
462 msgs[i+1].addr = intel_sdvo->slave_addr;
463 msgs[i+1].flags = 0;
464 msgs[i+1].len = 1;
465 msgs[i+1].buf = &status;
466
467 msgs[i+2].addr = intel_sdvo->slave_addr;
468 msgs[i+2].flags = I2C_M_RD;
469 msgs[i+2].len = 1;
470 msgs[i+2].buf = &status;
471
472 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
473 if (ret < 0) {
474 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
475 return false;
476 }
477 if (ret != i+3) {
478 /* failure in I2C transfer */
479 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
480 return false;
481 }
482
Chris Wilsone957d772010-09-24 12:52:03 +0100483 return true;
484}
485
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100486static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
487 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800488{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100489 u8 retry = 5;
490 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800491 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800492
Chris Wilsond121a5d2011-01-25 15:00:01 +0000493 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
494
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100495 /*
496 * The documentation states that all commands will be
497 * processed within 15µs, and that we need only poll
498 * the status byte a maximum of 3 times in order for the
499 * command to be complete.
500 *
501 * Check 5 times in case the hardware failed to read the docs.
502 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000503 if (!intel_sdvo_read_byte(intel_sdvo,
504 SDVO_I2C_CMD_STATUS,
505 &status))
506 goto log_fail;
507
508 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
509 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100510 if (!intel_sdvo_read_byte(intel_sdvo,
511 SDVO_I2C_CMD_STATUS,
512 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000513 goto log_fail;
514 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100515
Jesse Barnes79e53942008-11-07 14:24:08 -0800516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800518 else
yakui_zhao342dc382009-06-02 14:12:00 +0800519 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800520
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100521 if (status != SDVO_CMD_STATUS_SUCCESS)
522 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800523
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
529 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800531 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100532 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100533 return true;
534
535log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000536 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100537 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800538}
539
Hannes Ederb358d0a2008-12-18 21:18:47 +0100540static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800541{
542 if (mode->clock >= 100000)
543 return 1;
544 else if (mode->clock >= 50000)
545 return 2;
546 else
547 return 4;
548}
549
Chris Wilsone957d772010-09-24 12:52:03 +0100550static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800552{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000553 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100554 return intel_sdvo_write_cmd(intel_sdvo,
555 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
556 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800557}
558
Chris Wilson32aad862010-08-04 13:50:25 +0100559static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
560{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000561 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
562 return false;
563
564 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100565}
566
567static bool
568intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
569{
570 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
571 return false;
572
573 return intel_sdvo_read_response(intel_sdvo, value, len);
574}
575
576static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800577{
578 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100579 return intel_sdvo_set_value(intel_sdvo,
580 SDVO_CMD_SET_TARGET_INPUT,
581 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800582}
583
584/**
585 * Return whether each input is trained.
586 *
587 * This function is making an assumption about the layout of the response,
588 * which should be checked against the docs.
589 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100590static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800591{
592 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800593
Chris Wilson1a3665c2011-01-25 13:59:37 +0000594 BUILD_BUG_ON(sizeof(response) != 1);
Chris Wilson32aad862010-08-04 13:50:25 +0100595 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
596 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800597 return false;
598
599 *input_1 = response.input0_trained;
600 *input_2 = response.input1_trained;
601 return true;
602}
603
Chris Wilsonea5b2132010-08-04 13:50:23 +0100604static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800605 u16 outputs)
606{
Chris Wilson32aad862010-08-04 13:50:25 +0100607 return intel_sdvo_set_value(intel_sdvo,
608 SDVO_CMD_SET_ACTIVE_OUTPUTS,
609 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800610}
611
Chris Wilsonea5b2132010-08-04 13:50:23 +0100612static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800613 int mode)
614{
Chris Wilson32aad862010-08-04 13:50:25 +0100615 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800616
617 switch (mode) {
618 case DRM_MODE_DPMS_ON:
619 state = SDVO_ENCODER_STATE_ON;
620 break;
621 case DRM_MODE_DPMS_STANDBY:
622 state = SDVO_ENCODER_STATE_STANDBY;
623 break;
624 case DRM_MODE_DPMS_SUSPEND:
625 state = SDVO_ENCODER_STATE_SUSPEND;
626 break;
627 case DRM_MODE_DPMS_OFF:
628 state = SDVO_ENCODER_STATE_OFF;
629 break;
630 }
631
Chris Wilson32aad862010-08-04 13:50:25 +0100632 return intel_sdvo_set_value(intel_sdvo,
633 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800634}
635
Chris Wilsonea5b2132010-08-04 13:50:23 +0100636static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800637 int *clock_min,
638 int *clock_max)
639{
640 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800641
Chris Wilson1a3665c2011-01-25 13:59:37 +0000642 BUILD_BUG_ON(sizeof(clocks) != 4);
Chris Wilson32aad862010-08-04 13:50:25 +0100643 if (!intel_sdvo_get_value(intel_sdvo,
644 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
645 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800646 return false;
647
648 /* Convert the values from units of 10 kHz to kHz. */
649 *clock_min = clocks.min * 10;
650 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800651 return true;
652}
653
Chris Wilsonea5b2132010-08-04 13:50:23 +0100654static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800655 u16 outputs)
656{
Chris Wilson32aad862010-08-04 13:50:25 +0100657 return intel_sdvo_set_value(intel_sdvo,
658 SDVO_CMD_SET_TARGET_OUTPUT,
659 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800660}
661
Chris Wilsonea5b2132010-08-04 13:50:23 +0100662static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800663 struct intel_sdvo_dtd *dtd)
664{
Chris Wilson32aad862010-08-04 13:50:25 +0100665 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
666 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800667}
668
Chris Wilsonea5b2132010-08-04 13:50:23 +0100669static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800670 struct intel_sdvo_dtd *dtd)
671{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100672 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800673 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
674}
675
Chris Wilsonea5b2132010-08-04 13:50:23 +0100676static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800677 struct intel_sdvo_dtd *dtd)
678{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100679 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800680 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
681}
682
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800683static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100684intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800685 uint16_t clock,
686 uint16_t width,
687 uint16_t height)
688{
689 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800690
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800691 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800692 args.clock = clock;
693 args.width = width;
694 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800695 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800696
Chris Wilsonea5b2132010-08-04 13:50:23 +0100697 if (intel_sdvo->is_lvds &&
698 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
699 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800700 args.scaled = 1;
701
Chris Wilson32aad862010-08-04 13:50:25 +0100702 return intel_sdvo_set_value(intel_sdvo,
703 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
704 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800705}
706
Chris Wilsonea5b2132010-08-04 13:50:23 +0100707static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800708 struct intel_sdvo_dtd *dtd)
709{
Chris Wilson1a3665c2011-01-25 13:59:37 +0000710 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
711 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
Chris Wilson32aad862010-08-04 13:50:25 +0100712 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
713 &dtd->part1, sizeof(dtd->part1)) &&
714 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
715 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800716}
Jesse Barnes79e53942008-11-07 14:24:08 -0800717
Chris Wilsonea5b2132010-08-04 13:50:23 +0100718static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800719{
Chris Wilson32aad862010-08-04 13:50:25 +0100720 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800721}
722
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800723static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100724 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800725{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800726 uint16_t width, height;
727 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
728 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800729
730 width = mode->crtc_hdisplay;
731 height = mode->crtc_vdisplay;
732
733 /* do some mode translations */
734 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
735 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
736
737 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
738 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
739
740 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
741 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
742
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800743 dtd->part1.clock = mode->clock / 10;
744 dtd->part1.h_active = width & 0xff;
745 dtd->part1.h_blank = h_blank_len & 0xff;
746 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800747 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800748 dtd->part1.v_active = height & 0xff;
749 dtd->part1.v_blank = v_blank_len & 0xff;
750 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800751 ((v_blank_len >> 8) & 0xf);
752
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800753 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 dtd->part2.h_sync_width = h_sync_len & 0xff;
755 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800756 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800757 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800758 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
759 ((v_sync_len & 0x30) >> 4);
760
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800762 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800763 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800764 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800766
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800767 dtd->part2.sdvo_flags = 0;
768 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
769 dtd->part2.reserved = 0;
770}
Jesse Barnes79e53942008-11-07 14:24:08 -0800771
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800772static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100773 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800774{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800775 mode->hdisplay = dtd->part1.h_active;
776 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
777 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800778 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
780 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
781 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
782 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
783
784 mode->vdisplay = dtd->part1.v_active;
785 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
786 mode->vsync_start = mode->vdisplay;
787 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800788 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800789 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
790 mode->vsync_end = mode->vsync_start +
791 (dtd->part2.v_sync_off_width & 0xf);
792 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
793 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
794 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
795
796 mode->clock = dtd->part1.clock * 10;
797
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800798 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800799 if (dtd->part2.dtd_flags & 0x2)
800 mode->flags |= DRM_MODE_FLAG_PHSYNC;
801 if (dtd->part2.dtd_flags & 0x4)
802 mode->flags |= DRM_MODE_FLAG_PVSYNC;
803}
804
Chris Wilsone27d8532010-10-22 09:15:22 +0100805static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800806{
Chris Wilsone27d8532010-10-22 09:15:22 +0100807 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800808
Chris Wilson1a3665c2011-01-25 13:59:37 +0000809 BUILD_BUG_ON(sizeof(encode) != 2);
Chris Wilsone27d8532010-10-22 09:15:22 +0100810 return intel_sdvo_get_value(intel_sdvo,
811 SDVO_CMD_GET_SUPP_ENCODE,
812 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800813}
814
Chris Wilsonea5b2132010-08-04 13:50:23 +0100815static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700816 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800817{
Chris Wilson32aad862010-08-04 13:50:25 +0100818 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819}
820
Chris Wilsonea5b2132010-08-04 13:50:23 +0100821static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800822 uint8_t mode)
823{
Chris Wilson32aad862010-08-04 13:50:25 +0100824 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800825}
826
827#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100828static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800829{
830 int i, j;
831 uint8_t set_buf_index[2];
832 uint8_t av_split;
833 uint8_t buf_size;
834 uint8_t buf[48];
835 uint8_t *pos;
836
Chris Wilson32aad862010-08-04 13:50:25 +0100837 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800838
839 for (i = 0; i <= av_split; i++) {
840 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700841 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800842 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700843 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
844 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800845
846 pos = buf;
847 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700848 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800849 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700850 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800851 pos += 8;
852 }
853 }
854}
855#endif
856
David Härdeman3c17fe42010-09-24 21:44:32 +0200857static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800858{
859 struct dip_infoframe avi_if = {
860 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200861 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800862 .len = DIP_LEN_AVI,
863 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200864 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
865 uint8_t set_buf_index[2] = { 1, 0 };
866 uint64_t *data = (uint64_t *)&avi_if;
867 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800868
David Härdeman3c17fe42010-09-24 21:44:32 +0200869 intel_dip_infoframe_csum(&avi_if);
870
Chris Wilsond121a5d2011-01-25 15:00:01 +0000871 if (!intel_sdvo_set_value(intel_sdvo,
872 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200873 set_buf_index, 2))
874 return false;
875
876 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000877 if (!intel_sdvo_set_value(intel_sdvo,
878 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200879 data, 8))
880 return false;
881 data++;
882 }
883
Chris Wilsond121a5d2011-01-25 15:00:01 +0000884 return intel_sdvo_set_value(intel_sdvo,
885 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200886 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800887}
888
Chris Wilson32aad862010-08-04 13:50:25 +0100889static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800890{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800891 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100892 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800893
Chris Wilson40039752010-08-04 13:50:26 +0100894 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800895 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100896 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800897
Chris Wilson32aad862010-08-04 13:50:25 +0100898 BUILD_BUG_ON(sizeof(format) != 6);
899 return intel_sdvo_set_value(intel_sdvo,
900 SDVO_CMD_SET_TV_FORMAT,
901 &format, sizeof(format));
902}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800903
Chris Wilson32aad862010-08-04 13:50:25 +0100904static bool
905intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
906 struct drm_display_mode *mode)
907{
908 struct intel_sdvo_dtd output_dtd;
909
910 if (!intel_sdvo_set_target_output(intel_sdvo,
911 intel_sdvo->attached_output))
912 return false;
913
914 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
915 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
916 return false;
917
918 return true;
919}
920
921static bool
922intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
923 struct drm_display_mode *mode,
924 struct drm_display_mode *adjusted_mode)
925{
Chris Wilson32aad862010-08-04 13:50:25 +0100926 /* Reset the input timing to the screen. Assume always input 0. */
927 if (!intel_sdvo_set_target_input(intel_sdvo))
928 return false;
929
930 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
931 mode->clock / 10,
932 mode->hdisplay,
933 mode->vdisplay))
934 return false;
935
936 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100937 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100938 return false;
939
Chris Wilson6c9547f2010-08-25 10:05:17 +0100940 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100941
942 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100943 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800944}
945
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800946static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
947 struct drm_display_mode *mode,
948 struct drm_display_mode *adjusted_mode)
949{
Chris Wilson890f3352010-09-14 16:46:59 +0100950 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100951 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800952
Chris Wilson32aad862010-08-04 13:50:25 +0100953 /* We need to construct preferred input timings based on our
954 * output timings. To do that, we have to set the output
955 * timings, even though this isn't really the right place in
956 * the sequence to do it. Oh well.
957 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100958 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100959 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800960 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100961
Pavel Roskinc74696b2010-09-02 14:46:34 -0400962 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
963 mode,
964 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100965 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100966 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100967 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800968 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800969
Pavel Roskinc74696b2010-09-02 14:46:34 -0400970 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
971 mode,
972 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800973 }
Chris Wilson32aad862010-08-04 13:50:25 +0100974
975 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100976 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100977 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100978 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
979 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100980
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800981 return true;
982}
983
984static void intel_sdvo_mode_set(struct drm_encoder *encoder,
985 struct drm_display_mode *mode,
986 struct drm_display_mode *adjusted_mode)
987{
988 struct drm_device *dev = encoder->dev;
989 struct drm_i915_private *dev_priv = dev->dev_private;
990 struct drm_crtc *crtc = encoder->crtc;
991 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100992 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100993 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800994 struct intel_sdvo_in_out_map in_out;
995 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100996 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
997 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998
999 if (!mode)
1000 return;
1001
1002 /* First, set the input mapping for the first input to our controlled
1003 * output. This is only correct if we're a single-input device, in
1004 * which case the first input is the output from the appropriate SDVO
1005 * channel on the motherboard. In a two-input device, the first input
1006 * will be SDVOB and the second SDVOC.
1007 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001008 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001009 in_out.in1 = 0;
1010
Pavel Roskinc74696b2010-09-02 14:46:34 -04001011 intel_sdvo_set_value(intel_sdvo,
1012 SDVO_CMD_SET_IN_OUT_MAP,
1013 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001014
Chris Wilson6c9547f2010-08-25 10:05:17 +01001015 /* Set the output timings to the screen */
1016 if (!intel_sdvo_set_target_output(intel_sdvo,
1017 intel_sdvo->attached_output))
1018 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001020 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001021 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001022 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001023 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1024 input_dtd = intel_sdvo->input_dtd;
1025 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001026 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001027 if (!intel_sdvo_set_target_output(intel_sdvo,
1028 intel_sdvo->attached_output))
1029 return;
1030
Chris Wilson6c9547f2010-08-25 10:05:17 +01001031 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001032 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001033 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001034
1035 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001036 if (!intel_sdvo_set_target_input(intel_sdvo))
1037 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001038
Chris Wilson97aaf912011-01-04 20:10:52 +00001039 if (intel_sdvo->has_hdmi_monitor) {
1040 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1041 intel_sdvo_set_colorimetry(intel_sdvo,
1042 SDVO_COLORIMETRY_RGB256);
1043 intel_sdvo_set_avi_infoframe(intel_sdvo);
1044 } else
1045 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001046
Chris Wilson6c9547f2010-08-25 10:05:17 +01001047 if (intel_sdvo->is_tv &&
1048 !intel_sdvo_set_tv_format(intel_sdvo))
1049 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001050
Pavel Roskinc74696b2010-09-02 14:46:34 -04001051 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001052
Chris Wilson6c9547f2010-08-25 10:05:17 +01001053 switch (pixel_multiplier) {
1054 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001055 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1056 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1057 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001058 }
Chris Wilson32aad862010-08-04 13:50:25 +01001059 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1060 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001061
1062 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001063 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001064 sdvox = 0;
Chris Wilsone953fd72011-02-21 22:23:52 +00001065 if (intel_sdvo->is_hdmi)
1066 sdvox |= intel_sdvo->color_range;
Chris Wilson6714afb2010-12-17 04:10:51 +00001067 if (INTEL_INFO(dev)->gen < 5)
1068 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001069 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1070 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1071 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1072 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001073 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001074 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001075 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001076 case SDVOB:
1077 sdvox &= SDVOB_PRESERVE_MASK;
1078 break;
1079 case SDVOC:
1080 sdvox &= SDVOC_PRESERVE_MASK;
1081 break;
1082 }
1083 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1084 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001085 if (intel_crtc->pipe == 1)
1086 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilsonda79de92010-11-22 11:12:46 +00001087 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001088 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001089
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001090 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001091 /* done in crtc_mode_set as the dpll_md reg must be written early */
1092 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1093 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001094 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001095 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001096 }
1097
Chris Wilson6714afb2010-12-17 04:10:51 +00001098 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1099 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001100 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001101 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001102}
1103
1104static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1105{
1106 struct drm_device *dev = encoder->dev;
1107 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001108 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001109 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001110 u32 temp;
1111
1112 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001113 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001114 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001115 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001116
1117 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001118 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001119 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001120 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001121 }
1122 }
1123 } else {
1124 bool input1, input2;
1125 int i;
1126 u8 status;
1127
Chris Wilsonea5b2132010-08-04 13:50:23 +01001128 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001129 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001130 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001131 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001132 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001133
Chris Wilson32aad862010-08-04 13:50:25 +01001134 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001135 /* Warn if the device reported failure to sync.
1136 * A lot of SDVO devices fail to notify of sync, but it's
1137 * a given it the status is a success, we succeeded.
1138 */
1139 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001140 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001141 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001142 }
1143
1144 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001145 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1146 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001147 }
1148 return;
1149}
1150
Jesse Barnes79e53942008-11-07 14:24:08 -08001151static int intel_sdvo_mode_valid(struct drm_connector *connector,
1152 struct drm_display_mode *mode)
1153{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001154 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001155
1156 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1157 return MODE_NO_DBLESCAN;
1158
Chris Wilsonea5b2132010-08-04 13:50:23 +01001159 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001160 return MODE_CLOCK_LOW;
1161
Chris Wilsonea5b2132010-08-04 13:50:23 +01001162 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001163 return MODE_CLOCK_HIGH;
1164
Chris Wilson85454232010-08-08 14:28:23 +01001165 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001166 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001167 return MODE_PANEL;
1168
Chris Wilsonea5b2132010-08-04 13:50:23 +01001169 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001170 return MODE_PANEL;
1171 }
1172
Jesse Barnes79e53942008-11-07 14:24:08 -08001173 return MODE_OK;
1174}
1175
Chris Wilsonea5b2132010-08-04 13:50:23 +01001176static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001177{
Chris Wilson1a3665c2011-01-25 13:59:37 +00001178 BUILD_BUG_ON(sizeof(*caps) != 8);
Chris Wilsone957d772010-09-24 12:52:03 +01001179 if (!intel_sdvo_get_value(intel_sdvo,
1180 SDVO_CMD_GET_DEVICE_CAPS,
1181 caps, sizeof(*caps)))
1182 return false;
1183
1184 DRM_DEBUG_KMS("SDVO capabilities:\n"
1185 " vendor_id: %d\n"
1186 " device_id: %d\n"
1187 " device_rev_id: %d\n"
1188 " sdvo_version_major: %d\n"
1189 " sdvo_version_minor: %d\n"
1190 " sdvo_inputs_mask: %d\n"
1191 " smooth_scaling: %d\n"
1192 " sharp_scaling: %d\n"
1193 " up_scaling: %d\n"
1194 " down_scaling: %d\n"
1195 " stall_support: %d\n"
1196 " output_flags: %d\n",
1197 caps->vendor_id,
1198 caps->device_id,
1199 caps->device_rev_id,
1200 caps->sdvo_version_major,
1201 caps->sdvo_version_minor,
1202 caps->sdvo_inputs_mask,
1203 caps->smooth_scaling,
1204 caps->sharp_scaling,
1205 caps->up_scaling,
1206 caps->down_scaling,
1207 caps->stall_support,
1208 caps->output_flags);
1209
1210 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001211}
1212
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001213/* No use! */
1214#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001215struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1216{
1217 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001218 struct intel_sdvo *iout = NULL;
1219 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001220
1221 /* find the sdvo connector */
1222 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001223 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001224
1225 if (iout->type != INTEL_OUTPUT_SDVO)
1226 continue;
1227
1228 sdvo = iout->dev_priv;
1229
Eric Anholtc751ce42010-03-25 11:48:48 -07001230 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001231 return connector;
1232
Eric Anholtc751ce42010-03-25 11:48:48 -07001233 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001234 return connector;
1235
1236 }
1237
1238 return NULL;
1239}
1240
1241int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1242{
1243 u8 response[2];
1244 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001245 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001246 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001247
1248 if (!connector)
1249 return 0;
1250
Chris Wilsonea5b2132010-08-04 13:50:23 +01001251 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001252
Chris Wilson32aad862010-08-04 13:50:25 +01001253 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1254 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001255}
1256
1257void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1258{
1259 u8 response[2];
1260 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001261 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001262
Chris Wilsonea5b2132010-08-04 13:50:23 +01001263 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1264 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001265
1266 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001267 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1268 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001269
Chris Wilsonea5b2132010-08-04 13:50:23 +01001270 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001271 } else {
1272 response[0] = 0;
1273 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001274 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001275 }
1276
Chris Wilsonea5b2132010-08-04 13:50:23 +01001277 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1278 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001279}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001280#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001281
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001282static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001283intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001284{
Chris Wilsonbc652122011-01-25 13:28:29 +00001285 /* Is there more than one type of output? */
1286 int caps = intel_sdvo->caps.output_flags & 0xf;
1287 return caps & -caps;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001288}
1289
Chris Wilsonf899fc62010-07-20 15:44:45 -07001290static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001291intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001292{
Chris Wilsone957d772010-09-24 12:52:03 +01001293 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1294 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001295}
1296
Chris Wilsonff482d82010-09-15 10:40:38 +01001297/* Mac mini hack -- use the same DDC as the analog connector */
1298static struct edid *
1299intel_sdvo_get_analog_edid(struct drm_connector *connector)
1300{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001301 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001302
Chris Wilson0c1dab82010-11-23 22:37:01 +00001303 return drm_get_edid(connector,
1304 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001305}
1306
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001307enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001308intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001309{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001310 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001311 enum drm_connector_status status;
1312 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001313
Chris Wilsone957d772010-09-24 12:52:03 +01001314 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001315
Chris Wilsonea5b2132010-08-04 13:50:23 +01001316 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001317 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001318
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001319 /*
1320 * Don't use the 1 as the argument of DDC bus switch to get
1321 * the EDID. It is used for SDVO SPD ROM.
1322 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001323 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001324 intel_sdvo->ddc_bus = ddc;
1325 edid = intel_sdvo_get_edid(connector);
1326 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001327 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001328 }
Chris Wilsone957d772010-09-24 12:52:03 +01001329 /*
1330 * If we found the EDID on the other bus,
1331 * assume that is the correct DDC bus.
1332 */
1333 if (edid == NULL)
1334 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001335 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001336
1337 /*
1338 * When there is no edid and no monitor is connected with VGA
1339 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001340 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001341 if (edid == NULL)
1342 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001343
Chris Wilson2f551c82010-09-15 10:42:50 +01001344 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001345 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001346 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001347 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1348 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001349 if (intel_sdvo->is_hdmi) {
1350 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1351 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1352 }
Chris Wilson139467432011-02-09 20:01:16 +00001353 } else
1354 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001355 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001356 kfree(edid);
1357 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001358
1359 if (status == connector_status_connected) {
1360 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1361 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001362 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001363 }
1364
ling.ma@intel.com2b8d33f2009-07-29 11:31:18 +08001365 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001366}
1367
Chris Wilson7b334fc2010-09-09 23:51:02 +01001368static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001369intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001370{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001371 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001372 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001373 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001374 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001375
Chris Wilson32aad862010-08-04 13:50:25 +01001376 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001377 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001378 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001379
1380 /* add 30ms delay when the output type might be TV */
1381 if (intel_sdvo->caps.output_flags &
1382 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001383 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001384
Chris Wilson32aad862010-08-04 13:50:25 +01001385 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1386 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001387
Chris Wilsone957d772010-09-24 12:52:03 +01001388 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1389 response & 0xff, response >> 8,
1390 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001391
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001392 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001393 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001394
Chris Wilsonea5b2132010-08-04 13:50:23 +01001395 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001396
Chris Wilson97aaf912011-01-04 20:10:52 +00001397 intel_sdvo->has_hdmi_monitor = false;
1398 intel_sdvo->has_hdmi_audio = false;
1399
Chris Wilson615fb932010-08-04 13:50:24 +01001400 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001401 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001402 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson149c36a2010-04-29 14:05:18 -04001403 ret = intel_sdvo_hdmi_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001404 else {
1405 struct edid *edid;
1406
1407 /* if we have an edid check it matches the connection */
1408 edid = intel_sdvo_get_edid(connector);
1409 if (edid == NULL)
1410 edid = intel_sdvo_get_analog_edid(connector);
1411 if (edid != NULL) {
1412 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1413 ret = connector_status_disconnected;
1414 else
1415 ret = connector_status_connected;
1416 connector->display_info.raw_edid = NULL;
1417 kfree(edid);
1418 } else
1419 ret = connector_status_connected;
1420 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001421
1422 /* May update encoder flag for like clock for SDVO TV, etc.*/
1423 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001424 intel_sdvo->is_tv = false;
1425 intel_sdvo->is_lvds = false;
1426 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001427
1428 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001429 intel_sdvo->is_tv = true;
1430 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001431 }
1432 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001433 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001434 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001435
1436 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001437}
1438
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001439static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001440{
Chris Wilsonff482d82010-09-15 10:40:38 +01001441 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001442
1443 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001444 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001445
Keith Packard57cdaf92009-09-04 13:07:54 +08001446 /*
1447 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1448 * link between analog and digital outputs. So, if the regular SDVO
1449 * DDC fails, check to see if the analog output is disconnected, in
1450 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001451 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001452 if (edid == NULL)
1453 edid = intel_sdvo_get_analog_edid(connector);
1454
Chris Wilsonff482d82010-09-15 10:40:38 +01001455 if (edid != NULL) {
Chris Wilson139467432011-02-09 20:01:16 +00001456 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1457 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1458 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1459
1460 if (connector_is_digital == monitor_is_digital) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001461 drm_mode_connector_update_edid_property(connector, edid);
1462 drm_add_edid_modes(connector, edid);
1463 }
Chris Wilson139467432011-02-09 20:01:16 +00001464
Chris Wilsonff482d82010-09-15 10:40:38 +01001465 connector->display_info.raw_edid = NULL;
1466 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001467 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001468}
1469
1470/*
1471 * Set of SDVO TV modes.
1472 * Note! This is in reply order (see loop in get_tv_modes).
1473 * XXX: all 60Hz refresh?
1474 */
1475struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001476 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1477 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001479 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1480 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001482 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1483 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001485 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1486 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001488 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1489 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1492 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001494 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1495 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001497 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1498 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001500 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1501 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001503 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1504 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001506 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1507 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001509 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1510 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001512 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1513 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001515 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1516 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001518 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1519 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001521 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1522 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001524 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1525 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001527 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1528 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001530 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1531 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533};
1534
1535static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1536{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001537 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001538 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001539 uint32_t reply = 0, format_map = 0;
1540 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001541
1542 /* Read the list of supported input resolutions for the selected TV
1543 * format.
1544 */
Chris Wilson40039752010-08-04 13:50:26 +01001545 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001546 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001547 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001548
Chris Wilson32aad862010-08-04 13:50:25 +01001549 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1550 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001551
Chris Wilson32aad862010-08-04 13:50:25 +01001552 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001553 if (!intel_sdvo_write_cmd(intel_sdvo,
1554 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001555 &tv_res, sizeof(tv_res)))
1556 return;
1557 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001558 return;
1559
1560 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001561 if (reply & (1 << i)) {
1562 struct drm_display_mode *nmode;
1563 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001564 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001565 if (nmode)
1566 drm_mode_probed_add(connector, nmode);
1567 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001568}
1569
Ma Ling7086c872009-05-13 11:20:06 +08001570static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1571{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001572 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001573 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001574 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001575
1576 /*
1577 * Attempt to get the mode list from DDC.
1578 * Assume that the preferred modes are
1579 * arranged in priority order.
1580 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001581 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001582 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001583 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001584
1585 /* Fetch modes from VBT */
1586 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001587 newmode = drm_mode_duplicate(connector->dev,
1588 dev_priv->sdvo_lvds_vbt_mode);
1589 if (newmode != NULL) {
1590 /* Guarantee the mode is preferred */
1591 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1592 DRM_MODE_TYPE_DRIVER);
1593 drm_mode_probed_add(connector, newmode);
1594 }
1595 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001596
1597end:
1598 list_for_each_entry(newmode, &connector->probed_modes, head) {
1599 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001600 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001601 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001602
1603 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1604 0);
1605
Chris Wilson85454232010-08-08 14:28:23 +01001606 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001607 break;
1608 }
1609 }
1610
Ma Ling7086c872009-05-13 11:20:06 +08001611}
1612
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001613static int intel_sdvo_get_modes(struct drm_connector *connector)
1614{
Chris Wilson615fb932010-08-04 13:50:24 +01001615 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001616
Chris Wilson615fb932010-08-04 13:50:24 +01001617 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001618 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001619 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001620 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001621 else
1622 intel_sdvo_get_ddc_modes(connector);
1623
Chris Wilson32aad862010-08-04 13:50:25 +01001624 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001625}
1626
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001627static void
1628intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001629{
Chris Wilson615fb932010-08-04 13:50:24 +01001630 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001631 struct drm_device *dev = connector->dev;
1632
Chris Wilsonc5521702010-08-04 13:50:28 +01001633 if (intel_sdvo_connector->left)
1634 drm_property_destroy(dev, intel_sdvo_connector->left);
1635 if (intel_sdvo_connector->right)
1636 drm_property_destroy(dev, intel_sdvo_connector->right);
1637 if (intel_sdvo_connector->top)
1638 drm_property_destroy(dev, intel_sdvo_connector->top);
1639 if (intel_sdvo_connector->bottom)
1640 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1641 if (intel_sdvo_connector->hpos)
1642 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1643 if (intel_sdvo_connector->vpos)
1644 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1645 if (intel_sdvo_connector->saturation)
1646 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1647 if (intel_sdvo_connector->contrast)
1648 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1649 if (intel_sdvo_connector->hue)
1650 drm_property_destroy(dev, intel_sdvo_connector->hue);
1651 if (intel_sdvo_connector->sharpness)
1652 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1653 if (intel_sdvo_connector->flicker_filter)
1654 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1655 if (intel_sdvo_connector->flicker_filter_2d)
1656 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1657 if (intel_sdvo_connector->flicker_filter_adaptive)
1658 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1659 if (intel_sdvo_connector->tv_luma_filter)
1660 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1661 if (intel_sdvo_connector->tv_chroma_filter)
1662 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001663 if (intel_sdvo_connector->dot_crawl)
1664 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001665 if (intel_sdvo_connector->brightness)
1666 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001667}
1668
Jesse Barnes79e53942008-11-07 14:24:08 -08001669static void intel_sdvo_destroy(struct drm_connector *connector)
1670{
Chris Wilson615fb932010-08-04 13:50:24 +01001671 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001672
Chris Wilsonc5521702010-08-04 13:50:28 +01001673 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001674 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001675 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001676
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001677 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001678 drm_sysfs_connector_remove(connector);
1679 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001680 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001681}
1682
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001683static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1684{
1685 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1686 struct edid *edid;
1687 bool has_audio = false;
1688
1689 if (!intel_sdvo->is_hdmi)
1690 return false;
1691
1692 edid = intel_sdvo_get_edid(connector);
1693 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1694 has_audio = drm_detect_monitor_audio(edid);
1695
1696 return has_audio;
1697}
1698
Zhao Yakuice6feab2009-08-24 13:50:26 +08001699static int
1700intel_sdvo_set_property(struct drm_connector *connector,
1701 struct drm_property *property,
1702 uint64_t val)
1703{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001704 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001705 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Chris Wilsone953fd72011-02-21 22:23:52 +00001706 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001707 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001708 uint8_t cmd;
1709 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001710
1711 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001712 if (ret)
1713 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001714
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001715 if (property == intel_sdvo_connector->force_audio_property) {
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001716 int i = val;
1717 bool has_audio;
1718
1719 if (i == intel_sdvo_connector->force_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001720 return 0;
1721
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001722 intel_sdvo_connector->force_audio = i;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001723
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001724 if (i == 0)
1725 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1726 else
1727 has_audio = i > 0;
1728
1729 if (has_audio == intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001730 return 0;
1731
Chris Wilson1aad7ac2011-02-09 18:46:58 +00001732 intel_sdvo->has_hdmi_audio = has_audio;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001733 goto done;
1734 }
1735
Chris Wilsone953fd72011-02-21 22:23:52 +00001736 if (property == dev_priv->broadcast_rgb_property) {
1737 if (val == !!intel_sdvo->color_range)
1738 return 0;
1739
1740 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1741 goto done;
1742 }
1743
Chris Wilsonc5521702010-08-04 13:50:28 +01001744#define CHECK_PROPERTY(name, NAME) \
1745 if (intel_sdvo_connector->name == property) { \
1746 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1747 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1748 cmd = SDVO_CMD_SET_##NAME; \
1749 intel_sdvo_connector->cur_##name = temp_value; \
1750 goto set_value; \
1751 }
1752
1753 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001754 if (val >= TV_FORMAT_NUM)
1755 return -EINVAL;
1756
Chris Wilson40039752010-08-04 13:50:26 +01001757 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001758 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001759 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001760
Chris Wilson40039752010-08-04 13:50:26 +01001761 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001762 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001763 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001764 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001765 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001768 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001769 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001770
Chris Wilson615fb932010-08-04 13:50:24 +01001771 intel_sdvo_connector->left_margin = temp_value;
1772 intel_sdvo_connector->right_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001774 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001775 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001776 goto set_value;
1777 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001778 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001779 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001780 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001781 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001782
Chris Wilson615fb932010-08-04 13:50:24 +01001783 intel_sdvo_connector->left_margin = temp_value;
1784 intel_sdvo_connector->right_margin = temp_value;
1785 temp_value = intel_sdvo_connector->max_hscan -
1786 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001787 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001788 goto set_value;
1789 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001790 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001791 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001792 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001793 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001794
Chris Wilson615fb932010-08-04 13:50:24 +01001795 intel_sdvo_connector->top_margin = temp_value;
1796 intel_sdvo_connector->bottom_margin = temp_value;
1797 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001798 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001799 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001800 goto set_value;
1801 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001802 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001803 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001804 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001805 return 0;
1806
Chris Wilson615fb932010-08-04 13:50:24 +01001807 intel_sdvo_connector->top_margin = temp_value;
1808 intel_sdvo_connector->bottom_margin = temp_value;
1809 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001810 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001811 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001812 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001813 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001814 CHECK_PROPERTY(hpos, HPOS)
1815 CHECK_PROPERTY(vpos, VPOS)
1816 CHECK_PROPERTY(saturation, SATURATION)
1817 CHECK_PROPERTY(contrast, CONTRAST)
1818 CHECK_PROPERTY(hue, HUE)
1819 CHECK_PROPERTY(brightness, BRIGHTNESS)
1820 CHECK_PROPERTY(sharpness, SHARPNESS)
1821 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1822 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1823 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1824 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1825 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001826 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001827 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001828
1829 return -EINVAL; /* unknown property */
1830
1831set_value:
1832 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1833 return -EIO;
1834
1835
1836done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001837 if (intel_sdvo->base.base.crtc) {
1838 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001839 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001840 crtc->y, crtc->fb);
1841 }
1842
Chris Wilson32aad862010-08-04 13:50:25 +01001843 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001844#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001845}
1846
Jesse Barnes79e53942008-11-07 14:24:08 -08001847static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1848 .dpms = intel_sdvo_dpms,
1849 .mode_fixup = intel_sdvo_mode_fixup,
1850 .prepare = intel_encoder_prepare,
1851 .mode_set = intel_sdvo_mode_set,
1852 .commit = intel_encoder_commit,
1853};
1854
1855static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001856 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001857 .detect = intel_sdvo_detect,
1858 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001859 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001860 .destroy = intel_sdvo_destroy,
1861};
1862
1863static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1864 .get_modes = intel_sdvo_get_modes,
1865 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001866 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001867};
1868
Hannes Ederb358d0a2008-12-18 21:18:47 +01001869static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001870{
Chris Wilson890f3352010-09-14 16:46:59 +01001871 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001872
Chris Wilsonea5b2132010-08-04 13:50:23 +01001873 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001874 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001875 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001876
Chris Wilsone957d772010-09-24 12:52:03 +01001877 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001878 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001879}
1880
1881static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1882 .destroy = intel_sdvo_enc_destroy,
1883};
1884
Chris Wilsonb66d8422010-08-12 15:26:41 +01001885static void
1886intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1887{
1888 uint16_t mask = 0;
1889 unsigned int num_bits;
1890
1891 /* Make a mask of outputs less than or equal to our own priority in the
1892 * list.
1893 */
1894 switch (sdvo->controlled_output) {
1895 case SDVO_OUTPUT_LVDS1:
1896 mask |= SDVO_OUTPUT_LVDS1;
1897 case SDVO_OUTPUT_LVDS0:
1898 mask |= SDVO_OUTPUT_LVDS0;
1899 case SDVO_OUTPUT_TMDS1:
1900 mask |= SDVO_OUTPUT_TMDS1;
1901 case SDVO_OUTPUT_TMDS0:
1902 mask |= SDVO_OUTPUT_TMDS0;
1903 case SDVO_OUTPUT_RGB1:
1904 mask |= SDVO_OUTPUT_RGB1;
1905 case SDVO_OUTPUT_RGB0:
1906 mask |= SDVO_OUTPUT_RGB0;
1907 break;
1908 }
1909
1910 /* Count bits to find what number we are in the priority list. */
1911 mask &= sdvo->caps.output_flags;
1912 num_bits = hweight16(mask);
1913 /* If more than 3 outputs, default to DDC bus 3 for now. */
1914 if (num_bits > 3)
1915 num_bits = 3;
1916
1917 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1918 sdvo->ddc_bus = 1 << num_bits;
1919}
Jesse Barnes79e53942008-11-07 14:24:08 -08001920
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001921/**
1922 * Choose the appropriate DDC bus for control bus switch command for this
1923 * SDVO output based on the controlled output.
1924 *
1925 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1926 * outputs, then LVDS outputs.
1927 */
1928static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001929intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001930 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001931{
Adam Jacksonb1083332010-04-23 16:07:40 -04001932 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001933
Adam Jacksonb1083332010-04-23 16:07:40 -04001934 if (IS_SDVOB(reg))
1935 mapping = &(dev_priv->sdvo_mappings[0]);
1936 else
1937 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001938
Chris Wilsonb66d8422010-08-12 15:26:41 +01001939 if (mapping->initialized)
1940 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1941 else
1942 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001943}
1944
Chris Wilsone957d772010-09-24 12:52:03 +01001945static void
1946intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1947 struct intel_sdvo *sdvo, u32 reg)
1948{
1949 struct sdvo_device_mapping *mapping;
1950 u8 pin, speed;
1951
1952 if (IS_SDVOB(reg))
1953 mapping = &dev_priv->sdvo_mappings[0];
1954 else
1955 mapping = &dev_priv->sdvo_mappings[1];
1956
1957 pin = GMBUS_PORT_DPB;
1958 speed = GMBUS_RATE_1MHZ >> 8;
1959 if (mapping->initialized) {
1960 pin = mapping->i2c_pin;
1961 speed = mapping->i2c_speed;
1962 }
1963
Chris Wilson63abf3e2010-12-08 16:48:21 +00001964 if (pin < GMBUS_NUM_PORTS) {
1965 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1966 intel_gmbus_set_speed(sdvo->i2c, speed);
1967 intel_gmbus_force_bit(sdvo->i2c, true);
1968 } else
1969 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Chris Wilsone957d772010-09-24 12:52:03 +01001970}
1971
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001972static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001973intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001974{
Chris Wilson97aaf912011-01-04 20:10:52 +00001975 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001976}
1977
yakui_zhao714605e2009-05-31 17:18:07 +08001978static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001979intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001980{
1981 struct drm_i915_private *dev_priv = dev->dev_private;
1982 struct sdvo_device_mapping *my_mapping, *other_mapping;
1983
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001984 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001985 my_mapping = &dev_priv->sdvo_mappings[0];
1986 other_mapping = &dev_priv->sdvo_mappings[1];
1987 } else {
1988 my_mapping = &dev_priv->sdvo_mappings[1];
1989 other_mapping = &dev_priv->sdvo_mappings[0];
1990 }
1991
1992 /* If the BIOS described our SDVO device, take advantage of it. */
1993 if (my_mapping->slave_addr)
1994 return my_mapping->slave_addr;
1995
1996 /* If the BIOS only described a different SDVO device, use the
1997 * address that it isn't using.
1998 */
1999 if (other_mapping->slave_addr) {
2000 if (other_mapping->slave_addr == 0x70)
2001 return 0x72;
2002 else
2003 return 0x70;
2004 }
2005
2006 /* No SDVO device info is found for another DVO port,
2007 * so use mapping assumption we had before BIOS parsing.
2008 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002009 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002010 return 0x70;
2011 else
2012 return 0x72;
2013}
2014
Zhenyu Wang14571b42010-03-30 14:06:33 +08002015static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01002016intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2017 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002018{
Chris Wilsondf0e9242010-09-09 16:20:55 +01002019 drm_connector_init(encoder->base.base.dev,
2020 &connector->base.base,
2021 &intel_sdvo_connector_funcs,
2022 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002023
Chris Wilsondf0e9242010-09-09 16:20:55 +01002024 drm_connector_helper_add(&connector->base.base,
2025 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002026
Chris Wilsondf0e9242010-09-09 16:20:55 +01002027 connector->base.base.interlace_allowed = 0;
2028 connector->base.base.doublescan_allowed = 0;
2029 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002030
Chris Wilsondf0e9242010-09-09 16:20:55 +01002031 intel_connector_attach_encoder(&connector->base, &encoder->base);
2032 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002033}
2034
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002035static void
2036intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2037{
2038 struct drm_device *dev = connector->base.base.dev;
2039
2040 connector->force_audio_property =
2041 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2042 if (connector->force_audio_property) {
2043 connector->force_audio_property->values[0] = -1;
2044 connector->force_audio_property->values[1] = 1;
2045 drm_connector_attach_property(&connector->base.base,
2046 connector->force_audio_property, 0);
2047 }
Chris Wilsone953fd72011-02-21 22:23:52 +00002048
2049 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2050 intel_attach_broadcast_rgb_property(&connector->base.base);
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002051}
2052
Zhenyu Wang14571b42010-03-30 14:06:33 +08002053static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002054intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002055{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002056 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002057 struct drm_connector *connector;
2058 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002059 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002060
Chris Wilson615fb932010-08-04 13:50:24 +01002061 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2062 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002063 return false;
2064
Zhenyu Wang14571b42010-03-30 14:06:33 +08002065 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002066 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002067 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002068 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002069 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002070 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002071 }
2072
Chris Wilson615fb932010-08-04 13:50:24 +01002073 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002074 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002075 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002076 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2077 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2078
Chris Wilsone27d8532010-10-22 09:15:22 +01002079 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002080 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002081 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002082 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002083 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2084 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002085
Chris Wilsondf0e9242010-09-09 16:20:55 +01002086 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002087 if (intel_sdvo->is_hdmi)
2088 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002089
2090 return true;
2091}
2092
2093static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002094intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002095{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002096 struct drm_encoder *encoder = &intel_sdvo->base.base;
2097 struct drm_connector *connector;
2098 struct intel_connector *intel_connector;
2099 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100
Chris Wilson615fb932010-08-04 13:50:24 +01002101 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2102 if (!intel_sdvo_connector)
2103 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002104
Chris Wilson615fb932010-08-04 13:50:24 +01002105 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002106 connector = &intel_connector->base;
2107 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2108 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002109
Chris Wilson4ef69c72010-09-09 15:14:28 +01002110 intel_sdvo->controlled_output |= type;
2111 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002112
Chris Wilson4ef69c72010-09-09 15:14:28 +01002113 intel_sdvo->is_tv = true;
2114 intel_sdvo->base.needs_tv_clock = true;
2115 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116
Chris Wilsondf0e9242010-09-09 16:20:55 +01002117 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002118
Chris Wilson4ef69c72010-09-09 15:14:28 +01002119 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002120 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002121
Chris Wilson4ef69c72010-09-09 15:14:28 +01002122 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002123 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002124
Chris Wilson4ef69c72010-09-09 15:14:28 +01002125 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002126
2127err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002128 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002129 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002130}
2131
2132static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002133intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002134{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002135 struct drm_encoder *encoder = &intel_sdvo->base.base;
2136 struct drm_connector *connector;
2137 struct intel_connector *intel_connector;
2138 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002139
Chris Wilson615fb932010-08-04 13:50:24 +01002140 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2141 if (!intel_sdvo_connector)
2142 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002143
Chris Wilson615fb932010-08-04 13:50:24 +01002144 intel_connector = &intel_sdvo_connector->base;
2145 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002146 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2147 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2148 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002149
Chris Wilson4ef69c72010-09-09 15:14:28 +01002150 if (device == 0) {
2151 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2152 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2153 } else if (device == 1) {
2154 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2155 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2156 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002157
Chris Wilson4ef69c72010-09-09 15:14:28 +01002158 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2159 (1 << INTEL_ANALOG_CLONE_BIT));
2160
Chris Wilsondf0e9242010-09-09 16:20:55 +01002161 intel_sdvo_connector_init(intel_sdvo_connector,
2162 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002163 return true;
2164}
2165
2166static bool
2167intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2168{
2169 struct drm_encoder *encoder = &intel_sdvo->base.base;
2170 struct drm_connector *connector;
2171 struct intel_connector *intel_connector;
2172 struct intel_sdvo_connector *intel_sdvo_connector;
2173
2174 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2175 if (!intel_sdvo_connector)
2176 return false;
2177
2178 intel_connector = &intel_sdvo_connector->base;
2179 connector = &intel_connector->base;
2180 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2181 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2182
2183 if (device == 0) {
2184 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2185 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2186 } else if (device == 1) {
2187 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2188 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2189 }
2190
2191 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002192 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002193
Chris Wilsondf0e9242010-09-09 16:20:55 +01002194 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002195 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002196 goto err;
2197
2198 return true;
2199
2200err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002201 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002202 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002203}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002204
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002205static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002206intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002207{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208 intel_sdvo->is_tv = false;
2209 intel_sdvo->base.needs_tv_clock = false;
2210 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002211
Zhenyu Wang14571b42010-03-30 14:06:33 +08002212 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002213
Zhenyu Wang14571b42010-03-30 14:06:33 +08002214 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002215 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002216 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002217
Zhenyu Wang14571b42010-03-30 14:06:33 +08002218 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002219 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002220 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002221
Zhenyu Wang14571b42010-03-30 14:06:33 +08002222 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7f2010-03-29 23:16:13 +08002223 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002224 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002226
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002228 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002230
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002232 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002233 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002234
Zhenyu Wang14571b42010-03-30 14:06:33 +08002235 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002236 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002237 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002238
Zhenyu Wang14571b42010-03-30 14:06:33 +08002239 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002240 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002241 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002242
Zhenyu Wang14571b42010-03-30 14:06:33 +08002243 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002244 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002245 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002246
Zhenyu Wang14571b42010-03-30 14:06:33 +08002247 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002248 unsigned char bytes[2];
2249
Chris Wilsonea5b2132010-08-04 13:50:23 +01002250 intel_sdvo->controlled_output = 0;
2251 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002252 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002253 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002254 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002255 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002256 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002257 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002258
Zhenyu Wang14571b42010-03-30 14:06:33 +08002259 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002260}
2261
Chris Wilson32aad862010-08-04 13:50:25 +01002262static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2263 struct intel_sdvo_connector *intel_sdvo_connector,
2264 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002265{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002266 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002267 struct intel_sdvo_tv_format format;
2268 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002269
Chris Wilson32aad862010-08-04 13:50:25 +01002270 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2271 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002272
Chris Wilson1a3665c2011-01-25 13:59:37 +00002273 BUILD_BUG_ON(sizeof(format) != 6);
Chris Wilson32aad862010-08-04 13:50:25 +01002274 if (!intel_sdvo_get_value(intel_sdvo,
2275 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2276 &format, sizeof(format)))
2277 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002278
Chris Wilson32aad862010-08-04 13:50:25 +01002279 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002280
2281 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002282 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002283
Chris Wilson615fb932010-08-04 13:50:24 +01002284 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002285 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002286 if (format_map & (1 << i))
2287 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002288
2289
Chris Wilsonc5521702010-08-04 13:50:28 +01002290 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002291 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2292 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002293 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002294 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002295
Chris Wilson615fb932010-08-04 13:50:24 +01002296 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002297 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002298 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002299 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002300
Chris Wilson40039752010-08-04 13:50:26 +01002301 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002302 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002303 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002304 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002305
2306}
2307
Chris Wilsonc5521702010-08-04 13:50:28 +01002308#define ENHANCEMENT(name, NAME) do { \
2309 if (enhancements.name) { \
2310 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2311 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2312 return false; \
2313 intel_sdvo_connector->max_##name = data_value[0]; \
2314 intel_sdvo_connector->cur_##name = response; \
2315 intel_sdvo_connector->name = \
2316 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2317 if (!intel_sdvo_connector->name) return false; \
2318 intel_sdvo_connector->name->values[0] = 0; \
2319 intel_sdvo_connector->name->values[1] = data_value[0]; \
2320 drm_connector_attach_property(connector, \
2321 intel_sdvo_connector->name, \
2322 intel_sdvo_connector->cur_##name); \
2323 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2324 data_value[0], data_value[1], response); \
2325 } \
2326} while(0)
2327
2328static bool
2329intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2330 struct intel_sdvo_connector *intel_sdvo_connector,
2331 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002332{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002333 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002334 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002335 uint16_t response, data_value[2];
2336
Chris Wilsonc5521702010-08-04 13:50:28 +01002337 /* when horizontal overscan is supported, Add the left/right property */
2338 if (enhancements.overscan_h) {
2339 if (!intel_sdvo_get_value(intel_sdvo,
2340 SDVO_CMD_GET_MAX_OVERSCAN_H,
2341 &data_value, 4))
2342 return false;
2343
2344 if (!intel_sdvo_get_value(intel_sdvo,
2345 SDVO_CMD_GET_OVERSCAN_H,
2346 &response, 2))
2347 return false;
2348
2349 intel_sdvo_connector->max_hscan = data_value[0];
2350 intel_sdvo_connector->left_margin = data_value[0] - response;
2351 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2352 intel_sdvo_connector->left =
2353 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2354 "left_margin", 2);
2355 if (!intel_sdvo_connector->left)
2356 return false;
2357
2358 intel_sdvo_connector->left->values[0] = 0;
2359 intel_sdvo_connector->left->values[1] = data_value[0];
2360 drm_connector_attach_property(connector,
2361 intel_sdvo_connector->left,
2362 intel_sdvo_connector->left_margin);
2363
2364 intel_sdvo_connector->right =
2365 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2366 "right_margin", 2);
2367 if (!intel_sdvo_connector->right)
2368 return false;
2369
2370 intel_sdvo_connector->right->values[0] = 0;
2371 intel_sdvo_connector->right->values[1] = data_value[0];
2372 drm_connector_attach_property(connector,
2373 intel_sdvo_connector->right,
2374 intel_sdvo_connector->right_margin);
2375 DRM_DEBUG_KMS("h_overscan: max %d, "
2376 "default %d, current %d\n",
2377 data_value[0], data_value[1], response);
2378 }
2379
2380 if (enhancements.overscan_v) {
2381 if (!intel_sdvo_get_value(intel_sdvo,
2382 SDVO_CMD_GET_MAX_OVERSCAN_V,
2383 &data_value, 4))
2384 return false;
2385
2386 if (!intel_sdvo_get_value(intel_sdvo,
2387 SDVO_CMD_GET_OVERSCAN_V,
2388 &response, 2))
2389 return false;
2390
2391 intel_sdvo_connector->max_vscan = data_value[0];
2392 intel_sdvo_connector->top_margin = data_value[0] - response;
2393 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2394 intel_sdvo_connector->top =
2395 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2396 "top_margin", 2);
2397 if (!intel_sdvo_connector->top)
2398 return false;
2399
2400 intel_sdvo_connector->top->values[0] = 0;
2401 intel_sdvo_connector->top->values[1] = data_value[0];
2402 drm_connector_attach_property(connector,
2403 intel_sdvo_connector->top,
2404 intel_sdvo_connector->top_margin);
2405
2406 intel_sdvo_connector->bottom =
2407 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2408 "bottom_margin", 2);
2409 if (!intel_sdvo_connector->bottom)
2410 return false;
2411
2412 intel_sdvo_connector->bottom->values[0] = 0;
2413 intel_sdvo_connector->bottom->values[1] = data_value[0];
2414 drm_connector_attach_property(connector,
2415 intel_sdvo_connector->bottom,
2416 intel_sdvo_connector->bottom_margin);
2417 DRM_DEBUG_KMS("v_overscan: max %d, "
2418 "default %d, current %d\n",
2419 data_value[0], data_value[1], response);
2420 }
2421
2422 ENHANCEMENT(hpos, HPOS);
2423 ENHANCEMENT(vpos, VPOS);
2424 ENHANCEMENT(saturation, SATURATION);
2425 ENHANCEMENT(contrast, CONTRAST);
2426 ENHANCEMENT(hue, HUE);
2427 ENHANCEMENT(sharpness, SHARPNESS);
2428 ENHANCEMENT(brightness, BRIGHTNESS);
2429 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2430 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2431 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2432 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2433 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2434
Chris Wilsone0442182010-08-04 13:50:29 +01002435 if (enhancements.dot_crawl) {
2436 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2437 return false;
2438
2439 intel_sdvo_connector->max_dot_crawl = 1;
2440 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2441 intel_sdvo_connector->dot_crawl =
2442 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2443 if (!intel_sdvo_connector->dot_crawl)
2444 return false;
2445
2446 intel_sdvo_connector->dot_crawl->values[0] = 0;
2447 intel_sdvo_connector->dot_crawl->values[1] = 1;
2448 drm_connector_attach_property(connector,
2449 intel_sdvo_connector->dot_crawl,
2450 intel_sdvo_connector->cur_dot_crawl);
2451 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2452 }
2453
Chris Wilsonc5521702010-08-04 13:50:28 +01002454 return true;
2455}
2456
2457static bool
2458intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2459 struct intel_sdvo_connector *intel_sdvo_connector,
2460 struct intel_sdvo_enhancements_reply enhancements)
2461{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002462 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002463 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2464 uint16_t response, data_value[2];
2465
2466 ENHANCEMENT(brightness, BRIGHTNESS);
2467
2468 return true;
2469}
2470#undef ENHANCEMENT
2471
2472static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2473 struct intel_sdvo_connector *intel_sdvo_connector)
2474{
2475 union {
2476 struct intel_sdvo_enhancements_reply reply;
2477 uint16_t response;
2478 } enhancements;
2479
Chris Wilson1a3665c2011-01-25 13:59:37 +00002480 BUILD_BUG_ON(sizeof(enhancements) != 2);
2481
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002482 enhancements.response = 0;
2483 intel_sdvo_get_value(intel_sdvo,
2484 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2485 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002486 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002487 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002488 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002489 }
Chris Wilson32aad862010-08-04 13:50:25 +01002490
Chris Wilsonc5521702010-08-04 13:50:28 +01002491 if (IS_TV(intel_sdvo_connector))
2492 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2493 else if(IS_LVDS(intel_sdvo_connector))
2494 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2495 else
2496 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002497}
Chris Wilson32aad862010-08-04 13:50:25 +01002498
Chris Wilsone957d772010-09-24 12:52:03 +01002499static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2500 struct i2c_msg *msgs,
2501 int num)
2502{
2503 struct intel_sdvo *sdvo = adapter->algo_data;
2504
2505 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2506 return -EIO;
2507
2508 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2509}
2510
2511static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2512{
2513 struct intel_sdvo *sdvo = adapter->algo_data;
2514 return sdvo->i2c->algo->functionality(sdvo->i2c);
2515}
2516
2517static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2518 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2519 .functionality = intel_sdvo_ddc_proxy_func
2520};
2521
2522static bool
2523intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2524 struct drm_device *dev)
2525{
2526 sdvo->ddc.owner = THIS_MODULE;
2527 sdvo->ddc.class = I2C_CLASS_DDC;
2528 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2529 sdvo->ddc.dev.parent = &dev->pdev->dev;
2530 sdvo->ddc.algo_data = sdvo;
2531 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2532
2533 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002534}
2535
Eric Anholtc751ce42010-03-25 11:48:48 -07002536bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002537{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002538 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002539 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002540 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002541 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002542
Chris Wilsonea5b2132010-08-04 13:50:23 +01002543 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2544 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002545 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002546
Chris Wilsone957d772010-09-24 12:52:03 +01002547 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2548 kfree(intel_sdvo);
2549 return false;
2550 }
2551
Chris Wilsonea5b2132010-08-04 13:50:23 +01002552 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002553
Chris Wilsonea5b2132010-08-04 13:50:23 +01002554 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002555 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002556 /* encoder type will be decided later */
2557 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002558
Chris Wilsone957d772010-09-24 12:52:03 +01002559 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2560 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002561
Jesse Barnes79e53942008-11-07 14:24:08 -08002562 /* Read the regs to test if we can talk to the device */
2563 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002564 u8 byte;
2565
2566 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002567 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002568 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002569 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002570 }
2571 }
2572
Chris Wilsonf899fc62010-07-20 15:44:45 -07002573 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002574 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002575 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002576 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002577
Chris Wilson4ef69c72010-09-09 15:14:28 +01002578 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002579
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002580 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002581 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002582 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002583
Chris Wilsonea5b2132010-08-04 13:50:23 +01002584 if (intel_sdvo_output_setup(intel_sdvo,
2585 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002586 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002587 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002588 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002589 }
2590
Chris Wilsonea5b2132010-08-04 13:50:23 +01002591 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002592
Jesse Barnes79e53942008-11-07 14:24:08 -08002593 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002594 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002595 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002596
Chris Wilson32aad862010-08-04 13:50:25 +01002597 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2598 &intel_sdvo->pixel_clock_min,
2599 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002600 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002601
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002602 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002603 "clock range %dMHz - %dMHz, "
2604 "input 1: %c, input 2: %c, "
2605 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002606 SDVO_NAME(intel_sdvo),
2607 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2608 intel_sdvo->caps.device_rev_id,
2609 intel_sdvo->pixel_clock_min / 1000,
2610 intel_sdvo->pixel_clock_max / 1000,
2611 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2612 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002613 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002614 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002615 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002616 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002617 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002618 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002619
Chris Wilsonf899fc62010-07-20 15:44:45 -07002620err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002621 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002622 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002623 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002624
Eric Anholt7d573822009-01-02 13:33:00 -08002625 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002626}