blob: 85214ec85afd2d9046422af59e53f260d8ec595b [file] [log] [blame]
Simmi Pateriya1b9a3092013-01-02 11:49:26 +05301/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070021#include <linux/wait.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053022#include <linux/mfd/wcd9xxx/core.h>
23#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
24#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
25#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053026#include <sound/pcm.h>
27#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <sound/soc.h>
29#include <sound/soc-dapm.h>
30#include <sound/tlv.h>
31#include <linux/bitops.h>
32#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080033#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070034#include <linux/kernel.h>
35#include <linux/gpio.h>
Joonwoo Parkecf379c2012-10-04 16:57:52 -070036#include <linux/irq.h>
37#include <linux/wakelock.h>
38#include <linux/suspend.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#include "wcd9310.h"
40
Joonwoo Parkc1c67a92012-08-07 16:05:36 -070041static int cfilt_adjust_ms = 10;
42module_param(cfilt_adjust_ms, int, 0644);
43MODULE_PARM_DESC(cfilt_adjust_ms, "delay after adjusting cfilt voltage in ms");
44
Kiran Kandi1e6371d2012-03-29 11:48:57 -070045#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
46 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
47 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
48
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070049
50#define NUM_DECIMATORS 10
51#define NUM_INTERPOLATORS 7
52#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080053#define TABLA_CFILT_FAST_MODE 0x00
54#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080055#define MBHC_FW_READ_ATTEMPTS 15
56#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070057
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070058#define SLIM_CLOSE_TIMEOUT 1000
59
Joonwoo Park03324832012-03-19 19:36:16 -070060enum {
61 MBHC_USE_HPHL_TRIGGER = 1,
62 MBHC_USE_MB_TRIGGER = 2
63};
64
65#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070066#define NUM_ATTEMPTS_INSERT_DETECT 25
67#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070068
Joonwoo Park2cc13f02012-05-09 12:44:25 -070069#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -070070 SND_JACK_OC_HPHR | SND_JACK_LINEOUT | \
71 SND_JACK_UNSUPPORTED)
Patrick Lai49efeac2011-11-03 11:01:12 -070072
Santosh Mardie15e2302011-11-15 10:39:23 +053073#define TABLA_I2S_MASTER_MODE_MASK 0x08
74
Patrick Laic7cae882011-11-18 11:52:49 -080075#define TABLA_OCP_ATTEMPT 1
76
Kuirong Wang906ac472012-07-09 12:54:44 -070077enum {
78 AIF1_PB = 0,
79 AIF1_CAP,
80 AIF2_PB,
81 AIF2_CAP,
82 AIF3_PB,
83 AIF3_CAP,
84 NUM_CODEC_DAIS,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080085};
86
Kuirong Wang906ac472012-07-09 12:54:44 -070087enum {
88 RX_MIX1_INP_SEL_ZERO = 0,
89 RX_MIX1_INP_SEL_SRC1,
90 RX_MIX1_INP_SEL_SRC2,
91 RX_MIX1_INP_SEL_IIR1,
92 RX_MIX1_INP_SEL_IIR2,
93 RX_MIX1_INP_SEL_RX1,
94 RX_MIX1_INP_SEL_RX2,
95 RX_MIX1_INP_SEL_RX3,
96 RX_MIX1_INP_SEL_RX4,
97 RX_MIX1_INP_SEL_RX5,
98 RX_MIX1_INP_SEL_RX6,
99 RX_MIX1_INP_SEL_RX7,
100};
101
Kuirong Wang678e4172012-06-26 15:35:22 -0700102#define TABLA_COMP_DIGITAL_GAIN_HP_OFFSET 3
103#define TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET 6
Kuirong Wang906ac472012-07-09 12:54:44 -0700104
Joonwoo Park0976d012011-12-22 11:48:18 -0800105#define TABLA_MCLK_RATE_12288KHZ 12288000
106#define TABLA_MCLK_RATE_9600KHZ 9600000
107
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800108#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -0800109#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800110
Joonwoo Park03324832012-03-19 19:36:16 -0700111#define TABLA_MBHC_BUTTON_MIN 0x8000
112
Joonwoo Park03324832012-03-19 19:36:16 -0700113#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700114#define TABLA_MBHC_FAKE_INSERT_HIGH 80
115#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -0700116
117#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
118
Joonwoo Parkdb606b02012-08-11 13:46:30 -0700119#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 50
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700120
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700121#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
122#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700123
124#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
125#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
126
127#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
128
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700129#define TABLA_MBHC_GND_MIC_SWAP_THRESHOLD 2
130
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -0800131#define TABLA_ACQUIRE_LOCK(x) do { \
132 mutex_lock_nested(&x, SINGLE_DEPTH_NESTING); \
133} while (0)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700134#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
137static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
138static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800139static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800140static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Kiran Kandi93923902012-06-20 17:00:25 -0700141static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
142 struct snd_kcontrol *kcontrol, int event);
143static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
144 struct snd_kcontrol *kcontrol, int event);
145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700146
147enum tabla_bandgap_type {
148 TABLA_BANDGAP_OFF = 0,
149 TABLA_BANDGAP_AUDIO_MODE,
150 TABLA_BANDGAP_MBHC_MODE,
151};
152
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700153struct mbhc_micbias_regs {
154 u16 cfilt_val;
155 u16 cfilt_ctl;
156 u16 mbhc_reg;
157 u16 int_rbias;
158 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800159 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700160};
161
Ben Romberger1f045a72011-11-04 10:14:57 -0700162/* Codec supports 2 IIR filters */
163enum {
164 IIR1 = 0,
165 IIR2,
166 IIR_MAX,
167};
168/* Codec supports 5 bands */
169enum {
170 BAND1 = 0,
171 BAND2,
172 BAND3,
173 BAND4,
174 BAND5,
175 BAND_MAX,
176};
177
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800178enum {
179 COMPANDER_1 = 0,
180 COMPANDER_2,
181 COMPANDER_MAX,
182};
183
184enum {
185 COMPANDER_FS_8KHZ = 0,
186 COMPANDER_FS_16KHZ,
187 COMPANDER_FS_32KHZ,
188 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700189 COMPANDER_FS_96KHZ,
190 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800191 COMPANDER_FS_MAX,
192};
193
Kuirong Wang678e4172012-06-26 15:35:22 -0700194enum {
195 COMP_SHUTDWN_TIMEOUT_PCM_1 = 0,
196 COMP_SHUTDWN_TIMEOUT_PCM_240,
197 COMP_SHUTDWN_TIMEOUT_PCM_480,
198 COMP_SHUTDWN_TIMEOUT_PCM_960,
199 COMP_SHUTDWN_TIMEOUT_PCM_1440,
200 COMP_SHUTDWN_TIMEOUT_PCM_2880,
201 COMP_SHUTDWN_TIMEOUT_PCM_5760,
202};
203
Joonwoo Parka9444452011-12-08 18:48:27 -0800204/* Flags to track of PA and DAC state.
205 * PA and DAC should be tracked separately as AUXPGA loopback requires
206 * only PA to be turned on without DAC being on. */
207enum tabla_priv_ack_flags {
208 TABLA_HPHL_PA_OFF_ACK = 0,
209 TABLA_HPHR_PA_OFF_ACK,
210 TABLA_HPHL_DAC_OFF_ACK,
211 TABLA_HPHR_DAC_OFF_ACK
212};
213
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800214
215struct comp_sample_dependent_params {
216 u32 peak_det_timeout;
217 u32 rms_meter_div_fact;
218 u32 rms_meter_resamp_fact;
Kuirong Wang678e4172012-06-26 15:35:22 -0700219 u32 shutdown_timeout;
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800220};
221
Joonwoo Park0976d012011-12-22 11:48:18 -0800222/* Data used by MBHC */
223struct mbhc_internal_cal_data {
224 u16 dce_z;
225 u16 dce_mb;
226 u16 sta_z;
227 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800228 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800229 u32 t_dce;
230 u32 t_sta;
231 u32 micb_mv;
232 u16 v_ins_hu;
233 u16 v_ins_h;
234 u16 v_b1_hu;
235 u16 v_b1_h;
236 u16 v_b1_huc;
237 u16 v_brh;
238 u16 v_brl;
239 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800240 u8 npoll;
241 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700242 s16 adj_v_hs_max;
243 u16 adj_v_ins_hu;
244 u16 adj_v_ins_h;
245 s16 v_inval_ins_low;
246 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800247};
248
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800249struct tabla_reg_address {
250 u16 micb_4_ctl;
251 u16 micb_4_int_rbias;
252 u16 micb_4_mbhc;
253};
254
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700255enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700256 PLUG_TYPE_INVALID = -1,
257 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700258 PLUG_TYPE_HEADSET,
259 PLUG_TYPE_HEADPHONE,
260 PLUG_TYPE_HIGH_HPH,
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700261 PLUG_TYPE_GND_MIC_SWAP,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700262};
263
264enum tabla_mbhc_state {
265 MBHC_STATE_NONE = -1,
266 MBHC_STATE_POTENTIAL,
267 MBHC_STATE_POTENTIAL_RECOVERY,
268 MBHC_STATE_RELEASE,
269};
270
Kiran Kandid8cf5212012-03-02 15:34:53 -0800271struct hpf_work {
272 struct tabla_priv *tabla;
273 u32 decimator;
274 u8 tx_hpf_cut_of_freq;
275 struct delayed_work dwork;
276};
277
278static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
279
Kuirong Wang906ac472012-07-09 12:54:44 -0700280static const struct wcd9xxx_ch tabla_rx_chs[TABLA_RX_MAX] = {
281 WCD9XXX_CH(10, 0),
282 WCD9XXX_CH(11, 1),
283 WCD9XXX_CH(12, 2),
284 WCD9XXX_CH(13, 3),
285 WCD9XXX_CH(14, 4),
286 WCD9XXX_CH(15, 5),
287 WCD9XXX_CH(16, 6)
288};
289
290static const struct wcd9xxx_ch tabla_tx_chs[TABLA_TX_MAX] = {
291 WCD9XXX_CH(0, 0),
292 WCD9XXX_CH(1, 1),
293 WCD9XXX_CH(2, 2),
294 WCD9XXX_CH(3, 3),
295 WCD9XXX_CH(4, 4),
296 WCD9XXX_CH(5, 5),
297 WCD9XXX_CH(6, 6),
298 WCD9XXX_CH(7, 7),
299 WCD9XXX_CH(8, 8),
300 WCD9XXX_CH(9, 9)
301};
302
303static const u32 vport_check_table[NUM_CODEC_DAIS] = {
304 0, /* AIF1_PB */
305 (1 << AIF2_CAP) | (1 << AIF3_CAP), /* AIF1_CAP */
306 0, /* AIF2_PB */
307 (1 << AIF1_CAP) | (1 << AIF3_CAP), /* AIF2_CAP */
308 0, /* AIF2_PB */
309 (1 << AIF1_CAP) | (1 << AIF2_CAP), /* AIF2_CAP */
310};
311
Venkat Sudhir96dd28c2012-12-04 17:00:19 -0800312static const u32 vport_i2s_check_table[NUM_CODEC_DAIS] = {
313 0, /* AIF1_PB */
314 0, /* AIF1_CAP */
315};
316
Bradley Rubin229c6a52011-07-12 16:18:48 -0700317struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700318 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800319 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700320 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700321 u32 cfilt1_cnt;
322 u32 cfilt2_cnt;
323 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700324 u32 rx_bias_count;
Kiran Kandi0ba468f2012-05-08 11:45:05 -0700325 s32 dmic_1_2_clk_cnt;
326 s32 dmic_3_4_clk_cnt;
327 s32 dmic_5_6_clk_cnt;
328
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700329 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700330 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700331 bool clock_active;
332 bool config_mode_active;
333 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800334 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700335 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700336 enum tabla_mbhc_state mbhc_state;
337 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800338 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700339
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530340 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700341 u32 anc_slot;
Damir Didjustoc6f83cb2012-12-03 00:54:14 -0800342 bool anc_func;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700343 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700344 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700345 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700346
347 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700348 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700349
Joonwoo Parka9444452011-12-08 18:48:27 -0800350 /* track PA/DAC state */
351 unsigned long hph_pa_dac_state;
352
Santosh Mardie15e2302011-11-15 10:39:23 +0530353 /*track tabla interface type*/
354 u8 intf_type;
355
Patrick Lai49efeac2011-11-03 11:01:12 -0700356 u32 hph_status; /* track headhpone status */
357 /* define separate work for left and right headphone OCP to avoid
358 * additional checking on which OCP event to report so no locking
359 * to ensure synchronization is required
360 */
361 struct work_struct hphlocp_work; /* reporting left hph ocp off */
362 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800363
Patrick Laic7cae882011-11-18 11:52:49 -0800364 u8 hphlocp_cnt; /* headphone left ocp retry */
365 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800366
Patrick Lai64b43262011-12-06 17:29:15 -0800367 /* Work to perform MBHC Firmware Read */
368 struct delayed_work mbhc_firmware_dwork;
369 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800370
371 /* num of slim ports required */
Kuirong Wang906ac472012-07-09 12:54:44 -0700372 struct wcd9xxx_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800373
374 /*compander*/
375 int comp_enabled[COMPANDER_MAX];
376 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800377
378 /* Maintain the status of AUX PGA */
379 int aux_pga_cnt;
380 u8 aux_l_gain;
381 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700382
Joonwoo Park03324832012-03-19 19:36:16 -0700383 struct delayed_work mbhc_insert_dwork;
384 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700385
386 u8 current_plug;
387 struct work_struct hs_correct_plug_work;
388 bool hs_detect_work_stop;
389 bool hs_polling_irq_prepared;
390 bool lpi_enabled; /* low power insertion detection */
391 bool in_gpio_handler;
392 /* Currently, only used for mbhc purpose, to protect
393 * concurrent execution of mbhc threaded irq handlers and
394 * kill race between DAPM and MBHC.But can serve as a
395 * general lock to protect codec resource
396 */
397 struct mutex codec_resource_lock;
398
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -0700399 /* Work to perform polling on microphone voltage
400 * in order to correct plug type once plug type
401 * is detected as headphone
402 */
403 struct work_struct hs_correct_plug_work_nogpio;
404
Joonwoo Parkecf379c2012-10-04 16:57:52 -0700405 bool gpio_irq_resend;
406 struct wake_lock irq_resend_wlock;
407
Bradley Rubincb3950a2011-08-18 13:07:26 -0700408#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700409 struct dentry *debugfs_poke;
410 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700411#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700412};
413
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800414static const u32 comp_shift[] = {
415 0,
Kuirong Wang678e4172012-06-26 15:35:22 -0700416 1,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800417};
418
419static const int comp_rx_path[] = {
420 COMPANDER_1,
421 COMPANDER_1,
422 COMPANDER_2,
423 COMPANDER_2,
424 COMPANDER_2,
425 COMPANDER_2,
426 COMPANDER_MAX,
427};
428
Kuirong Wang678e4172012-06-26 15:35:22 -0700429static const struct comp_sample_dependent_params
430 comp_samp_params[COMPANDER_FS_MAX] = {
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800431 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700432 .peak_det_timeout = 0x6,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800433 .rms_meter_div_fact = 0x9 << 4,
Kuirong Wang678e4172012-06-26 15:35:22 -0700434 .rms_meter_resamp_fact = 0x06,
435 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_240 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800436 },
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800437 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700438 .peak_det_timeout = 0x7,
439 .rms_meter_div_fact = 0xA << 4,
440 .rms_meter_resamp_fact = 0x0C,
441 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_480 << 3,
442 },
443 {
444 .peak_det_timeout = 0x8,
445 .rms_meter_div_fact = 0xB << 4,
446 .rms_meter_resamp_fact = 0x30,
447 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_960 << 3,
448 },
449 {
450 .peak_det_timeout = 0x9,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800451 .rms_meter_div_fact = 0xB << 4,
452 .rms_meter_resamp_fact = 0x28,
Kuirong Wang678e4172012-06-26 15:35:22 -0700453 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_1440 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800454 },
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800455 {
Kuirong Wang678e4172012-06-26 15:35:22 -0700456 .peak_det_timeout = 0xA,
457 .rms_meter_div_fact = 0xC << 4,
458 .rms_meter_resamp_fact = 0x50,
459 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_2880 << 3,
460 },
461 {
462 .peak_det_timeout = 0xB,
463 .rms_meter_div_fact = 0xC << 4,
464 .rms_meter_resamp_fact = 0x50,
465 .shutdown_timeout = COMP_SHUTDWN_TIMEOUT_PCM_5760 << 3,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800466 },
467};
468
Kuirong Wange9c8a222012-03-28 16:24:09 -0700469static unsigned short rx_digital_gain_reg[] = {
470 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
471 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
472 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
473 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
474 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
475 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
476 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
477};
478
479
480static unsigned short tx_digital_gain_reg[] = {
481 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
482 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
483 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
484 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
485 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
486 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
487 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
488 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
489 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
490 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
491};
492
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700493static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
494 struct snd_kcontrol *kcontrol, int event)
495{
496 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700497
498 pr_debug("%s %d\n", __func__, event);
499 switch (event) {
500 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700501 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
502 0x01);
503 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
504 usleep_range(200, 200);
505 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
506 break;
507 case SND_SOC_DAPM_PRE_PMD:
508 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
509 0x10);
510 usleep_range(20, 20);
511 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
512 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
513 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
514 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
515 0x00);
Fred Oh54d24d72012-11-29 15:57:36 -0800516 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
517 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700518 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700519 break;
520 }
521 return 0;
522}
523
Bradley Rubina7096d02011-08-03 18:29:02 -0700524static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
525 struct snd_ctl_elem_value *ucontrol)
526{
527 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
528 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
529 ucontrol->value.integer.value[0] = tabla->anc_slot;
530 return 0;
531}
532
533static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
534 struct snd_ctl_elem_value *ucontrol)
535{
536 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
537 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
538 tabla->anc_slot = ucontrol->value.integer.value[0];
539 return 0;
540}
541
Damir Didjustoc6f83cb2012-12-03 00:54:14 -0800542static int tabla_get_anc_func(struct snd_kcontrol *kcontrol,
543 struct snd_ctl_elem_value *ucontrol)
544{
545 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
546 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
547 ucontrol->value.integer.value[0] = (tabla->anc_func == true ? 1 : 0);
548 return 0;
549}
550
551static int tabla_put_anc_func(struct snd_kcontrol *kcontrol,
552 struct snd_ctl_elem_value *ucontrol)
553{
554 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
555 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
556 struct snd_soc_dapm_context *dapm = &codec->dapm;
557
558 mutex_lock(&dapm->codec->mutex);
559
560 tabla->anc_func = (!ucontrol->value.integer.value[0] ? false : true);
561
562 dev_dbg(codec->dev, "%s: anc_func %x", __func__, tabla->anc_func);
563
564 if (tabla->anc_func == true) {
565 snd_soc_dapm_enable_pin(dapm, "ANC HPHR");
566 snd_soc_dapm_enable_pin(dapm, "ANC HPHL");
567 snd_soc_dapm_enable_pin(dapm, "ANC HEADPHONE");
568 snd_soc_dapm_disable_pin(dapm, "HPHR");
569 snd_soc_dapm_disable_pin(dapm, "HPHL");
570 snd_soc_dapm_disable_pin(dapm, "HEADPHONE");
571 } else {
572 snd_soc_dapm_disable_pin(dapm, "ANC HPHR");
573 snd_soc_dapm_disable_pin(dapm, "ANC HPHL");
574 snd_soc_dapm_disable_pin(dapm, "ANC HEADPHONE");
575 snd_soc_dapm_enable_pin(dapm, "HPHR");
576 snd_soc_dapm_enable_pin(dapm, "HPHL");
577 snd_soc_dapm_enable_pin(dapm, "HEADPHONE");
578 }
579 snd_soc_dapm_sync(dapm);
580 mutex_unlock(&dapm->codec->mutex);
581 return 0;
582}
583
Kiran Kandid2d86b52011-09-09 17:44:28 -0700584static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
585 struct snd_ctl_elem_value *ucontrol)
586{
587 u8 ear_pa_gain;
588 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
589
590 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
591
592 ear_pa_gain = ear_pa_gain >> 5;
593
594 if (ear_pa_gain == 0x00) {
595 ucontrol->value.integer.value[0] = 0;
596 } else if (ear_pa_gain == 0x04) {
597 ucontrol->value.integer.value[0] = 1;
598 } else {
599 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
600 __func__, ear_pa_gain);
601 return -EINVAL;
602 }
603
604 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
605
606 return 0;
607}
608
609static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611{
612 u8 ear_pa_gain;
613 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
614
615 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
616 ucontrol->value.integer.value[0]);
617
618 switch (ucontrol->value.integer.value[0]) {
619 case 0:
620 ear_pa_gain = 0x00;
621 break;
622 case 1:
623 ear_pa_gain = 0x80;
624 break;
625 default:
626 return -EINVAL;
627 }
628
629 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
630 return 0;
631}
632
Ben Romberger1f045a72011-11-04 10:14:57 -0700633static int tabla_get_iir_enable_audio_mixer(
634 struct snd_kcontrol *kcontrol,
635 struct snd_ctl_elem_value *ucontrol)
636{
637 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
638 int iir_idx = ((struct soc_multi_mixer_control *)
639 kcontrol->private_value)->reg;
640 int band_idx = ((struct soc_multi_mixer_control *)
641 kcontrol->private_value)->shift;
642
643 ucontrol->value.integer.value[0] =
644 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
645 (1 << band_idx);
646
647 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
648 iir_idx, band_idx,
649 (uint32_t)ucontrol->value.integer.value[0]);
650 return 0;
651}
652
653static int tabla_put_iir_enable_audio_mixer(
654 struct snd_kcontrol *kcontrol,
655 struct snd_ctl_elem_value *ucontrol)
656{
657 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
658 int iir_idx = ((struct soc_multi_mixer_control *)
659 kcontrol->private_value)->reg;
660 int band_idx = ((struct soc_multi_mixer_control *)
661 kcontrol->private_value)->shift;
662 int value = ucontrol->value.integer.value[0];
663
664 /* Mask first 5 bits, 6-8 are reserved */
665 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
666 (1 << band_idx), (value << band_idx));
667
668 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
669 iir_idx, band_idx, value);
670 return 0;
671}
672static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
673 int iir_idx, int band_idx,
674 int coeff_idx)
675{
676 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800677 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700678 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800679 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700680
681 /* Mask bits top 2 bits since they are reserved */
682 return ((snd_soc_read(codec,
683 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
684 (snd_soc_read(codec,
685 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
686 (snd_soc_read(codec,
687 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
688 (snd_soc_read(codec,
689 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
690 0x3FFFFFFF;
691}
692
693static int tabla_get_iir_band_audio_mixer(
694 struct snd_kcontrol *kcontrol,
695 struct snd_ctl_elem_value *ucontrol)
696{
697 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
698 int iir_idx = ((struct soc_multi_mixer_control *)
699 kcontrol->private_value)->reg;
700 int band_idx = ((struct soc_multi_mixer_control *)
701 kcontrol->private_value)->shift;
702
703 ucontrol->value.integer.value[0] =
704 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
705 ucontrol->value.integer.value[1] =
706 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
707 ucontrol->value.integer.value[2] =
708 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
709 ucontrol->value.integer.value[3] =
710 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
711 ucontrol->value.integer.value[4] =
712 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
713
714 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
715 "%s: IIR #%d band #%d b1 = 0x%x\n"
716 "%s: IIR #%d band #%d b2 = 0x%x\n"
717 "%s: IIR #%d band #%d a1 = 0x%x\n"
718 "%s: IIR #%d band #%d a2 = 0x%x\n",
719 __func__, iir_idx, band_idx,
720 (uint32_t)ucontrol->value.integer.value[0],
721 __func__, iir_idx, band_idx,
722 (uint32_t)ucontrol->value.integer.value[1],
723 __func__, iir_idx, band_idx,
724 (uint32_t)ucontrol->value.integer.value[2],
725 __func__, iir_idx, band_idx,
726 (uint32_t)ucontrol->value.integer.value[3],
727 __func__, iir_idx, band_idx,
728 (uint32_t)ucontrol->value.integer.value[4]);
729 return 0;
730}
731
732static void set_iir_band_coeff(struct snd_soc_codec *codec,
733 int iir_idx, int band_idx,
734 int coeff_idx, uint32_t value)
735{
736 /* Mask top 3 bits, 6-8 are reserved */
737 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800738 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700739 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800740 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700741
742 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800743 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700744 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800745 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700746
747 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800748 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700749 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800750 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700751
Ben Romberger0915aae2012-02-06 23:32:43 -0800752 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700753 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800754 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700755
Ben Romberger0915aae2012-02-06 23:32:43 -0800756 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700757 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800758 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700759}
760
761static int tabla_put_iir_band_audio_mixer(
762 struct snd_kcontrol *kcontrol,
763 struct snd_ctl_elem_value *ucontrol)
764{
765 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
766 int iir_idx = ((struct soc_multi_mixer_control *)
767 kcontrol->private_value)->reg;
768 int band_idx = ((struct soc_multi_mixer_control *)
769 kcontrol->private_value)->shift;
770
771 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
772 ucontrol->value.integer.value[0]);
773 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
774 ucontrol->value.integer.value[1]);
775 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
776 ucontrol->value.integer.value[2]);
777 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
778 ucontrol->value.integer.value[3]);
779 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
780 ucontrol->value.integer.value[4]);
781
782 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
783 "%s: IIR #%d band #%d b1 = 0x%x\n"
784 "%s: IIR #%d band #%d b2 = 0x%x\n"
785 "%s: IIR #%d band #%d a1 = 0x%x\n"
786 "%s: IIR #%d band #%d a2 = 0x%x\n",
787 __func__, iir_idx, band_idx,
788 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
789 __func__, iir_idx, band_idx,
790 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
791 __func__, iir_idx, band_idx,
792 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
793 __func__, iir_idx, band_idx,
794 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
795 __func__, iir_idx, band_idx,
796 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
797 return 0;
798}
799
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800800static int tabla_compander_gain_offset(
801 struct snd_soc_codec *codec, u32 enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700802 unsigned int reg, int mask, int event, u32 comp)
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800803{
804 int pa_mode = snd_soc_read(codec, reg) & mask;
805 int gain_offset = 0;
806 /* if PMU && enable is 1-> offset is 3
807 * if PMU && enable is 0-> offset is 0
808 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
809 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
810 */
811
Kuirong Wang678e4172012-06-26 15:35:22 -0700812 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0)) {
813 if (comp == COMPANDER_1)
814 gain_offset = TABLA_COMP_DIGITAL_GAIN_HP_OFFSET;
815 if (comp == COMPANDER_2)
816 gain_offset = TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET;
817 }
818 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0)) {
819 if (comp == COMPANDER_1)
820 gain_offset = -TABLA_COMP_DIGITAL_GAIN_HP_OFFSET;
821 if (comp == COMPANDER_2)
822 gain_offset = -TABLA_COMP_DIGITAL_GAIN_LINEOUT_OFFSET;
823
824 }
825 pr_debug("%s: compander #%d gain_offset %d\n",
826 __func__, comp + 1, gain_offset);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800827 return gain_offset;
828}
829
830
831static int tabla_config_gain_compander(
832 struct snd_soc_codec *codec,
833 u32 compander, u32 enable, int event)
834{
835 int value = 0;
836 int mask = 1 << 4;
837 int gain = 0;
838 int gain_offset;
839 if (compander >= COMPANDER_MAX) {
840 pr_err("%s: Error, invalid compander channel\n", __func__);
841 return -EINVAL;
842 }
843
844 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
845 value = 1 << 4;
846
847 if (compander == COMPANDER_1) {
848 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700849 TABLA_A_RX_HPH_L_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800850 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
851 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
852 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
853 0xFF, gain - gain_offset);
854 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700855 TABLA_A_RX_HPH_R_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800856 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
857 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
858 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
859 0xFF, gain - gain_offset);
860 } else if (compander == COMPANDER_2) {
861 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700862 TABLA_A_RX_LINE_1_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800863 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
864 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
865 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
866 0xFF, gain - gain_offset);
867 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700868 TABLA_A_RX_LINE_3_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800869 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
870 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
871 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
872 0xFF, gain - gain_offset);
873 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700874 TABLA_A_RX_LINE_2_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800875 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
876 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
877 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
878 0xFF, gain - gain_offset);
879 gain_offset = tabla_compander_gain_offset(codec, enable,
Kuirong Wang678e4172012-06-26 15:35:22 -0700880 TABLA_A_RX_LINE_4_GAIN, mask, event, compander);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800881 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
882 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
883 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
884 0xFF, gain - gain_offset);
885 }
886 return 0;
887}
888static int tabla_get_compander(struct snd_kcontrol *kcontrol,
889 struct snd_ctl_elem_value *ucontrol)
890{
891
892 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
893 int comp = ((struct soc_multi_mixer_control *)
894 kcontrol->private_value)->max;
895 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
896
897 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
898
899 return 0;
900}
901
902static int tabla_set_compander(struct snd_kcontrol *kcontrol,
903 struct snd_ctl_elem_value *ucontrol)
904{
905 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
906 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
907 int comp = ((struct soc_multi_mixer_control *)
908 kcontrol->private_value)->max;
909 int value = ucontrol->value.integer.value[0];
Kuirong Wang678e4172012-06-26 15:35:22 -0700910 pr_debug("%s: compander #%d enable %d\n",
911 __func__, comp + 1, value);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800912 if (value == tabla->comp_enabled[comp]) {
913 pr_debug("%s: compander #%d enable %d no change\n",
Kuirong Wang678e4172012-06-26 15:35:22 -0700914 __func__, comp + 1, value);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800915 return 0;
916 }
917 tabla->comp_enabled[comp] = value;
918 return 0;
919}
920
921
922static int tabla_config_compander(struct snd_soc_dapm_widget *w,
923 struct snd_kcontrol *kcontrol,
924 int event)
925{
926 struct snd_soc_codec *codec = w->codec;
927 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
928 u32 rate = tabla->comp_fs[w->shift];
Kuirong Wang678e4172012-06-26 15:35:22 -0700929 u32 status;
930 unsigned long timeout;
931 pr_debug("%s: compander #%d enable %d event %d\n",
932 __func__, w->shift + 1,
933 tabla->comp_enabled[w->shift], event);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800934 switch (event) {
935 case SND_SOC_DAPM_PRE_PMU:
936 if (tabla->comp_enabled[w->shift] != 0) {
937 /* Enable both L/R compander clocks */
938 snd_soc_update_bits(codec,
939 TABLA_A_CDC_CLK_RX_B2_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700940 1 << comp_shift[w->shift],
941 1 << comp_shift[w->shift]);
942 /* Clear the HALT for the compander*/
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800943 snd_soc_update_bits(codec,
944 TABLA_A_CDC_COMP1_B1_CTL +
945 w->shift * 8, 1 << 2, 0);
946 /* Toggle compander reset bits*/
947 snd_soc_update_bits(codec,
948 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700949 1 << comp_shift[w->shift],
950 1 << comp_shift[w->shift]);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800951 snd_soc_update_bits(codec,
952 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
Kuirong Wang678e4172012-06-26 15:35:22 -0700953 1 << comp_shift[w->shift], 0);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800954 tabla_config_gain_compander(codec, w->shift, 1, event);
Kuirong Wang678e4172012-06-26 15:35:22 -0700955 /* Compander enable -> 0x370/0x378*/
956 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
957 w->shift * 8, 0x03, 0x03);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800958 /* Update the RMS meter resampling*/
959 snd_soc_update_bits(codec,
960 TABLA_A_CDC_COMP1_B3_CTL +
961 w->shift * 8, 0xFF, 0x01);
Kuirong Wang678e4172012-06-26 15:35:22 -0700962 snd_soc_update_bits(codec,
963 TABLA_A_CDC_COMP1_B2_CTL +
964 w->shift * 8, 0xF0, 0x50);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800965 /* Wait for 1ms*/
Kuirong Wang678e4172012-06-26 15:35:22 -0700966 usleep_range(5000, 5000);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800967 }
968 break;
969 case SND_SOC_DAPM_POST_PMU:
970 /* Set sample rate dependent paramater*/
971 if (tabla->comp_enabled[w->shift] != 0) {
972 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
973 w->shift * 8, 0x03, rate);
974 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
975 w->shift * 8, 0x0F,
976 comp_samp_params[rate].peak_det_timeout);
977 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
978 w->shift * 8, 0xF0,
979 comp_samp_params[rate].rms_meter_div_fact);
980 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
981 w->shift * 8, 0xFF,
982 comp_samp_params[rate].rms_meter_resamp_fact);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800983 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
Kuirong Wang678e4172012-06-26 15:35:22 -0700984 w->shift * 8, 0x38,
985 comp_samp_params[rate].shutdown_timeout);
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800986 }
987 break;
988 case SND_SOC_DAPM_PRE_PMD:
Kuirong Wang678e4172012-06-26 15:35:22 -0700989 if (tabla->comp_enabled[w->shift] != 0) {
990 status = snd_soc_read(codec,
991 TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS +
992 w->shift * 8);
993 pr_debug("%s: compander #%d shutdown status %d in event %d\n",
994 __func__, w->shift + 1, status, event);
995 /* Halt the compander*/
996 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
997 w->shift * 8, 1 << 2, 1 << 2);
998 }
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800999 break;
1000 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang678e4172012-06-26 15:35:22 -07001001 if (tabla->comp_enabled[w->shift] != 0) {
1002 /* Wait up to a second for shutdown complete */
1003 timeout = jiffies + HZ;
1004 do {
1005 status = snd_soc_read(codec,
1006 TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS +
1007 w->shift * 8);
1008 if (status == 0x3)
1009 break;
1010 usleep_range(5000, 5000);
1011 } while (!(time_after(jiffies, timeout)));
1012 /* Restore the gain */
1013 tabla_config_gain_compander(codec, w->shift,
1014 tabla->comp_enabled[w->shift],
1015 event);
1016 /* Disable the compander*/
1017 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
1018 w->shift * 8, 0x03, 0x00);
1019 /* Turn off the clock for compander in pair*/
1020 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
1021 0x03 << comp_shift[w->shift], 0);
1022 /* Clear the HALT for the compander*/
1023 snd_soc_update_bits(codec,
1024 TABLA_A_CDC_COMP1_B1_CTL +
1025 w->shift * 8, 1 << 2, 0);
1026 }
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001027 break;
1028 }
1029 return 0;
1030}
1031
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08001032static const char *const tabla_anc_func_text[] = {"OFF", "ON"};
1033static const struct soc_enum tabla_anc_func_enum =
1034 SOC_ENUM_SINGLE_EXT(2, tabla_anc_func_text);
1035
Kiran Kandid2d86b52011-09-09 17:44:28 -07001036static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
1037static const struct soc_enum tabla_ear_pa_gain_enum[] = {
1038 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
1039};
1040
Santosh Mardi024010f2011-10-18 06:27:21 +05301041/*cut of frequency for high pass filter*/
1042static const char *cf_text[] = {
1043 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
1044};
1045
1046static const struct soc_enum cf_dec1_enum =
1047 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
1048
1049static const struct soc_enum cf_dec2_enum =
1050 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
1051
1052static const struct soc_enum cf_dec3_enum =
1053 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
1054
1055static const struct soc_enum cf_dec4_enum =
1056 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
1057
1058static const struct soc_enum cf_dec5_enum =
1059 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
1060
1061static const struct soc_enum cf_dec6_enum =
1062 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
1063
1064static const struct soc_enum cf_dec7_enum =
1065 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
1066
1067static const struct soc_enum cf_dec8_enum =
1068 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
1069
1070static const struct soc_enum cf_dec9_enum =
1071 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
1072
1073static const struct soc_enum cf_dec10_enum =
1074 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
1075
1076static const struct soc_enum cf_rxmix1_enum =
1077 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
1078
1079static const struct soc_enum cf_rxmix2_enum =
1080 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
1081
1082static const struct soc_enum cf_rxmix3_enum =
1083 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
1084
1085static const struct soc_enum cf_rxmix4_enum =
1086 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
1087
1088static const struct soc_enum cf_rxmix5_enum =
1089 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
1090;
1091static const struct soc_enum cf_rxmix6_enum =
1092 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
1093
1094static const struct soc_enum cf_rxmix7_enum =
1095 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
1096
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001097static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -07001098
1099 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
1100 tabla_pa_gain_get, tabla_pa_gain_put),
1101
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
1103 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001104 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
1105 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001106 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
1107 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001108 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
1109 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001110 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
1111 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001112
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001113 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
1114 line_gain),
1115 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
1116 line_gain),
1117
Bradley Rubin410383f2011-07-22 13:44:23 -07001118 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
1119 -84, 40, digital_gain),
1120 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
1121 -84, 40, digital_gain),
1122 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
1123 -84, 40, digital_gain),
1124 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
1125 -84, 40, digital_gain),
1126 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
1127 -84, 40, digital_gain),
1128 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
1129 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -08001130 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
1131 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001132
Bradley Rubin410383f2011-07-22 13:44:23 -07001133 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -07001135 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001136 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -07001137 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
1138 digital_gain),
1139 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
1140 digital_gain),
1141 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
1142 digital_gain),
1143 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
1144 digital_gain),
1145 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
1146 digital_gain),
1147 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
1148 digital_gain),
1149 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
1150 digital_gain),
1151 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
1152 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -07001153 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
1154 40, digital_gain),
1155 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
1156 40, digital_gain),
1157 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
1158 40, digital_gain),
1159 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
1160 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001161 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
1162 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001163 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
1164 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001165 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
1166 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001167
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001168 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
1169 aux_pga_gain),
1170 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
1171 aux_pga_gain),
1172
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001173 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -08001174 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001175 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -07001176
1177 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
1178 tabla_put_anc_slot),
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08001179 SOC_ENUM_EXT("ANC Function", tabla_anc_func_enum, tabla_get_anc_func,
1180 tabla_put_anc_func),
Santosh Mardi024010f2011-10-18 06:27:21 +05301181 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
1182 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
1183 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
1184 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
1185 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
1186 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
1187 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
1188 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
1189 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
1190 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
1191
1192 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
1193 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
1194 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
1195 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
1196 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
1197 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
1198 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
1199 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
1200 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
1201 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
1202
1203 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
1204 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1205 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1206 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1207 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1208 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1209 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1210
1211 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1212 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1213 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1214 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1215 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1216 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1217 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001218
1219 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1220 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1221 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1222 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1223 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1224 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1225 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1226 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1227 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1228 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1229 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1230 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1231 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1232 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1233 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1234 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1235 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1236 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1237 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1238 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1239
1240 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1241 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1242 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1243 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1244 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1245 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1246 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1247 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1248 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1249 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1250 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1251 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1252 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1253 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1254 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1255 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1256 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1257 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1258 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1259 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001260 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1261 tabla_get_compander, tabla_set_compander),
1262 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1263 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001264};
1265
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001266static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1267 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1268};
1269
1270static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1271 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1272};
1273
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001274static const char *rx_mix1_text[] = {
1275 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1276 "RX5", "RX6", "RX7"
1277};
1278
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001279static const char *rx_mix2_text[] = {
1280 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1281};
1282
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001283static const char *rx_dsm_text[] = {
1284 "CIC_OUT", "DSM_INV"
1285};
1286
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001287static const char *sb_tx1_mux_text[] = {
1288 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1289 "DEC1"
1290};
1291
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001292static const char *sb_tx2_mux_text[] = {
1293 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1294 "DEC2"
1295};
1296
1297static const char *sb_tx3_mux_text[] = {
1298 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1299 "DEC3"
1300};
1301
1302static const char *sb_tx4_mux_text[] = {
1303 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1304 "DEC4"
1305};
1306
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001307static const char *sb_tx5_mux_text[] = {
1308 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1309 "DEC5"
1310};
1311
1312static const char *sb_tx6_mux_text[] = {
1313 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1314 "DEC6"
1315};
1316
1317static const char const *sb_tx7_to_tx10_mux_text[] = {
1318 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1319 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1320 "DEC9", "DEC10"
1321};
1322
1323static const char *dec1_mux_text[] = {
1324 "ZERO", "DMIC1", "ADC6",
1325};
1326
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001327static const char *dec2_mux_text[] = {
1328 "ZERO", "DMIC2", "ADC5",
1329};
1330
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001331static const char *dec3_mux_text[] = {
1332 "ZERO", "DMIC3", "ADC4",
1333};
1334
1335static const char *dec4_mux_text[] = {
1336 "ZERO", "DMIC4", "ADC3",
1337};
1338
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001339static const char *dec5_mux_text[] = {
1340 "ZERO", "DMIC5", "ADC2",
1341};
1342
1343static const char *dec6_mux_text[] = {
1344 "ZERO", "DMIC6", "ADC1",
1345};
1346
1347static const char const *dec7_mux_text[] = {
1348 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1349};
1350
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001351static const char *dec8_mux_text[] = {
1352 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1353};
1354
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001355static const char *dec9_mux_text[] = {
1356 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1357};
1358
1359static const char *dec10_mux_text[] = {
1360 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1361};
1362
Bradley Rubin229c6a52011-07-12 16:18:48 -07001363static const char const *anc_mux_text[] = {
1364 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1365 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1366};
1367
1368static const char const *anc1_fb_mux_text[] = {
1369 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1370};
1371
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001372static const char *iir1_inp1_text[] = {
1373 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1374 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1375};
1376
1377static const struct soc_enum rx_mix1_inp1_chain_enum =
1378 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1379
Bradley Rubin229c6a52011-07-12 16:18:48 -07001380static const struct soc_enum rx_mix1_inp2_chain_enum =
1381 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1382
Kiran Kandia9fffe92012-05-20 23:42:30 -07001383static const struct soc_enum rx_mix1_inp3_chain_enum =
1384 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B2_CTL, 0, 12, rx_mix1_text);
1385
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001386static const struct soc_enum rx2_mix1_inp1_chain_enum =
1387 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1388
Bradley Rubin229c6a52011-07-12 16:18:48 -07001389static const struct soc_enum rx2_mix1_inp2_chain_enum =
1390 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001392static const struct soc_enum rx3_mix1_inp1_chain_enum =
1393 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1394
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001395static const struct soc_enum rx3_mix1_inp2_chain_enum =
1396 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001398static const struct soc_enum rx4_mix1_inp1_chain_enum =
1399 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1400
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001401static const struct soc_enum rx4_mix1_inp2_chain_enum =
1402 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1403
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001404static const struct soc_enum rx5_mix1_inp1_chain_enum =
1405 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1406
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001407static const struct soc_enum rx5_mix1_inp2_chain_enum =
1408 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1409
1410static const struct soc_enum rx6_mix1_inp1_chain_enum =
1411 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1412
1413static const struct soc_enum rx6_mix1_inp2_chain_enum =
1414 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1415
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001416static const struct soc_enum rx7_mix1_inp1_chain_enum =
1417 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1418
1419static const struct soc_enum rx7_mix1_inp2_chain_enum =
1420 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1421
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001422static const struct soc_enum rx1_mix2_inp1_chain_enum =
1423 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1424
1425static const struct soc_enum rx1_mix2_inp2_chain_enum =
1426 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1427
1428static const struct soc_enum rx2_mix2_inp1_chain_enum =
1429 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1430
1431static const struct soc_enum rx2_mix2_inp2_chain_enum =
1432 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1433
1434static const struct soc_enum rx3_mix2_inp1_chain_enum =
1435 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1436
1437static const struct soc_enum rx3_mix2_inp2_chain_enum =
1438 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1439
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001440static const struct soc_enum rx4_dsm_enum =
1441 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1442
1443static const struct soc_enum rx6_dsm_enum =
1444 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1445
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001446static const struct soc_enum sb_tx1_mux_enum =
1447 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1448
1449static const struct soc_enum sb_tx2_mux_enum =
1450 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1451
1452static const struct soc_enum sb_tx3_mux_enum =
1453 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1454
1455static const struct soc_enum sb_tx4_mux_enum =
1456 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1457
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001458static const struct soc_enum sb_tx5_mux_enum =
1459 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1460
1461static const struct soc_enum sb_tx6_mux_enum =
1462 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1463
1464static const struct soc_enum sb_tx7_mux_enum =
1465 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1466 sb_tx7_to_tx10_mux_text);
1467
1468static const struct soc_enum sb_tx8_mux_enum =
1469 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1470 sb_tx7_to_tx10_mux_text);
1471
Kiran Kandi3426e512011-09-13 22:50:10 -07001472static const struct soc_enum sb_tx9_mux_enum =
1473 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1474 sb_tx7_to_tx10_mux_text);
1475
1476static const struct soc_enum sb_tx10_mux_enum =
1477 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1478 sb_tx7_to_tx10_mux_text);
1479
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001480static const struct soc_enum dec1_mux_enum =
1481 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1482
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001483static const struct soc_enum dec2_mux_enum =
1484 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1485
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001486static const struct soc_enum dec3_mux_enum =
1487 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1488
1489static const struct soc_enum dec4_mux_enum =
1490 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1491
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001492static const struct soc_enum dec5_mux_enum =
1493 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1494
1495static const struct soc_enum dec6_mux_enum =
1496 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1497
1498static const struct soc_enum dec7_mux_enum =
1499 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1500
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001501static const struct soc_enum dec8_mux_enum =
1502 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1503
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001504static const struct soc_enum dec9_mux_enum =
1505 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1506
1507static const struct soc_enum dec10_mux_enum =
1508 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1509
Bradley Rubin229c6a52011-07-12 16:18:48 -07001510static const struct soc_enum anc1_mux_enum =
1511 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1512
1513static const struct soc_enum anc2_mux_enum =
1514 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1515
1516static const struct soc_enum anc1_fb_mux_enum =
1517 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1518
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001519static const struct soc_enum iir1_inp1_mux_enum =
1520 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1521
1522static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1523 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1524
Bradley Rubin229c6a52011-07-12 16:18:48 -07001525static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1526 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1527
Kiran Kandia9fffe92012-05-20 23:42:30 -07001528static const struct snd_kcontrol_new rx_mix1_inp3_mux =
1529 SOC_DAPM_ENUM("RX1 MIX1 INP3 Mux", rx_mix1_inp3_chain_enum);
1530
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001531static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1532 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1533
Bradley Rubin229c6a52011-07-12 16:18:48 -07001534static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1535 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1536
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001537static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1538 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1539
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001540static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1541 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1542
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001543static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1544 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1545
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001546static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1547 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1548
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001549static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1550 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1551
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001552static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1553 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1554
1555static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1556 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1557
1558static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1559 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1560
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001561static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1562 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1563
1564static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1565 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1566
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001567static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1568 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1569
1570static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1571 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1572
1573static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1574 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1575
1576static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1577 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1578
1579static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1580 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1581
1582static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1583 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1584
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001585static const struct snd_kcontrol_new rx4_dsm_mux =
1586 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1587
1588static const struct snd_kcontrol_new rx6_dsm_mux =
1589 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1590
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001591static const struct snd_kcontrol_new sb_tx1_mux =
1592 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1593
1594static const struct snd_kcontrol_new sb_tx2_mux =
1595 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1596
1597static const struct snd_kcontrol_new sb_tx3_mux =
1598 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1599
1600static const struct snd_kcontrol_new sb_tx4_mux =
1601 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1602
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001603static const struct snd_kcontrol_new sb_tx5_mux =
1604 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1605
1606static const struct snd_kcontrol_new sb_tx6_mux =
1607 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1608
1609static const struct snd_kcontrol_new sb_tx7_mux =
1610 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1611
1612static const struct snd_kcontrol_new sb_tx8_mux =
1613 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1614
Kiran Kandi3426e512011-09-13 22:50:10 -07001615static const struct snd_kcontrol_new sb_tx9_mux =
1616 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1617
1618static const struct snd_kcontrol_new sb_tx10_mux =
1619 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1620
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001621
Kiran Kandi59a96b12012-01-16 02:20:03 -08001622static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1623 struct snd_ctl_elem_value *ucontrol)
1624{
1625 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1626 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1627 struct snd_soc_codec *codec = w->codec;
1628 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1629 unsigned int dec_mux, decimator;
1630 char *dec_name = NULL;
1631 char *widget_name = NULL;
1632 char *temp;
1633 u16 tx_mux_ctl_reg;
1634 u8 adc_dmic_sel = 0x0;
1635 int ret = 0;
1636
1637 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1638 return -EINVAL;
1639
1640 dec_mux = ucontrol->value.enumerated.item[0];
1641
1642 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1643 if (!widget_name)
1644 return -ENOMEM;
1645 temp = widget_name;
1646
1647 dec_name = strsep(&widget_name, " ");
1648 widget_name = temp;
1649 if (!dec_name) {
1650 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1651 ret = -EINVAL;
1652 goto out;
1653 }
1654
1655 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1656 if (ret < 0) {
1657 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1658 ret = -EINVAL;
1659 goto out;
1660 }
1661
1662 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1663 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1664 dec_mux);
1665
1666
1667 switch (decimator) {
1668 case 1:
1669 case 2:
1670 case 3:
1671 case 4:
1672 case 5:
1673 case 6:
1674 if (dec_mux == 1)
1675 adc_dmic_sel = 0x1;
1676 else
1677 adc_dmic_sel = 0x0;
1678 break;
1679 case 7:
1680 case 8:
1681 case 9:
1682 case 10:
1683 if ((dec_mux == 1) || (dec_mux == 2))
1684 adc_dmic_sel = 0x1;
1685 else
1686 adc_dmic_sel = 0x0;
1687 break;
1688 default:
1689 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1690 ret = -EINVAL;
1691 goto out;
1692 }
1693
1694 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1695
1696 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1697
1698 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1699
1700out:
1701 kfree(widget_name);
1702 return ret;
1703}
1704
1705#define WCD9310_DEC_ENUM(xname, xenum) \
1706{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1707 .info = snd_soc_info_enum_double, \
1708 .get = snd_soc_dapm_get_enum_double, \
1709 .put = wcd9310_put_dec_enum, \
1710 .private_value = (unsigned long)&xenum }
1711
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001712static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001713 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001714
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001715static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001716 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001717
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001718static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001719 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001720
1721static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001722 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001723
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001725 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001726
1727static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001728 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001729
1730static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001731 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001732
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001733static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001734 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001735
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001736static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001737 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001738
1739static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001740 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001741
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001742static const struct snd_kcontrol_new iir1_inp1_mux =
1743 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1744
Kiran Kandi59a96b12012-01-16 02:20:03 -08001745static const struct snd_kcontrol_new anc1_mux =
1746 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1747
Bradley Rubin229c6a52011-07-12 16:18:48 -07001748static const struct snd_kcontrol_new anc2_mux =
1749 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001750
Bradley Rubin229c6a52011-07-12 16:18:48 -07001751static const struct snd_kcontrol_new anc1_fb_mux =
1752 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001753
Bradley Rubin229c6a52011-07-12 16:18:48 -07001754static const struct snd_kcontrol_new dac1_switch[] = {
1755 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1756};
1757static const struct snd_kcontrol_new hphl_switch[] = {
1758 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1759};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001760
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001761static const struct snd_kcontrol_new hphl_pa_mix[] = {
1762 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1763 7, 1, 0),
1764 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1765 7, 1, 0),
1766 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1767 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1768 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1769 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1770};
1771
1772static const struct snd_kcontrol_new hphr_pa_mix[] = {
1773 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1774 6, 1, 0),
1775 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1776 6, 1, 0),
1777 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1778 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1779 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1780 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1781};
1782
1783static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1784 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1785 5, 1, 0),
1786 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1787 5, 1, 0),
1788 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1789 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1790 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1791 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1792};
1793
1794static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1795 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1796 4, 1, 0),
1797 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1798 4, 1, 0),
1799 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1800 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1801 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1802 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1803};
1804
1805static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1806 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1807 3, 1, 0),
1808 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1809 3, 1, 0),
1810 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1811 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1812 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1813 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1814};
1815
1816static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1817 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1818 2, 1, 0),
1819 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1820 2, 1, 0),
1821 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1822 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1823 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1824 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1825};
1826
1827static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1828 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1829 1, 1, 0),
1830 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1831 1, 1, 0),
1832 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1833 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1834 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1835 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1836};
1837
1838static const struct snd_kcontrol_new ear_pa_mix[] = {
1839 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1840 0, 1, 0),
1841 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1842 0, 1, 0),
1843 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1844 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1845 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1846 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1847};
1848
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001849static const struct snd_kcontrol_new lineout3_ground_switch =
1850 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1851
1852static const struct snd_kcontrol_new lineout4_ground_switch =
1853 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001854
Kuirong Wang906ac472012-07-09 12:54:44 -07001855/* virtual port entries */
1856static int slim_tx_mixer_get(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1858{
1859 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1860 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1861
1862 ucontrol->value.integer.value[0] = widget->value;
1863 return 0;
1864}
1865
1866static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
1867 struct snd_ctl_elem_value *ucontrol)
1868{
1869 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1870 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1871 struct snd_soc_codec *codec = widget->codec;
1872 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
1873 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
1874 struct soc_multi_mixer_control *mixer =
1875 ((struct soc_multi_mixer_control *)kcontrol->private_value);
1876 u32 dai_id = widget->shift;
1877 u32 port_id = mixer->shift;
1878 u32 enable = ucontrol->value.integer.value[0];
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001879 u32 vtable = vport_check_table[dai_id];
Kuirong Wang906ac472012-07-09 12:54:44 -07001880
1881 pr_debug("%s: wname %s cname %s value %u shift %d item %ld\n", __func__,
1882 widget->name, ucontrol->id.name, widget->value, widget->shift,
1883 ucontrol->value.integer.value[0]);
1884
1885 mutex_lock(&codec->mutex);
1886 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
1887 if (dai_id != AIF1_CAP) {
1888 dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
1889 __func__);
1890 mutex_unlock(&codec->mutex);
1891 return -EINVAL;
1892 }
1893 }
1894 switch (dai_id) {
1895 case AIF1_CAP:
1896 case AIF2_CAP:
1897 case AIF3_CAP:
1898 /* only add to the list if value not set
1899 */
1900 if (enable && !(widget->value & 1 << port_id)) {
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001901 if (tabla_p->intf_type ==
1902 WCD9XXX_INTERFACE_TYPE_SLIMBUS)
1903 vtable = vport_check_table[dai_id];
1904 if (tabla_p->intf_type == WCD9XXX_INTERFACE_TYPE_I2C)
1905 vtable = vport_i2s_check_table[dai_id];
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001906 if (wcd9xxx_tx_vport_validation(
Venkat Sudhir96dd28c2012-12-04 17:00:19 -08001907 vtable,
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001908 port_id,
1909 tabla_p->dai)) {
Kuirong Wang906ac472012-07-09 12:54:44 -07001910 pr_info("%s: TX%u is used by other virtual port\n",
1911 __func__, port_id + 1);
1912 mutex_unlock(&codec->mutex);
1913 return -EINVAL;
1914 }
1915 widget->value |= 1 << port_id;
1916 list_add_tail(&core->tx_chs[port_id].list,
1917 &tabla_p->dai[dai_id].wcd9xxx_ch_list
1918 );
1919 } else if (!enable && (widget->value & 1 << port_id)) {
1920 widget->value &= ~(1 << port_id);
1921 list_del_init(&core->tx_chs[port_id].list);
1922 } else {
1923 if (enable)
1924 pr_info("%s: TX%u port is used by this virtual port\n",
1925 __func__, port_id + 1);
1926 else
1927 pr_info("%s: TX%u port is not used by this virtual port\n",
1928 __func__, port_id + 1);
1929 /* avoid update power function */
1930 mutex_unlock(&codec->mutex);
1931 return 0;
1932 }
1933 break;
1934 default:
1935 pr_err("Unknown AIF %d\n", dai_id);
1936 mutex_unlock(&codec->mutex);
1937 return -EINVAL;
1938 }
1939 pr_debug("%s: name %s sname %s updated value %u shift %d\n", __func__,
1940 widget->name, widget->sname, widget->value, widget->shift);
1941
1942 snd_soc_dapm_mixer_update_power(widget, kcontrol, enable);
1943
1944 mutex_unlock(&codec->mutex);
1945 return 0;
1946}
1947
1948static int slim_rx_mux_get(struct snd_kcontrol *kcontrol,
1949 struct snd_ctl_elem_value *ucontrol)
1950{
1951 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1952 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1953
1954 ucontrol->value.enumerated.item[0] = widget->value;
1955 return 0;
1956}
1957
1958static const char *const slim_rx_mux_text[] = {
1959 "ZERO", "AIF1_PB", "AIF2_PB", "AIF3_PB"
1960};
1961
1962static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
1963 struct snd_ctl_elem_value *ucontrol)
1964{
1965 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1966 struct snd_soc_dapm_widget *widget = wlist->widgets[0];
1967 struct snd_soc_codec *codec = widget->codec;
1968 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
1969 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
1970 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1971 u32 port_id = widget->shift;
1972
1973 pr_debug("%s: wname %s cname %s value %u shift %d item %u\n", __func__,
1974 widget->name, ucontrol->id.name, widget->value, widget->shift,
1975 ucontrol->value.enumerated.item[0]);
1976
1977 widget->value = ucontrol->value.enumerated.item[0];
1978
1979 mutex_lock(&codec->mutex);
1980
1981 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
1982 if (widget->value > 1) {
1983 dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
1984 __func__);
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001985 goto err;
Kuirong Wang906ac472012-07-09 12:54:44 -07001986 }
1987 }
1988 /* value need to match the Virtual port and AIF number
1989 */
1990 switch (widget->value) {
1991 case 0:
1992 list_del_init(&core->rx_chs[port_id].list);
1993 break;
1994 case 1:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07001995 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
1996 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
1997 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07001998 list_add_tail(&core->rx_chs[port_id].list,
1999 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list);
2000 break;
2001 case 2:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002002 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
2003 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
2004 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002005 list_add_tail(&core->rx_chs[port_id].list,
2006 &tabla_p->dai[AIF2_PB].wcd9xxx_ch_list);
2007 break;
2008 case 3:
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002009 if (wcd9xxx_rx_vport_validation(port_id + core->num_tx_port,
2010 &tabla_p->dai[AIF1_PB].wcd9xxx_ch_list))
2011 goto pr_err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002012 list_add_tail(&core->rx_chs[port_id].list,
2013 &tabla_p->dai[AIF3_PB].wcd9xxx_ch_list);
2014 break;
2015 default:
2016 pr_err("Unknown AIF %d\n", widget->value);
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002017 goto err;
Kuirong Wang906ac472012-07-09 12:54:44 -07002018 }
2019
2020 snd_soc_dapm_mux_update_power(widget, kcontrol, 1, widget->value, e);
2021
2022 mutex_unlock(&codec->mutex);
2023 return 0;
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002024
2025pr_err:
2026 pr_err("%s: RX%u is used by current requesting AIF_PB itself\n",
2027 __func__, port_id + 1);
Santosh Mardi2a831d72012-11-07 20:45:52 +05302028 mutex_unlock(&codec->mutex);
2029 return 0;
Kuirong Wangdcc392e2012-10-19 00:33:38 -07002030err:
2031 mutex_unlock(&codec->mutex);
2032 return -EINVAL;
Kuirong Wang906ac472012-07-09 12:54:44 -07002033}
2034
2035static const struct soc_enum slim_rx_mux_enum =
2036 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim_rx_mux_text), slim_rx_mux_text);
2037
2038static const struct snd_kcontrol_new slim_rx_mux[TABLA_RX_MAX] = {
2039 SOC_DAPM_ENUM_EXT("SLIM RX1 Mux", slim_rx_mux_enum,
2040 slim_rx_mux_get, slim_rx_mux_put),
2041 SOC_DAPM_ENUM_EXT("SLIM RX2 Mux", slim_rx_mux_enum,
2042 slim_rx_mux_get, slim_rx_mux_put),
2043 SOC_DAPM_ENUM_EXT("SLIM RX3 Mux", slim_rx_mux_enum,
2044 slim_rx_mux_get, slim_rx_mux_put),
2045 SOC_DAPM_ENUM_EXT("SLIM RX4 Mux", slim_rx_mux_enum,
2046 slim_rx_mux_get, slim_rx_mux_put),
2047 SOC_DAPM_ENUM_EXT("SLIM RX5 Mux", slim_rx_mux_enum,
2048 slim_rx_mux_get, slim_rx_mux_put),
2049 SOC_DAPM_ENUM_EXT("SLIM RX6 Mux", slim_rx_mux_enum,
2050 slim_rx_mux_get, slim_rx_mux_put),
2051 SOC_DAPM_ENUM_EXT("SLIM RX7 Mux", slim_rx_mux_enum,
2052 slim_rx_mux_get, slim_rx_mux_put),
2053};
2054
2055static const struct snd_kcontrol_new aif_cap_mixer[] = {
2056 SOC_SINGLE_EXT("SLIM TX1", SND_SOC_NOPM, TABLA_TX1, 1, 0,
2057 slim_tx_mixer_get, slim_tx_mixer_put),
2058 SOC_SINGLE_EXT("SLIM TX2", SND_SOC_NOPM, TABLA_TX2, 1, 0,
2059 slim_tx_mixer_get, slim_tx_mixer_put),
2060 SOC_SINGLE_EXT("SLIM TX3", SND_SOC_NOPM, TABLA_TX3, 1, 0,
2061 slim_tx_mixer_get, slim_tx_mixer_put),
2062 SOC_SINGLE_EXT("SLIM TX4", SND_SOC_NOPM, TABLA_TX4, 1, 0,
2063 slim_tx_mixer_get, slim_tx_mixer_put),
2064 SOC_SINGLE_EXT("SLIM TX5", SND_SOC_NOPM, TABLA_TX5, 1, 0,
2065 slim_tx_mixer_get, slim_tx_mixer_put),
2066 SOC_SINGLE_EXT("SLIM TX6", SND_SOC_NOPM, TABLA_TX6, 1, 0,
2067 slim_tx_mixer_get, slim_tx_mixer_put),
2068 SOC_SINGLE_EXT("SLIM TX7", SND_SOC_NOPM, TABLA_TX7, 1, 0,
2069 slim_tx_mixer_get, slim_tx_mixer_put),
2070 SOC_SINGLE_EXT("SLIM TX8", SND_SOC_NOPM, TABLA_TX8, 1, 0,
2071 slim_tx_mixer_get, slim_tx_mixer_put),
2072 SOC_SINGLE_EXT("SLIM TX9", SND_SOC_NOPM, TABLA_TX9, 1, 0,
2073 slim_tx_mixer_get, slim_tx_mixer_put),
2074 SOC_SINGLE_EXT("SLIM TX10", SND_SOC_NOPM, TABLA_TX10, 1, 0,
2075 slim_tx_mixer_get, slim_tx_mixer_put),
2076};
2077
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002078static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002079 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002080{
2081 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2082
2083 pr_debug("%s %d\n", __func__, enable);
2084
2085 if (enable) {
2086 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002087 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
2088 } else {
2089 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002090 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002091 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07002092 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002093 }
2094}
2095
2096static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
2097 struct snd_kcontrol *kcontrol, int event)
2098{
2099 struct snd_soc_codec *codec = w->codec;
2100 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002101 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002102
2103 pr_debug("%s %d\n", __func__, event);
2104
2105 if (w->reg == TABLA_A_TX_1_2_EN)
2106 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
2107 else if (w->reg == TABLA_A_TX_3_4_EN)
2108 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
2109 else if (w->reg == TABLA_A_TX_5_6_EN)
2110 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
2111 else {
2112 pr_err("%s: Error, invalid adc register\n", __func__);
2113 return -EINVAL;
2114 }
2115
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002116 if (w->shift == 3)
2117 init_bit_shift = 6;
2118 else if (w->shift == 7)
2119 init_bit_shift = 7;
2120 else {
2121 pr_err("%s: Error, invalid init bit postion adc register\n",
2122 __func__);
2123 return -EINVAL;
2124 }
2125
2126
2127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002128 switch (event) {
2129 case SND_SOC_DAPM_PRE_PMU:
2130 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002131 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
2132 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002133 break;
2134 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08002135
2136 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
2137
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002138 break;
2139 case SND_SOC_DAPM_POST_PMD:
2140 tabla_codec_enable_adc_block(codec, 0);
2141 break;
2142 }
2143 return 0;
2144}
2145
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002146static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2147{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002148 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2149 0x80);
2150 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2151 0x04);
2152 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2153 0x01);
2154 usleep_range(1000, 1000);
2155 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2156 0x00);
2157}
2158
2159static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2160 enum tabla_bandgap_type choice)
2161{
2162 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2163
2164 /* TODO lock resources accessed by audio streams and threaded
2165 * interrupt handlers
2166 */
2167
2168 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2169 tabla->bandgap_type);
2170
2171 if (tabla->bandgap_type == choice)
2172 return;
2173
2174 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2175 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2176 tabla_codec_enable_audio_mode_bandgap(codec);
2177 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002178 /* bandgap mode becomes fast,
2179 * mclk should be off or clk buff source souldn't be VBG
2180 * Let's turn off mclk always */
2181 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002182 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2183 0x2);
2184 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2185 0x80);
2186 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2187 0x4);
2188 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2189 0x01);
2190 usleep_range(1000, 1000);
2191 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2192 0x00);
2193 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2194 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
Damir Didjusto7c85d712012-08-16 21:22:29 -07002195 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002196 usleep_range(100, 100);
2197 tabla_codec_enable_audio_mode_bandgap(codec);
2198 } else if (choice == TABLA_BANDGAP_OFF) {
Damir Didjusto7c85d712012-08-16 21:22:29 -07002199 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002200 } else {
2201 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2202 }
2203 tabla->bandgap_type = choice;
2204}
2205
2206static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2207{
2208 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2209 pr_debug("%s\n", __func__);
2210 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002211 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002212 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2213 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002214 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002215 tabla->clock_active = false;
2216}
2217
2218static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
2219{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002220 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002221 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002222 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002223 return 1;
2224 else {
2225 BUG_ON(1);
2226 return -EINVAL;
2227 }
2228}
2229
2230static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
2231{
2232 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2233
2234 if (enable) {
2235 tabla->rx_bias_count++;
2236 if (tabla->rx_bias_count == 1)
2237 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
2238 0x80, 0x80);
2239 } else {
2240 tabla->rx_bias_count--;
2241 if (!tabla->rx_bias_count)
2242 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
2243 0x80, 0x00);
2244 }
2245}
2246
2247static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2248 int enable)
2249{
2250 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2251
2252 pr_debug("%s: enable = %d\n", __func__, enable);
2253 if (enable) {
2254 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002255 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002256 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2257 usleep_range(5, 5);
2258 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002259 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002260 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002261 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002262 usleep_range(10, 10);
2263 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002264 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002265 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2266 } else {
2267 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002268 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002269 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002270 /* clk source to ext clk and clk buff ref to VBG */
2271 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002272 }
2273 tabla->config_mode_active = enable ? true : false;
2274
2275 return 0;
2276}
2277
2278static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002279 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002280{
2281 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2282
2283 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
2284
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002285 /* transit to RCO requires mclk off */
2286 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002287 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002288 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002289 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002290 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002291 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002292 } else {
2293 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002294 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2295
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002296 if (tabla->mbhc_polling_active) {
2297 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2298 tabla_codec_enable_config_mode(codec, 0);
2299 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002300 }
2301
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002302 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002303 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07002304 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08002305 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2306 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2307 usleep_range(50, 50);
2308 tabla->clock_active = true;
2309 return 0;
2310}
2311
2312static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
2313 struct snd_kcontrol *kcontrol, int event)
2314{
2315 struct snd_soc_codec *codec = w->codec;
2316 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2317
2318 pr_debug("%s: %d\n", __func__, event);
2319
2320 switch (event) {
2321 case SND_SOC_DAPM_PRE_PMU:
2322 tabla_codec_enable_bandgap(codec,
2323 TABLA_BANDGAP_AUDIO_MODE);
2324 tabla_enable_rx_bias(codec, 1);
2325
2326 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
2327 0x08, 0x08);
2328 /* Enable Zero Cross detect for AUX PGA channel
2329 * and set the initial AUX PGA gain to NEG_0P0_DB
2330 * to avoid glitches.
2331 */
2332 if (w->reg == TABLA_A_AUX_L_EN) {
2333 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
2334 0x20, 0x20);
2335 tabla->aux_l_gain = snd_soc_read(codec,
2336 TABLA_A_AUX_L_GAIN);
2337 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
2338 } else {
2339 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
2340 0x20, 0x20);
2341 tabla->aux_r_gain = snd_soc_read(codec,
2342 TABLA_A_AUX_R_GAIN);
2343 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
2344 }
2345 if (tabla->aux_pga_cnt++ == 1
2346 && !tabla->mclk_enabled) {
2347 tabla_codec_enable_clock_block(codec, 1);
2348 pr_debug("AUX PGA enabled RC osc\n");
2349 }
2350 break;
2351
2352 case SND_SOC_DAPM_POST_PMU:
2353 if (w->reg == TABLA_A_AUX_L_EN)
2354 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
2355 tabla->aux_l_gain);
2356 else
2357 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
2358 tabla->aux_r_gain);
2359 break;
2360
2361 case SND_SOC_DAPM_PRE_PMD:
2362 /* Mute AUX PGA channel in use before disabling AUX PGA */
2363 if (w->reg == TABLA_A_AUX_L_EN) {
2364 tabla->aux_l_gain = snd_soc_read(codec,
2365 TABLA_A_AUX_L_GAIN);
2366 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
2367 } else {
2368 tabla->aux_r_gain = snd_soc_read(codec,
2369 TABLA_A_AUX_R_GAIN);
2370 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
2371 }
2372 break;
2373
2374 case SND_SOC_DAPM_POST_PMD:
2375 tabla_enable_rx_bias(codec, 0);
2376
2377 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
2378 0x08, 0x00);
2379 if (w->reg == TABLA_A_AUX_L_EN) {
2380 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
2381 tabla->aux_l_gain);
2382 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
2383 0x20, 0x00);
2384 } else {
2385 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
2386 tabla->aux_r_gain);
2387 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
2388 0x20, 0x00);
2389 }
2390
2391 if (tabla->aux_pga_cnt-- == 0) {
2392 if (tabla->mbhc_polling_active)
2393 tabla_codec_enable_bandgap(codec,
2394 TABLA_BANDGAP_MBHC_MODE);
2395 else
2396 tabla_codec_enable_bandgap(codec,
2397 TABLA_BANDGAP_OFF);
2398
2399 if (!tabla->mclk_enabled &&
2400 !tabla->mbhc_polling_active) {
2401 tabla_codec_enable_clock_block(codec, 0);
2402 }
2403 }
2404 break;
2405 }
2406 return 0;
2407}
2408
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002409static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
2410 struct snd_kcontrol *kcontrol, int event)
2411{
2412 struct snd_soc_codec *codec = w->codec;
2413 u16 lineout_gain_reg;
2414
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002415 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002416
2417 switch (w->shift) {
2418 case 0:
2419 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
2420 break;
2421 case 1:
2422 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
2423 break;
2424 case 2:
2425 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
2426 break;
2427 case 3:
2428 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
2429 break;
2430 case 4:
2431 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
2432 break;
2433 default:
2434 pr_err("%s: Error, incorrect lineout register value\n",
2435 __func__);
2436 return -EINVAL;
2437 }
2438
2439 switch (event) {
2440 case SND_SOC_DAPM_PRE_PMU:
2441 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2442 break;
2443 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002444 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002445 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002446 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002447 break;
2448 case SND_SOC_DAPM_POST_PMD:
2449 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2450 break;
2451 }
2452 return 0;
2453}
2454
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002455
2456static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002457 struct snd_kcontrol *kcontrol, int event)
2458{
2459 struct snd_soc_codec *codec = w->codec;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002460 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2461 u8 dmic_clk_en;
2462 s32 *dmic_clk_cnt;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002463 unsigned int dmic;
2464 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002465
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002466 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2467 if (ret < 0) {
2468 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002469 return -EINVAL;
2470 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002471
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002472 switch (dmic) {
2473 case 1:
2474 case 2:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002475 dmic_clk_en = 0x01;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002476 dmic_clk_cnt = &(tabla->dmic_1_2_clk_cnt);
2477
2478 pr_debug("%s() event %d DMIC%d dmic_1_2_clk_cnt %d\n",
2479 __func__, event, dmic, *dmic_clk_cnt);
2480
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002481 break;
2482
2483 case 3:
2484 case 4:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002485 dmic_clk_en = 0x04;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002486 dmic_clk_cnt = &(tabla->dmic_3_4_clk_cnt);
2487
2488 pr_debug("%s() event %d DMIC%d dmic_3_4_clk_cnt %d\n",
2489 __func__, event, dmic, *dmic_clk_cnt);
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002490 break;
2491
2492 case 5:
2493 case 6:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002494 dmic_clk_en = 0x10;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002495 dmic_clk_cnt = &(tabla->dmic_5_6_clk_cnt);
2496
2497 pr_debug("%s() event %d DMIC%d dmic_5_6_clk_cnt %d\n",
2498 __func__, event, dmic, *dmic_clk_cnt);
2499
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002500 break;
2501
2502 default:
2503 pr_err("%s: Invalid DMIC Selection\n", __func__);
2504 return -EINVAL;
2505 }
2506
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002507 switch (event) {
2508 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002509
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002510 (*dmic_clk_cnt)++;
2511 if (*dmic_clk_cnt == 1)
2512 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2513 dmic_clk_en, dmic_clk_en);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002514
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002515 break;
2516 case SND_SOC_DAPM_POST_PMD:
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002517
2518 (*dmic_clk_cnt)--;
2519 if (*dmic_clk_cnt == 0)
2520 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2521 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002522 break;
2523 }
2524 return 0;
2525}
2526
Bradley Rubin229c6a52011-07-12 16:18:48 -07002527
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002528/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002529static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2530{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002531 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002532 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2533 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002534
Joonwoo Park03324832012-03-19 19:36:16 -07002535 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002536 if (!tabla->mbhc_polling_active) {
2537 pr_debug("Polling is not active, do not start polling\n");
2538 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002539 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002540 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002541
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07002542 if (tabla->no_mic_headset_override) {
2543 pr_debug("%s setting button threshold to min", __func__);
2544 /* set to min */
2545 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
2546 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
2547 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x80);
2548 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0x00);
2549 } else if (unlikely(mbhc_state == MBHC_STATE_POTENTIAL)) {
2550 pr_debug("%s recovering MBHC state machine\n", __func__);
2551 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
2552 /* set to max button press threshold */
2553 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0x7F);
2554 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xFF);
2555 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2556 (TABLA_IS_1_X(tabla_core->version) ?
2557 0x07 : 0x7F));
2558 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xFF);
2559 /* set to max */
2560 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x7F);
2561 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0xFF);
Joonwoo Park03324832012-03-19 19:36:16 -07002562 }
2563
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002564 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2565 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2566 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002567 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002568}
2569
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002570/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002571static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2572{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002573 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2574
Joonwoo Park03324832012-03-19 19:36:16 -07002575 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002576 if (!tabla->mbhc_polling_active) {
2577 pr_debug("polling not active, nothing to pause\n");
2578 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002579 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002580
Simmi Pateriya1b9a3092013-01-02 11:49:26 +05302581 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
2582 msleep(250);
2583 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002584 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002585 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002586}
2587
Joonwoo Park03324832012-03-19 19:36:16 -07002588static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002589{
2590 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2591 u8 reg_mode_val, cur_mode_val;
2592 bool mbhc_was_polling = false;
2593
2594 if (mode)
2595 reg_mode_val = TABLA_CFILT_FAST_MODE;
2596 else
2597 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2598
2599 cur_mode_val = snd_soc_read(codec,
2600 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2601
2602 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002603 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002604 if (tabla->mbhc_polling_active) {
2605 tabla_codec_pause_hs_polling(codec);
2606 mbhc_was_polling = true;
2607 }
2608 snd_soc_update_bits(codec,
2609 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2610 if (mbhc_was_polling)
2611 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002612 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002613 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2614 cur_mode_val, reg_mode_val);
2615 } else {
2616 pr_debug("%s: CFILT Value is already %x\n",
2617 __func__, cur_mode_val);
2618 }
2619}
2620
2621static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2622 u8 cfilt_sel, int inc)
2623{
2624 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2625 u32 *cfilt_cnt_ptr = NULL;
2626 u16 micb_cfilt_reg;
2627
2628 switch (cfilt_sel) {
2629 case TABLA_CFILT1_SEL:
2630 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2631 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2632 break;
2633 case TABLA_CFILT2_SEL:
2634 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2635 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2636 break;
2637 case TABLA_CFILT3_SEL:
2638 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2639 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2640 break;
2641 default:
2642 return; /* should not happen */
2643 }
2644
2645 if (inc) {
2646 if (!(*cfilt_cnt_ptr)++) {
2647 /* Switch CFILT to slow mode if MBHC CFILT being used */
2648 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2649 tabla_codec_switch_cfilt_mode(codec, 0);
2650
2651 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2652 }
2653 } else {
2654 /* check if count not zero, decrement
2655 * then check if zero, go ahead disable cfilter
2656 */
2657 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2658 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2659
2660 /* Switch CFILT to fast mode if MBHC CFILT being used */
2661 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2662 tabla_codec_switch_cfilt_mode(codec, 1);
2663 }
2664 }
2665}
2666
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002667static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2668{
2669 int rc = -EINVAL;
2670 unsigned min_mv, max_mv;
2671
2672 switch (ldoh_v) {
2673 case TABLA_LDOH_1P95_V:
2674 min_mv = 160;
2675 max_mv = 1800;
2676 break;
2677 case TABLA_LDOH_2P35_V:
2678 min_mv = 200;
2679 max_mv = 2200;
2680 break;
2681 case TABLA_LDOH_2P75_V:
2682 min_mv = 240;
2683 max_mv = 2600;
2684 break;
2685 case TABLA_LDOH_2P85_V:
2686 min_mv = 250;
2687 max_mv = 2700;
2688 break;
2689 default:
2690 goto done;
2691 }
2692
2693 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2694 goto done;
2695
2696 for (rc = 4; rc <= 44; rc++) {
2697 min_mv = max_mv * (rc) / 44;
2698 if (min_mv >= cfilt_mv) {
2699 rc -= 4;
2700 break;
2701 }
2702 }
2703done:
2704 return rc;
2705}
2706
2707static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2708{
2709 u8 hph_reg_val = 0;
2710 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2711
2712 return (hph_reg_val & 0x30) ? true : false;
2713}
2714
Joonwoo Parka9444452011-12-08 18:48:27 -08002715static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2716{
2717 u8 hph_reg_val = 0;
2718 if (left)
2719 hph_reg_val = snd_soc_read(codec,
2720 TABLA_A_RX_HPH_L_DAC_CTL);
2721 else
2722 hph_reg_val = snd_soc_read(codec,
2723 TABLA_A_RX_HPH_R_DAC_CTL);
2724
2725 return (hph_reg_val & 0xC0) ? true : false;
2726}
2727
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002728static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2729{
2730 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2731}
2732
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002733/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002734static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2735 int usec)
2736{
2737 int cfilt_k_val;
2738 bool set = true;
2739 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2740
2741 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2742 tabla->mbhc_micbias_switched) {
2743 pr_debug("%s: set mic V to micbias V\n", __func__);
2744 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2745 tabla_turn_onoff_override(codec, true);
2746 while (1) {
2747 cfilt_k_val = tabla_find_k_value(
2748 tabla->pdata->micbias.ldoh_v,
2749 set ? tabla->mbhc_data.micb_mv :
2750 VDDIO_MICBIAS_MV);
2751 snd_soc_update_bits(codec,
2752 tabla->mbhc_bias_regs.cfilt_val,
2753 0xFC, (cfilt_k_val << 2));
2754 if (!set)
2755 break;
2756 usleep_range(usec, usec);
2757 set = false;
2758 }
2759 tabla_turn_onoff_override(codec, false);
2760 }
2761}
2762
2763/* called under codec_resource_lock acquisition */
2764static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2765 int vddio_switch, bool restartpolling,
2766 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002767{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002768 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002769 bool override;
2770 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002771
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002772 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2773 (!checkpolling || tabla->mbhc_polling_active)) {
2774 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002775 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002776 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2777 if (!override)
2778 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002779 /* Adjust threshold if Mic Bias voltage changes */
2780 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002781 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002782 tabla->pdata->micbias.ldoh_v,
2783 VDDIO_MICBIAS_MV);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002784 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002785 tabla->mbhc_bias_regs.cfilt_val,
2786 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002787 usleep_range(cfilt_adjust_ms * 1000,
2788 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002789 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2790 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2791 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2792 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2793 0xFF);
2794 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2795 __func__);
2796 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002797
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002798 /* enable MIC BIAS Switch to VDDIO */
2799 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2800 0x80, 0x80);
2801 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2802 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002803 if (!override)
2804 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002805 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002806 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002807
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002808 tabla->mbhc_micbias_switched = true;
2809 pr_debug("%s: VDDIO switch enabled\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002810 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2811 if ((!checkpolling || tabla->mbhc_polling_active) &&
2812 restartpolling)
2813 tabla_codec_pause_hs_polling(codec);
2814 /* Reprogram thresholds */
2815 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2816 cfilt_k_val = tabla_find_k_value(
2817 tabla->pdata->micbias.ldoh_v,
2818 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002819 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002820 tabla->mbhc_bias_regs.cfilt_val,
2821 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002822 usleep_range(cfilt_adjust_ms * 1000,
2823 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002824 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2825 tabla->mbhc_data.v_ins_hu & 0xFF);
2826 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2827 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2828 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2829 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002830 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002831
2832 /* Disable MIC BIAS Switch to VDDIO */
2833 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2834 0x80, 0x00);
2835 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2836 0x10, 0x00);
2837
2838 if ((!checkpolling || tabla->mbhc_polling_active) &&
2839 restartpolling)
2840 tabla_codec_start_hs_polling(codec);
2841
2842 tabla->mbhc_micbias_switched = false;
2843 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002844 }
2845}
2846
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002847static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2848 int vddio_switch)
2849{
2850 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2851}
2852
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002853static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2854 struct snd_kcontrol *kcontrol, int event)
2855{
2856 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002857 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2858 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002859 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002860 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002861 char *internal1_text = "Internal1";
2862 char *internal2_text = "Internal2";
2863 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002864
2865 pr_debug("%s %d\n", __func__, event);
2866 switch (w->reg) {
2867 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002868 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002869 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002870 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002871 break;
2872 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002873 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002874 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002875 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002876 break;
2877 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002878 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002879 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002880 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002881 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002882 case TABLA_1_A_MICB_4_CTL:
2883 case TABLA_2_A_MICB_4_CTL:
2884 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002885 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002886 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002887 break;
2888 default:
2889 pr_err("%s: Error, invalid micbias register\n", __func__);
2890 return -EINVAL;
2891 }
2892
2893 switch (event) {
2894 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002895 /* Decide whether to switch the micbias for MBHC */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002896 if (w->reg == tabla->mbhc_bias_regs.ctl_reg) {
2897 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002898 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002899 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2900 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002901
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002902 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002903 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002904
2905 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002906 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002907 else if (strnstr(w->name, internal2_text, 30))
2908 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2909 else if (strnstr(w->name, internal3_text, 30))
2910 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2911
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002912 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002913 case SND_SOC_DAPM_POST_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002914
2915 usleep_range(20000, 20000);
2916
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002917 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002918 tabla->mbhc_cfg.micbias == micb_line) {
2919 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002920 tabla_codec_pause_hs_polling(codec);
2921 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002922 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002923 }
2924 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002925
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002926 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park03324832012-03-19 19:36:16 -07002927 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002928 tabla_is_hph_pa_on(codec)) {
2929 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002930 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002931 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2932 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002933
Bradley Rubin229c6a52011-07-12 16:18:48 -07002934 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002935 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002936 else if (strnstr(w->name, internal2_text, 30))
2937 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2938 else if (strnstr(w->name, internal3_text, 30))
2939 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2940
Patrick Lai3043fba2011-08-01 14:15:57 -07002941 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002942 break;
2943 }
2944
2945 return 0;
2946}
2947
Kiran Kandid8cf5212012-03-02 15:34:53 -08002948
2949static void tx_hpf_corner_freq_callback(struct work_struct *work)
2950{
2951 struct delayed_work *hpf_delayed_work;
2952 struct hpf_work *hpf_work;
2953 struct tabla_priv *tabla;
2954 struct snd_soc_codec *codec;
2955 u16 tx_mux_ctl_reg;
2956 u8 hpf_cut_of_freq;
2957
2958 hpf_delayed_work = to_delayed_work(work);
2959 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2960 tabla = hpf_work->tabla;
2961 codec = hpf_work->tabla->codec;
2962 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2963
2964 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2965 (hpf_work->decimator - 1) * 8;
2966
2967 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
2968 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
2969
2970 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
2971}
2972
2973#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
2974#define CF_MIN_3DB_4HZ 0x0
2975#define CF_MIN_3DB_75HZ 0x1
2976#define CF_MIN_3DB_150HZ 0x2
2977
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002978static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
2979 struct snd_kcontrol *kcontrol, int event)
2980{
2981 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08002982 unsigned int decimator;
2983 char *dec_name = NULL;
2984 char *widget_name = NULL;
2985 char *temp;
2986 int ret = 0;
2987 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
2988 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002989 int offset;
2990
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002991
2992 pr_debug("%s %d\n", __func__, event);
2993
Kiran Kandid8cf5212012-03-02 15:34:53 -08002994 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
2995 if (!widget_name)
2996 return -ENOMEM;
2997 temp = widget_name;
2998
2999 dec_name = strsep(&widget_name, " ");
3000 widget_name = temp;
3001 if (!dec_name) {
3002 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
3003 ret = -EINVAL;
3004 goto out;
3005 }
3006
3007 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
3008 if (ret < 0) {
3009 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
3010 ret = -EINVAL;
3011 goto out;
3012 }
3013
3014 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
3015 w->name, dec_name, decimator);
3016
Kuirong Wange9c8a222012-03-28 16:24:09 -07003017 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003018 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003019 offset = 0;
3020 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003021 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003022 offset = 8;
3023 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003024 pr_err("%s: Error, incorrect dec\n", __func__);
3025 return -EINVAL;
3026 }
3027
Kiran Kandid8cf5212012-03-02 15:34:53 -08003028 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
3029 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
3030
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003031 switch (event) {
3032 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08003033
3034 // Enableable TX digital mute */
3035 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
3036
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003037 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
3038 1 << w->shift);
3039 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08003040
3041 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
3042
3043 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
3044
3045 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
3046 dec_hpf_cut_of_freq;
3047
3048 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
3049
3050 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
3051 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
3052 CF_MIN_3DB_150HZ << 4);
3053 }
3054
3055 /* enable HPF */
3056 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
3057
3058 break;
3059
3060 case SND_SOC_DAPM_POST_PMU:
3061
3062 /* Disable TX digital mute */
3063 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
3064
3065 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
3066 CF_MIN_3DB_150HZ) {
3067
3068 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
3069 msecs_to_jiffies(300));
3070 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07003071 /* apply the digital gain after the decimator is enabled*/
Damir Didjustoed406e22012-11-16 15:44:57 -08003072 if ((w->shift + offset) < ARRAY_SIZE(tx_digital_gain_reg))
Kuirong Wange9c8a222012-03-28 16:24:09 -07003073 snd_soc_write(codec,
3074 tx_digital_gain_reg[w->shift + offset],
3075 snd_soc_read(codec,
3076 tx_digital_gain_reg[w->shift + offset])
3077 );
3078
Kiran Kandid8cf5212012-03-02 15:34:53 -08003079 break;
3080
3081 case SND_SOC_DAPM_PRE_PMD:
3082
3083 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
3084 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
3085 break;
3086
3087 case SND_SOC_DAPM_POST_PMD:
3088
3089 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
3090 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
3091 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
3092
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003093 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003094 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08003095out:
3096 kfree(widget_name);
3097 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003098}
3099
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003100static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003101 struct snd_kcontrol *kcontrol, int event)
3102{
3103 struct snd_soc_codec *codec = w->codec;
3104
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003105 pr_debug("%s %d %s\n", __func__, event, w->name);
3106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003107 switch (event) {
3108 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003109 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
3110 1 << w->shift, 1 << w->shift);
3111 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
3112 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003113 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07003114 case SND_SOC_DAPM_POST_PMU:
3115 /* apply the digital gain after the interpolator is enabled*/
3116 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
3117 snd_soc_write(codec,
3118 rx_digital_gain_reg[w->shift],
3119 snd_soc_read(codec,
3120 rx_digital_gain_reg[w->shift])
3121 );
3122 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003123 }
3124 return 0;
3125}
3126
Bradley Rubin229c6a52011-07-12 16:18:48 -07003127static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
3128 struct snd_kcontrol *kcontrol, int event)
3129{
3130 switch (event) {
3131 case SND_SOC_DAPM_POST_PMU:
3132 case SND_SOC_DAPM_POST_PMD:
3133 usleep_range(1000, 1000);
3134 break;
3135 }
3136 return 0;
3137}
3138
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003139static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
3140 struct snd_kcontrol *kcontrol, int event)
3141{
3142 struct snd_soc_codec *codec = w->codec;
3143
3144 pr_debug("%s %d\n", __func__, event);
3145
3146 switch (event) {
3147 case SND_SOC_DAPM_PRE_PMU:
3148 tabla_enable_rx_bias(codec, 1);
3149 break;
3150 case SND_SOC_DAPM_POST_PMD:
3151 tabla_enable_rx_bias(codec, 0);
3152 break;
3153 }
3154 return 0;
3155}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003156static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
3157 struct snd_kcontrol *kcontrol, int event)
3158{
3159 struct snd_soc_codec *codec = w->codec;
3160
3161 pr_debug("%s %s %d\n", __func__, w->name, event);
3162
3163 switch (event) {
3164 case SND_SOC_DAPM_PRE_PMU:
3165 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3166 break;
3167 case SND_SOC_DAPM_POST_PMD:
3168 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3169 break;
3170 }
3171 return 0;
3172}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003173
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003174static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
3175 struct snd_soc_jack *jack, int status,
3176 int mask)
3177{
3178 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07003179 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003180}
3181
Patrick Lai49efeac2011-11-03 11:01:12 -07003182static void hphocp_off_report(struct tabla_priv *tabla,
3183 u32 jack_status, int irq)
3184{
3185 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07003186 if (!tabla) {
3187 pr_err("%s: Bad tabla private data\n", __func__);
3188 return;
3189 }
Patrick Lai49efeac2011-11-03 11:01:12 -07003190
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003191 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07003192 codec = tabla->codec;
3193 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07003194 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003195 if (tabla->mbhc_cfg.headset_jack)
3196 tabla_snd_soc_jack_report(tabla,
3197 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003198 tabla->hph_status,
3199 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08003200 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
3201 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08003202 /* reset retry counter as PA is turned off signifying
3203 * start of new OCP detection session
3204 */
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003205 if (WCD9XXX_IRQ_HPH_PA_OCPL_FAULT)
Patrick Laic7cae882011-11-18 11:52:49 -08003206 tabla->hphlocp_cnt = 0;
3207 else
3208 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303209 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07003210 }
3211}
3212
3213static void hphlocp_off_report(struct work_struct *work)
3214{
3215 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
3216 hphlocp_work);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003217 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
3218 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07003219}
3220
3221static void hphrocp_off_report(struct work_struct *work)
3222{
3223 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
3224 hphrocp_work);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07003225 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
3226 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07003227}
3228
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003229static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
3230 struct snd_kcontrol *kcontrol, int event)
3231{
3232 struct snd_soc_codec *codec = w->codec;
3233 const char *filename;
3234 const struct firmware *fw;
3235 int i;
3236 int ret;
3237 int num_anc_slots;
3238 struct anc_header *anc_head;
3239 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3240 u32 anc_writes_size = 0;
3241 int anc_size_remaining;
3242 u32 *anc_ptr;
3243 u16 reg;
3244 u8 mask, val, old_val;
3245 u8 mbhc_micb_ctl_val;
3246
3247 pr_debug("%s: DAPM Event %d ANC func is %d\n",
3248 __func__, event, tabla->anc_func);
3249
3250 if (tabla->anc_func == 0)
3251 return 0;
3252
3253 switch (event) {
3254 case SND_SOC_DAPM_PRE_PMU:
3255 mbhc_micb_ctl_val = snd_soc_read(codec,
3256 tabla->mbhc_bias_regs.ctl_reg);
3257
3258 if (!(mbhc_micb_ctl_val & 0x80)) {
3259 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3260 tabla_codec_switch_micbias(codec, 1);
3261 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3262 }
3263
3264 filename = "wcd9310/wcd9310_anc.bin";
3265
3266 ret = request_firmware(&fw, filename, codec->dev);
3267 if (ret != 0) {
3268 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
3269 ret);
3270 return -ENODEV;
3271 }
3272
3273 if (fw->size < sizeof(struct anc_header)) {
3274 dev_err(codec->dev, "Not enough data\n");
3275 release_firmware(fw);
3276 return -ENOMEM;
3277 }
3278
3279 /* First number is the number of register writes */
3280 anc_head = (struct anc_header *)(fw->data);
3281 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
3282 anc_size_remaining = fw->size - sizeof(struct anc_header);
3283 num_anc_slots = anc_head->num_anc_slots;
3284
3285 if (tabla->anc_slot >= num_anc_slots) {
3286 dev_err(codec->dev, "Invalid ANC slot selected\n");
3287 release_firmware(fw);
3288 return -EINVAL;
3289 }
3290
3291 for (i = 0; i < num_anc_slots; i++) {
3292
3293 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
3294 dev_err(codec->dev, "Invalid register format\n");
3295 release_firmware(fw);
3296 return -EINVAL;
3297 }
3298 anc_writes_size = (u32)(*anc_ptr);
3299 anc_size_remaining -= sizeof(u32);
3300 anc_ptr += 1;
3301
3302 if (anc_writes_size * TABLA_PACKED_REG_SIZE
3303 > anc_size_remaining) {
3304 dev_err(codec->dev, "Invalid register format\n");
3305 release_firmware(fw);
3306 return -ENOMEM;
3307 }
3308
3309 if (tabla->anc_slot == i)
3310 break;
3311
3312 anc_size_remaining -= (anc_writes_size *
3313 TABLA_PACKED_REG_SIZE);
3314 anc_ptr += anc_writes_size;
3315 }
3316 if (i == num_anc_slots) {
3317 dev_err(codec->dev, "Selected ANC slot not present\n");
3318 release_firmware(fw);
3319 return -ENOMEM;
3320 }
3321
3322 for (i = 0; i < anc_writes_size; i++) {
3323 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
3324 mask, val);
3325 old_val = snd_soc_read(codec, reg);
3326 snd_soc_write(codec, reg, (old_val & ~mask) |
3327 (val & mask));
3328 }
3329 usleep_range(10000, 10000);
3330 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x30);
3331 msleep(30);
3332 release_firmware(fw);
3333 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3334 /* if MBHC polling is active, set TX7_MBHC_EN bit 7 */
3335 if (tabla->mbhc_polling_active)
3336 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80,
3337 0x80);
3338 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3339 break;
3340 case SND_SOC_DAPM_POST_PMD:
3341 /* schedule work is required because at the time HPH PA DAPM
3342 * event callback is called by DAPM framework, CODEC dapm mutex
3343 * would have been locked while snd_soc_jack_report also
3344 * attempts to acquire same lock.
3345 */
3346 if (w->shift == 5) {
3347 clear_bit(TABLA_HPHL_PA_OFF_ACK,
3348 &tabla->hph_pa_dac_state);
3349 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3350 &tabla->hph_pa_dac_state);
3351 if (tabla->hph_status & SND_JACK_OC_HPHL)
3352 schedule_work(&tabla->hphlocp_work);
3353 } else if (w->shift == 4) {
3354 clear_bit(TABLA_HPHR_PA_OFF_ACK,
3355 &tabla->hph_pa_dac_state);
3356 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3357 &tabla->hph_pa_dac_state);
3358 if (tabla->hph_status & SND_JACK_OC_HPHR)
3359 schedule_work(&tabla->hphrocp_work);
3360 }
3361
3362 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
3363 tabla_codec_switch_micbias(codec, 0);
3364 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3365
3366 break;
3367 case SND_SOC_DAPM_PRE_PMD:
3368 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
3369 msleep(40);
3370 /* unset TX7_MBHC_EN bit 7 */
3371 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
3372 snd_soc_update_bits(codec, TABLA_A_CDC_ANC1_CTL, 0x01, 0x00);
3373 snd_soc_update_bits(codec, TABLA_A_CDC_ANC2_CTL, 0x01, 0x00);
3374 msleep(20);
3375 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0x0F);
3376 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
3377 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
3378 break;
3379 }
3380 return 0;
3381}
3382
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003383static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
3384 struct snd_kcontrol *kcontrol, int event)
3385{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003386 struct snd_soc_codec *codec = w->codec;
3387 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3388 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003389 pr_debug("%s: event = %d\n", __func__, event);
3390
3391 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003392 case SND_SOC_DAPM_PRE_PMU:
3393 mbhc_micb_ctl_val = snd_soc_read(codec,
3394 tabla->mbhc_bias_regs.ctl_reg);
3395
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003396 if (!(mbhc_micb_ctl_val & 0x80)) {
3397 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003398 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003399 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
3400 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003401 break;
3402
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003403 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07003404 /* schedule work is required because at the time HPH PA DAPM
3405 * event callback is called by DAPM framework, CODEC dapm mutex
3406 * would have been locked while snd_soc_jack_report also
3407 * attempts to acquire same lock.
3408 */
Joonwoo Parka9444452011-12-08 18:48:27 -08003409 if (w->shift == 5) {
3410 clear_bit(TABLA_HPHL_PA_OFF_ACK,
3411 &tabla->hph_pa_dac_state);
3412 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3413 &tabla->hph_pa_dac_state);
3414 if (tabla->hph_status & SND_JACK_OC_HPHL)
3415 schedule_work(&tabla->hphlocp_work);
3416 } else if (w->shift == 4) {
3417 clear_bit(TABLA_HPHR_PA_OFF_ACK,
3418 &tabla->hph_pa_dac_state);
3419 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3420 &tabla->hph_pa_dac_state);
3421 if (tabla->hph_status & SND_JACK_OC_HPHR)
3422 schedule_work(&tabla->hphrocp_work);
3423 }
3424
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003425 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07003426 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003427 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003428
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003429 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
3430 w->name);
3431 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07003432 break;
3433 }
3434 return 0;
3435}
3436
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003437static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003438 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003439{
3440 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003441 unsigned int cfilt;
3442
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003443 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003444 case TABLA_MICBIAS1:
3445 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
3446 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
3447 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
3448 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
3449 break;
3450 case TABLA_MICBIAS2:
3451 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
3452 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
3453 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
3454 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
3455 break;
3456 case TABLA_MICBIAS3:
3457 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
3458 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
3459 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
3460 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
3461 break;
3462 case TABLA_MICBIAS4:
3463 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003464 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
3465 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
3466 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003467 break;
3468 default:
3469 /* Should never reach here */
3470 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07003471 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003472 }
3473
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003474 micbias_regs->cfilt_sel = cfilt;
3475
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003476 switch (cfilt) {
3477 case TABLA_CFILT1_SEL:
3478 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
3479 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003480 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003481 break;
3482 case TABLA_CFILT2_SEL:
3483 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
3484 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003485 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003486 break;
3487 case TABLA_CFILT3_SEL:
3488 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
3489 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003490 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003491 break;
3492 }
3493}
Santosh Mardie15e2302011-11-15 10:39:23 +05303494static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
3495 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
3496 4, 0, NULL, 0),
3497 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
3498 0, NULL, 0),
3499};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003500
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003501static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
3502 struct snd_kcontrol *kcontrol, int event)
3503{
3504 struct snd_soc_codec *codec = w->codec;
3505
3506 pr_debug("%s %s %d\n", __func__, w->name, event);
3507
3508 switch (event) {
3509 case SND_SOC_DAPM_PRE_PMU:
3510 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3511 break;
3512
3513 case SND_SOC_DAPM_POST_PMD:
3514 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3515 break;
3516 }
3517 return 0;
3518}
3519
Damir Didjusto7c85d712012-08-16 21:22:29 -07003520static int tabla_ear_pa_event(struct snd_soc_dapm_widget *w,
3521 struct snd_kcontrol *kcontrol, int event)
3522{
3523 struct snd_soc_codec *codec = w->codec;
3524
3525 pr_debug("%s %d\n", __func__, event);
3526
3527 switch (event) {
3528 case SND_SOC_DAPM_PRE_PMU:
3529 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x50, 0x50);
3530 break;
3531
3532 case SND_SOC_DAPM_PRE_PMD:
3533 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x10, 0x00);
3534 snd_soc_update_bits(codec, TABLA_A_RX_EAR_EN, 0x40, 0x00);
3535 break;
3536 }
3537 return 0;
3538}
3539
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003540static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
3541 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303542 0, tabla_codec_enable_micbias,
3543 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3544 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003545};
3546
3547static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
3548 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303549 0, tabla_codec_enable_micbias,
3550 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3551 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003552};
3553
Santosh Mardie15e2302011-11-15 10:39:23 +05303554static const struct snd_soc_dapm_route audio_i2s_map[] = {
3555 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3556 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3557 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3558 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3559 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3560
3561 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3562 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3563 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3564 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3565};
3566
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003567static const struct snd_soc_dapm_route audio_map[] = {
3568 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003569
Kuirong Wang906ac472012-07-09 12:54:44 -07003570 {"AIF1 CAP", NULL, "AIF1_CAP Mixer"},
3571 {"AIF2 CAP", NULL, "AIF2_CAP Mixer"},
3572 {"AIF3 CAP", NULL, "AIF3_CAP Mixer"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003573
Kuirong Wang906ac472012-07-09 12:54:44 -07003574 /* SLIM_MIXER("AIF1_CAP Mixer"),*/
3575 {"AIF1_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3576 {"AIF1_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3577 {"AIF1_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3578 {"AIF1_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3579 {"AIF1_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3580 {"AIF1_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3581 {"AIF1_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3582 {"AIF1_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3583 {"AIF1_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3584 {"AIF1_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3585 /* SLIM_MIXER("AIF2_CAP Mixer"),*/
3586 {"AIF2_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3587 {"AIF2_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3588 {"AIF2_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3589 {"AIF2_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3590 {"AIF2_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3591 {"AIF2_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3592 {"AIF2_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3593 {"AIF2_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3594 {"AIF2_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3595 {"AIF2_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3596 /* SLIM_MIXER("AIF3_CAP Mixer"),*/
3597 {"AIF3_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
3598 {"AIF3_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
3599 {"AIF3_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
3600 {"AIF3_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
3601 {"AIF3_CAP Mixer", "SLIM TX5", "SLIM TX5 MUX"},
3602 {"AIF3_CAP Mixer", "SLIM TX6", "SLIM TX6 MUX"},
3603 {"AIF3_CAP Mixer", "SLIM TX7", "SLIM TX7 MUX"},
3604 {"AIF3_CAP Mixer", "SLIM TX8", "SLIM TX8 MUX"},
3605 {"AIF3_CAP Mixer", "SLIM TX9", "SLIM TX9 MUX"},
3606 {"AIF3_CAP Mixer", "SLIM TX10", "SLIM TX10 MUX"},
3607
3608 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003609 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3610
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003611 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003612 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3613 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3614 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3615 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3616 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3617 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3618 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003619
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003620 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3621
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003622 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003623 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3624 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3625 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3626 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3627 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3628 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3629 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003630
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003631 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3632
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003633 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003634 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003635 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3636 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003637 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3638 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003639 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3640 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003641 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3642 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003643 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3644 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3645 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3646 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3647 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3648 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3649 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003650
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003651 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3652 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3653 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003654 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003655 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3656 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003657 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3658 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3659 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3660 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003661
Kiran Kandi3426e512011-09-13 22:50:10 -07003662 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3663 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3664 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3665 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3666 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3667 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3668 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3669 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3670 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3671 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3672
Kiran Kandi3426e512011-09-13 22:50:10 -07003673 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3674 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3675 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3676 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3677 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3678 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3679 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3680 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3681 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3682 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3683
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003684 /* Earpiece (RX MIX1) */
3685 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003686 {"EAR PA", NULL, "EAR_PA_MIXER"},
3687 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003688 {"DAC1", NULL, "CP"},
3689
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003690 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3691 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003692
3693 /* Headset (RX MIX1 and RX MIX2) */
3694 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003695 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003696
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003697 {"HPHL", NULL, "HPHL_PA_MIXER"},
3698 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3699
3700 {"HPHR", NULL, "HPHR_PA_MIXER"},
3701 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003702
3703 {"HPHL DAC", NULL, "CP"},
3704 {"HPHR DAC", NULL, "CP"},
3705
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003706 {"ANC HEADPHONE", NULL, "ANC HPHL"},
3707 {"ANC HEADPHONE", NULL, "ANC HPHR"},
3708
3709 {"ANC HPHL", NULL, "HPHL_PA_MIXER"},
3710 {"ANC HPHR", NULL, "HPHR_PA_MIXER"},
3711
Bradley Rubin229c6a52011-07-12 16:18:48 -07003712 {"ANC1 MUX", "ADC1", "ADC1"},
3713 {"ANC1 MUX", "ADC2", "ADC2"},
3714 {"ANC1 MUX", "ADC3", "ADC3"},
3715 {"ANC1 MUX", "ADC4", "ADC4"},
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003716 {"ANC1 MUX", "DMIC1", "DMIC1"},
3717 {"ANC1 MUX", "DMIC2", "DMIC2"},
3718 {"ANC1 MUX", "DMIC3", "DMIC3"},
3719 {"ANC1 MUX", "DMIC4", "DMIC4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003720 {"ANC2 MUX", "ADC1", "ADC1"},
3721 {"ANC2 MUX", "ADC2", "ADC2"},
3722 {"ANC2 MUX", "ADC3", "ADC3"},
3723 {"ANC2 MUX", "ADC4", "ADC4"},
3724
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003725 {"ANC HPHR", NULL, "CDC_CONN"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003726 {"DAC1", "Switch", "RX1 CHAIN"},
3727 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003728 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003729
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003730 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3731 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3732 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3733 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3734 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003735
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003736 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3737 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3738 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3739 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3740 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3741 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3742 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3743 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3744 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3745 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003746
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003747 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003748 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3749
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003750 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3751 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08003752 {"RX1 MIX2", NULL, "ANC1 MUX"},
3753 {"RX2 MIX2", NULL, "ANC2 MUX"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003754
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003755 {"CP", NULL, "RX_BIAS"},
3756 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3757 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3758 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3759 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003760 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003761
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003762 {"RX1 MIX1", NULL, "COMP1_CLK"},
3763 {"RX2 MIX1", NULL, "COMP1_CLK"},
3764 {"RX3 MIX1", NULL, "COMP2_CLK"},
3765 {"RX5 MIX1", NULL, "COMP2_CLK"},
3766
3767
Bradley Rubin229c6a52011-07-12 16:18:48 -07003768 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3769 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003770 {"RX1 MIX1", NULL, "RX1 MIX1 INP3"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003771 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3772 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003773 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3774 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3775 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3776 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3777 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3778 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3779 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3780 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003781 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3782 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003783 {"RX1 MIX2", NULL, "RX1 MIX1"},
3784 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3785 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3786 {"RX2 MIX2", NULL, "RX2 MIX1"},
3787 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3788 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3789 {"RX3 MIX2", NULL, "RX3 MIX1"},
3790 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3791 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003792
Kuirong Wang906ac472012-07-09 12:54:44 -07003793 /* SLIM_MUX("AIF1_PB", "AIF1 PB"),*/
3794 {"SLIM RX1 MUX", "AIF1_PB", "AIF1 PB"},
3795 {"SLIM RX2 MUX", "AIF1_PB", "AIF1 PB"},
3796 {"SLIM RX3 MUX", "AIF1_PB", "AIF1 PB"},
3797 {"SLIM RX4 MUX", "AIF1_PB", "AIF1 PB"},
3798 {"SLIM RX5 MUX", "AIF1_PB", "AIF1 PB"},
3799 {"SLIM RX6 MUX", "AIF1_PB", "AIF1 PB"},
3800 {"SLIM RX7 MUX", "AIF1_PB", "AIF1 PB"},
3801 /* SLIM_MUX("AIF2_PB", "AIF2 PB"),*/
3802 {"SLIM RX1 MUX", "AIF2_PB", "AIF2 PB"},
3803 {"SLIM RX2 MUX", "AIF2_PB", "AIF2 PB"},
3804 {"SLIM RX3 MUX", "AIF2_PB", "AIF2 PB"},
3805 {"SLIM RX4 MUX", "AIF2_PB", "AIF2 PB"},
3806 {"SLIM RX5 MUX", "AIF2_PB", "AIF2 PB"},
3807 {"SLIM RX6 MUX", "AIF2_PB", "AIF2 PB"},
3808 {"SLIM RX7 MUX", "AIF2_PB", "AIF2 PB"},
3809 /* SLIM_MUX("AIF3_PB", "AIF3 PB"),*/
3810 {"SLIM RX1 MUX", "AIF3_PB", "AIF3 PB"},
3811 {"SLIM RX2 MUX", "AIF3_PB", "AIF3 PB"},
3812 {"SLIM RX3 MUX", "AIF3_PB", "AIF3 PB"},
3813 {"SLIM RX4 MUX", "AIF3_PB", "AIF3 PB"},
3814 {"SLIM RX5 MUX", "AIF3_PB", "AIF3 PB"},
3815 {"SLIM RX6 MUX", "AIF3_PB", "AIF3 PB"},
3816 {"SLIM RX7 MUX", "AIF3_PB", "AIF3 PB"},
3817
3818 {"SLIM RX1", NULL, "SLIM RX1 MUX"},
3819 {"SLIM RX2", NULL, "SLIM RX2 MUX"},
3820 {"SLIM RX3", NULL, "SLIM RX3 MUX"},
3821 {"SLIM RX4", NULL, "SLIM RX4 MUX"},
3822 {"SLIM RX5", NULL, "SLIM RX5 MUX"},
3823 {"SLIM RX6", NULL, "SLIM RX6 MUX"},
3824 {"SLIM RX7", NULL, "SLIM RX7 MUX"},
3825
3826 /* Mixer control for output path */
Bradley Rubin229c6a52011-07-12 16:18:48 -07003827 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3828 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303829 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3830 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003831 {"RX1 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003832 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3833 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003834 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
3835 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3836 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303837 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3838 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003839 {"RX1 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003840 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3841 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003842 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003843 {"RX1 MIX1 INP3", "RX1", "SLIM RX1"},
3844 {"RX1 MIX1 INP3", "RX2", "SLIM RX2"},
3845 {"RX1 MIX1 INP3", "RX3", "SLIM RX3"},
3846 {"RX1 MIX1 INP3", "RX4", "SLIM RX4"},
3847 {"RX1 MIX1 INP3", "RX5", "SLIM RX5"},
3848 {"RX1 MIX1 INP3", "RX6", "SLIM RX6"},
3849 {"RX1 MIX1 INP3", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003850 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3851 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303852 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3853 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003854 {"RX2 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003855 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3856 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003857 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003858 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3859 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303860 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3861 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003862 {"RX2 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003863 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3864 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003865 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003866 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3867 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303868 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3869 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003870 {"RX3 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003871 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3872 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003873 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003874 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3875 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303876 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3877 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003878 {"RX3 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003879 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3880 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003881 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003882 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3883 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303884 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3885 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003886 {"RX4 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003887 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3888 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003889 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003890 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3891 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303892 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003893 {"RX4 MIX1 INP2", "RX5", "SLIM RX5"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303894 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003895 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3896 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003897 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003898 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3899 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303900 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3901 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003902 {"RX5 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003903 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3904 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003905 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003906 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
3907 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303908 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
3909 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003910 {"RX5 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003911 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
3912 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003913 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003914 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
3915 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303916 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
3917 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003918 {"RX6 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003919 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
3920 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003921 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003922 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
3923 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303924 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
3925 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003926 {"RX6 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003927 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
3928 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003929 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003930 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
3931 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303932 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
3933 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003934 {"RX7 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003935 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
3936 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003937 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003938 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
3939 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303940 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
3941 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003942 {"RX7 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003943 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
3944 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003945 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003946 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
3947 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
3948 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
3949 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
3950 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
3951 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003952
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003953 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003954 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003955 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003956 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003957 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003958 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003959 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003960 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003961 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003962 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003963 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003964 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003965 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003966 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003967 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003968 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003969 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003970 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003971 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003972 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003973 {"DEC7 MUX", "DMIC6", "DMIC6"},
3974 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003975 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003976 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003977 {"DEC8 MUX", "DMIC2", "DMIC2"},
3978 {"DEC8 MUX", "DMIC5", "DMIC5"},
3979 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003980 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003981 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003982 {"DEC9 MUX", "DMIC4", "DMIC4"},
3983 {"DEC9 MUX", "DMIC5", "DMIC5"},
3984 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003985 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003986 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003987 {"DEC10 MUX", "DMIC3", "DMIC3"},
3988 {"DEC10 MUX", "DMIC6", "DMIC6"},
3989 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003990 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003991 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003992
3993 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003994 {"ADC1", NULL, "AMIC1"},
3995 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003996 {"ADC3", NULL, "AMIC3"},
3997 {"ADC4", NULL, "AMIC4"},
3998 {"ADC5", NULL, "AMIC5"},
3999 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004000
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08004001 /* AUX PGA Connections */
4002 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4003 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4004 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4005 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4006 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4007 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4008 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4009 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4010 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4011 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4012 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4013 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4014 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4015 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4016 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4017 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4018 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4019 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4020 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4021 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4022 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4023 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4024 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4025 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4026 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4027 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4028 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4029 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4030 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
4031 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
4032 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
4033 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
4034 {"AUX_PGA_Left", NULL, "AMIC5"},
4035 {"AUX_PGA_Right", NULL, "AMIC6"},
4036
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07004038 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
4039 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
4040 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
4041 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
4042 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004043 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07004044 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
4045 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
4046 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
4047 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07004048
4049 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
4050 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
4051 {"MIC BIAS1 External", NULL, "LDO_H"},
4052 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
4053 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
4054 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
4055 {"MIC BIAS2 External", NULL, "LDO_H"},
4056 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
4057 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
4058 {"MIC BIAS3 External", NULL, "LDO_H"},
4059 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004060};
4061
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004062static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
4063
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004064 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004065 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
4066
4067 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
4068
4069 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004070 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004071 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
4072
4073 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
4074 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
4075
4076 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
4077 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
4078 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
4079};
4080
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004081
4082static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
4083
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004084 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004085 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
4086
4087 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
4088
4089 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
4090
4091 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
4092 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
4093
4094 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
4095};
4096
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004097static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
4098{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004099 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304100 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08004101
4102 if (TABLA_IS_1_X(tabla_core->version)) {
4103 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
4104 if (tabla_1_reg_readable[i] == reg)
4105 return 1;
4106 }
4107 } else {
4108 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
4109 if (tabla_2_reg_readable[i] == reg)
4110 return 1;
4111 }
4112 }
4113
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004114 return tabla_reg_readable[reg];
4115}
Kuirong Wange9c8a222012-03-28 16:24:09 -07004116static bool tabla_is_digital_gain_register(unsigned int reg)
4117{
4118 bool rtn = false;
4119 switch (reg) {
4120 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
4121 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
4122 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
4123 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
4124 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
4125 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
4126 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
4127 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
4128 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
4129 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
4130 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
4131 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
4132 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
4133 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
4134 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
4135 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
4136 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
4137 rtn = true;
4138 break;
4139 default:
4140 break;
4141 }
4142 return rtn;
4143}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004144static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
4145{
4146 /* Registers lower than 0x100 are top level registers which can be
4147 * written by the Tabla core driver.
4148 */
4149
4150 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
4151 return 1;
4152
Ben Romberger1f045a72011-11-04 10:14:57 -07004153 /* IIR Coeff registers are not cacheable */
4154 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
4155 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
4156 return 1;
4157
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08004158 /* ANC filter registers are not cacheable */
4159 if ((reg >= TABLA_A_CDC_ANC1_FILT1_B1_CTL) &&
4160 (reg <= TABLA_A_CDC_ANC1_FILT2_B3_CTL))
4161 return 1;
4162 if ((reg >= TABLA_A_CDC_ANC2_FILT1_B1_CTL) &&
4163 (reg <= TABLA_A_CDC_ANC2_FILT2_B3_CTL))
4164 return 1;
4165
Kuirong Wange9c8a222012-03-28 16:24:09 -07004166 /* Digital gain register is not cacheable so we have to write
4167 * the setting even it is the same
4168 */
4169 if (tabla_is_digital_gain_register(reg))
4170 return 1;
4171
Joonwoo Parkab2c5872012-05-03 15:16:02 -07004172 /* HPH status registers */
4173 if (reg == TABLA_A_RX_HPH_L_STATUS || reg == TABLA_A_RX_HPH_R_STATUS)
4174 return 1;
4175
Kuirong Wang678e4172012-06-26 15:35:22 -07004176 if (reg == TABLA_A_CDC_COMP1_SHUT_DOWN_STATUS ||
4177 reg == TABLA_A_CDC_COMP2_SHUT_DOWN_STATUS)
4178 return 1;
4179
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004180 return 0;
4181}
4182
4183#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
4184static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
4185 unsigned int value)
4186{
4187 int ret;
Kuirong Wang906ac472012-07-09 12:54:44 -07004188
4189 if (reg == SND_SOC_NOPM)
4190 return 0;
4191
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004192 BUG_ON(reg > TABLA_MAX_REGISTER);
4193
4194 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004195 ret = snd_soc_cache_write(codec, reg, value);
4196 if (ret != 0)
4197 dev_err(codec->dev, "Cache write to %x failed: %d\n",
4198 reg, ret);
4199 }
4200
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304201 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004202}
4203static unsigned int tabla_read(struct snd_soc_codec *codec,
4204 unsigned int reg)
4205{
4206 unsigned int val;
4207 int ret;
4208
Kuirong Wang906ac472012-07-09 12:54:44 -07004209 if (reg == SND_SOC_NOPM)
4210 return 0;
4211
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004212 BUG_ON(reg > TABLA_MAX_REGISTER);
4213
4214 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
4215 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004216 ret = snd_soc_cache_read(codec, reg, &val);
4217 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004218 return val;
4219 } else
4220 dev_err(codec->dev, "Cache read from %x failed: %d\n",
4221 reg, ret);
4222 }
4223
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304224 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004225 return val;
4226}
4227
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004228static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
4229{
4230 s16 v_ins;
4231 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
4232 tabla->mbhc_micbias_switched)
4233 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
4234 (s16)tabla->mbhc_data.adj_v_ins_h;
4235 else
4236 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
4237 (s16)tabla->mbhc_data.v_ins_h;
4238 return v_ins;
4239}
4240
4241static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
4242{
4243 s16 v_hs_max;
4244 struct tabla_mbhc_plug_type_cfg *plug_type;
4245
4246 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
4247 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
4248 tabla->mbhc_micbias_switched)
4249 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
4250 else
4251 v_hs_max = plug_type->v_hs_max;
4252 return v_hs_max;
4253}
4254
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07004255static void tabla_codec_calibrate_rel(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004256{
Joonwoo Park0976d012011-12-22 11:48:18 -08004257 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004258
Joonwoo Park0976d012011-12-22 11:48:18 -08004259 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
4260 tabla->mbhc_data.v_b1_hu & 0xFF);
4261 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
4262 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
4263
4264 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
4265 tabla->mbhc_data.v_b1_h & 0xFF);
4266 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
4267 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
4268
4269 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
4270 tabla->mbhc_data.v_brh & 0xFF);
4271 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
4272 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
4273
4274 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
4275 tabla->mbhc_data.v_brl & 0xFF);
4276 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
4277 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07004278}
4279
4280static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
4281{
4282 u8 *n_ready, *n_cic;
4283 struct tabla_mbhc_btn_detect_cfg *btn_det;
4284 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4285 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
4286
4287 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
4288
4289 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
4290 v_ins_hu & 0xFF);
4291 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
4292 (v_ins_hu >> 8) & 0xFF);
4293
4294 tabla_codec_calibrate_rel(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08004295
Joonwoo Parkc0672392012-01-11 11:03:14 -08004296 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08004297 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08004298 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08004299 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
4300 tabla->mbhc_data.npoll);
4301 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
4302 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08004303 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08004304 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
4305 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004306}
4307
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004308static int tabla_startup(struct snd_pcm_substream *substream,
4309 struct snd_soc_dai *dai)
4310{
Kuirong Wanga545e722012-02-06 19:12:54 -08004311 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004312 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
4313 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08004314 if ((tabla_core != NULL) &&
4315 (tabla_core->dev != NULL) &&
4316 (tabla_core->dev->parent != NULL))
4317 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004318
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004319 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004320}
4321
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004322static void tabla_shutdown(struct snd_pcm_substream *substream,
4323 struct snd_soc_dai *dai)
4324{
4325 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
4326 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
4327 u32 active = 0;
4328
4329 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
4330 substream->name, substream->stream);
4331 if (tabla->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
4332 return;
4333
4334 if (dai->id <= NUM_CODEC_DAIS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07004335 if (tabla->dai[dai->id].ch_mask) {
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004336 active = 1;
Joonwoo Park9bbb4d12012-11-09 19:58:11 -08004337 pr_debug("%s(): Codec DAI: chmask[%d] = 0x%lx\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004338 __func__, dai->id, tabla->dai[dai->id].ch_mask);
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004339 }
4340 }
4341
4342 if ((tabla_core != NULL) &&
4343 (tabla_core->dev != NULL) &&
4344 (tabla_core->dev->parent != NULL) &&
4345 (active == 0)) {
4346 pm_runtime_mark_last_busy(tabla_core->dev->parent);
4347 pm_runtime_put(tabla_core->dev->parent);
4348 }
4349}
4350
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004351int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004352{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004353 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4354
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004355 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
4356 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004357 if (dapm)
4358 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004359 if (mclk_enable) {
4360 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004361
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004362 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07004363 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004364 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004365 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004366 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004367 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004368 tabla_codec_calibrate_hs_polling(codec);
4369 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304370 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004371 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304372 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004373 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304374 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004375 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004376 } else {
4377
4378 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004379 if (dapm)
4380 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004381 pr_err("Error, MCLK already diabled\n");
4382 return -EINVAL;
4383 }
4384 tabla->mclk_enabled = false;
4385
4386 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004387 tabla_codec_pause_hs_polling(codec);
4388 tabla_codec_disable_clock_block(codec);
4389 tabla_codec_enable_bandgap(codec,
4390 TABLA_BANDGAP_MBHC_MODE);
4391 tabla_enable_rx_bias(codec, 1);
4392 tabla_codec_enable_clock_block(codec, 1);
4393 tabla_codec_calibrate_hs_polling(codec);
4394 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004395 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
4396 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05304397 } else {
4398 tabla_codec_disable_clock_block(codec);
4399 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004400 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004401 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004402 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004403 if (dapm)
4404 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004405 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004406}
4407
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004408static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
4409 int clk_id, unsigned int freq, int dir)
4410{
4411 pr_debug("%s\n", __func__);
4412 return 0;
4413}
4414
4415static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
4416{
Santosh Mardie15e2302011-11-15 10:39:23 +05304417 u8 val = 0;
4418 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
4419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004420 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05304421 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
4422 case SND_SOC_DAIFMT_CBS_CFS:
4423 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304424 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004425 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05304426 snd_soc_update_bits(dai->codec,
4427 TABLA_A_CDC_CLK_TX_I2S_CTL,
4428 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004429 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05304430 snd_soc_update_bits(dai->codec,
4431 TABLA_A_CDC_CLK_RX_I2S_CTL,
4432 TABLA_I2S_MASTER_MODE_MASK, 0);
4433 }
4434 break;
4435 case SND_SOC_DAIFMT_CBM_CFM:
4436 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304437 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304438 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004439 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05304440 snd_soc_update_bits(dai->codec,
4441 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004442 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05304443 snd_soc_update_bits(dai->codec,
4444 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
4445 }
4446 break;
4447 default:
4448 return -EINVAL;
4449 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004450 return 0;
4451}
4452
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004453static int tabla_set_channel_map(struct snd_soc_dai *dai,
4454 unsigned int tx_num, unsigned int *tx_slot,
4455 unsigned int rx_num, unsigned int *rx_slot)
4456
4457{
4458 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07004459 struct wcd9xxx *core = dev_get_drvdata(dai->codec->dev->parent);
4460
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004461 if (!tx_slot && !rx_slot) {
4462 pr_err("%s: Invalid\n", __func__);
4463 return -EINVAL;
4464 }
Kuirong Wang906ac472012-07-09 12:54:44 -07004465 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n"
4466 "tabla->intf_type %d\n",
4467 __func__, dai->name, dai->id, tx_num, rx_num,
4468 tabla->intf_type);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004469
Kuirong Wang906ac472012-07-09 12:54:44 -07004470 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
4471 wcd9xxx_init_slimslave(core, core->slim->laddr,
4472 tx_num, tx_slot, rx_num, rx_slot);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004473 return 0;
4474}
4475
4476static int tabla_get_channel_map(struct snd_soc_dai *dai,
4477 unsigned int *tx_num, unsigned int *tx_slot,
4478 unsigned int *rx_num, unsigned int *rx_slot)
4479
4480{
Kuirong Wang906ac472012-07-09 12:54:44 -07004481 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(dai->codec);
4482 u32 i = 0;
4483 struct wcd9xxx_ch *ch;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004484
Kuirong Wang906ac472012-07-09 12:54:44 -07004485 switch (dai->id) {
4486 case AIF1_PB:
4487 case AIF2_PB:
4488 case AIF3_PB:
4489 if (!rx_slot || !rx_num) {
4490 pr_err("%s: Invalid rx_slot %d or rx_num %d\n",
4491 __func__, (u32) rx_slot, (u32) rx_num);
4492 return -EINVAL;
4493 }
4494 list_for_each_entry(ch, &tabla_p->dai[dai->id].wcd9xxx_ch_list,
4495 list) {
4496 rx_slot[i++] = ch->ch_num;
4497 }
4498 *rx_num = i;
4499 break;
4500 case AIF1_CAP:
4501 case AIF2_CAP:
4502 case AIF3_CAP:
4503 if (!tx_slot || !tx_num) {
4504 pr_err("%s: Invalid tx_slot %d or tx_num %d\n",
4505 __func__, (u32) tx_slot, (u32) tx_num);
4506 return -EINVAL;
4507 }
4508 list_for_each_entry(ch, &tabla_p->dai[dai->id].wcd9xxx_ch_list,
4509 list) {
4510 tx_slot[i++] = ch->ch_num;
4511 }
4512 *tx_num = i;
4513 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004514
Kuirong Wang906ac472012-07-09 12:54:44 -07004515 default:
4516 pr_err("%s: Invalid DAI ID %x\n", __func__, dai->id);
4517 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004518 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004519 return 0;
4520}
4521
Kiran Kandi93923902012-06-20 17:00:25 -07004522
Kiran Kandi93923902012-06-20 17:00:25 -07004523static int tabla_set_interpolator_rate(struct snd_soc_dai *dai,
Kuirong Wang906ac472012-07-09 12:54:44 -07004524 u8 rx_fs_rate_reg_val,
4525 u32 compander_fs,
4526 u32 sample_rate)
Kiran Kandi93923902012-06-20 17:00:25 -07004527{
Kuirong Wang906ac472012-07-09 12:54:44 -07004528 u32 j;
Kiran Kandi93923902012-06-20 17:00:25 -07004529 u8 rx_mix1_inp;
4530 u16 rx_mix_1_reg_1, rx_mix_1_reg_2;
4531 u16 rx_fs_reg;
4532 u8 rx_mix_1_reg_1_val, rx_mix_1_reg_2_val;
4533 struct snd_soc_codec *codec = dai->codec;
Kuirong Wang906ac472012-07-09 12:54:44 -07004534 struct wcd9xxx_ch *ch;
Kiran Kandi93923902012-06-20 17:00:25 -07004535 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004536
Kuirong Wang906ac472012-07-09 12:54:44 -07004537 list_for_each_entry(ch, &tabla->dai[dai->id].wcd9xxx_ch_list, list) {
Kiran Kandi93923902012-06-20 17:00:25 -07004538
Kuirong Wang906ac472012-07-09 12:54:44 -07004539 rx_mix1_inp = ch->port - RX_MIX1_INP_SEL_RX1;
Kiran Kandi93923902012-06-20 17:00:25 -07004540
Kuirong Wang906ac472012-07-09 12:54:44 -07004541 if ((rx_mix1_inp < RX_MIX1_INP_SEL_RX1) ||
4542 (rx_mix1_inp > RX_MIX1_INP_SEL_RX7)) {
4543 pr_err("%s: Invalid TABLA_RX%u port. Dai ID is %d\n",
4544 __func__, rx_mix1_inp - 5 , dai->id);
Kiran Kandi93923902012-06-20 17:00:25 -07004545 return -EINVAL;
4546 }
4547
4548 rx_mix_1_reg_1 = TABLA_A_CDC_CONN_RX1_B1_CTL;
4549
4550 for (j = 0; j < NUM_INTERPOLATORS; j++) {
Kiran Kandi93923902012-06-20 17:00:25 -07004551 rx_mix_1_reg_2 = rx_mix_1_reg_1 + 1;
4552
4553 rx_mix_1_reg_1_val = snd_soc_read(codec,
Kuirong Wang906ac472012-07-09 12:54:44 -07004554 rx_mix_1_reg_1);
Kiran Kandi93923902012-06-20 17:00:25 -07004555 rx_mix_1_reg_2_val = snd_soc_read(codec,
Kuirong Wang906ac472012-07-09 12:54:44 -07004556 rx_mix_1_reg_2);
Kiran Kandi93923902012-06-20 17:00:25 -07004557
4558 if (((rx_mix_1_reg_1_val & 0x0F) == rx_mix1_inp) ||
Kuirong Wang906ac472012-07-09 12:54:44 -07004559 (((rx_mix_1_reg_1_val >> 4) & 0x0F) == rx_mix1_inp) ||
4560 ((rx_mix_1_reg_2_val & 0x0F) == rx_mix1_inp)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004561
4562 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL + 8 * j;
4563
Kuirong Wang906ac472012-07-09 12:54:44 -07004564 pr_debug("%s: AIF_PB DAI(%d) connected to RX%u\n",
4565 __func__, dai->id, j + 1);
Kiran Kandi93923902012-06-20 17:00:25 -07004566
4567 pr_debug("%s: set RX%u sample rate to %u\n",
4568 __func__, j + 1, sample_rate);
4569
4570 snd_soc_update_bits(codec, rx_fs_reg,
Kuirong Wang906ac472012-07-09 12:54:44 -07004571 0xE0, rx_fs_rate_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004572
4573 if (comp_rx_path[j] < COMPANDER_MAX)
4574 tabla->comp_fs[comp_rx_path[j]]
4575 = compander_fs;
4576 }
4577 if (j <= 2)
4578 rx_mix_1_reg_1 += 3;
4579 else
4580 rx_mix_1_reg_1 += 2;
4581 }
4582 }
4583 return 0;
4584}
4585
4586static int tabla_set_decimator_rate(struct snd_soc_dai *dai,
Kuirong Wang906ac472012-07-09 12:54:44 -07004587 u8 tx_fs_rate_reg_val,
4588 u32 sample_rate)
Kiran Kandi93923902012-06-20 17:00:25 -07004589{
4590 struct snd_soc_codec *codec = dai->codec;
Kuirong Wang906ac472012-07-09 12:54:44 -07004591 struct wcd9xxx_ch *ch;
4592 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4593 u32 tx_port;
Kiran Kandi93923902012-06-20 17:00:25 -07004594 u16 tx_port_reg, tx_fs_reg;
4595 u8 tx_port_reg_val;
4596 s8 decimator;
4597
Kuirong Wang906ac472012-07-09 12:54:44 -07004598 list_for_each_entry(ch, &tabla->dai[dai->id].wcd9xxx_ch_list, list) {
Kiran Kandi93923902012-06-20 17:00:25 -07004599
Kuirong Wang906ac472012-07-09 12:54:44 -07004600 tx_port = ch->port + 1;
4601 pr_debug("%s: dai->id = %d, tx_port = %d",
4602 __func__, dai->id, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004603
4604 if ((tx_port < 1) || (tx_port > NUM_DECIMATORS)) {
Kuirong Wang906ac472012-07-09 12:54:44 -07004605 pr_err("%s: Invalid SLIM TX%u port. DAI ID is %d\n",
4606 __func__, tx_port, dai->id);
Kiran Kandi93923902012-06-20 17:00:25 -07004607 return -EINVAL;
4608 }
4609
4610 tx_port_reg = TABLA_A_CDC_CONN_TX_SB_B1_CTL + (tx_port - 1);
4611 tx_port_reg_val = snd_soc_read(codec, tx_port_reg);
4612
4613 decimator = 0;
4614
4615 if ((tx_port >= 1) && (tx_port <= 6)) {
4616
4617 tx_port_reg_val = tx_port_reg_val & 0x0F;
4618 if (tx_port_reg_val == 0x8)
4619 decimator = tx_port;
4620
4621 } else if ((tx_port >= 7) && (tx_port <= NUM_DECIMATORS)) {
4622
4623 tx_port_reg_val = tx_port_reg_val & 0x1F;
4624
4625 if ((tx_port_reg_val >= 0x8) &&
4626 (tx_port_reg_val <= 0x11)) {
4627
4628 decimator = (tx_port_reg_val - 0x8) + 1;
4629 }
4630 }
4631
4632 if (decimator) { /* SLIM_TX port has a DEC as input */
4633
4634 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL +
Kuirong Wang906ac472012-07-09 12:54:44 -07004635 8 * (decimator - 1);
Kiran Kandi93923902012-06-20 17:00:25 -07004636
4637 pr_debug("%s: set DEC%u (-> SLIM_TX%u) rate to %u\n",
4638 __func__, decimator, tx_port, sample_rate);
4639
4640 snd_soc_update_bits(codec, tx_fs_reg, 0x07,
Kuirong Wang906ac472012-07-09 12:54:44 -07004641 tx_fs_rate_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004642
4643 } else {
4644 if ((tx_port_reg_val >= 0x1) &&
Kuirong Wang906ac472012-07-09 12:54:44 -07004645 (tx_port_reg_val <= 0x7)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004646
4647 pr_debug("%s: RMIX%u going to SLIM TX%u\n",
4648 __func__, tx_port_reg_val, tx_port);
4649
4650 } else if ((tx_port_reg_val >= 0x8) &&
Kuirong Wang906ac472012-07-09 12:54:44 -07004651 (tx_port_reg_val <= 0x11)) {
Kiran Kandi93923902012-06-20 17:00:25 -07004652
4653 pr_err("%s: ERROR: Should not be here\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004654 __func__);
4655 pr_err("%s: ERROR: DEC connected to SLIM TX%u\n",
4656 __func__, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004657 return -EINVAL;
4658
4659 } else if (tx_port_reg_val == 0) {
4660 pr_debug("%s: no signal to SLIM TX%u\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07004661 __func__, tx_port);
Kiran Kandi93923902012-06-20 17:00:25 -07004662 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004663 pr_err("%s: ERROR: wrong signal to SLIM TX%u\n",
4664 __func__, tx_port);
4665 pr_err("%s: ERROR: wrong signal = %u\n",
4666 __func__, tx_port_reg_val);
Kiran Kandi93923902012-06-20 17:00:25 -07004667 return -EINVAL;
4668 }
4669 }
4670 }
4671 return 0;
4672}
4673
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004674static int tabla_hw_params(struct snd_pcm_substream *substream,
Kuirong Wang906ac472012-07-09 12:54:44 -07004675 struct snd_pcm_hw_params *params,
4676 struct snd_soc_dai *dai)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004677{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004678 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05304679 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004680 u8 tx_fs_rate_reg_val, rx_fs_rate_reg_val;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004681 u32 compander_fs;
Kiran Kandi93923902012-06-20 17:00:25 -07004682 int ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004683
Kiran Kandia9fffe92012-05-20 23:42:30 -07004684 pr_debug("%s: dai_name = %s DAI-ID %x rate %d num_ch %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004685 dai->name, dai->id, params_rate(params),
4686 params_channels(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004687
4688 switch (params_rate(params)) {
4689 case 8000:
Kiran Kandi93923902012-06-20 17:00:25 -07004690 tx_fs_rate_reg_val = 0x00;
4691 rx_fs_rate_reg_val = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004692 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004693 break;
4694 case 16000:
Kiran Kandi93923902012-06-20 17:00:25 -07004695 tx_fs_rate_reg_val = 0x01;
4696 rx_fs_rate_reg_val = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004697 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004698 break;
4699 case 32000:
Kiran Kandi93923902012-06-20 17:00:25 -07004700 tx_fs_rate_reg_val = 0x02;
4701 rx_fs_rate_reg_val = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004702 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004703 break;
4704 case 48000:
Kiran Kandi93923902012-06-20 17:00:25 -07004705 tx_fs_rate_reg_val = 0x03;
4706 rx_fs_rate_reg_val = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004707 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004708 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004709 case 96000:
Kiran Kandi93923902012-06-20 17:00:25 -07004710 tx_fs_rate_reg_val = 0x04;
4711 rx_fs_rate_reg_val = 0x80;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004712 compander_fs = COMPANDER_FS_96KHZ;
4713 break;
4714 case 192000:
Kiran Kandi93923902012-06-20 17:00:25 -07004715 tx_fs_rate_reg_val = 0x05;
4716 rx_fs_rate_reg_val = 0xA0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004717 compander_fs = COMPANDER_FS_192KHZ;
4718 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004719 default:
4720 pr_err("%s: Invalid sampling rate %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004721 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004722 return -EINVAL;
4723 }
4724
Kiran Kandi93923902012-06-20 17:00:25 -07004725 switch (substream->stream) {
4726 case SNDRV_PCM_STREAM_CAPTURE:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004727
Kiran Kandi93923902012-06-20 17:00:25 -07004728 ret = tabla_set_decimator_rate(dai, tx_fs_rate_reg_val,
Kuirong Wang906ac472012-07-09 12:54:44 -07004729 params_rate(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004730 if (ret < 0) {
4731 pr_err("%s: set decimator rate failed %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004732 ret);
Kiran Kandi93923902012-06-20 17:00:25 -07004733 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004734 }
Kiran Kandi93923902012-06-20 17:00:25 -07004735
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304736 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304737 switch (params_format(params)) {
4738 case SNDRV_PCM_FORMAT_S16_LE:
4739 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004740 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304741 break;
4742 case SNDRV_PCM_FORMAT_S32_LE:
4743 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004744 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304745 break;
4746 default:
Kuirong Wang906ac472012-07-09 12:54:44 -07004747 pr_err("%s: Invalid format %d\n", __func__,
4748 params_format(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004749 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304750 }
4751 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kuirong Wang906ac472012-07-09 12:54:44 -07004752 0x07, tx_fs_rate_reg_val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004753 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004754 switch (params_format(params)) {
4755 case SNDRV_PCM_FORMAT_S16_LE:
4756 tabla->dai[dai->id].bit_width = 16;
4757 break;
4758 default:
4759 pr_err("%s: Invalid TX format %d\n", __func__,
4760 params_format(params));
4761 return -EINVAL;
4762 }
4763 tabla->dai[dai->id].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304764 }
Kiran Kandi93923902012-06-20 17:00:25 -07004765 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004766
Kiran Kandi93923902012-06-20 17:00:25 -07004767 case SNDRV_PCM_STREAM_PLAYBACK:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004768
Kiran Kandi93923902012-06-20 17:00:25 -07004769 ret = tabla_set_interpolator_rate(dai, rx_fs_rate_reg_val,
Kuirong Wang906ac472012-07-09 12:54:44 -07004770 compander_fs,
4771 params_rate(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004772 if (ret < 0) {
4773 pr_err("%s: set decimator rate failed %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004774 ret);
Kiran Kandi93923902012-06-20 17:00:25 -07004775 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004776 }
Kiran Kandi93923902012-06-20 17:00:25 -07004777
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304778 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304779 switch (params_format(params)) {
4780 case SNDRV_PCM_FORMAT_S16_LE:
4781 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004782 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304783 break;
4784 case SNDRV_PCM_FORMAT_S32_LE:
4785 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004786 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304787 break;
4788 default:
Kuirong Wang906ac472012-07-09 12:54:44 -07004789 pr_err("%s: Invalid RX format %d\n", __func__,
4790 params_format(params));
Kiran Kandi93923902012-06-20 17:00:25 -07004791 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304792 }
4793 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004794 0x03, (rx_fs_rate_reg_val >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004795 } else {
Kuirong Wang906ac472012-07-09 12:54:44 -07004796 switch (params_format(params)) {
4797 case SNDRV_PCM_FORMAT_S16_LE:
4798 tabla->dai[dai->id].bit_width = 16;
4799 break;
4800 default:
4801 pr_err("%s: Invalid format %d\n", __func__,
4802 params_format(params));
4803 return -EINVAL;
4804 }
4805 tabla->dai[dai->id].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304806 }
Kiran Kandi93923902012-06-20 17:00:25 -07004807 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004808
Kiran Kandi93923902012-06-20 17:00:25 -07004809 default:
4810 pr_err("%s: Invalid stream type %d\n", __func__,
Kuirong Wang906ac472012-07-09 12:54:44 -07004811 substream->stream);
Kiran Kandi93923902012-06-20 17:00:25 -07004812 return -EINVAL;
4813 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004814 return 0;
4815}
4816
4817static struct snd_soc_dai_ops tabla_dai_ops = {
4818 .startup = tabla_startup,
Swaminathan Sathappanf95ece62012-08-23 16:01:50 -07004819 .shutdown = tabla_shutdown,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004820 .hw_params = tabla_hw_params,
4821 .set_sysclk = tabla_set_dai_sysclk,
4822 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004823 .set_channel_map = tabla_set_channel_map,
4824 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004825};
4826
4827static struct snd_soc_dai_driver tabla_dai[] = {
4828 {
4829 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004830 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004831 .playback = {
4832 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004833 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004834 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004835 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004836 .rate_min = 8000,
4837 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004838 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004839 },
4840 .ops = &tabla_dai_ops,
4841 },
4842 {
4843 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004844 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004845 .capture = {
4846 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004847 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004848 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004849 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004850 .rate_min = 8000,
4851 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004852 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004853 },
4854 .ops = &tabla_dai_ops,
4855 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004856 {
4857 .name = "tabla_rx2",
4858 .id = AIF2_PB,
4859 .playback = {
4860 .stream_name = "AIF2 Playback",
4861 .rates = WCD9310_RATES,
4862 .formats = TABLA_FORMATS,
4863 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004864 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004865 .channels_min = 1,
4866 .channels_max = 2,
4867 },
4868 .ops = &tabla_dai_ops,
4869 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004870 {
4871 .name = "tabla_tx2",
4872 .id = AIF2_CAP,
4873 .capture = {
4874 .stream_name = "AIF2 Capture",
4875 .rates = WCD9310_RATES,
4876 .formats = TABLA_FORMATS,
4877 .rate_max = 192000,
4878 .rate_min = 8000,
4879 .channels_min = 1,
4880 .channels_max = 4,
4881 },
4882 .ops = &tabla_dai_ops,
4883 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07004884 {
4885 .name = "tabla_tx3",
4886 .id = AIF3_CAP,
4887 .capture = {
4888 .stream_name = "AIF3 Capture",
4889 .rates = WCD9310_RATES,
4890 .formats = TABLA_FORMATS,
4891 .rate_max = 48000,
4892 .rate_min = 8000,
4893 .channels_min = 1,
4894 .channels_max = 2,
4895 },
4896 .ops = &tabla_dai_ops,
4897 },
Kiran Kandia9fffe92012-05-20 23:42:30 -07004898 {
4899 .name = "tabla_rx3",
4900 .id = AIF3_PB,
4901 .playback = {
4902 .stream_name = "AIF3 Playback",
4903 .rates = WCD9310_RATES,
4904 .formats = TABLA_FORMATS,
4905 .rate_min = 8000,
4906 .rate_max = 192000,
4907 .channels_min = 1,
4908 .channels_max = 2,
4909 },
4910 .ops = &tabla_dai_ops,
4911 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004912};
Santosh Mardie15e2302011-11-15 10:39:23 +05304913
4914static struct snd_soc_dai_driver tabla_i2s_dai[] = {
4915 {
4916 .name = "tabla_i2s_rx1",
Kuirong Wang906ac472012-07-09 12:54:44 -07004917 .id = AIF1_PB,
Santosh Mardie15e2302011-11-15 10:39:23 +05304918 .playback = {
4919 .stream_name = "AIF1 Playback",
4920 .rates = WCD9310_RATES,
4921 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004922 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304923 .rate_min = 8000,
4924 .channels_min = 1,
4925 .channels_max = 4,
4926 },
4927 .ops = &tabla_dai_ops,
4928 },
4929 {
4930 .name = "tabla_i2s_tx1",
Kuirong Wang906ac472012-07-09 12:54:44 -07004931 .id = AIF1_CAP,
Santosh Mardie15e2302011-11-15 10:39:23 +05304932 .capture = {
4933 .stream_name = "AIF1 Capture",
4934 .rates = WCD9310_RATES,
4935 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004936 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304937 .rate_min = 8000,
4938 .channels_min = 1,
4939 .channels_max = 4,
4940 },
4941 .ops = &tabla_dai_ops,
4942 },
4943};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004944
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004945static int tabla_codec_enable_chmask(struct tabla_priv *tabla_p,
Kuirong Wang906ac472012-07-09 12:54:44 -07004946 int event, int index)
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004947{
4948 int ret = 0;
Kuirong Wang906ac472012-07-09 12:54:44 -07004949 struct wcd9xxx_ch *ch;
4950
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004951 switch (event) {
4952 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07004953 list_for_each_entry(ch,
4954 &tabla_p->dai[index].wcd9xxx_ch_list, list) {
4955 ret = wcd9xxx_get_slave_port(ch->ch_num);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004956 if (ret < 0) {
4957 pr_err("%s: Invalid slave port ID: %d\n",
4958 __func__, ret);
4959 ret = -EINVAL;
4960 break;
4961 }
4962 tabla_p->dai[index].ch_mask |= 1 << ret;
4963 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004964 break;
4965 case SND_SOC_DAPM_POST_PMD:
4966 ret = wait_event_timeout(tabla_p->dai[index].dai_wait,
4967 (tabla_p->dai[index].ch_mask == 0),
4968 msecs_to_jiffies(SLIM_CLOSE_TIMEOUT));
4969 if (!ret) {
4970 pr_err("%s: Slim close tx/rx wait timeout\n",
4971 __func__);
4972 ret = -EINVAL;
Kuirong Wang906ac472012-07-09 12:54:44 -07004973 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004974 break;
4975 }
4976 return ret;
4977}
4978
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004979static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
Kuirong Wang906ac472012-07-09 12:54:44 -07004980 struct snd_kcontrol *kcontrol,
4981 int event)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004982{
Kuirong Wang906ac472012-07-09 12:54:44 -07004983 struct wcd9xxx *core;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004984 struct snd_soc_codec *codec = w->codec;
4985 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07004986 u32 ret = 0;
4987 struct wcd9xxx_codec_dai_data *dai;
4988
4989 core = dev_get_drvdata(codec->dev->parent);
4990
4991 pr_debug("%s: event called! codec name %s num_dai %d\n"
4992 "stream name %s event %d\n",
4993 __func__, w->codec->name, w->codec->num_dai,
4994 w->sname, event);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004995
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004996 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004997 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07004998 if (event == SND_SOC_DAPM_POST_PMD && (core != NULL) &&
4999 (core->dev != NULL) &&
5000 (core->dev->parent != NULL)) {
5001 pm_runtime_mark_last_busy(core->dev->parent);
5002 pm_runtime_put(core->dev->parent);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005003 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005004 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005005 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005006 pr_debug("%s: w->name %s w->shift %d event %d\n",
5007 __func__, w->name, w->shift, event);
5008 dai = &tabla_p->dai[w->shift];
Kiran Kandia9fffe92012-05-20 23:42:30 -07005009
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005010 switch (event) {
5011 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07005012 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMU,
5013 w->shift);
5014 ret = wcd9xxx_cfg_slim_sch_rx(core, &dai->wcd9xxx_ch_list,
5015 dai->rate, dai->bit_width,
5016 &dai->grph);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005017 break;
5018 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang906ac472012-07-09 12:54:44 -07005019 ret = wcd9xxx_close_slim_sch_rx(core,
5020 &dai->wcd9xxx_ch_list,
5021 dai->grph);
5022 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMD,
5023 w->shift);
5024 if (ret < 0) {
5025 ret = wcd9xxx_disconnect_port(core,
5026 &dai->wcd9xxx_ch_list,
5027 dai->grph);
5028 pr_info("%s: Disconnect RX port, ret = %d\n",
5029 __func__, ret);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005030 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005031 if ((core != NULL) &&
5032 (core->dev != NULL) &&
5033 (core->dev->parent != NULL)) {
5034 pm_runtime_mark_last_busy(core->dev->parent);
5035 pm_runtime_put(core->dev->parent);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005036 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005037 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005038 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005039
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005040 return ret;
5041}
5042
5043static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
Kuirong Wang906ac472012-07-09 12:54:44 -07005044 struct snd_kcontrol *kcontrol,
5045 int event)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005046{
Kuirong Wang906ac472012-07-09 12:54:44 -07005047 struct wcd9xxx *core;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005048 struct snd_soc_codec *codec = w->codec;
5049 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
Kuirong Wang906ac472012-07-09 12:54:44 -07005050 u32 ret = 0;
5051 struct wcd9xxx_codec_dai_data *dai;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005052
Kuirong Wang906ac472012-07-09 12:54:44 -07005053 core = dev_get_drvdata(codec->dev->parent);
5054
5055 pr_debug("%s: event called! codec name %s num_dai %d\n"
5056 "stream name %s\n", __func__, w->codec->name,
5057 w->codec->num_dai, w->sname);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005058
5059 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005060 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
Kuirong Wang906ac472012-07-09 12:54:44 -07005061 if (event == SND_SOC_DAPM_POST_PMD && (core != NULL) &&
5062 (core->dev != NULL) &&
5063 (core->dev->parent != NULL)) {
5064 pm_runtime_mark_last_busy(core->dev->parent);
5065 pm_runtime_put(core->dev->parent);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005066 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005067 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07005068 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07005069
5070 pr_debug("%s(): %s %d\n", __func__, w->name, event);
5071
Kuirong Wang906ac472012-07-09 12:54:44 -07005072 dai = &tabla_p->dai[w->shift];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005073 switch (event) {
5074 case SND_SOC_DAPM_POST_PMU:
Kuirong Wang906ac472012-07-09 12:54:44 -07005075 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMU,
5076 w->shift);
5077 ret = wcd9xxx_cfg_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
5078 dai->rate,
5079 dai->bit_width,
5080 &dai->grph);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005081 break;
5082 case SND_SOC_DAPM_POST_PMD:
Kuirong Wang906ac472012-07-09 12:54:44 -07005083 ret = wcd9xxx_close_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
5084 dai->grph);
5085 ret = tabla_codec_enable_chmask(tabla_p, SND_SOC_DAPM_POST_PMD,
5086 w->shift);
5087 if (ret < 0) {
5088 ret = wcd9xxx_disconnect_port(core,
5089 &dai->wcd9xxx_ch_list,
5090 dai->grph);
5091 pr_info("%s: Disconnect TX port, ret = %d\n",
5092 __func__, ret);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005093 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005094 if ((core != NULL) &&
5095 (core->dev != NULL) &&
5096 (core->dev->parent != NULL)) {
5097 pm_runtime_mark_last_busy(core->dev->parent);
5098 pm_runtime_put(core->dev->parent);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005099 }
Kuirong Wang906ac472012-07-09 12:54:44 -07005100 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005101 }
5102 return ret;
5103}
5104
5105/* Todo: Have seperate dapm widgets for I2S and Slimbus.
5106 * Might Need to have callbacks registered only for slimbus
5107 */
5108static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
5109 /*RX stuff */
5110 SND_SOC_DAPM_OUTPUT("EAR"),
5111
Damir Didjusto7c85d712012-08-16 21:22:29 -07005112 SND_SOC_DAPM_PGA_E("EAR PA", SND_SOC_NOPM, 0, 0, NULL,
5113 0, tabla_ear_pa_event, SND_SOC_DAPM_PRE_PMU |
5114 SND_SOC_DAPM_PRE_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005115
Damir Didjusto7c85d712012-08-16 21:22:29 -07005116 SND_SOC_DAPM_MIXER("DAC1", SND_SOC_NOPM, 0, 0, dac1_switch,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005117 ARRAY_SIZE(dac1_switch)),
5118
Kuirong Wang906ac472012-07-09 12:54:44 -07005119 SND_SOC_DAPM_AIF_IN_E("AIF1 PB", "AIF1 Playback", 0, SND_SOC_NOPM,
5120 AIF1_PB, 0, tabla_codec_enable_slimrx,
5121 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5122 SND_SOC_DAPM_AIF_IN_E("AIF2 PB", "AIF2 Playback", 0, SND_SOC_NOPM,
5123 AIF2_PB, 0, tabla_codec_enable_slimrx,
5124 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5125 SND_SOC_DAPM_AIF_IN_E("AIF3 PB", "AIF3 Playback", 0, SND_SOC_NOPM,
5126 AIF3_PB, 0, tabla_codec_enable_slimrx,
5127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5128
5129 SND_SOC_DAPM_MUX("SLIM RX1 MUX", SND_SOC_NOPM, TABLA_RX1, 0,
5130 &slim_rx_mux[TABLA_RX1]),
5131 SND_SOC_DAPM_MUX("SLIM RX2 MUX", SND_SOC_NOPM, TABLA_RX2, 0,
5132 &slim_rx_mux[TABLA_RX2]),
5133 SND_SOC_DAPM_MUX("SLIM RX3 MUX", SND_SOC_NOPM, TABLA_RX3, 0,
5134 &slim_rx_mux[TABLA_RX3]),
5135 SND_SOC_DAPM_MUX("SLIM RX4 MUX", SND_SOC_NOPM, TABLA_RX4, 0,
5136 &slim_rx_mux[TABLA_RX4]),
5137 SND_SOC_DAPM_MUX("SLIM RX5 MUX", SND_SOC_NOPM, TABLA_RX5, 0,
5138 &slim_rx_mux[TABLA_RX5]),
5139 SND_SOC_DAPM_MUX("SLIM RX6 MUX", SND_SOC_NOPM, TABLA_RX6, 0,
5140 &slim_rx_mux[TABLA_RX6]),
5141 SND_SOC_DAPM_MUX("SLIM RX7 MUX", SND_SOC_NOPM, TABLA_RX7, 0,
5142 &slim_rx_mux[TABLA_RX7]),
5143
5144 SND_SOC_DAPM_MIXER("SLIM RX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5145 SND_SOC_DAPM_MIXER("SLIM RX2", SND_SOC_NOPM, 0, 0, NULL, 0),
5146 SND_SOC_DAPM_MIXER("SLIM RX3", SND_SOC_NOPM, 0, 0, NULL, 0),
5147 SND_SOC_DAPM_MIXER("SLIM RX4", SND_SOC_NOPM, 0, 0, NULL, 0),
5148 SND_SOC_DAPM_MIXER("SLIM RX5", SND_SOC_NOPM, 0, 0, NULL, 0),
5149 SND_SOC_DAPM_MIXER("SLIM RX6", SND_SOC_NOPM, 0, 0, NULL, 0),
5150 SND_SOC_DAPM_MIXER("SLIM RX7", SND_SOC_NOPM, 0, 0, NULL, 0),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005151 /* Headphone */
5152 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
5153 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
5154 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
5155 SND_SOC_DAPM_POST_PMD),
5156 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
5157 hphl_switch, ARRAY_SIZE(hphl_switch)),
5158
5159 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
5160 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
5161 SND_SOC_DAPM_POST_PMD),
5162
5163 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
5164 tabla_hphr_dac_event,
5165 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5166
5167 /* Speaker */
5168 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
5169 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
5170 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
5171 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
5172 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
5173
5174 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
5175 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5176 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5177 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
5178 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5179 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5180 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
5181 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5182 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5183 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
5184 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5185 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5186 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
5187 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
5188 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5189
5190 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
5191 , tabla_lineout_dac_event,
5192 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5193 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
5194 , tabla_lineout_dac_event,
5195 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5196 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
5197 , tabla_lineout_dac_event,
5198 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5199 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
5200 &lineout3_ground_switch),
5201 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
5202 , tabla_lineout_dac_event,
5203 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5204 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
5205 &lineout4_ground_switch),
5206 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
5207 , tabla_lineout_dac_event,
5208 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
5209
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005210 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005211 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5212 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005213 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005214 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5215 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005216 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005217 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5218 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005219 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005220 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5221 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005222 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005223 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5224 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005225 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005226 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5227 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005228 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07005229 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
5230 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005231
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005232 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5233 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5234 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
5235
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005236 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
5237 &rx4_dsm_mux, tabla_codec_reset_interpolator,
5238 SND_SOC_DAPM_PRE_PMU),
5239
5240 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
5241 &rx6_dsm_mux, tabla_codec_reset_interpolator,
5242 SND_SOC_DAPM_PRE_PMU),
5243
5244 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
5245 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
5246
5247 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5248 &rx_mix1_inp1_mux),
5249 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5250 &rx_mix1_inp2_mux),
Kiran Kandia9fffe92012-05-20 23:42:30 -07005251 SND_SOC_DAPM_MUX("RX1 MIX1 INP3", SND_SOC_NOPM, 0, 0,
5252 &rx_mix1_inp3_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005253 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5254 &rx2_mix1_inp1_mux),
5255 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5256 &rx2_mix1_inp2_mux),
5257 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5258 &rx3_mix1_inp1_mux),
5259 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5260 &rx3_mix1_inp2_mux),
5261 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5262 &rx4_mix1_inp1_mux),
5263 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5264 &rx4_mix1_inp2_mux),
5265 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5266 &rx5_mix1_inp1_mux),
5267 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5268 &rx5_mix1_inp2_mux),
5269 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5270 &rx6_mix1_inp1_mux),
5271 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5272 &rx6_mix1_inp2_mux),
5273 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
5274 &rx7_mix1_inp1_mux),
5275 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
5276 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08005277 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5278 &rx1_mix2_inp1_mux),
5279 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5280 &rx1_mix2_inp2_mux),
5281 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5282 &rx2_mix2_inp1_mux),
5283 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5284 &rx2_mix2_inp2_mux),
5285 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
5286 &rx3_mix2_inp1_mux),
5287 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
5288 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005289
5290 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
5291 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
5292 SND_SOC_DAPM_PRE_PMD),
5293
5294 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
5295 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
5296 SND_SOC_DAPM_POST_PMD),
5297
5298 /* TX */
5299
5300 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
5301 0),
5302
5303 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
5304 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
5305
Kuirong Wang0f8ade32012-02-27 16:29:45 -08005306 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
5307 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
5308 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
5309 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
5310 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
5311 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
5312
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005313 SND_SOC_DAPM_INPUT("AMIC1"),
5314 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
5315 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5316 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5317 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
5318 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5319 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5320 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
5321 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5322 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5323 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
5324 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5325 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5326
5327 SND_SOC_DAPM_INPUT("AMIC3"),
5328 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
5329 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5330 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5331
5332 SND_SOC_DAPM_INPUT("AMIC4"),
5333 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
5334 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5335 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5336
5337 SND_SOC_DAPM_INPUT("AMIC5"),
5338 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
5339 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
5340
5341 SND_SOC_DAPM_INPUT("AMIC6"),
5342 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
5343 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
5344
5345 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005346 &dec1_mux, tabla_codec_enable_dec,
5347 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5348 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005349
5350 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005351 &dec2_mux, tabla_codec_enable_dec,
5352 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5353 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005354
5355 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005356 &dec3_mux, tabla_codec_enable_dec,
5357 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5358 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005359
5360 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005361 &dec4_mux, tabla_codec_enable_dec,
5362 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5363 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005364
5365 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005366 &dec5_mux, tabla_codec_enable_dec,
5367 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5368 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005369
5370 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005371 &dec6_mux, tabla_codec_enable_dec,
5372 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5373 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005374
5375 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005376 &dec7_mux, tabla_codec_enable_dec,
5377 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5378 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005379
5380 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005381 &dec8_mux, tabla_codec_enable_dec,
5382 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5383 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005384
5385 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005386 &dec9_mux, tabla_codec_enable_dec,
5387 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5388 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005389
5390 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08005391 &dec10_mux, tabla_codec_enable_dec,
5392 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
5393 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005394
5395 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
5396 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
5397
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08005398 SND_SOC_DAPM_OUTPUT("ANC HEADPHONE"),
5399 SND_SOC_DAPM_PGA_E("ANC HPHL", SND_SOC_NOPM, 0, 0, NULL, 0,
5400 tabla_codec_enable_anc,
5401 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
5402 SND_SOC_DAPM_PGA_E("ANC HPHR", SND_SOC_NOPM, 0, 0, NULL, 0,
5403 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU),
5404
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005405
5406 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
5407
5408 SND_SOC_DAPM_INPUT("AMIC2"),
5409 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
5410 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5411 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5412 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
5413 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5414 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5415 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
5416 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5417 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5418 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
5419 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5420 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5421 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
5422 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5423 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5424 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
5425 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5426 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5427 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
5428 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
5429 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5430 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
5431 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
5432 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5433
Kuirong Wang906ac472012-07-09 12:54:44 -07005434 SND_SOC_DAPM_AIF_OUT_E("AIF1 CAP", "AIF1 Capture", 0, SND_SOC_NOPM,
5435 AIF1_CAP, 0, tabla_codec_enable_slimtx,
5436 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5437
5438 SND_SOC_DAPM_AIF_OUT_E("AIF2 CAP", "AIF2 Capture", 0, SND_SOC_NOPM,
5439 AIF2_CAP, 0, tabla_codec_enable_slimtx,
5440 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5441
5442 SND_SOC_DAPM_AIF_OUT_E("AIF3 CAP", "AIF3 Capture", 0, SND_SOC_NOPM,
5443 AIF3_CAP, 0, tabla_codec_enable_slimtx,
5444 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
5445
5446 SND_SOC_DAPM_MIXER("AIF1_CAP Mixer", SND_SOC_NOPM, AIF1_CAP, 0,
5447 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5448
5449 SND_SOC_DAPM_MIXER("AIF2_CAP Mixer", SND_SOC_NOPM, AIF2_CAP, 0,
5450 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5451
5452 SND_SOC_DAPM_MIXER("AIF3_CAP Mixer", SND_SOC_NOPM, AIF3_CAP, 0,
5453 aif_cap_mixer, ARRAY_SIZE(aif_cap_mixer)),
5454
5455 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, TABLA_TX1, 0,
5456 &sb_tx1_mux),
5457 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, TABLA_TX2, 0,
5458 &sb_tx2_mux),
5459 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, TABLA_TX3, 0,
5460 &sb_tx3_mux),
5461 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, TABLA_TX4, 0,
5462 &sb_tx4_mux),
5463 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, TABLA_TX5, 0,
5464 &sb_tx5_mux),
5465 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, TABLA_TX6, 0,
5466 &sb_tx6_mux),
5467 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, TABLA_TX7, 0,
5468 &sb_tx7_mux),
5469 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, TABLA_TX8, 0,
5470 &sb_tx8_mux),
5471 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, TABLA_TX9, 0,
5472 &sb_tx9_mux),
5473 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, TABLA_TX10, 0,
5474 &sb_tx10_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005475
5476 /* Digital Mic Inputs */
5477 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
5478 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5479 SND_SOC_DAPM_POST_PMD),
5480
5481 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
5482 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5483 SND_SOC_DAPM_POST_PMD),
5484
5485 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
5486 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5487 SND_SOC_DAPM_POST_PMD),
5488
5489 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
5490 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5491 SND_SOC_DAPM_POST_PMD),
5492
5493 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
5494 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5495 SND_SOC_DAPM_POST_PMD),
5496 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
5497 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
5498 SND_SOC_DAPM_POST_PMD),
5499
5500 /* Sidetone */
5501 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
5502 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08005503
5504 /* AUX PGA */
5505 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
5506 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5507 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5508 SND_SOC_DAPM_POST_PMD),
5509
5510 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
5511 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
5512 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
5513 SND_SOC_DAPM_POST_PMD),
5514
5515 /* Lineout, ear and HPH PA Mixers */
5516 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
5517 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
5518
5519 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5520 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
5521
5522 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
5523 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
5524
5525 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
5526 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
5527
5528 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
5529 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
5530
5531 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
5532 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
5533
5534 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
5535 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
5536
5537 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5538 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005539};
5540
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005541static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005542{
5543 u8 bias_msb, bias_lsb;
5544 short bias_value;
5545
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005546 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
5547 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
5548 bias_value = (bias_msb << 8) | bias_lsb;
5549 return bias_value;
5550}
5551
5552static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
5553{
5554 u8 bias_msb, bias_lsb;
5555 short bias_value;
5556
5557 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
5558 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
5559 bias_value = (bias_msb << 8) | bias_lsb;
5560 return bias_value;
5561}
5562
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005563static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005564{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005565 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
5566}
5567
5568static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5569 bool override_bypass, bool noreldetection)
5570{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005571 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005572 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5573
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005574 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005575 if (noreldetection)
5576 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005577
Joonwoo Park925914c2012-01-05 13:35:18 -08005578 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005579 if (!override_bypass)
5580 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005581 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005582 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5583 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
5584 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005585 usleep_range(tabla->mbhc_data.t_sta_dce,
5586 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005587 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08005588 usleep_range(tabla->mbhc_data.t_dce,
5589 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005590 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005591 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005592 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005593 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5594 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005595 usleep_range(tabla->mbhc_data.t_sta_dce,
5596 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08005597 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5598 usleep_range(tabla->mbhc_data.t_sta,
5599 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005600 bias_value = tabla_codec_read_sta_result(codec);
5601 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5602 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005603 }
Joonwoo Park925914c2012-01-05 13:35:18 -08005604 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005605 if (!override_bypass)
5606 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5607
5608 if (noreldetection)
5609 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005610 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005611
Bradley Rubincb1e2732011-06-23 16:49:20 -07005612 return bias_value;
5613}
5614
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005615static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5616 bool norel)
5617{
5618 return __tabla_codec_sta_dce(codec, dce, false, norel);
5619}
5620
5621/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005622static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005623{
5624 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005625 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005626 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005627
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005628 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005629 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005630 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07005631 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005632 }
5633
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005634 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07005635 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005636 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005637 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005638 tabla_codec_enable_clock_block(codec, 1);
5639 }
5640
5641 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
5642
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005643 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005644 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
5645 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07005646
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005647 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005648
5649 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005650 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005651
5652 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
5653 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
5654 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
5655
5656 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005657 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5658 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005659
Joonwoo Park925914c2012-01-05 13:35:18 -08005660 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005661 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5662
Bradley Rubincb1e2732011-06-23 16:49:20 -07005663 tabla_codec_calibrate_hs_polling(codec);
5664
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005665 /* don't flip override */
5666 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005667 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5668 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005669 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005670
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005671 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005672}
5673
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005674static int tabla_cancel_btn_work(struct tabla_priv *tabla)
5675{
5676 int r = 0;
5677 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
5678
5679 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
5680 /* if scheduled mbhc_btn_dwork is canceled from here,
5681 * we have to unlock from here instead btn_work */
5682 wcd9xxx_unlock_sleep(core);
5683 r = 1;
5684 }
5685 return r;
5686}
5687
5688/* called under codec_resource_lock acquisition */
5689void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07005690{
5691 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005692 u8 wg_time;
5693
5694 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5695 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07005696
5697 /* If headphone PA is on, check if userspace receives
5698 * removal event to sync-up PA's state */
5699 if (tabla_is_hph_pa_on(codec)) {
5700 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
5701 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5702 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5703 } else {
5704 pr_debug("%s PA is off\n", __func__);
5705 }
5706
5707 if (tabla_is_hph_dac_on(codec, 1))
5708 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
5709 if (tabla_is_hph_dac_on(codec, 0))
5710 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005711
5712 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
5713 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
5714 0xC0, 0x00);
5715 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
5716 0xC0, 0x00);
5717 usleep_range(wg_time * 1000, wg_time * 1000);
5718}
5719
5720static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
5721{
5722 bool pa_turned_on = false;
5723 struct snd_soc_codec *codec = tabla->codec;
5724 u8 wg_time;
5725
5726 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5727 wg_time += 1;
5728
5729 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
5730 &tabla->hph_pa_dac_state)) {
5731 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
5732 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
5733 0xC0, 0xC0);
5734 }
5735 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
5736 &tabla->hph_pa_dac_state)) {
5737 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
5738 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
5739 0xC0, 0xC0);
5740 }
5741
5742 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
5743 &tabla->hph_pa_dac_state)) {
5744 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
5745 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
5746 1 << 4);
5747 pa_turned_on = true;
5748 }
5749 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
5750 &tabla->hph_pa_dac_state)) {
5751 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
5752 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
5753 1 << 5);
5754 pa_turned_on = true;
5755 }
5756
5757 if (pa_turned_on) {
5758 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
5759 __func__);
5760 usleep_range(wg_time * 1000, wg_time * 1000);
5761 }
5762}
5763
5764/* called under codec_resource_lock acquisition */
5765static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
5766 enum snd_jack_types jack_type)
5767{
5768 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005769 pr_debug("%s: enter insertion %d hph_status %x\n",
5770 __func__, insertion, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005771 if (!insertion) {
5772 /* Report removal */
5773 tabla->hph_status &= ~jack_type;
5774 if (tabla->mbhc_cfg.headset_jack) {
5775 /* cancel possibly scheduled btn work and
5776 * report release if we reported button press */
5777 if (tabla_cancel_btn_work(tabla)) {
5778 pr_debug("%s: button press is canceled\n",
5779 __func__);
5780 } else if (tabla->buttons_pressed) {
5781 pr_debug("%s: Reporting release for reported "
5782 "button press %d\n", __func__,
5783 jack_type);
5784 tabla_snd_soc_jack_report(tabla,
5785 tabla->mbhc_cfg.button_jack, 0,
5786 tabla->buttons_pressed);
5787 tabla->buttons_pressed &=
5788 ~TABLA_JACK_BUTTON_MASK;
5789 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005790 pr_debug("%s: Reporting removal %d(%x)\n", __func__,
5791 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005792 tabla_snd_soc_jack_report(tabla,
5793 tabla->mbhc_cfg.headset_jack,
5794 tabla->hph_status,
5795 TABLA_JACK_MASK);
5796 }
5797 tabla_set_and_turnoff_hph_padac(codec);
5798 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005799 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005800 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005801 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005802 tabla->current_plug = PLUG_TYPE_NONE;
5803 tabla->mbhc_polling_active = false;
5804 } else {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005805 if (tabla->mbhc_cfg.detect_extn_cable) {
5806 /* Report removal of current jack type */
5807 if (tabla->hph_status != jack_type &&
5808 tabla->mbhc_cfg.headset_jack) {
5809 pr_debug("%s: Reporting removal (%x)\n",
5810 __func__, tabla->hph_status);
5811 tabla_snd_soc_jack_report(tabla,
5812 tabla->mbhc_cfg.headset_jack,
5813 0, TABLA_JACK_MASK);
5814 tabla->hph_status = 0;
5815 }
5816 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005817 /* Report insertion */
5818 tabla->hph_status |= jack_type;
5819
5820 if (jack_type == SND_JACK_HEADPHONE)
5821 tabla->current_plug = PLUG_TYPE_HEADPHONE;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005822 else if (jack_type == SND_JACK_UNSUPPORTED)
5823 tabla->current_plug = PLUG_TYPE_GND_MIC_SWAP;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005824 else if (jack_type == SND_JACK_HEADSET) {
5825 tabla->mbhc_polling_active = true;
5826 tabla->current_plug = PLUG_TYPE_HEADSET;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005827 } else if (jack_type == SND_JACK_LINEOUT)
5828 tabla->current_plug = PLUG_TYPE_HIGH_HPH;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005829 if (tabla->mbhc_cfg.headset_jack) {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005830 pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
5831 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005832 tabla_snd_soc_jack_report(tabla,
5833 tabla->mbhc_cfg.headset_jack,
5834 tabla->hph_status,
5835 TABLA_JACK_MASK);
5836 }
5837 tabla_clr_and_turnon_hph_padac(tabla);
5838 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005839 pr_debug("%s: leave hph_status %x\n", __func__, tabla->hph_status);
Joonwoo Park03324832012-03-19 19:36:16 -07005840}
5841
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005842static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07005843 int insertion, int trigger,
5844 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005845{
5846 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005847 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08005848 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005849 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005850 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005851 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005852
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005853 pr_debug("%s: enter insertion(%d) trigger(0x%x)\n",
5854 __func__, insertion, trigger);
5855
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005856 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005857 pr_err("Error, no tabla calibration\n");
5858 return -EINVAL;
5859 }
5860
5861 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
5862
Joonwoo Park03324832012-03-19 19:36:16 -07005863 /* Make sure mic bias and Mic line schmitt trigger
5864 * are turned OFF
5865 */
5866 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
5867 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
5868
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005869 if (insertion) {
Bhalchandra Gajareafc86432012-08-23 13:44:07 -07005870 pr_debug("%s: setup for insertion\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005871 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005872
Joonwoo Park03324832012-03-19 19:36:16 -07005873 /* DAPM can manipulate PA/DAC bits concurrently */
5874 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005875 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005876 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005877
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005878 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005879 /* Enable HPH Schmitt Trigger */
5880 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
5881 0x11);
5882 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
5883 plug_det->hph_current << 2);
5884 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
5885 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005886 }
5887 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005888 /* enable the mic line schmitt trigger */
5889 snd_soc_update_bits(codec,
5890 tabla->mbhc_bias_regs.mbhc_reg,
5891 0x60, plug_det->mic_current << 5);
5892 snd_soc_update_bits(codec,
5893 tabla->mbhc_bias_regs.mbhc_reg,
5894 0x80, 0x80);
5895 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
5896 snd_soc_update_bits(codec,
5897 tabla->mbhc_bias_regs.ctl_reg, 0x01,
5898 0x00);
5899 snd_soc_update_bits(codec,
5900 tabla->mbhc_bias_regs.mbhc_reg,
5901 0x10, 0x10);
5902 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005903
5904 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005905 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005906 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005907 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005908 /* Make sure the HPH schmitt trigger is OFF */
5909 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
5910
5911 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07005912 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
5913 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005914 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08005915 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005916 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5917 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005918 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005919 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5920 0x10, 0x10);
5921
5922 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005923 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005924 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005925
5926 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005927 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005928 if (!(tabla->clock_active)) {
5929 tabla_codec_enable_config_mode(codec, 1);
5930 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005931 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005932 usleep_range(generic->t_shutdown_plug_rem,
5933 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005934 tabla_codec_enable_config_mode(codec, 0);
5935 } else
5936 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005937 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005938 }
5939
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005940 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005941
5942 /* If central bandgap disabled */
5943 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
5944 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005945 usleep_range(generic->t_bg_fast_settle,
5946 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005947 central_bias_enabled = 1;
5948 }
5949
5950 /* If LDO_H disabled */
5951 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
5952 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
5953 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005954 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005955 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
5956
5957 if (central_bias_enabled)
5958 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
5959 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005960
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005961 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005962 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005963
Joonwoo Parkf6574c72012-10-10 17:29:57 -07005964 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005965 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07005966 pr_debug("%s: leave\n", __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005967 return 0;
5968}
5969
Joonwoo Park0976d012011-12-22 11:48:18 -08005970static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
5971 s16 vin_mv)
5972{
Joonwoo Park0976d012011-12-22 11:48:18 -08005973 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005974 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08005975 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07005976 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005977
5978 tabla = snd_soc_codec_get_drvdata(codec);
5979 mb_mv = tabla->mbhc_data.micb_mv;
5980
5981 if (mb_mv == 0) {
5982 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
5983 return -EINVAL;
5984 }
5985
5986 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005987 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
5988 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005989 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005990 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
5991 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005992 }
5993 in = (u32) diff * vin_mv;
5994
Joonwoo Park03324832012-03-19 19:36:16 -07005995 value = (u16) (in / mb_mv) + zero;
5996 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005997}
5998
5999static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
6000 u16 bias_value)
6001{
6002 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07006003 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08006004 s32 mv;
6005
6006 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006007 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08006008 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07006009 z = (tabla->mbhc_data.dce_z);
6010 mb = (tabla->mbhc_data.dce_mb);
6011 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006012 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006013 z = (tabla->mbhc_data.sta_z);
6014 mb = (tabla->mbhc_data.sta_mb);
6015 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08006016 }
6017
6018 return mv;
6019}
6020
Joonwoo Park03324832012-03-19 19:36:16 -07006021static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006022{
6023 struct delayed_work *delayed_work;
6024 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08006025 short bias_value;
6026 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07006027 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006028
6029 pr_debug("%s:\n", __func__);
6030
6031 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07006032 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006033 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006034
6035 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006036 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006037 bias_value = tabla_codec_read_sta_result(tabla->codec);
6038 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306039 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08006040 bias_value = tabla_codec_read_dce_result(tabla->codec);
6041 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306042 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08006043 pr_debug("%s: Reporting long button press event"
6044 " STA: %d, DCE: %d\n", __func__,
6045 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006046 tabla_snd_soc_jack_report(tabla,
6047 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07006048 tabla->buttons_pressed,
6049 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006050 }
6051 } else {
6052 pr_err("%s: Bad tabla private data\n", __func__);
6053 }
6054
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006055 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006056 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006057}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006058
Joonwoo Parke067b232012-06-14 13:11:30 -07006059static u16 tabla_get_cfilt_reg(struct snd_soc_codec *codec, u8 cfilt)
6060{
6061 u16 reg;
6062
6063 switch (cfilt) {
6064 case TABLA_CFILT1_SEL:
6065 reg = TABLA_A_MICB_CFILT_1_CTL;
6066 break;
6067 case TABLA_CFILT2_SEL:
6068 reg = TABLA_A_MICB_CFILT_2_CTL;
6069 break;
6070 case TABLA_CFILT3_SEL:
6071 reg = TABLA_A_MICB_CFILT_3_CTL;
6072 break;
6073 default:
6074 BUG();
6075 }
6076 return reg;
6077}
6078
Joonwoo Park0976d012011-12-22 11:48:18 -08006079void tabla_mbhc_cal(struct snd_soc_codec *codec)
6080{
6081 struct tabla_priv *tabla;
6082 struct tabla_mbhc_btn_detect_cfg *btn_det;
Joonwoo Parke067b232012-06-14 13:11:30 -07006083 u8 cfilt_mode, micbias2_cfilt_mode, bg_mode;
Joonwoo Park0976d012011-12-22 11:48:18 -08006084 u8 ncic, nmeas, navg;
6085 u32 mclk_rate;
6086 u32 dce_wait, sta_wait;
6087 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006088 void *calibration;
Joonwoo Parke067b232012-06-14 13:11:30 -07006089 u16 bias2_ctl;
Joonwoo Park0976d012011-12-22 11:48:18 -08006090
6091 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006092 calibration = tabla->mbhc_cfg.calibration;
6093
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006094 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006095 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08006096
6097 /* First compute the DCE / STA wait times
6098 * depending on tunable parameters.
6099 * The value is computed in microseconds
6100 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006101 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006102 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08006103 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006104 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
6105 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
6106 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08006107 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
6108 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08006109
6110 tabla->mbhc_data.t_dce = dce_wait;
6111 tabla->mbhc_data.t_sta = sta_wait;
6112
6113 /* LDOH and CFILT are already configured during pdata handling.
6114 * Only need to make sure CFILT and bandgap are in Fast mode.
6115 * Need to restore defaults once calculation is done.
6116 */
6117 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
Joonwoo Parke067b232012-06-14 13:11:30 -07006118 micbias2_cfilt_mode =
6119 snd_soc_read(codec, tabla_get_cfilt_reg(codec,
6120 tabla->pdata->micbias.bias2_cfilt_sel));
6121 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
6122 TABLA_CFILT_FAST_MODE);
6123 snd_soc_update_bits(codec,
6124 tabla_get_cfilt_reg(codec,
6125 tabla->pdata->micbias.bias2_cfilt_sel),
6126 0x40, TABLA_CFILT_FAST_MODE);
6127
Joonwoo Park0976d012011-12-22 11:48:18 -08006128 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
6129 0x02);
6130
6131 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
6132 * to perform ADC calibration
6133 */
6134 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006135 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08006136 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6137 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
6138 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
6139 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
6140
Joonwoo Parke067b232012-06-14 13:11:30 -07006141 /* MICBIAS2 routing for calibration */
6142 bias2_ctl = snd_soc_read(codec, TABLA_A_MICB_2_CTL);
6143 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03, TABLA_MICBIAS2);
6144 snd_soc_write(codec, TABLA_A_MICB_2_CTL,
6145 snd_soc_read(codec, tabla->mbhc_bias_regs.ctl_reg));
6146
Joonwoo Park0976d012011-12-22 11:48:18 -08006147 /* DCE measurement for 0 volts */
6148 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6149 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6150 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08006151 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
6152 usleep_range(100, 100);
6153 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6154 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
6155 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
6156
6157 /* DCE measurment for MB voltage */
6158 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6159 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
6160 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
6161 usleep_range(100, 100);
6162 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
6163 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
6164 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
6165
6166 /* Sta measuremnt for 0 volts */
6167 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
6168 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6169 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08006170 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
6171 usleep_range(100, 100);
6172 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6173 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
6174 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
6175
6176 /* STA Measurement for MB Voltage */
6177 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
6178 usleep_range(100, 100);
6179 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
6180 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
6181 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
6182
6183 /* Restore default settings. */
Joonwoo Parke067b232012-06-14 13:11:30 -07006184 snd_soc_write(codec, TABLA_A_MICB_2_CTL, bias2_ctl);
6185 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
6186 tabla->mbhc_cfg.micbias);
6187
Joonwoo Park0976d012011-12-22 11:48:18 -08006188 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Joonwoo Parke067b232012-06-14 13:11:30 -07006189 snd_soc_update_bits(codec,
6190 tabla_get_cfilt_reg(codec,
6191 tabla->pdata->micbias.bias2_cfilt_sel), 0x40,
6192 micbias2_cfilt_mode);
Joonwoo Park0976d012011-12-22 11:48:18 -08006193 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
6194 cfilt_mode);
6195 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
6196
6197 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
6198 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006199
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006200 wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006201 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08006202}
6203
6204void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
6205 const enum tabla_mbhc_btn_det_mem mem)
6206{
6207 void *ret = &btn_det->_v_btn_low;
6208
6209 switch (mem) {
6210 case TABLA_BTN_DET_GAIN:
6211 ret += sizeof(btn_det->_n_cic);
6212 case TABLA_BTN_DET_N_CIC:
6213 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08006214 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08006215 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
6216 case TABLA_BTN_DET_V_BTN_HIGH:
6217 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
6218 case TABLA_BTN_DET_V_BTN_LOW:
6219 /* do nothing */
6220 break;
6221 default:
6222 ret = NULL;
6223 }
6224
6225 return ret;
6226}
6227
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006228static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
6229 bool tovddio)
6230{
6231 int r;
6232 int vddio_k, mb_k;
6233 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
6234 VDDIO_MICBIAS_MV);
6235 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
6236 tabla->mbhc_data.micb_mv);
6237 if (tovddio)
6238 r = v * vddio_k / mb_k;
6239 else
6240 r = v * mb_k / vddio_k;
6241 return r;
6242}
6243
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006244static void tabla_mbhc_calc_rel_thres(struct snd_soc_codec *codec, s16 mv)
6245{
6246 s16 deltamv;
6247 struct tabla_priv *tabla;
6248 struct tabla_mbhc_btn_detect_cfg *btn_det;
6249
6250 tabla = snd_soc_codec_get_drvdata(codec);
6251 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6252
6253 tabla->mbhc_data.v_b1_h =
6254 tabla_codec_v_sta_dce(codec, DCE,
6255 mv + btn_det->v_btn_press_delta_cic);
6256
6257 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
6258
6259 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
6260
6261 deltamv = mv + btn_det->v_btn_press_delta_sta;
6262 tabla->mbhc_data.v_b1_hu = tabla_codec_v_sta_dce(codec, STA, deltamv);
6263
6264 deltamv = mv + btn_det->v_btn_press_delta_cic;
6265 tabla->mbhc_data.v_b1_huc = tabla_codec_v_sta_dce(codec, DCE, deltamv);
6266}
6267
6268static void tabla_mbhc_set_rel_thres(struct snd_soc_codec *codec, s16 mv)
6269{
6270 tabla_mbhc_calc_rel_thres(codec, mv);
6271 tabla_codec_calibrate_rel(codec);
6272}
6273
6274static s16 tabla_mbhc_highest_btn_mv(struct snd_soc_codec *codec)
6275{
6276 struct tabla_priv *tabla;
6277 struct tabla_mbhc_btn_detect_cfg *btn_det;
6278 u16 *btn_high;
6279
6280 tabla = snd_soc_codec_get_drvdata(codec);
6281 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6282 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
6283
6284 return btn_high[btn_det->num_btn - 1];
6285}
6286
Joonwoo Park0976d012011-12-22 11:48:18 -08006287static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
6288{
6289 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08006290 struct tabla_mbhc_btn_detect_cfg *btn_det;
6291 struct tabla_mbhc_plug_type_cfg *plug_type;
Joonwoo Parkc0672392012-01-11 11:03:14 -08006292 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08006293
6294 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006295 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
6296 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006297
Joonwoo Parkc0672392012-01-11 11:03:14 -08006298 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006299 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07006300 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08006301 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006302 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006303 tabla->mbhc_data.npoll = 7;
6304 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08006305 }
Joonwoo Park0976d012011-12-22 11:48:18 -08006306
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006307 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
6308 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08006309 n_ready[tabla_codec_mclk_index(tabla)]) +
6310 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08006311 tabla->mbhc_data.v_ins_hu =
6312 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
6313 tabla->mbhc_data.v_ins_h =
6314 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
6315
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006316 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
6317 if (tabla->mbhc_cfg.gpio)
6318 tabla->mbhc_data.v_inval_ins_high =
6319 TABLA_MBHC_FAKE_INSERT_HIGH;
6320 else
6321 tabla->mbhc_data.v_inval_ins_high =
6322 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
6323
6324 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
6325 tabla->mbhc_data.adj_v_hs_max =
6326 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
6327 tabla->mbhc_data.adj_v_ins_hu =
6328 tabla_codec_v_sta_dce(codec, STA,
6329 tabla->mbhc_data.adj_v_hs_max);
6330 tabla->mbhc_data.adj_v_ins_h =
6331 tabla_codec_v_sta_dce(codec, DCE,
6332 tabla->mbhc_data.adj_v_hs_max);
6333 tabla->mbhc_data.v_inval_ins_low =
6334 tabla_scale_v_micb_vddio(tabla,
6335 tabla->mbhc_data.v_inval_ins_low,
6336 false);
6337 tabla->mbhc_data.v_inval_ins_high =
6338 tabla_scale_v_micb_vddio(tabla,
6339 tabla->mbhc_data.v_inval_ins_high,
6340 false);
6341 }
6342
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006343 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park0976d012011-12-22 11:48:18 -08006344
6345 tabla->mbhc_data.v_no_mic =
6346 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
6347}
6348
6349void tabla_mbhc_init(struct snd_soc_codec *codec)
6350{
6351 struct tabla_priv *tabla;
6352 struct tabla_mbhc_general_cfg *generic;
6353 struct tabla_mbhc_btn_detect_cfg *btn_det;
6354 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08006355 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306356 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08006357
6358 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006359 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
6360 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08006361
Joonwoo Park0976d012011-12-22 11:48:18 -08006362 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08006363 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08006364 snd_soc_update_bits(codec,
6365 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
6366 0x07, n);
6367 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
6368 btn_det->c[n]);
6369 }
6370 }
6371 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
6372 btn_det->nc);
6373
6374 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
6375 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08006376 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08006377
6378 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08006379 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
6380 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08006381
6382 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
6383 generic->mbhc_nsa << 4);
6384
6385 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
6386 btn_det->n_meas);
6387
6388 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
6389
6390 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
6391
6392 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
6393 btn_det->mbhc_nsc << 3);
6394
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08006395 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
6396 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08006397
6398 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07006399
6400 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Parke067b232012-06-14 13:11:30 -07006401
6402 /* override mbhc's micbias */
6403 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
6404 tabla->mbhc_cfg.micbias);
Joonwoo Park0976d012011-12-22 11:48:18 -08006405}
6406
Patrick Lai64b43262011-12-06 17:29:15 -08006407static bool tabla_mbhc_fw_validate(const struct firmware *fw)
6408{
6409 u32 cfg_offset;
6410 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
6411 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
6412
6413 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
6414 return false;
6415
6416 /* previous check guarantees that there is enough fw data up
6417 * to num_btn
6418 */
6419 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
6420 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
6421 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
6422 return false;
6423
6424 /* previous check guarantees that there is enough fw data up
6425 * to start of impedance detection configuration
6426 */
6427 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
6428 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
6429
6430 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
6431 return false;
6432
6433 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
6434 return false;
6435
6436 return true;
6437}
Joonwoo Park03324832012-03-19 19:36:16 -07006438
Joonwoo Parkfee17432012-04-16 16:33:55 -07006439/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006440static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07006441 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006442{
6443 s16 *v_btn_low, *v_btn_high;
6444 struct tabla_mbhc_btn_detect_cfg *btn_det;
6445 int i, btn = -1;
6446
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006447 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006448 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
6449 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306450 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07006451
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006452 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006453 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006454 btn = i;
6455 break;
6456 }
6457 }
6458
6459 if (btn == -1)
6460 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006461 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006462
6463 return btn;
6464}
6465
6466static int tabla_get_button_mask(const int btn)
6467{
6468 int mask = 0;
6469 switch (btn) {
6470 case 0:
6471 mask = SND_JACK_BTN_0;
6472 break;
6473 case 1:
6474 mask = SND_JACK_BTN_1;
6475 break;
6476 case 2:
6477 mask = SND_JACK_BTN_2;
6478 break;
6479 case 3:
6480 mask = SND_JACK_BTN_3;
6481 break;
6482 case 4:
6483 mask = SND_JACK_BTN_4;
6484 break;
6485 case 5:
6486 mask = SND_JACK_BTN_5;
6487 break;
6488 case 6:
6489 mask = SND_JACK_BTN_6;
6490 break;
6491 case 7:
6492 mask = SND_JACK_BTN_7;
6493 break;
6494 }
6495 return mask;
6496}
6497
Bradley Rubincb1e2732011-06-23 16:49:20 -07006498static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006499{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006500 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006501 short dce, sta;
Joonwoo Park12334832012-07-23 19:27:52 -07006502 s32 mv, mv_s, stamv, stamv_s;
Joonwoo Parkfee17432012-04-16 16:33:55 -07006503 bool vddio;
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006504 u16 *btn_high;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006505 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006506 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006507 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006508 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006509 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006510 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306511 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07006512 int n_btn_meas = d->n_btn_meas;
6513 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006514
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006515 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006516
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006517 btn_high = tabla_mbhc_cal_btn_det_mp(d, TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006518 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6519 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
6520 pr_debug("%s: mbhc is being recovered, skip button press\n",
6521 __func__);
6522 goto done;
6523 }
6524
6525 priv->mbhc_state = MBHC_STATE_POTENTIAL;
6526
6527 if (!priv->mbhc_polling_active) {
6528 pr_warn("%s: mbhc polling is not active, skip button press\n",
6529 __func__);
6530 goto done;
6531 }
Joonwoo Park03324832012-03-19 19:36:16 -07006532
6533 dce = tabla_codec_read_dce_result(codec);
6534 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6535
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006536 /* If GPIO interrupt already kicked in, ignore button press */
6537 if (priv->in_gpio_handler) {
6538 pr_debug("%s: GPIO State Changed, ignore button press\n",
6539 __func__);
6540 btn = -1;
6541 goto done;
6542 }
6543
Joonwoo Parkfee17432012-04-16 16:33:55 -07006544 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
6545 priv->mbhc_micbias_switched);
6546 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6547
Joonwoo Park03324832012-03-19 19:36:16 -07006548 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
6549 if (priv->mbhc_last_resume &&
6550 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
6551 pr_debug("%s: Button is already released shortly after "
6552 "resume\n", __func__);
6553 n_btn_meas = 0;
Joonwoo Park03324832012-03-19 19:36:16 -07006554 }
6555 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006556
Joonwoo Park12334832012-07-23 19:27:52 -07006557 /* save hw dce */
Joonwoo Parkfee17432012-04-16 16:33:55 -07006558 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006559 pr_debug("%s: meas HW - DCE %x,%d,%d button %d\n", __func__,
6560 dce, mv, mv_s, btnmeas[0]);
6561 if (n_btn_meas == 0) {
6562 sta = tabla_codec_read_sta_result(codec);
6563 stamv_s = stamv = tabla_codec_sta_dce_v(codec, 0, sta);
6564 if (vddio)
6565 stamv_s = tabla_scale_v_micb_vddio(priv, stamv, false);
6566 btn = tabla_determine_button(priv, stamv_s);
6567 pr_debug("%s: meas HW - STA %x,%d,%d button %d\n", __func__,
6568 sta, stamv, stamv_s, btn);
6569 BUG_ON(meas != 1);
6570 if (btnmeas[0] != btn)
6571 btn = -1;
6572 }
6573
6574 /* determine pressed button */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006575 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006576 dce = tabla_codec_sta_dce(codec, 1, false);
6577 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6578 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6579
6580 btnmeas[meas] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006581 pr_debug("%s: meas %d - DCE %x,%d,%d button %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006582 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006583 /* if large enough measurements are collected,
6584 * start to check if last all n_btn_con measurements were
6585 * in same button low/high range */
6586 if (meas + 1 >= d->n_btn_con) {
6587 for (i = 0; i < d->n_btn_con; i++)
6588 if ((btnmeas[meas] < 0) ||
6589 (btnmeas[meas] != btnmeas[meas - i]))
6590 break;
6591 if (i == d->n_btn_con) {
6592 /* button pressed */
6593 btn = btnmeas[meas];
6594 break;
Joonwoo Park03324832012-03-19 19:36:16 -07006595 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
6596 /* if left measurements are less than n_btn_con,
6597 * it's impossible to find button number */
6598 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006599 }
6600 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006601 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006602
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006603 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006604 if (priv->in_gpio_handler) {
6605 pr_debug("%s: GPIO already triggered, ignore button "
6606 "press\n", __func__);
6607 goto done;
6608 }
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006609 /* narrow down release threshold */
6610 tabla_mbhc_set_rel_thres(codec, btn_high[btn]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006611 mask = tabla_get_button_mask(btn);
6612 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07006613 wcd9xxx_lock_sleep(core);
6614 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
6615 msecs_to_jiffies(400)) == 0) {
6616 WARN(1, "Button pressed twice without release"
6617 "event\n");
6618 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006619 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08006620 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006621 pr_debug("%s: bogus button press, too short press?\n",
6622 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006623 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006624
Joonwoo Park03324832012-03-19 19:36:16 -07006625 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006626 pr_debug("%s: leave\n", __func__);
6627 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006628 return IRQ_HANDLED;
6629}
6630
Joonwoo Park03324832012-03-19 19:36:16 -07006631static int tabla_is_fake_press(struct tabla_priv *priv)
6632{
6633 int i;
6634 int r = 0;
6635 struct snd_soc_codec *codec = priv->codec;
6636 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006637 s16 mb_v, v_ins_hu, v_ins_h;
6638
6639 v_ins_hu = tabla_get_current_v_ins(priv, true);
6640 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006641
6642 for (i = 0; i < dces; i++) {
6643 usleep_range(10000, 10000);
6644 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006645 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006646 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
6647 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006648 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
6649 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07006650 r = 1;
6651 break;
6652 }
6653 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006654 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006655 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
6656 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006657 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
6658 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07006659 r = 1;
6660 break;
6661 }
6662 }
6663 }
6664
6665 return r;
6666}
6667
Bradley Rubincb1e2732011-06-23 16:49:20 -07006668static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006669{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08006670 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08006671 struct tabla_priv *priv = data;
6672 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006673
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006674 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006675
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006676 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6677 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006678
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006679 tabla_codec_drive_v_to_micbias(codec, 10000);
6680
Joonwoo Park03324832012-03-19 19:36:16 -07006681 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006682 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006683 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07006684 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006685 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006686 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006687 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006688 priv->mbhc_cfg.button_jack, 0,
6689 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006690 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006691 if (tabla_is_fake_press(priv)) {
6692 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006693 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006694 } else if (priv->mbhc_cfg.button_jack) {
6695 if (priv->in_gpio_handler) {
6696 pr_debug("%s: GPIO kicked in, ignore\n",
6697 __func__);
6698 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006699 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006700 "press and release\n",
6701 __func__);
6702 tabla_snd_soc_jack_report(priv,
6703 priv->mbhc_cfg.button_jack,
6704 priv->buttons_pressed,
6705 priv->buttons_pressed);
6706 tabla_snd_soc_jack_report(priv,
6707 priv->mbhc_cfg.button_jack, 0,
6708 priv->buttons_pressed);
6709 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006710 }
6711 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006712
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006713 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
6714 }
6715
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006716 /* revert narrowed release threshold */
6717 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park03324832012-03-19 19:36:16 -07006718 tabla_codec_calibrate_hs_polling(codec);
6719
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006720 if (priv->mbhc_cfg.gpio)
6721 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07006722
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006723 tabla_codec_start_hs_polling(codec);
6724
6725 pr_debug("%s: leave\n", __func__);
6726 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006727 return IRQ_HANDLED;
6728}
6729
Bradley Rubincb1e2732011-06-23 16:49:20 -07006730static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
6731{
6732 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08006733 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006734 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006735
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006736 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006737 tabla_codec_enable_config_mode(codec, 1);
6738
6739 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
6740 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006741
Joonwoo Park0976d012011-12-22 11:48:18 -08006742 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
6743
6744 usleep_range(generic->t_shutdown_plug_rem,
6745 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006746
6747 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006748 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006749 tabla_codec_enable_config_mode(codec, 0);
6750
6751 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
6752}
6753
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006754static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006755{
6756 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006757
6758 tabla_codec_shutdown_hs_removal_detect(codec);
6759
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006760 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05306761 tabla_codec_disable_clock_block(codec);
6762 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006763 }
6764
6765 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006766 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006767}
6768
Patrick Lai49efeac2011-11-03 11:01:12 -07006769static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
6770{
6771 struct tabla_priv *tabla = data;
6772 struct snd_soc_codec *codec;
6773
6774 pr_info("%s: received HPHL OCP irq\n", __func__);
6775
6776 if (tabla) {
6777 codec = tabla->codec;
Patrick Laic2d833d2012-07-06 22:42:52 -07006778 if ((tabla->hphlocp_cnt < TABLA_OCP_ATTEMPT) &&
6779 (!tabla->hphrocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006780 pr_info("%s: retry\n", __func__);
Patrick Laic2d833d2012-07-06 22:42:52 -07006781 tabla->hphlocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006782 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6783 0x00);
6784 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6785 0x10);
6786 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306787 wcd9xxx_disable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006788 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006789 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006790 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006791 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006792 tabla->mbhc_cfg.headset_jack,
6793 tabla->hph_status,
6794 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006795 }
6796 } else {
6797 pr_err("%s: Bad tabla private data\n", __func__);
6798 }
6799
6800 return IRQ_HANDLED;
6801}
6802
6803static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
6804{
6805 struct tabla_priv *tabla = data;
6806 struct snd_soc_codec *codec;
6807
6808 pr_info("%s: received HPHR OCP irq\n", __func__);
6809
6810 if (tabla) {
6811 codec = tabla->codec;
Patrick Laic2d833d2012-07-06 22:42:52 -07006812 if ((tabla->hphrocp_cnt < TABLA_OCP_ATTEMPT) &&
6813 (!tabla->hphlocp_cnt)) {
Patrick Laic7cae882011-11-18 11:52:49 -08006814 pr_info("%s: retry\n", __func__);
Patrick Laic2d833d2012-07-06 22:42:52 -07006815 tabla->hphrocp_cnt++;
Patrick Laic7cae882011-11-18 11:52:49 -08006816 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6817 0x00);
6818 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6819 0x10);
6820 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306821 wcd9xxx_disable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07006822 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Laic7cae882011-11-18 11:52:49 -08006823 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006824 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006825 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006826 tabla->mbhc_cfg.headset_jack,
6827 tabla->hph_status,
6828 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006829 }
6830 } else {
6831 pr_err("%s: Bad tabla private data\n", __func__);
6832 }
6833
6834 return IRQ_HANDLED;
6835}
6836
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006837static bool tabla_is_inval_ins_range(struct snd_soc_codec *codec,
6838 s32 mic_volt, bool highhph, bool *highv)
Joonwoo Park03324832012-03-19 19:36:16 -07006839{
6840 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006841 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006842 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006843
6844 /* Perform this check only when the high voltage headphone
6845 * needs to be considered as invalid
6846 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006847 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006848 *highv = mic_volt > v_hs_max;
6849 if (!highhph && *highv)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006850 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006851 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
6852 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006853 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006854
6855 return invalid;
6856}
6857
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006858static bool tabla_is_inval_ins_delta(struct snd_soc_codec *codec,
6859 int mic_volt, int mic_volt_prev,
6860 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006861{
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006862 return abs(mic_volt - mic_volt_prev) > threshold;
Joonwoo Park03324832012-03-19 19:36:16 -07006863}
6864
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006865/* called under codec_resource_lock acquisition */
6866void tabla_find_plug_and_report(struct snd_soc_codec *codec,
6867 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07006868{
6869 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006870
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006871 pr_debug("%s: enter current_plug(%d) new_plug(%d)\n",
6872 __func__, tabla->current_plug, plug_type);
6873
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006874 if (plug_type == PLUG_TYPE_HEADPHONE &&
6875 tabla->current_plug == PLUG_TYPE_NONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006876 /* Nothing was reported previously
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006877 * report a headphone or unsupported
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006878 */
6879 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6880 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006881 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006882 if (!tabla->mbhc_cfg.detect_extn_cable) {
6883 if (tabla->current_plug == PLUG_TYPE_HEADSET)
6884 tabla_codec_report_plug(codec, 0,
6885 SND_JACK_HEADSET);
6886 else if (tabla->current_plug == PLUG_TYPE_HEADPHONE)
6887 tabla_codec_report_plug(codec, 0,
6888 SND_JACK_HEADPHONE);
6889 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006890 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6891 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006892 } else if (plug_type == PLUG_TYPE_HEADSET) {
6893 /* If Headphone was reported previously, this will
6894 * only report the mic line
6895 */
6896 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
Simmi Pateriya21375012012-11-26 23:06:01 +05306897 if (!tabla->mbhc_micbias_switched &&
6898 tabla_is_hph_pa_on(codec)) {
6899 /*If the headphone path is on, switch the micbias
6900 to VDDIO to avoid noise due to button polling */
6901 tabla_codec_switch_micbias(codec, 1);
6902 pr_debug("%s: HPH path is still up\n", __func__);
6903 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006904 msleep(100);
6905 tabla_codec_start_hs_polling(codec);
6906 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006907 if (tabla->mbhc_cfg.detect_extn_cable) {
6908 /* High impedance device found. Report as LINEOUT*/
6909 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
6910 tabla_codec_cleanup_hs_polling(codec);
6911 pr_debug("%s: setup mic trigger for further detection\n",
6912 __func__);
6913 tabla->lpi_enabled = true;
6914 /*
6915 * Do not enable HPHL trigger. If playback is active,
6916 * it might lead to continuous false HPHL triggers
6917 */
6918 tabla_codec_enable_hs_detect(codec, 1,
6919 MBHC_USE_MB_TRIGGER,
6920 false);
6921 } else {
6922 if (tabla->current_plug == PLUG_TYPE_NONE)
6923 tabla_codec_report_plug(codec, 1,
6924 SND_JACK_HEADPHONE);
6925 tabla_codec_cleanup_hs_polling(codec);
6926 pr_debug("setup mic trigger for further detection\n");
6927 tabla->lpi_enabled = true;
6928 tabla_codec_enable_hs_detect(codec, 1,
6929 MBHC_USE_MB_TRIGGER |
6930 MBHC_USE_HPHL_TRIGGER,
6931 false);
6932 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006933 } else {
6934 WARN(1, "Unexpected current plug_type %d, plug_type %d\n",
6935 tabla->current_plug, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006936 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006937 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006938}
6939
6940/* should be called under interrupt context that hold suspend */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006941static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla,
6942 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006943{
6944 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
6945 tabla->hs_detect_work_stop = false;
6946 wcd9xxx_lock_sleep(tabla->codec->control_data);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006947 schedule_work(correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006948}
6949
6950/* called under codec_resource_lock acquisition */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006951static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla,
6952 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006953{
6954 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
6955 tabla->hs_detect_work_stop = true;
6956 wmb();
6957 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006958 if (cancel_work_sync(correct_plug_work)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006959 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
6960 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6961 }
6962 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6963}
6964
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006965static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
6966{
6967 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
6968 tabla->mbhc_cfg.gpio_level_insert);
6969}
6970
Joonwoo Park41956722012-04-18 13:13:07 -07006971/* called under codec_resource_lock acquisition */
6972static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
6973{
6974 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
6975 if (on)
6976 usleep_range(5000, 5000);
6977}
6978
6979/* called under codec_resource_lock acquisition and mbhc override = 1 */
6980static enum tabla_mbhc_plug_type
6981tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
6982{
6983 int i;
6984 bool gndswitch, vddioswitch;
6985 int scaled;
6986 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
6987 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006988 int num_det = MBHC_NUM_DCE_PLUG_DETECT + 1;
Joonwoo Park41956722012-04-18 13:13:07 -07006989 enum tabla_mbhc_plug_type plug_type[num_det];
6990 s16 mb_v[num_det];
6991 s32 mic_mv[num_det];
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006992 bool inval;
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07006993 bool highdelta = false;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006994 bool ahighv = false, highv;
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006995 bool gndmicswapped = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006996
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07006997 pr_debug("%s: enter\n", __func__);
6998
Joonwoo Park41956722012-04-18 13:13:07 -07006999 /* make sure override is on */
7000 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
7001
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007002 /* GND and MIC swap detection requires at least 2 rounds of DCE */
7003 BUG_ON(num_det < 2);
7004
7005 plug_type_ptr =
7006 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
7007
7008 plug_type[0] = PLUG_TYPE_INVALID;
7009
Joonwoo Park41956722012-04-18 13:13:07 -07007010 /* performs DCEs for N times
7011 * 1st: check if voltage is in invalid range
7012 * 2nd - N-2nd: check voltage range and delta
7013 * N-1st: check voltage range, delta with HPHR GND switch
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007014 * Nth: check voltage range with VDDIO switch */
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007015 for (i = 0; i < num_det; i++) {
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007016 gndswitch = (i == (num_det - 2));
7017 vddioswitch = (i == (num_det - 1)) || (i == (num_det - 2));
Joonwoo Park41956722012-04-18 13:13:07 -07007018 if (i == 0) {
7019 mb_v[i] = tabla_codec_setup_hs_polling(codec);
7020 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007021 inval = tabla_is_inval_ins_range(codec, mic_mv[i],
7022 highhph, &highv);
7023 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07007024 scaled = mic_mv[i];
Joonwoo Park41956722012-04-18 13:13:07 -07007025 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007026 if (vddioswitch)
7027 __tabla_codec_switch_micbias(tabla->codec, 1,
7028 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007029 if (gndswitch)
7030 tabla_codec_hphr_gnd_switch(codec, true);
7031 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
7032 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007033 if (vddioswitch)
7034 scaled = tabla_scale_v_micb_vddio(tabla,
Joonwoo Park41956722012-04-18 13:13:07 -07007035 mic_mv[i],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007036 false);
7037 else
7038 scaled = mic_mv[i];
7039 /* !gndswitch & vddioswitch means the previous DCE
7040 * was done with gndswitch, don't compare with DCE
7041 * with gndswitch */
7042 highdelta = tabla_is_inval_ins_delta(codec, scaled,
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07007043 mic_mv[i - 1],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007044 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV);
7045 inval = (tabla_is_inval_ins_range(codec, mic_mv[i],
7046 highhph, &highv) ||
7047 highdelta);
7048 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07007049 if (gndswitch)
7050 tabla_codec_hphr_gnd_switch(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007051 if (vddioswitch)
7052 __tabla_codec_switch_micbias(tabla->codec, 0,
7053 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007054 }
7055 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007056 "VDDIO %d, inval %d\n", __func__,
Joonwoo Park41956722012-04-18 13:13:07 -07007057 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007058 vddioswitch, inval);
7059 /* don't need to run further DCEs */
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07007060 if ((ahighv || !vddioswitch) && inval)
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007061 break;
7062 mic_mv[i] = scaled;
Ravi Kumar Alamanda1c713b22012-09-27 17:14:27 -07007063
7064 /*
7065 * claim UNSUPPORTED plug insertion when
7066 * good headset is detected but HPHR GND switch makes
7067 * delta difference
7068 */
7069 if (i == (num_det - 2) && highdelta && !ahighv)
7070 gndmicswapped = true;
7071 else if (i == (num_det - 1) && inval) {
7072 if (gndmicswapped)
7073 plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
7074 else
7075 plug_type[0] = PLUG_TYPE_INVALID;
7076 }
Joonwoo Park41956722012-04-18 13:13:07 -07007077 }
7078
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007079 for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
7080 i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07007081 /*
7082 * If we are here, means none of the all
7083 * measurements are fake, continue plug type detection.
7084 * If all three measurements do not produce same
7085 * plug type, restart insertion detection
7086 */
7087 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
7088 plug_type[i] = PLUG_TYPE_HEADPHONE;
7089 pr_debug("%s: Detect attempt %d, detected Headphone\n",
7090 __func__, i);
7091 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
7092 plug_type[i] = PLUG_TYPE_HIGH_HPH;
7093 pr_debug("%s: Detect attempt %d, detected High "
7094 "Headphone\n", __func__, i);
7095 } else {
7096 plug_type[i] = PLUG_TYPE_HEADSET;
7097 pr_debug("%s: Detect attempt %d, detected Headset\n",
7098 __func__, i);
7099 }
7100
7101 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
7102 pr_err("%s: Detect attempt %d and %d are not same",
7103 __func__, i - 1, i);
7104 plug_type[0] = PLUG_TYPE_INVALID;
7105 inval = true;
7106 break;
7107 }
7108 }
7109
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007110 pr_debug("%s: Detected plug type %d\n", __func__, plug_type[0]);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007111 pr_debug("%s: leave\n", __func__);
Joonwoo Park41956722012-04-18 13:13:07 -07007112 return plug_type[0];
7113}
7114
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007115static void tabla_hs_correct_gpio_plug(struct work_struct *work)
7116{
7117 struct tabla_priv *tabla;
7118 struct snd_soc_codec *codec;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007119 int retry = 0, pt_gnd_mic_swap_cnt = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007120 bool correction = false;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007121 enum tabla_mbhc_plug_type plug_type = PLUG_TYPE_INVALID;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007122 unsigned long timeout;
7123
7124 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
7125 codec = tabla->codec;
7126
7127 pr_debug("%s: enter\n", __func__);
7128 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7129
7130 /* Keep override on during entire plug type correction work.
7131 *
7132 * This is okay under the assumption that any GPIO irqs which use
7133 * MBHC block cancel and sync this work so override is off again
7134 * prior to GPIO interrupt handler's MBHC block usage.
7135 * Also while this correction work is running, we can guarantee
7136 * DAPM doesn't use any MBHC block as this work only runs with
7137 * headphone detection.
7138 */
7139 tabla_turn_onoff_override(codec, true);
7140
7141 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7142 while (!time_after(jiffies, timeout)) {
7143 ++retry;
7144 rmb();
7145 if (tabla->hs_detect_work_stop) {
7146 pr_debug("%s: stop requested\n", __func__);
7147 break;
7148 }
7149
7150 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
7151 if (tabla_hs_gpio_level_remove(tabla)) {
7152 pr_debug("%s: GPIO value is low\n", __func__);
7153 break;
7154 }
7155
7156 /* can race with removal interrupt */
7157 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07007158 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007159 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7160
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007161 pr_debug("%s: attempt(%d) current_plug(%d) new_plug(%d)\n",
7162 __func__, retry, tabla->current_plug, plug_type);
Joonwoo Park41956722012-04-18 13:13:07 -07007163 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007164 pr_debug("Invalid plug in attempt # %d\n", retry);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007165 if (!tabla->mbhc_cfg.detect_extn_cable &&
7166 retry == NUM_ATTEMPTS_TO_REPORT &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007167 tabla->current_plug == PLUG_TYPE_NONE) {
7168 tabla_codec_report_plug(codec, 1,
7169 SND_JACK_HEADPHONE);
7170 }
Joonwoo Park41956722012-04-18 13:13:07 -07007171 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007172 pr_debug("Good headphone detected, continue polling mic\n");
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007173 if (tabla->mbhc_cfg.detect_extn_cable) {
7174 if (tabla->current_plug != plug_type)
7175 tabla_codec_report_plug(codec, 1,
7176 SND_JACK_HEADPHONE);
7177 } else if (tabla->current_plug == PLUG_TYPE_NONE)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007178 tabla_codec_report_plug(codec, 1,
7179 SND_JACK_HEADPHONE);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007180 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007181 if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
7182 pt_gnd_mic_swap_cnt++;
7183 if (pt_gnd_mic_swap_cnt <
7184 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD)
7185 continue;
7186 else if (pt_gnd_mic_swap_cnt >
7187 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD) {
7188 /* This is due to GND/MIC switch didn't
7189 * work, Report unsupported plug */
7190 } else if (tabla->mbhc_cfg.swap_gnd_mic) {
7191 /* if switch is toggled, check again,
7192 * otherwise report unsupported plug */
7193 if (tabla->mbhc_cfg.swap_gnd_mic(codec))
7194 continue;
7195 }
7196 } else
7197 pt_gnd_mic_swap_cnt = 0;
7198
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007199 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7200 /* Turn off override */
7201 tabla_turn_onoff_override(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007202 /* The valid plug also includes PLUG_TYPE_GND_MIC_SWAP
7203 */
Joonwoo Park41956722012-04-18 13:13:07 -07007204 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007205 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7206 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07007207 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007208 correction = true;
7209 break;
7210 }
7211 }
7212
7213 /* Turn off override */
7214 if (!correction)
7215 tabla_turn_onoff_override(codec, false);
7216
7217 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007218
7219 if (tabla->mbhc_cfg.detect_extn_cable) {
7220 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7221 if (tabla->current_plug == PLUG_TYPE_HEADPHONE ||
7222 tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP ||
7223 tabla->current_plug == PLUG_TYPE_INVALID ||
7224 plug_type == PLUG_TYPE_INVALID) {
7225 /* Enable removal detection */
7226 tabla_codec_cleanup_hs_polling(codec);
7227 tabla_codec_enable_hs_detect(codec, 0, 0, false);
7228 }
7229 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7230 }
7231 pr_debug("%s: leave current_plug(%d)\n",
7232 __func__, tabla->current_plug);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007233 /* unlock sleep */
7234 wcd9xxx_unlock_sleep(tabla->codec->control_data);
7235}
7236
7237/* called under codec_resource_lock acquisition */
7238static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
7239{
Joonwoo Park41956722012-04-18 13:13:07 -07007240 enum tabla_mbhc_plug_type plug_type;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007241 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007242
7243 pr_debug("%s: enter\n", __func__);
7244
7245 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07007246 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007247 tabla_turn_onoff_override(codec, false);
7248
7249 if (tabla_hs_gpio_level_remove(tabla)) {
7250 pr_debug("%s: GPIO value is low when determining plug\n",
7251 __func__);
7252 return;
7253 }
7254
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007255 if (plug_type == PLUG_TYPE_INVALID ||
7256 plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007257 tabla_schedule_hs_detect_plug(tabla,
7258 &tabla->hs_correct_plug_work);
Joonwoo Park41956722012-04-18 13:13:07 -07007259 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007260 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
7261
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007262 tabla_schedule_hs_detect_plug(tabla,
7263 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007264 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07007265 pr_debug("%s: Valid plug found, determine plug type %d\n",
7266 __func__, plug_type);
7267 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007268 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007269 pr_debug("%s: leave\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007270}
7271
7272/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007273static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
7274{
Joonwoo Park41956722012-04-18 13:13:07 -07007275 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007276 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7277 const struct tabla_mbhc_plug_detect_cfg *plug_det =
7278 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007279 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007280 /* Turn on the override,
7281 * tabla_codec_setup_hs_polling requires override on */
7282 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07007283
7284 if (plug_det->t_ins_complete > 20)
7285 msleep(plug_det->t_ins_complete);
7286 else
7287 usleep_range(plug_det->t_ins_complete * 1000,
7288 plug_det->t_ins_complete * 1000);
7289
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007290 if (tabla->mbhc_cfg.gpio) {
7291 /* Turn off the override */
7292 tabla_turn_onoff_override(codec, false);
7293 if (tabla_hs_gpio_level_remove(tabla))
7294 pr_debug("%s: GPIO value is low when determining "
7295 "plug\n", __func__);
7296 else
7297 tabla_codec_decide_gpio_plug(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007298 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007299 return;
7300 }
7301
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007302 plug_type = tabla_codec_get_plug_type(codec, false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007303 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07007304
Joonwoo Park41956722012-04-18 13:13:07 -07007305 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007306 pr_debug("%s: Invalid plug type detected\n", __func__);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007307 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007308 tabla_codec_cleanup_hs_polling(codec);
7309 tabla_codec_enable_hs_detect(codec, 1,
7310 MBHC_USE_MB_TRIGGER |
7311 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007312 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
7313 pr_debug("%s: GND-MIC swapped plug type detected\n", __func__);
7314 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
7315 tabla_codec_cleanup_hs_polling(codec);
7316 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07007317 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07007318 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007319 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
7320 tabla_codec_cleanup_hs_polling(codec);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007321 tabla_schedule_hs_detect_plug(tabla,
7322 &tabla->hs_correct_plug_work_nogpio);
Joonwoo Park41956722012-04-18 13:13:07 -07007323 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07007324 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007325 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
Joonwoo Park03324832012-03-19 19:36:16 -07007326 /* avoid false button press detect */
7327 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07007328 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007329 } else if (tabla->mbhc_cfg.detect_extn_cable &&
7330 plug_type == PLUG_TYPE_HIGH_HPH) {
7331 pr_debug("%s: High impedance plug type detected\n", __func__);
7332 tabla_codec_report_plug(codec, 1, SND_JACK_LINEOUT);
7333 /* Enable insertion detection on the other end of cable */
7334 tabla_codec_cleanup_hs_polling(codec);
7335 tabla_codec_enable_hs_detect(codec, 1,
7336 MBHC_USE_MB_TRIGGER, false);
Joonwoo Park03324832012-03-19 19:36:16 -07007337 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007338 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07007339}
7340
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007341/* called only from interrupt which is under codec_resource_lock acquisition */
7342static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07007343{
Bradley Rubincb1e2732011-06-23 16:49:20 -07007344 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007345 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007346
7347 if (!is_removal) {
7348 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
7349
7350 rmb();
7351 if (priv->lpi_enabled)
7352 msleep(100);
7353
7354 rmb();
7355 if (!priv->lpi_enabled) {
7356 pr_debug("%s: lpi is disabled\n", __func__);
7357 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
7358 priv->mbhc_cfg.gpio_level_insert) {
7359 pr_debug("%s: Valid insertion, "
7360 "detect plug type\n", __func__);
7361 tabla_codec_decide_gpio_plug(codec);
7362 } else {
7363 pr_debug("%s: Invalid insertion, "
7364 "stop plug detection\n", __func__);
7365 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007366 } else if (tabla->mbhc_cfg.detect_extn_cable) {
7367 pr_debug("%s: Removal\n", __func__);
7368 if (!tabla_hs_gpio_level_remove(tabla)) {
7369 /*
7370 * gpio says, something is still inserted, could be
7371 * extension cable i.e. headset is removed from
7372 * extension cable
7373 */
7374 /* cancel detect plug */
7375 tabla_cancel_hs_detect_plug(tabla,
7376 &tabla->hs_correct_plug_work);
7377 tabla_codec_decide_gpio_plug(codec);
7378 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007379 } else {
7380 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
7381 }
7382}
7383
7384/* called only from interrupt which is under codec_resource_lock acquisition */
7385static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
7386 bool is_mb_trigger)
7387{
Joonwoo Park03324832012-03-19 19:36:16 -07007388 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007389 struct snd_soc_codec *codec = priv->codec;
7390 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007391 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7392
7393 /* Cancel possibly running hs_detect_work */
7394 tabla_cancel_hs_detect_plug(tabla,
7395 &tabla->hs_correct_plug_work_nogpio);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07007396
7397 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007398
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07007399 /*
7400 * If headphone is removed while playback is in progress,
7401 * it is possible that micbias will be switched to VDDIO.
7402 */
Joonwoo Park03324832012-03-19 19:36:16 -07007403 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007404 if (priv->current_plug == PLUG_TYPE_HEADPHONE)
7405 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7406 else if (priv->current_plug == PLUG_TYPE_GND_MIC_SWAP)
7407 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7408 else
7409 WARN(1, "%s: Unexpected current plug type %d\n",
7410 __func__, priv->current_plug);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007411 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007412 tabla_codec_enable_hs_detect(codec, 1,
7413 MBHC_USE_MB_TRIGGER |
7414 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07007415 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007416 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07007417 pr_debug("%s: Waiting for Headphone left trigger\n",
7418 __func__);
7419 wcd9xxx_lock_sleep(core);
7420 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
7421 usecs_to_jiffies(1000000)) == 0) {
7422 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
7423 __func__);
7424 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08007425 }
Joonwoo Park03324832012-03-19 19:36:16 -07007426 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
7427 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007428 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007429 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
7430 if (ret != 0) {
7431 pr_debug("%s: Complete plug insertion, Detecting plug "
7432 "type\n", __func__);
7433 tabla_codec_detect_plug_type(codec);
7434 wcd9xxx_unlock_sleep(core);
7435 } else {
7436 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007437 WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007438 pr_err("%s: Error detecting plug insertion\n",
7439 __func__);
7440 }
Joonwoo Park03324832012-03-19 19:36:16 -07007441 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007442}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08007443
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007444/* called only from interrupt which is under codec_resource_lock acquisition */
7445static void tabla_hs_insert_irq_extn(struct tabla_priv *priv,
7446 bool is_mb_trigger)
7447{
7448 struct snd_soc_codec *codec = priv->codec;
7449 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7450
7451 /* Cancel possibly running hs_detect_work */
7452 tabla_cancel_hs_detect_plug(tabla,
7453 &tabla->hs_correct_plug_work);
7454
7455 if (is_mb_trigger) {
7456 pr_debug("%s: Waiting for Headphone left trigger\n",
7457 __func__);
7458 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
7459 false);
7460 } else {
7461 pr_debug("%s: HPHL trigger received, detecting plug type\n",
7462 __func__);
7463 tabla_codec_detect_plug_type(codec);
7464 }
7465}
7466
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007467static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
7468{
7469 bool is_mb_trigger, is_removal;
7470 struct tabla_priv *priv = data;
7471 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07007472
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007473 pr_debug("%s: enter\n", __func__);
7474 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007475 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007476
7477 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
7478 0x10);
7479 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
7480 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
7481
7482 /* Turn off both HPH and MIC line schmitt triggers */
7483 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7484 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7485 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
7486
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007487 if (priv->mbhc_cfg.detect_extn_cable &&
7488 priv->current_plug == PLUG_TYPE_HIGH_HPH)
7489 tabla_hs_insert_irq_extn(priv, is_mb_trigger);
7490 else if (priv->mbhc_cfg.gpio)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007491 tabla_hs_insert_irq_gpio(priv, is_removal);
7492 else
7493 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
7494
7495 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007496 return IRQ_HANDLED;
7497}
7498
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007499static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
7500{
7501 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007502 const struct tabla_mbhc_plug_type_cfg *plug_type =
7503 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
7504 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007505
7506 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007507 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007508}
7509
7510/* called under codec_resource_lock acquisition
7511 * returns true if mic voltage range is back to normal insertion
7512 * returns false either if timedout or removed */
7513static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
7514{
7515 int i;
7516 bool timedout, settled = false;
7517 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
7518 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
7519 unsigned long retry = 0, timeout;
7520 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007521 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007522
7523 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7524 while (!(timedout = time_after(jiffies, timeout))) {
7525 retry++;
7526 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7527 pr_debug("%s: GPIO indicates removal\n", __func__);
7528 break;
7529 }
7530
7531 if (tabla->mbhc_cfg.gpio) {
7532 if (retry > 1)
7533 msleep(250);
7534 else
7535 msleep(50);
7536 }
7537
7538 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7539 pr_debug("%s: GPIO indicates removal\n", __func__);
7540 break;
7541 }
7542
7543 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
7544 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
7545 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
7546 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
7547 __func__, retry, mic_mv[i], mb_v[i]);
7548 }
7549
7550 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
7551 pr_debug("%s: GPIO indicates removal\n", __func__);
7552 break;
7553 }
7554
7555 if (tabla->current_plug == PLUG_TYPE_NONE) {
7556 pr_debug("%s : headset/headphone is removed\n",
7557 __func__);
7558 break;
7559 }
7560
7561 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
7562 if (!is_valid_mic_voltage(codec, mic_mv[i]))
7563 break;
7564
7565 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7566 pr_debug("%s: MIC voltage settled\n", __func__);
7567 settled = true;
7568 msleep(200);
7569 break;
7570 }
7571
7572 /* only for non-GPIO remove irq */
7573 if (!tabla->mbhc_cfg.gpio) {
7574 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007575 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007576 break;
7577 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
7578 pr_debug("%s: Headset is removed\n", __func__);
7579 break;
7580 }
7581 }
7582 }
7583
7584 if (timedout)
7585 pr_debug("%s: Microphone did not settle in %d seconds\n",
7586 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
7587 return settled;
7588}
7589
7590/* called only from interrupt which is under codec_resource_lock acquisition */
7591static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
7592{
7593 struct snd_soc_codec *codec = priv->codec;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007594 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007595 if (tabla_hs_remove_settle(codec))
7596 tabla_codec_start_hs_polling(codec);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007597 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007598}
7599
7600/* called only from interrupt which is under codec_resource_lock acquisition */
7601static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007602{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007603 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007604 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007605 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08007606 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007607 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007608 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007609
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007610 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007611 if (priv->current_plug != PLUG_TYPE_HEADSET) {
7612 pr_debug("%s(): Headset is not inserted, ignore removal\n",
7613 __func__);
7614 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7615 0x08, 0x08);
7616 return;
7617 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007618
Joonwoo Park0976d012011-12-22 11:48:18 -08007619 usleep_range(generic->t_shutdown_plug_rem,
7620 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007621
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007622 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007623 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007624 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
7625 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007626 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007627 pr_debug("%s: checking false removal\n", __func__);
7628 msleep(500);
7629 removed = !tabla_hs_remove_settle(codec);
7630 pr_debug("%s: headset %sactually removed\n", __func__,
7631 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08007632 break;
7633 }
7634 min_us -= priv->mbhc_data.t_dce;
7635 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07007636
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007637 if (removed) {
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007638 if (priv->mbhc_cfg.detect_extn_cable) {
7639 if (!tabla_hs_gpio_level_remove(priv)) {
7640 /*
7641 * extension cable is still plugged in
7642 * report it as LINEOUT device
7643 */
7644 tabla_codec_report_plug(codec, 1,
7645 SND_JACK_LINEOUT);
7646 tabla_codec_cleanup_hs_polling(codec);
7647 tabla_codec_enable_hs_detect(codec, 1,
7648 MBHC_USE_MB_TRIGGER,
7649 false);
7650 }
7651 } else {
7652 /* Cancel possibly running hs_detect_work */
7653 tabla_cancel_hs_detect_plug(priv,
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007654 &priv->hs_correct_plug_work_nogpio);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007655 /*
7656 * If this removal is not false, first check the micbias
7657 * switch status and switch it to LDOH if it is already
7658 * switched to VDDIO.
7659 */
7660 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07007661
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007662 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7663 tabla_codec_cleanup_hs_polling(codec);
7664 tabla_codec_enable_hs_detect(codec, 1,
7665 MBHC_USE_MB_TRIGGER |
7666 MBHC_USE_HPHL_TRIGGER,
7667 true);
7668 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007669 } else {
7670 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007671 }
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007672 pr_debug("%s: leave\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007673}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007674
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007675static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
7676{
7677 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007678 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007679 pr_debug("%s: enter, removal interrupt\n", __func__);
7680
7681 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007682 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
7683 priv->mbhc_micbias_switched);
7684 if (vddio)
7685 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
7686
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007687 if ((priv->mbhc_cfg.detect_extn_cable &&
7688 !tabla_hs_gpio_level_remove(priv)) ||
7689 !priv->mbhc_cfg.gpio) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007690 tabla_hs_remove_irq_nogpio(priv);
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007691 } else
7692 tabla_hs_remove_irq_gpio(priv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007693
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007694 /* if driver turned off vddio switch and headset is not removed,
7695 * turn on the vddio switch back, if headset is removed then vddio
7696 * switch is off by time now and shouldn't be turn on again from here */
7697 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
7698 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007699 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007700
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007701 return IRQ_HANDLED;
7702}
7703
Joonwoo Park03324832012-03-19 19:36:16 -07007704void mbhc_insert_work(struct work_struct *work)
7705{
7706 struct delayed_work *dwork;
7707 struct tabla_priv *tabla;
7708 struct snd_soc_codec *codec;
7709 struct wcd9xxx *tabla_core;
7710
7711 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007712 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07007713 codec = tabla->codec;
7714 tabla_core = dev_get_drvdata(codec->dev->parent);
7715
7716 pr_debug("%s:\n", __func__);
7717
7718 /* Turn off both HPH and MIC line schmitt triggers */
7719 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7720 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7721 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007722 wcd9xxx_disable_irq_sync(codec->control_data,
7723 WCD9XXX_IRQ_MBHC_INSERTION);
Joonwoo Park03324832012-03-19 19:36:16 -07007724 tabla_codec_detect_plug_type(codec);
7725 wcd9xxx_unlock_sleep(tabla_core);
7726}
7727
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007728static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
7729{
7730 bool insert;
7731 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007732 struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007733 bool is_removed = false;
7734
7735 pr_debug("%s: enter\n", __func__);
7736
7737 tabla->in_gpio_handler = true;
7738 /* Wait here for debounce time */
7739 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
7740 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
7741
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007742 wcd9xxx_nested_irq_lock(core);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007743 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7744
7745 /* cancel pending button press */
7746 if (tabla_cancel_btn_work(tabla))
7747 pr_debug("%s: button press is canceled\n", __func__);
7748
7749 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
7750 tabla->mbhc_cfg.gpio_level_insert);
7751 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
7752 tabla->lpi_enabled = false;
7753 wmb();
7754
7755 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007756 tabla_cancel_hs_detect_plug(tabla,
7757 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007758
7759 /* Disable Mic Bias pull down and HPH Switch to GND */
7760 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
7761 0x00);
7762 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
7763 tabla_codec_detect_plug_type(codec);
7764 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
7765 tabla->lpi_enabled = false;
7766 wmb();
7767
7768 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007769 tabla_cancel_hs_detect_plug(tabla,
7770 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007771
7772 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
7773 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7774 is_removed = true;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007775 } else if (tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP) {
7776 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7777 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007778 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
7779 tabla_codec_pause_hs_polling(codec);
7780 tabla_codec_cleanup_hs_polling(codec);
7781 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7782 is_removed = true;
Ravi Kumar Alamanda07b6bd62012-08-15 18:39:47 -07007783 } else if (tabla->current_plug == PLUG_TYPE_HIGH_HPH) {
7784 tabla_codec_report_plug(codec, 0, SND_JACK_LINEOUT);
7785 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007786 }
7787
7788 if (is_removed) {
7789 /* Enable Mic Bias pull down and HPH Switch to GND */
7790 snd_soc_update_bits(codec,
7791 tabla->mbhc_bias_regs.ctl_reg, 0x01,
7792 0x01);
7793 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
7794 0x01);
7795 /* Make sure mic trigger is turned off */
7796 snd_soc_update_bits(codec,
7797 tabla->mbhc_bias_regs.ctl_reg,
7798 0x01, 0x01);
7799 snd_soc_update_bits(codec,
7800 tabla->mbhc_bias_regs.mbhc_reg,
7801 0x90, 0x00);
7802 /* Reset MBHC State Machine */
7803 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7804 0x08, 0x08);
7805 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7806 0x08, 0x00);
7807 /* Turn off override */
7808 tabla_turn_onoff_override(codec, false);
Simmi Pateriya21375012012-11-26 23:06:01 +05307809 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007810 }
7811 }
7812
7813 tabla->in_gpio_handler = false;
7814 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Joonwoo Park1f9d7fd2013-01-07 12:40:03 -08007815 wcd9xxx_nested_irq_unlock(core);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007816 pr_debug("%s: leave\n", __func__);
7817}
7818
7819static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
7820{
7821 int r = IRQ_HANDLED;
7822 struct snd_soc_codec *codec = data;
Joonwoo Parkecf379c2012-10-04 16:57:52 -07007823 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007824
7825 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
7826 pr_warn("%s: failed to hold suspend\n", __func__);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07007827 /*
7828 * Give up this IRQ for now and resend this IRQ so IRQ can be
7829 * handled after system resume
7830 */
7831 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7832 tabla->gpio_irq_resend = true;
7833 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7834 wake_lock_timeout(&tabla->irq_resend_wlock, HZ);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007835 r = IRQ_NONE;
7836 } else {
7837 tabla_hs_gpio_handler(codec);
7838 wcd9xxx_unlock_sleep(codec->control_data);
7839 }
7840
7841 return r;
7842}
7843
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007844static void tabla_hs_correct_plug_nogpio(struct work_struct *work)
7845{
7846 struct tabla_priv *tabla;
7847 struct snd_soc_codec *codec;
7848 unsigned long timeout;
7849 int retry = 0;
7850 enum tabla_mbhc_plug_type plug_type;
7851 bool is_headset = false;
7852
7853 pr_debug("%s(): Poll Microphone voltage for %d seconds\n",
7854 __func__, TABLA_HS_DETECT_PLUG_TIME_MS / 1000);
7855
7856 tabla = container_of(work, struct tabla_priv,
7857 hs_correct_plug_work_nogpio);
7858 codec = tabla->codec;
7859
7860 /* Make sure the MBHC mux is connected to MIC Path */
7861 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
7862
7863 /* setup for microphone polling */
7864 tabla_turn_onoff_override(codec, true);
7865 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7866
7867 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7868 while (!time_after(jiffies, timeout)) {
7869 ++retry;
7870
7871 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
7872 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7873 plug_type = tabla_codec_get_plug_type(codec, false);
7874 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7875
7876 if (plug_type == PLUG_TYPE_HIGH_HPH
7877 || plug_type == PLUG_TYPE_INVALID) {
7878
7879 /* this means the plug is removed
7880 * End microphone polling and setup
7881 * for low power removal detection.
7882 */
7883 pr_debug("%s(): Plug may be removed, setup removal\n",
7884 __func__);
7885 break;
7886 } else if (plug_type == PLUG_TYPE_HEADSET) {
7887 /* Plug is corrected from headphone to headset,
7888 * report headset and end the polling
7889 */
7890 is_headset = true;
7891 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7892 tabla_turn_onoff_override(codec, false);
7893 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
7894 tabla_codec_start_hs_polling(codec);
7895 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7896 pr_debug("%s(): corrected from headphone to headset\n",
7897 __func__);
7898 break;
7899 }
7900 }
7901
7902 /* Undo setup for microphone polling depending
7903 * result from polling
7904 */
7905 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7906 if (!is_headset) {
Bhalchandra Gajareafc86432012-08-23 13:44:07 -07007907 pr_debug("%s: Inserted headphone is not a headset\n",
7908 __func__);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007909 tabla_turn_onoff_override(codec, false);
7910 tabla_codec_cleanup_hs_polling(codec);
7911 tabla_codec_enable_hs_detect(codec, 0, 0, false);
7912 }
7913 wcd9xxx_unlock_sleep(codec->control_data);
7914}
7915
Joonwoo Park1305bab2012-05-21 15:08:42 -07007916static int tabla_mbhc_init_and_calibrate(struct tabla_priv *tabla)
7917{
7918 int ret = 0;
7919 struct snd_soc_codec *codec = tabla->codec;
7920
7921 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7922 tabla_mbhc_init(codec);
7923 tabla_mbhc_cal(codec);
7924 tabla_mbhc_calc_thres(codec);
7925 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7926 tabla_codec_calibrate_hs_polling(codec);
7927 if (!tabla->mbhc_cfg.gpio) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007928 INIT_WORK(&tabla->hs_correct_plug_work_nogpio,
7929 tabla_hs_correct_plug_nogpio);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007930 ret = tabla_codec_enable_hs_detect(codec, 1,
7931 MBHC_USE_MB_TRIGGER |
7932 MBHC_USE_HPHL_TRIGGER,
7933 false);
7934
7935 if (IS_ERR_VALUE(ret))
7936 pr_err("%s: Failed to setup MBHC detection\n",
7937 __func__);
7938 } else {
7939 /* Enable Mic Bias pull down and HPH Switch to GND */
7940 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
7941 0x01, 0x01);
7942 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x01);
7943 INIT_WORK(&tabla->hs_correct_plug_work,
7944 tabla_hs_correct_gpio_plug);
7945 }
7946
7947 if (!IS_ERR_VALUE(ret)) {
7948 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
7949 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007950 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007951 wcd9xxx_enable_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07007952 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007953
7954 if (tabla->mbhc_cfg.gpio) {
7955 ret = request_threaded_irq(tabla->mbhc_cfg.gpio_irq,
7956 NULL,
7957 tabla_mechanical_plug_detect_irq,
7958 (IRQF_TRIGGER_RISING |
7959 IRQF_TRIGGER_FALLING),
7960 "tabla-gpio", codec);
7961 if (!IS_ERR_VALUE(ret)) {
7962 ret = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
7963 /* Bootup time detection */
7964 tabla_hs_gpio_handler(codec);
7965 }
7966 }
7967 }
7968
7969 return ret;
7970}
7971
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007972static void mbhc_fw_read(struct work_struct *work)
7973{
7974 struct delayed_work *dwork;
7975 struct tabla_priv *tabla;
7976 struct snd_soc_codec *codec;
7977 const struct firmware *fw;
Joonwoo Park1305bab2012-05-21 15:08:42 -07007978 int ret = -1, retry = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007979
7980 dwork = to_delayed_work(work);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007981 tabla = container_of(dwork, struct tabla_priv, mbhc_firmware_dwork);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007982 codec = tabla->codec;
7983
7984 while (retry < MBHC_FW_READ_ATTEMPTS) {
7985 retry++;
7986 pr_info("%s:Attempt %d to request MBHC firmware\n",
7987 __func__, retry);
7988 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
7989 codec->dev);
7990
7991 if (ret != 0) {
7992 usleep_range(MBHC_FW_READ_TIMEOUT,
Joonwoo Park1305bab2012-05-21 15:08:42 -07007993 MBHC_FW_READ_TIMEOUT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007994 } else {
7995 pr_info("%s: MBHC Firmware read succesful\n", __func__);
7996 break;
7997 }
7998 }
7999
8000 if (ret != 0) {
8001 pr_err("%s: Cannot load MBHC firmware use default cal\n",
8002 __func__);
8003 } else if (tabla_mbhc_fw_validate(fw) == false) {
8004 pr_err("%s: Invalid MBHC cal data size use default cal\n",
8005 __func__);
8006 release_firmware(fw);
8007 } else {
8008 tabla->mbhc_cfg.calibration = (void *)fw->data;
8009 tabla->mbhc_fw = fw;
8010 }
8011
Joonwoo Park1305bab2012-05-21 15:08:42 -07008012 (void) tabla_mbhc_init_and_calibrate(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008013}
8014
Joonwoo Park03324832012-03-19 19:36:16 -07008015int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008016 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07008017{
8018 struct tabla_priv *tabla;
8019 int rc = 0;
8020
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008021 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07008022 pr_err("Error: no codec or calibration\n");
8023 return -EINVAL;
8024 }
8025
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008026 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
8027 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07008028 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008029 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07008030 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008031 pr_err("Error: unsupported clock rate %d\n",
8032 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07008033 return -EINVAL;
8034 }
8035
8036 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008037 tabla->mbhc_cfg = *cfg;
8038 tabla->in_gpio_handler = false;
8039 tabla->current_plug = PLUG_TYPE_NONE;
8040 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07008041 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
8042
8043 /* Put CFILT in fast mode by default */
8044 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
8045 0x40, TABLA_CFILT_FAST_MODE);
8046 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
8047 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
8048 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
8049 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
8050 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
8051
Joonwoo Park1305bab2012-05-21 15:08:42 -07008052 if (!tabla->mbhc_cfg.read_fw_bin)
8053 rc = tabla_mbhc_init_and_calibrate(tabla);
8054 else
Joonwoo Park03324832012-03-19 19:36:16 -07008055 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
8056 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008057
Joonwoo Park03324832012-03-19 19:36:16 -07008058 return rc;
8059}
8060EXPORT_SYMBOL_GPL(tabla_hs_detect);
8061
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008062static irqreturn_t tabla_slimbus_irq(int irq, void *data)
8063{
8064 struct tabla_priv *priv = data;
8065 struct snd_soc_codec *codec = priv->codec;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008066 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
8067 int i, j, port_id, k, ch_mask_temp;
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07008068 unsigned long slimbus_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008069 u8 val;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308070 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
8071 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008072 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
8073 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308074 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008075 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
8076 if (val & 0x1)
8077 pr_err_ratelimited("overflow error on port %x,"
8078 " value %x\n", i*8 + j, val);
8079 if (val & 0x2)
8080 pr_err_ratelimited("underflow error on port %x,"
8081 " value %x\n", i*8 + j, val);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008082 if (val & 0x4) {
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008083 port_id = i*8 + j;
8084 for (k = 0; k < ARRAY_SIZE(tabla_dai); k++) {
8085 ch_mask_temp = 1 << port_id;
Joonwoo Park9bbb4d12012-11-09 19:58:11 -08008086 pr_debug("%s: tabla_p->dai[%d].ch_mask = 0x%lx\n",
Kuirong Wang906ac472012-07-09 12:54:44 -07008087 __func__, k,
8088 tabla_p->dai[k].ch_mask);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008089 if (ch_mask_temp &
8090 tabla_p->dai[k].ch_mask) {
8091 tabla_p->dai[k].ch_mask &=
Kuirong Wang906ac472012-07-09 12:54:44 -07008092 ~ch_mask_temp;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008093 if (!tabla_p->dai[k].ch_mask)
Kuirong Wang906ac472012-07-09 12:54:44 -07008094 wake_up(
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008095 &tabla_p->dai[k].dai_wait);
8096 }
8097 }
8098 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008099 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308100 wcd9xxx_interface_reg_write(codec->control_data,
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07008101 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, slimbus_value);
8102 val = 0x0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008103 }
8104
8105 return IRQ_HANDLED;
8106}
8107
Patrick Lai3043fba2011-08-01 14:15:57 -07008108static int tabla_handle_pdata(struct tabla_priv *tabla)
8109{
8110 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308111 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07008112 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05308113 u8 leg_mode = pdata->amic_settings.legacy_mode;
8114 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
8115 u8 txfe_buff = pdata->amic_settings.txfe_buff;
8116 u8 flag = pdata->amic_settings.use_pdata;
8117 u8 i = 0, j = 0;
8118 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07008119
8120 if (!pdata) {
8121 rc = -ENODEV;
8122 goto done;
8123 }
8124
8125 /* Make sure settings are correct */
8126 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
8127 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
8128 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
8129 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
8130 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
8131 rc = -EINVAL;
8132 goto done;
8133 }
8134
8135 /* figure out k value */
8136 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
8137 pdata->micbias.cfilt1_mv);
8138 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
8139 pdata->micbias.cfilt2_mv);
8140 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
8141 pdata->micbias.cfilt3_mv);
8142
8143 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
8144 rc = -EINVAL;
8145 goto done;
8146 }
8147
8148 /* Set voltage level and always use LDO */
8149 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
8150 (pdata->micbias.ldoh_v << 2));
8151
8152 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
8153 (k1 << 2));
8154 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
8155 (k2 << 2));
8156 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
8157 (k3 << 2));
8158
8159 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
8160 (pdata->micbias.bias1_cfilt_sel << 5));
8161 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
8162 (pdata->micbias.bias2_cfilt_sel << 5));
8163 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
8164 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008165 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
8166 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07008167
Santosh Mardi22920282011-10-26 02:38:40 +05308168 for (i = 0; i < 6; j++, i += 2) {
8169 if (flag & (0x01 << i)) {
8170 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
8171 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
8172 val_txfe = val_txfe |
8173 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
8174 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
8175 0x10, value);
8176 snd_soc_update_bits(codec,
8177 TABLA_A_TX_1_2_TEST_EN + j * 10,
8178 0x30, val_txfe);
8179 }
8180 if (flag & (0x01 << (i + 1))) {
8181 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
8182 val_txfe = (txfe_bypass &
8183 (0x01 << (i + 1))) ? 0x02 : 0x00;
8184 val_txfe |= (txfe_buff &
8185 (0x01 << (i + 1))) ? 0x01 : 0x00;
8186 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
8187 0x01, value);
8188 snd_soc_update_bits(codec,
8189 TABLA_A_TX_1_2_TEST_EN + j * 10,
8190 0x03, val_txfe);
8191 }
8192 }
8193 if (flag & 0x40) {
8194 value = (leg_mode & 0x40) ? 0x10 : 0x00;
8195 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
8196 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
8197 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
8198 0x13, value);
8199 }
Patrick Lai49efeac2011-11-03 11:01:12 -07008200
8201 if (pdata->ocp.use_pdata) {
8202 /* not defined in CODEC specification */
8203 if (pdata->ocp.hph_ocp_limit == 1 ||
8204 pdata->ocp.hph_ocp_limit == 5) {
8205 rc = -EINVAL;
8206 goto done;
8207 }
8208 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
8209 0x0F, pdata->ocp.num_attempts);
8210 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
8211 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
8212 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
8213 0xE0, (pdata->ocp.hph_ocp_limit << 5));
8214 }
Joonwoo Park03324832012-03-19 19:36:16 -07008215
8216 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
8217 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
8218 if (pdata->regulator[i].min_uV == 1800000 &&
8219 pdata->regulator[i].max_uV == 1800000) {
8220 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
8221 0x1C);
8222 } else if (pdata->regulator[i].min_uV == 2200000 &&
8223 pdata->regulator[i].max_uV == 2200000) {
8224 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
8225 0x1E);
8226 } else {
8227 pr_err("%s: unsupported CDC_VDDA_RX voltage "
8228 "min %d, max %d\n", __func__,
8229 pdata->regulator[i].min_uV,
8230 pdata->regulator[i].max_uV);
8231 rc = -EINVAL;
8232 }
8233 break;
8234 }
8235 }
Patrick Lai3043fba2011-08-01 14:15:57 -07008236done:
8237 return rc;
8238}
8239
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008240static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
8241
8242 /* Tabla 1.1 MICBIAS changes */
8243 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
8244 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
8245 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008246
8247 /* Tabla 1.1 HPH changes */
8248 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
8249 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
8250
8251 /* Tabla 1.1 EAR PA changes */
8252 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
8253 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
8254 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
8255
8256 /* Tabla 1.1 Lineout_5 Changes */
8257 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
8258
8259 /* Tabla 1.1 RX Changes */
8260 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
8261 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
8262 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
8263 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
8264 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
8265 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
8266 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
8267
8268 /* Tabla 1.1 RX1 and RX2 Changes */
8269 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
8270 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
8271
8272 /* Tabla 1.1 RX3 to RX7 Changes */
8273 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
8274 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
8275 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
8276 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
8277 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
8278
8279 /* Tabla 1.1 CLASSG Changes */
8280 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
8281};
8282
8283static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008284 /* Tabla 2.0 MICBIAS changes */
8285 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
8286};
8287
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008288static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
8289 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
8290};
8291
8292static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
8293 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
8294};
8295
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008296static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
8297{
8298 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308299 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008300
8301 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
8302 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
8303 tabla_1_1_reg_defaults[i].val);
8304
8305 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
8306 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
8307 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008308
8309 if (TABLA_IS_1_X(tabla_core->version)) {
8310 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
8311 i++)
8312 snd_soc_write(codec,
8313 tabla_1_x_only_reg_2_0_defaults[i].reg,
8314 tabla_1_x_only_reg_2_0_defaults[i].val);
8315 } else {
8316 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
8317 snd_soc_write(codec,
8318 tabla_2_only_reg_2_0_defaults[i].reg,
8319 tabla_2_only_reg_2_0_defaults[i].val);
8320 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008321}
8322
8323static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08008324 /* Initialize current threshold to 350MA
8325 * number of wait and run cycles to 4096
8326 */
Patrick Lai49efeac2011-11-03 11:01:12 -07008327 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08008328 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008329
Santosh Mardi32171012011-10-28 23:32:06 +05308330 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
8331
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008332 /* Initialize gain registers to use register gain */
8333 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
8334 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
8335 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
8336 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
8337 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
8338 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
8339
Kuirong Wangccb29c62012-06-15 11:09:07 -07008340 /* Set the MICBIAS default output as pull down*/
8341 {TABLA_A_MICB_1_CTL, 0x01, 0x01},
8342 {TABLA_A_MICB_2_CTL, 0x01, 0x01},
8343 {TABLA_A_MICB_3_CTL, 0x01, 0x01},
8344
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008345 /* Initialize mic biases to differential mode */
8346 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
8347 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
8348 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008349
8350 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
8351
8352 /* Use 16 bit sample size for TX1 to TX6 */
8353 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
8354 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
8355 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
8356 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
8357 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
8358 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
8359
8360 /* Use 16 bit sample size for TX7 to TX10 */
8361 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
8362 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
8363 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
8364 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
8365
8366 /* Use 16 bit sample size for RX */
8367 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
8368 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
8369
8370 /*enable HPF filter for TX paths */
8371 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
8372 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
8373 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
8374 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
8375 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
8376 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
8377 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
8378 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
8379 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
8380 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
Kiran Kandi0ba468f2012-05-08 11:45:05 -07008381
8382 /* config Decimator for DMIC CLK_MODE_1(3.072Mhz@12.88Mhz mclk) */
8383 {TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0x1},
8384 {TABLA_A_CDC_TX2_DMIC_CTL, 0x1, 0x1},
8385 {TABLA_A_CDC_TX3_DMIC_CTL, 0x1, 0x1},
8386 {TABLA_A_CDC_TX4_DMIC_CTL, 0x1, 0x1},
8387 {TABLA_A_CDC_TX5_DMIC_CTL, 0x1, 0x1},
8388 {TABLA_A_CDC_TX6_DMIC_CTL, 0x1, 0x1},
8389 {TABLA_A_CDC_TX7_DMIC_CTL, 0x1, 0x1},
8390 {TABLA_A_CDC_TX8_DMIC_CTL, 0x1, 0x1},
8391 {TABLA_A_CDC_TX9_DMIC_CTL, 0x1, 0x1},
8392 {TABLA_A_CDC_TX10_DMIC_CTL, 0x1, 0x1},
8393
8394 /* config DMIC clk to CLK_MODE_1 (3.072Mhz@12.88Mhz mclk) */
8395 {TABLA_A_CDC_CLK_DMIC_CTL, 0x2A, 0x2A},
8396
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008397};
8398
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008399static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07008400 /* Set the MICBIAS default output as pull down*/
8401 {TABLA_1_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008402 /* Initialize mic biases to differential mode */
8403 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
8404};
8405
8406static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07008407
8408 /* Set the MICBIAS default output as pull down*/
8409 {TABLA_2_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008410 /* Initialize mic biases to differential mode */
8411 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
8412};
8413
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008414static void tabla_codec_init_reg(struct snd_soc_codec *codec)
8415{
8416 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308417 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008418
8419 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
8420 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
8421 tabla_codec_reg_init_val[i].mask,
8422 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008423 if (TABLA_IS_1_X(tabla_core->version)) {
8424 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
8425 snd_soc_update_bits(codec,
8426 tabla_1_x_codec_reg_init_val[i].reg,
8427 tabla_1_x_codec_reg_init_val[i].mask,
8428 tabla_1_x_codec_reg_init_val[i].val);
8429 } else {
8430 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
8431 i++)
8432 snd_soc_update_bits(codec,
8433 tabla_2_higher_codec_reg_init_val[i].reg,
8434 tabla_2_higher_codec_reg_init_val[i].mask,
8435 tabla_2_higher_codec_reg_init_val[i].val);
8436 }
8437}
8438
8439static void tabla_update_reg_address(struct tabla_priv *priv)
8440{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308441 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008442 struct tabla_reg_address *reg_addr = &priv->reg_addr;
8443
8444 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08008445 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
8446 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008447 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008448 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08008449 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
8450 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008451 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008452 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07008453}
8454
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008455#ifdef CONFIG_DEBUG_FS
8456static int codec_debug_open(struct inode *inode, struct file *file)
8457{
8458 file->private_data = inode->i_private;
8459 return 0;
8460}
8461
8462static ssize_t codec_debug_write(struct file *filp,
8463 const char __user *ubuf, size_t cnt, loff_t *ppos)
8464{
8465 char lbuf[32];
8466 char *buf;
8467 int rc;
8468 struct tabla_priv *tabla = filp->private_data;
8469
8470 if (cnt > sizeof(lbuf) - 1)
8471 return -EINVAL;
8472
8473 rc = copy_from_user(lbuf, ubuf, cnt);
8474 if (rc)
8475 return -EFAULT;
8476
8477 lbuf[cnt] = '\0';
8478 buf = (char *)lbuf;
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07008479 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
8480 tabla->no_mic_headset_override =
8481 (*strsep(&buf, " ") == '0') ? false : true;
8482 if (tabla->no_mic_headset_override && tabla->mbhc_polling_active) {
8483 tabla_codec_pause_hs_polling(tabla->codec);
8484 tabla_codec_start_hs_polling(tabla->codec);
8485 }
8486 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8487 return cnt;
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008488}
8489
8490static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
8491 size_t count, loff_t *pos)
8492{
8493 const int size = 768;
8494 char buffer[size];
8495 int n = 0;
8496 struct tabla_priv *tabla = file->private_data;
8497 struct snd_soc_codec *codec = tabla->codec;
8498 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008499 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
8500 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008501
8502 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
8503 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
8504 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
8505 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
8506 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
8507 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
8508 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
8509 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
8510 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
8511 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
8512 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
8513 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008514 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008515 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008516 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
8517 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
8518 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
8519 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
8520 p->v_ins_h == v_ins_h_cur ? "*" : "");
8521 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
8522 p->adj_v_ins_hu,
8523 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
8524 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
8525 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
8526 p->adj_v_ins_h,
8527 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
8528 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008529 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
8530 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
8531 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
8532 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
8533 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
8534 p->v_b1_huc,
8535 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
8536 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
8537 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
8538 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
8539 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
8540 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
8541 p->v_no_mic,
8542 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
8543 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
8544 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
8545 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07008546 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
8547 p->v_inval_ins_low);
8548 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
8549 p->v_inval_ins_high);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07008550 if (tabla->mbhc_cfg.gpio)
8551 n += scnprintf(buffer + n, size - n, "GPIO insert = %d\n",
8552 tabla_hs_gpio_level_remove(tabla));
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008553 buffer[n] = 0;
8554
8555 return simple_read_from_buffer(buf, count, pos, buffer, n);
8556}
8557
8558static const struct file_operations codec_debug_ops = {
8559 .open = codec_debug_open,
8560 .write = codec_debug_write,
8561};
8562
8563static const struct file_operations codec_mbhc_debug_ops = {
8564 .open = codec_debug_open,
8565 .read = codec_mbhc_debug_read,
8566};
8567#endif
8568
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008569static int tabla_codec_probe(struct snd_soc_codec *codec)
8570{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308571 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008572 struct tabla_priv *tabla;
8573 struct snd_soc_dapm_context *dapm = &codec->dapm;
8574 int ret = 0;
8575 int i;
Kuirong Wang906ac472012-07-09 12:54:44 -07008576 void *ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008577
8578 codec->control_data = dev_get_drvdata(codec->dev->parent);
8579 control = codec->control_data;
8580
8581 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
8582 if (!tabla) {
8583 dev_err(codec->dev, "Failed to allocate private data\n");
8584 return -ENOMEM;
8585 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08008586 for (i = 0 ; i < NUM_DECIMATORS; i++) {
8587 tx_hpf_work[i].tabla = tabla;
8588 tx_hpf_work[i].decimator = i + 1;
8589 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
8590 tx_hpf_corner_freq_callback);
8591 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008592
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008593 /* Make sure mbhc micbias register addresses are zeroed out */
8594 memset(&tabla->mbhc_bias_regs, 0,
8595 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07008596 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07008597
Joonwoo Park0976d012011-12-22 11:48:18 -08008598 /* Make sure mbhc intenal calibration data is zeroed out */
8599 memset(&tabla->mbhc_data, 0,
8600 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08008601 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08008602 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
8603 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008604 snd_soc_codec_set_drvdata(codec, tabla);
8605
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07008606 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008607 tabla->bandgap_type = TABLA_BANDGAP_OFF;
8608 tabla->clock_active = false;
8609 tabla->config_mode_active = false;
8610 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08008611 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07008612 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008613 tabla->hs_polling_irq_prepared = false;
8614 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008615 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008616 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07008617 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08008618 for (i = 0; i < COMPANDER_MAX; i++) {
8619 tabla->comp_enabled[i] = 0;
8620 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
8621 }
Patrick Lai3043fba2011-08-01 14:15:57 -07008622 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308623 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08008624 tabla->aux_pga_cnt = 0;
8625 tabla->aux_l_gain = 0x1F;
8626 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008627 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05308628 tabla_update_reg_defaults(codec);
8629 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05308630 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07008631 if (IS_ERR_VALUE(ret)) {
8632 pr_err("%s: bad pdata\n", __func__);
8633 goto err_pdata;
8634 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008635
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008636 if (TABLA_IS_1_X(control->version))
Steve Mucklef132c6c2012-06-06 18:30:57 -07008637 snd_soc_add_codec_controls(codec, tabla_1_x_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008638 ARRAY_SIZE(tabla_1_x_snd_controls));
8639 else
Steve Mucklef132c6c2012-06-06 18:30:57 -07008640 snd_soc_add_codec_controls(codec, tabla_2_higher_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008641 ARRAY_SIZE(tabla_2_higher_snd_controls));
8642
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008643 if (TABLA_IS_1_X(control->version))
8644 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
8645 ARRAY_SIZE(tabla_1_x_dapm_widgets));
8646 else
8647 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
8648 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
8649
Kuirong Wang906ac472012-07-09 12:54:44 -07008650
8651 ptr = kmalloc((sizeof(tabla_rx_chs) +
8652 sizeof(tabla_tx_chs)), GFP_KERNEL);
8653 if (!ptr) {
8654 pr_err("%s: no mem for slim chan ctl data\n", __func__);
8655 ret = -ENOMEM;
8656 goto err_nomem_slimch;
8657 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308658 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05308659 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
8660 ARRAY_SIZE(tabla_dapm_i2s_widgets));
8661 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
8662 ARRAY_SIZE(audio_i2s_map));
Kuirong Wang906ac472012-07-09 12:54:44 -07008663 for (i = 0; i < ARRAY_SIZE(tabla_i2s_dai); i++)
8664 INIT_LIST_HEAD(&tabla->dai[i].wcd9xxx_ch_list);
8665 } else if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
8666 for (i = 0; i < NUM_CODEC_DAIS; i++) {
8667 INIT_LIST_HEAD(&tabla->dai[i].wcd9xxx_ch_list);
8668 init_waitqueue_head(&tabla->dai[i].dai_wait);
8669 }
Santosh Mardie15e2302011-11-15 10:39:23 +05308670 }
Kuirong Wang906ac472012-07-09 12:54:44 -07008671
8672 control->num_rx_port = TABLA_RX_MAX;
8673 control->rx_chs = ptr;
8674 memcpy(control->rx_chs, tabla_rx_chs, sizeof(tabla_rx_chs));
8675 control->num_tx_port = TABLA_TX_MAX;
8676 control->tx_chs = ptr + sizeof(tabla_rx_chs);
8677 memcpy(control->tx_chs, tabla_tx_chs, sizeof(tabla_tx_chs));
8678
Kiran Kandi8b3a8302011-09-27 16:13:28 -07008679
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008680 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008681 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008682 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
8683 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008684 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08008685 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008686 } else {
8687 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308688 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08008689 goto err_pdata;
8690 }
8691
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008692 snd_soc_dapm_sync(dapm);
8693
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008694 ret = wcd9xxx_request_irq(codec->control_data,
8695 WCD9XXX_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008696 tabla_hs_insert_irq, "Headset insert detect", tabla);
8697 if (ret) {
8698 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008699 WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008700 goto err_insert_irq;
8701 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008702 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008703
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008704 ret = wcd9xxx_request_irq(codec->control_data,
8705 WCD9XXX_IRQ_MBHC_REMOVAL,
8706 tabla_hs_remove_irq,
8707 "Headset remove detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008708 if (ret) {
8709 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008710 WCD9XXX_IRQ_MBHC_REMOVAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008711 goto err_remove_irq;
8712 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008713
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008714 ret = wcd9xxx_request_irq(codec->control_data,
8715 WCD9XXX_IRQ_MBHC_POTENTIAL,
8716 tabla_dce_handler, "DC Estimation detect",
8717 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008718 if (ret) {
8719 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008720 WCD9XXX_IRQ_MBHC_POTENTIAL);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008721 goto err_potential_irq;
8722 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008723
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008724 ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE,
8725 tabla_release_handler,
8726 "Button Release detect", tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008727 if (ret) {
8728 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008729 WCD9XXX_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008730 goto err_release_irq;
8731 }
8732
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008733 ret = wcd9xxx_request_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS,
8734 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008735 if (ret) {
8736 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008737 WCD9XXX_IRQ_SLIMBUS);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008738 goto err_slimbus_irq;
8739 }
8740
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308741 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
8742 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008743 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
8744
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308745 ret = wcd9xxx_request_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008746 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
8747 tabla_hphl_ocp_irq,
8748 "HPH_L OCP detect", tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008749 if (ret) {
8750 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008751 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008752 goto err_hphl_ocp_irq;
8753 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008754 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008755
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308756 ret = wcd9xxx_request_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008757 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT,
8758 tabla_hphr_ocp_irq,
8759 "HPH_R OCP detect", tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008760 if (ret) {
8761 pr_err("%s: Failed to request irq %d\n", __func__,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008762 WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008763 goto err_hphr_ocp_irq;
8764 }
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008765 wcd9xxx_disable_irq(codec->control_data, WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008766
8767 /*
8768 * Register suspend lock and notifier to resend edge triggered
8769 * gpio IRQs
8770 */
8771 wake_lock_init(&tabla->irq_resend_wlock, WAKE_LOCK_SUSPEND,
8772 "tabla_gpio_irq_resend");
8773 tabla->gpio_irq_resend = false;
8774
Damir Didjustoc6f83cb2012-12-03 00:54:14 -08008775 mutex_lock(&dapm->codec->mutex);
8776 snd_soc_dapm_disable_pin(dapm, "ANC HPHL");
8777 snd_soc_dapm_disable_pin(dapm, "ANC HPHR");
8778 snd_soc_dapm_disable_pin(dapm, "ANC HEADPHONE");
8779 snd_soc_dapm_sync(dapm);
8780 mutex_unlock(&dapm->codec->mutex);
Patrick Lai49efeac2011-11-03 11:01:12 -07008781
Bradley Rubincb3950a2011-08-18 13:07:26 -07008782#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008783 if (ret == 0) {
8784 tabla->debugfs_poke =
8785 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
8786 &codec_debug_ops);
8787 tabla->debugfs_mbhc =
8788 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
8789 NULL, tabla, &codec_mbhc_debug_ops);
8790 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07008791#endif
Steve Mucklef132c6c2012-06-06 18:30:57 -07008792 codec->ignore_pmdown_time = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008793 return ret;
8794
Patrick Lai49efeac2011-11-03 11:01:12 -07008795err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308796 wcd9xxx_free_irq(codec->control_data,
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008797 WCD9XXX_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008798err_hphl_ocp_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008799 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008800err_slimbus_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008801 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008802err_release_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008803 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL,
8804 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008805err_potential_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008806 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008807err_remove_irq:
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008808 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION,
8809 tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008810err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07008811err_pdata:
Kuirong Wang906ac472012-07-09 12:54:44 -07008812 kfree(ptr);
8813err_nomem_slimch:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008814 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008815 kfree(tabla);
8816 return ret;
8817}
8818static int tabla_codec_remove(struct snd_soc_codec *codec)
8819{
8820 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008821
8822 wake_lock_destroy(&tabla->irq_resend_wlock);
8823
Joonwoo Parkf6574c72012-10-10 17:29:57 -07008824 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_SLIMBUS, tabla);
8825 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_RELEASE, tabla);
8826 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL,
8827 tabla);
8828 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_REMOVAL, tabla);
8829 wcd9xxx_free_irq(codec->control_data, WCD9XXX_IRQ_MBHC_INSERTION,
8830 tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008831 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008832 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008833 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008834 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08008835 if (tabla->mbhc_fw)
8836 release_firmware(tabla->mbhc_fw);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008837 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008838#ifdef CONFIG_DEBUG_FS
8839 debugfs_remove(tabla->debugfs_poke);
8840 debugfs_remove(tabla->debugfs_mbhc);
8841#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008842 kfree(tabla);
8843 return 0;
8844}
8845static struct snd_soc_codec_driver soc_codec_dev_tabla = {
8846 .probe = tabla_codec_probe,
8847 .remove = tabla_codec_remove,
8848 .read = tabla_read,
8849 .write = tabla_write,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008850 .readable_register = tabla_readable,
8851 .volatile_register = tabla_volatile,
8852
8853 .reg_cache_size = TABLA_CACHE_SIZE,
8854 .reg_cache_default = tabla_reg_defaults,
8855 .reg_word_size = 1,
Steve Mucklef132c6c2012-06-06 18:30:57 -07008856 .controls = tabla_snd_controls,
8857 .num_controls = ARRAY_SIZE(tabla_snd_controls),
8858 .dapm_widgets = tabla_dapm_widgets,
8859 .num_dapm_widgets = ARRAY_SIZE(tabla_dapm_widgets),
8860 .dapm_routes = audio_map,
8861 .num_dapm_routes = ARRAY_SIZE(audio_map),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008862};
Bradley Rubincb3950a2011-08-18 13:07:26 -07008863
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008864#ifdef CONFIG_PM
8865static int tabla_suspend(struct device *dev)
8866{
Joonwoo Park816b8e62012-01-23 16:03:21 -08008867 dev_dbg(dev, "%s: system suspend\n", __func__);
8868 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008869}
8870
8871static int tabla_resume(struct device *dev)
8872{
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008873 int irq;
Joonwoo Park03324832012-03-19 19:36:16 -07008874 struct platform_device *pdev = to_platform_device(dev);
8875 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008876
Joonwoo Parkd6e48bd2012-09-20 11:14:15 -07008877 dev_dbg(dev, "%s: system resume tabla %p\n", __func__, tabla);
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008878 if (tabla) {
8879 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Parkd6e48bd2012-09-20 11:14:15 -07008880 tabla->mbhc_last_resume = jiffies;
Joonwoo Parkecf379c2012-10-04 16:57:52 -07008881 if (tabla->gpio_irq_resend) {
8882 WARN_ON(!tabla->mbhc_cfg.gpio_irq);
8883 tabla->gpio_irq_resend = false;
8884
8885 irq = tabla->mbhc_cfg.gpio_irq;
8886 pr_debug("%s: Resending GPIO IRQ %d\n", __func__, irq);
8887 irq_set_pending(irq);
8888 check_irq_resend(irq_to_desc(irq), irq);
8889
8890 /* release suspend lock */
8891 wake_unlock(&tabla->irq_resend_wlock);
8892 }
8893 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
8894 }
8895
Joonwoo Park816b8e62012-01-23 16:03:21 -08008896 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008897}
8898
8899static const struct dev_pm_ops tabla_pm_ops = {
8900 .suspend = tabla_suspend,
8901 .resume = tabla_resume,
8902};
8903#endif
8904
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008905static int __devinit tabla_probe(struct platform_device *pdev)
8906{
Santosh Mardie15e2302011-11-15 10:39:23 +05308907 int ret = 0;
Steve Mucklef132c6c2012-06-06 18:30:57 -07008908 pr_err("tabla_probe\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308909 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05308910 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8911 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308912 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05308913 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8914 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
8915 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008916}
8917static int __devexit tabla_remove(struct platform_device *pdev)
8918{
8919 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008920 return 0;
8921}
8922static struct platform_driver tabla_codec_driver = {
8923 .probe = tabla_probe,
8924 .remove = tabla_remove,
8925 .driver = {
8926 .name = "tabla_codec",
8927 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008928#ifdef CONFIG_PM
8929 .pm = &tabla_pm_ops,
8930#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008931 },
8932};
8933
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008934static struct platform_driver tabla1x_codec_driver = {
8935 .probe = tabla_probe,
8936 .remove = tabla_remove,
8937 .driver = {
8938 .name = "tabla1x_codec",
8939 .owner = THIS_MODULE,
8940#ifdef CONFIG_PM
8941 .pm = &tabla_pm_ops,
8942#endif
8943 },
8944};
8945
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008946static int __init tabla_codec_init(void)
8947{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008948 int rtn = platform_driver_register(&tabla_codec_driver);
8949 if (rtn == 0) {
8950 rtn = platform_driver_register(&tabla1x_codec_driver);
8951 if (rtn != 0)
8952 platform_driver_unregister(&tabla_codec_driver);
8953 }
8954 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008955}
8956
8957static void __exit tabla_codec_exit(void)
8958{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008959 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008960 platform_driver_unregister(&tabla_codec_driver);
8961}
8962
8963module_init(tabla_codec_init);
8964module_exit(tabla_codec_exit);
8965
8966MODULE_DESCRIPTION("Tabla codec driver");
8967MODULE_VERSION("1.0");
8968MODULE_LICENSE("GPL v2");