buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 The Android Open Source Project |
| 3 | * |
| 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | * you may not use this file except in compliance with the License. |
| 6 | * You may obtain a copy of the License at |
| 7 | * |
| 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | * |
| 10 | * Unless required by applicable law or agreed to in writing, software |
| 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | * See the License for the specific language governing permissions and |
| 14 | * limitations under the License. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ART_SRC_COMPILER_COMPILER_IR_H_ |
| 18 | #define ART_SRC_COMPILER_COMPILER_IR_H_ |
| 19 | |
| 20 | #include "codegen/Optimizer.h" |
Ian Rogers | 1bddec3 | 2012-02-04 12:27:34 -0800 | [diff] [blame] | 21 | #include "CompilerUtility.h" |
buzbee | c143c55 | 2011-08-20 17:38:58 -0700 | [diff] [blame] | 22 | #include <vector> |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 23 | |
Elliott Hughes | 11d1b0c | 2012-01-23 16:57:47 -0800 | [diff] [blame] | 24 | namespace art { |
| 25 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 26 | typedef enum RegisterClass { |
| 27 | kCoreReg, |
| 28 | kFPReg, |
| 29 | kAnyReg, |
| 30 | } RegisterClass; |
| 31 | |
| 32 | typedef enum RegLocationType { |
| 33 | kLocDalvikFrame = 0, // Normal Dalvik register |
| 34 | kLocPhysReg, |
| 35 | kLocSpill, |
| 36 | } RegLocationType; |
| 37 | |
buzbee | 67bc236 | 2011-10-11 18:08:40 -0700 | [diff] [blame] | 38 | typedef struct PromotionMap { |
| 39 | RegLocationType coreLocation:3; |
| 40 | u1 coreReg; |
| 41 | RegLocationType fpLocation:3; |
| 42 | u1 fpReg; |
| 43 | bool firstInPair; |
| 44 | } PromotionMap; |
| 45 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 46 | typedef struct RegLocation { |
buzbee | 67bc236 | 2011-10-11 18:08:40 -0700 | [diff] [blame] | 47 | RegLocationType location:3; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 48 | unsigned wide:1; |
buzbee | 67bc236 | 2011-10-11 18:08:40 -0700 | [diff] [blame] | 49 | unsigned defined:1; // Do we know the type? |
| 50 | unsigned fp:1; // Floating point? |
| 51 | unsigned core:1; // Non-floating point? |
| 52 | unsigned highWord:1; // High word of pair? |
| 53 | unsigned home:1; // Does this represent the home location? |
| 54 | u1 lowReg; // First physical register |
| 55 | u1 highReg; // 2nd physical register (if wide) |
| 56 | s2 sRegLow; // SSA name for low Dalvik word |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 57 | } RegLocation; |
| 58 | |
| 59 | #define INVALID_SREG (-1) |
buzbee | 3ddc0d1 | 2011-10-05 10:36:21 -0700 | [diff] [blame] | 60 | #define INVALID_VREG (0xFFFFU) |
buzbee | 67bc236 | 2011-10-11 18:08:40 -0700 | [diff] [blame] | 61 | #define INVALID_REG (0xFF) |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 62 | #define INVALID_OFFSET (-1) |
| 63 | |
buzbee | 99ba964 | 2012-01-25 14:23:14 -0800 | [diff] [blame] | 64 | /* |
| 65 | * Some code patterns cause the generation of excessively large |
| 66 | * methods - in particular initialization sequences. There isn't much |
| 67 | * benefit in optimizing these methods, and the cost can be very high. |
| 68 | * We attempt to identify these cases, and avoid performing most dataflow |
| 69 | * analysis. Two thresholds are used - one for known initializers and one |
buzbee | 5abfa3e | 2012-01-31 17:01:43 -0800 | [diff] [blame] | 70 | * for everything else. |
buzbee | 99ba964 | 2012-01-25 14:23:14 -0800 | [diff] [blame] | 71 | */ |
buzbee | 5abfa3e | 2012-01-31 17:01:43 -0800 | [diff] [blame] | 72 | #define MANY_BLOCKS_INITIALIZER 1000 /* Threshold for switching dataflow off */ |
| 73 | #define MANY_BLOCKS 4000 /* Non-initializer threshold */ |
buzbee | 99ba964 | 2012-01-25 14:23:14 -0800 | [diff] [blame] | 74 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 75 | typedef enum BBType { |
| 76 | kEntryBlock, |
| 77 | kDalvikByteCode, |
| 78 | kExitBlock, |
| 79 | kExceptionHandling, |
| 80 | kCatchEntry, |
| 81 | } BBType; |
| 82 | |
| 83 | typedef struct LIR { |
| 84 | int offset; // Offset of this instruction |
| 85 | int dalvikOffset; // Offset of Dalvik opcode |
| 86 | struct LIR* next; |
| 87 | struct LIR* prev; |
| 88 | struct LIR* target; |
| 89 | } LIR; |
| 90 | |
| 91 | enum ExtendedMIROpcode { |
| 92 | kMirOpFirst = kNumPackedOpcodes, |
| 93 | kMirOpPhi = kMirOpFirst, |
| 94 | kMirOpNullNRangeUpCheck, |
| 95 | kMirOpNullNRangeDownCheck, |
| 96 | kMirOpLowerBound, |
| 97 | kMirOpPunt, |
| 98 | kMirOpCheckInlinePrediction, // Gen checks for predicted inlining |
| 99 | kMirOpLast, |
| 100 | }; |
| 101 | |
| 102 | struct SSARepresentation; |
| 103 | |
| 104 | typedef enum { |
| 105 | kMIRIgnoreNullCheck = 0, |
| 106 | kMIRNullCheckOnly, |
| 107 | kMIRIgnoreRangeCheck, |
| 108 | kMIRRangeCheckOnly, |
| 109 | kMIRInlined, // Invoke is inlined (ie dead) |
| 110 | kMIRInlinedPred, // Invoke is inlined via prediction |
| 111 | kMIRCallee, // Instruction is inlined from callee |
buzbee | c1f4504 | 2011-09-21 16:03:19 -0700 | [diff] [blame] | 112 | kMIRIgnoreSuspendCheck, |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 113 | } MIROptimizationFlagPositons; |
| 114 | |
| 115 | #define MIR_IGNORE_NULL_CHECK (1 << kMIRIgnoreNullCheck) |
| 116 | #define MIR_NULL_CHECK_ONLY (1 << kMIRNullCheckOnly) |
| 117 | #define MIR_IGNORE_RANGE_CHECK (1 << kMIRIgnoreRangeCheck) |
| 118 | #define MIR_RANGE_CHECK_ONLY (1 << kMIRRangeCheckOnly) |
| 119 | #define MIR_INLINED (1 << kMIRInlined) |
| 120 | #define MIR_INLINED_PRED (1 << kMIRInlinedPred) |
| 121 | #define MIR_CALLEE (1 << kMIRCallee) |
buzbee | c1f4504 | 2011-09-21 16:03:19 -0700 | [diff] [blame] | 122 | #define MIR_IGNORE_SUSPEND_CHECK (1 << kMIRIgnoreSuspendCheck) |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 123 | |
| 124 | typedef struct CallsiteInfo { |
| 125 | const char* classDescriptor; |
| 126 | Object* classLoader; |
| 127 | const Method* method; |
| 128 | LIR* misPredBranchOver; |
| 129 | } CallsiteInfo; |
| 130 | |
| 131 | typedef struct MIR { |
| 132 | DecodedInstruction dalvikInsn; |
| 133 | unsigned int width; |
| 134 | unsigned int offset; |
| 135 | struct MIR* prev; |
| 136 | struct MIR* next; |
| 137 | struct SSARepresentation* ssaRep; |
buzbee | 43a3642 | 2011-09-14 14:00:13 -0700 | [diff] [blame] | 138 | int optimizationFlags; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 139 | int seqNum; |
| 140 | union { |
| 141 | // Used by the inlined insn from the callee to find the mother method |
| 142 | const Method* calleeMethod; |
| 143 | // Used by the inlined invoke to find the class and method pointers |
| 144 | CallsiteInfo* callsiteInfo; |
buzbee | c0ecd65 | 2011-09-25 18:11:54 -0700 | [diff] [blame] | 145 | // Used to quickly locate all Phi opcodes |
| 146 | struct MIR* phiNext; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 147 | } meta; |
| 148 | } MIR; |
| 149 | |
| 150 | struct BasicBlockDataFlow; |
| 151 | |
| 152 | /* For successorBlockList */ |
| 153 | typedef enum BlockListType { |
| 154 | kNotUsed = 0, |
| 155 | kCatch, |
| 156 | kPackedSwitch, |
| 157 | kSparseSwitch, |
| 158 | } BlockListType; |
| 159 | |
| 160 | typedef struct BasicBlock { |
| 161 | int id; |
buzbee | 5b53710 | 2012-01-17 17:33:47 -0800 | [diff] [blame] | 162 | int dfsId; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 163 | bool visited; |
| 164 | bool hidden; |
buzbee | 43a3642 | 2011-09-14 14:00:13 -0700 | [diff] [blame] | 165 | bool catchEntry; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 166 | unsigned int startOffset; |
| 167 | const Method* containingMethod; // For blocks from the callee |
| 168 | BBType blockType; |
| 169 | bool needFallThroughBranch; // For blocks ended due to length limit |
| 170 | bool isFallThroughFromInvoke; // True means the block needs alignment |
| 171 | MIR* firstMIRInsn; |
| 172 | MIR* lastMIRInsn; |
| 173 | struct BasicBlock* fallThrough; |
| 174 | struct BasicBlock* taken; |
| 175 | struct BasicBlock* iDom; // Immediate dominator |
| 176 | struct BasicBlockDataFlow* dataFlowInfo; |
buzbee | 5abfa3e | 2012-01-31 17:01:43 -0800 | [diff] [blame] | 177 | GrowableList* predecessors; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 178 | ArenaBitVector* dominators; |
| 179 | ArenaBitVector* iDominated; // Set nodes being immediately dominated |
| 180 | ArenaBitVector* domFrontier; // Dominance frontier |
| 181 | struct { // For one-to-many successors like |
| 182 | BlockListType blockListType; // switch and exception handling |
| 183 | GrowableList blocks; |
| 184 | } successorBlockList; |
| 185 | } BasicBlock; |
| 186 | |
| 187 | /* |
| 188 | * The "blocks" field in "successorBlockList" points to an array of |
| 189 | * elements with the type "SuccessorBlockInfo". |
| 190 | * For catch blocks, key is type index for the exception. |
| 191 | * For swtich blocks, key is the case value. |
| 192 | */ |
| 193 | typedef struct SuccessorBlockInfo { |
| 194 | BasicBlock* block; |
| 195 | int key; |
| 196 | } SuccessorBlockInfo; |
| 197 | |
| 198 | struct LoopAnalysis; |
| 199 | struct RegisterPool; |
buzbee | ba938cb | 2012-02-03 14:47:55 -0800 | [diff] [blame] | 200 | struct ArenaMemBlock; |
| 201 | struct Memstats; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 202 | |
| 203 | typedef enum AssemblerStatus { |
| 204 | kSuccess, |
| 205 | kRetryAll, |
| 206 | kRetryHalve |
| 207 | } AssemblerStatus; |
| 208 | |
buzbee | 5b53710 | 2012-01-17 17:33:47 -0800 | [diff] [blame] | 209 | #define NOTVISITED (-1) |
| 210 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 211 | typedef struct CompilationUnit { |
| 212 | int numInsts; |
| 213 | int numBlocks; |
| 214 | GrowableList blockList; |
Ian Rogers | a3760aa | 2011-11-14 14:32:37 -0800 | [diff] [blame] | 215 | const Compiler* compiler; // Compiler driving this compiler |
Elliott Hughes | 11d1b0c | 2012-01-23 16:57:47 -0800 | [diff] [blame] | 216 | ClassLinker* class_linker; // Linker to resolve fields and methods |
| 217 | const DexFile* dex_file; // DexFile containing the method being compiled |
| 218 | DexCache* dex_cache; // DexFile's corresponding cache |
| 219 | const ClassLoader* class_loader; // compiling method's class loader |
Ian Rogers | a3760aa | 2011-11-14 14:32:37 -0800 | [diff] [blame] | 220 | uint32_t method_idx; // compiling method's index into method_ids of DexFile |
Elliott Hughes | 11d1b0c | 2012-01-23 16:57:47 -0800 | [diff] [blame] | 221 | const DexFile::CodeItem* code_item; // compiling method's DexFile code_item |
Ian Rogers | a3760aa | 2011-11-14 14:32:37 -0800 | [diff] [blame] | 222 | uint32_t access_flags; // compiling method's access flags |
| 223 | const char* shorty; // compiling method's shorty |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 224 | LIR* firstLIRInsn; |
| 225 | LIR* lastLIRInsn; |
| 226 | LIR* literalList; // Constants |
| 227 | LIR* classPointerList; // Relocatable |
| 228 | int numClassPointers; |
| 229 | LIR* chainCellOffsetLIR; |
buzbee | ce30293 | 2011-10-04 14:32:18 -0700 | [diff] [blame] | 230 | uint32_t disableOpt; // optControlVector flags |
| 231 | uint32_t enableDebug; // debugControlVector flags |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 232 | int headerSize; // bytes before the first code ptr |
| 233 | int dataOffset; // starting offset of literal pool |
| 234 | int totalSize; // header + code size |
| 235 | AssemblerStatus assemblerStatus; // Success or fix and retry |
| 236 | int assemblerRetries; |
Brian Carlstrom | e7d856b | 2012-01-11 18:10:55 -0800 | [diff] [blame] | 237 | std::vector<uint16_t> codeBuffer; |
buzbee | 4ef7652 | 2011-09-08 10:00:32 -0700 | [diff] [blame] | 238 | std::vector<uint32_t> mappingTable; |
buzbee | 3ddc0d1 | 2011-10-05 10:36:21 -0700 | [diff] [blame] | 239 | std::vector<uint16_t> coreVmapTable; |
| 240 | std::vector<uint16_t> fpVmapTable; |
buzbee | 44b412b | 2012-02-04 08:50:53 -0800 | [diff] [blame^] | 241 | bool genDebugger; // Generate code for debugger |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 242 | bool printMe; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 243 | bool hasClassLiterals; // Contains class ptrs used as literals |
| 244 | bool hasLoop; // Contains a loop |
| 245 | bool hasInvoke; // Contains an invoke instruction |
| 246 | bool heapMemOp; // Mark mem ops for self verification |
| 247 | bool usesLinkRegister; // For self-verification only |
| 248 | bool methodTraceSupport; // For TraceView profiling |
| 249 | struct RegisterPool* regPool; |
| 250 | int optRound; // round number to tell an LIR's age |
| 251 | OatInstructionSetType instructionSet; |
| 252 | /* Number of total regs used in the whole cUnit after SSA transformation */ |
| 253 | int numSSARegs; |
| 254 | /* Map SSA reg i to the Dalvik[15..0]/Sub[31..16] pair. */ |
| 255 | GrowableList* ssaToDalvikMap; |
| 256 | |
| 257 | /* The following are new data structures to support SSA representations */ |
| 258 | /* Map original Dalvik reg i to the SSA[15..0]/Sub[31..16] pair */ |
| 259 | int* dalvikToSSAMap; // length == method->registersSize |
buzbee | f0cde54 | 2011-09-13 14:55:02 -0700 | [diff] [blame] | 260 | int* SSALastDefs; // length == method->registersSize |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 261 | ArenaBitVector* isConstantV; // length == numSSAReg |
| 262 | int* constantValues; // length == numSSAReg |
buzbee | c0ecd65 | 2011-09-25 18:11:54 -0700 | [diff] [blame] | 263 | int* phiAliasMap; // length == numSSAReg |
| 264 | MIR* phiList; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 265 | |
| 266 | /* Map SSA names to location */ |
| 267 | RegLocation* regLocation; |
| 268 | int sequenceNumber; |
| 269 | |
buzbee | 67bc236 | 2011-10-11 18:08:40 -0700 | [diff] [blame] | 270 | /* Keep track of Dalvik vReg to physical register mappings */ |
| 271 | PromotionMap* promotionMap; |
| 272 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 273 | /* |
| 274 | * Set to the Dalvik PC of the switch instruction if it has more than |
| 275 | * MAX_CHAINED_SWITCH_CASES cases. |
| 276 | */ |
| 277 | const u2* switchOverflowPad; |
| 278 | |
| 279 | int numReachableBlocks; |
| 280 | int numDalvikRegisters; // method->registersSize + inlined |
| 281 | BasicBlock* entryBlock; |
| 282 | BasicBlock* exitBlock; |
| 283 | BasicBlock* curBlock; |
| 284 | BasicBlock* nextCodegenBlock; // for extended trace codegen |
| 285 | GrowableList dfsOrder; |
buzbee | 5b53710 | 2012-01-17 17:33:47 -0800 | [diff] [blame] | 286 | GrowableList dfsPostOrder; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 287 | GrowableList domPostOrderTraversal; |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 288 | GrowableList throwLaunchpads; |
buzbee | c1f4504 | 2011-09-21 16:03:19 -0700 | [diff] [blame] | 289 | GrowableList suspendLaunchpads; |
buzbee | 5b53710 | 2012-01-17 17:33:47 -0800 | [diff] [blame] | 290 | int* iDomList; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 291 | ArenaBitVector* tryBlockAddr; |
| 292 | ArenaBitVector** defBlockMatrix; // numDalvikRegister x numBlocks |
| 293 | ArenaBitVector* tempBlockV; |
| 294 | ArenaBitVector* tempDalvikRegisterV; |
| 295 | ArenaBitVector* tempSSARegisterV; // numSSARegs |
| 296 | bool printSSANames; |
| 297 | void* blockLabelList; |
| 298 | bool quitLoopMode; // cold path/complex bytecode |
| 299 | int preservedRegsUsed; // How many callee save regs used |
| 300 | /* |
buzbee | 5ade1d2 | 2011-09-09 14:44:52 -0700 | [diff] [blame] | 301 | * Frame layout details. |
| 302 | * NOTE: for debug support it will be necessary to add a structure |
| 303 | * to map the Dalvik virtual registers to the promoted registers. |
| 304 | * NOTE: "num" fields are in 4-byte words, "Size" and "Offset" in bytes. |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 305 | */ |
| 306 | int numIns; |
| 307 | int numOuts; |
Ian Rogers | a3760aa | 2011-11-14 14:32:37 -0800 | [diff] [blame] | 308 | int numRegs; // Unlike numDalvikRegisters, does not include ins |
buzbee | bbaf894 | 2011-10-02 13:08:29 -0700 | [diff] [blame] | 309 | int numCoreSpills; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 310 | int numFPSpills; |
| 311 | int numPadding; // # of 4-byte padding cells |
| 312 | int regsOffset; // sp-relative offset to beginning of Dalvik regs |
| 313 | int insOffset; // sp-relative offset to beginning of Dalvik ins |
| 314 | int frameSize; |
| 315 | unsigned int coreSpillMask; |
| 316 | unsigned int fpSpillMask; |
buzbee | cefd187 | 2011-09-09 09:59:52 -0700 | [diff] [blame] | 317 | unsigned int attrs; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 318 | /* |
| 319 | * CLEANUP/RESTRUCTURE: The code generation utilities don't have a built-in |
buzbee | 03fa263 | 2011-09-20 17:10:57 -0700 | [diff] [blame] | 320 | * mechanism to propagate the original Dalvik opcode address to the |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 321 | * associated generated instructions. For the trace compiler, this wasn't |
| 322 | * necessary because the interpreter handled all throws and debugging |
| 323 | * requests. For now we'll handle this by placing the Dalvik offset |
| 324 | * in the CompilationUnit struct before codegen for each instruction. |
| 325 | * The low-level LIR creation utilites will pull it from here. Should |
| 326 | * be rewritten. |
| 327 | */ |
| 328 | int currentDalvikOffset; |
| 329 | GrowableList switchTables; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 330 | GrowableList fillArrayData; |
| 331 | const u2* insns; |
| 332 | u4 insnsSize; |
buzbee | 99ba964 | 2012-01-25 14:23:14 -0800 | [diff] [blame] | 333 | bool disableDataflow; // Skip dataflow analysis if possible |
buzbee | 5b53710 | 2012-01-17 17:33:47 -0800 | [diff] [blame] | 334 | std::map<unsigned int, BasicBlock*> blockMap; // findBlock lookup cache |
buzbee | 85d8c1e | 2012-01-27 15:52:35 -0800 | [diff] [blame] | 335 | std::map<unsigned int, LIR*> boundaryMap; // boundary lookup cache |
buzbee | 5abfa3e | 2012-01-31 17:01:43 -0800 | [diff] [blame] | 336 | int defCount; // Used to estimate number of SSA names |
buzbee | ba938cb | 2012-02-03 14:47:55 -0800 | [diff] [blame] | 337 | std::string* compilerMethodMatch; |
| 338 | bool compilerFlipMatch; |
| 339 | struct ArenaMemBlock* arenaHead; |
| 340 | struct ArenaMemBlock* currentArena; |
| 341 | int numArenaBlocks; |
| 342 | struct Memstats* mstats; |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 343 | } CompilationUnit; |
| 344 | |
buzbee | 5abfa3e | 2012-01-31 17:01:43 -0800 | [diff] [blame] | 345 | BasicBlock* oatNewBB(CompilationUnit* cUnit, BBType blockType, int blockId); |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 346 | |
| 347 | void oatAppendMIR(BasicBlock* bb, MIR* mir); |
| 348 | |
| 349 | void oatPrependMIR(BasicBlock* bb, MIR* mir); |
| 350 | |
| 351 | void oatInsertMIRAfter(BasicBlock* bb, MIR* currentMIR, MIR* newMIR); |
| 352 | |
| 353 | void oatAppendLIR(CompilationUnit* cUnit, LIR* lir); |
| 354 | |
| 355 | void oatInsertLIRBefore(LIR* currentLIR, LIR* newLIR); |
| 356 | |
| 357 | void oatInsertLIRAfter(LIR* currentLIR, LIR* newLIR); |
| 358 | |
| 359 | /* Debug Utilities */ |
| 360 | void oatDumpCompilationUnit(CompilationUnit* cUnit); |
| 361 | |
Elliott Hughes | 11d1b0c | 2012-01-23 16:57:47 -0800 | [diff] [blame] | 362 | } // namespace art |
| 363 | |
buzbee | 67bf885 | 2011-08-17 17:51:35 -0700 | [diff] [blame] | 364 | #endif // ART_SRC_COMPILER_COMPILER_IR_H_ |