XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1 | // Copyright (c) Facebook, Inc. and its affiliates. |
| 2 | // All rights reserved. |
| 3 | // |
| 4 | // Copyright 2019 Google LLC |
| 5 | // |
| 6 | // This source code is licensed under the BSD-style license found in the |
| 7 | // LICENSE file in the root directory of this source tree. |
| 8 | |
| 9 | #include <stdbool.h> |
| 10 | #include <stddef.h> |
| 11 | #include <stdint.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 12 | #include <string.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 13 | |
| 14 | #include <pthread.h> |
| 15 | |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 16 | #ifndef __EMSCRIPTEN__ |
| 17 | #include <cpuinfo.h> |
| 18 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 19 | |
| 20 | #include <xnnpack.h> |
| 21 | #include <xnnpack/argmaxpool.h> |
| 22 | #include <xnnpack/avgpool.h> |
| 23 | #include <xnnpack/clamp.h> |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 24 | #include <xnnpack/common.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 25 | #include <xnnpack/conv.h> |
| 26 | #include <xnnpack/dwconv.h> |
| 27 | #include <xnnpack/gavgpool.h> |
| 28 | #include <xnnpack/gemm.h> |
| 29 | #include <xnnpack/hswish.h> |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 30 | #include <xnnpack/ibilinear.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 31 | #include <xnnpack/igemm.h> |
| 32 | #include <xnnpack/log.h> |
| 33 | #include <xnnpack/lut.h> |
| 34 | #include <xnnpack/maxpool.h> |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 35 | #include <xnnpack/memory.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 36 | #include <xnnpack/pad.h> |
| 37 | #include <xnnpack/params.h> |
| 38 | #include <xnnpack/pavgpool.h> |
| 39 | #include <xnnpack/prelu.h> |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 40 | #include <xnnpack/raddstoreexpminusmax.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 41 | #include <xnnpack/rmax.h> |
| 42 | #include <xnnpack/spmm.h> |
| 43 | #include <xnnpack/unpool.h> |
| 44 | #include <xnnpack/vadd.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 45 | #include <xnnpack/vbinary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 46 | #include <xnnpack/vmulcaddc.h> |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 47 | #include <xnnpack/vunary.h> |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 48 | #include <xnnpack/zip.h> |
| 49 | |
| 50 | #ifndef XNN_ENABLE_ASSEMBLY |
| 51 | #define XNN_ENABLE_ASSEMBLY 1 |
| 52 | #endif |
| 53 | |
| 54 | static pthread_once_t init_guard = PTHREAD_ONCE_INIT; |
| 55 | |
| 56 | struct xnn_parameters xnn_params = { |
| 57 | .initialized = false |
| 58 | }; |
| 59 | |
Marat Dukhan | f42facc | 2020-03-08 15:14:53 -0700 | [diff] [blame] | 60 | #if XNN_ARCH_ASMJS || XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 61 | extern uint32_t xnn_stub_wasm_f32_sub(uint32_t a, uint32_t b); |
| 62 | #endif |
Marat Dukhan | f42facc | 2020-03-08 15:14:53 -0700 | [diff] [blame] | 63 | #if XNN_ARCH_WASM || XNN_ARCH_WASMSIMD |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 64 | extern uint32_t xnn_stub_wasm_f32_min(uint32_t a, uint32_t b); |
| 65 | #endif |
| 66 | |
| 67 | static void init(void) { |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 68 | #if XNN_ARCH_ARM |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 69 | if (!cpuinfo_has_arm_neon()) { |
| 70 | xnn_log_error("XNNPACK initialization failed: NEON is not supported"); |
| 71 | return; |
| 72 | } |
| 73 | |
| 74 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 75 | #ifndef XNN_NO_Q8_OPERATORS |
| 76 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 77 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x8__neon, |
| 78 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x8__neon, |
| 79 | .mr = 4, |
| 80 | .nr = 8, |
| 81 | }; |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 82 | |
Frank Barchard | 0d1052c | 2020-03-23 17:28:13 -0700 | [diff] [blame^] | 83 | #if XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 84 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 85 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__aarch32_neon, |
| 86 | .cr = 8, |
| 87 | .mr = 9, |
| 88 | }; |
| 89 | #else |
| 90 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 91 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 92 | .cr = 8, |
| 93 | .mr = 9, |
| 94 | }; |
| 95 | #endif |
| 96 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 97 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_9x__neon_c8, |
| 98 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_9p8x__neon_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 99 | .mr = 9, |
| 100 | .qr = 8, |
| 101 | }; |
| 102 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 103 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_7x__neon_c8, |
| 104 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_7p7x__neon_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 105 | .mr = 7, |
| 106 | }; |
| 107 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 108 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 109 | |
| 110 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 111 | #ifndef XNN_NO_U8_OPERATORS |
| 112 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 113 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 114 | .mr = 9, |
| 115 | .qr = 8, |
| 116 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 117 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon_x64; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 118 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 119 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 120 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 121 | |
| 122 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 123 | #ifndef XNN_NO_X8_OPERATORS |
| 124 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 125 | xnn_params.x8.zip = (struct zip_parameters) { |
| 126 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 127 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 128 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 129 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 130 | }; |
| 131 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 132 | |
| 133 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 134 | #ifndef XNN_NO_F32_OPERATORS |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 135 | #if XNN_ENABLE_ASSEMBLY |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 136 | switch (cpuinfo_get_core(0)->uarch) { |
Marat Dukhan | 5b5a062 | 2020-02-13 11:51:43 -0800 | [diff] [blame] | 137 | case cpuinfo_uarch_cortex_a5: |
| 138 | case cpuinfo_uarch_cortex_a7: |
| 139 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 140 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_ld64, |
| 141 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch32_neon_ld64, |
| 142 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 143 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 144 | .mr = 4, |
| 145 | .nr = 8, |
| 146 | }; |
| 147 | break; |
| 148 | |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 149 | case cpuinfo_uarch_cortex_a53: |
Marat Dukhan | b3801eb | 2020-03-12 13:41:11 -0700 | [diff] [blame] | 150 | case cpuinfo_uarch_cortex_a55r0: |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 151 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 152 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a53, |
Frank Barchard | 775d349 | 2020-02-12 17:38:38 -0800 | [diff] [blame] | 153 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch32_neon_cortex_a53, |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 154 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 155 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 156 | .mr = 4, |
| 157 | .nr = 8, |
| 158 | }; |
| 159 | break; |
Frank Barchard | 4d281a5 | 2019-12-12 15:49:41 -0800 | [diff] [blame] | 160 | |
Frank Barchard | b7dd29e | 2020-03-11 12:37:10 -0700 | [diff] [blame] | 161 | case cpuinfo_uarch_cortex_a55: |
| 162 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 163 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a55, |
| 164 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch32_neon_cortex_a55, |
| 165 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 166 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 167 | .mr = 4, |
| 168 | .nr = 8, |
| 169 | }; |
| 170 | break; |
| 171 | |
Frank Barchard | 4d281a5 | 2019-12-12 15:49:41 -0800 | [diff] [blame] | 172 | case cpuinfo_uarch_cortex_a57: |
| 173 | case cpuinfo_uarch_cortex_a72: |
| 174 | case cpuinfo_uarch_cortex_a73: |
| 175 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 176 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_pld_cortex_a75, |
Frank Barchard | 7cdeede | 2020-02-11 00:17:21 -0800 | [diff] [blame] | 177 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch32_neon_pld_cortex_a75, |
Frank Barchard | 4d281a5 | 2019-12-12 15:49:41 -0800 | [diff] [blame] | 178 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 179 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 180 | .mr = 4, |
| 181 | .nr = 8, |
| 182 | }; |
| 183 | break; |
| 184 | |
Frank Barchard | 7493bfb | 2020-02-24 19:18:01 -0800 | [diff] [blame] | 185 | case cpuinfo_uarch_krait: |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 186 | default: |
| 187 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 188 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch32_neon_cortex_a75, |
Frank Barchard | 7cdeede | 2020-02-11 00:17:21 -0800 | [diff] [blame] | 189 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch32_neon_cortex_a75, |
Frank Barchard | f9a3484 | 2019-12-12 11:17:50 -0800 | [diff] [blame] | 190 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 191 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 192 | .mr = 4, |
| 193 | .nr = 8, |
| 194 | }; |
| 195 | break; |
| 196 | } |
Frank Barchard | 3267092 | 2019-11-30 21:58:51 -0800 | [diff] [blame] | 197 | #else // XNN_ENABLE_ASSEMBLY |
| 198 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 199 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__neon_lane_ld128, |
| 200 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__neon_lane_ld128, |
| 201 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neon_lane_ld64, |
| 202 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neon_lane_ld64, |
| 203 | .mr = 4, |
| 204 | .nr = 8, |
| 205 | }; |
| 206 | #endif // XNN_ENABLE_ASSEMBLY |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 207 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 208 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x2__neon_lane_ld64, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 209 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neon_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 210 | .mr = 4, |
| 211 | .nr = 2, |
| 212 | }; |
| 213 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 214 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 215 | .cr = 4, |
| 216 | .mr = 4, |
| 217 | }; |
| 218 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 219 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neon, |
| 220 | .cr = 4, |
| 221 | .mr = 9, |
| 222 | }; |
| 223 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 224 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 225 | .cr = 4, |
| 226 | .mr = 25, |
| 227 | }; |
| 228 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 229 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_9x__neon_c4, |
| 230 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 231 | .mr = 9, |
| 232 | .qr = 8, |
| 233 | }; |
| 234 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 235 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_9x__neon_c4, |
| 236 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 237 | .mr = 9, |
| 238 | .qr = 8, |
| 239 | }; |
| 240 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 241 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_7x__neon_c4, |
| 242 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_7p7x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 243 | .mr = 7, |
| 244 | }; |
| 245 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 246 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 247 | .mr = 9, |
| 248 | .qr = 8, |
| 249 | }; |
| 250 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 251 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 252 | .mr = 4, |
| 253 | }; |
| 254 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 255 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 256 | .mr = 9, |
| 257 | }; |
| 258 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 259 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 260 | .mr = 9, |
| 261 | .qr = 8, |
| 262 | }; |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 263 | xnn_params.f32.ibilinear = (struct ibilinear_parameters) { |
| 264 | .ukernel = (xnn_ibilinear_ukernel_function) xnn_f32_ibilinear_ukernel__neon_c8, |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 265 | .pixel_tile = 1, |
| 266 | .channel_tile = 8, |
| 267 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 268 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon_x8; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 269 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neon_x8; |
Marat Dukhan | 4a24a58 | 2020-01-06 13:30:00 -0800 | [diff] [blame] | 270 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x8; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 271 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 272 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 273 | .row_tile = 2, |
| 274 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 275 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 276 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x8; |
| 277 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__neon; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 278 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 279 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 280 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 281 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 282 | .element_tile = 8, |
| 283 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 284 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 285 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__scalar_x2, |
| 286 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__scalar_x2, |
| 287 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__scalar_x2, |
| 288 | .element_tile = 2, |
| 289 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 290 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 291 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 292 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 293 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 294 | .element_tile = 8, |
| 295 | }; |
| 296 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 297 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 298 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 299 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 300 | .element_tile = 8, |
| 301 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 302 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 303 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 304 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 305 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 306 | .element_tile = 8, |
| 307 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 308 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 309 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 310 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 311 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 312 | .element_tile = 8, |
| 313 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 314 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 315 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neon_2x, |
| 316 | .channel_tile = 4, |
| 317 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 318 | }; |
| 319 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 320 | |
| 321 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 322 | #ifndef XNN_NO_X32_OPERATORS |
| 323 | xnn_params.x32.pad = (struct pad_parameters) { |
| 324 | .ukernel = xnn_x32_pad_x2__neon, |
| 325 | .mr = 2, |
| 326 | }; |
| 327 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 328 | xnn_params.x32.zip = (struct zip_parameters) { |
| 329 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 330 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 331 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 332 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 333 | }; |
| 334 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 335 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 336 | #elif XNN_ARCH_ARM64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 337 | |
| 338 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 339 | #ifndef XNN_NO_Q8_OPERATORS |
| 340 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 341 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_8x8__neon, |
| 342 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_8x8__neon, |
| 343 | .mr = 8, |
| 344 | .nr = 8, |
| 345 | }; |
| 346 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 347 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__neon, |
| 348 | .cr = 8, |
| 349 | .mr = 9, |
| 350 | }; |
| 351 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 352 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_9x__neon_c8, |
| 353 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_9p8x__neon_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 354 | .mr = 9, |
| 355 | .qr = 8, |
| 356 | }; |
| 357 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 358 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_7x__neon_c8, |
| 359 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_7p7x__neon_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 360 | .mr = 7, |
| 361 | }; |
| 362 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__neon; |
| 363 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 364 | |
| 365 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 366 | #ifndef XNN_NO_U8_OPERATORS |
| 367 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 368 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__neon_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 369 | .mr = 9, |
| 370 | .qr = 8, |
| 371 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 372 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__neon_x64; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 373 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 374 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__neon; |
| 375 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 376 | |
| 377 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 378 | #ifndef XNN_NO_X8_OPERATORS |
| 379 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 380 | xnn_params.x8.zip = (struct zip_parameters) { |
| 381 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__neon, |
| 382 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__neon, |
| 383 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__neon, |
| 384 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__neon, |
| 385 | }; |
| 386 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 387 | |
| 388 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 389 | #ifndef XNN_NO_F32_OPERATORS |
Frank Barchard | 0d1052c | 2020-03-23 17:28:13 -0700 | [diff] [blame^] | 390 | #if XNN_PLATFORM_IOS |
| 391 | #if XNN_ENABLE_ASSEMBLY |
| 392 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 393 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_ios, |
| 394 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_ios, |
| 395 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 396 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 397 | .mr = 6, |
| 398 | .nr = 8, |
| 399 | }; |
| 400 | #else // !XNN_ENABLE_ASSEMBLY |
| 401 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 402 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 403 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
| 404 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neonfma_lane_ld64, |
| 405 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neonfma_lane_ld64, |
| 406 | .mr = 6, |
| 407 | .nr = 8, |
| 408 | }; |
| 409 | #endif // XNN_ENABLE_ASSEMBLY |
| 410 | #else // !XNN_PLATFORM_IOS |
| 411 | #if XNN_ENABLE_ASSEMBLY |
| 412 | switch (cpuinfo_get_core(0)->uarch) { |
| 413 | case cpuinfo_uarch_cortex_a57: |
| 414 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 415 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 416 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a57, |
| 417 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 418 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 419 | .mr = 6, |
| 420 | .nr = 8, |
| 421 | }; |
| 422 | break; |
| 423 | case cpuinfo_uarch_cortex_a72: |
| 424 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 425 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 426 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a75, |
| 427 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 428 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 429 | .mr = 4, |
| 430 | .nr = 8, |
| 431 | }; |
| 432 | break; |
| 433 | case cpuinfo_uarch_cortex_a75: |
| 434 | case cpuinfo_uarch_cortex_a76: |
| 435 | case cpuinfo_uarch_exynos_m3: |
| 436 | case cpuinfo_uarch_exynos_m4: |
| 437 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 438 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 439 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a75, |
| 440 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 441 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 442 | .mr = 6, |
| 443 | .nr = 8, |
| 444 | }; |
| 445 | break; |
| 446 | case cpuinfo_uarch_exynos_m1: |
| 447 | case cpuinfo_uarch_exynos_m2: |
| 448 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 449 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__neonfma, |
| 450 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__neonfma, |
| 451 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8s4__neonfma, |
| 452 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__neonfma, |
| 453 | .mr = 6, |
| 454 | .nr = 8, |
| 455 | .log2_sr = 2, |
| 456 | }; |
| 457 | break; |
Frank Barchard | df06d80 | 2019-11-20 15:53:46 -0800 | [diff] [blame] | 458 | |
Frank Barchard | 0d1052c | 2020-03-23 17:28:13 -0700 | [diff] [blame^] | 459 | case cpuinfo_uarch_cortex_a53: |
| 460 | case cpuinfo_uarch_cortex_a55r0: |
| 461 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 462 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 463 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a53, |
| 464 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 465 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 466 | .mr = 6, |
| 467 | .nr = 8, |
| 468 | }; |
| 469 | break; |
| 470 | case cpuinfo_uarch_cortex_a55: |
| 471 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 472 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a55, |
| 473 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a55, |
| 474 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 475 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a53, |
| 476 | .mr = 6, |
| 477 | .nr = 8, |
| 478 | }; |
| 479 | break; |
| 480 | case cpuinfo_uarch_cortex_a73: |
| 481 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 482 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 483 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__aarch64_neonfma_cortex_a73, |
| 484 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 485 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a75, |
| 486 | .mr = 6, |
| 487 | .nr = 8, |
| 488 | }; |
| 489 | break; |
| 490 | default: |
| 491 | case cpuinfo_uarch_cortex_a77: |
| 492 | case cpuinfo_uarch_exynos_m5: |
| 493 | case cpuinfo_uarch_kryo: |
| 494 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 495 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 496 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__aarch64_neonfma_cortex_a57, |
| 497 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 498 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__aarch64_neonfma_cortex_a57, |
| 499 | .mr = 4, |
| 500 | .nr = 8, |
| 501 | }; |
| 502 | break; |
| 503 | } |
| 504 | #else // !XNN_ENABLE_ASSEMBLY |
| 505 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 506 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8__neonfma_lane_ld64, |
| 507 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8__neonfma_lane_ld64, |
| 508 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__neonfma_lane_ld64, |
| 509 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__neonfma_lane_ld64, |
| 510 | .mr = 6, |
| 511 | .nr = 8, |
| 512 | }; |
| 513 | #endif // XNN_ENABLE_ASSEMBLY |
| 514 | #endif // XNN_PLATFORM_IOS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 515 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 516 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x2__neonfma_lane_ld64, |
Frank Barchard | 91317c5 | 2019-11-22 10:54:35 -0800 | [diff] [blame] | 517 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__neonfma_lane_ld64, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 518 | .mr = 4, |
| 519 | .nr = 2, |
| 520 | }; |
| 521 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 522 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd, |
| 523 | .cr = 4, |
| 524 | .mr = 4, |
| 525 | }; |
Frank Barchard | 0d1052c | 2020-03-23 17:28:13 -0700 | [diff] [blame^] | 526 | #if XNN_PLATFORM_IOS |
| 527 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 528 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__neonfma, |
| 529 | .cr = 8, |
| 530 | .mr = 9, |
| 531 | }; |
| 532 | #else // !XNN_PLATFORM_IOS |
| 533 | switch (cpuinfo_get_core(0)->uarch) { |
| 534 | case cpuinfo_uarch_kryo: |
| 535 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 536 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__neonfma, |
| 537 | .cr = 4, |
| 538 | .mr = 9, |
| 539 | }; |
| 540 | break; |
| 541 | #if XNN_ENABLE_ASSEMBLY |
| 542 | case cpuinfo_uarch_cortex_a53: |
| 543 | case cpuinfo_uarch_cortex_a55r0: |
| 544 | case cpuinfo_uarch_cortex_a55: |
| 545 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 546 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__aarch64_neonfma_cortex_a55, |
| 547 | .cr = 4, |
| 548 | .mr = 9, |
| 549 | }; |
| 550 | break; |
| 551 | #endif // XNN_ENABLE_ASSEMBLY |
| 552 | default: |
| 553 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 554 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__neonfma, |
| 555 | .cr = 8, |
| 556 | .mr = 9, |
| 557 | }; |
| 558 | break; |
| 559 | } |
| 560 | #endif // XNN_PLATFORM_IOS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 561 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 562 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd, |
| 563 | .cr = 4, |
| 564 | .mr = 25, |
| 565 | }; |
| 566 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 567 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_9x__neon_c4, |
| 568 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 569 | .mr = 9, |
| 570 | .qr = 8, |
| 571 | }; |
| 572 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 573 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_9x__neon_c4, |
| 574 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 575 | .mr = 9, |
| 576 | .qr = 8, |
| 577 | }; |
| 578 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 579 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_7x__neon_c4, |
| 580 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_7p7x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 581 | .mr = 7, |
| 582 | }; |
| 583 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Frank Barchard | f092a4a | 2020-03-03 14:22:46 -0800 | [diff] [blame] | 584 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__neon_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 585 | .mr = 9, |
| 586 | .qr = 8, |
| 587 | }; |
| 588 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 589 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 590 | .mr = 4, |
| 591 | }; |
| 592 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 593 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 594 | .mr = 9, |
| 595 | }; |
| 596 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 597 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 598 | .mr = 9, |
| 599 | .qr = 8, |
| 600 | }; |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 601 | xnn_params.f32.ibilinear = (struct ibilinear_parameters) { |
| 602 | .ukernel = (xnn_ibilinear_ukernel_function) xnn_f32_ibilinear_ukernel__neonfma_c8, |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 603 | .pixel_tile = 1, |
| 604 | .channel_tile = 8, |
| 605 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 606 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__neon_x8; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 607 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__neonfma_x8; |
Marat Dukhan | 4a24a58 | 2020-01-06 13:30:00 -0800 | [diff] [blame] | 608 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__neonfma_rr1_lut64_p2_nr2recps_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 609 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 610 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__neon_2x8, |
| 611 | .row_tile = 2, |
| 612 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 613 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 614 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x16; |
| 615 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__neon; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 616 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 617 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__neon_x8, |
| 618 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 619 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__neon_x8, |
| 620 | .element_tile = 8, |
| 621 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 622 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 623 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__neon_x8, |
| 624 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__neon_x8, |
| 625 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__neon_x8, |
| 626 | .element_tile = 8, |
| 627 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 628 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 629 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__neon_x8, |
| 630 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 631 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__neon_x8, |
| 632 | .element_tile = 8, |
| 633 | }; |
| 634 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 635 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__neon_x8, |
| 636 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 637 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__neon_x8, |
| 638 | .element_tile = 8, |
| 639 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 640 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 641 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__neon_x8, |
| 642 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
| 643 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__neon_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 644 | .element_tile = 8, |
| 645 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 646 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 647 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__neon_x8, |
| 648 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__neon_x8, |
| 649 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__neon_x8, |
| 650 | .element_tile = 8, |
| 651 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 652 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 653 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__neonfma_2x, |
| 654 | .channel_tile = 4, |
| 655 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 656 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 657 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 658 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Erich Elsen | 9cdade3 | 2019-10-16 05:26:59 -0700 | [diff] [blame] | 659 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x1__neonfma_pipelined, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 660 | .mr = 16, |
| 661 | .nr = 1, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 662 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 663 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 664 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x2__neonfma, |
| 665 | .mr = 16, |
| 666 | .nr = 2, |
| 667 | }; |
| 668 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 669 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_16x4__neonfma, |
| 670 | .mr = 16, |
| 671 | .nr = 4, |
| 672 | }; |
| 673 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 674 | .ukernel_with_symm_padding = |
| 675 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__neonfma_2x2, |
| 676 | .output_channel_tile = 4, |
| 677 | .output_height_tile = 2, |
| 678 | .output_width_tile = 2, |
| 679 | }; |
| 680 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 681 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__neonfma, |
| 682 | .input_width_tile = 4, |
| 683 | .output_width_tile = 4, |
| 684 | .output_height_tile = 3, |
| 685 | }; |
| 686 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 687 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__neonfma, |
| 688 | .input_width_tile = 4, |
| 689 | .output_width_tile = 4, |
| 690 | .output_height_tile = 1, |
| 691 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 692 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 693 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__neonfma, |
| 694 | .input_width_tile = 4, |
| 695 | .output_width_tile = 4, |
Erich Elsen | 4ad5115 | 2019-11-19 13:11:53 -0800 | [diff] [blame] | 696 | .output_height_tile = 3, |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 697 | }; |
| 698 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 699 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__neonfma, |
| 700 | .input_width_tile = 4, |
| 701 | .output_width_tile = 4, |
| 702 | .output_height_tile = 1, |
| 703 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 704 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 705 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__neon_x4, |
| 706 | .channel_tile = 4, |
| 707 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 708 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 709 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 710 | |
| 711 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 712 | #ifndef XNN_NO_X32_OPERATORS |
| 713 | xnn_params.x32.pad = (struct pad_parameters) { |
| 714 | .ukernel = xnn_x32_pad_x2__neon, |
| 715 | .mr = 2, |
| 716 | }; |
| 717 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 718 | xnn_params.x32.zip = (struct zip_parameters) { |
| 719 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__neon, |
| 720 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__neon, |
| 721 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__neon, |
| 722 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__neon, |
| 723 | }; |
| 724 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 725 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 726 | #elif XNN_ARCH_X86 || XNN_ARCH_X86_64 |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 727 | if (!cpuinfo_has_x86_sse2()) { |
| 728 | xnn_log_error("XNNPACK initialization failed: SSE2 is not supported"); |
| 729 | return; |
| 730 | } |
| 731 | |
| 732 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 733 | #ifndef XNN_NO_Q8_OPERATORS |
| 734 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 735 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_4x4c2__sse2, |
| 736 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_4x4c2__sse2, |
| 737 | .mr = 4, |
| 738 | .nr = 4, |
| 739 | .log2_kr = 1, |
| 740 | }; |
| 741 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 742 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up8x9__sse2, |
| 743 | .cr = 8, |
| 744 | .mr = 9, |
| 745 | }; |
| 746 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 747 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_9x__sse2_c8, |
| 748 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_9p8x__sse2_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 749 | .mr = 9, |
| 750 | .qr = 8, |
| 751 | }; |
| 752 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 753 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_7x__sse2_c8, |
| 754 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_7p7x__sse2_c8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 755 | .mr = 7, |
| 756 | }; |
| 757 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__sse2; |
| 758 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 759 | |
| 760 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 761 | #ifndef XNN_NO_U8_OPERATORS |
| 762 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 763 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__sse2_c16, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 764 | .mr = 9, |
| 765 | .qr = 8, |
| 766 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 767 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__sse2_x64; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 768 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 769 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__sse2; |
| 770 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 771 | |
| 772 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 773 | #ifndef XNN_NO_X8_OPERATORS |
| 774 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 775 | xnn_params.x8.zip = (struct zip_parameters) { |
| 776 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__sse2, |
| 777 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__sse2, |
| 778 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__sse2, |
| 779 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__sse2, |
| 780 | }; |
| 781 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 782 | |
| 783 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 784 | #ifndef XNN_NO_F32_OPERATORS |
Marat Dukhan | 0f349c4 | 2019-11-27 11:58:54 -0800 | [diff] [blame] | 785 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 786 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 787 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_7x16__avx512f_broadcast, |
| 788 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_7x16__avx512f_broadcast, |
| 789 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx512f_broadcast, |
| 790 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx512f_broadcast, |
| 791 | .mr = 7, |
| 792 | .nr = 16, |
| 793 | }; |
| 794 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 2712132 | 2019-12-09 14:57:40 -0800 | [diff] [blame] | 795 | switch (cpuinfo_get_core(0)->uarch) { |
| 796 | case cpuinfo_uarch_zen: |
Marat Dukhan | b3801eb | 2020-03-12 13:41:11 -0700 | [diff] [blame] | 797 | case cpuinfo_uarch_dhyana: |
Marat Dukhan | 2712132 | 2019-12-09 14:57:40 -0800 | [diff] [blame] | 798 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 799 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x16s4__fma3_broadcast, |
| 800 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x16s4__fma3_broadcast, |
| 801 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16s4__fma3_broadcast, |
| 802 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16s4__fma3_broadcast, |
| 803 | .mr = 4, |
| 804 | .nr = 16, |
| 805 | .log2_sr = 2, |
| 806 | }; |
| 807 | break; |
| 808 | default: |
| 809 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 810 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__fma3_broadcast, |
| 811 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__fma3_broadcast, |
| 812 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__fma3_broadcast, |
| 813 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__fma3_broadcast, |
| 814 | .mr = 5, |
| 815 | .nr = 16, |
| 816 | }; |
| 817 | break; |
| 818 | } |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 819 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 820 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | eccfd71 | 2019-12-08 16:49:27 -0800 | [diff] [blame] | 821 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_5x16__avx_broadcast, |
| 822 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_5x16__avx_broadcast, |
| 823 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x16__avx_broadcast, |
| 824 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x16__avx_broadcast, |
| 825 | .mr = 5, |
| 826 | .nr = 16, |
Marat Dukhan | 1025ea3 | 2019-11-21 16:01:08 -0800 | [diff] [blame] | 827 | }; |
| 828 | } else { |
| 829 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 830 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__sse_load1, |
| 831 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__sse_load1, |
| 832 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__sse_load1, |
| 833 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__sse_load1, |
| 834 | .mr = 4, |
| 835 | .nr = 8, |
| 836 | }; |
| 837 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 838 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 839 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x2c4__sse, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 840 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__sse, |
| 841 | .mr = 4, |
| 842 | .nr = 2, |
| 843 | .log2_kr = 2, |
| 844 | }; |
Marat Dukhan | 479f87e | 2019-11-27 15:17:06 -0800 | [diff] [blame] | 845 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 846 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 847 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx512f, |
| 848 | .cr = 16, |
| 849 | .mr = 4, |
| 850 | }; |
| 851 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 852 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx512f, |
| 853 | .cr = 16, |
| 854 | .mr = 9, |
| 855 | }; |
| 856 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 857 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x25__avx512f, |
| 858 | .cr = 16, |
| 859 | .mr = 25, |
| 860 | }; |
| 861 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
Marat Dukhan | 17ec5f3 | 2019-11-22 13:34:16 -0800 | [diff] [blame] | 862 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 863 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__fma3, |
| 864 | .cr = 16, |
| 865 | .mr = 4, |
| 866 | }; |
| 867 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 868 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__fma3, |
| 869 | .cr = 16, |
| 870 | .mr = 9, |
| 871 | }; |
| 872 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 873 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__fma3, |
| 874 | .cr = 8, |
| 875 | .mr = 25, |
| 876 | }; |
| 877 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 878 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 879 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x4__avx, |
| 880 | .cr = 16, |
| 881 | .mr = 4, |
| 882 | }; |
| 883 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 884 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up16x9__avx, |
| 885 | .cr = 16, |
| 886 | .mr = 9, |
| 887 | }; |
| 888 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 889 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__avx, |
| 890 | .cr = 8, |
| 891 | .mr = 25, |
| 892 | }; |
| 893 | } else { |
| 894 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
| 895 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x4__sse, |
| 896 | .cr = 8, |
| 897 | .mr = 4, |
| 898 | }; |
| 899 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
| 900 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x9__sse, |
| 901 | .cr = 8, |
| 902 | .mr = 9, |
| 903 | }; |
| 904 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
| 905 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up8x25__sse, |
| 906 | .cr = 8, |
| 907 | .mr = 25, |
| 908 | }; |
| 909 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 910 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 911 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_9x__sse_c4, |
| 912 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 913 | .mr = 9, |
| 914 | .qr = 8, |
| 915 | }; |
| 916 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 917 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_9x__sse_c4, |
| 918 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 919 | .mr = 9, |
| 920 | .qr = 8, |
| 921 | }; |
| 922 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 923 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_7x__sse_c4, |
| 924 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_7p7x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 925 | .mr = 7, |
| 926 | }; |
| 927 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 928 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__sse_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 929 | .mr = 9, |
| 930 | .qr = 8, |
| 931 | }; |
| 932 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 933 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 934 | .mr = 4, |
| 935 | }; |
| 936 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 937 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 938 | .mr = 9, |
| 939 | }; |
| 940 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 941 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__sse2_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 942 | .mr = 9, |
| 943 | .qr = 8, |
| 944 | }; |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 945 | xnn_params.f32.ibilinear = (struct ibilinear_parameters) { |
| 946 | .ukernel = (xnn_ibilinear_ukernel_function) xnn_f32_ibilinear_ukernel__sse_c8, |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 947 | .pixel_tile = 1, |
| 948 | .channel_tile = 8, |
| 949 | }; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 950 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 951 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx512f_x16; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 952 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 953 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__avx_x16; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 954 | } else { |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 955 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__sse_x8; |
Marat Dukhan | e2c3f29 | 2019-11-27 15:40:54 -0800 | [diff] [blame] | 956 | } |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 957 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 958 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx512f_x16; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 959 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_fma3()) { |
| 960 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__fma3_x16; |
| 961 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 962 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__avx_x16; |
| 963 | } else { |
| 964 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__sse_x8; |
| 965 | } |
Marat Dukhan | fa0a432 | 2020-01-06 16:14:29 -0800 | [diff] [blame] | 966 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx2()) { |
| 967 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__avx2_rr1_p5_div_x40; |
| 968 | } else { |
| 969 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__sse2_p5_div_x16; |
| 970 | } |
Marat Dukhan | 90eca0a | 2020-03-11 00:52:23 -0700 | [diff] [blame] | 971 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 972 | xnn_params.f32.prelu = (struct prelu_parameters) { |
| 973 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__avx512f_2x16, |
| 974 | .row_tile = 2, |
| 975 | .channel_tile = 16, |
| 976 | }; |
| 977 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 978 | xnn_params.f32.prelu = (struct prelu_parameters) { |
| 979 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__avx_2x16, |
| 980 | .row_tile = 2, |
| 981 | .channel_tile = 16, |
| 982 | }; |
| 983 | } else { |
| 984 | xnn_params.f32.prelu = (struct prelu_parameters) { |
| 985 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__sse2_2x8, |
| 986 | .row_tile = 2, |
| 987 | .channel_tile = 8, |
| 988 | }; |
| 989 | } |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 990 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__sse2_p5_x20_acc2; |
| 991 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__sse; |
Marat Dukhan | 9a88efe | 2019-12-10 15:54:24 -0800 | [diff] [blame] | 992 | if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx512f()) { |
| 993 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 994 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx512f_x32, |
| 995 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 996 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx512f_x32, |
| 997 | .element_tile = 32, |
| 998 | }; |
| 999 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1000 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx512f_x32, |
| 1001 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx512f_x32, |
| 1002 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx512f_x32, |
| 1003 | .element_tile = 32, |
| 1004 | }; |
| 1005 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1006 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx512f_x32, |
| 1007 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 1008 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx512f_x32, |
| 1009 | .element_tile = 32, |
| 1010 | }; |
| 1011 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1012 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx512f_x32, |
| 1013 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 1014 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx512f_x32, |
| 1015 | .element_tile = 32, |
| 1016 | }; |
| 1017 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1018 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx512f_x32, |
| 1019 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 1020 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx512f_x32, |
| 1021 | .element_tile = 32, |
| 1022 | }; |
| 1023 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1024 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx512f_x32, |
| 1025 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx512f_x32, |
| 1026 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx512f_x32, |
| 1027 | .element_tile = 32, |
| 1028 | }; |
| 1029 | } else if (!XNN_PLATFORM_MOBILE && cpuinfo_has_x86_avx()) { |
| 1030 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1031 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__avx_x16, |
| 1032 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 1033 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__avx_x16, |
| 1034 | .element_tile = 16, |
| 1035 | }; |
| 1036 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1037 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__avx_x16, |
| 1038 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__avx_x16, |
| 1039 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__avx_x16, |
| 1040 | .element_tile = 16, |
| 1041 | }; |
| 1042 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1043 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__avx_x16, |
| 1044 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 1045 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__avx_x16, |
| 1046 | .element_tile = 16, |
| 1047 | }; |
| 1048 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1049 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__avx_x16, |
| 1050 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 1051 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__avx_x16, |
| 1052 | .element_tile = 16, |
| 1053 | }; |
| 1054 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1055 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__avx_x16, |
| 1056 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 1057 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__avx_x16, |
| 1058 | .element_tile = 16, |
| 1059 | }; |
| 1060 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1061 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__avx_x16, |
| 1062 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__avx_x16, |
| 1063 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__avx_x16, |
| 1064 | .element_tile = 16, |
| 1065 | }; |
| 1066 | } else { |
| 1067 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1068 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__sse_x8, |
| 1069 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 1070 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__sse_x8, |
| 1071 | .element_tile = 8, |
| 1072 | }; |
| 1073 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1074 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__sse_x8, |
| 1075 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__sse_x8, |
| 1076 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__sse_x8, |
| 1077 | .element_tile = 8, |
| 1078 | }; |
| 1079 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1080 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__sse_x8, |
| 1081 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 1082 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__sse_x8, |
| 1083 | .element_tile = 8, |
| 1084 | }; |
| 1085 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1086 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__sse_x8, |
| 1087 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1088 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__sse_x8, |
| 1089 | .element_tile = 8, |
| 1090 | }; |
| 1091 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1092 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__sse_x8, |
| 1093 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1094 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__sse_x8, |
| 1095 | .element_tile = 8, |
| 1096 | }; |
| 1097 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1098 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__sse_x8, |
| 1099 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__sse_x8, |
| 1100 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__sse_x8, |
| 1101 | .element_tile = 8, |
| 1102 | }; |
| 1103 | } |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1104 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1105 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__sse_2x, |
| 1106 | .channel_tile = 4, |
| 1107 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1108 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1109 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1110 | xnn_params.f32.spmm = (struct spmm_parameters) { |
| 1111 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_4x1__sse, |
| 1112 | .mr = 4, |
| 1113 | .nr = 1, |
| 1114 | }; |
| 1115 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1116 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__sse, |
| 1117 | .input_width_tile = 4, |
| 1118 | .output_width_tile = 4, |
| 1119 | .output_height_tile = 1, |
| 1120 | }; |
| 1121 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1122 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__sse, |
| 1123 | .input_width_tile = 4, |
| 1124 | .output_width_tile = 4, |
| 1125 | .output_height_tile = 1, |
| 1126 | }; |
| 1127 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1128 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__sse_x4, |
| 1129 | .channel_tile = 4, |
| 1130 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1131 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1132 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1133 | |
| 1134 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1135 | #ifndef XNN_NO_X32_OPERATORS |
| 1136 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1137 | .ukernel = xnn_x32_pad_x2__sse2, |
| 1138 | .mr = 2, |
| 1139 | }; |
| 1140 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1141 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1142 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__sse2, |
| 1143 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__sse2, |
| 1144 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__sse2, |
| 1145 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__sse2, |
| 1146 | }; |
| 1147 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1148 | |
Marat Dukhan | f42facc | 2020-03-08 15:14:53 -0700 | [diff] [blame] | 1149 | #elif XNN_ARCH_WASMSIMD |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1150 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1151 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1152 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1153 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1154 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1155 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1156 | |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1157 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1158 | #ifndef XNN_NO_Q8_OPERATORS |
| 1159 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1160 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1161 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1162 | .mr = 2, |
| 1163 | .nr = 2, |
| 1164 | }; |
| 1165 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1166 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1167 | .cr = 1, |
| 1168 | .mr = 9, |
| 1169 | }; |
| 1170 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1171 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_9x__scalar_c1, |
| 1172 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1173 | .mr = 9, |
| 1174 | .qr = 8, |
| 1175 | }; |
| 1176 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 1177 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_7x__scalar_c1, |
| 1178 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_7p7x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1179 | .mr = 7, |
| 1180 | }; |
| 1181 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1182 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1183 | |
| 1184 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1185 | #ifndef XNN_NO_U8_OPERATORS |
| 1186 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1187 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1188 | .mr = 9, |
| 1189 | .qr = 8, |
| 1190 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1191 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar_x4; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1192 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1193 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1194 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1195 | |
| 1196 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1197 | #ifndef XNN_NO_X8_OPERATORS |
| 1198 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1199 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1200 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1201 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1202 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1203 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1204 | }; |
| 1205 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1206 | |
| 1207 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1208 | #ifndef XNN_NO_F32_OPERATORS |
| 1209 | if (is_wasm_x86) { |
| 1210 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cb80197 | 2019-10-23 02:10:33 -0700 | [diff] [blame] | 1211 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x8__psimd_splat, |
| 1212 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x8__psimd_splat, |
| 1213 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8__psimd_splat, |
| 1214 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8__psimd_splat, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1215 | .mr = 4, |
| 1216 | .nr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1217 | }; |
| 1218 | } else { |
| 1219 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1220 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_6x8s4__psimd, |
| 1221 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_6x8s4__psimd, |
Marat Dukhan | 7353eea | 2020-02-18 16:04:05 -0800 | [diff] [blame] | 1222 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x8s4__psimd, |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1223 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x8s4__psimd, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1224 | .mr = 6, |
| 1225 | .nr = 8, |
Marat Dukhan | cd945c6 | 2019-10-25 11:59:50 -0700 | [diff] [blame] | 1226 | .log2_sr = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1227 | }; |
| 1228 | } |
| 1229 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 1230 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x2c4__psimd, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1231 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2c4__psimd, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1232 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1233 | .nr = 2, |
| 1234 | .log2_kr = 2, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1235 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1236 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1237 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x4__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1238 | .cr = 4, |
| 1239 | .mr = 4, |
Marat Dukhan | 466b523 | 2019-10-09 11:22:20 -0700 | [diff] [blame] | 1240 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1241 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1242 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x9__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1243 | .cr = 4, |
| 1244 | .mr = 9, |
| 1245 | }; |
| 1246 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 5098c3e | 2019-11-07 12:01:19 -0800 | [diff] [blame] | 1247 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up4x25__psimd_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1248 | .cr = 4, |
| 1249 | .mr = 25, |
| 1250 | }; |
| 1251 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1252 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_9x__psimd_c4, |
| 1253 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1254 | .mr = 9, |
| 1255 | .qr = 8, |
| 1256 | }; |
| 1257 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1258 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_9x__psimd_c4, |
| 1259 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1260 | .mr = 9, |
| 1261 | .qr = 8, |
| 1262 | }; |
| 1263 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 1264 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_7x__psimd_c4, |
| 1265 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_7p7x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1266 | .mr = 7, |
| 1267 | }; |
| 1268 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1269 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1270 | .mr = 9, |
| 1271 | .qr = 8, |
| 1272 | }; |
| 1273 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1274 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1275 | .mr = 4, |
| 1276 | }; |
| 1277 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1278 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1279 | .mr = 9, |
| 1280 | }; |
| 1281 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1282 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__psimd_c4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1283 | .mr = 9, |
| 1284 | .qr = 8, |
| 1285 | }; |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 1286 | xnn_params.f32.ibilinear = (struct ibilinear_parameters) { |
| 1287 | .ukernel = (xnn_ibilinear_ukernel_function) xnn_f32_ibilinear_ukernel__psimd_c8, |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1288 | .pixel_tile = 1, |
| 1289 | .channel_tile = 8, |
| 1290 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1291 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__psimd_x8; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1292 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__psimd_x8; |
Marat Dukhan | 8d3c07e | 2020-01-02 01:20:59 -0800 | [diff] [blame] | 1293 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__psimd_p5_div_x16; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1294 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1295 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__psimd_2x8, |
| 1296 | .row_tile = 2, |
| 1297 | .channel_tile = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1298 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 1299 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__psimd_p5_x16_acc2; |
| 1300 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__psimd; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1301 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
| 1302 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__psimd_x8, |
| 1303 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1304 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__psimd_x8, |
| 1305 | .element_tile = 8, |
| 1306 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1307 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1308 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__psimd_x4, |
| 1309 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1310 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__psimd_x4, |
| 1311 | .element_tile = 4, |
| 1312 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1313 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1314 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__psimd_x8, |
| 1315 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1316 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__psimd_x8, |
| 1317 | .element_tile = 8, |
| 1318 | }; |
| 1319 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1320 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__psimd_x8, |
| 1321 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1322 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__psimd_x8, |
| 1323 | .element_tile = 8, |
| 1324 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1325 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
| 1326 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__psimd_x8, |
| 1327 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
| 1328 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__psimd_x8, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1329 | .element_tile = 8, |
| 1330 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1331 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
| 1332 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__psimd_x8, |
| 1333 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__psimd_x8, |
| 1334 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__psimd_x8, |
| 1335 | .element_tile = 8, |
| 1336 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1337 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1338 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c4__psimd_2x, |
| 1339 | .channel_tile = 4, |
| 1340 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1341 | }; |
| 1342 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1343 | |
| 1344 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1345 | #ifndef XNN_NO_X32_OPERATORS |
| 1346 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1347 | .ukernel = xnn_x32_pad_x2__psimd, |
| 1348 | .mr = 2, |
| 1349 | }; |
| 1350 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__psimd; |
| 1351 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1352 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__psimd, |
| 1353 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__psimd, |
| 1354 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__psimd, |
| 1355 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__psimd, |
| 1356 | }; |
| 1357 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1358 | |
Marat Dukhan | 1dadbf7 | 2019-10-01 10:46:20 -0700 | [diff] [blame] | 1359 | #elif XNN_ARCH_WASM || XNN_ARCH_ASMJS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1360 | // Unlike most other architectures, on x86/x86-64 when floating-point instructions |
| 1361 | // have no NaN arguments, but produce NaN output, the output NaN has sign bit set. |
| 1362 | // We use it to distinguish x86/x86-64 from other architectures, by doing subtraction |
| 1363 | // of two infinities (must produce NaN per IEEE 754 standard). |
| 1364 | static volatile uint32_t minus_inf = UINT32_C(0xFF800000); |
| 1365 | const bool is_wasm_x86 = (int32_t) xnn_stub_wasm_f32_sub(minus_inf, minus_inf) < 0; |
| 1366 | |
| 1367 | /**************************** Q8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1368 | #ifndef XNN_NO_Q8_OPERATORS |
| 1369 | xnn_params.q8.gemm = (struct gemm_parameters) { |
| 1370 | .gemm = (xnn_gemm_ukernel_function) xnn_q8_gemm_ukernel_2x2__scalar, |
| 1371 | .igemm = (xnn_igemm_ukernel_function) xnn_q8_igemm_ukernel_2x2__scalar, |
| 1372 | .mr = 2, |
| 1373 | .nr = 2, |
| 1374 | }; |
| 1375 | xnn_params.q8.dwconv[0] = (struct dwconv_parameters) { |
| 1376 | .up = (xnn_dwconv_up_ukernel_function) xnn_q8_dwconv_ukernel_up1x9__scalar, |
| 1377 | .cr = 1, |
| 1378 | .mr = 9, |
| 1379 | }; |
| 1380 | xnn_params.q8.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1381 | .up = (xnn_avgpool_up_ukernel_function) xnn_q8_avgpool_ukernel_9x__scalar_c1, |
| 1382 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_q8_avgpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1383 | .mr = 9, |
| 1384 | .qr = 8, |
| 1385 | }; |
| 1386 | xnn_params.q8.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 1387 | .up = (xnn_gavgpool_up_ukernel_function) xnn_q8_gavgpool_ukernel_7x__scalar_c1, |
| 1388 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_q8_gavgpool_ukernel_7p7x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1389 | .mr = 7, |
| 1390 | }; |
| 1391 | xnn_params.q8.vadd = (xnn_vadd_ukernel_function) xnn_q8_vadd_ukernel__scalar; |
| 1392 | #endif // XNN_NO_Q8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1393 | |
| 1394 | /**************************** U8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1395 | #ifndef XNN_NO_U8_OPERATORS |
| 1396 | xnn_params.u8.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1397 | .ukernel = (xnn_maxpool_ukernel_function) xnn_u8_maxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1398 | .mr = 9, |
| 1399 | .qr = 8, |
| 1400 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1401 | xnn_params.u8.clamp = (xnn_univector_ukernel_function) xnn_u8_clamp_ukernel__scalar_x4; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1402 | xnn_params.u8.lut32norm = xnn_u8_lut32norm_ukernel__scalar; |
| 1403 | xnn_params.u8.rmax = xnn_u8_rmax_ukernel__scalar; |
| 1404 | #endif // XNN_NO_U8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1405 | |
| 1406 | /**************************** X8 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1407 | #ifndef XNN_NO_X8_OPERATORS |
| 1408 | xnn_params.x8.lut = xnn_x8_lut_ukernel__scalar; |
| 1409 | xnn_params.x8.zip = (struct zip_parameters) { |
| 1410 | .x2 = (xnn_zipc_ukernel_function) xnn_x8_zip_x2_ukernel__scalar, |
| 1411 | .x3 = (xnn_zipc_ukernel_function) xnn_x8_zip_x3_ukernel__scalar, |
| 1412 | .x4 = (xnn_zipc_ukernel_function) xnn_x8_zip_x4_ukernel__scalar, |
| 1413 | .xm = (xnn_zipv_ukernel_function) xnn_x8_zip_xm_ukernel__scalar, |
| 1414 | }; |
| 1415 | #endif // XNN_NO_X8_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1416 | |
| 1417 | /**************************** F32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1418 | #ifndef XNN_NO_F32_OPERATORS |
| 1419 | if (is_wasm_x86) { |
| 1420 | xnn_params.f32.gemm = (struct gemm_parameters) { |
| 1421 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_2x4__scalar, |
| 1422 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_2x4__scalar, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1423 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1424 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1425 | .mr = 2, |
| 1426 | .nr = 4, |
| 1427 | }; |
| 1428 | } else { |
| 1429 | xnn_params.f32.gemm = (struct gemm_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1430 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x4__wasm, |
| 1431 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x4__wasm, |
| 1432 | .gemm1 = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_1x4__wasm, |
| 1433 | .igemm1 = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_1x4__wasm, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1434 | .mr = 4, |
| 1435 | .nr = 4, |
| 1436 | }; |
| 1437 | } |
| 1438 | xnn_params.f32.gemm2 = (struct gemm_parameters) { |
Marat Dukhan | 2995427 | 2020-02-13 17:56:11 -0800 | [diff] [blame] | 1439 | .gemm = (xnn_gemm_ukernel_function) xnn_f32_gemm_ukernel_4x2__wasm, |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1440 | .igemm = (xnn_igemm_ukernel_function) xnn_f32_igemm_ukernel_4x2__wasm, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1441 | .mr = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1442 | .nr = 2, |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1443 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1444 | xnn_params.f32.dwconv[0] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1445 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x4__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1446 | .cr = 1, |
| 1447 | .mr = 4, |
| 1448 | }; |
| 1449 | xnn_params.f32.dwconv[1] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1450 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x9__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1451 | .cr = 1, |
| 1452 | .mr = 9, |
| 1453 | }; |
| 1454 | xnn_params.f32.dwconv[2] = (struct dwconv_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1455 | .up = (xnn_dwconv_up_ukernel_function) xnn_f32_dwconv_ukernel_up1x25__wasm_acc2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1456 | .cr = 1, |
| 1457 | .mr = 25, |
| 1458 | }; |
| 1459 | xnn_params.f32.avgpool = (struct avgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1460 | .up = (xnn_avgpool_up_ukernel_function) xnn_f32_avgpool_ukernel_9x__wasm_c1, |
| 1461 | .mp = (xnn_avgpool_mp_ukernel_function) xnn_f32_avgpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1462 | .mr = 9, |
| 1463 | .qr = 8, |
| 1464 | }; |
| 1465 | xnn_params.f32.pavgpool = (struct pavgpool_parameters) { |
Marat Dukhan | 6ee435a | 2020-02-26 22:33:38 -0800 | [diff] [blame] | 1466 | .up = (xnn_pavgpool_up_ukernel_function) xnn_f32_pavgpool_ukernel_9x__wasm_c1, |
| 1467 | .mp = (xnn_pavgpool_mp_ukernel_function) xnn_f32_pavgpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1468 | .mr = 9, |
| 1469 | .qr = 8, |
| 1470 | }; |
| 1471 | xnn_params.f32.gavgpool = (struct gavgpool_parameters) { |
Marat Dukhan | a63a6fc | 2020-03-10 06:12:48 -0700 | [diff] [blame] | 1472 | .up = (xnn_gavgpool_up_ukernel_function) xnn_f32_gavgpool_ukernel_7x__wasm_c1, |
| 1473 | .mp = (xnn_gavgpool_mp_ukernel_function) xnn_f32_gavgpool_ukernel_7p7x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1474 | .mr = 7, |
| 1475 | }; |
| 1476 | xnn_params.f32.maxpool = (struct maxpool_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1477 | .ukernel = (xnn_maxpool_ukernel_function) xnn_f32_maxpool_ukernel_9p8x__wasm_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1478 | .mr = 9, |
| 1479 | .qr = 8, |
| 1480 | }; |
| 1481 | xnn_params.f32.argmaxpool[0] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1482 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_4x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1483 | .mr = 4, |
| 1484 | }; |
| 1485 | xnn_params.f32.argmaxpool[1] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1486 | .up = (xnn_argmaxpool_up_ukernel_function) xnn_f32_argmaxpool_ukernel_9x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1487 | .mr = 9, |
| 1488 | }; |
| 1489 | xnn_params.f32.argmaxpool[2] = (struct argmaxpool_parameters) { |
Marat Dukhan | 329da64 | 2019-11-19 21:44:39 -0800 | [diff] [blame] | 1490 | .mp = (xnn_argmaxpool_mp_ukernel_function) xnn_f32_argmaxpool_ukernel_9p8x__scalar_c1, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1491 | .mr = 9, |
| 1492 | .qr = 8, |
| 1493 | }; |
Marat Dukhan | 660fd19 | 2020-03-10 04:55:30 -0700 | [diff] [blame] | 1494 | xnn_params.f32.ibilinear = (struct ibilinear_parameters) { |
| 1495 | .ukernel = (xnn_ibilinear_ukernel_function) xnn_f32_ibilinear_ukernel__scalar_c2, |
Marat Dukhan | 6972249 | 2019-11-11 19:55:50 -0800 | [diff] [blame] | 1496 | .pixel_tile = 1, |
| 1497 | .channel_tile = 2, |
| 1498 | }; |
Marat Dukhan | 5c5fa96 | 2020-03-10 18:38:33 -0700 | [diff] [blame] | 1499 | xnn_params.f32.clamp = (xnn_univector_ukernel_function) xnn_f32_clamp_ukernel__wasm_x4; |
Marat Dukhan | 662faa0 | 2019-12-09 22:48:16 -0800 | [diff] [blame] | 1500 | xnn_params.f32.hswish = (xnn_univector_ukernel_function) xnn_f32_hswish_ukernel__wasm_x4; |
Marat Dukhan | 3a77ea7 | 2019-12-23 12:10:24 -0800 | [diff] [blame] | 1501 | xnn_params.f32.sigmoid = (xnn_univector_ukernel_function) xnn_f32_sigmoid_ukernel__scalar_lut64_p2_div_x2; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1502 | xnn_params.f32.prelu = (struct prelu_parameters) { |
Marat Dukhan | c8230a4 | 2020-02-24 00:00:35 -0800 | [diff] [blame] | 1503 | .ukernel = (xnn_prelu_ukernel_function) xnn_f32_prelu_ukernel__scalar_2x4, |
Marat Dukhan | 69c3f2c | 2019-11-06 12:30:01 -0800 | [diff] [blame] | 1504 | .row_tile = 4, |
| 1505 | .channel_tile = 4, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1506 | }; |
Marat Dukhan | 1edc454 | 2020-01-27 12:40:13 -0800 | [diff] [blame] | 1507 | xnn_params.f32.raddstoreexpminusmax = xnn_f32_raddstoreexpminusmax_ukernel__scalar_p5_x4_acc2; |
| 1508 | xnn_params.f32.rmax = xnn_f32_rmax_ukernel__scalar; |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1509 | xnn_params.f32.vadd = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1510 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vadd_ukernel__wasm_x4, |
| 1511 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
| 1512 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vaddc_ukernel__wasm_x4, |
Marat Dukhan | b1a0fc3 | 2019-12-02 19:32:02 -0800 | [diff] [blame] | 1513 | .element_tile = 8, |
| 1514 | }; |
Marat Dukhan | 6918050 | 2019-12-06 15:00:31 -0800 | [diff] [blame] | 1515 | xnn_params.f32.vdiv = (struct vbinary_parameters) { |
| 1516 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdiv_ukernel__wasm_x2, |
| 1517 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vdivc_ukernel__wasm_x2, |
| 1518 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrdivc_ukernel__wasm_x2, |
| 1519 | .element_tile = 2, |
| 1520 | }; |
Marat Dukhan | 79e7f84 | 2019-12-05 14:35:50 -0800 | [diff] [blame] | 1521 | xnn_params.f32.vmax = (struct vbinary_parameters) { |
| 1522 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmax_ukernel__wasm_x4, |
| 1523 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1524 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmaxc_ukernel__wasm_x4, |
| 1525 | .element_tile = 8, |
| 1526 | }; |
| 1527 | xnn_params.f32.vmin = (struct vbinary_parameters) { |
| 1528 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmin_ukernel__wasm_x4, |
| 1529 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1530 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vminc_ukernel__wasm_x4, |
| 1531 | .element_tile = 8, |
| 1532 | }; |
Marat Dukhan | 1e782c4 | 2019-11-21 17:02:40 -0800 | [diff] [blame] | 1533 | xnn_params.f32.vmul = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1534 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmul_ukernel__wasm_x4, |
| 1535 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
| 1536 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vmulc_ukernel__wasm_x4, |
Marat Dukhan | ca2733c | 2019-11-15 23:21:17 -0800 | [diff] [blame] | 1537 | .element_tile = 8, |
| 1538 | }; |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1539 | xnn_params.f32.vsub = (struct vbinary_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1540 | .op_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsub_ukernel__wasm_x4, |
| 1541 | .opc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vsubc_ukernel__wasm_x4, |
| 1542 | .ropc_ukernel = (xnn_vbinary_ukernel_function) xnn_f32_vrsubc_ukernel__wasm_x4, |
Marat Dukhan | 05f3f6d | 2019-12-03 15:13:53 -0800 | [diff] [blame] | 1543 | .element_tile = 8, |
| 1544 | }; |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1545 | xnn_params.f32.vmulcaddc = (struct vmulcaddc_parameters) { |
Marat Dukhan | 436ebe6 | 2019-12-04 15:10:12 -0800 | [diff] [blame] | 1546 | .ukernel = (xnn_vmulcaddc_ukernel_function) xnn_f32_vmulcaddc_ukernel_c1__wasm_2x, |
Marat Dukhan | 49e6ee9 | 2019-11-06 15:55:29 -0800 | [diff] [blame] | 1547 | .channel_tile = 1, |
| 1548 | .row_tile = 2, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1549 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1550 | #ifndef XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1551 | xnn_params.f32.spmm = (struct spmm_parameters) { |
Marat Dukhan | bff791e | 2019-10-24 11:05:37 -0700 | [diff] [blame] | 1552 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x1__scalar, |
| 1553 | .mr = 8, |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1554 | .nr = 1, |
| 1555 | }; |
Erich Elsen | c6afd9b | 2019-10-24 16:10:53 -0700 | [diff] [blame] | 1556 | xnn_params.f32.spmm2 = (struct spmm_parameters) { |
| 1557 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x2__scalar, |
| 1558 | .mr = 8, |
| 1559 | .nr = 2, |
| 1560 | }; |
| 1561 | xnn_params.f32.spmm4 = (struct spmm_parameters) { |
| 1562 | .ukernel = (xnn_spmm_ukernel_function) xnn_f32_spmm_ukernel_8x4__scalar, |
| 1563 | .mr = 8, |
| 1564 | .nr = 4, |
| 1565 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1566 | xnn_params.f32.hwc2spchw_dconv3x3c3s2 = (struct hwc2spchw_dconv_parameters) { |
| 1567 | .ukernel_with_symm_padding = |
| 1568 | (xnn_conv_hwc2spchw_ukernel_function) xnn_f32_conv_hwc2spchw_ukernel_3x3s2p1c3x4__scalar_1x1, |
| 1569 | .output_channel_tile = 4, |
| 1570 | .output_height_tile = 1, |
| 1571 | .output_width_tile = 1, |
| 1572 | }; |
| 1573 | xnn_params.f32.spchw_dwconv3x3 = (struct spchw_dwconv_parameters) { |
| 1574 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3p1__scalar, |
| 1575 | .input_width_tile = 1, |
| 1576 | .output_width_tile = 1, |
| 1577 | .output_height_tile = 1, |
| 1578 | }; |
| 1579 | xnn_params.f32.spchw_dwconv3x3s2 = (struct spchw_dwconv_parameters) { |
| 1580 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_3x3s2p1__scalar, |
| 1581 | .input_width_tile = 1, |
| 1582 | .output_width_tile = 1, |
| 1583 | .output_height_tile = 1, |
| 1584 | }; |
Marat Dukhan | a99918a | 2019-11-15 14:40:12 -0800 | [diff] [blame] | 1585 | xnn_params.f32.spchw_dwconv5x5 = (struct spchw_dwconv_parameters) { |
| 1586 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5p2__scalar, |
| 1587 | .input_width_tile = 1, |
| 1588 | .output_width_tile = 1, |
| 1589 | .output_height_tile = 1, |
| 1590 | }; |
| 1591 | xnn_params.f32.spchw_dwconv5x5s2 = (struct spchw_dwconv_parameters) { |
| 1592 | .ukernel = (xnn_dwconv_spchw_ukernel_function) xnn_f32_dwconv_spchw_ukernel_5x5s2p2__scalar, |
| 1593 | .input_width_tile = 1, |
| 1594 | .output_width_tile = 1, |
| 1595 | .output_height_tile = 1, |
| 1596 | }; |
Marat Dukhan | 14fe0b2 | 2019-10-23 21:20:07 -0700 | [diff] [blame] | 1597 | xnn_params.f32.spchw_gavgpool = (struct spchw_gavgpool_parameters) { |
| 1598 | .ukernel = (xnn_gavgpool_spchw_ukernel_function) xnn_f32_gavgpool_spchw_ukernel__scalar_x1, |
| 1599 | .channel_tile = 1, |
| 1600 | }; |
Marat Dukhan | efc47b8 | 2019-11-18 09:25:38 -0800 | [diff] [blame] | 1601 | #endif // XNN_NO_NCHW_OPERATORS |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1602 | #endif // XNN_NO_F32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1603 | |
| 1604 | /**************************** X32 micro-kernels ****************************/ |
Marat Dukhan | 8fe54e4 | 2019-10-10 14:12:59 -0700 | [diff] [blame] | 1605 | #ifndef XNN_NO_X32_OPERATORS |
| 1606 | xnn_params.x32.pad = (struct pad_parameters) { |
| 1607 | .ukernel = xnn_x32_pad_x2__scalar, |
| 1608 | .mr = 2, |
| 1609 | }; |
| 1610 | xnn_params.x32.unpool = (xnn_unpool_ukernel_function) xnn_x32_unpool_ukernel__scalar; |
| 1611 | xnn_params.x32.zip = (struct zip_parameters) { |
| 1612 | .x2 = (xnn_zipc_ukernel_function) xnn_x32_zip_x2_ukernel__scalar, |
| 1613 | .x3 = (xnn_zipc_ukernel_function) xnn_x32_zip_x3_ukernel__scalar, |
| 1614 | .x4 = (xnn_zipc_ukernel_function) xnn_x32_zip_x4_ukernel__scalar, |
| 1615 | .xm = (xnn_zipv_ukernel_function) xnn_x32_zip_xm_ukernel__scalar, |
| 1616 | }; |
| 1617 | #endif // XNN_NO_X32_OPERATORS |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1618 | |
| 1619 | #else |
| 1620 | #error "Unsupported architecture" |
| 1621 | #endif |
| 1622 | xnn_params.initialized = true; |
| 1623 | } |
| 1624 | |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1625 | enum xnn_status xnn_initialize(const struct xnn_allocator* allocator) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1626 | #ifndef __EMSCRIPTEN__ |
| 1627 | if (!cpuinfo_initialize()) { |
| 1628 | return xnn_status_out_of_memory; |
| 1629 | } |
| 1630 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1631 | pthread_once(&init_guard, &init); |
| 1632 | if (xnn_params.initialized) { |
Marat Dukhan | 04f03be | 2019-11-19 12:36:47 -0800 | [diff] [blame] | 1633 | if (allocator != NULL) { |
| 1634 | memcpy(&xnn_params.allocator, allocator, sizeof(struct xnn_allocator)); |
| 1635 | } else { |
| 1636 | xnn_params.allocator.allocate = &xnn_allocate; |
| 1637 | xnn_params.allocator.reallocate = &xnn_reallocate; |
| 1638 | xnn_params.allocator.deallocate = &xnn_deallocate; |
| 1639 | xnn_params.allocator.aligned_allocate = &xnn_aligned_allocate; |
| 1640 | xnn_params.allocator.aligned_deallocate = &xnn_aligned_deallocate; |
| 1641 | } |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1642 | return xnn_status_success; |
| 1643 | } else { |
| 1644 | return xnn_status_unsupported_hardware; |
| 1645 | } |
| 1646 | } |
| 1647 | |
| 1648 | enum xnn_status xnn_deinitialize(void) { |
Marat Dukhan | d343c22 | 2019-10-07 09:22:14 -0700 | [diff] [blame] | 1649 | #ifndef __EMSCRIPTEN__ |
| 1650 | cpuinfo_deinitialize(); |
| 1651 | #endif |
XNNPACK Team | b455b12 | 2019-09-27 18:10:33 -0700 | [diff] [blame] | 1652 | return xnn_status_success; |
| 1653 | } |