Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright © 2007 Red Hat Inc. |
Eric Anholt | c9ce2ed | 2012-03-09 16:08:23 -0800 | [diff] [blame] | 4 | * Copyright © 2007-2012 Intel Corporation |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 5 | * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA |
| 6 | * All Rights Reserved. |
| 7 | * |
| 8 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 9 | * copy of this software and associated documentation files (the |
| 10 | * "Software"), to deal in the Software without restriction, including |
| 11 | * without limitation the rights to use, copy, modify, merge, publish, |
| 12 | * distribute, sub license, and/or sell copies of the Software, and to |
| 13 | * permit persons to whom the Software is furnished to do so, subject to |
| 14 | * the following conditions: |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 20 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 21 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 22 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * The above copyright notice and this permission notice (including the |
| 25 | * next paragraph) shall be included in all copies or substantial portions |
| 26 | * of the Software. |
| 27 | * |
| 28 | * |
| 29 | **************************************************************************/ |
| 30 | /* |
| 31 | * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com> |
| 32 | * Keith Whitwell <keithw-at-tungstengraphics-dot-com> |
| 33 | * Eric Anholt <eric@anholt.net> |
| 34 | * Dave Airlie <airlied@linux.ie> |
| 35 | */ |
| 36 | |
Eric Anholt | 368b392 | 2008-09-10 13:54:34 -0700 | [diff] [blame] | 37 | #ifdef HAVE_CONFIG_H |
| 38 | #include "config.h" |
| 39 | #endif |
| 40 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 41 | #include <xf86drm.h> |
Pauli Nieminen | 21105bc | 2010-03-10 13:35:59 +0200 | [diff] [blame] | 42 | #include <xf86atomic.h> |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 43 | #include <fcntl.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 44 | #include <stdio.h> |
| 45 | #include <stdlib.h> |
| 46 | #include <string.h> |
| 47 | #include <unistd.h> |
| 48 | #include <assert.h> |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 49 | #include <pthread.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 50 | #include <sys/ioctl.h> |
Jesse Barnes | 276c07d | 2008-11-13 13:52:04 -0800 | [diff] [blame] | 51 | #include <sys/stat.h> |
| 52 | #include <sys/types.h> |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 53 | #include <stdbool.h> |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 54 | |
| 55 | #include "errno.h" |
David Shao | 7d42b49 | 2012-11-10 00:24:56 -0500 | [diff] [blame] | 56 | #ifndef ETIME |
| 57 | #define ETIME ETIMEDOUT |
| 58 | #endif |
Emil Velikov | 42465fe | 2015-04-05 15:51:59 +0100 | [diff] [blame] | 59 | #include "libdrm_macros.h" |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 60 | #include "libdrm_lists.h" |
Eric Anholt | c485742 | 2008-06-03 10:20:49 -0700 | [diff] [blame] | 61 | #include "intel_bufmgr.h" |
Eric Anholt | 738e36a | 2008-09-05 10:35:32 +0100 | [diff] [blame] | 62 | #include "intel_bufmgr_priv.h" |
Eric Anholt | cbdd627 | 2009-01-27 17:16:11 -0800 | [diff] [blame] | 63 | #include "intel_chipset.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 64 | #include "string.h" |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 65 | |
| 66 | #include "i915_drm.h" |
| 67 | |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 68 | #ifdef HAVE_VALGRIND |
| 69 | #include <valgrind.h> |
| 70 | #include <memcheck.h> |
| 71 | #define VG(x) x |
| 72 | #else |
| 73 | #define VG(x) |
| 74 | #endif |
| 75 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 76 | #define memclear(s) memset(&s, 0, sizeof(s)) |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 77 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 78 | #define DBG(...) do { \ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 79 | if (bufmgr_gem->bufmgr.debug) \ |
| 80 | fprintf(stderr, __VA_ARGS__); \ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 81 | } while (0) |
| 82 | |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 83 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 84 | #define MAX2(A, B) ((A) > (B) ? (A) : (B)) |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 85 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 86 | typedef struct _drm_intel_bo_gem drm_intel_bo_gem; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 87 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 88 | struct drm_intel_gem_bo_bucket { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 89 | drmMMListHead head; |
| 90 | unsigned long size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 91 | }; |
| 92 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 93 | typedef struct _drm_intel_bufmgr_gem { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 94 | drm_intel_bufmgr bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 95 | |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 96 | atomic_t refcount; |
| 97 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 98 | int fd; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 99 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 100 | int max_relocs; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 101 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 102 | pthread_mutex_t lock; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 103 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 104 | struct drm_i915_gem_exec_object *exec_objects; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 105 | struct drm_i915_gem_exec_object2 *exec2_objects; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 106 | drm_intel_bo **exec_bos; |
| 107 | int exec_size; |
| 108 | int exec_count; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 109 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 110 | /** Array of lists of cached gem objects of power-of-two sizes */ |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 111 | struct drm_intel_gem_bo_bucket cache_bucket[14 * 4]; |
| 112 | int num_buckets; |
Chris Wilson | f16b416 | 2010-06-21 15:21:48 +0100 | [diff] [blame] | 113 | time_t time; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 114 | |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 115 | drmMMListHead managers; |
| 116 | |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 117 | drmMMListHead named; |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 118 | drmMMListHead vma_cache; |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 119 | int vma_count, vma_open, vma_max; |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 120 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 121 | uint64_t gtt_size; |
| 122 | int available_fences; |
| 123 | int pci_device; |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 124 | int gen; |
Chris Wilson | 3624577 | 2010-10-29 10:49:54 +0100 | [diff] [blame] | 125 | unsigned int has_bsd : 1; |
| 126 | unsigned int has_blt : 1; |
| 127 | unsigned int has_relaxed_fencing : 1; |
Eugeni Dodonov | 151cdcf | 2012-01-17 15:20:19 -0200 | [diff] [blame] | 128 | unsigned int has_llc : 1; |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 129 | unsigned int has_wait_timeout : 1; |
Chris Wilson | 3624577 | 2010-10-29 10:49:54 +0100 | [diff] [blame] | 130 | unsigned int bo_reuse : 1; |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 131 | unsigned int no_exec : 1; |
Xiang, Haihao | 0119999 | 2012-11-14 12:46:39 +0800 | [diff] [blame] | 132 | unsigned int has_vebox : 1; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 133 | bool fenced_relocs; |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 134 | |
Tvrtko Ursulin | 3092148 | 2015-04-17 11:57:28 +0100 | [diff] [blame] | 135 | struct { |
| 136 | void *ptr; |
| 137 | uint32_t handle; |
| 138 | } userptr_active; |
| 139 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 140 | } drm_intel_bufmgr_gem; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 141 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 142 | #define DRM_INTEL_RELOC_FENCE (1<<0) |
| 143 | |
| 144 | typedef struct _drm_intel_reloc_target_info { |
| 145 | drm_intel_bo *bo; |
| 146 | int flags; |
| 147 | } drm_intel_reloc_target; |
| 148 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 149 | struct _drm_intel_bo_gem { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 150 | drm_intel_bo bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 151 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 152 | atomic_t refcount; |
| 153 | uint32_t gem_handle; |
| 154 | const char *name; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 155 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 156 | /** |
| 157 | * Kenel-assigned global name for this object |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 158 | * |
| 159 | * List contains both flink named and prime fd'd objects |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 160 | */ |
| 161 | unsigned int global_name; |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 162 | drmMMListHead name_list; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 163 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 164 | /** |
| 165 | * Index of the buffer within the validation list while preparing a |
| 166 | * batchbuffer execution. |
| 167 | */ |
| 168 | int validate_index; |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 169 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 170 | /** |
| 171 | * Current tiling mode |
| 172 | */ |
| 173 | uint32_t tiling_mode; |
| 174 | uint32_t swizzle_mode; |
Chris Wilson | 056aa9b | 2010-06-21 14:31:29 +0100 | [diff] [blame] | 175 | unsigned long stride; |
Eric Anholt | 3f3c5be | 2009-07-09 17:49:46 -0700 | [diff] [blame] | 176 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 177 | time_t free_time; |
Keith Packard | 329e086 | 2008-06-05 16:05:35 -0700 | [diff] [blame] | 178 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 179 | /** Array passed to the DRM containing relocation information. */ |
| 180 | struct drm_i915_gem_relocation_entry *relocs; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 181 | /** |
| 182 | * Array of info structs corresponding to relocs[i].target_handle etc |
| 183 | */ |
| 184 | drm_intel_reloc_target *reloc_target_info; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 185 | /** Number of entries in relocs */ |
| 186 | int reloc_count; |
| 187 | /** Mapped address for the buffer, saved across map/unmap cycles */ |
| 188 | void *mem_virtual; |
| 189 | /** GTT virtual address for the buffer, saved across map/unmap cycles */ |
| 190 | void *gtt_virtual; |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 191 | /** |
| 192 | * Virtual address of the buffer allocated by user, used for userptr |
| 193 | * objects only. |
| 194 | */ |
| 195 | void *user_virtual; |
Chris Wilson | c549a77 | 2011-12-05 10:14:34 +0000 | [diff] [blame] | 196 | int map_count; |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 197 | drmMMListHead vma_list; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 198 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 199 | /** BO cache list */ |
| 200 | drmMMListHead head; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 201 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 202 | /** |
| 203 | * Boolean of whether this BO and its children have been included in |
| 204 | * the current drm_intel_bufmgr_check_aperture_space() total. |
| 205 | */ |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 206 | bool included_in_check_aperture; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 207 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 208 | /** |
| 209 | * Boolean of whether this buffer has been used as a relocation |
| 210 | * target and had its size accounted for, and thus can't have any |
| 211 | * further relocations added to it. |
| 212 | */ |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 213 | bool used_as_reloc_target; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 214 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 215 | /** |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 216 | * Boolean of whether we have encountered an error whilst building the relocation tree. |
| 217 | */ |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 218 | bool has_error; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 219 | |
| 220 | /** |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 221 | * Boolean of whether this buffer can be re-used |
| 222 | */ |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 223 | bool reusable; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 224 | |
| 225 | /** |
Eric Anholt | 02f93c2 | 2014-01-15 00:38:39 -0800 | [diff] [blame] | 226 | * Boolean of whether the GPU is definitely not accessing the buffer. |
| 227 | * |
| 228 | * This is only valid when reusable, since non-reusable |
| 229 | * buffers are those that have been shared wth other |
| 230 | * processes, so we don't know their state. |
| 231 | */ |
| 232 | bool idle; |
| 233 | |
| 234 | /** |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 235 | * Boolean of whether this buffer was allocated with userptr |
| 236 | */ |
| 237 | bool is_userptr; |
| 238 | |
| 239 | /** |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 240 | * Size in bytes of this buffer and its relocation descendents. |
| 241 | * |
| 242 | * Used to avoid costly tree walking in |
| 243 | * drm_intel_bufmgr_check_aperture in the common case. |
| 244 | */ |
| 245 | int reloc_tree_size; |
| 246 | |
| 247 | /** |
| 248 | * Number of potential fence registers required by this buffer and its |
| 249 | * relocations. |
| 250 | */ |
| 251 | int reloc_tree_fences; |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 252 | |
| 253 | /** Flags that we may need to do the SW_FINSIH ioctl on unmap. */ |
| 254 | bool mapped_cpu_write; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 255 | }; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 256 | |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 257 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 258 | drm_intel_gem_estimate_batch_space(drm_intel_bo ** bo_array, int count); |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 259 | |
| 260 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 261 | drm_intel_gem_compute_batch_space(drm_intel_bo ** bo_array, int count); |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 262 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 263 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 264 | drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 265 | uint32_t * swizzle_mode); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 266 | |
| 267 | static int |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 268 | drm_intel_gem_bo_set_tiling_internal(drm_intel_bo *bo, |
| 269 | uint32_t tiling_mode, |
| 270 | uint32_t stride); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 271 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 272 | static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo, |
| 273 | time_t time); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 274 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 275 | static void drm_intel_gem_bo_unreference(drm_intel_bo *bo); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 276 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 277 | static void drm_intel_gem_bo_free(drm_intel_bo *bo); |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 278 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 279 | static unsigned long |
| 280 | drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size, |
| 281 | uint32_t *tiling_mode) |
| 282 | { |
| 283 | unsigned long min_size, max_size; |
| 284 | unsigned long i; |
| 285 | |
| 286 | if (*tiling_mode == I915_TILING_NONE) |
| 287 | return size; |
| 288 | |
| 289 | /* 965+ just need multiples of page size for tiling */ |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 290 | if (bufmgr_gem->gen >= 4) |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 291 | return ROUND_UP_TO(size, 4096); |
| 292 | |
| 293 | /* Older chips need powers of two, of at least 512k or 1M */ |
Eric Anholt | acbaff2 | 2010-03-02 15:24:50 -0800 | [diff] [blame] | 294 | if (bufmgr_gem->gen == 3) { |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 295 | min_size = 1024*1024; |
| 296 | max_size = 128*1024*1024; |
| 297 | } else { |
| 298 | min_size = 512*1024; |
| 299 | max_size = 64*1024*1024; |
| 300 | } |
| 301 | |
| 302 | if (size > max_size) { |
| 303 | *tiling_mode = I915_TILING_NONE; |
| 304 | return size; |
| 305 | } |
| 306 | |
Chris Wilson | 3624577 | 2010-10-29 10:49:54 +0100 | [diff] [blame] | 307 | /* Do we need to allocate every page for the fence? */ |
| 308 | if (bufmgr_gem->has_relaxed_fencing) |
| 309 | return ROUND_UP_TO(size, 4096); |
| 310 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 311 | for (i = min_size; i < size; i <<= 1) |
| 312 | ; |
| 313 | |
| 314 | return i; |
| 315 | } |
| 316 | |
| 317 | /* |
| 318 | * Round a given pitch up to the minimum required for X tiling on a |
| 319 | * given chip. We use 512 as the minimum to allow for a later tiling |
| 320 | * change. |
| 321 | */ |
| 322 | static unsigned long |
| 323 | drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, |
Chris Wilson | 726210f | 2010-06-24 11:38:00 +0100 | [diff] [blame] | 324 | unsigned long pitch, uint32_t *tiling_mode) |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 325 | { |
Eric Anholt | 1d4d1e6 | 2010-03-04 16:09:40 -0800 | [diff] [blame] | 326 | unsigned long tile_width; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 327 | unsigned long i; |
| 328 | |
Eric Anholt | 7c697b1 | 2010-03-17 10:05:55 -0700 | [diff] [blame] | 329 | /* If untiled, then just align it so that we can do rendering |
| 330 | * to it with the 3D engine. |
| 331 | */ |
Chris Wilson | 726210f | 2010-06-24 11:38:00 +0100 | [diff] [blame] | 332 | if (*tiling_mode == I915_TILING_NONE) |
Eric Anholt | 7c697b1 | 2010-03-17 10:05:55 -0700 | [diff] [blame] | 333 | return ALIGN(pitch, 64); |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 334 | |
Daniel Vetter | 194aa1b | 2011-09-22 22:20:53 +0200 | [diff] [blame] | 335 | if (*tiling_mode == I915_TILING_X |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 336 | || (IS_915(bufmgr_gem->pci_device) |
| 337 | && *tiling_mode == I915_TILING_Y)) |
Eric Anholt | 1d4d1e6 | 2010-03-04 16:09:40 -0800 | [diff] [blame] | 338 | tile_width = 512; |
| 339 | else |
| 340 | tile_width = 128; |
| 341 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 342 | /* 965 is flexible */ |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 343 | if (bufmgr_gem->gen >= 4) |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 344 | return ROUND_UP_TO(pitch, tile_width); |
| 345 | |
Chris Wilson | 726210f | 2010-06-24 11:38:00 +0100 | [diff] [blame] | 346 | /* The older hardware has a maximum pitch of 8192 with tiled |
| 347 | * surfaces, so fallback to untiled if it's too large. |
| 348 | */ |
| 349 | if (pitch > 8192) { |
| 350 | *tiling_mode = I915_TILING_NONE; |
| 351 | return ALIGN(pitch, 64); |
| 352 | } |
| 353 | |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 354 | /* Pre-965 needs power of two tile width */ |
| 355 | for (i = tile_width; i < pitch; i <<= 1) |
| 356 | ; |
| 357 | |
| 358 | return i; |
| 359 | } |
| 360 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 361 | static struct drm_intel_gem_bo_bucket * |
| 362 | drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem, |
| 363 | unsigned long size) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 364 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 365 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 366 | |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 367 | for (i = 0; i < bufmgr_gem->num_buckets; i++) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 368 | struct drm_intel_gem_bo_bucket *bucket = |
| 369 | &bufmgr_gem->cache_bucket[i]; |
| 370 | if (bucket->size >= size) { |
| 371 | return bucket; |
| 372 | } |
Eric Anholt | 78fa590 | 2009-07-06 11:55:28 -0700 | [diff] [blame] | 373 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 374 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 375 | return NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 376 | } |
| 377 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 378 | static void |
| 379 | drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 380 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 381 | int i, j; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 382 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 383 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 384 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 385 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 386 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 387 | if (bo_gem->relocs == NULL) { |
| 388 | DBG("%2d: %d (%s)\n", i, bo_gem->gem_handle, |
| 389 | bo_gem->name); |
| 390 | continue; |
| 391 | } |
| 392 | |
| 393 | for (j = 0; j < bo_gem->reloc_count; j++) { |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 394 | drm_intel_bo *target_bo = bo_gem->reloc_target_info[j].bo; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 395 | drm_intel_bo_gem *target_gem = |
| 396 | (drm_intel_bo_gem *) target_bo; |
| 397 | |
| 398 | DBG("%2d: %d (%s)@0x%08llx -> " |
| 399 | "%d (%s)@0x%08lx + 0x%08x\n", |
| 400 | i, |
| 401 | bo_gem->gem_handle, bo_gem->name, |
| 402 | (unsigned long long)bo_gem->relocs[j].offset, |
| 403 | target_gem->gem_handle, |
| 404 | target_gem->name, |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 405 | target_bo->offset64, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 406 | bo_gem->relocs[j].delta); |
| 407 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 408 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 409 | } |
| 410 | |
Chris Wilson | 9fec2a8 | 2009-12-02 10:42:51 +0000 | [diff] [blame] | 411 | static inline void |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 412 | drm_intel_gem_bo_reference(drm_intel_bo *bo) |
| 413 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 414 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 415 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 416 | atomic_inc(&bo_gem->refcount); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 417 | } |
| 418 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 419 | /** |
| 420 | * Adds the given buffer to the list of buffers to be validated (moved into the |
| 421 | * appropriate memory type) with the next batch submission. |
| 422 | * |
| 423 | * If a buffer is validated multiple times in a batch submission, it ends up |
| 424 | * with the intersection of the memory type flags and the union of the |
| 425 | * access flags. |
| 426 | */ |
| 427 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 428 | drm_intel_add_validate_buffer(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 429 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 430 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 431 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 432 | int index; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 433 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 434 | if (bo_gem->validate_index != -1) |
| 435 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 436 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 437 | /* Extend the array of validation entries as necessary. */ |
| 438 | if (bufmgr_gem->exec_count == bufmgr_gem->exec_size) { |
| 439 | int new_size = bufmgr_gem->exec_size * 2; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 440 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 441 | if (new_size == 0) |
| 442 | new_size = 5; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 443 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 444 | bufmgr_gem->exec_objects = |
| 445 | realloc(bufmgr_gem->exec_objects, |
| 446 | sizeof(*bufmgr_gem->exec_objects) * new_size); |
| 447 | bufmgr_gem->exec_bos = |
| 448 | realloc(bufmgr_gem->exec_bos, |
| 449 | sizeof(*bufmgr_gem->exec_bos) * new_size); |
| 450 | bufmgr_gem->exec_size = new_size; |
| 451 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 452 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 453 | index = bufmgr_gem->exec_count; |
| 454 | bo_gem->validate_index = index; |
| 455 | /* Fill in array entry */ |
| 456 | bufmgr_gem->exec_objects[index].handle = bo_gem->gem_handle; |
| 457 | bufmgr_gem->exec_objects[index].relocation_count = bo_gem->reloc_count; |
| 458 | bufmgr_gem->exec_objects[index].relocs_ptr = (uintptr_t) bo_gem->relocs; |
Anuj Phogat | 5ba34e1 | 2015-04-10 17:20:56 -0700 | [diff] [blame] | 459 | bufmgr_gem->exec_objects[index].alignment = bo->align; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 460 | bufmgr_gem->exec_objects[index].offset = 0; |
| 461 | bufmgr_gem->exec_bos[index] = bo; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 462 | bufmgr_gem->exec_count++; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 463 | } |
| 464 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 465 | static void |
| 466 | drm_intel_add_validate_buffer2(drm_intel_bo *bo, int need_fence) |
| 467 | { |
| 468 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; |
| 469 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo; |
| 470 | int index; |
| 471 | |
Eric Anholt | 4710286 | 2010-03-03 10:07:27 -0800 | [diff] [blame] | 472 | if (bo_gem->validate_index != -1) { |
| 473 | if (need_fence) |
| 474 | bufmgr_gem->exec2_objects[bo_gem->validate_index].flags |= |
| 475 | EXEC_OBJECT_NEEDS_FENCE; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 476 | return; |
Eric Anholt | 4710286 | 2010-03-03 10:07:27 -0800 | [diff] [blame] | 477 | } |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 478 | |
| 479 | /* Extend the array of validation entries as necessary. */ |
| 480 | if (bufmgr_gem->exec_count == bufmgr_gem->exec_size) { |
| 481 | int new_size = bufmgr_gem->exec_size * 2; |
| 482 | |
| 483 | if (new_size == 0) |
| 484 | new_size = 5; |
| 485 | |
| 486 | bufmgr_gem->exec2_objects = |
| 487 | realloc(bufmgr_gem->exec2_objects, |
| 488 | sizeof(*bufmgr_gem->exec2_objects) * new_size); |
| 489 | bufmgr_gem->exec_bos = |
| 490 | realloc(bufmgr_gem->exec_bos, |
| 491 | sizeof(*bufmgr_gem->exec_bos) * new_size); |
| 492 | bufmgr_gem->exec_size = new_size; |
| 493 | } |
| 494 | |
| 495 | index = bufmgr_gem->exec_count; |
| 496 | bo_gem->validate_index = index; |
| 497 | /* Fill in array entry */ |
| 498 | bufmgr_gem->exec2_objects[index].handle = bo_gem->gem_handle; |
| 499 | bufmgr_gem->exec2_objects[index].relocation_count = bo_gem->reloc_count; |
| 500 | bufmgr_gem->exec2_objects[index].relocs_ptr = (uintptr_t)bo_gem->relocs; |
Anuj Phogat | 5ba34e1 | 2015-04-10 17:20:56 -0700 | [diff] [blame] | 501 | bufmgr_gem->exec2_objects[index].alignment = bo->align; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 502 | bufmgr_gem->exec2_objects[index].offset = 0; |
| 503 | bufmgr_gem->exec_bos[index] = bo; |
| 504 | bufmgr_gem->exec2_objects[index].flags = 0; |
| 505 | bufmgr_gem->exec2_objects[index].rsvd1 = 0; |
| 506 | bufmgr_gem->exec2_objects[index].rsvd2 = 0; |
| 507 | if (need_fence) { |
| 508 | bufmgr_gem->exec2_objects[index].flags |= |
| 509 | EXEC_OBJECT_NEEDS_FENCE; |
| 510 | } |
| 511 | bufmgr_gem->exec_count++; |
| 512 | } |
| 513 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 514 | #define RELOC_BUF_SIZE(x) ((I915_RELOC_HEADER + x * I915_RELOC0_STRIDE) * \ |
| 515 | sizeof(uint32_t)) |
| 516 | |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 517 | static void |
| 518 | drm_intel_bo_gem_set_in_aperture_size(drm_intel_bufmgr_gem *bufmgr_gem, |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 519 | drm_intel_bo_gem *bo_gem, |
| 520 | unsigned int alignment) |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 521 | { |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 522 | unsigned int size; |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 523 | |
| 524 | assert(!bo_gem->used_as_reloc_target); |
| 525 | |
| 526 | /* The older chipsets are far-less flexible in terms of tiling, |
| 527 | * and require tiled buffer to be size aligned in the aperture. |
| 528 | * This means that in the worst possible case we will need a hole |
| 529 | * twice as large as the object in order for it to fit into the |
| 530 | * aperture. Optimal packing is for wimps. |
| 531 | */ |
| 532 | size = bo_gem->bo.size; |
Chris Wilson | 51b8950 | 2010-11-22 09:50:06 +0000 | [diff] [blame] | 533 | if (bufmgr_gem->gen < 4 && bo_gem->tiling_mode != I915_TILING_NONE) { |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 534 | unsigned int min_size; |
Chris Wilson | 51b8950 | 2010-11-22 09:50:06 +0000 | [diff] [blame] | 535 | |
| 536 | if (bufmgr_gem->has_relaxed_fencing) { |
| 537 | if (bufmgr_gem->gen == 3) |
| 538 | min_size = 1024*1024; |
| 539 | else |
| 540 | min_size = 512*1024; |
| 541 | |
| 542 | while (min_size < size) |
| 543 | min_size *= 2; |
| 544 | } else |
| 545 | min_size = size; |
| 546 | |
| 547 | /* Account for worst-case alignment. */ |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 548 | alignment = MAX2(alignment, min_size); |
Chris Wilson | 51b8950 | 2010-11-22 09:50:06 +0000 | [diff] [blame] | 549 | } |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 550 | |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 551 | bo_gem->reloc_tree_size = size + alignment; |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 552 | } |
| 553 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 554 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 555 | drm_intel_setup_reloc_list(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 556 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 557 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 558 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 559 | unsigned int max_relocs = bufmgr_gem->max_relocs; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 560 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 561 | if (bo->size / 4 < max_relocs) |
| 562 | max_relocs = bo->size / 4; |
Eric Anholt | 3c9bd06 | 2009-10-05 16:35:32 -0700 | [diff] [blame] | 563 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 564 | bo_gem->relocs = malloc(max_relocs * |
| 565 | sizeof(struct drm_i915_gem_relocation_entry)); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 566 | bo_gem->reloc_target_info = malloc(max_relocs * |
Chris Wilson | 3506173 | 2010-04-11 18:40:38 +0100 | [diff] [blame] | 567 | sizeof(drm_intel_reloc_target)); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 568 | if (bo_gem->relocs == NULL || bo_gem->reloc_target_info == NULL) { |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 569 | bo_gem->has_error = true; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 570 | |
| 571 | free (bo_gem->relocs); |
| 572 | bo_gem->relocs = NULL; |
| 573 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 574 | free (bo_gem->reloc_target_info); |
| 575 | bo_gem->reloc_target_info = NULL; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 576 | |
| 577 | return 1; |
| 578 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 579 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 580 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 581 | } |
| 582 | |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 583 | static int |
| 584 | drm_intel_gem_bo_busy(drm_intel_bo *bo) |
| 585 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 586 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 587 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 588 | struct drm_i915_gem_busy busy; |
| 589 | int ret; |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 590 | |
Eric Anholt | 02f93c2 | 2014-01-15 00:38:39 -0800 | [diff] [blame] | 591 | if (bo_gem->reusable && bo_gem->idle) |
| 592 | return false; |
| 593 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 594 | memclear(busy); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 595 | busy.handle = bo_gem->gem_handle; |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 596 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 597 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy); |
Eric Anholt | 02f93c2 | 2014-01-15 00:38:39 -0800 | [diff] [blame] | 598 | if (ret == 0) { |
| 599 | bo_gem->idle = !busy.busy; |
| 600 | return busy.busy; |
| 601 | } else { |
| 602 | return false; |
| 603 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 604 | return (ret == 0 && busy.busy); |
Eric Anholt | 8214a65 | 2009-08-27 18:32:07 -0700 | [diff] [blame] | 605 | } |
| 606 | |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 607 | static int |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 608 | drm_intel_gem_bo_madvise_internal(drm_intel_bufmgr_gem *bufmgr_gem, |
| 609 | drm_intel_bo_gem *bo_gem, int state) |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 610 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 611 | struct drm_i915_gem_madvise madv; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 612 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 613 | memclear(madv); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 614 | madv.handle = bo_gem->gem_handle; |
| 615 | madv.madv = state; |
| 616 | madv.retained = 1; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 617 | drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv); |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 618 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 619 | return madv.retained; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 620 | } |
| 621 | |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 622 | static int |
| 623 | drm_intel_gem_bo_madvise(drm_intel_bo *bo, int madv) |
| 624 | { |
| 625 | return drm_intel_gem_bo_madvise_internal |
| 626 | ((drm_intel_bufmgr_gem *) bo->bufmgr, |
| 627 | (drm_intel_bo_gem *) bo, |
| 628 | madv); |
| 629 | } |
| 630 | |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 631 | /* drop the oldest entries that have been purged by the kernel */ |
| 632 | static void |
| 633 | drm_intel_gem_bo_cache_purge_bucket(drm_intel_bufmgr_gem *bufmgr_gem, |
| 634 | struct drm_intel_gem_bo_bucket *bucket) |
| 635 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 636 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 637 | drm_intel_bo_gem *bo_gem; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 638 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 639 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 640 | bucket->head.next, head); |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 641 | if (drm_intel_gem_bo_madvise_internal |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 642 | (bufmgr_gem, bo_gem, I915_MADV_DONTNEED)) |
| 643 | break; |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 644 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 645 | DRMLISTDEL(&bo_gem->head); |
| 646 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 647 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 648 | } |
| 649 | |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 650 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 651 | drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, |
| 652 | const char *name, |
| 653 | unsigned long size, |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 654 | unsigned long flags, |
| 655 | uint32_t tiling_mode, |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 656 | unsigned long stride, |
| 657 | unsigned int alignment) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 658 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 659 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 660 | drm_intel_bo_gem *bo_gem; |
| 661 | unsigned int page_size = getpagesize(); |
| 662 | int ret; |
| 663 | struct drm_intel_gem_bo_bucket *bucket; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 664 | bool alloc_from_cache; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 665 | unsigned long bo_size; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 666 | bool for_render = false; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 667 | |
| 668 | if (flags & BO_ALLOC_FOR_RENDER) |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 669 | for_render = true; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 670 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 671 | /* Round the allocated size up to a power of two number of pages. */ |
| 672 | bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 673 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 674 | /* If we don't have caching at this size, don't actually round the |
| 675 | * allocation up. |
| 676 | */ |
| 677 | if (bucket == NULL) { |
| 678 | bo_size = size; |
| 679 | if (bo_size < page_size) |
| 680 | bo_size = page_size; |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 681 | } else { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 682 | bo_size = bucket->size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 683 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 684 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 685 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 686 | /* Get a buffer out of the cache if available */ |
| 687 | retry: |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 688 | alloc_from_cache = false; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 689 | if (bucket != NULL && !DRMLISTEMPTY(&bucket->head)) { |
| 690 | if (for_render) { |
| 691 | /* Allocate new render-target BOs from the tail (MRU) |
| 692 | * of the list, as it will likely be hot in the GPU |
| 693 | * cache and in the aperture for us. |
| 694 | */ |
| 695 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 696 | bucket->head.prev, head); |
| 697 | DRMLISTDEL(&bo_gem->head); |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 698 | alloc_from_cache = true; |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 699 | bo_gem->bo.align = alignment; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 700 | } else { |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 701 | assert(alignment == 0); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 702 | /* For non-render-target BOs (where we're probably |
| 703 | * going to map it first thing in order to fill it |
| 704 | * with data), check if the last BO in the cache is |
| 705 | * unbusy, and only reuse in that case. Otherwise, |
| 706 | * allocating a new buffer is probably faster than |
| 707 | * waiting for the GPU to finish. |
| 708 | */ |
| 709 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 710 | bucket->head.next, head); |
| 711 | if (!drm_intel_gem_bo_busy(&bo_gem->bo)) { |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 712 | alloc_from_cache = true; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 713 | DRMLISTDEL(&bo_gem->head); |
| 714 | } |
| 715 | } |
| 716 | |
| 717 | if (alloc_from_cache) { |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 718 | if (!drm_intel_gem_bo_madvise_internal |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 719 | (bufmgr_gem, bo_gem, I915_MADV_WILLNEED)) { |
| 720 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 721 | drm_intel_gem_bo_cache_purge_bucket(bufmgr_gem, |
| 722 | bucket); |
| 723 | goto retry; |
| 724 | } |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 725 | |
| 726 | if (drm_intel_gem_bo_set_tiling_internal(&bo_gem->bo, |
| 727 | tiling_mode, |
| 728 | stride)) { |
| 729 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 730 | goto retry; |
| 731 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 732 | } |
Chris Wilson | 0fb215a | 2009-10-02 04:31:34 +0100 | [diff] [blame] | 733 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 734 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 735 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 736 | if (!alloc_from_cache) { |
| 737 | struct drm_i915_gem_create create; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 738 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 739 | bo_gem = calloc(1, sizeof(*bo_gem)); |
| 740 | if (!bo_gem) |
| 741 | return NULL; |
Keith Packard | a919ff5 | 2008-06-05 15:58:09 -0700 | [diff] [blame] | 742 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 743 | bo_gem->bo.size = bo_size; |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 744 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 745 | memclear(create); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 746 | create.size = bo_size; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 747 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 748 | ret = drmIoctl(bufmgr_gem->fd, |
| 749 | DRM_IOCTL_I915_GEM_CREATE, |
| 750 | &create); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 751 | bo_gem->gem_handle = create.handle; |
| 752 | bo_gem->bo.handle = bo_gem->gem_handle; |
| 753 | if (ret != 0) { |
| 754 | free(bo_gem); |
| 755 | return NULL; |
| 756 | } |
| 757 | bo_gem->bo.bufmgr = bufmgr; |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 758 | bo_gem->bo.align = alignment; |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 759 | |
| 760 | bo_gem->tiling_mode = I915_TILING_NONE; |
| 761 | bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; |
| 762 | bo_gem->stride = 0; |
| 763 | |
Thomas Meyer | 4f44ecc | 2014-11-07 19:43:04 +0100 | [diff] [blame] | 764 | /* drm_intel_gem_bo_free calls DRMLISTDEL() for an uninitialized |
| 765 | list (vma_list), so better set the list head here */ |
| 766 | DRMINITLISTHEAD(&bo_gem->name_list); |
| 767 | DRMINITLISTHEAD(&bo_gem->vma_list); |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 768 | if (drm_intel_gem_bo_set_tiling_internal(&bo_gem->bo, |
| 769 | tiling_mode, |
| 770 | stride)) { |
| 771 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 772 | return NULL; |
| 773 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 774 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 775 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 776 | bo_gem->name = name; |
| 777 | atomic_set(&bo_gem->refcount, 1); |
| 778 | bo_gem->validate_index = -1; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 779 | bo_gem->reloc_tree_fences = 0; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 780 | bo_gem->used_as_reloc_target = false; |
| 781 | bo_gem->has_error = false; |
| 782 | bo_gem->reusable = true; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 783 | |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 784 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, alignment); |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 785 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 786 | DBG("bo_create: buf %d (%s) %ldb\n", |
| 787 | bo_gem->gem_handle, bo_gem->name, size); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 788 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 789 | return &bo_gem->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 790 | } |
| 791 | |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 792 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 793 | drm_intel_gem_bo_alloc_for_render(drm_intel_bufmgr *bufmgr, |
| 794 | const char *name, |
| 795 | unsigned long size, |
| 796 | unsigned int alignment) |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 797 | { |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 798 | return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 799 | BO_ALLOC_FOR_RENDER, |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 800 | I915_TILING_NONE, 0, |
| 801 | alignment); |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 802 | } |
| 803 | |
| 804 | static drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 805 | drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr, |
| 806 | const char *name, |
| 807 | unsigned long size, |
| 808 | unsigned int alignment) |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 809 | { |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 810 | return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, 0, |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 811 | I915_TILING_NONE, 0, 0); |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 812 | } |
| 813 | |
| 814 | static drm_intel_bo * |
| 815 | drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, |
| 816 | int x, int y, int cpp, uint32_t *tiling_mode, |
| 817 | unsigned long *pitch, unsigned long flags) |
| 818 | { |
| 819 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 820 | unsigned long size, stride; |
| 821 | uint32_t tiling; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 822 | |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 823 | do { |
Daniel Vetter | 9a71ed9 | 2011-02-22 18:53:56 +0100 | [diff] [blame] | 824 | unsigned long aligned_y, height_alignment; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 825 | |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 826 | tiling = *tiling_mode; |
| 827 | |
| 828 | /* If we're tiled, our allocations are in 8 or 32-row blocks, |
| 829 | * so failure to align our height means that we won't allocate |
| 830 | * enough pages. |
| 831 | * |
| 832 | * If we're untiled, we still have to align to 2 rows high |
| 833 | * because the data port accesses 2x2 blocks even if the |
| 834 | * bottom row isn't to be rendered, so failure to align means |
| 835 | * we could walk off the end of the GTT and fault. This is |
| 836 | * documented on 965, and may be the case on older chipsets |
| 837 | * too so we try to be careful. |
| 838 | */ |
| 839 | aligned_y = y; |
Daniel Vetter | 9a71ed9 | 2011-02-22 18:53:56 +0100 | [diff] [blame] | 840 | height_alignment = 2; |
| 841 | |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 842 | if ((bufmgr_gem->gen == 2) && tiling != I915_TILING_NONE) |
Daniel Vetter | 06ebbf7 | 2011-03-26 15:04:04 +0100 | [diff] [blame] | 843 | height_alignment = 16; |
Daniel Vetter | 194aa1b | 2011-09-22 22:20:53 +0200 | [diff] [blame] | 844 | else if (tiling == I915_TILING_X |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 845 | || (IS_915(bufmgr_gem->pci_device) |
| 846 | && tiling == I915_TILING_Y)) |
Daniel Vetter | 9a71ed9 | 2011-02-22 18:53:56 +0100 | [diff] [blame] | 847 | height_alignment = 8; |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 848 | else if (tiling == I915_TILING_Y) |
Daniel Vetter | 9a71ed9 | 2011-02-22 18:53:56 +0100 | [diff] [blame] | 849 | height_alignment = 32; |
Daniel Vetter | 9a71ed9 | 2011-02-22 18:53:56 +0100 | [diff] [blame] | 850 | aligned_y = ALIGN(y, height_alignment); |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 851 | |
| 852 | stride = x * cpp; |
Chris Wilson | 726210f | 2010-06-24 11:38:00 +0100 | [diff] [blame] | 853 | stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, tiling_mode); |
Chris Wilson | e65caeb | 2010-06-09 10:08:41 +0100 | [diff] [blame] | 854 | size = stride * aligned_y; |
| 855 | size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode); |
| 856 | } while (*tiling_mode != tiling); |
Chris Wilson | 6ea2bda | 2010-06-22 13:03:52 +0100 | [diff] [blame] | 857 | *pitch = stride; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 858 | |
Chris Wilson | 6ea2bda | 2010-06-22 13:03:52 +0100 | [diff] [blame] | 859 | if (tiling == I915_TILING_NONE) |
Chris Wilson | 5eec286 | 2010-06-21 14:20:56 +0100 | [diff] [blame] | 860 | stride = 0; |
| 861 | |
Chris Wilson | 6ea2bda | 2010-06-22 13:03:52 +0100 | [diff] [blame] | 862 | return drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags, |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 863 | tiling, stride, 0); |
Eric Anholt | 72abe98 | 2009-02-18 13:06:35 -0800 | [diff] [blame] | 864 | } |
| 865 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 866 | static drm_intel_bo * |
| 867 | drm_intel_gem_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, |
| 868 | const char *name, |
| 869 | void *addr, |
| 870 | uint32_t tiling_mode, |
| 871 | uint32_t stride, |
| 872 | unsigned long size, |
| 873 | unsigned long flags) |
| 874 | { |
| 875 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 876 | drm_intel_bo_gem *bo_gem; |
| 877 | int ret; |
| 878 | struct drm_i915_gem_userptr userptr; |
| 879 | |
| 880 | /* Tiling with userptr surfaces is not supported |
| 881 | * on all hardware so refuse it for time being. |
| 882 | */ |
| 883 | if (tiling_mode != I915_TILING_NONE) |
| 884 | return NULL; |
| 885 | |
| 886 | bo_gem = calloc(1, sizeof(*bo_gem)); |
| 887 | if (!bo_gem) |
| 888 | return NULL; |
| 889 | |
| 890 | bo_gem->bo.size = size; |
| 891 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 892 | memclear(userptr); |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 893 | userptr.user_ptr = (__u64)((unsigned long)addr); |
| 894 | userptr.user_size = size; |
| 895 | userptr.flags = flags; |
| 896 | |
| 897 | ret = drmIoctl(bufmgr_gem->fd, |
| 898 | DRM_IOCTL_I915_GEM_USERPTR, |
| 899 | &userptr); |
| 900 | if (ret != 0) { |
| 901 | DBG("bo_create_userptr: " |
| 902 | "ioctl failed with user ptr %p size 0x%lx, " |
| 903 | "user flags 0x%lx\n", addr, size, flags); |
| 904 | free(bo_gem); |
| 905 | return NULL; |
| 906 | } |
| 907 | |
| 908 | bo_gem->gem_handle = userptr.handle; |
| 909 | bo_gem->bo.handle = bo_gem->gem_handle; |
| 910 | bo_gem->bo.bufmgr = bufmgr; |
| 911 | bo_gem->is_userptr = true; |
| 912 | bo_gem->bo.virtual = addr; |
| 913 | /* Save the address provided by user */ |
| 914 | bo_gem->user_virtual = addr; |
| 915 | bo_gem->tiling_mode = I915_TILING_NONE; |
| 916 | bo_gem->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; |
| 917 | bo_gem->stride = 0; |
| 918 | |
| 919 | DRMINITLISTHEAD(&bo_gem->name_list); |
| 920 | DRMINITLISTHEAD(&bo_gem->vma_list); |
| 921 | |
| 922 | bo_gem->name = name; |
| 923 | atomic_set(&bo_gem->refcount, 1); |
| 924 | bo_gem->validate_index = -1; |
| 925 | bo_gem->reloc_tree_fences = 0; |
| 926 | bo_gem->used_as_reloc_target = false; |
| 927 | bo_gem->has_error = false; |
| 928 | bo_gem->reusable = false; |
| 929 | |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 930 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0); |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 931 | |
| 932 | DBG("bo_create_userptr: " |
| 933 | "ptr %p buf %d (%s) size %ldb, stride 0x%x, tile mode %d\n", |
| 934 | addr, bo_gem->gem_handle, bo_gem->name, |
| 935 | size, stride, tiling_mode); |
| 936 | |
| 937 | return &bo_gem->bo; |
| 938 | } |
| 939 | |
Chris Wilson | 32258e4 | 2014-11-04 14:26:49 +0000 | [diff] [blame] | 940 | static bool |
| 941 | has_userptr(drm_intel_bufmgr_gem *bufmgr_gem) |
| 942 | { |
| 943 | int ret; |
| 944 | void *ptr; |
| 945 | long pgsz; |
| 946 | struct drm_i915_gem_userptr userptr; |
Chris Wilson | 32258e4 | 2014-11-04 14:26:49 +0000 | [diff] [blame] | 947 | |
| 948 | pgsz = sysconf(_SC_PAGESIZE); |
| 949 | assert(pgsz > 0); |
| 950 | |
| 951 | ret = posix_memalign(&ptr, pgsz, pgsz); |
| 952 | if (ret) { |
| 953 | DBG("Failed to get a page (%ld) for userptr detection!\n", |
| 954 | pgsz); |
| 955 | return false; |
| 956 | } |
| 957 | |
| 958 | memclear(userptr); |
| 959 | userptr.user_ptr = (__u64)(unsigned long)ptr; |
| 960 | userptr.user_size = pgsz; |
| 961 | |
| 962 | retry: |
| 963 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_USERPTR, &userptr); |
| 964 | if (ret) { |
| 965 | if (errno == ENODEV && userptr.flags == 0) { |
| 966 | userptr.flags = I915_USERPTR_UNSYNCHRONIZED; |
| 967 | goto retry; |
| 968 | } |
| 969 | free(ptr); |
| 970 | return false; |
| 971 | } |
| 972 | |
Tvrtko Ursulin | 3092148 | 2015-04-17 11:57:28 +0100 | [diff] [blame] | 973 | /* We don't release the userptr bo here as we want to keep the |
| 974 | * kernel mm tracking alive for our lifetime. The first time we |
| 975 | * create a userptr object the kernel has to install a mmu_notifer |
| 976 | * which is a heavyweight operation (e.g. it requires taking all |
| 977 | * mm_locks and stop_machine()). |
| 978 | */ |
| 979 | |
| 980 | bufmgr_gem->userptr_active.ptr = ptr; |
| 981 | bufmgr_gem->userptr_active.handle = userptr.handle; |
Chris Wilson | 32258e4 | 2014-11-04 14:26:49 +0000 | [diff] [blame] | 982 | |
| 983 | return true; |
| 984 | } |
| 985 | |
| 986 | static drm_intel_bo * |
| 987 | check_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, |
| 988 | const char *name, |
| 989 | void *addr, |
| 990 | uint32_t tiling_mode, |
| 991 | uint32_t stride, |
| 992 | unsigned long size, |
| 993 | unsigned long flags) |
| 994 | { |
| 995 | if (has_userptr((drm_intel_bufmgr_gem *)bufmgr)) |
| 996 | bufmgr->bo_alloc_userptr = drm_intel_gem_bo_alloc_userptr; |
| 997 | else |
| 998 | bufmgr->bo_alloc_userptr = NULL; |
| 999 | |
| 1000 | return drm_intel_bo_alloc_userptr(bufmgr, name, addr, |
| 1001 | tiling_mode, stride, size, flags); |
| 1002 | } |
| 1003 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1004 | /** |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1005 | * Returns a drm_intel_bo wrapping the given buffer object handle. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1006 | * |
| 1007 | * This can be used when one application needs to pass a buffer object |
| 1008 | * to another. |
| 1009 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1010 | drm_intel_bo * |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1011 | drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, |
| 1012 | const char *name, |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1013 | unsigned int handle) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1014 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1015 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 1016 | drm_intel_bo_gem *bo_gem; |
| 1017 | int ret; |
| 1018 | struct drm_gem_open open_arg; |
| 1019 | struct drm_i915_gem_get_tiling get_tiling; |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 1020 | drmMMListHead *list; |
| 1021 | |
| 1022 | /* At the moment most applications only have a few named bo. |
| 1023 | * For instance, in a DRI client only the render buffers passed |
| 1024 | * between X and the client are named. And since X returns the |
| 1025 | * alternating names for the front/back buffer a linear search |
| 1026 | * provides a sufficiently fast match. |
| 1027 | */ |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1028 | pthread_mutex_lock(&bufmgr_gem->lock); |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 1029 | for (list = bufmgr_gem->named.next; |
| 1030 | list != &bufmgr_gem->named; |
| 1031 | list = list->next) { |
| 1032 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, list, name_list); |
| 1033 | if (bo_gem->global_name == handle) { |
| 1034 | drm_intel_gem_bo_reference(&bo_gem->bo); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1035 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 1036 | return &bo_gem->bo; |
| 1037 | } |
| 1038 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1039 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1040 | memclear(open_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1041 | open_arg.name = handle; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1042 | ret = drmIoctl(bufmgr_gem->fd, |
| 1043 | DRM_IOCTL_GEM_OPEN, |
| 1044 | &open_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1045 | if (ret != 0) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1046 | DBG("Couldn't reference %s handle 0x%08x: %s\n", |
| 1047 | name, handle, strerror(errno)); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1048 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1049 | return NULL; |
| 1050 | } |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 1051 | /* Now see if someone has used a prime handle to get this |
| 1052 | * object from the kernel before by looking through the list |
| 1053 | * again for a matching gem_handle |
| 1054 | */ |
| 1055 | for (list = bufmgr_gem->named.next; |
| 1056 | list != &bufmgr_gem->named; |
| 1057 | list = list->next) { |
| 1058 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, list, name_list); |
| 1059 | if (bo_gem->gem_handle == open_arg.handle) { |
| 1060 | drm_intel_gem_bo_reference(&bo_gem->bo); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1061 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 1062 | return &bo_gem->bo; |
| 1063 | } |
| 1064 | } |
| 1065 | |
| 1066 | bo_gem = calloc(1, sizeof(*bo_gem)); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1067 | if (!bo_gem) { |
| 1068 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 1069 | return NULL; |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1070 | } |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 1071 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1072 | bo_gem->bo.size = open_arg.size; |
| 1073 | bo_gem->bo.offset = 0; |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 1074 | bo_gem->bo.offset64 = 0; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1075 | bo_gem->bo.virtual = NULL; |
| 1076 | bo_gem->bo.bufmgr = bufmgr; |
| 1077 | bo_gem->name = name; |
| 1078 | atomic_set(&bo_gem->refcount, 1); |
| 1079 | bo_gem->validate_index = -1; |
| 1080 | bo_gem->gem_handle = open_arg.handle; |
Chris Wilson | 53581b6 | 2011-02-14 09:27:05 +0000 | [diff] [blame] | 1081 | bo_gem->bo.handle = open_arg.handle; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1082 | bo_gem->global_name = handle; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1083 | bo_gem->reusable = false; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1084 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1085 | memclear(get_tiling); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1086 | get_tiling.handle = bo_gem->gem_handle; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1087 | ret = drmIoctl(bufmgr_gem->fd, |
| 1088 | DRM_IOCTL_I915_GEM_GET_TILING, |
| 1089 | &get_tiling); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1090 | if (ret != 0) { |
| 1091 | drm_intel_gem_bo_unreference(&bo_gem->bo); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1092 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1093 | return NULL; |
| 1094 | } |
| 1095 | bo_gem->tiling_mode = get_tiling.tiling_mode; |
| 1096 | bo_gem->swizzle_mode = get_tiling.swizzle_mode; |
Chris Wilson | 056aa9b | 2010-06-21 14:31:29 +0100 | [diff] [blame] | 1097 | /* XXX stride is unknown */ |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 1098 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0); |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 1099 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1100 | DRMINITLISTHEAD(&bo_gem->vma_list); |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 1101 | DRMLISTADDTAIL(&bo_gem->name_list, &bufmgr_gem->named); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 1102 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1103 | DBG("bo_create_from_handle: %d (%s)\n", handle, bo_gem->name); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1104 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1105 | return &bo_gem->bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1106 | } |
| 1107 | |
| 1108 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1109 | drm_intel_gem_bo_free(drm_intel_bo *bo) |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 1110 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1111 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1112 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1113 | struct drm_gem_close close; |
| 1114 | int ret; |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 1115 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1116 | DRMLISTDEL(&bo_gem->vma_list); |
| 1117 | if (bo_gem->mem_virtual) { |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 1118 | VG(VALGRIND_FREELIKE_BLOCK(bo_gem->mem_virtual, 0)); |
Emil Velikov | 537b1ca | 2014-09-07 19:47:06 +0100 | [diff] [blame] | 1119 | drm_munmap(bo_gem->mem_virtual, bo_gem->bo.size); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1120 | bufmgr_gem->vma_count--; |
| 1121 | } |
| 1122 | if (bo_gem->gtt_virtual) { |
Emil Velikov | 537b1ca | 2014-09-07 19:47:06 +0100 | [diff] [blame] | 1123 | drm_munmap(bo_gem->gtt_virtual, bo_gem->bo.size); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1124 | bufmgr_gem->vma_count--; |
| 1125 | } |
| 1126 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1127 | /* Close this object */ |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1128 | memclear(close); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1129 | close.handle = bo_gem->gem_handle; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1130 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &close); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1131 | if (ret != 0) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1132 | DBG("DRM_IOCTL_GEM_CLOSE %d failed (%s): %s\n", |
| 1133 | bo_gem->gem_handle, bo_gem->name, strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1134 | } |
| 1135 | free(bo); |
Eric Anholt | 500c81d | 2008-06-06 17:13:16 -0700 | [diff] [blame] | 1136 | } |
| 1137 | |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 1138 | static void |
| 1139 | drm_intel_gem_bo_mark_mmaps_incoherent(drm_intel_bo *bo) |
| 1140 | { |
| 1141 | #if HAVE_VALGRIND |
| 1142 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1143 | |
| 1144 | if (bo_gem->mem_virtual) |
| 1145 | VALGRIND_MAKE_MEM_NOACCESS(bo_gem->mem_virtual, bo->size); |
| 1146 | |
| 1147 | if (bo_gem->gtt_virtual) |
| 1148 | VALGRIND_MAKE_MEM_NOACCESS(bo_gem->gtt_virtual, bo->size); |
| 1149 | #endif |
| 1150 | } |
| 1151 | |
Eric Anholt | 3f3c5be | 2009-07-09 17:49:46 -0700 | [diff] [blame] | 1152 | /** Frees all cached buffers significantly older than @time. */ |
| 1153 | static void |
| 1154 | drm_intel_gem_cleanup_bo_cache(drm_intel_bufmgr_gem *bufmgr_gem, time_t time) |
| 1155 | { |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1156 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1157 | |
Chris Wilson | f16b416 | 2010-06-21 15:21:48 +0100 | [diff] [blame] | 1158 | if (bufmgr_gem->time == time) |
| 1159 | return; |
| 1160 | |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 1161 | for (i = 0; i < bufmgr_gem->num_buckets; i++) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1162 | struct drm_intel_gem_bo_bucket *bucket = |
| 1163 | &bufmgr_gem->cache_bucket[i]; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1164 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1165 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 1166 | drm_intel_bo_gem *bo_gem; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1167 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1168 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 1169 | bucket->head.next, head); |
| 1170 | if (time - bo_gem->free_time <= 1) |
| 1171 | break; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1172 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1173 | DRMLISTDEL(&bo_gem->head); |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1174 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1175 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 1176 | } |
| 1177 | } |
Chris Wilson | f16b416 | 2010-06-21 15:21:48 +0100 | [diff] [blame] | 1178 | |
| 1179 | bufmgr_gem->time = time; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1180 | } |
| 1181 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1182 | static void drm_intel_gem_bo_purge_vma_cache(drm_intel_bufmgr_gem *bufmgr_gem) |
| 1183 | { |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1184 | int limit; |
| 1185 | |
| 1186 | DBG("%s: cached=%d, open=%d, limit=%d\n", __FUNCTION__, |
| 1187 | bufmgr_gem->vma_count, bufmgr_gem->vma_open, bufmgr_gem->vma_max); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1188 | |
| 1189 | if (bufmgr_gem->vma_max < 0) |
| 1190 | return; |
| 1191 | |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1192 | /* We may need to evict a few entries in order to create new mmaps */ |
| 1193 | limit = bufmgr_gem->vma_max - 2*bufmgr_gem->vma_open; |
| 1194 | if (limit < 0) |
| 1195 | limit = 0; |
| 1196 | |
| 1197 | while (bufmgr_gem->vma_count > limit) { |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1198 | drm_intel_bo_gem *bo_gem; |
| 1199 | |
| 1200 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 1201 | bufmgr_gem->vma_cache.next, |
| 1202 | vma_list); |
| 1203 | assert(bo_gem->map_count == 0); |
Chris Wilson | 0ab2251 | 2011-12-14 08:20:10 +0000 | [diff] [blame] | 1204 | DRMLISTDELINIT(&bo_gem->vma_list); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1205 | |
| 1206 | if (bo_gem->mem_virtual) { |
Emil Velikov | 537b1ca | 2014-09-07 19:47:06 +0100 | [diff] [blame] | 1207 | drm_munmap(bo_gem->mem_virtual, bo_gem->bo.size); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1208 | bo_gem->mem_virtual = NULL; |
| 1209 | bufmgr_gem->vma_count--; |
| 1210 | } |
| 1211 | if (bo_gem->gtt_virtual) { |
Emil Velikov | 537b1ca | 2014-09-07 19:47:06 +0100 | [diff] [blame] | 1212 | drm_munmap(bo_gem->gtt_virtual, bo_gem->bo.size); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1213 | bo_gem->gtt_virtual = NULL; |
| 1214 | bufmgr_gem->vma_count--; |
| 1215 | } |
| 1216 | } |
| 1217 | } |
| 1218 | |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1219 | static void drm_intel_gem_bo_close_vma(drm_intel_bufmgr_gem *bufmgr_gem, |
| 1220 | drm_intel_bo_gem *bo_gem) |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1221 | { |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1222 | bufmgr_gem->vma_open--; |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1223 | DRMLISTADDTAIL(&bo_gem->vma_list, &bufmgr_gem->vma_cache); |
| 1224 | if (bo_gem->mem_virtual) |
| 1225 | bufmgr_gem->vma_count++; |
| 1226 | if (bo_gem->gtt_virtual) |
| 1227 | bufmgr_gem->vma_count++; |
| 1228 | drm_intel_gem_bo_purge_vma_cache(bufmgr_gem); |
| 1229 | } |
| 1230 | |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1231 | static void drm_intel_gem_bo_open_vma(drm_intel_bufmgr_gem *bufmgr_gem, |
| 1232 | drm_intel_bo_gem *bo_gem) |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1233 | { |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1234 | bufmgr_gem->vma_open++; |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1235 | DRMLISTDEL(&bo_gem->vma_list); |
| 1236 | if (bo_gem->mem_virtual) |
| 1237 | bufmgr_gem->vma_count--; |
| 1238 | if (bo_gem->gtt_virtual) |
| 1239 | bufmgr_gem->vma_count--; |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1240 | drm_intel_gem_bo_purge_vma_cache(bufmgr_gem); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1241 | } |
| 1242 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1243 | static void |
| 1244 | drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time) |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1245 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1246 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1247 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1248 | struct drm_intel_gem_bo_bucket *bucket; |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1249 | int i; |
Chris Wilson | 04495ee | 2009-10-02 04:39:22 +0100 | [diff] [blame] | 1250 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1251 | /* Unreference all the target buffers */ |
| 1252 | for (i = 0; i < bo_gem->reloc_count; i++) { |
Eric Anholt | 4f7704a | 2010-06-10 08:58:08 -0700 | [diff] [blame] | 1253 | if (bo_gem->reloc_target_info[i].bo != bo) { |
| 1254 | drm_intel_gem_bo_unreference_locked_timed(bo_gem-> |
| 1255 | reloc_target_info[i].bo, |
| 1256 | time); |
| 1257 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1258 | } |
Chris Wilson | b666f41 | 2009-11-30 23:07:19 +0000 | [diff] [blame] | 1259 | bo_gem->reloc_count = 0; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1260 | bo_gem->used_as_reloc_target = false; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1261 | |
| 1262 | DBG("bo_unreference final: %d (%s)\n", |
| 1263 | bo_gem->gem_handle, bo_gem->name); |
| 1264 | |
Chris Wilson | 57473c7 | 2009-12-02 13:36:22 +0000 | [diff] [blame] | 1265 | /* release memory associated with this object */ |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1266 | if (bo_gem->reloc_target_info) { |
| 1267 | free(bo_gem->reloc_target_info); |
| 1268 | bo_gem->reloc_target_info = NULL; |
Chris Wilson | 57473c7 | 2009-12-02 13:36:22 +0000 | [diff] [blame] | 1269 | } |
| 1270 | if (bo_gem->relocs) { |
| 1271 | free(bo_gem->relocs); |
| 1272 | bo_gem->relocs = NULL; |
| 1273 | } |
| 1274 | |
Chris Wilson | 5c5332b | 2011-12-05 10:39:49 +0000 | [diff] [blame] | 1275 | /* Clear any left-over mappings */ |
| 1276 | if (bo_gem->map_count) { |
| 1277 | DBG("bo freed with non-zero map-count %d\n", bo_gem->map_count); |
| 1278 | bo_gem->map_count = 0; |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1279 | drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 1280 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
Chris Wilson | 5c5332b | 2011-12-05 10:39:49 +0000 | [diff] [blame] | 1281 | } |
Chris Wilson | 5c5332b | 2011-12-05 10:39:49 +0000 | [diff] [blame] | 1282 | |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 1283 | DRMLISTDEL(&bo_gem->name_list); |
| 1284 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1285 | bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, bo->size); |
| 1286 | /* Put the buffer into our internal cache for reuse if we can. */ |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1287 | if (bufmgr_gem->bo_reuse && bo_gem->reusable && bucket != NULL && |
Chris Wilson | 60aa803 | 2009-11-30 20:02:05 +0000 | [diff] [blame] | 1288 | drm_intel_gem_bo_madvise_internal(bufmgr_gem, bo_gem, |
| 1289 | I915_MADV_DONTNEED)) { |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1290 | bo_gem->free_time = time; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1291 | |
| 1292 | bo_gem->name = NULL; |
| 1293 | bo_gem->validate_index = -1; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1294 | |
| 1295 | DRMLISTADDTAIL(&bo_gem->head, &bucket->head); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1296 | } else { |
| 1297 | drm_intel_gem_bo_free(bo); |
| 1298 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1299 | } |
| 1300 | |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1301 | static void drm_intel_gem_bo_unreference_locked_timed(drm_intel_bo *bo, |
| 1302 | time_t time) |
| 1303 | { |
| 1304 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1305 | |
| 1306 | assert(atomic_read(&bo_gem->refcount) > 0); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1307 | if (atomic_dec_and_test(&bo_gem->refcount)) |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1308 | drm_intel_gem_bo_unreference_final(bo, time); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1309 | } |
| 1310 | |
| 1311 | static void drm_intel_gem_bo_unreference(drm_intel_bo *bo) |
| 1312 | { |
| 1313 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1314 | |
| 1315 | assert(atomic_read(&bo_gem->refcount) > 0); |
Lionel Landwerlin | 88025ad | 2014-09-12 13:48:37 +0100 | [diff] [blame] | 1316 | |
| 1317 | if (atomic_add_unless(&bo_gem->refcount, -1, 1)) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1318 | drm_intel_bufmgr_gem *bufmgr_gem = |
| 1319 | (drm_intel_bufmgr_gem *) bo->bufmgr; |
Eric Anholt | 0d7ad7e | 2009-10-20 14:19:38 -0700 | [diff] [blame] | 1320 | struct timespec time; |
| 1321 | |
| 1322 | clock_gettime(CLOCK_MONOTONIC, &time); |
| 1323 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1324 | pthread_mutex_lock(&bufmgr_gem->lock); |
Lionel Landwerlin | 88025ad | 2014-09-12 13:48:37 +0100 | [diff] [blame] | 1325 | |
| 1326 | if (atomic_dec_and_test(&bo_gem->refcount)) { |
| 1327 | drm_intel_gem_bo_unreference_final(bo, time.tv_sec); |
| 1328 | drm_intel_gem_cleanup_bo_cache(bufmgr_gem, time.tv_sec); |
| 1329 | } |
| 1330 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1331 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1332 | } |
| 1333 | } |
| 1334 | |
| 1335 | static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) |
| 1336 | { |
| 1337 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1338 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1339 | struct drm_i915_gem_set_domain set_domain; |
| 1340 | int ret; |
| 1341 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1342 | if (bo_gem->is_userptr) { |
| 1343 | /* Return the same user ptr */ |
| 1344 | bo->virtual = bo_gem->user_virtual; |
| 1345 | return 0; |
| 1346 | } |
| 1347 | |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1348 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 1349 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1350 | if (bo_gem->map_count++ == 0) |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1351 | drm_intel_gem_bo_open_vma(bufmgr_gem, bo_gem); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1352 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1353 | if (!bo_gem->mem_virtual) { |
| 1354 | struct drm_i915_gem_mmap mmap_arg; |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 1355 | |
Chris Wilson | 015286f | 2011-12-11 17:35:06 +0000 | [diff] [blame] | 1356 | DBG("bo_map: %d (%s), map_count=%d\n", |
| 1357 | bo_gem->gem_handle, bo_gem->name, bo_gem->map_count); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1358 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1359 | memclear(mmap_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1360 | mmap_arg.handle = bo_gem->gem_handle; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1361 | mmap_arg.size = bo->size; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1362 | ret = drmIoctl(bufmgr_gem->fd, |
| 1363 | DRM_IOCTL_I915_GEM_MMAP, |
| 1364 | &mmap_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1365 | if (ret != 0) { |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1366 | ret = -errno; |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1367 | DBG("%s:%d: Error mapping buffer %d (%s): %s .\n", |
| 1368 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 1369 | bo_gem->name, strerror(errno)); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1370 | if (--bo_gem->map_count == 0) |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1371 | drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1372 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1373 | return ret; |
| 1374 | } |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 1375 | VG(VALGRIND_MALLOCLIKE_BLOCK(mmap_arg.addr_ptr, mmap_arg.size, 0, 1)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1376 | bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr; |
| 1377 | } |
| 1378 | DBG("bo_map: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, |
| 1379 | bo_gem->mem_virtual); |
| 1380 | bo->virtual = bo_gem->mem_virtual; |
| 1381 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1382 | memclear(set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1383 | set_domain.handle = bo_gem->gem_handle; |
| 1384 | set_domain.read_domains = I915_GEM_DOMAIN_CPU; |
| 1385 | if (write_enable) |
| 1386 | set_domain.write_domain = I915_GEM_DOMAIN_CPU; |
| 1387 | else |
| 1388 | set_domain.write_domain = 0; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1389 | ret = drmIoctl(bufmgr_gem->fd, |
| 1390 | DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 1391 | &set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1392 | if (ret != 0) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1393 | DBG("%s:%d: Error setting to CPU domain %d: %s\n", |
| 1394 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 1395 | strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1396 | } |
| 1397 | |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 1398 | if (write_enable) |
| 1399 | bo_gem->mapped_cpu_write = true; |
| 1400 | |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 1401 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
| 1402 | VG(VALGRIND_MAKE_MEM_DEFINED(bo_gem->mem_virtual, bo->size)); |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1403 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1404 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1405 | return 0; |
| 1406 | } |
| 1407 | |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1408 | static int |
| 1409 | map_gtt(drm_intel_bo *bo) |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1410 | { |
| 1411 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1412 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1413 | int ret; |
| 1414 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1415 | if (bo_gem->is_userptr) |
| 1416 | return -EINVAL; |
| 1417 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1418 | if (bo_gem->map_count++ == 0) |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1419 | drm_intel_gem_bo_open_vma(bufmgr_gem, bo_gem); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1420 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1421 | /* Get a mapping of the buffer if we haven't before. */ |
| 1422 | if (bo_gem->gtt_virtual == NULL) { |
| 1423 | struct drm_i915_gem_mmap_gtt mmap_arg; |
| 1424 | |
Chris Wilson | 015286f | 2011-12-11 17:35:06 +0000 | [diff] [blame] | 1425 | DBG("bo_map_gtt: mmap %d (%s), map_count=%d\n", |
| 1426 | bo_gem->gem_handle, bo_gem->name, bo_gem->map_count); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1427 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1428 | memclear(mmap_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1429 | mmap_arg.handle = bo_gem->gem_handle; |
| 1430 | |
| 1431 | /* Get the fake offset back... */ |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1432 | ret = drmIoctl(bufmgr_gem->fd, |
| 1433 | DRM_IOCTL_I915_GEM_MMAP_GTT, |
| 1434 | &mmap_arg); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1435 | if (ret != 0) { |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1436 | ret = -errno; |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1437 | DBG("%s:%d: Error preparing buffer map %d (%s): %s .\n", |
| 1438 | __FILE__, __LINE__, |
| 1439 | bo_gem->gem_handle, bo_gem->name, |
| 1440 | strerror(errno)); |
Chris Wilson | c5f0ed1 | 2011-12-13 10:30:54 +0000 | [diff] [blame] | 1441 | if (--bo_gem->map_count == 0) |
| 1442 | drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1443 | return ret; |
| 1444 | } |
| 1445 | |
| 1446 | /* and mmap it */ |
Emil Velikov | 537b1ca | 2014-09-07 19:47:06 +0100 | [diff] [blame] | 1447 | bo_gem->gtt_virtual = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE, |
| 1448 | MAP_SHARED, bufmgr_gem->fd, |
| 1449 | mmap_arg.offset); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1450 | if (bo_gem->gtt_virtual == MAP_FAILED) { |
Chris Wilson | 08371bc | 2009-12-08 22:35:24 +0000 | [diff] [blame] | 1451 | bo_gem->gtt_virtual = NULL; |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1452 | ret = -errno; |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1453 | DBG("%s:%d: Error mapping buffer %d (%s): %s .\n", |
| 1454 | __FILE__, __LINE__, |
| 1455 | bo_gem->gem_handle, bo_gem->name, |
| 1456 | strerror(errno)); |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1457 | if (--bo_gem->map_count == 0) |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1458 | drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1459 | return ret; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1460 | } |
| 1461 | } |
| 1462 | |
| 1463 | bo->virtual = bo_gem->gtt_virtual; |
| 1464 | |
| 1465 | DBG("bo_map_gtt: %d (%s) -> %p\n", bo_gem->gem_handle, bo_gem->name, |
| 1466 | bo_gem->gtt_virtual); |
| 1467 | |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1468 | return 0; |
| 1469 | } |
| 1470 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1471 | int |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1472 | drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1473 | { |
| 1474 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1475 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1476 | struct drm_i915_gem_set_domain set_domain; |
| 1477 | int ret; |
| 1478 | |
| 1479 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 1480 | |
| 1481 | ret = map_gtt(bo); |
| 1482 | if (ret) { |
| 1483 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1484 | return ret; |
| 1485 | } |
| 1486 | |
| 1487 | /* Now move it to the GTT domain so that the GPU and CPU |
| 1488 | * caches are flushed and the GPU isn't actively using the |
| 1489 | * buffer. |
| 1490 | * |
| 1491 | * The pagefault handler does this domain change for us when |
| 1492 | * it has unbound the BO from the GTT, but it's up to us to |
| 1493 | * tell it when we're about to use things if we had done |
| 1494 | * rendering and it still happens to be bound to the GTT. |
| 1495 | */ |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1496 | memclear(set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1497 | set_domain.handle = bo_gem->gem_handle; |
| 1498 | set_domain.read_domains = I915_GEM_DOMAIN_GTT; |
| 1499 | set_domain.write_domain = I915_GEM_DOMAIN_GTT; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1500 | ret = drmIoctl(bufmgr_gem->fd, |
| 1501 | DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 1502 | &set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1503 | if (ret != 0) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1504 | DBG("%s:%d: Error setting domain %d: %s\n", |
| 1505 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 1506 | strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1507 | } |
| 1508 | |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 1509 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
| 1510 | VG(VALGRIND_MAKE_MEM_DEFINED(bo_gem->gtt_virtual, bo->size)); |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1511 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1512 | |
Chris Wilson | c3ddfea | 2010-06-29 20:12:44 +0100 | [diff] [blame] | 1513 | return 0; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1514 | } |
| 1515 | |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1516 | /** |
| 1517 | * Performs a mapping of the buffer object like the normal GTT |
| 1518 | * mapping, but avoids waiting for the GPU to be done reading from or |
| 1519 | * rendering to the buffer. |
| 1520 | * |
| 1521 | * This is used in the implementation of GL_ARB_map_buffer_range: The |
| 1522 | * user asks to create a buffer, then does a mapping, fills some |
| 1523 | * space, runs a drawing command, then asks to map it again without |
| 1524 | * synchronizing because it guarantees that it won't write over the |
| 1525 | * data that the GPU is busy using (or, more specifically, that if it |
| 1526 | * does write over the data, it acknowledges that rendering is |
| 1527 | * undefined). |
| 1528 | */ |
| 1529 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1530 | int |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1531 | drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo) |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1532 | { |
| 1533 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
Ben Widawsky | 743372e | 2013-12-26 16:30:09 -0800 | [diff] [blame] | 1534 | #ifdef HAVE_VALGRIND |
Chia-I Wu | fea5408 | 2013-07-10 10:49:59 +0800 | [diff] [blame] | 1535 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Ben Widawsky | 743372e | 2013-12-26 16:30:09 -0800 | [diff] [blame] | 1536 | #endif |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1537 | int ret; |
| 1538 | |
| 1539 | /* If the CPU cache isn't coherent with the GTT, then use a |
| 1540 | * regular synchronized mapping. The problem is that we don't |
| 1541 | * track where the buffer was last used on the CPU side in |
| 1542 | * terms of drm_intel_bo_map vs drm_intel_gem_bo_map_gtt, so |
| 1543 | * we would potentially corrupt the buffer even when the user |
| 1544 | * does reasonable things. |
| 1545 | */ |
| 1546 | if (!bufmgr_gem->has_llc) |
| 1547 | return drm_intel_gem_bo_map_gtt(bo); |
| 1548 | |
| 1549 | pthread_mutex_lock(&bufmgr_gem->lock); |
Chia-I Wu | fea5408 | 2013-07-10 10:49:59 +0800 | [diff] [blame] | 1550 | |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1551 | ret = map_gtt(bo); |
Chia-I Wu | fea5408 | 2013-07-10 10:49:59 +0800 | [diff] [blame] | 1552 | if (ret == 0) { |
| 1553 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
| 1554 | VG(VALGRIND_MAKE_MEM_DEFINED(bo_gem->gtt_virtual, bo->size)); |
| 1555 | } |
| 1556 | |
Eric Anholt | 99c7337 | 2012-02-10 04:12:15 -0800 | [diff] [blame] | 1557 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1558 | |
| 1559 | return ret; |
| 1560 | } |
| 1561 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1562 | static int drm_intel_gem_bo_unmap(drm_intel_bo *bo) |
| 1563 | { |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1564 | drm_intel_bufmgr_gem *bufmgr_gem; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1565 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 1566 | int ret = 0; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1567 | |
| 1568 | if (bo == NULL) |
| 1569 | return 0; |
| 1570 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1571 | if (bo_gem->is_userptr) |
| 1572 | return 0; |
| 1573 | |
| 1574 | bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1575 | |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1576 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 1577 | |
Chris Wilson | 015286f | 2011-12-11 17:35:06 +0000 | [diff] [blame] | 1578 | if (bo_gem->map_count <= 0) { |
| 1579 | DBG("attempted to unmap an unmapped bo\n"); |
| 1580 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 1581 | /* Preserve the old behaviour of just treating this as a |
| 1582 | * no-op rather than reporting the error. |
| 1583 | */ |
| 1584 | return 0; |
| 1585 | } |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 1586 | |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 1587 | if (bo_gem->mapped_cpu_write) { |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 1588 | struct drm_i915_gem_sw_finish sw_finish; |
| 1589 | |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 1590 | /* Cause a flush to happen if the buffer's pinned for |
| 1591 | * scanout, so the results show up in a timely manner. |
| 1592 | * Unlike GTT set domains, this only does work if the |
| 1593 | * buffer should be scanout-related. |
| 1594 | */ |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1595 | memclear(sw_finish); |
Eric Anholt | 4cb01ee | 2011-10-28 13:12:16 -0700 | [diff] [blame] | 1596 | sw_finish.handle = bo_gem->gem_handle; |
| 1597 | ret = drmIoctl(bufmgr_gem->fd, |
| 1598 | DRM_IOCTL_I915_GEM_SW_FINISH, |
| 1599 | &sw_finish); |
| 1600 | ret = ret == -1 ? -errno : 0; |
| 1601 | |
| 1602 | bo_gem->mapped_cpu_write = false; |
| 1603 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1604 | |
Chris Wilson | c549a77 | 2011-12-05 10:14:34 +0000 | [diff] [blame] | 1605 | /* We need to unmap after every innovation as we cannot track |
| 1606 | * an open vma for every bo as that will exhaasut the system |
| 1607 | * limits and cause later failures. |
| 1608 | */ |
| 1609 | if (--bo_gem->map_count == 0) { |
Chris Wilson | dd9a5b4 | 2011-12-06 13:12:37 +0000 | [diff] [blame] | 1610 | drm_intel_gem_bo_close_vma(bufmgr_gem, bo_gem); |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 1611 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
Chris Wilson | c549a77 | 2011-12-05 10:14:34 +0000 | [diff] [blame] | 1612 | bo->virtual = NULL; |
| 1613 | } |
Chris Wilson | a3305b0 | 2010-05-13 08:24:28 +0100 | [diff] [blame] | 1614 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 1615 | |
| 1616 | return ret; |
Carl Worth | afd245d | 2009-04-29 14:43:55 -0700 | [diff] [blame] | 1617 | } |
| 1618 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1619 | int |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1620 | drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo) |
Eric Anholt | d0ae683 | 2011-10-28 13:13:08 -0700 | [diff] [blame] | 1621 | { |
| 1622 | return drm_intel_gem_bo_unmap(bo); |
| 1623 | } |
| 1624 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1625 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1626 | drm_intel_gem_bo_subdata(drm_intel_bo *bo, unsigned long offset, |
| 1627 | unsigned long size, const void *data) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1628 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1629 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1630 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1631 | struct drm_i915_gem_pwrite pwrite; |
| 1632 | int ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1633 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1634 | if (bo_gem->is_userptr) |
| 1635 | return -EINVAL; |
| 1636 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1637 | memclear(pwrite); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1638 | pwrite.handle = bo_gem->gem_handle; |
| 1639 | pwrite.offset = offset; |
| 1640 | pwrite.size = size; |
| 1641 | pwrite.data_ptr = (uint64_t) (uintptr_t) data; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1642 | ret = drmIoctl(bufmgr_gem->fd, |
| 1643 | DRM_IOCTL_I915_GEM_PWRITE, |
| 1644 | &pwrite); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1645 | if (ret != 0) { |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 1646 | ret = -errno; |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1647 | DBG("%s:%d: Error writing data to buffer %d: (%d %d) %s .\n", |
| 1648 | __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, |
| 1649 | (int)size, strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1650 | } |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 1651 | |
| 1652 | return ret; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1653 | } |
| 1654 | |
| 1655 | static int |
| 1656 | drm_intel_gem_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id) |
| 1657 | { |
| 1658 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 1659 | struct drm_i915_get_pipe_from_crtc_id get_pipe_from_crtc_id; |
| 1660 | int ret; |
| 1661 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1662 | memclear(get_pipe_from_crtc_id); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1663 | get_pipe_from_crtc_id.crtc_id = crtc_id; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1664 | ret = drmIoctl(bufmgr_gem->fd, |
| 1665 | DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, |
| 1666 | &get_pipe_from_crtc_id); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1667 | if (ret != 0) { |
| 1668 | /* We return -1 here to signal that we don't |
| 1669 | * know which pipe is associated with this crtc. |
| 1670 | * This lets the caller know that this information |
| 1671 | * isn't available; using the wrong pipe for |
| 1672 | * vblank waiting can cause the chipset to lock up |
| 1673 | */ |
| 1674 | return -1; |
| 1675 | } |
| 1676 | |
| 1677 | return get_pipe_from_crtc_id.pipe; |
| 1678 | } |
| 1679 | |
| 1680 | static int |
| 1681 | drm_intel_gem_bo_get_subdata(drm_intel_bo *bo, unsigned long offset, |
| 1682 | unsigned long size, void *data) |
| 1683 | { |
| 1684 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1685 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1686 | struct drm_i915_gem_pread pread; |
| 1687 | int ret; |
| 1688 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 1689 | if (bo_gem->is_userptr) |
| 1690 | return -EINVAL; |
| 1691 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1692 | memclear(pread); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1693 | pread.handle = bo_gem->gem_handle; |
| 1694 | pread.offset = offset; |
| 1695 | pread.size = size; |
| 1696 | pread.data_ptr = (uint64_t) (uintptr_t) data; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1697 | ret = drmIoctl(bufmgr_gem->fd, |
| 1698 | DRM_IOCTL_I915_GEM_PREAD, |
| 1699 | &pread); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1700 | if (ret != 0) { |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1701 | ret = -errno; |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1702 | DBG("%s:%d: Error reading data from buffer %d: (%d %d) %s .\n", |
| 1703 | __FILE__, __LINE__, bo_gem->gem_handle, (int)offset, |
| 1704 | (int)size, strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1705 | } |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 1706 | |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 1707 | return ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1708 | } |
| 1709 | |
Eric Anholt | 877b2ce | 2010-11-09 13:51:45 -0800 | [diff] [blame] | 1710 | /** Waits for all GPU rendering with the object to have completed. */ |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1711 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1712 | drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1713 | { |
Eric Anholt | 877b2ce | 2010-11-09 13:51:45 -0800 | [diff] [blame] | 1714 | drm_intel_gem_bo_start_gtt_access(bo, 1); |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 1715 | } |
| 1716 | |
| 1717 | /** |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1718 | * Waits on a BO for the given amount of time. |
| 1719 | * |
| 1720 | * @bo: buffer object to wait for |
| 1721 | * @timeout_ns: amount of time to wait in nanoseconds. |
Daniel Vetter | fcff9e2 | 2015-03-06 18:56:57 +0100 | [diff] [blame] | 1722 | * If value is less than 0, an infinite wait will occur. |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1723 | * |
Daniel Vetter | fcff9e2 | 2015-03-06 18:56:57 +0100 | [diff] [blame] | 1724 | * Returns 0 if the wait was successful ie. the last batch referencing the |
| 1725 | * object has completed within the allotted time. Otherwise some negative return |
| 1726 | * value describes the error. Of particular interest is -ETIME when the wait has |
| 1727 | * failed to yield the desired result. |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1728 | * |
| 1729 | * Similar to drm_intel_gem_bo_wait_rendering except a timeout parameter allows |
| 1730 | * the operation to give up after a certain amount of time. Another subtle |
| 1731 | * difference is the internal locking semantics are different (this variant does |
| 1732 | * not hold the lock for the duration of the wait). This makes the wait subject |
| 1733 | * to a larger userspace race window. |
| 1734 | * |
| 1735 | * The implementation shall wait until the object is no longer actively |
| 1736 | * referenced within a batch buffer at the time of the call. The wait will |
| 1737 | * not guarantee that the buffer is re-issued via another thread, or an flinked |
| 1738 | * handle. Userspace must make sure this race does not occur if such precision |
| 1739 | * is important. |
Daniel Vetter | fcff9e2 | 2015-03-06 18:56:57 +0100 | [diff] [blame] | 1740 | * |
| 1741 | * Note that some kernels have broken the inifite wait for negative values |
| 1742 | * promise, upgrade to latest stable kernels if this is the case. |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1743 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1744 | int |
Maarten Lankhorst | 07fead4 | 2014-07-31 15:07:27 +0200 | [diff] [blame] | 1745 | drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1746 | { |
| 1747 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1748 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1749 | struct drm_i915_gem_wait wait; |
| 1750 | int ret; |
| 1751 | |
| 1752 | if (!bufmgr_gem->has_wait_timeout) { |
| 1753 | DBG("%s:%d: Timed wait is not supported. Falling back to " |
| 1754 | "infinite wait\n", __FILE__, __LINE__); |
| 1755 | if (timeout_ns) { |
| 1756 | drm_intel_gem_bo_wait_rendering(bo); |
| 1757 | return 0; |
| 1758 | } else { |
| 1759 | return drm_intel_gem_bo_busy(bo) ? -ETIME : 0; |
| 1760 | } |
| 1761 | } |
| 1762 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1763 | memclear(wait); |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1764 | wait.bo_handle = bo_gem->gem_handle; |
| 1765 | wait.timeout_ns = timeout_ns; |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 1766 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); |
| 1767 | if (ret == -1) |
| 1768 | return -errno; |
| 1769 | |
| 1770 | return ret; |
| 1771 | } |
| 1772 | |
| 1773 | /** |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 1774 | * Sets the object to the GTT read and possibly write domain, used by the X |
| 1775 | * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). |
| 1776 | * |
| 1777 | * In combination with drm_intel_gem_bo_pin() and manual fence management, we |
| 1778 | * can do tiled pixmaps this way. |
| 1779 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1780 | void |
Eric Anholt | 6fb1ad7 | 2008-11-13 11:44:22 -0800 | [diff] [blame] | 1781 | drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable) |
| 1782 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1783 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1784 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1785 | struct drm_i915_gem_set_domain set_domain; |
| 1786 | int ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1787 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 1788 | memclear(set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1789 | set_domain.handle = bo_gem->gem_handle; |
| 1790 | set_domain.read_domains = I915_GEM_DOMAIN_GTT; |
| 1791 | set_domain.write_domain = write_enable ? I915_GEM_DOMAIN_GTT : 0; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 1792 | ret = drmIoctl(bufmgr_gem->fd, |
| 1793 | DRM_IOCTL_I915_GEM_SET_DOMAIN, |
| 1794 | &set_domain); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1795 | if (ret != 0) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 1796 | DBG("%s:%d: Error setting memory domains %d (%08x %08x): %s .\n", |
| 1797 | __FILE__, __LINE__, bo_gem->gem_handle, |
| 1798 | set_domain.read_domains, set_domain.write_domain, |
| 1799 | strerror(errno)); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1800 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1801 | } |
| 1802 | |
| 1803 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 1804 | drm_intel_bufmgr_gem_destroy(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1805 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1806 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
Tvrtko Ursulin | 3092148 | 2015-04-17 11:57:28 +0100 | [diff] [blame] | 1807 | struct drm_gem_close close_bo; |
| 1808 | int i, ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1809 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1810 | free(bufmgr_gem->exec2_objects); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1811 | free(bufmgr_gem->exec_objects); |
| 1812 | free(bufmgr_gem->exec_bos); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1813 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1814 | pthread_mutex_destroy(&bufmgr_gem->lock); |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1815 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1816 | /* Free any cached buffer objects we were going to reuse */ |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 1817 | for (i = 0; i < bufmgr_gem->num_buckets; i++) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1818 | struct drm_intel_gem_bo_bucket *bucket = |
| 1819 | &bufmgr_gem->cache_bucket[i]; |
| 1820 | drm_intel_bo_gem *bo_gem; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1821 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1822 | while (!DRMLISTEMPTY(&bucket->head)) { |
| 1823 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, |
| 1824 | bucket->head.next, head); |
| 1825 | DRMLISTDEL(&bo_gem->head); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1826 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1827 | drm_intel_gem_bo_free(&bo_gem->bo); |
| 1828 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1829 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1830 | |
Tvrtko Ursulin | 3092148 | 2015-04-17 11:57:28 +0100 | [diff] [blame] | 1831 | /* Release userptr bo kept hanging around for optimisation. */ |
| 1832 | if (bufmgr_gem->userptr_active.ptr) { |
| 1833 | memclear(close_bo); |
| 1834 | close_bo.handle = bufmgr_gem->userptr_active.handle; |
| 1835 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_CLOSE, &close_bo); |
| 1836 | free(bufmgr_gem->userptr_active.ptr); |
| 1837 | if (ret) |
| 1838 | fprintf(stderr, |
| 1839 | "Failed to release test userptr object! (%d) " |
| 1840 | "i915 kernel driver may not be sane!\n", errno); |
| 1841 | } |
| 1842 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1843 | free(bufmgr); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1844 | } |
| 1845 | |
| 1846 | /** |
| 1847 | * Adds the target buffer to the validation list and adds the relocation |
| 1848 | * to the reloc_buffer's relocation list. |
| 1849 | * |
| 1850 | * The relocation entry at the given offset must already contain the |
| 1851 | * precomputed relocation value, because the kernel will optimize out |
| 1852 | * the relocation entry write when the buffer hasn't moved from the |
| 1853 | * last known offset in target_bo. |
| 1854 | */ |
| 1855 | static int |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1856 | do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
| 1857 | drm_intel_bo *target_bo, uint32_t target_offset, |
| 1858 | uint32_t read_domains, uint32_t write_domain, |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1859 | bool need_fence) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1860 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1861 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 1862 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1863 | drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1864 | bool fenced_command; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1865 | |
Chris Wilson | 9707733 | 2009-12-01 23:01:34 +0000 | [diff] [blame] | 1866 | if (bo_gem->has_error) |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 1867 | return -ENOMEM; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 1868 | |
| 1869 | if (target_bo_gem->has_error) { |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1870 | bo_gem->has_error = true; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 1871 | return -ENOMEM; |
| 1872 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1873 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1874 | /* We never use HW fences for rendering on 965+ */ |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 1875 | if (bufmgr_gem->gen >= 4) |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1876 | need_fence = false; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1877 | |
Chris Wilson | 537703f | 2010-12-07 20:34:22 +0000 | [diff] [blame] | 1878 | fenced_command = need_fence; |
| 1879 | if (target_bo_gem->tiling_mode == I915_TILING_NONE) |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1880 | need_fence = false; |
Chris Wilson | 537703f | 2010-12-07 20:34:22 +0000 | [diff] [blame] | 1881 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1882 | /* Create a new relocation list if needed */ |
Chris Wilson | 9707733 | 2009-12-01 23:01:34 +0000 | [diff] [blame] | 1883 | if (bo_gem->relocs == NULL && drm_intel_setup_reloc_list(bo)) |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 1884 | return -ENOMEM; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1885 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1886 | /* Check overflow */ |
| 1887 | assert(bo_gem->reloc_count < bufmgr_gem->max_relocs); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1888 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1889 | /* Check args */ |
| 1890 | assert(offset <= bo->size - 4); |
| 1891 | assert((write_domain & (write_domain - 1)) == 0); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1892 | |
Chris Wilson | ec65f8d | 2013-05-08 16:30:44 +0100 | [diff] [blame] | 1893 | /* An object needing a fence is a tiled buffer, so it won't have |
| 1894 | * relocs to other buffers. |
| 1895 | */ |
| 1896 | if (need_fence) { |
| 1897 | assert(target_bo_gem->reloc_count == 0); |
| 1898 | target_bo_gem->reloc_tree_fences = 1; |
| 1899 | } |
| 1900 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1901 | /* Make sure that we're not adding a reloc to something whose size has |
| 1902 | * already been accounted for. |
| 1903 | */ |
| 1904 | assert(!bo_gem->used_as_reloc_target); |
Eric Anholt | f179137 | 2010-06-07 14:22:36 -0700 | [diff] [blame] | 1905 | if (target_bo_gem != bo_gem) { |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1906 | target_bo_gem->used_as_reloc_target = true; |
Eric Anholt | f179137 | 2010-06-07 14:22:36 -0700 | [diff] [blame] | 1907 | bo_gem->reloc_tree_size += target_bo_gem->reloc_tree_size; |
Chris Wilson | ec65f8d | 2013-05-08 16:30:44 +0100 | [diff] [blame] | 1908 | bo_gem->reloc_tree_fences += target_bo_gem->reloc_tree_fences; |
Eric Anholt | f179137 | 2010-06-07 14:22:36 -0700 | [diff] [blame] | 1909 | } |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 1910 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1911 | bo_gem->relocs[bo_gem->reloc_count].offset = offset; |
| 1912 | bo_gem->relocs[bo_gem->reloc_count].delta = target_offset; |
| 1913 | bo_gem->relocs[bo_gem->reloc_count].target_handle = |
| 1914 | target_bo_gem->gem_handle; |
| 1915 | bo_gem->relocs[bo_gem->reloc_count].read_domains = read_domains; |
| 1916 | bo_gem->relocs[bo_gem->reloc_count].write_domain = write_domain; |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 1917 | bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset64; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1918 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1919 | bo_gem->reloc_target_info[bo_gem->reloc_count].bo = target_bo; |
Eric Anholt | 4f7704a | 2010-06-10 08:58:08 -0700 | [diff] [blame] | 1920 | if (target_bo != bo) |
| 1921 | drm_intel_gem_bo_reference(target_bo); |
Chris Wilson | af3d282 | 2010-12-03 10:48:12 +0000 | [diff] [blame] | 1922 | if (fenced_command) |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1923 | bo_gem->reloc_target_info[bo_gem->reloc_count].flags = |
| 1924 | DRM_INTEL_RELOC_FENCE; |
| 1925 | else |
| 1926 | bo_gem->reloc_target_info[bo_gem->reloc_count].flags = 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1927 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1928 | bo_gem->reloc_count++; |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 1929 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 1930 | return 0; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 1931 | } |
| 1932 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1933 | static int |
| 1934 | drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset, |
| 1935 | drm_intel_bo *target_bo, uint32_t target_offset, |
| 1936 | uint32_t read_domains, uint32_t write_domain) |
| 1937 | { |
| 1938 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; |
| 1939 | |
| 1940 | return do_bo_emit_reloc(bo, offset, target_bo, target_offset, |
| 1941 | read_domains, write_domain, |
| 1942 | !bufmgr_gem->fenced_relocs); |
| 1943 | } |
| 1944 | |
| 1945 | static int |
| 1946 | drm_intel_gem_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset, |
| 1947 | drm_intel_bo *target_bo, |
| 1948 | uint32_t target_offset, |
| 1949 | uint32_t read_domains, uint32_t write_domain) |
| 1950 | { |
| 1951 | return do_bo_emit_reloc(bo, offset, target_bo, target_offset, |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 1952 | read_domains, write_domain, true); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 1953 | } |
| 1954 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1955 | int |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1956 | drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo) |
| 1957 | { |
| 1958 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1959 | |
| 1960 | return bo_gem->reloc_count; |
| 1961 | } |
| 1962 | |
| 1963 | /** |
| 1964 | * Removes existing relocation entries in the BO after "start". |
| 1965 | * |
| 1966 | * This allows a user to avoid a two-step process for state setup with |
| 1967 | * counting up all the buffer objects and doing a |
| 1968 | * drm_intel_bufmgr_check_aperture_space() before emitting any of the |
| 1969 | * relocations for the state setup. Instead, save the state of the |
| 1970 | * batchbuffer including drm_intel_gem_get_reloc_count(), emit all the |
| 1971 | * state, and then check if it still fits in the aperture. |
| 1972 | * |
| 1973 | * Any further drm_intel_bufmgr_check_aperture_space() queries |
| 1974 | * involving this buffer in the tree are undefined after this call. |
| 1975 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 1976 | void |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1977 | drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start) |
| 1978 | { |
Lionel Landwerlin | 86b37c6 | 2014-09-12 13:48:38 +0100 | [diff] [blame] | 1979 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1980 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 1981 | int i; |
| 1982 | struct timespec time; |
| 1983 | |
| 1984 | clock_gettime(CLOCK_MONOTONIC, &time); |
| 1985 | |
| 1986 | assert(bo_gem->reloc_count >= start); |
Lionel Landwerlin | 86b37c6 | 2014-09-12 13:48:38 +0100 | [diff] [blame] | 1987 | |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1988 | /* Unreference the cleared target buffers */ |
Lionel Landwerlin | 86b37c6 | 2014-09-12 13:48:38 +0100 | [diff] [blame] | 1989 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 1990 | |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1991 | for (i = start; i < bo_gem->reloc_count; i++) { |
Chris Wilson | fdda970 | 2013-01-11 00:55:12 +0000 | [diff] [blame] | 1992 | drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) bo_gem->reloc_target_info[i].bo; |
| 1993 | if (&target_bo_gem->bo != bo) { |
| 1994 | bo_gem->reloc_tree_fences -= target_bo_gem->reloc_tree_fences; |
| 1995 | drm_intel_gem_bo_unreference_locked_timed(&target_bo_gem->bo, |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 1996 | time.tv_sec); |
| 1997 | } |
| 1998 | } |
| 1999 | bo_gem->reloc_count = start; |
Lionel Landwerlin | 86b37c6 | 2014-09-12 13:48:38 +0100 | [diff] [blame] | 2000 | |
| 2001 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 2002 | |
Eric Anholt | 515cea6 | 2011-10-21 18:48:20 -0700 | [diff] [blame] | 2003 | } |
| 2004 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2005 | /** |
| 2006 | * Walk the tree of relocations rooted at BO and accumulate the list of |
| 2007 | * validations to be performed and update the relocation buffers with |
| 2008 | * index values into the validation list. |
| 2009 | */ |
| 2010 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2011 | drm_intel_gem_bo_process_reloc(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2012 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2013 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2014 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2015 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2016 | if (bo_gem->relocs == NULL) |
| 2017 | return; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2018 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2019 | for (i = 0; i < bo_gem->reloc_count; i++) { |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2020 | drm_intel_bo *target_bo = bo_gem->reloc_target_info[i].bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2021 | |
Eric Anholt | f179137 | 2010-06-07 14:22:36 -0700 | [diff] [blame] | 2022 | if (target_bo == bo) |
| 2023 | continue; |
| 2024 | |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 2025 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
| 2026 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2027 | /* Continue walking the tree depth-first. */ |
| 2028 | drm_intel_gem_bo_process_reloc(target_bo); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2029 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2030 | /* Add the target to the validate list */ |
| 2031 | drm_intel_add_validate_buffer(target_bo); |
| 2032 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2033 | } |
| 2034 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2035 | static void |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2036 | drm_intel_gem_bo_process_reloc2(drm_intel_bo *bo) |
| 2037 | { |
| 2038 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo; |
| 2039 | int i; |
| 2040 | |
| 2041 | if (bo_gem->relocs == NULL) |
| 2042 | return; |
| 2043 | |
| 2044 | for (i = 0; i < bo_gem->reloc_count; i++) { |
| 2045 | drm_intel_bo *target_bo = bo_gem->reloc_target_info[i].bo; |
| 2046 | int need_fence; |
| 2047 | |
Eric Anholt | f179137 | 2010-06-07 14:22:36 -0700 | [diff] [blame] | 2048 | if (target_bo == bo) |
| 2049 | continue; |
| 2050 | |
Chris Wilson | 23eeb7e | 2012-02-09 10:29:22 +0000 | [diff] [blame] | 2051 | drm_intel_gem_bo_mark_mmaps_incoherent(bo); |
| 2052 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2053 | /* Continue walking the tree depth-first. */ |
| 2054 | drm_intel_gem_bo_process_reloc2(target_bo); |
| 2055 | |
| 2056 | need_fence = (bo_gem->reloc_target_info[i].flags & |
| 2057 | DRM_INTEL_RELOC_FENCE); |
| 2058 | |
| 2059 | /* Add the target to the validate list */ |
| 2060 | drm_intel_add_validate_buffer2(target_bo, need_fence); |
| 2061 | } |
| 2062 | } |
| 2063 | |
| 2064 | |
| 2065 | static void |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2066 | drm_intel_update_buffer_offsets(drm_intel_bufmgr_gem *bufmgr_gem) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2067 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2068 | int i; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2069 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2070 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 2071 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 2072 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2073 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2074 | /* Update the buffer offset */ |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2075 | if (bufmgr_gem->exec_objects[i].offset != bo->offset64) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2076 | DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n", |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2077 | bo_gem->gem_handle, bo_gem->name, bo->offset64, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2078 | (unsigned long long)bufmgr_gem->exec_objects[i]. |
| 2079 | offset); |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2080 | bo->offset64 = bufmgr_gem->exec_objects[i].offset; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2081 | bo->offset = bufmgr_gem->exec_objects[i].offset; |
| 2082 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2083 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2084 | } |
| 2085 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2086 | static void |
| 2087 | drm_intel_update_buffer_offsets2 (drm_intel_bufmgr_gem *bufmgr_gem) |
| 2088 | { |
| 2089 | int i; |
| 2090 | |
| 2091 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 2092 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 2093 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo; |
| 2094 | |
| 2095 | /* Update the buffer offset */ |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2096 | if (bufmgr_gem->exec2_objects[i].offset != bo->offset64) { |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2097 | DBG("BO %d (%s) migrated: 0x%08lx -> 0x%08llx\n", |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2098 | bo_gem->gem_handle, bo_gem->name, bo->offset64, |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2099 | (unsigned long long)bufmgr_gem->exec2_objects[i].offset); |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2100 | bo->offset64 = bufmgr_gem->exec2_objects[i].offset; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2101 | bo->offset = bufmgr_gem->exec2_objects[i].offset; |
| 2102 | } |
| 2103 | } |
| 2104 | } |
| 2105 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2106 | void |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 2107 | drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo, |
| 2108 | int x1, int y1, int width, int height, |
| 2109 | enum aub_dump_bmp_format format, |
| 2110 | int pitch, int offset) |
| 2111 | { |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 2112 | } |
| 2113 | |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2114 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2115 | drm_intel_gem_bo_exec(drm_intel_bo *bo, int used, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2116 | drm_clip_rect_t * cliprects, int num_cliprects, int DR4) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2117 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2118 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 2119 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2120 | struct drm_i915_gem_execbuffer execbuf; |
| 2121 | int ret, i; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2122 | |
Chris Wilson | 792fed1 | 2009-12-02 13:12:39 +0000 | [diff] [blame] | 2123 | if (bo_gem->has_error) |
| 2124 | return -ENOMEM; |
| 2125 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2126 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 2127 | /* Update indices and set up the validate list. */ |
| 2128 | drm_intel_gem_bo_process_reloc(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2129 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2130 | /* Add the batch buffer to the validation list. There are no |
| 2131 | * relocations pointing to it. |
| 2132 | */ |
| 2133 | drm_intel_add_validate_buffer(bo); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2134 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2135 | memclear(execbuf); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2136 | execbuf.buffers_ptr = (uintptr_t) bufmgr_gem->exec_objects; |
| 2137 | execbuf.buffer_count = bufmgr_gem->exec_count; |
| 2138 | execbuf.batch_start_offset = 0; |
| 2139 | execbuf.batch_len = used; |
| 2140 | execbuf.cliprects_ptr = (uintptr_t) cliprects; |
| 2141 | execbuf.num_cliprects = num_cliprects; |
| 2142 | execbuf.DR1 = 0; |
| 2143 | execbuf.DR4 = DR4; |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2144 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2145 | ret = drmIoctl(bufmgr_gem->fd, |
| 2146 | DRM_IOCTL_I915_GEM_EXECBUFFER, |
| 2147 | &execbuf); |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 2148 | if (ret != 0) { |
| 2149 | ret = -errno; |
| 2150 | if (errno == ENOSPC) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 2151 | DBG("Execbuffer fails to pin. " |
| 2152 | "Estimate: %u. Actual: %u. Available: %u\n", |
| 2153 | drm_intel_gem_estimate_batch_space(bufmgr_gem->exec_bos, |
| 2154 | bufmgr_gem-> |
| 2155 | exec_count), |
| 2156 | drm_intel_gem_compute_batch_space(bufmgr_gem->exec_bos, |
| 2157 | bufmgr_gem-> |
| 2158 | exec_count), |
| 2159 | (unsigned int)bufmgr_gem->gtt_size); |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 2160 | } |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2161 | } |
| 2162 | drm_intel_update_buffer_offsets(bufmgr_gem); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2163 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2164 | if (bufmgr_gem->bufmgr.debug) |
| 2165 | drm_intel_gem_dump_validation_list(bufmgr_gem); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2166 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2167 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 2168 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 2169 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2170 | |
Eric Anholt | 02f93c2 | 2014-01-15 00:38:39 -0800 | [diff] [blame] | 2171 | bo_gem->idle = false; |
| 2172 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2173 | /* Disconnect the buffer from the validate list */ |
| 2174 | bo_gem->validate_index = -1; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2175 | bufmgr_gem->exec_bos[i] = NULL; |
| 2176 | } |
| 2177 | bufmgr_gem->exec_count = 0; |
| 2178 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | f9d98be | 2008-09-08 08:51:40 -0700 | [diff] [blame] | 2179 | |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 2180 | return ret; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2181 | } |
| 2182 | |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2183 | static int |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 2184 | do_exec2(drm_intel_bo *bo, int used, drm_intel_context *ctx, |
| 2185 | drm_clip_rect_t *cliprects, int num_cliprects, int DR4, |
| 2186 | unsigned int flags) |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2187 | { |
| 2188 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr; |
| 2189 | struct drm_i915_gem_execbuffer2 execbuf; |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2190 | int ret = 0; |
| 2191 | int i; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2192 | |
Chris Wilson | 0184bb1 | 2010-12-19 13:01:15 +0000 | [diff] [blame] | 2193 | switch (flags & 0x7) { |
Chris Wilson | 057fab3 | 2010-10-26 11:35:11 +0100 | [diff] [blame] | 2194 | default: |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 2195 | return -EINVAL; |
Chris Wilson | 057fab3 | 2010-10-26 11:35:11 +0100 | [diff] [blame] | 2196 | case I915_EXEC_BLT: |
| 2197 | if (!bufmgr_gem->has_blt) |
| 2198 | return -EINVAL; |
| 2199 | break; |
| 2200 | case I915_EXEC_BSD: |
| 2201 | if (!bufmgr_gem->has_bsd) |
| 2202 | return -EINVAL; |
| 2203 | break; |
Xiang, Haihao | 0119999 | 2012-11-14 12:46:39 +0800 | [diff] [blame] | 2204 | case I915_EXEC_VEBOX: |
| 2205 | if (!bufmgr_gem->has_vebox) |
| 2206 | return -EINVAL; |
| 2207 | break; |
Chris Wilson | 057fab3 | 2010-10-26 11:35:11 +0100 | [diff] [blame] | 2208 | case I915_EXEC_RENDER: |
| 2209 | case I915_EXEC_DEFAULT: |
| 2210 | break; |
| 2211 | } |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 2212 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2213 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 2214 | /* Update indices and set up the validate list. */ |
| 2215 | drm_intel_gem_bo_process_reloc2(bo); |
| 2216 | |
| 2217 | /* Add the batch buffer to the validation list. There are no relocations |
| 2218 | * pointing to it. |
| 2219 | */ |
| 2220 | drm_intel_add_validate_buffer2(bo, 0); |
| 2221 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2222 | memclear(execbuf); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2223 | execbuf.buffers_ptr = (uintptr_t)bufmgr_gem->exec2_objects; |
| 2224 | execbuf.buffer_count = bufmgr_gem->exec_count; |
| 2225 | execbuf.batch_start_offset = 0; |
| 2226 | execbuf.batch_len = used; |
| 2227 | execbuf.cliprects_ptr = (uintptr_t)cliprects; |
| 2228 | execbuf.num_cliprects = num_cliprects; |
| 2229 | execbuf.DR1 = 0; |
| 2230 | execbuf.DR4 = DR4; |
Chris Wilson | 0184bb1 | 2010-12-19 13:01:15 +0000 | [diff] [blame] | 2231 | execbuf.flags = flags; |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 2232 | if (ctx == NULL) |
| 2233 | i915_execbuffer2_set_context_id(execbuf, 0); |
| 2234 | else |
| 2235 | i915_execbuffer2_set_context_id(execbuf, ctx->ctx_id); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2236 | execbuf.rsvd2 = 0; |
| 2237 | |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2238 | if (bufmgr_gem->no_exec) |
| 2239 | goto skip_execution; |
| 2240 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2241 | ret = drmIoctl(bufmgr_gem->fd, |
| 2242 | DRM_IOCTL_I915_GEM_EXECBUFFER2, |
| 2243 | &execbuf); |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 2244 | if (ret != 0) { |
| 2245 | ret = -errno; |
Chris Wilson | 13e8270 | 2010-06-21 15:38:06 +0100 | [diff] [blame] | 2246 | if (ret == -ENOSPC) { |
Chris Wilson | 9621486 | 2010-10-01 16:50:09 +0100 | [diff] [blame] | 2247 | DBG("Execbuffer fails to pin. " |
| 2248 | "Estimate: %u. Actual: %u. Available: %u\n", |
| 2249 | drm_intel_gem_estimate_batch_space(bufmgr_gem->exec_bos, |
| 2250 | bufmgr_gem->exec_count), |
| 2251 | drm_intel_gem_compute_batch_space(bufmgr_gem->exec_bos, |
| 2252 | bufmgr_gem->exec_count), |
| 2253 | (unsigned int) bufmgr_gem->gtt_size); |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 2254 | } |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2255 | } |
| 2256 | drm_intel_update_buffer_offsets2(bufmgr_gem); |
| 2257 | |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2258 | skip_execution: |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2259 | if (bufmgr_gem->bufmgr.debug) |
| 2260 | drm_intel_gem_dump_validation_list(bufmgr_gem); |
| 2261 | |
| 2262 | for (i = 0; i < bufmgr_gem->exec_count; i++) { |
| 2263 | drm_intel_bo *bo = bufmgr_gem->exec_bos[i]; |
| 2264 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo; |
| 2265 | |
Eric Anholt | 02f93c2 | 2014-01-15 00:38:39 -0800 | [diff] [blame] | 2266 | bo_gem->idle = false; |
| 2267 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2268 | /* Disconnect the buffer from the validate list */ |
| 2269 | bo_gem->validate_index = -1; |
| 2270 | bufmgr_gem->exec_bos[i] = NULL; |
| 2271 | } |
| 2272 | bufmgr_gem->exec_count = 0; |
| 2273 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 2274 | |
Chris Wilson | 3e21e3b | 2010-03-04 21:17:48 +0000 | [diff] [blame] | 2275 | return ret; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2276 | } |
| 2277 | |
| 2278 | static int |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 2279 | drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used, |
| 2280 | drm_clip_rect_t *cliprects, int num_cliprects, |
| 2281 | int DR4) |
| 2282 | { |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 2283 | return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, |
| 2284 | I915_EXEC_RENDER); |
| 2285 | } |
| 2286 | |
| 2287 | static int |
| 2288 | drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used, |
| 2289 | drm_clip_rect_t *cliprects, int num_cliprects, int DR4, |
| 2290 | unsigned int flags) |
| 2291 | { |
| 2292 | return do_exec2(bo, used, NULL, cliprects, num_cliprects, DR4, |
| 2293 | flags); |
| 2294 | } |
| 2295 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2296 | int |
Ben Widawsky | 3ed3871 | 2012-03-18 18:28:28 -0700 | [diff] [blame] | 2297 | drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx, |
| 2298 | int used, unsigned int flags) |
| 2299 | { |
| 2300 | return do_exec2(bo, used, ctx, NULL, 0, 0, flags); |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 2301 | } |
| 2302 | |
| 2303 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2304 | drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2305 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2306 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2307 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2308 | struct drm_i915_gem_pin pin; |
| 2309 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2310 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2311 | memclear(pin); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2312 | pin.handle = bo_gem->gem_handle; |
| 2313 | pin.alignment = alignment; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2314 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2315 | ret = drmIoctl(bufmgr_gem->fd, |
| 2316 | DRM_IOCTL_I915_GEM_PIN, |
| 2317 | &pin); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2318 | if (ret != 0) |
| 2319 | return -errno; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2320 | |
Kenneth Graunke | edf17db | 2014-01-13 14:14:36 -0800 | [diff] [blame] | 2321 | bo->offset64 = pin.offset; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2322 | bo->offset = pin.offset; |
| 2323 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2324 | } |
| 2325 | |
| 2326 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2327 | drm_intel_gem_bo_unpin(drm_intel_bo *bo) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2328 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2329 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2330 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2331 | struct drm_i915_gem_unpin unpin; |
| 2332 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2333 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2334 | memclear(unpin); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2335 | unpin.handle = bo_gem->gem_handle; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2336 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2337 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2338 | if (ret != 0) |
| 2339 | return -errno; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2340 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2341 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2342 | } |
| 2343 | |
| 2344 | static int |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 2345 | drm_intel_gem_bo_set_tiling_internal(drm_intel_bo *bo, |
| 2346 | uint32_t tiling_mode, |
| 2347 | uint32_t stride) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2348 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2349 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2350 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2351 | struct drm_i915_gem_set_tiling set_tiling; |
| 2352 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2353 | |
Chris Wilson | aba3502 | 2010-06-22 13:00:22 +0100 | [diff] [blame] | 2354 | if (bo_gem->global_name == 0 && |
| 2355 | tiling_mode == bo_gem->tiling_mode && |
Chris Wilson | 056aa9b | 2010-06-21 14:31:29 +0100 | [diff] [blame] | 2356 | stride == bo_gem->stride) |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2357 | return 0; |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 2358 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2359 | memset(&set_tiling, 0, sizeof(set_tiling)); |
Chris Wilson | 8ffd2e1 | 2009-12-01 13:08:04 +0000 | [diff] [blame] | 2360 | do { |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2361 | /* set_tiling is slightly broken and overwrites the |
| 2362 | * input on the error path, so we have to open code |
| 2363 | * rmIoctl. |
| 2364 | */ |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 2365 | set_tiling.handle = bo_gem->gem_handle; |
| 2366 | set_tiling.tiling_mode = tiling_mode; |
Chris Wilson | 4f0f871 | 2010-02-10 09:45:13 +0000 | [diff] [blame] | 2367 | set_tiling.stride = stride; |
| 2368 | |
Chris Wilson | 8ffd2e1 | 2009-12-01 13:08:04 +0000 | [diff] [blame] | 2369 | ret = ioctl(bufmgr_gem->fd, |
| 2370 | DRM_IOCTL_I915_GEM_SET_TILING, |
| 2371 | &set_tiling); |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2372 | } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 2373 | if (ret == -1) |
| 2374 | return -errno; |
| 2375 | |
| 2376 | bo_gem->tiling_mode = set_tiling.tiling_mode; |
| 2377 | bo_gem->swizzle_mode = set_tiling.swizzle_mode; |
Chris Wilson | aba3502 | 2010-06-22 13:00:22 +0100 | [diff] [blame] | 2378 | bo_gem->stride = set_tiling.stride; |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 2379 | return 0; |
| 2380 | } |
| 2381 | |
| 2382 | static int |
| 2383 | drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 2384 | uint32_t stride) |
| 2385 | { |
| 2386 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2387 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2388 | int ret; |
| 2389 | |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 2390 | /* Tiling with userptr surfaces is not supported |
| 2391 | * on all hardware so refuse it for time being. |
| 2392 | */ |
| 2393 | if (bo_gem->is_userptr) |
| 2394 | return -EINVAL; |
| 2395 | |
Chris Wilson | cd34cbe | 2010-06-22 11:07:26 +0100 | [diff] [blame] | 2396 | /* Linear buffers have no stride. By ensuring that we only ever use |
| 2397 | * stride 0 with linear buffers, we simplify our code. |
| 2398 | */ |
Chris Wilson | c7bbaca | 2010-06-22 11:15:56 +0100 | [diff] [blame] | 2399 | if (*tiling_mode == I915_TILING_NONE) |
Chris Wilson | cd34cbe | 2010-06-22 11:07:26 +0100 | [diff] [blame] | 2400 | stride = 0; |
| 2401 | |
Chris Wilson | 1db22ff | 2010-06-21 14:27:23 +0100 | [diff] [blame] | 2402 | ret = drm_intel_gem_bo_set_tiling_internal(bo, *tiling_mode, stride); |
| 2403 | if (ret == 0) |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 2404 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0); |
Chris Wilson | e22fb79 | 2009-11-30 22:14:30 +0000 | [diff] [blame] | 2405 | |
Keith Packard | 18f091d | 2008-12-15 15:08:12 -0800 | [diff] [blame] | 2406 | *tiling_mode = bo_gem->tiling_mode; |
Chris Wilson | fcf3e61 | 2010-05-24 18:35:41 +0100 | [diff] [blame] | 2407 | return ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2408 | } |
| 2409 | |
| 2410 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2411 | drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, |
| 2412 | uint32_t * swizzle_mode) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2413 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2414 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | 9933838 | 2008-10-14 13:18:11 -0700 | [diff] [blame] | 2415 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2416 | *tiling_mode = bo_gem->tiling_mode; |
| 2417 | *swizzle_mode = bo_gem->swizzle_mode; |
| 2418 | return 0; |
Eric Anholt | 9933838 | 2008-10-14 13:18:11 -0700 | [diff] [blame] | 2419 | } |
| 2420 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2421 | drm_intel_bo * |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2422 | drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int size) |
| 2423 | { |
| 2424 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
| 2425 | int ret; |
| 2426 | uint32_t handle; |
| 2427 | drm_intel_bo_gem *bo_gem; |
| 2428 | struct drm_i915_gem_get_tiling get_tiling; |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2429 | drmMMListHead *list; |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2430 | |
Rafał Sapała | cf40cf0 | 2015-07-24 11:22:34 +0200 | [diff] [blame] | 2431 | pthread_mutex_lock(&bufmgr_gem->lock); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2432 | ret = drmPrimeFDToHandle(bufmgr_gem->fd, prime_fd, &handle); |
Rafał Sapała | cf40cf0 | 2015-07-24 11:22:34 +0200 | [diff] [blame] | 2433 | if (ret) { |
| 2434 | DBG("create_from_prime: failed to obtain handle from fd: %s\n", strerror(errno)); |
| 2435 | pthread_mutex_unlock(&bufmgr_gem->lock); |
| 2436 | return NULL; |
| 2437 | } |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2438 | |
| 2439 | /* |
| 2440 | * See if the kernel has already returned this buffer to us. Just as |
| 2441 | * for named buffers, we must not create two bo's pointing at the same |
| 2442 | * kernel object |
| 2443 | */ |
| 2444 | for (list = bufmgr_gem->named.next; |
| 2445 | list != &bufmgr_gem->named; |
| 2446 | list = list->next) { |
| 2447 | bo_gem = DRMLISTENTRY(drm_intel_bo_gem, list, name_list); |
| 2448 | if (bo_gem->gem_handle == handle) { |
| 2449 | drm_intel_gem_bo_reference(&bo_gem->bo); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2450 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2451 | return &bo_gem->bo; |
| 2452 | } |
| 2453 | } |
| 2454 | |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2455 | bo_gem = calloc(1, sizeof(*bo_gem)); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2456 | if (!bo_gem) { |
| 2457 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2458 | return NULL; |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2459 | } |
Kristian Høgsberg | 9c52c3d | 2013-10-10 14:40:58 -0700 | [diff] [blame] | 2460 | /* Determine size of bo. The fd-to-handle ioctl really should |
| 2461 | * return the size, but it doesn't. If we have kernel 3.12 or |
| 2462 | * later, we can lseek on the prime fd to get the size. Older |
| 2463 | * kernels will just fail, in which case we fall back to the |
| 2464 | * provided (estimated or guess size). */ |
| 2465 | ret = lseek(prime_fd, 0, SEEK_END); |
| 2466 | if (ret != -1) |
| 2467 | bo_gem->bo.size = ret; |
| 2468 | else |
| 2469 | bo_gem->bo.size = size; |
| 2470 | |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2471 | bo_gem->bo.handle = handle; |
| 2472 | bo_gem->bo.bufmgr = bufmgr; |
| 2473 | |
| 2474 | bo_gem->gem_handle = handle; |
| 2475 | |
| 2476 | atomic_set(&bo_gem->refcount, 1); |
| 2477 | |
| 2478 | bo_gem->name = "prime"; |
| 2479 | bo_gem->validate_index = -1; |
| 2480 | bo_gem->reloc_tree_fences = 0; |
| 2481 | bo_gem->used_as_reloc_target = false; |
| 2482 | bo_gem->has_error = false; |
| 2483 | bo_gem->reusable = false; |
| 2484 | |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2485 | DRMINITLISTHEAD(&bo_gem->vma_list); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2486 | DRMLISTADDTAIL(&bo_gem->name_list, &bufmgr_gem->named); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2487 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2488 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2489 | memclear(get_tiling); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2490 | get_tiling.handle = bo_gem->gem_handle; |
| 2491 | ret = drmIoctl(bufmgr_gem->fd, |
| 2492 | DRM_IOCTL_I915_GEM_GET_TILING, |
| 2493 | &get_tiling); |
| 2494 | if (ret != 0) { |
Rafał Sapała | cf40cf0 | 2015-07-24 11:22:34 +0200 | [diff] [blame] | 2495 | DBG("create_from_prime: failed to get tiling: %s\n", strerror(errno)); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2496 | drm_intel_gem_bo_unreference(&bo_gem->bo); |
| 2497 | return NULL; |
| 2498 | } |
| 2499 | bo_gem->tiling_mode = get_tiling.tiling_mode; |
| 2500 | bo_gem->swizzle_mode = get_tiling.swizzle_mode; |
| 2501 | /* XXX stride is unknown */ |
Anuj Phogat | 5c68f9f | 2015-04-10 17:20:55 -0700 | [diff] [blame] | 2502 | drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0); |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2503 | |
| 2504 | return &bo_gem->bo; |
| 2505 | } |
| 2506 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2507 | int |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2508 | drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd) |
| 2509 | { |
| 2510 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2511 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2512 | |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2513 | pthread_mutex_lock(&bufmgr_gem->lock); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2514 | if (DRMLISTEMPTY(&bo_gem->name_list)) |
| 2515 | DRMLISTADDTAIL(&bo_gem->name_list, &bufmgr_gem->named); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2516 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2517 | |
Kristian Høgsberg | 1b7ce58 | 2012-09-14 16:35:19 -0400 | [diff] [blame] | 2518 | if (drmPrimeHandleToFD(bufmgr_gem->fd, bo_gem->gem_handle, |
| 2519 | DRM_CLOEXEC, prime_fd) != 0) |
| 2520 | return -errno; |
| 2521 | |
| 2522 | bo_gem->reusable = false; |
| 2523 | |
| 2524 | return 0; |
Dave Airlie | ff65de9 | 2012-07-15 00:22:46 +0000 | [diff] [blame] | 2525 | } |
| 2526 | |
Eric Anholt | 9933838 | 2008-10-14 13:18:11 -0700 | [diff] [blame] | 2527 | static int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2528 | drm_intel_gem_bo_flink(drm_intel_bo *bo, uint32_t * name) |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2529 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2530 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; |
| 2531 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2532 | int ret; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2533 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2534 | if (!bo_gem->global_name) { |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 2535 | struct drm_gem_flink flink; |
| 2536 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2537 | memclear(flink); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2538 | flink.handle = bo_gem->gem_handle; |
| 2539 | |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2540 | pthread_mutex_lock(&bufmgr_gem->lock); |
| 2541 | |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 2542 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_GEM_FLINK, &flink); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2543 | if (ret != 0) { |
| 2544 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2545 | return -errno; |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2546 | } |
Chris Wilson | 90b23cc | 2012-02-09 10:23:10 +0000 | [diff] [blame] | 2547 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2548 | bo_gem->global_name = flink.name; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2549 | bo_gem->reusable = false; |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 2550 | |
Keith Packard | c3d9689 | 2013-11-22 05:31:01 -0800 | [diff] [blame] | 2551 | if (DRMLISTEMPTY(&bo_gem->name_list)) |
| 2552 | DRMLISTADDTAIL(&bo_gem->name_list, &bufmgr_gem->named); |
Rafal Sapala | 0fa1dbf | 2014-08-05 14:51:38 -0400 | [diff] [blame] | 2553 | pthread_mutex_unlock(&bufmgr_gem->lock); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2554 | } |
| 2555 | |
| 2556 | *name = bo_gem->global_name; |
| 2557 | return 0; |
Keith Packard | 8e41ce1 | 2008-08-04 00:34:08 -0700 | [diff] [blame] | 2558 | } |
| 2559 | |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2560 | /** |
| 2561 | * Enables unlimited caching of buffer objects for reuse. |
| 2562 | * |
| 2563 | * This is potentially very memory expensive, as the cache at each bucket |
| 2564 | * size is only bounded by how many buffers of that size we've managed to have |
| 2565 | * in flight at once. |
| 2566 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2567 | void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2568 | drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2569 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2570 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bufmgr; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2571 | |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2572 | bufmgr_gem->bo_reuse = true; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2573 | } |
| 2574 | |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2575 | /** |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2576 | * Enable use of fenced reloc type. |
| 2577 | * |
| 2578 | * New code should enable this to avoid unnecessary fence register |
| 2579 | * allocation. If this option is not enabled, all relocs will have fence |
| 2580 | * register allocated. |
| 2581 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2582 | void |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2583 | drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr) |
| 2584 | { |
Eric Anholt | 766fa79 | 2010-03-02 16:04:14 -0800 | [diff] [blame] | 2585 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2586 | |
Eric Anholt | 766fa79 | 2010-03-02 16:04:14 -0800 | [diff] [blame] | 2587 | if (bufmgr_gem->bufmgr.bo_exec == drm_intel_gem_bo_exec2) |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2588 | bufmgr_gem->fenced_relocs = true; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2589 | } |
| 2590 | |
| 2591 | /** |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2592 | * Return the additional aperture space required by the tree of buffer objects |
| 2593 | * rooted at bo. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2594 | */ |
| 2595 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2596 | drm_intel_gem_bo_get_aperture_space(drm_intel_bo *bo) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2597 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2598 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2599 | int i; |
| 2600 | int total = 0; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2601 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2602 | if (bo == NULL || bo_gem->included_in_check_aperture) |
| 2603 | return 0; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2604 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2605 | total += bo->size; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2606 | bo_gem->included_in_check_aperture = true; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2607 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2608 | for (i = 0; i < bo_gem->reloc_count; i++) |
| 2609 | total += |
| 2610 | drm_intel_gem_bo_get_aperture_space(bo_gem-> |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2611 | reloc_target_info[i].bo); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2612 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2613 | return total; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2614 | } |
| 2615 | |
| 2616 | /** |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2617 | * Count the number of buffers in this list that need a fence reg |
| 2618 | * |
| 2619 | * If the count is greater than the number of available regs, we'll have |
| 2620 | * to ask the caller to resubmit a batch with fewer tiled buffers. |
| 2621 | * |
Eric Anholt | 9209c9a | 2009-01-27 16:54:11 -0800 | [diff] [blame] | 2622 | * This function over-counts if the same buffer is used multiple times. |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2623 | */ |
| 2624 | static unsigned int |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2625 | drm_intel_gem_total_fences(drm_intel_bo ** bo_array, int count) |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2626 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2627 | int i; |
| 2628 | unsigned int total = 0; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2629 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2630 | for (i = 0; i < count; i++) { |
| 2631 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i]; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2632 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2633 | if (bo_gem == NULL) |
| 2634 | continue; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2635 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2636 | total += bo_gem->reloc_tree_fences; |
| 2637 | } |
| 2638 | return total; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2639 | } |
| 2640 | |
| 2641 | /** |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2642 | * Clear the flag set by drm_intel_gem_bo_get_aperture_space() so we're ready |
| 2643 | * for the next drm_intel_bufmgr_check_aperture_space() call. |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2644 | */ |
| 2645 | static void |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2646 | drm_intel_gem_bo_clear_aperture_space_flag(drm_intel_bo *bo) |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2647 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2648 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2649 | int i; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2650 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2651 | if (bo == NULL || !bo_gem->included_in_check_aperture) |
| 2652 | return; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2653 | |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2654 | bo_gem->included_in_check_aperture = false; |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2655 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2656 | for (i = 0; i < bo_gem->reloc_count; i++) |
| 2657 | drm_intel_gem_bo_clear_aperture_space_flag(bo_gem-> |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2658 | reloc_target_info[i].bo); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2659 | } |
| 2660 | |
| 2661 | /** |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2662 | * Return a conservative estimate for the amount of aperture required |
| 2663 | * for a collection of buffers. This may double-count some buffers. |
| 2664 | */ |
| 2665 | static unsigned int |
| 2666 | drm_intel_gem_estimate_batch_space(drm_intel_bo **bo_array, int count) |
| 2667 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2668 | int i; |
| 2669 | unsigned int total = 0; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2670 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2671 | for (i = 0; i < count; i++) { |
| 2672 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo_array[i]; |
| 2673 | if (bo_gem != NULL) |
| 2674 | total += bo_gem->reloc_tree_size; |
| 2675 | } |
| 2676 | return total; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2677 | } |
| 2678 | |
| 2679 | /** |
| 2680 | * Return the amount of aperture needed for a collection of buffers. |
| 2681 | * This avoids double counting any buffers, at the cost of looking |
| 2682 | * at every buffer in the set. |
| 2683 | */ |
| 2684 | static unsigned int |
| 2685 | drm_intel_gem_compute_batch_space(drm_intel_bo **bo_array, int count) |
| 2686 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2687 | int i; |
| 2688 | unsigned int total = 0; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2689 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2690 | for (i = 0; i < count; i++) { |
| 2691 | total += drm_intel_gem_bo_get_aperture_space(bo_array[i]); |
| 2692 | /* For the first buffer object in the array, we get an |
| 2693 | * accurate count back for its reloc_tree size (since nothing |
| 2694 | * had been flagged as being counted yet). We can save that |
| 2695 | * value out as a more conservative reloc_tree_size that |
| 2696 | * avoids double-counting target buffers. Since the first |
| 2697 | * buffer happens to usually be the batch buffer in our |
| 2698 | * callers, this can pull us back from doing the tree |
| 2699 | * walk on every new batch emit. |
| 2700 | */ |
| 2701 | if (i == 0) { |
| 2702 | drm_intel_bo_gem *bo_gem = |
| 2703 | (drm_intel_bo_gem *) bo_array[i]; |
| 2704 | bo_gem->reloc_tree_size = total; |
| 2705 | } |
Eric Anholt | 7ce8d4c | 2009-02-27 13:46:31 -0800 | [diff] [blame] | 2706 | } |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2707 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2708 | for (i = 0; i < count; i++) |
| 2709 | drm_intel_gem_bo_clear_aperture_space_flag(bo_array[i]); |
| 2710 | return total; |
Keith Packard | b13f4e1 | 2008-11-21 01:49:39 -0800 | [diff] [blame] | 2711 | } |
| 2712 | |
| 2713 | /** |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2714 | * Return -1 if the batchbuffer should be flushed before attempting to |
| 2715 | * emit rendering referencing the buffers pointed to by bo_array. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2716 | * |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2717 | * This is required because if we try to emit a batchbuffer with relocations |
| 2718 | * to a tree of buffers that won't simultaneously fit in the aperture, |
| 2719 | * the rendering will return an error at a point where the software is not |
| 2720 | * prepared to recover from it. |
| 2721 | * |
| 2722 | * However, we also want to emit the batchbuffer significantly before we reach |
| 2723 | * the limit, as a series of batchbuffers each of which references buffers |
| 2724 | * covering almost all of the aperture means that at each emit we end up |
| 2725 | * waiting to evict a buffer from the last rendering, and we get synchronous |
| 2726 | * performance. By emitting smaller batchbuffers, we eat some CPU overhead to |
| 2727 | * get better parallelism. |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2728 | */ |
| 2729 | static int |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 2730 | drm_intel_gem_check_aperture_space(drm_intel_bo **bo_array, int count) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2731 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2732 | drm_intel_bufmgr_gem *bufmgr_gem = |
| 2733 | (drm_intel_bufmgr_gem *) bo_array[0]->bufmgr; |
| 2734 | unsigned int total = 0; |
| 2735 | unsigned int threshold = bufmgr_gem->gtt_size * 3 / 4; |
| 2736 | int total_fences; |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2737 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2738 | /* Check for fence reg constraints if necessary */ |
| 2739 | if (bufmgr_gem->available_fences) { |
| 2740 | total_fences = drm_intel_gem_total_fences(bo_array, count); |
| 2741 | if (total_fences > bufmgr_gem->available_fences) |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 2742 | return -ENOSPC; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2743 | } |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2744 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2745 | total = drm_intel_gem_estimate_batch_space(bo_array, count); |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 2746 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2747 | if (total > threshold) |
| 2748 | total = drm_intel_gem_compute_batch_space(bo_array, count); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 2749 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2750 | if (total > threshold) { |
| 2751 | DBG("check_space: overflowed available aperture, " |
| 2752 | "%dkb vs %dkb\n", |
| 2753 | total / 1024, (int)bufmgr_gem->gtt_size / 1024); |
Chris Wilson | acb4aa6 | 2009-12-02 12:40:26 +0000 | [diff] [blame] | 2754 | return -ENOSPC; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2755 | } else { |
| 2756 | DBG("drm_check_space: total %dkb vs bufgr %dkb\n", total / 1024, |
| 2757 | (int)bufmgr_gem->gtt_size / 1024); |
| 2758 | return 0; |
| 2759 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 2760 | } |
| 2761 | |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 2762 | /* |
| 2763 | * Disable buffer reuse for objects which are shared with the kernel |
| 2764 | * as scanout buffers |
| 2765 | */ |
| 2766 | static int |
| 2767 | drm_intel_gem_bo_disable_reuse(drm_intel_bo *bo) |
| 2768 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2769 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 2770 | |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 2771 | bo_gem->reusable = false; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2772 | return 0; |
Keith Packard | 5b5ce30 | 2009-05-11 13:42:12 -0700 | [diff] [blame] | 2773 | } |
| 2774 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2775 | static int |
Chris Wilson | 07e7589 | 2010-05-11 08:54:06 +0100 | [diff] [blame] | 2776 | drm_intel_gem_bo_is_reusable(drm_intel_bo *bo) |
| 2777 | { |
| 2778 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2779 | |
| 2780 | return bo_gem->reusable; |
| 2781 | } |
| 2782 | |
| 2783 | static int |
Eric Anholt | 66d2714 | 2009-10-20 13:20:55 -0700 | [diff] [blame] | 2784 | _drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2785 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2786 | drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; |
| 2787 | int i; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2788 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2789 | for (i = 0; i < bo_gem->reloc_count; i++) { |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2790 | if (bo_gem->reloc_target_info[i].bo == target_bo) |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2791 | return 1; |
Eric Anholt | 4f7704a | 2010-06-10 08:58:08 -0700 | [diff] [blame] | 2792 | if (bo == bo_gem->reloc_target_info[i].bo) |
| 2793 | continue; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 2794 | if (_drm_intel_gem_bo_references(bo_gem->reloc_target_info[i].bo, |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 2795 | target_bo)) |
| 2796 | return 1; |
| 2797 | } |
| 2798 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2799 | return 0; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2800 | } |
| 2801 | |
Eric Anholt | 66d2714 | 2009-10-20 13:20:55 -0700 | [diff] [blame] | 2802 | /** Return true if target_bo is referenced by bo's relocation tree. */ |
| 2803 | static int |
| 2804 | drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo) |
| 2805 | { |
| 2806 | drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo; |
| 2807 | |
| 2808 | if (bo == NULL || target_bo == NULL) |
| 2809 | return 0; |
| 2810 | if (target_bo_gem->used_as_reloc_target) |
| 2811 | return _drm_intel_gem_bo_references(bo, target_bo); |
| 2812 | return 0; |
| 2813 | } |
| 2814 | |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 2815 | static void |
| 2816 | add_bucket(drm_intel_bufmgr_gem *bufmgr_gem, int size) |
| 2817 | { |
| 2818 | unsigned int i = bufmgr_gem->num_buckets; |
| 2819 | |
| 2820 | assert(i < ARRAY_SIZE(bufmgr_gem->cache_bucket)); |
| 2821 | |
| 2822 | DRMINITLISTHEAD(&bufmgr_gem->cache_bucket[i].head); |
| 2823 | bufmgr_gem->cache_bucket[i].size = size; |
| 2824 | bufmgr_gem->num_buckets++; |
| 2825 | } |
| 2826 | |
| 2827 | static void |
| 2828 | init_cache_buckets(drm_intel_bufmgr_gem *bufmgr_gem) |
| 2829 | { |
| 2830 | unsigned long size, cache_max_size = 64 * 1024 * 1024; |
| 2831 | |
| 2832 | /* OK, so power of two buckets was too wasteful of memory. |
| 2833 | * Give 3 other sizes between each power of two, to hopefully |
| 2834 | * cover things accurately enough. (The alternative is |
| 2835 | * probably to just go for exact matching of sizes, and assume |
| 2836 | * that for things like composited window resize the tiled |
| 2837 | * width/height alignment and rounding of sizes to pages will |
| 2838 | * get us useful cache hit rates anyway) |
| 2839 | */ |
| 2840 | add_bucket(bufmgr_gem, 4096); |
| 2841 | add_bucket(bufmgr_gem, 4096 * 2); |
| 2842 | add_bucket(bufmgr_gem, 4096 * 3); |
| 2843 | |
| 2844 | /* Initialize the linked lists for BO reuse cache. */ |
| 2845 | for (size = 4 * 4096; size <= cache_max_size; size *= 2) { |
| 2846 | add_bucket(bufmgr_gem, size); |
| 2847 | |
| 2848 | add_bucket(bufmgr_gem, size + size * 1 / 4); |
| 2849 | add_bucket(bufmgr_gem, size + size * 2 / 4); |
| 2850 | add_bucket(bufmgr_gem, size + size * 3 / 4); |
| 2851 | } |
| 2852 | } |
| 2853 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2854 | void |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 2855 | drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr, int limit) |
| 2856 | { |
| 2857 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 2858 | |
| 2859 | bufmgr_gem->vma_max = limit; |
| 2860 | |
| 2861 | drm_intel_gem_bo_purge_vma_cache(bufmgr_gem); |
| 2862 | } |
| 2863 | |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 2864 | /** |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2865 | * Get the PCI ID for the device. This can be overridden by setting the |
| 2866 | * INTEL_DEVID_OVERRIDE environment variable to the desired ID. |
| 2867 | */ |
| 2868 | static int |
| 2869 | get_pci_device_id(drm_intel_bufmgr_gem *bufmgr_gem) |
| 2870 | { |
| 2871 | char *devid_override; |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2872 | int devid = 0; |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2873 | int ret; |
| 2874 | drm_i915_getparam_t gp; |
| 2875 | |
| 2876 | if (geteuid() == getuid()) { |
| 2877 | devid_override = getenv("INTEL_DEVID_OVERRIDE"); |
| 2878 | if (devid_override) { |
| 2879 | bufmgr_gem->no_exec = true; |
| 2880 | return strtod(devid_override, NULL); |
| 2881 | } |
| 2882 | } |
| 2883 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2884 | memclear(gp); |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2885 | gp.param = I915_PARAM_CHIPSET_ID; |
| 2886 | gp.value = &devid; |
| 2887 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 2888 | if (ret) { |
| 2889 | fprintf(stderr, "get chip id failed: %d [%d]\n", ret, errno); |
| 2890 | fprintf(stderr, "param: %d, val: %d\n", gp.param, *gp.value); |
| 2891 | } |
| 2892 | return devid; |
| 2893 | } |
| 2894 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2895 | int |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 2896 | drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr) |
| 2897 | { |
| 2898 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 2899 | |
| 2900 | return bufmgr_gem->pci_device; |
| 2901 | } |
| 2902 | |
| 2903 | /** |
Damien Lespiau | fbd106a | 2013-02-20 12:11:49 +0000 | [diff] [blame] | 2904 | * Sets the AUB filename. |
| 2905 | * |
| 2906 | * This function has to be called before drm_intel_bufmgr_gem_set_aub_dump() |
| 2907 | * for it to have any effect. |
| 2908 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2909 | void |
Damien Lespiau | fbd106a | 2013-02-20 12:11:49 +0000 | [diff] [blame] | 2910 | drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr, |
| 2911 | const char *filename) |
| 2912 | { |
Damien Lespiau | fbd106a | 2013-02-20 12:11:49 +0000 | [diff] [blame] | 2913 | } |
| 2914 | |
| 2915 | /** |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 2916 | * Sets up AUB dumping. |
| 2917 | * |
| 2918 | * This is a trace file format that can be used with the simulator. |
| 2919 | * Packets are emitted in a format somewhat like GPU command packets. |
| 2920 | * You can set up a GTT and upload your objects into the referenced |
| 2921 | * space, then send off batchbuffers and get BMPs out the other end. |
| 2922 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2923 | void |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 2924 | drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable) |
| 2925 | { |
Kristian Høgsberg Kristensen | cd2f91e | 2015-07-31 10:47:50 -0700 | [diff] [blame] | 2926 | fprintf(stderr, "libdrm aub dumping is deprecated.\n\n" |
| 2927 | "Use intel_aubdump from intel-gpu-tools instead. Install intel-gpu-tools,\n" |
| 2928 | "then run (for example)\n\n" |
| 2929 | "\t$ intel_aubdump --output=trace.aub glxgears -geometry 500x500\n\n" |
| 2930 | "See the intel_aubdump man page for more details.\n"); |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 2931 | } |
| 2932 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2933 | drm_intel_context * |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2934 | drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr) |
| 2935 | { |
| 2936 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 2937 | struct drm_i915_gem_context_create create; |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2938 | drm_intel_context *context = NULL; |
Damien Lespiau | c10b08d | 2012-07-26 17:50:09 +0100 | [diff] [blame] | 2939 | int ret; |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2940 | |
Ben Widawsky | 3d34fe2 | 2013-12-26 16:37:00 -0800 | [diff] [blame] | 2941 | context = calloc(1, sizeof(*context)); |
| 2942 | if (!context) |
| 2943 | return NULL; |
| 2944 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2945 | memclear(create); |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2946 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create); |
| 2947 | if (ret != 0) { |
Kenneth Graunke | 992e2af | 2012-07-12 13:41:11 -0700 | [diff] [blame] | 2948 | DBG("DRM_IOCTL_I915_GEM_CONTEXT_CREATE failed: %s\n", |
| 2949 | strerror(errno)); |
Ben Widawsky | 3d34fe2 | 2013-12-26 16:37:00 -0800 | [diff] [blame] | 2950 | free(context); |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2951 | return NULL; |
| 2952 | } |
| 2953 | |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2954 | context->ctx_id = create.ctx_id; |
| 2955 | context->bufmgr = bufmgr; |
| 2956 | |
| 2957 | return context; |
| 2958 | } |
| 2959 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2960 | void |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2961 | drm_intel_gem_context_destroy(drm_intel_context *ctx) |
| 2962 | { |
| 2963 | drm_intel_bufmgr_gem *bufmgr_gem; |
| 2964 | struct drm_i915_gem_context_destroy destroy; |
| 2965 | int ret; |
| 2966 | |
| 2967 | if (ctx == NULL) |
| 2968 | return; |
| 2969 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2970 | memclear(destroy); |
Kenneth Graunke | a9412fa | 2012-08-12 13:33:05 -0700 | [diff] [blame] | 2971 | |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 2972 | bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr; |
| 2973 | destroy.ctx_id = ctx->ctx_id; |
| 2974 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, |
| 2975 | &destroy); |
| 2976 | if (ret != 0) |
| 2977 | fprintf(stderr, "DRM_IOCTL_I915_GEM_CONTEXT_DESTROY failed: %s\n", |
| 2978 | strerror(errno)); |
| 2979 | |
| 2980 | free(ctx); |
| 2981 | } |
| 2982 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 2983 | int |
Ian Romanick | 5a41b02 | 2013-11-15 10:24:43 -0800 | [diff] [blame] | 2984 | drm_intel_get_reset_stats(drm_intel_context *ctx, |
| 2985 | uint32_t *reset_count, |
| 2986 | uint32_t *active, |
| 2987 | uint32_t *pending) |
| 2988 | { |
| 2989 | drm_intel_bufmgr_gem *bufmgr_gem; |
| 2990 | struct drm_i915_reset_stats stats; |
| 2991 | int ret; |
| 2992 | |
| 2993 | if (ctx == NULL) |
| 2994 | return -EINVAL; |
| 2995 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 2996 | memclear(stats); |
Ian Romanick | 5a41b02 | 2013-11-15 10:24:43 -0800 | [diff] [blame] | 2997 | |
| 2998 | bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr; |
| 2999 | stats.ctx_id = ctx->ctx_id; |
| 3000 | ret = drmIoctl(bufmgr_gem->fd, |
| 3001 | DRM_IOCTL_I915_GET_RESET_STATS, |
| 3002 | &stats); |
| 3003 | if (ret == 0) { |
| 3004 | if (reset_count != NULL) |
| 3005 | *reset_count = stats.reset_count; |
| 3006 | |
| 3007 | if (active != NULL) |
| 3008 | *active = stats.batch_active; |
| 3009 | |
| 3010 | if (pending != NULL) |
| 3011 | *pending = stats.batch_pending; |
| 3012 | } |
| 3013 | |
| 3014 | return ret; |
| 3015 | } |
| 3016 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 3017 | int |
Eric Anholt | 2607dad | 2012-08-01 16:43:16 -0700 | [diff] [blame] | 3018 | drm_intel_reg_read(drm_intel_bufmgr *bufmgr, |
| 3019 | uint32_t offset, |
| 3020 | uint64_t *result) |
| 3021 | { |
| 3022 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 3023 | struct drm_i915_reg_read reg_read; |
| 3024 | int ret; |
| 3025 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 3026 | memclear(reg_read); |
Eric Anholt | 2607dad | 2012-08-01 16:43:16 -0700 | [diff] [blame] | 3027 | reg_read.offset = offset; |
| 3028 | |
| 3029 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_REG_READ, ®_read); |
| 3030 | |
| 3031 | *result = reg_read.val; |
| 3032 | return ret; |
| 3033 | } |
| 3034 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 3035 | int |
Jeff McGee | d556e06 | 2015-03-09 16:13:03 -0700 | [diff] [blame] | 3036 | drm_intel_get_subslice_total(int fd, unsigned int *subslice_total) |
| 3037 | { |
| 3038 | drm_i915_getparam_t gp; |
| 3039 | int ret; |
| 3040 | |
| 3041 | memclear(gp); |
| 3042 | gp.value = (int*)subslice_total; |
| 3043 | gp.param = I915_PARAM_SUBSLICE_TOTAL; |
| 3044 | ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3045 | if (ret) |
| 3046 | return -errno; |
| 3047 | |
| 3048 | return 0; |
| 3049 | } |
| 3050 | |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 3051 | int |
Jeff McGee | d556e06 | 2015-03-09 16:13:03 -0700 | [diff] [blame] | 3052 | drm_intel_get_eu_total(int fd, unsigned int *eu_total) |
| 3053 | { |
| 3054 | drm_i915_getparam_t gp; |
| 3055 | int ret; |
| 3056 | |
| 3057 | memclear(gp); |
| 3058 | gp.value = (int*)eu_total; |
| 3059 | gp.param = I915_PARAM_EU_TOTAL; |
| 3060 | ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3061 | if (ret) |
| 3062 | return -errno; |
| 3063 | |
| 3064 | return 0; |
| 3065 | } |
Ben Widawsky | f7210fa | 2012-01-13 11:31:52 -0800 | [diff] [blame] | 3066 | |
Eric Anholt | 4db16a9 | 2011-10-11 15:59:03 -0700 | [diff] [blame] | 3067 | /** |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 3068 | * Annotate the given bo for use in aub dumping. |
| 3069 | * |
| 3070 | * \param annotations is an array of drm_intel_aub_annotation objects |
| 3071 | * describing the type of data in various sections of the bo. Each |
| 3072 | * element of the array specifies the type and subtype of a section of |
| 3073 | * the bo, and the past-the-end offset of that section. The elements |
| 3074 | * of \c annotations must be sorted so that ending_offset is |
| 3075 | * increasing. |
| 3076 | * |
| 3077 | * \param count is the number of elements in the \c annotations array. |
| 3078 | * If \c count is zero, then \c annotations will not be dereferenced. |
| 3079 | * |
| 3080 | * Annotations are copied into a private data structure, so caller may |
| 3081 | * re-use the memory pointed to by \c annotations after the call |
| 3082 | * returns. |
| 3083 | * |
| 3084 | * Annotations are stored for the lifetime of the bo; to reset to the |
| 3085 | * default state (no annotations), call this function with a \c count |
| 3086 | * of zero. |
| 3087 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 3088 | void |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 3089 | drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo, |
| 3090 | drm_intel_aub_annotation *annotations, |
| 3091 | unsigned count) |
| 3092 | { |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 3093 | } |
| 3094 | |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3095 | static pthread_mutex_t bufmgr_list_mutex = PTHREAD_MUTEX_INITIALIZER; |
| 3096 | static drmMMListHead bufmgr_list = { &bufmgr_list, &bufmgr_list }; |
| 3097 | |
| 3098 | static drm_intel_bufmgr_gem * |
| 3099 | drm_intel_bufmgr_gem_find(int fd) |
| 3100 | { |
| 3101 | drm_intel_bufmgr_gem *bufmgr_gem; |
| 3102 | |
| 3103 | DRMLISTFOREACHENTRY(bufmgr_gem, &bufmgr_list, managers) { |
| 3104 | if (bufmgr_gem->fd == fd) { |
| 3105 | atomic_inc(&bufmgr_gem->refcount); |
| 3106 | return bufmgr_gem; |
| 3107 | } |
| 3108 | } |
| 3109 | |
| 3110 | return NULL; |
| 3111 | } |
| 3112 | |
| 3113 | static void |
| 3114 | drm_intel_bufmgr_gem_unref(drm_intel_bufmgr *bufmgr) |
| 3115 | { |
| 3116 | drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr; |
| 3117 | |
| 3118 | if (atomic_add_unless(&bufmgr_gem->refcount, -1, 1)) { |
| 3119 | pthread_mutex_lock(&bufmgr_list_mutex); |
| 3120 | |
| 3121 | if (atomic_dec_and_test(&bufmgr_gem->refcount)) { |
| 3122 | DRMLISTDEL(&bufmgr_gem->managers); |
| 3123 | drm_intel_bufmgr_gem_destroy(bufmgr); |
| 3124 | } |
| 3125 | |
| 3126 | pthread_mutex_unlock(&bufmgr_list_mutex); |
| 3127 | } |
| 3128 | } |
| 3129 | |
Paul Berry | da02f72 | 2012-05-04 12:41:00 -0700 | [diff] [blame] | 3130 | /** |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3131 | * Initializes the GEM buffer manager, which uses the kernel to allocate, map, |
| 3132 | * and manage map buffer objections. |
| 3133 | * |
| 3134 | * \param fd File descriptor of the opened DRM device. |
| 3135 | */ |
Emil Velikov | 0f8da82 | 2015-03-31 22:32:11 +0100 | [diff] [blame] | 3136 | drm_intel_bufmgr * |
Eric Anholt | 4b98264 | 2008-10-30 09:33:07 -0700 | [diff] [blame] | 3137 | drm_intel_bufmgr_gem_init(int fd, int batch_size) |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3138 | { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3139 | drm_intel_bufmgr_gem *bufmgr_gem; |
| 3140 | struct drm_i915_gem_get_aperture aperture; |
| 3141 | drm_i915_getparam_t gp; |
Daniel Vetter | 630dd26 | 2011-09-22 22:20:09 +0200 | [diff] [blame] | 3142 | int ret, tmp; |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 3143 | bool exec2 = false; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3144 | |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3145 | pthread_mutex_lock(&bufmgr_list_mutex); |
| 3146 | |
| 3147 | bufmgr_gem = drm_intel_bufmgr_gem_find(fd); |
| 3148 | if (bufmgr_gem) |
| 3149 | goto exit; |
| 3150 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3151 | bufmgr_gem = calloc(1, sizeof(*bufmgr_gem)); |
Dave Airlie | 973d8d6 | 2010-02-02 10:57:12 +1000 | [diff] [blame] | 3152 | if (bufmgr_gem == NULL) |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3153 | goto exit; |
Dave Airlie | 973d8d6 | 2010-02-02 10:57:12 +1000 | [diff] [blame] | 3154 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3155 | bufmgr_gem->fd = fd; |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3156 | atomic_set(&bufmgr_gem->refcount, 1); |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3157 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3158 | if (pthread_mutex_init(&bufmgr_gem->lock, NULL) != 0) { |
| 3159 | free(bufmgr_gem); |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3160 | bufmgr_gem = NULL; |
| 3161 | goto exit; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3162 | } |
Eric Anholt | 6df7b07 | 2008-06-12 23:22:26 -0700 | [diff] [blame] | 3163 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 3164 | memclear(aperture); |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 3165 | ret = drmIoctl(bufmgr_gem->fd, |
| 3166 | DRM_IOCTL_I915_GEM_GET_APERTURE, |
| 3167 | &aperture); |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 3168 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3169 | if (ret == 0) |
| 3170 | bufmgr_gem->gtt_size = aperture.aper_available_size; |
| 3171 | else { |
| 3172 | fprintf(stderr, "DRM_IOCTL_I915_GEM_APERTURE failed: %s\n", |
| 3173 | strerror(errno)); |
| 3174 | bufmgr_gem->gtt_size = 128 * 1024 * 1024; |
| 3175 | fprintf(stderr, "Assuming %dkB available aperture size.\n" |
| 3176 | "May lead to reduced performance or incorrect " |
| 3177 | "rendering.\n", |
| 3178 | (int)bufmgr_gem->gtt_size / 1024); |
| 3179 | } |
Eric Anholt | 0e86731 | 2008-10-21 00:10:54 -0700 | [diff] [blame] | 3180 | |
Kenneth Graunke | 6e642db | 2011-10-11 14:38:34 -0700 | [diff] [blame] | 3181 | bufmgr_gem->pci_device = get_pci_device_id(bufmgr_gem); |
Jesse Barnes | 2fa5f28 | 2009-01-23 14:13:45 -0800 | [diff] [blame] | 3182 | |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 3183 | if (IS_GEN2(bufmgr_gem->pci_device)) |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3184 | bufmgr_gem->gen = 2; |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 3185 | else if (IS_GEN3(bufmgr_gem->pci_device)) |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3186 | bufmgr_gem->gen = 3; |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 3187 | else if (IS_GEN4(bufmgr_gem->pci_device)) |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3188 | bufmgr_gem->gen = 4; |
Chad Versace | 592ac67 | 2012-01-27 10:02:16 -0800 | [diff] [blame] | 3189 | else if (IS_GEN5(bufmgr_gem->pci_device)) |
| 3190 | bufmgr_gem->gen = 5; |
| 3191 | else if (IS_GEN6(bufmgr_gem->pci_device)) |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3192 | bufmgr_gem->gen = 6; |
Chad Versace | 592ac67 | 2012-01-27 10:02:16 -0800 | [diff] [blame] | 3193 | else if (IS_GEN7(bufmgr_gem->pci_device)) |
Chris Wilson | 9a2b57d | 2012-07-25 16:28:59 +0100 | [diff] [blame] | 3194 | bufmgr_gem->gen = 7; |
Ben Widawsky | 5b348f3 | 2013-02-13 16:09:33 +0000 | [diff] [blame] | 3195 | else if (IS_GEN8(bufmgr_gem->pci_device)) |
| 3196 | bufmgr_gem->gen = 8; |
Damien Lespiau | f1e15d1 | 2013-02-13 16:09:37 +0000 | [diff] [blame] | 3197 | else if (IS_GEN9(bufmgr_gem->pci_device)) |
| 3198 | bufmgr_gem->gen = 9; |
Chris Wilson | 9a2b57d | 2012-07-25 16:28:59 +0100 | [diff] [blame] | 3199 | else { |
| 3200 | free(bufmgr_gem); |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3201 | bufmgr_gem = NULL; |
| 3202 | goto exit; |
Chris Wilson | 9a2b57d | 2012-07-25 16:28:59 +0100 | [diff] [blame] | 3203 | } |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3204 | |
Eric Anholt | 078bc5b | 2011-12-20 13:10:36 -0800 | [diff] [blame] | 3205 | if (IS_GEN3(bufmgr_gem->pci_device) && |
| 3206 | bufmgr_gem->gtt_size > 256*1024*1024) { |
Daniel Vetter | 36cff1c | 2011-12-04 12:51:45 +0100 | [diff] [blame] | 3207 | /* The unmappable part of gtt on gen 3 (i.e. above 256MB) can't |
| 3208 | * be used for tiled blits. To simplify the accounting, just |
| 3209 | * substract the unmappable part (fixed to 256MB on all known |
| 3210 | * gen3 devices) if the kernel advertises it. */ |
| 3211 | bufmgr_gem->gtt_size -= 256*1024*1024; |
| 3212 | } |
| 3213 | |
Daniel Vetter | eb7a5b6 | 2015-02-11 11:59:52 +0100 | [diff] [blame] | 3214 | memclear(gp); |
Daniel Vetter | 630dd26 | 2011-09-22 22:20:09 +0200 | [diff] [blame] | 3215 | gp.value = &tmp; |
| 3216 | |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3217 | gp.param = I915_PARAM_HAS_EXECBUF2; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 3218 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3219 | if (!ret) |
Eric Anholt | 2c2bdb3 | 2011-10-21 16:53:16 -0700 | [diff] [blame] | 3220 | exec2 = true; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3221 | |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 3222 | gp.param = I915_PARAM_HAS_BSD; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 3223 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
Chris Wilson | 057fab3 | 2010-10-26 11:35:11 +0100 | [diff] [blame] | 3224 | bufmgr_gem->has_bsd = ret == 0; |
| 3225 | |
| 3226 | gp.param = I915_PARAM_HAS_BLT; |
| 3227 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3228 | bufmgr_gem->has_blt = ret == 0; |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 3229 | |
Chris Wilson | 3624577 | 2010-10-29 10:49:54 +0100 | [diff] [blame] | 3230 | gp.param = I915_PARAM_HAS_RELAXED_FENCING; |
| 3231 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3232 | bufmgr_gem->has_relaxed_fencing = ret == 0; |
| 3233 | |
Chris Wilson | 32258e4 | 2014-11-04 14:26:49 +0000 | [diff] [blame] | 3234 | bufmgr_gem->bufmgr.bo_alloc_userptr = check_bo_alloc_userptr; |
Tvrtko Ursulin | ae8edc7 | 2014-06-19 15:52:03 +0100 | [diff] [blame] | 3235 | |
Ben Widawsky | 971c080 | 2012-06-05 11:30:48 -0700 | [diff] [blame] | 3236 | gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; |
| 3237 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3238 | bufmgr_gem->has_wait_timeout = ret == 0; |
| 3239 | |
Eugeni Dodonov | 151cdcf | 2012-01-17 15:20:19 -0200 | [diff] [blame] | 3240 | gp.param = I915_PARAM_HAS_LLC; |
| 3241 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
Eric Anholt | 3a88848 | 2012-02-27 17:26:05 -0800 | [diff] [blame] | 3242 | if (ret != 0) { |
Eugeni Dodonov | 151cdcf | 2012-01-17 15:20:19 -0200 | [diff] [blame] | 3243 | /* Kernel does not supports HAS_LLC query, fallback to GPU |
| 3244 | * generation detection and assume that we have LLC on GEN6/7 |
| 3245 | */ |
| 3246 | bufmgr_gem->has_llc = (IS_GEN6(bufmgr_gem->pci_device) | |
| 3247 | IS_GEN7(bufmgr_gem->pci_device)); |
| 3248 | } else |
Chris Wilson | 75830a0 | 2012-10-07 10:05:19 +0100 | [diff] [blame] | 3249 | bufmgr_gem->has_llc = *gp.value; |
Eugeni Dodonov | 151cdcf | 2012-01-17 15:20:19 -0200 | [diff] [blame] | 3250 | |
Xiang, Haihao | 0119999 | 2012-11-14 12:46:39 +0800 | [diff] [blame] | 3251 | gp.param = I915_PARAM_HAS_VEBOX; |
| 3252 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
| 3253 | bufmgr_gem->has_vebox = (ret == 0) & (*gp.value > 0); |
| 3254 | |
Eric Anholt | a1f9ea7 | 2010-03-02 08:49:36 -0800 | [diff] [blame] | 3255 | if (bufmgr_gem->gen < 4) { |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3256 | gp.param = I915_PARAM_NUM_FENCES_AVAIL; |
| 3257 | gp.value = &bufmgr_gem->available_fences; |
Chris Wilson | 6299722 | 2010-09-25 21:32:59 +0100 | [diff] [blame] | 3258 | ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3259 | if (ret) { |
| 3260 | fprintf(stderr, "get fences failed: %d [%d]\n", ret, |
| 3261 | errno); |
| 3262 | fprintf(stderr, "param: %d, val: %d\n", gp.param, |
| 3263 | *gp.value); |
| 3264 | bufmgr_gem->available_fences = 0; |
Chris Wilson | fdcde59 | 2010-02-09 08:32:54 +0000 | [diff] [blame] | 3265 | } else { |
| 3266 | /* XXX The kernel reports the total number of fences, |
| 3267 | * including any that may be pinned. |
| 3268 | * |
| 3269 | * We presume that there will be at least one pinned |
| 3270 | * fence for the scanout buffer, but there may be more |
| 3271 | * than one scanout and the user may be manually |
| 3272 | * pinning buffers. Let's move to execbuffer2 and |
| 3273 | * thereby forget the insanity of using fences... |
| 3274 | */ |
| 3275 | bufmgr_gem->available_fences -= 2; |
| 3276 | if (bufmgr_gem->available_fences < 0) |
| 3277 | bufmgr_gem->available_fences = 0; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3278 | } |
| 3279 | } |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3280 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3281 | /* Let's go with one relocation per every 2 dwords (but round down a bit |
| 3282 | * since a power of two will mean an extra page allocation for the reloc |
| 3283 | * buffer). |
| 3284 | * |
| 3285 | * Every 4 was too few for the blender benchmark. |
| 3286 | */ |
| 3287 | bufmgr_gem->max_relocs = batch_size / sizeof(uint32_t) / 2 - 2; |
Eric Anholt | 769b105 | 2009-10-01 19:09:26 -0700 | [diff] [blame] | 3288 | |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3289 | bufmgr_gem->bufmgr.bo_alloc = drm_intel_gem_bo_alloc; |
| 3290 | bufmgr_gem->bufmgr.bo_alloc_for_render = |
| 3291 | drm_intel_gem_bo_alloc_for_render; |
Jesse Barnes | 3a7dfcd | 2009-10-06 14:34:06 -0700 | [diff] [blame] | 3292 | bufmgr_gem->bufmgr.bo_alloc_tiled = drm_intel_gem_bo_alloc_tiled; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3293 | bufmgr_gem->bufmgr.bo_reference = drm_intel_gem_bo_reference; |
| 3294 | bufmgr_gem->bufmgr.bo_unreference = drm_intel_gem_bo_unreference; |
| 3295 | bufmgr_gem->bufmgr.bo_map = drm_intel_gem_bo_map; |
| 3296 | bufmgr_gem->bufmgr.bo_unmap = drm_intel_gem_bo_unmap; |
| 3297 | bufmgr_gem->bufmgr.bo_subdata = drm_intel_gem_bo_subdata; |
| 3298 | bufmgr_gem->bufmgr.bo_get_subdata = drm_intel_gem_bo_get_subdata; |
| 3299 | bufmgr_gem->bufmgr.bo_wait_rendering = drm_intel_gem_bo_wait_rendering; |
| 3300 | bufmgr_gem->bufmgr.bo_emit_reloc = drm_intel_gem_bo_emit_reloc; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3301 | bufmgr_gem->bufmgr.bo_emit_reloc_fence = drm_intel_gem_bo_emit_reloc_fence; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3302 | bufmgr_gem->bufmgr.bo_pin = drm_intel_gem_bo_pin; |
| 3303 | bufmgr_gem->bufmgr.bo_unpin = drm_intel_gem_bo_unpin; |
| 3304 | bufmgr_gem->bufmgr.bo_get_tiling = drm_intel_gem_bo_get_tiling; |
| 3305 | bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling; |
| 3306 | bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink; |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3307 | /* Use the new one if available */ |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 3308 | if (exec2) { |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3309 | bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2; |
Albert Damen | 49447a9 | 2010-11-07 15:54:32 +0100 | [diff] [blame] | 3310 | bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2; |
Zou Nan hai | 66375fd | 2010-06-02 10:07:37 +0800 | [diff] [blame] | 3311 | } else |
Jesse Barnes | b509640 | 2009-09-15 11:02:58 -0700 | [diff] [blame] | 3312 | bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3313 | bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy; |
Chris Wilson | 83a35b6 | 2009-11-11 13:04:38 +0000 | [diff] [blame] | 3314 | bufmgr_gem->bufmgr.bo_madvise = drm_intel_gem_bo_madvise; |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3315 | bufmgr_gem->bufmgr.destroy = drm_intel_bufmgr_gem_unref; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3316 | bufmgr_gem->bufmgr.debug = 0; |
| 3317 | bufmgr_gem->bufmgr.check_aperture_space = |
| 3318 | drm_intel_gem_check_aperture_space; |
| 3319 | bufmgr_gem->bufmgr.bo_disable_reuse = drm_intel_gem_bo_disable_reuse; |
Chris Wilson | 07e7589 | 2010-05-11 08:54:06 +0100 | [diff] [blame] | 3320 | bufmgr_gem->bufmgr.bo_is_reusable = drm_intel_gem_bo_is_reusable; |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3321 | bufmgr_gem->bufmgr.get_pipe_from_crtc_id = |
| 3322 | drm_intel_gem_get_pipe_from_crtc_id; |
| 3323 | bufmgr_gem->bufmgr.bo_references = drm_intel_gem_bo_references; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3324 | |
Chris Wilson | 36d4939 | 2011-02-14 09:39:06 +0000 | [diff] [blame] | 3325 | DRMINITLISTHEAD(&bufmgr_gem->named); |
Eric Anholt | 0ec768e | 2010-06-04 17:09:11 -0700 | [diff] [blame] | 3326 | init_cache_buckets(bufmgr_gem); |
Eric Anholt | d70d605 | 2009-10-06 12:40:42 -0700 | [diff] [blame] | 3327 | |
Chris Wilson | e4b60f2 | 2011-12-05 21:29:05 +0000 | [diff] [blame] | 3328 | DRMINITLISTHEAD(&bufmgr_gem->vma_cache); |
| 3329 | bufmgr_gem->vma_max = -1; /* unlimited by default */ |
| 3330 | |
Lionel Landwerlin | 743af59 | 2014-09-12 13:48:36 +0100 | [diff] [blame] | 3331 | DRMLISTADD(&bufmgr_gem->managers, &bufmgr_list); |
| 3332 | |
| 3333 | exit: |
| 3334 | pthread_mutex_unlock(&bufmgr_list_mutex); |
| 3335 | |
| 3336 | return bufmgr_gem != NULL ? &bufmgr_gem->bufmgr : NULL; |
Eric Anholt | 6a9eb08 | 2008-06-03 09:27:37 -0700 | [diff] [blame] | 3337 | } |