blob: 7282437a4fd4edfc7b8430e8c0e85494e0d88fc1 [file] [log] [blame]
JB Tsai0c16a0f2015-03-19 14:30:31 +08001/*
2 * Copyright 2015 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_MEDIATEK
JB Tsai0c16a0f2015-03-19 14:30:31 +08008
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -08009// clang-format off
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -070010#include <errno.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010011#include <fcntl.h>
Nicolas Boichatd7c83382019-08-29 21:46:29 +080012#include <inttypes.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010013#include <poll.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070014#include <stdio.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080015#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070016#include <sys/mman.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010017#include <unistd.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080018#include <xf86drm.h>
19#include <mediatek_drm.h>
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080020// clang-format on
Gurchetan Singhef920532016-08-12 16:38:25 -070021
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070022#include "drv_priv.h"
JB Tsai0c16a0f2015-03-19 14:30:31 +080023#include "helpers.h"
Gurchetan Singh179687e2016-10-28 10:07:35 -070024#include "util.h"
25
Miguel Casasdea0ccb2018-07-02 09:40:25 -040026#define TILE_TYPE_LINEAR 0
27
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070028struct mediatek_private_map_data {
29 void *cached_addr;
30 void *gem_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +010031 int prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070032};
33
Gurchetan Singh767c5382018-05-05 00:42:12 +000034static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070035 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
36 DRM_FORMAT_XRGB8888 };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070037
Nick Fan01c40142018-10-08 11:53:26 +080038#ifdef MTK_MT8183
Gurchetan Singhdc9b1202019-06-04 16:53:54 -070039static const uint32_t texture_source_formats[] = { DRM_FORMAT_NV21, DRM_FORMAT_NV12,
40 DRM_FORMAT_YUYV, DRM_FORMAT_YVU420,
41 DRM_FORMAT_YVU420_ANDROID };
Nick Fan01c40142018-10-08 11:53:26 +080042#else
Gurchetan Singhdc9b1202019-06-04 16:53:54 -070043static const uint32_t texture_source_formats[] = { DRM_FORMAT_YVU420, DRM_FORMAT_YVU420_ANDROID,
44 DRM_FORMAT_NV12 };
Nick Fan01c40142018-10-08 11:53:26 +080045#endif
Gurchetan Singh179687e2016-10-28 10:07:35 -070046
47static int mediatek_init(struct driver *drv)
48{
Miguel Casasdea0ccb2018-07-02 09:40:25 -040049 struct format_metadata metadata;
50
Gurchetan Singhd3001452017-11-03 17:18:36 -070051 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
52 &LINEAR_METADATA, BO_USE_RENDER_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070053
Gurchetan Singhd3001452017-11-03 17:18:36 -070054 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
55 &LINEAR_METADATA, BO_USE_TEXTURE_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070056
Gurchetan Singhdc9b1202019-06-04 16:53:54 -070057 drv_add_combination(drv, DRM_FORMAT_R8, &metadata, BO_USE_SW_MASK | BO_USE_LINEAR);
Hirokazu Honda3b8d4d02019-07-31 16:35:52 +090058 /*
59 * Chrome uses DMA-buf mmap to write to YV12 buffers, which are then accessed by the
60 * Video Encoder Accelerator (VEA). It could also support NV12 potentially in the future.
61 */
62 drv_modify_combination(drv, DRM_FORMAT_YVU420, &LINEAR_METADATA, BO_USE_HW_VIDEO_ENCODER);
63 drv_modify_combination(drv, DRM_FORMAT_NV12, &LINEAR_METADATA, BO_USE_HW_VIDEO_ENCODER);
64
Gurchetan Singh71bc6652018-09-17 17:42:05 -070065 /* Android CTS tests require this. */
66 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
67
Miguel Casasdea0ccb2018-07-02 09:40:25 -040068 /* Support BO_USE_HW_VIDEO_DECODER for protected content minigbm allocations. */
69 metadata.tiling = TILE_TYPE_LINEAR;
70 metadata.priority = 1;
71 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
72 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_DECODER);
73 drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata, BO_USE_HW_VIDEO_DECODER);
Hirokazu Honda0f0ce6f2019-07-24 19:40:20 +090074 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_DECODER);
Miguel Casasdea0ccb2018-07-02 09:40:25 -040075
Nick Fan01c40142018-10-08 11:53:26 +080076#ifdef MTK_MT8183
77 /* Only for MT8183 Camera subsystem */
78 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
79 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
80 drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata,
81 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
82 drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata,
83 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
84 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata,
85 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
86 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
Gurchetan Singh39490e92019-05-28 17:49:09 -070087 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
Nick Fan01c40142018-10-08 11:53:26 +080088#endif
89
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070090 return drv_modify_linear_combinations(drv);
Gurchetan Singh179687e2016-10-28 10:07:35 -070091}
JB Tsai0c16a0f2015-03-19 14:30:31 +080092
Fritz Koenig1b9b5b92019-03-19 13:25:45 -070093static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
94 uint32_t format, const uint64_t *modifiers,
95 uint32_t count)
JB Tsai0c16a0f2015-03-19 14:30:31 +080096{
JB Tsai0c16a0f2015-03-19 14:30:31 +080097 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -070098 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -070099 uint32_t stride;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700100 struct drm_mtk_gem_create gem_create;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800101
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700102 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
103 errno = EINVAL;
104 drv_log("no usable modifier found\n");
105 return -EINVAL;
106 }
107
Gurchetan Singh6ea14ba2017-02-08 15:09:13 -0800108 /*
109 * Since the ARM L1 cache line size is 64 bytes, align to that as a
110 * performance optimization.
111 */
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700112 stride = drv_stride_from_format(format, width, 0);
113 stride = ALIGN(stride, 64);
114 drv_bo_from_format(bo, stride, height, format);
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500115
JB Tsai0c16a0f2015-03-19 14:30:31 +0800116 memset(&gem_create, 0, sizeof(gem_create));
Gurchetan Singha40ca9e2016-08-29 19:51:45 -0700117 gem_create.size = bo->total_size;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800118
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700119 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700120 if (ret) {
Nicolas Boichatd7c83382019-08-29 21:46:29 +0800121 drv_log("DRM_IOCTL_MTK_GEM_CREATE failed (size=%" PRIu64 ")\n", gem_create.size);
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700122 return -errno;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700123 }
JB Tsai0c16a0f2015-03-19 14:30:31 +0800124
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700125 for (plane = 0; plane < bo->num_planes; plane++)
126 bo->handles[plane].u32 = gem_create.handle;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800127
128 return 0;
129}
130
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700131static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
132 uint64_t use_flags)
133{
134 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
135 return mediatek_bo_create_with_modifiers(bo, width, height, format, modifiers,
136 ARRAY_SIZE(modifiers));
137}
138
Gurchetan Singhee43c302017-11-14 18:20:27 -0800139static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Gurchetan Singhef920532016-08-12 16:38:25 -0700140{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100141 int ret, prime_fd;
Gurchetan Singhef920532016-08-12 16:38:25 -0700142 struct drm_mtk_gem_map_off gem_map;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700143 struct mediatek_private_map_data *priv;
Gurchetan Singhef920532016-08-12 16:38:25 -0700144
145 memset(&gem_map, 0, sizeof(gem_map));
146 gem_map.handle = bo->handles[0].u32;
147
148 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
149 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700150 drv_log("DRM_IOCTL_MTK_GEM_MAP_OFFSET failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700151 return MAP_FAILED;
152 }
153
Luigi Santivetti500928f2018-08-28 10:09:20 +0100154 ret = drmPrimeHandleToFD(bo->drv->fd, gem_map.handle, DRM_CLOEXEC, &prime_fd);
155 if (ret) {
156 drv_log("Failed to get a prime fd\n");
157 return MAP_FAILED;
158 }
159
Gurchetan Singhcfb88762017-09-28 17:14:50 -0700160 void *addr = mmap(0, bo->total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
161 gem_map.offset);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700162
Gurchetan Singhee43c302017-11-14 18:20:27 -0800163 vma->length = bo->total_size;
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700164
Luigi Santivetti500928f2018-08-28 10:09:20 +0100165 priv = calloc(1, sizeof(*priv));
166 priv->prime_fd = prime_fd;
167 vma->priv = priv;
168
Gurchetan Singha1892b22017-09-28 16:40:52 -0700169 if (bo->use_flags & BO_USE_RENDERSCRIPT) {
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700170 priv->cached_addr = calloc(1, bo->total_size);
171 priv->gem_addr = addr;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700172 addr = priv->cached_addr;
173 }
174
175 return addr;
176}
177
Gurchetan Singhee43c302017-11-14 18:20:27 -0800178static int mediatek_bo_unmap(struct bo *bo, struct vma *vma)
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700179{
Gurchetan Singhee43c302017-11-14 18:20:27 -0800180 if (vma->priv) {
181 struct mediatek_private_map_data *priv = vma->priv;
Luigi Santivettia72f4422018-09-12 16:28:21 +0100182
183 if (priv->cached_addr) {
184 vma->addr = priv->gem_addr;
185 free(priv->cached_addr);
186 }
187
Luigi Santivetti500928f2018-08-28 10:09:20 +0100188 close(priv->prime_fd);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700189 free(priv);
Gurchetan Singhee43c302017-11-14 18:20:27 -0800190 vma->priv = NULL;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700191 }
192
Gurchetan Singhee43c302017-11-14 18:20:27 -0800193 return munmap(vma->addr, vma->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700194}
195
Gurchetan Singhef262d82017-11-28 16:56:17 -0800196static int mediatek_bo_invalidate(struct bo *bo, struct mapping *mapping)
197{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100198 struct mediatek_private_map_data *priv = mapping->vma->priv;
199
200 if (priv) {
201 struct pollfd fds = {
202 .fd = priv->prime_fd,
203 };
204
205 if (mapping->vma->map_flags & BO_MAP_WRITE)
206 fds.events |= POLLOUT;
207
208 if (mapping->vma->map_flags & BO_MAP_READ)
209 fds.events |= POLLIN;
210
211 poll(&fds, 1, -1);
212 if (fds.revents != fds.events)
213 drv_log("poll prime_fd failed\n");
214
215 if (priv->cached_addr)
216 memcpy(priv->cached_addr, priv->gem_addr, bo->total_size);
Gurchetan Singhef262d82017-11-28 16:56:17 -0800217 }
218
219 return 0;
220}
221
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700222static int mediatek_bo_flush(struct bo *bo, struct mapping *mapping)
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700223{
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700224 struct mediatek_private_map_data *priv = mapping->vma->priv;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100225 if (priv && priv->cached_addr && (mapping->vma->map_flags & BO_MAP_WRITE))
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700226 memcpy(priv->gem_addr, priv->cached_addr, bo->total_size);
227
228 return 0;
229}
230
Gurchetan Singh0d44d482019-06-04 19:39:51 -0700231static uint32_t mediatek_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700232{
233 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800234 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Nick Fan01c40142018-10-08 11:53:26 +0800235#ifdef MTK_MT8183
236 /* Only for MT8183 Camera subsystem requires NV12. */
237 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
238 return DRM_FORMAT_NV12;
239#endif
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700240 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800241 return DRM_FORMAT_XBGR8888;
242 case DRM_FORMAT_FLEX_YCbCr_420_888:
Nick Fan01c40142018-10-08 11:53:26 +0800243#ifdef MTK_MT8183
244 /* Only for MT8183 Camera subsystem requires NV12 */
245 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
Gurchetan Singh39490e92019-05-28 17:49:09 -0700246 return DRM_FORMAT_NV12;
Nick Fan01c40142018-10-08 11:53:26 +0800247#endif
Hirokazu Honda3d856022019-08-23 14:31:31 +0900248 return DRM_FORMAT_YVU420;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700249 default:
250 return format;
251 }
252}
253
Gurchetan Singh3e9d3832017-10-31 10:36:25 -0700254const struct backend backend_mediatek = {
JB Tsai0c16a0f2015-03-19 14:30:31 +0800255 .name = "mediatek",
Gurchetan Singh179687e2016-10-28 10:07:35 -0700256 .init = mediatek_init,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700257 .bo_create = mediatek_bo_create,
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700258 .bo_create_with_modifiers = mediatek_bo_create_with_modifiers,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700259 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singh71611d62017-01-03 16:49:56 -0800260 .bo_import = drv_prime_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700261 .bo_map = mediatek_bo_map,
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700262 .bo_unmap = mediatek_bo_unmap,
Gurchetan Singhef262d82017-11-28 16:56:17 -0800263 .bo_invalidate = mediatek_bo_invalidate,
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700264 .bo_flush = mediatek_bo_flush,
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700265 .resolve_format = mediatek_resolve_format,
JB Tsai0c16a0f2015-03-19 14:30:31 +0800266};
267
268#endif