blob: c3100066307a1e9615d1780f1d7424d192f89962 [file] [log] [blame]
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07001/*
2 * Copyright 2016 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Roman Stratiienko142dd9c2020-12-14 17:34:09 +02007#include "../../helpers.h"
Gurchetan Singhbc4f0232019-06-27 20:05:54 -07008#include "../../util.h"
Gurchetan Singhd6b8b032017-05-31 14:31:31 -07009#include "../cros_gralloc_driver.h"
10
Tomasz Mikolajewskica2938a2017-11-17 20:30:56 +090011#include <cassert>
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070012#include <hardware/gralloc.h>
13#include <memory.h>
14
15struct gralloc0_module {
16 gralloc_module_t base;
17 std::unique_ptr<alloc_device_t> alloc;
Yiwei Zhang61f97522021-07-01 20:43:04 +000018 cros_gralloc_driver *driver;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -070019 bool initialized;
20 std::mutex initialization_mutex;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070021};
22
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070023struct cros_gralloc0_buffer_info {
24 uint32_t drm_fourcc;
25 int num_fds;
26 int fds[4];
27 uint64_t modifier;
28 uint32_t offset[4];
29 uint32_t stride[4];
30};
31
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070032/* This enumeration must match the one in <gralloc_drm.h>.
33 * The functions supported by this gralloc's temporary private API are listed
34 * below. Use of these functions is highly discouraged and should only be
35 * reserved for cases where no alternative to get same information (such as
36 * querying ANativeWindow) exists.
37 */
38// clang-format off
39enum {
40 GRALLOC_DRM_GET_STRIDE,
41 GRALLOC_DRM_GET_FORMAT,
42 GRALLOC_DRM_GET_DIMENSIONS,
43 GRALLOC_DRM_GET_BACKING_STORE,
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -070044 GRALLOC_DRM_GET_BUFFER_INFO,
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +000045 GRALLOC_DRM_GET_USAGE,
46};
47
48/* This enumeration corresponds to the GRALLOC_DRM_GET_USAGE query op, which
49 * defines a set of bit flags used by the client to query vendor usage bits.
50 *
51 * Here is the common flow:
52 * 1) EGL/Vulkan calls GRALLOC_DRM_GET_USAGE to append one or multiple vendor
53 * usage bits to the existing usage and sets onto the ANativeWindow.
54 * 2) Some implicit GL draw cmd or the explicit vkCreateSwapchainKHR kicks off
55 * the next dequeueBuffer on the ANativeWindow with the combined usage.
56 * 3) dequeueBuffer then asks gralloc hal for an allocation/re-allocation, and
57 * calls into the below `gralloc0_alloc(...)` api.
58 */
59enum {
60 GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT = 0x00000001,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070061};
62// clang-format on
63
Gurchetan Singhf7f633a2017-09-28 17:02:12 -070064static uint32_t gralloc0_convert_map_usage(int map_usage)
65{
66 uint32_t map_flags = BO_MAP_NONE;
67
68 if (map_usage & GRALLOC_USAGE_SW_READ_MASK)
69 map_flags |= BO_MAP_READ;
70 if (map_usage & GRALLOC_USAGE_SW_WRITE_MASK)
71 map_flags |= BO_MAP_WRITE;
72
73 return map_flags;
74}
75
Hirokazu Honda758cf122019-12-03 11:01:59 +090076static int gralloc0_droid_yuv_format(int droid_format)
77{
78
79 return (droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888 ||
80 droid_format == HAL_PIXEL_FORMAT_YV12);
81}
82
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070083static int gralloc0_alloc(alloc_device_t *dev, int w, int h, int format, int usage,
84 buffer_handle_t *handle, int *stride)
85{
86 int32_t ret;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070087 struct cros_gralloc_buffer_descriptor descriptor;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -070088 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070089
90 descriptor.width = w;
91 descriptor.height = h;
92 descriptor.droid_format = format;
Jason Macnak1de7f662020-01-24 15:05:57 -080093 descriptor.droid_usage = usage;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070094 descriptor.drm_format = cros_gralloc_convert_format(format);
Yiwei Zhang6b894b12021-09-16 22:28:22 +000095 descriptor.use_flags = cros_gralloc_convert_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -080096 descriptor.reserved_region_size = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -070097
Yiwei Zhangdfe5ac62021-09-16 22:08:27 +000098 if (!mod->driver->is_supported(&descriptor)) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -070099 drv_log("Unsupported combination -- HAL format: %u, HAL usage: %u, "
100 "drv_format: %4.4s, use_flags: %llu\n",
101 format, usage, reinterpret_cast<char *>(&descriptor.drm_format),
102 static_cast<unsigned long long>(descriptor.use_flags));
Tomasz Figa90bb7432017-07-21 17:54:05 +0900103 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700104 }
105
106 ret = mod->driver->allocate(&descriptor, handle);
107 if (ret)
108 return ret;
109
110 auto hnd = cros_gralloc_convert_handle(*handle);
111 *stride = hnd->pixel_stride;
112
Tomasz Figa90bb7432017-07-21 17:54:05 +0900113 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700114}
115
116static int gralloc0_free(alloc_device_t *dev, buffer_handle_t handle)
117{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700118 auto mod = (struct gralloc0_module const *)dev->common.module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700119 return mod->driver->release(handle);
120}
121
122static int gralloc0_close(struct hw_device_t *dev)
123{
124 /* Memory is freed by managed pointers on process close. */
Tomasz Figa90bb7432017-07-21 17:54:05 +0900125 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700126}
127
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700128static int gralloc0_init(struct gralloc0_module *mod, bool initialize_alloc)
129{
130 std::lock_guard<std::mutex> lock(mod->initialization_mutex);
131
132 if (mod->initialized)
133 return 0;
134
Yiwei Zhang61f97522021-07-01 20:43:04 +0000135 mod->driver = cros_gralloc_driver::get_instance();
136 if (!mod->driver)
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700137 return -ENODEV;
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700138
139 if (initialize_alloc) {
140 mod->alloc = std::make_unique<alloc_device_t>();
141 mod->alloc->alloc = gralloc0_alloc;
142 mod->alloc->free = gralloc0_free;
143 mod->alloc->common.tag = HARDWARE_DEVICE_TAG;
144 mod->alloc->common.version = 0;
145 mod->alloc->common.module = (hw_module_t *)mod;
146 mod->alloc->common.close = gralloc0_close;
147 }
148
149 mod->initialized = true;
150 return 0;
151}
152
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700153static int gralloc0_open(const struct hw_module_t *mod, const char *name, struct hw_device_t **dev)
154{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700155 auto const_module = reinterpret_cast<const struct gralloc0_module *>(mod);
156 auto module = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700157
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700158 if (module->initialized) {
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700159 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900160 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700161 }
162
163 if (strcmp(name, GRALLOC_HARDWARE_GPU0)) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700164 drv_log("Incorrect device name - %s.\n", name);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900165 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700166 }
167
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700168 if (gralloc0_init(module, true))
169 return -ENODEV;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700170
171 *dev = &module->alloc->common;
Tomasz Figa90bb7432017-07-21 17:54:05 +0900172 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700173}
174
175static int gralloc0_register_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
176{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700177 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
178 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700179
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000180 if (!mod->initialized) {
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700181 if (gralloc0_init(mod, false))
182 return -ENODEV;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000183 }
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700184
185 return mod->driver->retain(handle);
186}
187
188static int gralloc0_unregister_buffer(struct gralloc_module_t const *module, buffer_handle_t handle)
189{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700190 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700191 return mod->driver->release(handle);
192}
193
194static int gralloc0_lock(struct gralloc_module_t const *module, buffer_handle_t handle, int usage,
195 int l, int t, int w, int h, void **vaddr)
196{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700197 return module->lockAsync(module, handle, usage, l, t, w, h, vaddr, -1);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700198}
199
200static int gralloc0_unlock(struct gralloc_module_t const *module, buffer_handle_t handle)
201{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700202 int32_t fence_fd, ret;
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700203 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700204 ret = mod->driver->unlock(handle, &fence_fd);
205 if (ret)
206 return ret;
207
Jason Macnak1de7f662020-01-24 15:05:57 -0800208 ret = cros_gralloc_sync_wait(fence_fd, /*close_acquire_fence=*/true);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700209 if (ret)
210 return ret;
211
212 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700213}
214
215static int gralloc0_perform(struct gralloc_module_t const *module, int op, ...)
216{
217 va_list args;
218 int32_t *out_format, ret;
219 uint64_t *out_store;
220 buffer_handle_t handle;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000221 cros_gralloc_handle_t hnd;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700222 uint32_t *out_width, *out_height, *out_stride;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700223 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
224 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000225 uint64_t format_modifier = 0;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700226 struct cros_gralloc0_buffer_info *info;
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000227 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
228 auto mod = const_cast<struct gralloc0_module *>(const_module);
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000229 uint32_t req_usage;
230 uint32_t gralloc_usage = 0;
231 uint32_t *out_gralloc_usage;
232
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000233 if (!mod->initialized) {
234 if (gralloc0_init(mod, false))
235 return -ENODEV;
236 }
237
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000238 va_start(args, op);
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700239
240 switch (op) {
241 case GRALLOC_DRM_GET_STRIDE:
242 case GRALLOC_DRM_GET_FORMAT:
243 case GRALLOC_DRM_GET_DIMENSIONS:
244 case GRALLOC_DRM_GET_BACKING_STORE:
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700245 case GRALLOC_DRM_GET_BUFFER_INFO:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000246 /* retrieve handles for ops with buffer_handle_t */
247 handle = va_arg(args, buffer_handle_t);
248 hnd = cros_gralloc_convert_handle(handle);
249 if (!hnd) {
250 va_end(args);
251 drv_log("Invalid handle.\n");
252 return -EINVAL;
253 }
254 break;
255 case GRALLOC_DRM_GET_USAGE:
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700256 break;
257 default:
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000258 va_end(args);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900259 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700260 }
261
Tomasz Figa90bb7432017-07-21 17:54:05 +0900262 ret = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700263 switch (op) {
264 case GRALLOC_DRM_GET_STRIDE:
265 out_stride = va_arg(args, uint32_t *);
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000266 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700267 if (ret)
268 break;
269
270 if (strides[0] != hnd->strides[0]) {
271 uint32_t bytes_per_pixel = drv_bytes_per_pixel_from_format(hnd->format, 0);
272 *out_stride = DIV_ROUND_UP(strides[0], bytes_per_pixel);
273 } else {
274 *out_stride = hnd->pixel_stride;
275 }
276
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700277 break;
278 case GRALLOC_DRM_GET_FORMAT:
279 out_format = va_arg(args, int32_t *);
280 *out_format = hnd->droid_format;
281 break;
282 case GRALLOC_DRM_GET_DIMENSIONS:
283 out_width = va_arg(args, uint32_t *);
284 out_height = va_arg(args, uint32_t *);
285 *out_width = hnd->width;
286 *out_height = hnd->height;
287 break;
288 case GRALLOC_DRM_GET_BACKING_STORE:
289 out_store = va_arg(args, uint64_t *);
290 ret = mod->driver->get_backing_store(handle, out_store);
291 break;
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700292 case GRALLOC_DRM_GET_BUFFER_INFO:
293 info = va_arg(args, struct cros_gralloc0_buffer_info *);
Yiwei Zhang5a031c62021-06-04 07:17:14 +0000294 memset(info, 0, sizeof(*info));
Roman Stratiienko142dd9c2020-12-14 17:34:09 +0200295 info->drm_fourcc = drv_get_standard_fourcc(hnd->format);
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700296 info->num_fds = hnd->num_planes;
Yiwei Zhangf58616e2021-08-26 05:54:15 +0000297 for (uint32_t i = 0; i < info->num_fds; i++)
298 info->fds[i] = hnd->fds[i];
299
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000300 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
301 if (ret)
302 break;
303
304 info->modifier = format_modifier ? format_modifier : hnd->format_modifier;
Yiwei Zhangf58616e2021-08-26 05:54:15 +0000305 for (uint32_t i = 0; i < DRV_MAX_PLANES; i++) {
306 if (!strides[i])
307 break;
308
309 info->stride[i] = strides[i];
310 info->offset[i] = offsets[i];
Kristian H. Kristensenff5ffe62020-08-12 15:16:33 -0700311 }
Kristian H. Kristensene77c32c2020-07-23 16:04:47 -0700312 break;
Yiwei Zhangcd6e63c2021-05-14 00:33:45 +0000313 case GRALLOC_DRM_GET_USAGE:
314 req_usage = va_arg(args, uint32_t);
315 out_gralloc_usage = va_arg(args, uint32_t *);
316 if (req_usage & GRALLOC_DRM_GET_USAGE_FRONT_RENDERING_BIT)
317 gralloc_usage |= BUFFER_USAGE_FRONT_RENDERING;
318 *out_gralloc_usage = gralloc_usage;
319 break;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700320 default:
Tomasz Figa90bb7432017-07-21 17:54:05 +0900321 ret = -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700322 }
323
324 va_end(args);
325
326 return ret;
327}
328
329static int gralloc0_lock_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
330 int usage, int l, int t, int w, int h, struct android_ycbcr *ycbcr)
331{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700332 return module->lockAsync_ycbcr(module, handle, usage, l, t, w, h, ycbcr, -1);
333}
334
335static int gralloc0_lock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
336 int usage, int l, int t, int w, int h, void **vaddr, int fence_fd)
337{
338 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700339 uint32_t map_flags;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700340 uint8_t *addr[DRV_MAX_PLANES];
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000341 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
342 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700343 struct rectangle rect = { .x = static_cast<uint32_t>(l),
344 .y = static_cast<uint32_t>(t),
345 .width = static_cast<uint32_t>(w),
346 .height = static_cast<uint32_t>(h) };
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700347
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000348 if (!mod->initialized) {
349 if (gralloc0_init(mod, false))
350 return -ENODEV;
351 }
352
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700353 auto hnd = cros_gralloc_convert_handle(handle);
354 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700355 drv_log("Invalid handle.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700356 return -EINVAL;
357 }
358
359 if (hnd->droid_format == HAL_PIXEL_FORMAT_YCbCr_420_888) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700360 drv_log("HAL_PIXEL_FORMAT_YCbCr_*_888 format not compatible.\n");
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700361 return -EINVAL;
362 }
363
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800364 assert(l >= 0);
365 assert(t >= 0);
366 assert(w >= 0);
367 assert(h >= 0);
368
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700369 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800370 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700371 *vaddr = addr[0];
372 return ret;
373}
374
375static int gralloc0_unlock_async(struct gralloc_module_t const *module, buffer_handle_t handle,
376 int *fence_fd)
377{
Alistair Strachanf8ff0f52018-04-09 18:49:51 -0700378 auto mod = (struct gralloc0_module const *)module;
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700379 return mod->driver->unlock(handle, fence_fd);
380}
381
382static int gralloc0_lock_async_ycbcr(struct gralloc_module_t const *module, buffer_handle_t handle,
383 int usage, int l, int t, int w, int h,
384 struct android_ycbcr *ycbcr, int fence_fd)
385{
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700386 int32_t ret;
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700387 uint32_t map_flags;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700388 uint32_t strides[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
389 uint32_t offsets[DRV_MAX_PLANES] = { 0, 0, 0, 0 };
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000390 uint64_t format_modifier = 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700391 uint8_t *addr[DRV_MAX_PLANES] = { nullptr, nullptr, nullptr, nullptr };
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000392 auto const_module = reinterpret_cast<const struct gralloc0_module *>(module);
393 auto mod = const_cast<struct gralloc0_module *>(const_module);
Gurchetan Singh2b1d6892018-09-17 16:58:16 -0700394 struct rectangle rect = { .x = static_cast<uint32_t>(l),
395 .y = static_cast<uint32_t>(t),
396 .width = static_cast<uint32_t>(w),
397 .height = static_cast<uint32_t>(h) };
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700398
Yiwei Zhangca1a5a62021-06-03 06:15:33 +0000399 if (!mod->initialized) {
400 if (gralloc0_init(mod, false))
401 return -ENODEV;
402 }
403
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700404 auto hnd = cros_gralloc_convert_handle(handle);
405 if (!hnd) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700406 drv_log("Invalid handle.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900407 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700408 }
409
Hirokazu Honda758cf122019-12-03 11:01:59 +0900410 if (!gralloc0_droid_yuv_format(hnd->droid_format) &&
411 hnd->droid_format != HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700412 drv_log("Non-YUV format not compatible.\n");
Tomasz Figa90bb7432017-07-21 17:54:05 +0900413 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700414 }
415
Gurchetan Singh1ef809e2017-11-06 11:07:52 -0800416 assert(l >= 0);
417 assert(t >= 0);
418 assert(w >= 0);
419 assert(h >= 0);
420
Gurchetan Singhf7f633a2017-09-28 17:02:12 -0700421 map_flags = gralloc0_convert_map_usage(usage);
Jason Macnak1de7f662020-01-24 15:05:57 -0800422 ret = mod->driver->lock(handle, fence_fd, true, &rect, map_flags, addr);
Tomasz Figaaddd5f22017-07-05 17:50:18 +0900423 if (ret)
424 return ret;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700425
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700426 if (!map_flags) {
Yiwei Zhanga1e93fd2021-04-30 07:01:55 +0000427 ret = mod->driver->resource_info(handle, strides, offsets, &format_modifier);
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700428 if (ret)
429 return ret;
430
431 for (uint32_t plane = 0; plane < DRV_MAX_PLANES; plane++)
Jason Macnaka03926e2020-05-14 10:57:17 -0700432 addr[plane] =
433 reinterpret_cast<uint8_t *>(static_cast<uintptr_t>(offsets[plane]));
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700434 }
435
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700436 switch (hnd->format) {
437 case DRM_FORMAT_NV12:
438 ycbcr->y = addr[0];
439 ycbcr->cb = addr[1];
440 ycbcr->cr = addr[1] + 1;
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700441 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
442 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700443 ycbcr->chroma_step = 2;
444 break;
445 case DRM_FORMAT_YVU420:
446 case DRM_FORMAT_YVU420_ANDROID:
447 ycbcr->y = addr[0];
448 ycbcr->cb = addr[2];
449 ycbcr->cr = addr[1];
Gurchetan Singhbc4f0232019-06-27 20:05:54 -0700450 ycbcr->ystride = (!map_flags) ? strides[0] : hnd->strides[0];
451 ycbcr->cstride = (!map_flags) ? strides[1] : hnd->strides[1];
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700452 ycbcr->chroma_step = 1;
453 break;
454 default:
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700455 module->unlock(module, handle);
Tomasz Figa90bb7432017-07-21 17:54:05 +0900456 return -EINVAL;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700457 }
458
Tomasz Figa90bb7432017-07-21 17:54:05 +0900459 return 0;
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700460}
461
Tomasz Figa4df286c2017-08-02 19:35:40 +0900462// clang-format off
463static struct hw_module_methods_t gralloc0_module_methods = { .open = gralloc0_open };
464// clang-format on
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700465
466struct gralloc0_module HAL_MODULE_INFO_SYM = {
467 .base =
468 {
469 .common =
470 {
471 .tag = HARDWARE_MODULE_TAG,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700472 .module_api_version = GRALLOC_MODULE_API_VERSION_0_3,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700473 .hal_api_version = 0,
474 .id = GRALLOC_HARDWARE_MODULE_ID,
475 .name = "CrOS Gralloc",
476 .author = "Chrome OS",
477 .methods = &gralloc0_module_methods,
478 },
479
480 .registerBuffer = gralloc0_register_buffer,
481 .unregisterBuffer = gralloc0_unregister_buffer,
482 .lock = gralloc0_lock,
483 .unlock = gralloc0_unlock,
484 .perform = gralloc0_perform,
485 .lock_ycbcr = gralloc0_lock_ycbcr,
Gurchetan Singh4b5d0bf2017-06-22 18:38:37 -0700486 .lockAsync = gralloc0_lock_async,
487 .unlockAsync = gralloc0_unlock_async,
488 .lockAsync_ycbcr = gralloc0_lock_async_ycbcr,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700489 },
490
491 .alloc = nullptr,
492 .driver = nullptr,
Gurchetan Singhbcfd7582017-08-01 15:02:24 -0700493 .initialized = false,
Gurchetan Singhd6b8b032017-05-31 14:31:31 -0700494};