Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or |
| 3 | * modify it under the terms of the GNU General Public |
| 4 | * License v2 as published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 9 | * General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public |
| 12 | * License along with this program; if not, write to the |
| 13 | * Free Software Foundation, Inc., 59 Temple Place - Suite 330, |
| 14 | * Boston, MA 021110-1307, USA. |
| 15 | */ |
| 16 | |
| 17 | #include <stdio.h> |
| 18 | #include <stdlib.h> |
| 19 | #include <string.h> |
| 20 | #include <sys/ioctl.h> |
| 21 | #include <sys/types.h> |
| 22 | #include <dirent.h> |
| 23 | #include <sys/stat.h> |
| 24 | #include <unistd.h> |
| 25 | #include <fcntl.h> |
| 26 | #include <libgen.h> |
| 27 | #include <limits.h> |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 28 | #include <ctype.h> |
| 29 | |
| 30 | #include "mmc.h" |
| 31 | #include "mmc_cmds.h" |
| 32 | |
| 33 | int read_extcsd(int fd, __u8 *ext_csd) |
| 34 | { |
| 35 | int ret = 0; |
| 36 | struct mmc_ioc_cmd idata; |
| 37 | memset(&idata, 0, sizeof(idata)); |
| 38 | memset(ext_csd, 0, sizeof(__u8) * 512); |
| 39 | idata.write_flag = 0; |
| 40 | idata.opcode = MMC_SEND_EXT_CSD; |
| 41 | idata.arg = 0; |
| 42 | idata.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC; |
| 43 | idata.blksz = 512; |
| 44 | idata.blocks = 1; |
| 45 | mmc_ioc_cmd_set_data(idata, ext_csd); |
| 46 | |
| 47 | ret = ioctl(fd, MMC_IOC_CMD, &idata); |
| 48 | if (ret) |
| 49 | perror("ioctl"); |
| 50 | |
| 51 | return ret; |
| 52 | } |
| 53 | |
| 54 | int write_extcsd_value(int fd, __u8 index, __u8 value) |
| 55 | { |
| 56 | int ret = 0; |
| 57 | struct mmc_ioc_cmd idata; |
| 58 | |
| 59 | memset(&idata, 0, sizeof(idata)); |
| 60 | idata.write_flag = 1; |
| 61 | idata.opcode = MMC_SWITCH; |
| 62 | idata.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | |
| 63 | (index << 16) | |
| 64 | (value << 8) | |
| 65 | EXT_CSD_CMD_SET_NORMAL; |
| 66 | idata.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC; |
| 67 | |
| 68 | ret = ioctl(fd, MMC_IOC_CMD, &idata); |
| 69 | if (ret) |
| 70 | perror("ioctl"); |
| 71 | |
| 72 | return ret; |
| 73 | } |
| 74 | |
Ben Gardiner | 27c357d | 2013-05-30 17:12:47 -0400 | [diff] [blame^] | 75 | int send_status(int fd, __u32 *response) |
| 76 | { |
| 77 | int ret = 0; |
| 78 | struct mmc_ioc_cmd idata; |
| 79 | |
| 80 | memset(&idata, 0, sizeof(idata)); |
| 81 | idata.opcode = MMC_SEND_STATUS; |
| 82 | idata.arg = (1 << 16); |
| 83 | idata.flags = MMC_RSP_R1 | MMC_CMD_AC; |
| 84 | |
| 85 | ret = ioctl(fd, MMC_IOC_CMD, &idata); |
| 86 | if (ret) |
| 87 | perror("ioctl"); |
| 88 | |
| 89 | *response = idata.response[0]; |
| 90 | |
| 91 | return ret; |
| 92 | } |
| 93 | |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 94 | void print_writeprotect_status(__u8 *ext_csd) |
| 95 | { |
| 96 | __u8 reg; |
| 97 | __u8 ext_csd_rev = ext_csd[192]; |
| 98 | |
| 99 | /* A43: reserved [174:0] */ |
| 100 | if (ext_csd_rev >= 5) { |
| 101 | printf("Boot write protection status registers" |
| 102 | " [BOOT_WP_STATUS]: 0x%02x\n", ext_csd[174]); |
| 103 | |
| 104 | reg = ext_csd[EXT_CSD_BOOT_WP]; |
| 105 | printf("Boot Area Write protection [BOOT_WP]: 0x%02x\n", reg); |
| 106 | printf(" Power ro locking: "); |
| 107 | if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_DIS) |
| 108 | printf("not possible\n"); |
| 109 | else |
| 110 | printf("possible\n"); |
| 111 | |
| 112 | printf(" Permanent ro locking: "); |
| 113 | if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_DIS) |
| 114 | printf("not possible\n"); |
| 115 | else |
| 116 | printf("possible\n"); |
| 117 | |
| 118 | printf(" ro lock status: "); |
| 119 | if (reg & EXT_CSD_BOOT_WP_B_PWR_WP_EN) |
| 120 | printf("locked until next power on\n"); |
| 121 | else if (reg & EXT_CSD_BOOT_WP_B_PERM_WP_EN) |
| 122 | printf("locked permanently\n"); |
| 123 | else |
| 124 | printf("not locked\n"); |
| 125 | } |
| 126 | } |
| 127 | |
| 128 | int do_writeprotect_get(int nargs, char **argv) |
| 129 | { |
| 130 | __u8 ext_csd[512]; |
| 131 | int fd, ret; |
| 132 | char *device; |
| 133 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 134 | CHECK(nargs != 2, "Usage: mmc writeprotect get </path/to/mmcblkX>\n", |
| 135 | exit(1)); |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 136 | |
| 137 | device = argv[1]; |
| 138 | |
| 139 | fd = open(device, O_RDWR); |
| 140 | if (fd < 0) { |
| 141 | perror("open"); |
| 142 | exit(1); |
| 143 | } |
| 144 | |
| 145 | ret = read_extcsd(fd, ext_csd); |
| 146 | if (ret) { |
| 147 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 148 | exit(1); |
| 149 | } |
| 150 | |
| 151 | print_writeprotect_status(ext_csd); |
| 152 | |
| 153 | return ret; |
| 154 | } |
| 155 | |
| 156 | int do_writeprotect_set(int nargs, char **argv) |
| 157 | { |
| 158 | __u8 ext_csd[512], value; |
| 159 | int fd, ret; |
| 160 | char *device; |
| 161 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 162 | CHECK(nargs != 2, "Usage: mmc writeprotect set </path/to/mmcblkX>\n", |
| 163 | exit(1)); |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 164 | |
| 165 | device = argv[1]; |
| 166 | |
| 167 | fd = open(device, O_RDWR); |
| 168 | if (fd < 0) { |
| 169 | perror("open"); |
| 170 | exit(1); |
| 171 | } |
| 172 | |
| 173 | ret = read_extcsd(fd, ext_csd); |
| 174 | if (ret) { |
| 175 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 176 | exit(1); |
| 177 | } |
| 178 | |
| 179 | value = ext_csd[EXT_CSD_BOOT_WP] | |
| 180 | EXT_CSD_BOOT_WP_B_PWR_WP_EN; |
| 181 | ret = write_extcsd_value(fd, EXT_CSD_BOOT_WP, value); |
| 182 | if (ret) { |
| 183 | fprintf(stderr, "Could not write 0x%02x to " |
| 184 | "EXT_CSD[%d] in %s\n", |
| 185 | value, EXT_CSD_BOOT_WP, device); |
| 186 | exit(1); |
| 187 | } |
| 188 | |
| 189 | return ret; |
| 190 | } |
| 191 | |
Saugata Das | b7e2599 | 2012-05-17 09:26:34 -0400 | [diff] [blame] | 192 | int do_disable_512B_emulation(int nargs, char **argv) |
| 193 | { |
| 194 | __u8 ext_csd[512], native_sector_size, data_sector_size, wr_rel_param; |
| 195 | int fd, ret; |
| 196 | char *device; |
| 197 | |
| 198 | CHECK(nargs != 2, "Usage: mmc disable 512B emulation </path/to/mmcblkX>\n", exit(1)); |
| 199 | device = argv[1]; |
| 200 | |
| 201 | fd = open(device, O_RDWR); |
| 202 | if (fd < 0) { |
| 203 | perror("open"); |
| 204 | exit(1); |
| 205 | } |
| 206 | |
| 207 | ret = read_extcsd(fd, ext_csd); |
| 208 | if (ret) { |
| 209 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 210 | exit(1); |
| 211 | } |
| 212 | |
| 213 | wr_rel_param = ext_csd[EXT_CSD_WR_REL_PARAM]; |
| 214 | native_sector_size = ext_csd[EXT_CSD_NATIVE_SECTOR_SIZE]; |
| 215 | data_sector_size = ext_csd[EXT_CSD_DATA_SECTOR_SIZE]; |
| 216 | |
| 217 | if (native_sector_size && !data_sector_size && |
| 218 | (wr_rel_param & EN_REL_WR)) { |
| 219 | ret = write_extcsd_value(fd, EXT_CSD_USE_NATIVE_SECTOR, 1); |
| 220 | |
| 221 | if (ret) { |
| 222 | fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n", |
| 223 | 1, EXT_CSD_BOOT_WP, device); |
| 224 | exit(1); |
| 225 | } |
| 226 | printf("MMC disable 512B emulation successful. Now reset the device to switch to 4KB native sector mode.\n"); |
| 227 | } else if (native_sector_size && data_sector_size) { |
| 228 | printf("MMC 512B emulation mode is already disabled; doing nothing.\n"); |
| 229 | } else { |
| 230 | printf("MMC does not support disabling 512B emulation mode.\n"); |
| 231 | } |
| 232 | |
| 233 | return ret; |
| 234 | } |
| 235 | |
Giuseppe CAVALLARO | 7bd1320 | 2012-04-19 10:58:37 +0200 | [diff] [blame] | 236 | int do_write_boot_en(int nargs, char **argv) |
| 237 | { |
| 238 | __u8 ext_csd[512]; |
| 239 | __u8 value = 0; |
| 240 | int fd, ret; |
| 241 | char *device; |
| 242 | int boot_area, send_ack; |
| 243 | |
| 244 | CHECK(nargs != 4, "Usage: mmc bootpart enable <partition_number> " |
| 245 | "<send_ack> </path/to/mmcblkX>\n", exit(1)); |
| 246 | |
| 247 | /* |
| 248 | * If <send_ack> is 1, the device will send acknowledgment |
| 249 | * pattern "010" to the host when boot operation begins. |
| 250 | * If <send_ack> is 0, it won't. |
| 251 | */ |
| 252 | boot_area = strtol(argv[1], NULL, 10); |
| 253 | send_ack = strtol(argv[2], NULL, 10); |
| 254 | device = argv[3]; |
| 255 | |
| 256 | fd = open(device, O_RDWR); |
| 257 | if (fd < 0) { |
| 258 | perror("open"); |
| 259 | exit(1); |
| 260 | } |
| 261 | |
| 262 | ret = read_extcsd(fd, ext_csd); |
| 263 | if (ret) { |
| 264 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 265 | exit(1); |
| 266 | } |
| 267 | |
| 268 | value = ext_csd[EXT_CSD_PART_CONFIG]; |
| 269 | |
| 270 | switch (boot_area) { |
| 271 | case EXT_CSD_PART_CONFIG_ACC_BOOT0: |
| 272 | value |= (1 << 3); |
| 273 | value &= ~(3 << 4); |
| 274 | break; |
| 275 | case EXT_CSD_PART_CONFIG_ACC_BOOT1: |
| 276 | value |= (1 << 4); |
| 277 | value &= ~(1 << 3); |
| 278 | value &= ~(1 << 5); |
| 279 | break; |
| 280 | case EXT_CSD_PART_CONFIG_ACC_USER_AREA: |
| 281 | value |= (boot_area << 3); |
| 282 | break; |
| 283 | default: |
| 284 | fprintf(stderr, "Cannot enable the boot area\n"); |
| 285 | exit(1); |
| 286 | } |
| 287 | if (send_ack) |
| 288 | value |= EXT_CSD_PART_CONFIG_ACC_ACK; |
| 289 | else |
| 290 | value &= ~EXT_CSD_PART_CONFIG_ACC_ACK; |
| 291 | |
| 292 | ret = write_extcsd_value(fd, EXT_CSD_PART_CONFIG, value); |
| 293 | if (ret) { |
| 294 | fprintf(stderr, "Could not write 0x%02x to " |
| 295 | "EXT_CSD[%d] in %s\n", |
| 296 | value, EXT_CSD_PART_CONFIG, device); |
| 297 | exit(1); |
| 298 | } |
| 299 | return ret; |
| 300 | } |
| 301 | |
Chris Ball | f74dfe2 | 2012-10-19 16:49:55 -0400 | [diff] [blame] | 302 | int do_hwreset(int value, int nargs, char **argv) |
| 303 | { |
| 304 | __u8 ext_csd[512]; |
| 305 | int fd, ret; |
| 306 | char *device; |
| 307 | |
| 308 | CHECK(nargs != 2, "Usage: mmc hwreset enable </path/to/mmcblkX>\n", |
| 309 | exit(1)); |
| 310 | |
| 311 | device = argv[1]; |
| 312 | |
| 313 | fd = open(device, O_RDWR); |
| 314 | if (fd < 0) { |
| 315 | perror("open"); |
| 316 | exit(1); |
| 317 | } |
| 318 | |
| 319 | ret = read_extcsd(fd, ext_csd); |
| 320 | if (ret) { |
| 321 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 322 | exit(1); |
| 323 | } |
| 324 | |
| 325 | if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) == |
| 326 | EXT_CSD_HW_RESET_EN) { |
| 327 | fprintf(stderr, |
| 328 | "H/W Reset is already permanently enabled on %s\n", |
| 329 | device); |
| 330 | exit(1); |
| 331 | } |
| 332 | if ((ext_csd[EXT_CSD_RST_N_FUNCTION] & EXT_CSD_RST_N_EN_MASK) == |
| 333 | EXT_CSD_HW_RESET_DIS) { |
| 334 | fprintf(stderr, |
| 335 | "H/W Reset is already permanently disabled on %s\n", |
| 336 | device); |
| 337 | exit(1); |
| 338 | } |
| 339 | |
| 340 | ret = write_extcsd_value(fd, EXT_CSD_RST_N_FUNCTION, value); |
| 341 | if (ret) { |
| 342 | fprintf(stderr, |
| 343 | "Could not write 0x%02x to EXT_CSD[%d] in %s\n", |
| 344 | value, EXT_CSD_RST_N_FUNCTION, device); |
| 345 | exit(1); |
| 346 | } |
| 347 | |
| 348 | return ret; |
| 349 | } |
| 350 | |
| 351 | int do_hwreset_en(int nargs, char **argv) |
| 352 | { |
| 353 | return do_hwreset(EXT_CSD_HW_RESET_EN, nargs, argv); |
| 354 | } |
| 355 | |
| 356 | int do_hwreset_dis(int nargs, char **argv) |
| 357 | { |
| 358 | return do_hwreset(EXT_CSD_HW_RESET_DIS, nargs, argv); |
| 359 | } |
| 360 | |
Jaehoon Chung | 8649651 | 2012-09-21 10:08:05 +0000 | [diff] [blame] | 361 | int do_write_bkops_en(int nargs, char **argv) |
| 362 | { |
| 363 | __u8 ext_csd[512], value = 0; |
| 364 | int fd, ret; |
| 365 | char *device; |
| 366 | |
| 367 | CHECK(nargs != 2, "Usage: mmc bkops enable </path/to/mmcblkX>\n", |
| 368 | exit(1)); |
| 369 | |
| 370 | device = argv[1]; |
| 371 | |
| 372 | fd = open(device, O_RDWR); |
| 373 | if (fd < 0) { |
| 374 | perror("open"); |
| 375 | exit(1); |
| 376 | } |
| 377 | |
| 378 | ret = read_extcsd(fd, ext_csd); |
| 379 | if (ret) { |
| 380 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 381 | exit(1); |
| 382 | } |
| 383 | |
| 384 | if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) { |
| 385 | fprintf(stderr, "%s doesn't support BKOPS\n", device); |
| 386 | exit(1); |
| 387 | } |
| 388 | |
| 389 | ret = write_extcsd_value(fd, EXT_CSD_BKOPS_EN, BKOPS_ENABLE); |
| 390 | if (ret) { |
| 391 | fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n", |
| 392 | value, EXT_CSD_BKOPS_EN, device); |
| 393 | exit(1); |
| 394 | } |
| 395 | |
| 396 | return ret; |
| 397 | } |
| 398 | |
Ben Gardiner | 27c357d | 2013-05-30 17:12:47 -0400 | [diff] [blame^] | 399 | int do_status_get(int nargs, char **argv) |
| 400 | { |
| 401 | __u32 response; |
| 402 | int fd, ret; |
| 403 | char *device; |
| 404 | |
| 405 | CHECK(nargs != 2, "Usage: mmc status get </path/to/mmcblkX>\n", |
| 406 | exit(1)); |
| 407 | |
| 408 | device = argv[1]; |
| 409 | |
| 410 | fd = open(device, O_RDWR); |
| 411 | if (fd < 0) { |
| 412 | perror("open"); |
| 413 | exit(1); |
| 414 | } |
| 415 | |
| 416 | ret = send_status(fd, &response); |
| 417 | if (ret) { |
| 418 | fprintf(stderr, "Could not read response to SEND_STATUS from %s\n", device); |
| 419 | exit(1); |
| 420 | } |
| 421 | |
| 422 | printf("SEND_STATUS response: 0x%08x\n", response); |
| 423 | |
| 424 | return ret; |
| 425 | } |
| 426 | |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 427 | int do_read_extcsd(int nargs, char **argv) |
| 428 | { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 429 | __u8 ext_csd[512], ext_csd_rev, reg; |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 430 | int fd, ret; |
| 431 | char *device; |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 432 | const char *str; |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 433 | |
Chris Ball | 8ba4466 | 2012-04-19 13:22:54 -0400 | [diff] [blame] | 434 | CHECK(nargs != 2, "Usage: mmc extcsd read </path/to/mmcblkX>\n", |
| 435 | exit(1)); |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 436 | |
| 437 | device = argv[1]; |
| 438 | |
| 439 | fd = open(device, O_RDWR); |
| 440 | if (fd < 0) { |
| 441 | perror("open"); |
| 442 | exit(1); |
| 443 | } |
| 444 | |
| 445 | ret = read_extcsd(fd, ext_csd); |
| 446 | if (ret) { |
| 447 | fprintf(stderr, "Could not read EXT_CSD from %s\n", device); |
| 448 | exit(1); |
| 449 | } |
| 450 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 451 | ext_csd_rev = ext_csd[192]; |
| 452 | |
| 453 | switch (ext_csd_rev) { |
| 454 | case 6: |
| 455 | str = "4.5"; |
| 456 | break; |
| 457 | case 5: |
| 458 | str = "4.41"; |
| 459 | break; |
| 460 | case 3: |
| 461 | str = "4.3"; |
| 462 | break; |
| 463 | case 2: |
| 464 | str = "4.2"; |
| 465 | break; |
| 466 | case 1: |
| 467 | str = "4.1"; |
| 468 | break; |
| 469 | case 0: |
| 470 | str = "4.0"; |
| 471 | break; |
| 472 | default: |
| 473 | goto out_free; |
| 474 | } |
| 475 | printf("=============================================\n"); |
| 476 | printf(" Extended CSD rev 1.%d (MMC %s)\n", ext_csd_rev, str); |
| 477 | printf("=============================================\n\n"); |
| 478 | |
| 479 | if (ext_csd_rev < 3) |
| 480 | goto out_free; /* No ext_csd */ |
| 481 | |
| 482 | /* Parse the Extended CSD registers. |
| 483 | * Reserved bit should be read as "0" in case of spec older |
| 484 | * than A441. |
| 485 | */ |
| 486 | reg = ext_csd[EXT_CSD_S_CMD_SET]; |
| 487 | printf("Card Supported Command sets [S_CMD_SET: 0x%02x]\n", reg); |
| 488 | if (!reg) |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 489 | printf(" - Standard MMC command sets\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 490 | |
| 491 | reg = ext_csd[EXT_CSD_HPI_FEATURE]; |
| 492 | printf("HPI Features [HPI_FEATURE: 0x%02x]: ", reg); |
| 493 | if (reg & EXT_CSD_HPI_SUPP) { |
| 494 | if (reg & EXT_CSD_HPI_IMPL) |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 495 | printf("implementation based on CMD12\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 496 | else |
| 497 | printf("implementation based on CMD13\n"); |
| 498 | } |
| 499 | |
| 500 | printf("Background operations support [BKOPS_SUPPORT: 0x%02x]\n", |
| 501 | ext_csd[502]); |
| 502 | |
| 503 | if (ext_csd_rev >= 6) { |
| 504 | printf("Max Packet Read Cmd [MAX_PACKED_READS: 0x%02x]\n", |
| 505 | ext_csd[501]); |
| 506 | printf("Max Packet Write Cmd [MAX_PACKED_WRITES: 0x%02x]\n", |
| 507 | ext_csd[500]); |
| 508 | printf("Data TAG support [DATA_TAG_SUPPORT: 0x%02x]\n", |
| 509 | ext_csd[499]); |
| 510 | |
| 511 | printf("Data TAG Unit Size [TAG_UNIT_SIZE: 0x%02x]\n", |
| 512 | ext_csd[498]); |
| 513 | printf("Tag Resources Size [TAG_RES_SIZE: 0x%02x]\n", |
| 514 | ext_csd[497]); |
| 515 | printf("Context Management Capabilities" |
| 516 | " [CONTEXT_CAPABILITIES: 0x%02x]\n", ext_csd[496]); |
| 517 | printf("Large Unit Size [LARGE_UNIT_SIZE_M1: 0x%02x]\n", |
| 518 | ext_csd[495]); |
| 519 | printf("Extended partition attribute support" |
| 520 | " [EXT_SUPPORT: 0x%02x]\n", ext_csd[494]); |
| 521 | printf("Generic CMD6 Timer [GENERIC_CMD6_TIME: 0x%02x]\n", |
| 522 | ext_csd[248]); |
| 523 | printf("Power off notification [POWER_OFF_LONG_TIME: 0x%02x]\n", |
| 524 | ext_csd[247]); |
| 525 | printf("Cache Size [CACHE_SIZE] is %d KiB\n", |
| 526 | ext_csd[249] << 0 | (ext_csd[250] << 8) | |
| 527 | (ext_csd[251] << 16) | (ext_csd[252] << 24)); |
| 528 | } |
| 529 | |
| 530 | /* A441: Reserved [501:247] |
| 531 | A43: reserved [246:229] */ |
| 532 | if (ext_csd_rev >= 5) { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 533 | printf("Background operations status" |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 534 | " [BKOPS_STATUS: 0x%02x]\n", ext_csd[246]); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 535 | |
| 536 | /* CORRECTLY_PRG_SECTORS_NUM [245:242] TODO */ |
| 537 | |
| 538 | printf("1st Initialisation Time after programmed sector" |
| 539 | " [INI_TIMEOUT_AP: 0x%02x]\n", ext_csd[241]); |
| 540 | |
| 541 | /* A441: reserved [240] */ |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 542 | printf("Power class for 52MHz, DDR at 3.6V" |
| 543 | " [PWR_CL_DDR_52_360: 0x%02x]\n", ext_csd[239]); |
| 544 | printf("Power class for 52MHz, DDR at 1.95V" |
| 545 | " [PWR_CL_DDR_52_195: 0x%02x]\n", ext_csd[238]); |
| 546 | |
| 547 | /* A441: reserved [237-236] */ |
| 548 | |
| 549 | if (ext_csd_rev >= 6) { |
| 550 | printf("Power class for 200MHz at 3.6V" |
| 551 | " [PWR_CL_200_360: 0x%02x]\n", ext_csd[237]); |
| 552 | printf("Power class for 200MHz, at 1.95V" |
| 553 | " [PWR_CL_200_195: 0x%02x]\n", ext_csd[236]); |
| 554 | } |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 555 | printf("Minimum Performance for 8bit at 52MHz in DDR mode:\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 556 | printf(" [MIN_PERF_DDR_W_8_52: 0x%02x]\n", ext_csd[235]); |
| 557 | printf(" [MIN_PERF_DDR_R_8_52: 0x%02x]\n", ext_csd[234]); |
| 558 | /* A441: reserved [233] */ |
| 559 | printf("TRIM Multiplier [TRIM_MULT: 0x%02x]\n", ext_csd[232]); |
| 560 | printf("Secure Feature support [SEC_FEATURE_SUPPORT: 0x%02x]\n", |
| 561 | ext_csd[231]); |
| 562 | } |
| 563 | if (ext_csd_rev == 5) { /* Obsolete in 4.5 */ |
| 564 | printf("Secure Erase Multiplier [SEC_ERASE_MULT: 0x%02x]\n", |
| 565 | ext_csd[230]); |
| 566 | printf("Secure TRIM Multiplier [SEC_TRIM_MULT: 0x%02x]\n", |
| 567 | ext_csd[229]); |
| 568 | } |
| 569 | reg = ext_csd[EXT_CSD_BOOT_INFO]; |
| 570 | printf("Boot Information [BOOT_INFO: 0x%02x]\n", reg); |
| 571 | if (reg & EXT_CSD_BOOT_INFO_ALT) |
| 572 | printf(" Device supports alternative boot method\n"); |
| 573 | if (reg & EXT_CSD_BOOT_INFO_DDR_DDR) |
| 574 | printf(" Device supports dual data rate during boot\n"); |
| 575 | if (reg & EXT_CSD_BOOT_INFO_HS_MODE) |
| 576 | printf(" Device supports high speed timing during boot\n"); |
| 577 | |
| 578 | /* A441/A43: reserved [227] */ |
| 579 | printf("Boot partition size [BOOT_SIZE_MULTI: 0x%02x]\n", ext_csd[226]); |
| 580 | printf("Access size [ACC_SIZE: 0x%02x]\n", ext_csd[225]); |
| 581 | printf("High-capacity erase unit size [HC_ERASE_GRP_SIZE: 0x%02x]\n", |
| 582 | ext_csd[224]); |
| 583 | printf("High-capacity erase timeout [ERASE_TIMEOUT_MULT: 0x%02x]\n", |
| 584 | ext_csd[223]); |
| 585 | printf("Reliable write sector count [REL_WR_SEC_C: 0x%02x]\n", |
| 586 | ext_csd[222]); |
| 587 | printf("High-capacity W protect group size [HC_WP_GRP_SIZE: 0x%02x]\n", |
| 588 | ext_csd[221]); |
| 589 | printf("Sleep current (VCC) [S_C_VCC: 0x%02x]\n", ext_csd[220]); |
| 590 | printf("Sleep current (VCCQ) [S_C_VCCQ: 0x%02x]\n", ext_csd[219]); |
| 591 | /* A441/A43: reserved [218] */ |
| 592 | printf("Sleep/awake timeout [S_A_TIMEOUT: 0x%02x]\n", ext_csd[217]); |
| 593 | /* A441/A43: reserved [216] */ |
| 594 | printf("Sector Count [SEC_COUNT: 0x%08x]\n", (ext_csd[215] << 24) | |
| 595 | (ext_csd[214] << 16) | (ext_csd[213] << 8) | |
| 596 | ext_csd[212]); |
| 597 | /* A441/A43: reserved [211] */ |
| 598 | printf("Minimum Write Performance for 8bit:\n"); |
| 599 | printf(" [MIN_PERF_W_8_52: 0x%02x]\n", ext_csd[210]); |
| 600 | printf(" [MIN_PERF_R_8_52: 0x%02x]\n", ext_csd[209]); |
| 601 | printf(" [MIN_PERF_W_8_26_4_52: 0x%02x]\n", ext_csd[208]); |
| 602 | printf(" [MIN_PERF_R_8_26_4_52: 0x%02x]\n", ext_csd[207]); |
| 603 | printf("Minimum Write Performance for 4bit:\n"); |
| 604 | printf(" [MIN_PERF_W_4_26: 0x%02x]\n", ext_csd[206]); |
| 605 | printf(" [MIN_PERF_R_4_26: 0x%02x]\n", ext_csd[205]); |
| 606 | /* A441/A43: reserved [204] */ |
| 607 | printf("Power classes registers:\n"); |
| 608 | printf(" [PWR_CL_26_360: 0x%02x]\n", ext_csd[203]); |
| 609 | printf(" [PWR_CL_52_360: 0x%02x]\n", ext_csd[202]); |
| 610 | printf(" [PWR_CL_26_195: 0x%02x]\n", ext_csd[201]); |
| 611 | printf(" [PWR_CL_52_195: 0x%02x]\n", ext_csd[200]); |
| 612 | |
| 613 | /* A43: reserved [199:198] */ |
| 614 | if (ext_csd_rev >= 5) { |
| 615 | printf("Partition switching timing " |
| 616 | "[PARTITION_SWITCH_TIME: 0x%02x]\n", ext_csd[199]); |
| 617 | printf("Out-of-interrupt busy timing" |
| 618 | " [OUT_OF_INTERRUPT_TIME: 0x%02x]\n", ext_csd[198]); |
| 619 | } |
| 620 | |
| 621 | /* A441/A43: reserved [197] [195] [193] [190] [188] |
| 622 | * [186] [184] [182] [180] [176] */ |
| 623 | |
| 624 | if (ext_csd_rev >= 6) |
| 625 | printf("I/O Driver Strength [DRIVER_STRENGTH: 0x%02x]\n", |
| 626 | ext_csd[197]); |
| 627 | |
Oleg Matcovschi | 64f63a3 | 2013-05-23 17:11:07 -0700 | [diff] [blame] | 628 | /* DEVICE_TYPE in A45, CARD_TYPE in A441 */ |
| 629 | reg = ext_csd[196]; |
| 630 | printf("Card Type [CARD_TYPE: 0x%02x]\n", reg); |
| 631 | if (reg & 0x20) printf(" HS200 Single Data Rate eMMC @200MHz 1.2VI/O\n"); |
| 632 | if (reg & 0x10) printf(" HS200 Single Data Rate eMMC @200MHz 1.8VI/O\n"); |
| 633 | if (reg & 0x08) printf(" HS Dual Data Rate eMMC @52MHz 1.2VI/O\n"); |
| 634 | if (reg & 0x04) printf(" HS Dual Data Rate eMMC @52MHz 1.8V or 3VI/O\n"); |
| 635 | if (reg & 0x02) printf(" HS eMMC @52MHz - at rated device voltage(s)\n"); |
| 636 | if (reg & 0x01) printf(" HS eMMC @26MHz - at rated device voltage(s)\n"); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 637 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 638 | printf("CSD structure version [CSD_STRUCTURE: 0x%02x]\n", ext_csd[194]); |
| 639 | /* ext_csd_rev = ext_csd[192] (already done!!!) */ |
| 640 | printf("Command set [CMD_SET: 0x%02x]\n", ext_csd[191]); |
| 641 | printf("Command set revision [CMD_SET_REV: 0x%02x]\n", ext_csd[189]); |
| 642 | printf("Power class [POWER_CLASS: 0x%02x]\n", ext_csd[187]); |
| 643 | printf("High-speed interface timing [HS_TIMING: 0x%02x]\n", |
| 644 | ext_csd[185]); |
| 645 | /* bus_width: ext_csd[183] not readable */ |
| 646 | printf("Erased memory content [ERASED_MEM_CONT: 0x%02x]\n", |
| 647 | ext_csd[181]); |
| 648 | reg = ext_csd[EXT_CSD_BOOT_CFG]; |
| 649 | printf("Boot configuration bytes [PARTITION_CONFIG: 0x%02x]\n", reg); |
Mario Schuknecht | 8c0c40d | 2013-05-15 08:28:04 +0200 | [diff] [blame] | 650 | switch ((reg & EXT_CSD_BOOT_CFG_EN)>>3) { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 651 | case 0x0: |
| 652 | printf(" Not boot enable\n"); |
| 653 | break; |
| 654 | case 0x1: |
| 655 | printf(" Boot Partition 1 enabled\n"); |
| 656 | break; |
| 657 | case 0x2: |
| 658 | printf(" Boot Partition 2 enabled\n"); |
| 659 | break; |
| 660 | case 0x7: |
| 661 | printf(" User Area Enabled for boot\n"); |
| 662 | break; |
| 663 | } |
| 664 | switch (reg & EXT_CSD_BOOT_CFG_ACC) { |
| 665 | case 0x0: |
| 666 | printf(" No access to boot partition\n"); |
| 667 | break; |
| 668 | case 0x1: |
| 669 | printf(" R/W Boot Partition 1\n"); |
| 670 | break; |
| 671 | case 0x2: |
| 672 | printf(" R/W Boot Partition 2\n"); |
| 673 | break; |
Mario Schuknecht | 8c0c40d | 2013-05-15 08:28:04 +0200 | [diff] [blame] | 674 | case 0x3: |
| 675 | printf(" R/W Replay Protected Memory Block (RPMB)\n"); |
| 676 | break; |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 677 | default: |
Mario Schuknecht | 8c0c40d | 2013-05-15 08:28:04 +0200 | [diff] [blame] | 678 | printf(" Access to General Purpose partition %d\n", |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 679 | (reg & EXT_CSD_BOOT_CFG_ACC) - 3); |
| 680 | break; |
| 681 | } |
| 682 | |
| 683 | printf("Boot config protection [BOOT_CONFIG_PROT: 0x%02x]\n", |
| 684 | ext_csd[178]); |
| 685 | printf("Boot bus Conditions [BOOT_BUS_CONDITIONS: 0x%02x]\n", |
| 686 | ext_csd[177]); |
| 687 | printf("High-density erase group definition" |
| 688 | " [ERASE_GROUP_DEF: 0x%02x]\n", ext_csd[175]); |
| 689 | |
Chris Ball | b9c7a17 | 2012-02-20 12:34:25 -0500 | [diff] [blame] | 690 | print_writeprotect_status(ext_csd); |
| 691 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 692 | if (ext_csd_rev >= 5) { |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 693 | /* A441]: reserved [172] */ |
| 694 | printf("User area write protection register" |
| 695 | " [USER_WP]: 0x%02x\n", ext_csd[171]); |
| 696 | /* A441]: reserved [170] */ |
| 697 | printf("FW configuration [FW_CONFIG]: 0x%02x\n", ext_csd[169]); |
| 698 | printf("RPMB Size [RPMB_SIZE_MULT]: 0x%02x\n", ext_csd[168]); |
| 699 | printf("Write reliability setting register" |
| 700 | " [WR_REL_SET]: 0x%02x\n", ext_csd[167]); |
| 701 | printf("Write reliability parameter register" |
| 702 | " [WR_REL_PARAM]: 0x%02x\n", ext_csd[166]); |
| 703 | /* sanitize_start ext_csd[165]]: not readable |
| 704 | * bkops_start ext_csd[164]]: only writable */ |
| 705 | printf("Enable background operations handshake" |
| 706 | " [BKOPS_EN]: 0x%02x\n", ext_csd[163]); |
| 707 | printf("H/W reset function" |
| 708 | " [RST_N_FUNCTION]: 0x%02x\n", ext_csd[162]); |
| 709 | printf("HPI management [HPI_MGMT]: 0x%02x\n", ext_csd[161]); |
Ben Gardiner | 82bd950 | 2013-06-27 11:04:10 -0400 | [diff] [blame] | 710 | reg = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 711 | printf("Partitioning Support [PARTITIONING_SUPPORT]: 0x%02x\n", |
| 712 | reg); |
Ben Gardiner | 82bd950 | 2013-06-27 11:04:10 -0400 | [diff] [blame] | 713 | if (reg & EXT_CSD_PARTITIONING_EN) |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 714 | printf(" Device support partitioning feature\n"); |
| 715 | else |
| 716 | printf(" Device NOT support partitioning feature\n"); |
Ben Gardiner | 82bd950 | 2013-06-27 11:04:10 -0400 | [diff] [blame] | 717 | if (reg & EXT_CSD_ENH_ATTRIBUTE_EN) |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 718 | printf(" Device can have enhanced tech.\n"); |
| 719 | else |
| 720 | printf(" Device cannot have enhanced tech.\n"); |
| 721 | |
| 722 | printf("Max Enhanced Area Size [MAX_ENH_SIZE_MULT]: 0x%06x\n", |
| 723 | (ext_csd[159] << 16) | (ext_csd[158] << 8) | |
| 724 | ext_csd[157]); |
| 725 | printf("Partitions attribute [PARTITIONS_ATTRIBUTE]: 0x%02x\n", |
| 726 | ext_csd[156]); |
Ben Gardiner | a6cd98d | 2013-05-30 17:12:46 -0400 | [diff] [blame] | 727 | reg = ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED]; |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 728 | printf("Partitioning Setting" |
| 729 | " [PARTITION_SETTING_COMPLETED]: 0x%02x\n", |
Ben Gardiner | a6cd98d | 2013-05-30 17:12:46 -0400 | [diff] [blame] | 730 | reg); |
| 731 | if (reg) |
| 732 | printf(" Device partition setting complete\n"); |
| 733 | else |
| 734 | printf(" Device partition setting NOT complete\n"); |
| 735 | |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 736 | printf("General Purpose Partition Size\n" |
| 737 | " [GP_SIZE_MULT_4]: 0x%06x\n", (ext_csd[154] << 16) | |
| 738 | (ext_csd[153] << 8) | ext_csd[152]); |
| 739 | printf(" [GP_SIZE_MULT_3]: 0x%06x\n", (ext_csd[151] << 16) | |
| 740 | (ext_csd[150] << 8) | ext_csd[149]); |
| 741 | printf(" [GP_SIZE_MULT_2]: 0x%06x\n", (ext_csd[148] << 16) | |
| 742 | (ext_csd[147] << 8) | ext_csd[146]); |
| 743 | printf(" [GP_SIZE_MULT_1]: 0x%06x\n", (ext_csd[145] << 16) | |
| 744 | (ext_csd[144] << 8) | ext_csd[143]); |
| 745 | |
| 746 | printf("Enhanced User Data Area Size" |
| 747 | " [ENH_SIZE_MULT]: 0x%06x\n", (ext_csd[142] << 16) | |
| 748 | (ext_csd[141] << 8) | ext_csd[140]); |
| 749 | printf("Enhanced User Data Start Address" |
| 750 | " [ENH_START_ADDR]: 0x%06x\n", (ext_csd[139] << 16) | |
| 751 | (ext_csd[138] << 8) | ext_csd[137]); |
| 752 | |
| 753 | /* A441]: reserved [135] */ |
| 754 | printf("Bad Block Management mode" |
| 755 | " [SEC_BAD_BLK_MGMNT]: 0x%02x\n", ext_csd[134]); |
| 756 | /* A441: reserved [133:0] */ |
| 757 | } |
| 758 | /* B45 */ |
| 759 | if (ext_csd_rev >= 6) { |
| 760 | int j; |
| 761 | /* tcase_support ext_csd[132] not readable */ |
| 762 | printf("Periodic Wake-up [PERIODIC_WAKEUP]: 0x%02x\n", |
| 763 | ext_csd[131]); |
| 764 | printf("Program CID/CSD in DDR mode support" |
| 765 | " [PROGRAM_CID_CSD_DDR_SUPPORT]: 0x%02x\n", |
| 766 | ext_csd[130]); |
| 767 | |
| 768 | for (j = 127; j >= 64; j--) |
| 769 | printf("Vendor Specific Fields" |
| 770 | " [VENDOR_SPECIFIC_FIELD[%d]]: 0x%02x\n", |
| 771 | j, ext_csd[j]); |
| 772 | |
| 773 | printf("Native sector size [NATIVE_SECTOR_SIZE]: 0x%02x\n", |
| 774 | ext_csd[63]); |
| 775 | printf("Sector size emulation [USE_NATIVE_SECTOR]: 0x%02x\n", |
| 776 | ext_csd[62]); |
| 777 | printf("Sector size [DATA_SECTOR_SIZE]: 0x%02x\n", ext_csd[61]); |
| 778 | printf("1st initialization after disabling sector" |
| 779 | " size emulation [INI_TIMEOUT_EMU]: 0x%02x\n", |
| 780 | ext_csd[60]); |
| 781 | printf("Class 6 commands control [CLASS_6_CTRL]: 0x%02x\n", |
| 782 | ext_csd[59]); |
| 783 | printf("Number of addressed group to be Released" |
| 784 | "[DYNCAP_NEEDED]: 0x%02x\n", ext_csd[58]); |
| 785 | printf("Exception events control" |
| 786 | " [EXCEPTION_EVENTS_CTRL]: 0x%04x\n", |
| 787 | (ext_csd[57] << 8) | ext_csd[56]); |
| 788 | printf("Exception events status" |
| 789 | "[EXCEPTION_EVENTS_STATUS]: 0x%04x\n", |
| 790 | (ext_csd[55] << 8) | ext_csd[54]); |
| 791 | printf("Extended Partitions Attribute" |
| 792 | " [EXT_PARTITIONS_ATTRIBUTE]: 0x%04x\n", |
| 793 | (ext_csd[53] << 8) | ext_csd[52]); |
| 794 | |
| 795 | for (j = 51; j >= 37; j--) |
| 796 | printf("Context configuration" |
| 797 | " [CONTEXT_CONF[%d]]: 0x%02x\n", j, ext_csd[j]); |
| 798 | |
| 799 | printf("Packed command status" |
| 800 | " [PACKED_COMMAND_STATUS]: 0x%02x\n", ext_csd[36]); |
| 801 | printf("Packed command failure index" |
| 802 | " [PACKED_FAILURE_INDEX]: 0x%02x\n", ext_csd[35]); |
| 803 | printf("Power Off Notification" |
| 804 | " [POWER_OFF_NOTIFICATION]: 0x%02x\n", ext_csd[34]); |
Oleg Matcovschi | 64f63a3 | 2013-05-23 17:11:07 -0700 | [diff] [blame] | 805 | printf("Control to turn the Cache ON/OFF" |
| 806 | " [CACHE_CTRL]: 0x%02x\n", ext_csd[33]); |
Giuseppe CAVALLARO | a5bf4a2 | 2012-02-20 09:45:29 +0100 | [diff] [blame] | 807 | /* flush_cache ext_csd[32] not readable */ |
| 808 | /*Reserved [31:0] */ |
| 809 | } |
| 810 | |
| 811 | out_free: |
Johan RUDHOLM | a8bfde7 | 2012-02-12 11:46:44 -0500 | [diff] [blame] | 812 | return ret; |
| 813 | } |
Yaniv Gardi | 21bb473 | 2013-05-26 13:25:33 -0400 | [diff] [blame] | 814 | |
| 815 | int do_sanitize(int nargs, char **argv) |
| 816 | { |
| 817 | int fd, ret; |
| 818 | char *device; |
| 819 | |
| 820 | CHECK(nargs != 2, "Usage: mmc sanitize </path/to/mmcblkX>\n", |
| 821 | exit(1)); |
| 822 | |
| 823 | device = argv[1]; |
| 824 | |
| 825 | fd = open(device, O_RDWR); |
| 826 | if (fd < 0) { |
| 827 | perror("open"); |
| 828 | exit(1); |
| 829 | } |
| 830 | |
| 831 | ret = write_extcsd_value(fd, EXT_CSD_SANITIZE_START, 1); |
| 832 | if (ret) { |
| 833 | fprintf(stderr, "Could not write 0x%02x to EXT_CSD[%d] in %s\n", |
| 834 | 1, EXT_CSD_SANITIZE_START, device); |
| 835 | exit(1); |
| 836 | } |
| 837 | |
| 838 | return ret; |
| 839 | |
| 840 | } |
| 841 | |