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gerrit-public.fairphone.software / platform / external / u-boot / 9e971632cd6dae4fc2b30c600ff5650ecf8944f1 / . / arch / powerpc / include / asm / fsl_secure_boot.h
blob: d69caea26dccd8f694f82295f5559f6562abd553 [file] [log] [blame]
Ruchika Gupta7065b7d2010-12-15 17:02:08 +0000[diff] [blame]1/*
2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +0200[diff] [blame]4 * SPDX-License-Identifier: GPL-2.0+
Ruchika Gupta7065b7d2010-12-15 17:02:08 +0000[diff] [blame]5 */
6
7#ifndef __FSL_SECURE_BOOT_H
8#define __FSL_SECURE_BOOT_H
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]9#include <asm/config_mpc85xx.h>
10
11#ifdef CONFIG_SECURE_BOOT
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]12
13#ifndef CONFIG_FIT_SIGNATURE
14#define CONFIG_CHAIN_OF_TRUST
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]15#endif
Ruchika Gupta7065b7d2010-12-15 17:02:08 +0000[diff] [blame]16
Ruchika Gupta7065b7d2010-12-15 17:02:08 +0000[diff] [blame]17#if defined(CONFIG_FSL_CORENET)
18#define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
Aneesh Bansalf978f7c2014-03-12 00:07:27 +0530[diff] [blame]19#elif defined(CONFIG_BSC9132QDS)
20#define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
Aneesh Bansalb3f0f632014-12-12 15:35:04 +0530[diff] [blame]21#elif defined(CONFIG_C29XPCIE)
22#define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
Ruchika Gupta7065b7d2010-12-15 17:02:08 +0000[diff] [blame]23#else
24#define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
25#endif
26#define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
27
Aneesh Bansalca4819d2014-03-18 23:40:59 +0530[diff] [blame]28#if defined(CONFIG_B4860QDS) || \
29 defined(CONFIG_T4240QDS) || \
Aneesh Bansal2d8db6d2014-03-18 23:41:14 +0530[diff] [blame]30 defined(CONFIG_T2080QDS) || \
Aneesh Bansale47c2a62014-04-22 15:17:06 +0530[diff] [blame]31 defined(CONFIG_T2080RDB) || \
Aneesh Bansal2d8db6d2014-03-18 23:41:14 +0530[diff] [blame]32 defined(CONFIG_T1040QDS) || \
gaurav ranae622d9e2015-03-26 15:52:47 +0530[diff] [blame]33 defined(CONFIG_T104xD4QDS) || \
Shengzhou Liuf6050792014-11-24 17:11:54 +0800[diff] [blame]34 defined(CONFIG_T104xRDB) || \
gaurav ranae622d9e2015-03-26 15:52:47 +0530[diff] [blame]35 defined(CONFIG_T104xD4RDB) || \
Shengzhou Liuf6050792014-11-24 17:11:54 +0800[diff] [blame]36 defined(CONFIG_PPC_T1023) || \
37 defined(CONFIG_PPC_T1024)
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530[diff] [blame]38#define CONFIG_SYS_CPC_REINIT_F
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]39#define CONFIG_KEY_REVOCATION
Aneesh Bansalfb4a2402014-03-18 23:40:26 +0530[diff] [blame]40#undef CONFIG_SYS_INIT_L3_ADDR
41#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
42#endif
43
Aneesh Bansal467a40d2015-06-16 10:36:00 +0530[diff] [blame]44#if defined(CONFIG_RAMBOOT_PBL)
45#undef CONFIG_SYS_INIT_L3_ADDR
46#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
47#endif
48
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]49#if defined(CONFIG_C29XPCIE)
50#define CONFIG_KEY_REVOCATION
51#endif
52
53#if defined(CONFIG_PPC_P3041) || \
54 defined(CONFIG_PPC_P4080) || \
55 defined(CONFIG_PPC_P5020) || \
56 defined(CONFIG_PPC_P5040) || \
57 defined(CONFIG_PPC_P2041)
58 #define CONFIG_FSL_TRUST_ARCH_v1
59#endif
60
Aneesh Bansal2ed948f2015-07-31 14:10:03 +0530[diff] [blame]61#if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT)
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]62/* The key used for verification of next level images
63 * is picked up from an Extension Table which has
64 * been verified by the ISBC (Internal Secure boot Code)
Aneesh Bansal2ed948f2015-07-31 14:10:03 +0530[diff] [blame]65 * in boot ROM of the SoC.
66 * The feature is only applicable in case of NOR boot and is
67 * not applicable in case of RAMBOOT (NAND, SD, SPI).
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]68 */
69#define CONFIG_FSL_ISBC_KEY_EXT
70#endif
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]71#endif /* #ifdef CONFIG_SECURE_BOOT */
gaurav ranae04916a2015-02-27 09:46:17 +0530[diff] [blame]72
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]73#ifdef CONFIG_CHAIN_OF_TRUST
74
75#define CONFIG_CMD_ESBC_VALIDATE
76#define CONFIG_CMD_BLOB
77#define CONFIG_FSL_SEC_MON
78#define CONFIG_SHA_PROG_HW_ACCEL
79#define CONFIG_RSA
80#define CONFIG_RSA_FREESCALE_EXP
81
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]82#ifndef CONFIG_FSL_CAAM
83#define CONFIG_FSL_CAAM
84#endif
85
Aneesh Bansald0a6d7c2016-01-22 16:37:27 +0530[diff] [blame]86/* fsl_setenv_chain_of_trust() must be called from
87 * board_late_init()
88 */
89#ifndef CONFIG_BOARD_LATE_INIT
90#define CONFIG_BOARD_LATE_INIT
91#endif
92
Aneesh Bansal5050f6f2015-06-16 10:36:43 +0530[diff] [blame]93/* If Boot Script is not on NOR and is required to be copied on RAM */
94#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
95#define CONFIG_BS_HDR_ADDR_RAM 0x00010000
96#define CONFIG_BS_HDR_ADDR_FLASH 0x00800000
97#define CONFIG_BS_HDR_SIZE 0x00002000
98#define CONFIG_BS_ADDR_RAM 0x00012000
99#define CONFIG_BS_ADDR_FLASH 0x00802000
100#define CONFIG_BS_SIZE 0x00001000
101
102#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
103#else
104
gaurav rana98cb0ef2015-03-10 14:08:50 +0530[diff] [blame]105/* The bootscript header address is different for B4860 because the NOR
106 * mapping is different on B4 due to reduced NOR size.
107 */
108#if defined(CONFIG_B4860QDS)
109#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000
110#elif defined(CONFIG_FSL_CORENET)
111#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000
112#elif defined(CONFIG_BSC9132QDS)
113#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000
114#elif defined(CONFIG_C29XPCIE)
115#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000
116#else
117#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000
118#endif
119
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]120#endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */
Aneesh Bansal5050f6f2015-06-16 10:36:43 +0530[diff] [blame]121
Aneesh Bansalbdc22072016-01-22 16:37:24 +0530[diff] [blame]122#include <config_fsl_chain_trust.h>
123#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
Po Liu0d2cff22013-08-21 14:20:21 +0800[diff] [blame]124#endif