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sewardj2019a972011-03-07 16:04:07 +00001/* -*- mode: C; c-basic-offset: 3; -*- */
2
3/*---------------------------------------------------------------*/
4/*--- begin guest_s390_toIR.c ---*/
5/*---------------------------------------------------------------*/
6
7/*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
10
11 Copyright IBM Corp. 2010-2011
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29*/
30
31/* Contributed by Florian Krohm and Christian Borntraeger */
32
33/* Translates s390 code to IR. */
34
35#include "libvex_basictypes.h"
36#include "libvex_ir.h"
37#include "libvex_guest_s390x.h" /* VexGuestS390XState */
38#include "libvex.h" /* needed for bb_to_IR.h */
39#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
40
41#include "main_util.h" /* vassert */
42#include "main_globals.h" /* vex_traceflags */
43#include "guest_generic_bb_to_IR.h" /* DisResult */
44#include "guest_s390_defs.h" /* prototypes for this file's functions */
45#include "host_s390_disasm.h"
46#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
47
sewardj2019a972011-03-07 16:04:07 +000048
49/*------------------------------------------------------------*/
50/*--- Globals ---*/
51/*------------------------------------------------------------*/
52
53/* The IRSB* into which we're generating code. */
54static IRSB *irsb;
55
56/* The guest address for the instruction currently being
57 translated. */
58static Addr64 guest_IA_curr_instr;
59
60/* The guest address for the instruction following the current instruction. */
61static Addr64 guest_IA_next_instr;
62
63/* Result of disassembly step. */
64static DisResult *dis_res;
65
66/* The last seen execute target instruction */
67ULong last_execute_target;
68
69/* The possible outcomes of a decoding operation */
70typedef enum {
71 S390_DECODE_OK,
72 S390_DECODE_UNKNOWN_INSN,
73 S390_DECODE_UNIMPLEMENTED_INSN,
74 S390_DECODE_UNKNOWN_SPECIAL_INSN,
75 S390_DECODE_ERROR
76} s390_decode_t;
77
78/*------------------------------------------------------------*/
79/*--- Helpers for constructing IR. ---*/
80/*------------------------------------------------------------*/
81
82/* Sign extend a value with the given number of bits. This is a
83 macro because it allows us to overload the type of the value.
84 Note that VALUE must have a signed type! */
85#undef sign_extend
86#define sign_extend(value,num_bits) \
87(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
88 (sizeof(__typeof__(value)) * 8 - (num_bits)))
89
90
91/* Add a statement to the current irsb. */
92static __inline__ void
93stmt(IRStmt *st)
94{
95 addStmtToIRSB(irsb, st);
96}
97
98/* Allocate a new temporary of the given type. */
99static __inline__ IRTemp
100newTemp(IRType type)
101{
102 vassert(isPlausibleIRType(type));
103
104 return newIRTemp(irsb->tyenv, type);
105}
106
107/* Create an expression node for a temporary */
108static __inline__ IRExpr *
109mkexpr(IRTemp tmp)
110{
111 return IRExpr_RdTmp(tmp);
112}
113
114/* Add a statement that assigns to a temporary */
115static __inline__ void
116assign(IRTemp dst, IRExpr *expr)
117{
118 stmt(IRStmt_WrTmp(dst, expr));
119}
120
121/* Create a temporary of the given type and assign the expression to it */
122static __inline__ IRTemp
123mktemp(IRType type, IRExpr *expr)
124{
125 IRTemp temp = newTemp(type);
126
127 assign(temp, expr);
128
129 return temp;
130}
131
132/* Create a unary expression */
133static __inline__ IRExpr *
134unop(IROp kind, IRExpr *op)
135{
136 return IRExpr_Unop(kind, op);
137}
138
139/* Create a binary expression */
140static __inline__ IRExpr *
141binop(IROp kind, IRExpr *op1, IRExpr *op2)
142{
143 return IRExpr_Binop(kind, op1, op2);
144}
145
146/* Create a ternary expression */
147static __inline__ IRExpr *
148triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
149{
150 return IRExpr_Triop(kind, op1, op2, op3);
151}
152
153/* Create a quaternary expression */
154static __inline__ IRExpr *
155qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
156{
157 return IRExpr_Qop(kind, op1, op2, op3, op4);
158}
159
160/* Create an expression node for an 8-bit integer constant */
161static __inline__ IRExpr *
162mkU8(UInt value)
163{
164 vassert(value < 256);
165
166 return IRExpr_Const(IRConst_U8((UChar)value));
167}
168
169/* Create an expression node for a 16-bit integer constant */
170static __inline__ IRExpr *
171mkU16(UInt value)
172{
173 vassert(value < 65536);
174
175 return IRExpr_Const(IRConst_U16((UShort)value));
176}
177
178/* Create an expression node for a 32-bit integer constant */
179static __inline__ IRExpr *
180mkU32(UInt value)
181{
182 return IRExpr_Const(IRConst_U32(value));
183}
184
185/* Create an expression node for a 64-bit integer constant */
186static __inline__ IRExpr *
187mkU64(ULong value)
188{
189 return IRExpr_Const(IRConst_U64(value));
190}
191
192/* Create an expression node for a 32-bit floating point constant
193 whose value is given by a bit pattern. */
194static __inline__ IRExpr *
195mkF32i(UInt value)
196{
197 return IRExpr_Const(IRConst_F32i(value));
198}
199
200/* Create an expression node for a 32-bit floating point constant
201 whose value is given by a bit pattern. */
202static __inline__ IRExpr *
203mkF64i(ULong value)
204{
205 return IRExpr_Const(IRConst_F64i(value));
206}
207
208/* Little helper function for my sanity. ITE = if-then-else */
209static IRExpr *
210mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
211{
212 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
213
214 return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
215}
216
217/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
218static void __inline__
219store(IRExpr *addr, IRExpr *data)
220{
221 stmt(IRStmt_Store(Iend_BE, addr, data));
222}
223
224/* Create an expression that loads a TYPE sized value from ADDR.
225 This is a big-endian machine. */
226static __inline__ IRExpr *
227load(IRType type, IRExpr *addr)
228{
229 return IRExpr_Load(Iend_BE, type, addr);
230}
231
232/* Function call */
233static void
234call_function(IRExpr *callee_address)
235{
236 irsb->next = callee_address;
237 irsb->jumpkind = Ijk_Call;
238
239 dis_res->whatNext = Dis_StopHere;
240}
241
242/* Function return sequence */
243static void
244return_from_function(IRExpr *return_address)
245{
246 irsb->next = return_address;
247 irsb->jumpkind = Ijk_Ret;
248
249 dis_res->whatNext = Dis_StopHere;
250}
251
252/* A conditional branch whose target is not known at instrumentation time.
253
254 if (condition) goto computed_target;
255
256 Needs to be represented as:
257
258 if (! condition) goto next_instruction;
259 goto computed_target;
260
261 This inversion is being handled at code generation time. So we just
262 take the condition here as is.
263*/
264static void
265if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
266{
267 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
268
269 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
270
271 irsb->next = target;
272 irsb->jumpkind = Ijk_Boring;
273
274 dis_res->whatNext = Dis_StopHere;
275}
276
277/* A conditional branch whose target is known at instrumentation time. */
278static void
279if_condition_goto(IRExpr *condition, Addr64 target)
280{
281 vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
282
283 stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
284 dis_res->whatNext = Dis_Continue;
285}
286
287/* An unconditional branch. Target may or may not be known at instrumentation
288 time. */
289static void
290always_goto(IRExpr *target)
291{
292 irsb->next = target;
293 irsb->jumpkind = Ijk_Boring;
294
295 dis_res->whatNext = Dis_StopHere;
296}
297
298/* A system call */
299static void
300system_call(IRExpr *sysno)
301{
302 /* Store the system call number in the pseudo register. */
303 stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
304
sewardj69007022011-04-28 20:13:45 +0000305 /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so. */
sewardj2019a972011-03-07 16:04:07 +0000306 stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
307
308 /* It's important that all ArchRegs carry their up-to-date value
309 at this point. So we declare an end-of-block here, which
310 forces any TempRegs caching ArchRegs to be flushed. */
311 irsb->next = mkU64(guest_IA_next_instr);
312
313 irsb->jumpkind = Ijk_Sys_syscall;
314
315 dis_res->whatNext = Dis_StopHere;
316}
317
318/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
319 instructions to VEX's IRRoundingMode. */
320static IRRoundingMode
321encode_rounding_mode(UChar mode)
322{
323 switch (mode) {
324 case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
325 case S390_ROUND_ZERO: return Irrm_ZERO;
326 case S390_ROUND_POSINF: return Irrm_PosINF;
327 case S390_ROUND_NEGINF: return Irrm_NegINF;
328 }
329 vpanic("encode_rounding_mode");
330}
331
332static __inline__ IRExpr *get_fpr_dw0(UInt);
333static __inline__ void put_fpr_dw0(UInt, IRExpr *);
334
335/* Read a floating point register pair and combine their contents into a
336 128-bit value */
337static IRExpr *
338get_fpr_pair(UInt archreg)
339{
340 IRExpr *high = get_fpr_dw0(archreg);
341 IRExpr *low = get_fpr_dw0(archreg + 2);
342
343 return binop(Iop_F64HLtoF128, high, low);
344}
345
346/* Write a 128-bit floating point value into a register pair. */
347static void
348put_fpr_pair(UInt archreg, IRExpr *expr)
349{
350 IRExpr *high = unop(Iop_F128HItoF64, expr);
351 IRExpr *low = unop(Iop_F128LOtoF64, expr);
352
353 put_fpr_dw0(archreg, high);
354 put_fpr_dw0(archreg + 2, low);
355}
356
357
358/* Flags thunk offsets */
359#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP)
360#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1)
361#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2)
362#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP)
363
364/*------------------------------------------------------------*/
365/*--- Build the flags thunk. ---*/
366/*------------------------------------------------------------*/
367
368/* Completely fill the flags thunk. We're always filling all fields.
369 Apparently, that is better for redundant PUT elimination. */
370static void
371s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
372{
373 UInt op_off, dep1_off, dep2_off, ndep_off;
374
375 op_off = S390X_GUEST_OFFSET_CC_OP;
376 dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
377 dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
378 ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
379
380 stmt(IRStmt_Put(op_off, op));
381 stmt(IRStmt_Put(dep1_off, dep1));
382 stmt(IRStmt_Put(dep2_off, dep2));
383 stmt(IRStmt_Put(ndep_off, ndep));
384}
385
386
387/* Create an expression for V and widen the result to 64 bit. */
388static IRExpr *
389s390_cc_widen(IRTemp v, Bool sign_extend)
390{
391 IRExpr *expr;
392
393 expr = mkexpr(v);
394
395 switch (typeOfIRTemp(irsb->tyenv, v)) {
396 case Ity_I64:
397 break;
398 case Ity_I32:
399 expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
400 break;
401 case Ity_I16:
402 expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
403 break;
404 case Ity_I8:
405 expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
406 break;
407 default:
408 vpanic("s390_cc_widen");
409 }
410
411 return expr;
412}
413
414static void
415s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
416{
417 IRExpr *op, *dep1, *dep2, *ndep;
418
419 op = mkU64(opc);
420 dep1 = s390_cc_widen(d1, sign_extend);
421 dep2 = mkU64(0);
422 ndep = mkU64(0);
423
424 s390_cc_thunk_fill(op, dep1, dep2, ndep);
425}
426
427
428static void
429s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
430{
431 IRExpr *op, *dep1, *dep2, *ndep;
432
433 op = mkU64(opc);
434 dep1 = s390_cc_widen(d1, sign_extend);
435 dep2 = s390_cc_widen(d2, sign_extend);
436 ndep = mkU64(0);
437
438 s390_cc_thunk_fill(op, dep1, dep2, ndep);
439}
440
441
442/* memcheck believes that the NDEP field in the flags thunk is always
443 defined. But for some flag computations (e.g. add with carry) that is
444 just not true. We therefore need to convey to memcheck that the value
445 of the ndep field does matter and therefore we make the DEP2 field
446 depend on it:
447
448 DEP2 = original_DEP2 ^ NDEP
449
450 In s390_calculate_cc we exploit that (a^b)^b == a
451 I.e. we xor the DEP2 value with the NDEP value to recover the
452 original_DEP2 value. */
453static void
454s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
455{
456 IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
457
458 op = mkU64(opc);
459 dep1 = s390_cc_widen(d1, sign_extend);
460 dep2 = s390_cc_widen(d2, sign_extend);
461 ndep = s390_cc_widen(nd, sign_extend);
462
463 dep2x = binop(Iop_Xor64, dep2, ndep);
464
465 s390_cc_thunk_fill(op, dep1, dep2x, ndep);
466}
467
468
469/* Write one floating point value into the flags thunk */
470static void
471s390_cc_thunk_put1f(UInt opc, IRTemp d1)
472{
473 IRExpr *op, *dep1, *dep2, *ndep;
474
475 op = mkU64(opc);
476 dep1 = mkexpr(d1);
477 dep2 = mkU64(0);
478 ndep = mkU64(0);
479
480 s390_cc_thunk_fill(op, dep1, dep2, ndep);
481}
482
483
484/* Write a floating point value and an integer into the flags thunk. The
485 integer value is zero-extended first. */
486static void
487s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
488{
489 IRExpr *op, *dep1, *dep2, *ndep;
490
491 op = mkU64(opc);
492 dep1 = mkexpr(d1);
493 dep2 = s390_cc_widen(d2, False);
494 ndep = mkU64(0);
495
496 s390_cc_thunk_fill(op, dep1, dep2, ndep);
497}
498
499
500/* Write a 128-bit floating point value into the flags thunk. This is
501 done by splitting the value into two 64-bits values. */
502static void
503s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
504{
505 IRExpr *op, *hi, *lo, *ndep;
506
507 op = mkU64(opc);
508 hi = unop(Iop_F128HItoF64, mkexpr(d1));
509 lo = unop(Iop_F128LOtoF64, mkexpr(d1));
510 ndep = mkU64(0);
511
512 s390_cc_thunk_fill(op, hi, lo, ndep);
513}
514
515
516/* Write a 128-bit floating point value and an integer into the flags thunk.
517 The integer value is zero-extended first. */
518static void
519s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
520{
521 IRExpr *op, *hi, *lo, *lox, *ndep;
522
523 op = mkU64(opc);
524 hi = unop(Iop_F128HItoF64, mkexpr(d1));
525 lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
526 ndep = s390_cc_widen(nd, False);
527
528 lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
529
530 s390_cc_thunk_fill(op, hi, lox, ndep);
531}
532
533
534static void
535s390_cc_set(UInt val)
536{
537 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
538 mkU64(val), mkU64(0), mkU64(0));
539}
540
541/* Build IR to calculate the condition code from flags thunk.
542 Returns an expression of type Ity_I32 */
543static IRExpr *
544s390_call_calculate_cc(void)
545{
546 IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
547
548 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
549 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
550 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
551 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
552
553 args = mkIRExprVec_4(op, dep1, dep2, ndep);
554 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
555 "s390_calculate_cc", &s390_calculate_cc, args);
556
557 /* Exclude OP and NDEP from definedness checking. We're only
558 interested in DEP1 and DEP2. */
559 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
560
561 return call;
562}
563
564/* Build IR to calculate the internal condition code for a "compare and branch"
565 insn. Returns an expression of type Ity_I32 */
566static IRExpr *
567s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
568{
569 IRExpr **args, *call, *op, *dep1, *dep2;
570
571 op = mkU64(opc);
572 dep1 = s390_cc_widen(op1, sign_extend);
573 dep2 = s390_cc_widen(op2, sign_extend);
574
575 args = mkIRExprVec_3(op, dep1, dep2);
576 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
577 "s390_calculate_icc", &s390_calculate_icc, args);
578
579 /* Exclude OP from definedness checking. We're only
580 interested in DEP1 and DEP2. */
581 call->Iex.CCall.cee->mcx_mask = (1<<0);
582
583 return call;
584}
585
586/* Build IR to calculate the condition code from flags thunk.
587 Returns an expression of type Ity_I32 */
588static IRExpr *
589s390_call_calculate_cond(UInt m)
590{
591 IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
592
593 mask = mkU64(m);
594 op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
595 dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
596 dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
597 ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
598
599 args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
600 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
601 "s390_calculate_cond", &s390_calculate_cond, args);
602
603 /* Exclude the requested condition, OP and NDEP from definedness
604 checking. We're only interested in DEP1 and DEP2. */
605 call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
606
607 return call;
608}
609
610#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
611#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
612#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
613#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
614#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
615#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
616#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
617 s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
618#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
619 s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
620#define s390_call_calculate_iccZZ(op,dep1,dep2) \
621 s390_call_calculate_icc(op,dep1,dep2,False)
622#define s390_call_calculate_iccSS(op,dep1,dep2) \
623 s390_call_calculate_icc(op,dep1,dep2,True)
624
625
626#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART)
627#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN)
628
629
630/*------------------------------------------------------------*/
631/*--- Guest register access ---*/
632/*------------------------------------------------------------*/
633
634
635/*------------------------------------------------------------*/
636/*--- ar registers ---*/
637/*------------------------------------------------------------*/
638
639/* Return the guest state offset of a ar register. */
640static UInt
641ar_offset(UInt archreg)
642{
643 static const UInt offset[16] = {
644 offsetof(VexGuestS390XState, guest_a0),
645 offsetof(VexGuestS390XState, guest_a1),
646 offsetof(VexGuestS390XState, guest_a2),
647 offsetof(VexGuestS390XState, guest_a3),
648 offsetof(VexGuestS390XState, guest_a4),
649 offsetof(VexGuestS390XState, guest_a5),
650 offsetof(VexGuestS390XState, guest_a6),
651 offsetof(VexGuestS390XState, guest_a7),
652 offsetof(VexGuestS390XState, guest_a8),
653 offsetof(VexGuestS390XState, guest_a9),
654 offsetof(VexGuestS390XState, guest_a10),
655 offsetof(VexGuestS390XState, guest_a11),
656 offsetof(VexGuestS390XState, guest_a12),
657 offsetof(VexGuestS390XState, guest_a13),
658 offsetof(VexGuestS390XState, guest_a14),
659 offsetof(VexGuestS390XState, guest_a15),
660 };
661
662 vassert(archreg < 16);
663
664 return offset[archreg];
665}
666
667
668/* Return the guest state offset of word #0 of a ar register. */
669static __inline__ UInt
670ar_w0_offset(UInt archreg)
671{
672 return ar_offset(archreg) + 0;
673}
674
675/* Write word #0 of a ar to the guest state. */
676static __inline__ void
677put_ar_w0(UInt archreg, IRExpr *expr)
678{
679 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
680
681 stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
682}
683
684/* Read word #0 of a ar register. */
685static __inline__ IRExpr *
686get_ar_w0(UInt archreg)
687{
688 return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
689}
690
691
692/*------------------------------------------------------------*/
693/*--- fpr registers ---*/
694/*------------------------------------------------------------*/
695
696/* Return the guest state offset of a fpr register. */
697static UInt
698fpr_offset(UInt archreg)
699{
700 static const UInt offset[16] = {
701 offsetof(VexGuestS390XState, guest_f0),
702 offsetof(VexGuestS390XState, guest_f1),
703 offsetof(VexGuestS390XState, guest_f2),
704 offsetof(VexGuestS390XState, guest_f3),
705 offsetof(VexGuestS390XState, guest_f4),
706 offsetof(VexGuestS390XState, guest_f5),
707 offsetof(VexGuestS390XState, guest_f6),
708 offsetof(VexGuestS390XState, guest_f7),
709 offsetof(VexGuestS390XState, guest_f8),
710 offsetof(VexGuestS390XState, guest_f9),
711 offsetof(VexGuestS390XState, guest_f10),
712 offsetof(VexGuestS390XState, guest_f11),
713 offsetof(VexGuestS390XState, guest_f12),
714 offsetof(VexGuestS390XState, guest_f13),
715 offsetof(VexGuestS390XState, guest_f14),
716 offsetof(VexGuestS390XState, guest_f15),
717 };
718
719 vassert(archreg < 16);
720
721 return offset[archreg];
722}
723
724
725/* Return the guest state offset of word #0 of a fpr register. */
726static __inline__ UInt
727fpr_w0_offset(UInt archreg)
728{
729 return fpr_offset(archreg) + 0;
730}
731
732/* Write word #0 of a fpr to the guest state. */
733static __inline__ void
734put_fpr_w0(UInt archreg, IRExpr *expr)
735{
736 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
737
738 stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
739}
740
741/* Read word #0 of a fpr register. */
742static __inline__ IRExpr *
743get_fpr_w0(UInt archreg)
744{
745 return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
746}
747
748/* Return the guest state offset of double word #0 of a fpr register. */
749static __inline__ UInt
750fpr_dw0_offset(UInt archreg)
751{
752 return fpr_offset(archreg) + 0;
753}
754
755/* Write double word #0 of a fpr to the guest state. */
756static __inline__ void
757put_fpr_dw0(UInt archreg, IRExpr *expr)
758{
759 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
760
761 stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
762}
763
764/* Read double word #0 of a fpr register. */
765static __inline__ IRExpr *
766get_fpr_dw0(UInt archreg)
767{
768 return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
769}
770
771
772/*------------------------------------------------------------*/
773/*--- gpr registers ---*/
774/*------------------------------------------------------------*/
775
776/* Return the guest state offset of a gpr register. */
777static UInt
778gpr_offset(UInt archreg)
779{
780 static const UInt offset[16] = {
781 offsetof(VexGuestS390XState, guest_r0),
782 offsetof(VexGuestS390XState, guest_r1),
783 offsetof(VexGuestS390XState, guest_r2),
784 offsetof(VexGuestS390XState, guest_r3),
785 offsetof(VexGuestS390XState, guest_r4),
786 offsetof(VexGuestS390XState, guest_r5),
787 offsetof(VexGuestS390XState, guest_r6),
788 offsetof(VexGuestS390XState, guest_r7),
789 offsetof(VexGuestS390XState, guest_r8),
790 offsetof(VexGuestS390XState, guest_r9),
791 offsetof(VexGuestS390XState, guest_r10),
792 offsetof(VexGuestS390XState, guest_r11),
793 offsetof(VexGuestS390XState, guest_r12),
794 offsetof(VexGuestS390XState, guest_r13),
795 offsetof(VexGuestS390XState, guest_r14),
796 offsetof(VexGuestS390XState, guest_r15),
797 };
798
799 vassert(archreg < 16);
800
801 return offset[archreg];
802}
803
804
805/* Return the guest state offset of word #0 of a gpr register. */
806static __inline__ UInt
807gpr_w0_offset(UInt archreg)
808{
809 return gpr_offset(archreg) + 0;
810}
811
812/* Write word #0 of a gpr to the guest state. */
813static __inline__ void
814put_gpr_w0(UInt archreg, IRExpr *expr)
815{
816 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
817
818 stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
819}
820
821/* Read word #0 of a gpr register. */
822static __inline__ IRExpr *
823get_gpr_w0(UInt archreg)
824{
825 return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
826}
827
828/* Return the guest state offset of double word #0 of a gpr register. */
829static __inline__ UInt
830gpr_dw0_offset(UInt archreg)
831{
832 return gpr_offset(archreg) + 0;
833}
834
835/* Write double word #0 of a gpr to the guest state. */
836static __inline__ void
837put_gpr_dw0(UInt archreg, IRExpr *expr)
838{
839 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
840
841 stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
842}
843
844/* Read double word #0 of a gpr register. */
845static __inline__ IRExpr *
846get_gpr_dw0(UInt archreg)
847{
848 return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
849}
850
851/* Return the guest state offset of half word #1 of a gpr register. */
852static __inline__ UInt
853gpr_hw1_offset(UInt archreg)
854{
855 return gpr_offset(archreg) + 2;
856}
857
858/* Write half word #1 of a gpr to the guest state. */
859static __inline__ void
860put_gpr_hw1(UInt archreg, IRExpr *expr)
861{
862 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
863
864 stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
865}
866
867/* Read half word #1 of a gpr register. */
868static __inline__ IRExpr *
869get_gpr_hw1(UInt archreg)
870{
871 return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
872}
873
874/* Return the guest state offset of byte #6 of a gpr register. */
875static __inline__ UInt
876gpr_b6_offset(UInt archreg)
877{
878 return gpr_offset(archreg) + 6;
879}
880
881/* Write byte #6 of a gpr to the guest state. */
882static __inline__ void
883put_gpr_b6(UInt archreg, IRExpr *expr)
884{
885 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
886
887 stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
888}
889
890/* Read byte #6 of a gpr register. */
891static __inline__ IRExpr *
892get_gpr_b6(UInt archreg)
893{
894 return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
895}
896
897/* Return the guest state offset of byte #3 of a gpr register. */
898static __inline__ UInt
899gpr_b3_offset(UInt archreg)
900{
901 return gpr_offset(archreg) + 3;
902}
903
904/* Write byte #3 of a gpr to the guest state. */
905static __inline__ void
906put_gpr_b3(UInt archreg, IRExpr *expr)
907{
908 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
909
910 stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
911}
912
913/* Read byte #3 of a gpr register. */
914static __inline__ IRExpr *
915get_gpr_b3(UInt archreg)
916{
917 return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
918}
919
920/* Return the guest state offset of byte #0 of a gpr register. */
921static __inline__ UInt
922gpr_b0_offset(UInt archreg)
923{
924 return gpr_offset(archreg) + 0;
925}
926
927/* Write byte #0 of a gpr to the guest state. */
928static __inline__ void
929put_gpr_b0(UInt archreg, IRExpr *expr)
930{
931 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
932
933 stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
934}
935
936/* Read byte #0 of a gpr register. */
937static __inline__ IRExpr *
938get_gpr_b0(UInt archreg)
939{
940 return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
941}
942
943/* Return the guest state offset of word #1 of a gpr register. */
944static __inline__ UInt
945gpr_w1_offset(UInt archreg)
946{
947 return gpr_offset(archreg) + 4;
948}
949
950/* Write word #1 of a gpr to the guest state. */
951static __inline__ void
952put_gpr_w1(UInt archreg, IRExpr *expr)
953{
954 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
955
956 stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
957}
958
959/* Read word #1 of a gpr register. */
960static __inline__ IRExpr *
961get_gpr_w1(UInt archreg)
962{
963 return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
964}
965
966/* Return the guest state offset of half word #3 of a gpr register. */
967static __inline__ UInt
968gpr_hw3_offset(UInt archreg)
969{
970 return gpr_offset(archreg) + 6;
971}
972
973/* Write half word #3 of a gpr to the guest state. */
974static __inline__ void
975put_gpr_hw3(UInt archreg, IRExpr *expr)
976{
977 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
978
979 stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
980}
981
982/* Read half word #3 of a gpr register. */
983static __inline__ IRExpr *
984get_gpr_hw3(UInt archreg)
985{
986 return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
987}
988
989/* Return the guest state offset of byte #7 of a gpr register. */
990static __inline__ UInt
991gpr_b7_offset(UInt archreg)
992{
993 return gpr_offset(archreg) + 7;
994}
995
996/* Write byte #7 of a gpr to the guest state. */
997static __inline__ void
998put_gpr_b7(UInt archreg, IRExpr *expr)
999{
1000 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1001
1002 stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
1003}
1004
1005/* Read byte #7 of a gpr register. */
1006static __inline__ IRExpr *
1007get_gpr_b7(UInt archreg)
1008{
1009 return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
1010}
1011
1012/* Return the guest state offset of half word #0 of a gpr register. */
1013static __inline__ UInt
1014gpr_hw0_offset(UInt archreg)
1015{
1016 return gpr_offset(archreg) + 0;
1017}
1018
1019/* Write half word #0 of a gpr to the guest state. */
1020static __inline__ void
1021put_gpr_hw0(UInt archreg, IRExpr *expr)
1022{
1023 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1024
1025 stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
1026}
1027
1028/* Read half word #0 of a gpr register. */
1029static __inline__ IRExpr *
1030get_gpr_hw0(UInt archreg)
1031{
1032 return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
1033}
1034
1035/* Return the guest state offset of byte #4 of a gpr register. */
1036static __inline__ UInt
1037gpr_b4_offset(UInt archreg)
1038{
1039 return gpr_offset(archreg) + 4;
1040}
1041
1042/* Write byte #4 of a gpr to the guest state. */
1043static __inline__ void
1044put_gpr_b4(UInt archreg, IRExpr *expr)
1045{
1046 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1047
1048 stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
1049}
1050
1051/* Read byte #4 of a gpr register. */
1052static __inline__ IRExpr *
1053get_gpr_b4(UInt archreg)
1054{
1055 return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
1056}
1057
1058/* Return the guest state offset of byte #1 of a gpr register. */
1059static __inline__ UInt
1060gpr_b1_offset(UInt archreg)
1061{
1062 return gpr_offset(archreg) + 1;
1063}
1064
1065/* Write byte #1 of a gpr to the guest state. */
1066static __inline__ void
1067put_gpr_b1(UInt archreg, IRExpr *expr)
1068{
1069 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1070
1071 stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
1072}
1073
1074/* Read byte #1 of a gpr register. */
1075static __inline__ IRExpr *
1076get_gpr_b1(UInt archreg)
1077{
1078 return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
1079}
1080
1081/* Return the guest state offset of half word #2 of a gpr register. */
1082static __inline__ UInt
1083gpr_hw2_offset(UInt archreg)
1084{
1085 return gpr_offset(archreg) + 4;
1086}
1087
1088/* Write half word #2 of a gpr to the guest state. */
1089static __inline__ void
1090put_gpr_hw2(UInt archreg, IRExpr *expr)
1091{
1092 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
1093
1094 stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
1095}
1096
1097/* Read half word #2 of a gpr register. */
1098static __inline__ IRExpr *
1099get_gpr_hw2(UInt archreg)
1100{
1101 return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
1102}
1103
1104/* Return the guest state offset of byte #5 of a gpr register. */
1105static __inline__ UInt
1106gpr_b5_offset(UInt archreg)
1107{
1108 return gpr_offset(archreg) + 5;
1109}
1110
1111/* Write byte #5 of a gpr to the guest state. */
1112static __inline__ void
1113put_gpr_b5(UInt archreg, IRExpr *expr)
1114{
1115 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1116
1117 stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
1118}
1119
1120/* Read byte #5 of a gpr register. */
1121static __inline__ IRExpr *
1122get_gpr_b5(UInt archreg)
1123{
1124 return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
1125}
1126
1127/* Return the guest state offset of byte #2 of a gpr register. */
1128static __inline__ UInt
1129gpr_b2_offset(UInt archreg)
1130{
1131 return gpr_offset(archreg) + 2;
1132}
1133
1134/* Write byte #2 of a gpr to the guest state. */
1135static __inline__ void
1136put_gpr_b2(UInt archreg, IRExpr *expr)
1137{
1138 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
1139
1140 stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
1141}
1142
1143/* Read byte #2 of a gpr register. */
1144static __inline__ IRExpr *
1145get_gpr_b2(UInt archreg)
1146{
1147 return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
1148}
1149
1150/* Return the guest state offset of the counter register. */
1151static UInt
1152counter_offset(void)
1153{
1154 return offsetof(VexGuestS390XState, guest_counter);
1155}
1156
1157/* Return the guest state offset of double word #0 of the counter register. */
1158static __inline__ UInt
1159counter_dw0_offset(void)
1160{
1161 return counter_offset() + 0;
1162}
1163
1164/* Write double word #0 of the counter to the guest state. */
1165static __inline__ void
1166put_counter_dw0(IRExpr *expr)
1167{
1168 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
1169
1170 stmt(IRStmt_Put(counter_dw0_offset(), expr));
1171}
1172
1173/* Read double word #0 of the counter register. */
1174static __inline__ IRExpr *
1175get_counter_dw0(void)
1176{
1177 return IRExpr_Get(counter_dw0_offset(), Ity_I64);
1178}
1179
1180/* Return the guest state offset of word #0 of the counter register. */
1181static __inline__ UInt
1182counter_w0_offset(void)
1183{
1184 return counter_offset() + 0;
1185}
1186
1187/* Return the guest state offset of word #1 of the counter register. */
1188static __inline__ UInt
1189counter_w1_offset(void)
1190{
1191 return counter_offset() + 4;
1192}
1193
1194/* Write word #0 of the counter to the guest state. */
1195static __inline__ void
1196put_counter_w0(IRExpr *expr)
1197{
1198 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1199
1200 stmt(IRStmt_Put(counter_w0_offset(), expr));
1201}
1202
1203/* Read word #0 of the counter register. */
1204static __inline__ IRExpr *
1205get_counter_w0(void)
1206{
1207 return IRExpr_Get(counter_w0_offset(), Ity_I32);
1208}
1209
1210/* Write word #1 of the counter to the guest state. */
1211static __inline__ void
1212put_counter_w1(IRExpr *expr)
1213{
1214 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1215
1216 stmt(IRStmt_Put(counter_w1_offset(), expr));
1217}
1218
1219/* Read word #1 of the counter register. */
1220static __inline__ IRExpr *
1221get_counter_w1(void)
1222{
1223 return IRExpr_Get(counter_w1_offset(), Ity_I32);
1224}
1225
1226/* Return the guest state offset of the fpc register. */
1227static UInt
1228fpc_offset(void)
1229{
1230 return offsetof(VexGuestS390XState, guest_fpc);
1231}
1232
1233/* Return the guest state offset of word #0 of the fpc register. */
1234static __inline__ UInt
1235fpc_w0_offset(void)
1236{
1237 return fpc_offset() + 0;
1238}
1239
1240/* Write word #0 of the fpc to the guest state. */
1241static __inline__ void
1242put_fpc_w0(IRExpr *expr)
1243{
1244 vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
1245
1246 stmt(IRStmt_Put(fpc_w0_offset(), expr));
1247}
1248
1249/* Read word #0 of the fpc register. */
1250static __inline__ IRExpr *
1251get_fpc_w0(void)
1252{
1253 return IRExpr_Get(fpc_w0_offset(), Ity_I32);
1254}
1255
1256
1257/*------------------------------------------------------------*/
1258/*--- Build IR for formats ---*/
1259/*------------------------------------------------------------*/
1260static void
1261s390_format_I(HChar *(*irgen)(UChar i),
1262 UChar i)
1263{
1264 HChar *mnm = irgen(i);
1265
sewardj7ee97522011-05-09 21:45:04 +00001266 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001267 s390_disasm(ENC2(MNM, UINT), mnm, i);
1268}
1269
1270static void
1271s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
1272 UChar r1, UShort i2)
1273{
1274 irgen(r1, i2);
1275}
1276
1277static void
1278s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
1279 UChar r1, UShort i2)
1280{
1281 HChar *mnm = irgen(r1, i2);
1282
sewardj7ee97522011-05-09 21:45:04 +00001283 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001284 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1285}
1286
1287static void
1288s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
1289 UChar r1, UShort i2)
1290{
1291 HChar *mnm = irgen(r1, i2);
1292
sewardj7ee97522011-05-09 21:45:04 +00001293 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001294 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
1295}
1296
1297static void
1298s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
1299 UChar r1, UShort i2)
1300{
1301 HChar *mnm = irgen(r1, i2);
1302
sewardj7ee97522011-05-09 21:45:04 +00001303 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001304 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
1305}
1306
1307static void
1308s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1309 UChar r1, UChar r3, UShort i2)
1310{
1311 HChar *mnm = irgen(r1, r3, i2);
1312
sewardj7ee97522011-05-09 21:45:04 +00001313 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001314 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1315}
1316
1317static void
1318s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1319 UChar r1, UChar r3, UShort i2)
1320{
1321 HChar *mnm = irgen(r1, r3, i2);
1322
sewardj7ee97522011-05-09 21:45:04 +00001323 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001324 s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
1325}
1326
1327static void
1328s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
1329 UChar i5),
1330 UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
1331{
1332 HChar *mnm = irgen(r1, r2, i3, i4, i5);
1333
sewardj7ee97522011-05-09 21:45:04 +00001334 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001335 s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
1336 i5);
1337}
1338
1339static void
1340s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
1341 UChar r1, UChar r2, UShort i4, UChar m3)
1342{
1343 HChar *mnm = irgen(r1, r2, i4, m3);
1344
sewardj7ee97522011-05-09 21:45:04 +00001345 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001346 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1347 r2, m3, (Int)(Short)i4);
1348}
1349
1350static void
1351s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1352 UChar r1, UChar m3, UShort i4, UChar i2)
1353{
1354 HChar *mnm = irgen(r1, m3, i4, i2);
1355
sewardj7ee97522011-05-09 21:45:04 +00001356 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001357 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
1358 r1, i2, m3, (Int)(Short)i4);
1359}
1360
1361static void
1362s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
1363 UChar r1, UChar m3, UShort i4, UChar i2)
1364{
1365 HChar *mnm = irgen(r1, m3, i4, i2);
1366
sewardj7ee97522011-05-09 21:45:04 +00001367 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001368 s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
1369 (Int)(Char)i2, m3, (Int)(Short)i4);
1370}
1371
1372static void
1373s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
1374 UChar r1, UInt i2)
1375{
1376 irgen(r1, i2);
1377}
1378
1379static void
1380s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
1381 UChar r1, UInt i2)
1382{
1383 HChar *mnm = irgen(r1, i2);
1384
sewardj7ee97522011-05-09 21:45:04 +00001385 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001386 s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
1387}
1388
1389static void
1390s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
1391 UChar r1, UInt i2)
1392{
1393 HChar *mnm = irgen(r1, i2);
1394
sewardj7ee97522011-05-09 21:45:04 +00001395 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001396 s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
1397}
1398
1399static void
1400s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
1401 UChar r1, UInt i2)
1402{
1403 HChar *mnm = irgen(r1, i2);
1404
sewardj7ee97522011-05-09 21:45:04 +00001405 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001406 s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
1407}
1408
1409static void
1410s390_format_RIL_UP(HChar *(*irgen)(void),
1411 UChar r1, UInt i2)
1412{
1413 HChar *mnm = irgen();
1414
sewardj7ee97522011-05-09 21:45:04 +00001415 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001416 s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
1417}
1418
1419static void
1420s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1421 IRTemp op4addr),
1422 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1423{
1424 HChar *mnm;
1425 IRTemp op4addr = newTemp(Ity_I64);
1426
1427 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1428 mkU64(0)));
1429
1430 mnm = irgen(r1, m3, i2, op4addr);
1431
sewardj7ee97522011-05-09 21:45:04 +00001432 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001433 s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1434 (Int)(Char)i2, m3, d4, 0, b4);
1435}
1436
1437static void
1438s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
1439 IRTemp op4addr),
1440 UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
1441{
1442 HChar *mnm;
1443 IRTemp op4addr = newTemp(Ity_I64);
1444
1445 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1446 mkU64(0)));
1447
1448 mnm = irgen(r1, m3, i2, op4addr);
1449
sewardj7ee97522011-05-09 21:45:04 +00001450 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001451 s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1452 i2, m3, d4, 0, b4);
1453}
1454
1455static void
1456s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
1457 UChar r1, UChar r2)
1458{
1459 irgen(r1, r2);
1460}
1461
1462static void
1463s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
1464 UChar r1, UChar r2)
1465{
1466 HChar *mnm = irgen(r1, r2);
1467
sewardj7ee97522011-05-09 21:45:04 +00001468 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001469 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1470}
1471
1472static void
1473s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
1474 UChar r1, UChar r2)
1475{
1476 HChar *mnm = irgen(r1, r2);
1477
sewardj7ee97522011-05-09 21:45:04 +00001478 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001479 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1480}
1481
1482static void
1483s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
1484 UChar r1, UChar r2)
1485{
1486 irgen(r1, r2);
1487}
1488
1489static void
1490s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
1491 UChar r1, UChar r2)
1492{
1493 HChar *mnm = irgen(r1, r2);
1494
sewardj7ee97522011-05-09 21:45:04 +00001495 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001496 s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
1497}
1498
1499static void
1500s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
1501 UChar r1, UChar r2)
1502{
1503 HChar *mnm = irgen(r1, r2);
1504
sewardj7ee97522011-05-09 21:45:04 +00001505 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001506 s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
1507}
1508
1509static void
1510s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
1511 UChar r1, UChar r2)
1512{
1513 HChar *mnm = irgen(r1, r2);
1514
sewardj7ee97522011-05-09 21:45:04 +00001515 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001516 s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
1517}
1518
1519static void
1520s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
1521 UChar r1, UChar r2)
1522{
1523 HChar *mnm = irgen(r1, r2);
1524
sewardj7ee97522011-05-09 21:45:04 +00001525 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001526 s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
1527}
1528
1529static void
1530s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
1531 UChar r1)
1532{
1533 HChar *mnm = irgen(r1);
1534
sewardj7ee97522011-05-09 21:45:04 +00001535 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001536 s390_disasm(ENC2(MNM, GPR), mnm, r1);
1537}
1538
1539static void
1540s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
1541 UChar r1)
1542{
1543 HChar *mnm = irgen(r1);
1544
sewardj7ee97522011-05-09 21:45:04 +00001545 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001546 s390_disasm(ENC2(MNM, FPR), mnm, r1);
1547}
1548
1549static void
1550s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
1551 UChar r1, UChar r3, UChar r2)
1552{
1553 HChar *mnm = irgen(r1, r3, r2);
1554
sewardj7ee97522011-05-09 21:45:04 +00001555 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001556 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1557}
1558
1559static void
sewardjd7bde722011-04-05 13:19:33 +00001560s390_format_RRF_U0RR(HChar *(*irgen)(UChar m3, UChar r1, UChar r2),
1561 UChar m3, UChar r1, UChar r2, Int xmnm_kind)
1562{
1563 irgen(m3, r1, r2);
1564
sewardj7ee97522011-05-09 21:45:04 +00001565 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001566 s390_disasm(ENC3(XMNM, GPR, GPR), xmnm_kind, m3, r1, r2);
1567}
1568
1569static void
sewardj2019a972011-03-07 16:04:07 +00001570s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1571 UChar r3, UChar r1, UChar r2)
1572{
1573 HChar *mnm = irgen(r3, r1, r2);
1574
sewardj7ee97522011-05-09 21:45:04 +00001575 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001576 s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
1577}
1578
1579static void
1580s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
1581 UChar r3, UChar r1, UChar r2)
1582{
1583 HChar *mnm = irgen(r3, r1, r2);
1584
sewardj7ee97522011-05-09 21:45:04 +00001585 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001586 s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
1587}
1588
1589static void
1590s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
1591 UChar r3, UChar r1, UChar r2)
1592{
1593 HChar *mnm = irgen(r3, r1, r2);
1594
sewardj7ee97522011-05-09 21:45:04 +00001595 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001596 s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
1597}
1598
1599static void
1600s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
1601 UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
1602{
1603 HChar *mnm;
1604 IRTemp op4addr = newTemp(Ity_I64);
1605
1606 assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
1607 mkU64(0)));
1608
1609 mnm = irgen(r1, r2, m3, op4addr);
1610
sewardj7ee97522011-05-09 21:45:04 +00001611 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001612 s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
1613 r2, m3, d4, 0, b4);
1614}
1615
1616static void
1617s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1618 UChar r1, UChar b2, UShort d2)
1619{
1620 HChar *mnm;
1621 IRTemp op2addr = newTemp(Ity_I64);
1622
1623 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1624 mkU64(0)));
1625
1626 mnm = irgen(r1, op2addr);
1627
sewardj7ee97522011-05-09 21:45:04 +00001628 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001629 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
1630}
1631
1632static void
1633s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1634 UChar r1, UChar r3, UChar b2, UShort d2)
1635{
1636 HChar *mnm;
1637 IRTemp op2addr = newTemp(Ity_I64);
1638
1639 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1640 mkU64(0)));
1641
1642 mnm = irgen(r1, r3, op2addr);
1643
sewardj7ee97522011-05-09 21:45:04 +00001644 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001645 s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
1646}
1647
1648static void
1649s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1650 UChar r1, UChar r3, UChar b2, UShort d2)
1651{
1652 HChar *mnm;
1653 IRTemp op2addr = newTemp(Ity_I64);
1654
1655 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1656 mkU64(0)));
1657
1658 mnm = irgen(r1, r3, op2addr);
1659
sewardj7ee97522011-05-09 21:45:04 +00001660 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001661 s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
1662}
1663
1664static void
1665s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1666 UChar r1, UChar r3, UChar b2, UShort d2)
1667{
1668 HChar *mnm;
1669 IRTemp op2addr = newTemp(Ity_I64);
1670
1671 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1672 mkU64(0)));
1673
1674 mnm = irgen(r1, r3, op2addr);
1675
sewardj7ee97522011-05-09 21:45:04 +00001676 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001677 s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
1678}
1679
1680static void
1681s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
1682 UChar r1, UChar r3, UShort i2)
1683{
1684 HChar *mnm = irgen(r1, r3, i2);
1685
sewardj7ee97522011-05-09 21:45:04 +00001686 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001687 s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
1688}
1689
1690static void
1691s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1692 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1693{
1694 HChar *mnm;
1695 IRTemp op2addr = newTemp(Ity_I64);
1696 IRTemp d2 = newTemp(Ity_I64);
1697
1698 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1699 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1700 mkU64(0)));
1701
1702 mnm = irgen(r1, r3, op2addr);
1703
sewardj7ee97522011-05-09 21:45:04 +00001704 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001705 s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1706}
1707
1708static void
1709s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
1710 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1711{
1712 HChar *mnm;
1713 IRTemp op2addr = newTemp(Ity_I64);
1714 IRTemp d2 = newTemp(Ity_I64);
1715
1716 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1717 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1718 mkU64(0)));
1719
1720 mnm = irgen(r1, r3, op2addr);
1721
sewardj7ee97522011-05-09 21:45:04 +00001722 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001723 s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1724}
1725
1726static void
1727s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
1728 UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
1729{
1730 HChar *mnm;
1731 IRTemp op2addr = newTemp(Ity_I64);
1732 IRTemp d2 = newTemp(Ity_I64);
1733
1734 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1735 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1736 mkU64(0)));
1737
1738 mnm = irgen(r1, r3, op2addr);
1739
sewardj7ee97522011-05-09 21:45:04 +00001740 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001741 s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
1742}
1743
1744static void
sewardjd7bde722011-04-05 13:19:33 +00001745s390_format_RSY_RDRM(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1746 UChar r1, UChar m3, UChar b2, UShort dl2, UChar dh2,
1747 Int xmnm_kind)
1748{
1749 IRTemp op2addr = newTemp(Ity_I64);
1750 IRTemp d2 = newTemp(Ity_I64);
1751
1752 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
1753 guest_IA_next_instr);
1754 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1755 assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
1756 mkU64(0)));
1757
1758 irgen(r1, op2addr);
1759
sewardj7ee97522011-05-09 21:45:04 +00001760 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjd7bde722011-04-05 13:19:33 +00001761 s390_disasm(ENC3(XMNM, GPR, SDXB), xmnm_kind, m3, r1, dh2, dl2, 0, b2);
1762}
1763
1764static void
sewardj2019a972011-03-07 16:04:07 +00001765s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
1766 IRTemp op2addr),
1767 UChar r1, UChar x2, UChar b2, UShort d2)
1768{
1769 IRTemp op2addr = newTemp(Ity_I64);
1770
1771 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1772 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1773 mkU64(0)));
1774
1775 irgen(r1, x2, b2, d2, op2addr);
1776}
1777
1778static void
1779s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1780 UChar r1, UChar x2, UChar b2, UShort d2)
1781{
1782 HChar *mnm;
1783 IRTemp op2addr = newTemp(Ity_I64);
1784
1785 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1786 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1787 mkU64(0)));
1788
1789 mnm = irgen(r1, op2addr);
1790
sewardj7ee97522011-05-09 21:45:04 +00001791 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001792 s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
1793}
1794
1795static void
1796s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1797 UChar r1, UChar x2, UChar b2, UShort d2)
1798{
1799 HChar *mnm;
1800 IRTemp op2addr = newTemp(Ity_I64);
1801
1802 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1803 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1804 mkU64(0)));
1805
1806 mnm = irgen(r1, op2addr);
1807
sewardj7ee97522011-05-09 21:45:04 +00001808 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001809 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1810}
1811
1812static void
1813s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1814 UChar r1, UChar x2, UChar b2, UShort d2)
1815{
1816 HChar *mnm;
1817 IRTemp op2addr = newTemp(Ity_I64);
1818
1819 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1820 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1821 mkU64(0)));
1822
1823 mnm = irgen(r1, op2addr);
1824
sewardj7ee97522011-05-09 21:45:04 +00001825 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001826 s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
1827}
1828
1829static void
1830s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
1831 UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
1832{
1833 HChar *mnm;
1834 IRTemp op2addr = newTemp(Ity_I64);
1835
1836 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
1837 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1838 mkU64(0)));
1839
1840 mnm = irgen(r3, op2addr, r1);
1841
sewardj7ee97522011-05-09 21:45:04 +00001842 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001843 s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
1844}
1845
1846static void
1847s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1848 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1849{
1850 HChar *mnm;
1851 IRTemp op2addr = newTemp(Ity_I64);
1852 IRTemp d2 = newTemp(Ity_I64);
1853
1854 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1855 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1856 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1857 mkU64(0)));
1858
1859 mnm = irgen(r1, op2addr);
1860
sewardj7ee97522011-05-09 21:45:04 +00001861 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001862 s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1863}
1864
1865static void
1866s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
1867 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1868{
1869 HChar *mnm;
1870 IRTemp op2addr = newTemp(Ity_I64);
1871 IRTemp d2 = newTemp(Ity_I64);
1872
1873 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1874 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1875 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1876 mkU64(0)));
1877
1878 mnm = irgen(r1, op2addr);
1879
sewardj7ee97522011-05-09 21:45:04 +00001880 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001881 s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
1882}
1883
1884static void
1885s390_format_RXY_URRD(HChar *(*irgen)(void),
1886 UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
1887{
1888 HChar *mnm;
1889 IRTemp op2addr = newTemp(Ity_I64);
1890 IRTemp d2 = newTemp(Ity_I64);
1891
1892 assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
1893 assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
1894 b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
1895 mkU64(0)));
1896
1897 mnm = irgen();
1898
sewardj7ee97522011-05-09 21:45:04 +00001899 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001900 s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
1901}
1902
1903static void
1904s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
1905 UChar b2, UShort d2)
1906{
1907 HChar *mnm;
1908 IRTemp op2addr = newTemp(Ity_I64);
1909
1910 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1911 mkU64(0)));
1912
1913 mnm = irgen(op2addr);
1914
sewardj7ee97522011-05-09 21:45:04 +00001915 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001916 s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
1917}
1918
1919static void
1920s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1921 UChar i2, UChar b1, UShort d1)
1922{
1923 HChar *mnm;
1924 IRTemp op1addr = newTemp(Ity_I64);
1925
1926 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1927 mkU64(0)));
1928
1929 mnm = irgen(i2, op1addr);
1930
sewardj7ee97522011-05-09 21:45:04 +00001931 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001932 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
1933}
1934
1935static void
1936s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1937 UChar i2, UChar b1, UShort dl1, UChar dh1)
1938{
1939 HChar *mnm;
1940 IRTemp op1addr = newTemp(Ity_I64);
1941 IRTemp d1 = newTemp(Ity_I64);
1942
1943 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1944 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1945 mkU64(0)));
1946
1947 mnm = irgen(i2, op1addr);
1948
sewardj7ee97522011-05-09 21:45:04 +00001949 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001950 s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
1951}
1952
1953static void
1954s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
1955 UChar i2, UChar b1, UShort dl1, UChar dh1)
1956{
1957 HChar *mnm;
1958 IRTemp op1addr = newTemp(Ity_I64);
1959 IRTemp d1 = newTemp(Ity_I64);
1960
1961 assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
1962 assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
1963 mkU64(0)));
1964
1965 mnm = irgen(i2, op1addr);
1966
sewardj7ee97522011-05-09 21:45:04 +00001967 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001968 s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
1969}
1970
1971static void
1972s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
1973 UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
1974{
1975 HChar *mnm;
1976 IRTemp op1addr = newTemp(Ity_I64);
1977 IRTemp op2addr = newTemp(Ity_I64);
1978
1979 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1980 mkU64(0)));
1981 assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
1982 mkU64(0)));
1983
1984 mnm = irgen(l, op1addr, op2addr);
1985
sewardj7ee97522011-05-09 21:45:04 +00001986 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00001987 s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
1988}
1989
1990static void
1991s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
1992 UChar b1, UShort d1, UShort i2)
1993{
1994 HChar *mnm;
1995 IRTemp op1addr = newTemp(Ity_I64);
1996
1997 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
1998 mkU64(0)));
1999
2000 mnm = irgen(i2, op1addr);
2001
sewardj7ee97522011-05-09 21:45:04 +00002002 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002003 s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
2004}
2005
2006static void
2007s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
2008 UChar b1, UShort d1, UShort i2)
2009{
2010 HChar *mnm;
2011 IRTemp op1addr = newTemp(Ity_I64);
2012
2013 assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
2014 mkU64(0)));
2015
2016 mnm = irgen(i2, op1addr);
2017
sewardj7ee97522011-05-09 21:45:04 +00002018 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00002019 s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
2020}
2021
2022
2023
2024/*------------------------------------------------------------*/
2025/*--- Build IR for opcodes ---*/
2026/*------------------------------------------------------------*/
2027
2028static HChar *
2029s390_irgen_AR(UChar r1, UChar r2)
2030{
2031 IRTemp op1 = newTemp(Ity_I32);
2032 IRTemp op2 = newTemp(Ity_I32);
2033 IRTemp result = newTemp(Ity_I32);
2034
2035 assign(op1, get_gpr_w1(r1));
2036 assign(op2, get_gpr_w1(r2));
2037 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2038 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2039 put_gpr_w1(r1, mkexpr(result));
2040
2041 return "ar";
2042}
2043
2044static HChar *
2045s390_irgen_AGR(UChar r1, UChar r2)
2046{
2047 IRTemp op1 = newTemp(Ity_I64);
2048 IRTemp op2 = newTemp(Ity_I64);
2049 IRTemp result = newTemp(Ity_I64);
2050
2051 assign(op1, get_gpr_dw0(r1));
2052 assign(op2, get_gpr_dw0(r2));
2053 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2054 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2055 put_gpr_dw0(r1, mkexpr(result));
2056
2057 return "agr";
2058}
2059
2060static HChar *
2061s390_irgen_AGFR(UChar r1, UChar r2)
2062{
2063 IRTemp op1 = newTemp(Ity_I64);
2064 IRTemp op2 = newTemp(Ity_I64);
2065 IRTemp result = newTemp(Ity_I64);
2066
2067 assign(op1, get_gpr_dw0(r1));
2068 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
2069 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2070 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2071 put_gpr_dw0(r1, mkexpr(result));
2072
2073 return "agfr";
2074}
2075
2076static HChar *
2077s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
2078{
2079 IRTemp op2 = newTemp(Ity_I32);
2080 IRTemp op3 = newTemp(Ity_I32);
2081 IRTemp result = newTemp(Ity_I32);
2082
2083 assign(op2, get_gpr_w1(r2));
2084 assign(op3, get_gpr_w1(r3));
2085 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2086 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2087 put_gpr_w1(r1, mkexpr(result));
2088
2089 return "ark";
2090}
2091
2092static HChar *
2093s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
2094{
2095 IRTemp op2 = newTemp(Ity_I64);
2096 IRTemp op3 = newTemp(Ity_I64);
2097 IRTemp result = newTemp(Ity_I64);
2098
2099 assign(op2, get_gpr_dw0(r2));
2100 assign(op3, get_gpr_dw0(r3));
2101 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2102 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
2103 put_gpr_dw0(r1, mkexpr(result));
2104
2105 return "agrk";
2106}
2107
2108static HChar *
2109s390_irgen_A(UChar r1, IRTemp op2addr)
2110{
2111 IRTemp op1 = newTemp(Ity_I32);
2112 IRTemp op2 = newTemp(Ity_I32);
2113 IRTemp result = newTemp(Ity_I32);
2114
2115 assign(op1, get_gpr_w1(r1));
2116 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2117 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2118 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2119 put_gpr_w1(r1, mkexpr(result));
2120
2121 return "a";
2122}
2123
2124static HChar *
2125s390_irgen_AY(UChar r1, IRTemp op2addr)
2126{
2127 IRTemp op1 = newTemp(Ity_I32);
2128 IRTemp op2 = newTemp(Ity_I32);
2129 IRTemp result = newTemp(Ity_I32);
2130
2131 assign(op1, get_gpr_w1(r1));
2132 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2133 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2134 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2135 put_gpr_w1(r1, mkexpr(result));
2136
2137 return "ay";
2138}
2139
2140static HChar *
2141s390_irgen_AG(UChar r1, IRTemp op2addr)
2142{
2143 IRTemp op1 = newTemp(Ity_I64);
2144 IRTemp op2 = newTemp(Ity_I64);
2145 IRTemp result = newTemp(Ity_I64);
2146
2147 assign(op1, get_gpr_dw0(r1));
2148 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2149 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2150 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2151 put_gpr_dw0(r1, mkexpr(result));
2152
2153 return "ag";
2154}
2155
2156static HChar *
2157s390_irgen_AGF(UChar r1, IRTemp op2addr)
2158{
2159 IRTemp op1 = newTemp(Ity_I64);
2160 IRTemp op2 = newTemp(Ity_I64);
2161 IRTemp result = newTemp(Ity_I64);
2162
2163 assign(op1, get_gpr_dw0(r1));
2164 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
2165 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2166 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
2167 put_gpr_dw0(r1, mkexpr(result));
2168
2169 return "agf";
2170}
2171
2172static HChar *
2173s390_irgen_AFI(UChar r1, UInt i2)
2174{
2175 IRTemp op1 = newTemp(Ity_I32);
2176 Int op2;
2177 IRTemp result = newTemp(Ity_I32);
2178
2179 assign(op1, get_gpr_w1(r1));
2180 op2 = (Int)i2;
2181 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2182 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2183 mkU32((UInt)op2)));
2184 put_gpr_w1(r1, mkexpr(result));
2185
2186 return "afi";
2187}
2188
2189static HChar *
2190s390_irgen_AGFI(UChar r1, UInt i2)
2191{
2192 IRTemp op1 = newTemp(Ity_I64);
2193 Long op2;
2194 IRTemp result = newTemp(Ity_I64);
2195
2196 assign(op1, get_gpr_dw0(r1));
2197 op2 = (Long)(Int)i2;
2198 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2199 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2200 mkU64((ULong)op2)));
2201 put_gpr_dw0(r1, mkexpr(result));
2202
2203 return "agfi";
2204}
2205
2206static HChar *
2207s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
2208{
2209 Int op2;
2210 IRTemp op3 = newTemp(Ity_I32);
2211 IRTemp result = newTemp(Ity_I32);
2212
2213 op2 = (Int)(Short)i2;
2214 assign(op3, get_gpr_w1(r3));
2215 assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
2216 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
2217 op2)), op3);
2218 put_gpr_w1(r1, mkexpr(result));
2219
2220 return "ahik";
2221}
2222
2223static HChar *
2224s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
2225{
2226 Long op2;
2227 IRTemp op3 = newTemp(Ity_I64);
2228 IRTemp result = newTemp(Ity_I64);
2229
2230 op2 = (Long)(Short)i2;
2231 assign(op3, get_gpr_dw0(r3));
2232 assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
2233 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
2234 op2)), op3);
2235 put_gpr_dw0(r1, mkexpr(result));
2236
2237 return "aghik";
2238}
2239
2240static HChar *
2241s390_irgen_ASI(UChar i2, IRTemp op1addr)
2242{
2243 IRTemp op1 = newTemp(Ity_I32);
2244 Int op2;
2245 IRTemp result = newTemp(Ity_I32);
2246
2247 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2248 op2 = (Int)(Char)i2;
2249 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2250 store(mkexpr(op1addr), mkexpr(result));
2251 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2252 mkU32((UInt)op2)));
2253
2254 return "asi";
2255}
2256
2257static HChar *
2258s390_irgen_AGSI(UChar i2, IRTemp op1addr)
2259{
2260 IRTemp op1 = newTemp(Ity_I64);
2261 Long op2;
2262 IRTemp result = newTemp(Ity_I64);
2263
2264 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2265 op2 = (Long)(Char)i2;
2266 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2267 store(mkexpr(op1addr), mkexpr(result));
2268 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2269 mkU64((ULong)op2)));
2270
2271 return "agsi";
2272}
2273
2274static HChar *
2275s390_irgen_AH(UChar r1, IRTemp op2addr)
2276{
2277 IRTemp op1 = newTemp(Ity_I32);
2278 IRTemp op2 = newTemp(Ity_I32);
2279 IRTemp result = newTemp(Ity_I32);
2280
2281 assign(op1, get_gpr_w1(r1));
2282 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2283 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2284 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2285 put_gpr_w1(r1, mkexpr(result));
2286
2287 return "ah";
2288}
2289
2290static HChar *
2291s390_irgen_AHY(UChar r1, IRTemp op2addr)
2292{
2293 IRTemp op1 = newTemp(Ity_I32);
2294 IRTemp op2 = newTemp(Ity_I32);
2295 IRTemp result = newTemp(Ity_I32);
2296
2297 assign(op1, get_gpr_w1(r1));
2298 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
2299 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2300 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
2301 put_gpr_w1(r1, mkexpr(result));
2302
2303 return "ahy";
2304}
2305
2306static HChar *
2307s390_irgen_AHI(UChar r1, UShort i2)
2308{
2309 IRTemp op1 = newTemp(Ity_I32);
2310 Int op2;
2311 IRTemp result = newTemp(Ity_I32);
2312
2313 assign(op1, get_gpr_w1(r1));
2314 op2 = (Int)(Short)i2;
2315 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2316 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2317 mkU32((UInt)op2)));
2318 put_gpr_w1(r1, mkexpr(result));
2319
2320 return "ahi";
2321}
2322
2323static HChar *
2324s390_irgen_AGHI(UChar r1, UShort i2)
2325{
2326 IRTemp op1 = newTemp(Ity_I64);
2327 Long op2;
2328 IRTemp result = newTemp(Ity_I64);
2329
2330 assign(op1, get_gpr_dw0(r1));
2331 op2 = (Long)(Short)i2;
2332 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
2333 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
2334 mkU64((ULong)op2)));
2335 put_gpr_dw0(r1, mkexpr(result));
2336
2337 return "aghi";
2338}
2339
2340static HChar *
2341s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
2342{
2343 IRTemp op2 = newTemp(Ity_I32);
2344 IRTemp op3 = newTemp(Ity_I32);
2345 IRTemp result = newTemp(Ity_I32);
2346
2347 assign(op2, get_gpr_w0(r2));
2348 assign(op3, get_gpr_w0(r3));
2349 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2350 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2351 put_gpr_w0(r1, mkexpr(result));
2352
2353 return "ahhhr";
2354}
2355
2356static HChar *
2357s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
2358{
2359 IRTemp op2 = newTemp(Ity_I32);
2360 IRTemp op3 = newTemp(Ity_I32);
2361 IRTemp result = newTemp(Ity_I32);
2362
2363 assign(op2, get_gpr_w0(r2));
2364 assign(op3, get_gpr_w1(r3));
2365 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2366 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
2367 put_gpr_w0(r1, mkexpr(result));
2368
2369 return "ahhlr";
2370}
2371
2372static HChar *
2373s390_irgen_AIH(UChar r1, UInt i2)
2374{
2375 IRTemp op1 = newTemp(Ity_I32);
2376 Int op2;
2377 IRTemp result = newTemp(Ity_I32);
2378
2379 assign(op1, get_gpr_w0(r1));
2380 op2 = (Int)i2;
2381 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
2382 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
2383 mkU32((UInt)op2)));
2384 put_gpr_w0(r1, mkexpr(result));
2385
2386 return "aih";
2387}
2388
2389static HChar *
2390s390_irgen_ALR(UChar r1, UChar r2)
2391{
2392 IRTemp op1 = newTemp(Ity_I32);
2393 IRTemp op2 = newTemp(Ity_I32);
2394 IRTemp result = newTemp(Ity_I32);
2395
2396 assign(op1, get_gpr_w1(r1));
2397 assign(op2, get_gpr_w1(r2));
2398 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2399 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2400 put_gpr_w1(r1, mkexpr(result));
2401
2402 return "alr";
2403}
2404
2405static HChar *
2406s390_irgen_ALGR(UChar r1, UChar r2)
2407{
2408 IRTemp op1 = newTemp(Ity_I64);
2409 IRTemp op2 = newTemp(Ity_I64);
2410 IRTemp result = newTemp(Ity_I64);
2411
2412 assign(op1, get_gpr_dw0(r1));
2413 assign(op2, get_gpr_dw0(r2));
2414 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2415 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2416 put_gpr_dw0(r1, mkexpr(result));
2417
2418 return "algr";
2419}
2420
2421static HChar *
2422s390_irgen_ALGFR(UChar r1, UChar r2)
2423{
2424 IRTemp op1 = newTemp(Ity_I64);
2425 IRTemp op2 = newTemp(Ity_I64);
2426 IRTemp result = newTemp(Ity_I64);
2427
2428 assign(op1, get_gpr_dw0(r1));
2429 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
2430 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2431 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2432 put_gpr_dw0(r1, mkexpr(result));
2433
2434 return "algfr";
2435}
2436
2437static HChar *
2438s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
2439{
2440 IRTemp op2 = newTemp(Ity_I32);
2441 IRTemp op3 = newTemp(Ity_I32);
2442 IRTemp result = newTemp(Ity_I32);
2443
2444 assign(op2, get_gpr_w1(r2));
2445 assign(op3, get_gpr_w1(r3));
2446 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2447 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2448 put_gpr_w1(r1, mkexpr(result));
2449
2450 return "alrk";
2451}
2452
2453static HChar *
2454s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
2455{
2456 IRTemp op2 = newTemp(Ity_I64);
2457 IRTemp op3 = newTemp(Ity_I64);
2458 IRTemp result = newTemp(Ity_I64);
2459
2460 assign(op2, get_gpr_dw0(r2));
2461 assign(op3, get_gpr_dw0(r3));
2462 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
2463 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
2464 put_gpr_dw0(r1, mkexpr(result));
2465
2466 return "algrk";
2467}
2468
2469static HChar *
2470s390_irgen_AL(UChar r1, IRTemp op2addr)
2471{
2472 IRTemp op1 = newTemp(Ity_I32);
2473 IRTemp op2 = newTemp(Ity_I32);
2474 IRTemp result = newTemp(Ity_I32);
2475
2476 assign(op1, get_gpr_w1(r1));
2477 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2478 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2479 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2480 put_gpr_w1(r1, mkexpr(result));
2481
2482 return "al";
2483}
2484
2485static HChar *
2486s390_irgen_ALY(UChar r1, IRTemp op2addr)
2487{
2488 IRTemp op1 = newTemp(Ity_I32);
2489 IRTemp op2 = newTemp(Ity_I32);
2490 IRTemp result = newTemp(Ity_I32);
2491
2492 assign(op1, get_gpr_w1(r1));
2493 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2494 assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
2495 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
2496 put_gpr_w1(r1, mkexpr(result));
2497
2498 return "aly";
2499}
2500
2501static HChar *
2502s390_irgen_ALG(UChar r1, IRTemp op2addr)
2503{
2504 IRTemp op1 = newTemp(Ity_I64);
2505 IRTemp op2 = newTemp(Ity_I64);
2506 IRTemp result = newTemp(Ity_I64);
2507
2508 assign(op1, get_gpr_dw0(r1));
2509 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2510 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2511 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2512 put_gpr_dw0(r1, mkexpr(result));
2513
2514 return "alg";
2515}
2516
2517static HChar *
2518s390_irgen_ALGF(UChar r1, IRTemp op2addr)
2519{
2520 IRTemp op1 = newTemp(Ity_I64);
2521 IRTemp op2 = newTemp(Ity_I64);
2522 IRTemp result = newTemp(Ity_I64);
2523
2524 assign(op1, get_gpr_dw0(r1));
2525 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
2526 assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
2527 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
2528 put_gpr_dw0(r1, mkexpr(result));
2529
2530 return "algf";
2531}
2532
2533static HChar *
2534s390_irgen_ALFI(UChar r1, UInt i2)
2535{
2536 IRTemp op1 = newTemp(Ity_I32);
2537 UInt op2;
2538 IRTemp result = newTemp(Ity_I32);
2539
2540 assign(op1, get_gpr_w1(r1));
2541 op2 = i2;
2542 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2543 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2544 mkU32(op2)));
2545 put_gpr_w1(r1, mkexpr(result));
2546
2547 return "alfi";
2548}
2549
2550static HChar *
2551s390_irgen_ALGFI(UChar r1, UInt i2)
2552{
2553 IRTemp op1 = newTemp(Ity_I64);
2554 ULong op2;
2555 IRTemp result = newTemp(Ity_I64);
2556
2557 assign(op1, get_gpr_dw0(r1));
2558 op2 = (ULong)i2;
2559 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2560 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2561 mkU64(op2)));
2562 put_gpr_dw0(r1, mkexpr(result));
2563
2564 return "algfi";
2565}
2566
2567static HChar *
2568s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
2569{
2570 IRTemp op2 = newTemp(Ity_I32);
2571 IRTemp op3 = newTemp(Ity_I32);
2572 IRTemp result = newTemp(Ity_I32);
2573
2574 assign(op2, get_gpr_w0(r2));
2575 assign(op3, get_gpr_w0(r3));
2576 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2577 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2578 put_gpr_w0(r1, mkexpr(result));
2579
2580 return "alhhhr";
2581}
2582
2583static HChar *
2584s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
2585{
2586 IRTemp op2 = newTemp(Ity_I32);
2587 IRTemp op3 = newTemp(Ity_I32);
2588 IRTemp result = newTemp(Ity_I32);
2589
2590 assign(op2, get_gpr_w0(r2));
2591 assign(op3, get_gpr_w1(r3));
2592 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
2593 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
2594 put_gpr_w0(r1, mkexpr(result));
2595
2596 return "alhhlr";
2597}
2598
2599static HChar *
2600s390_irgen_ALCR(UChar r1, UChar r2)
2601{
2602 IRTemp op1 = newTemp(Ity_I32);
2603 IRTemp op2 = newTemp(Ity_I32);
2604 IRTemp result = newTemp(Ity_I32);
2605 IRTemp carry_in = newTemp(Ity_I32);
2606
2607 assign(op1, get_gpr_w1(r1));
2608 assign(op2, get_gpr_w1(r2));
2609 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2610 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2611 mkexpr(carry_in)));
2612 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2613 put_gpr_w1(r1, mkexpr(result));
2614
2615 return "alcr";
2616}
2617
2618static HChar *
2619s390_irgen_ALCGR(UChar r1, UChar r2)
2620{
2621 IRTemp op1 = newTemp(Ity_I64);
2622 IRTemp op2 = newTemp(Ity_I64);
2623 IRTemp result = newTemp(Ity_I64);
2624 IRTemp carry_in = newTemp(Ity_I64);
2625
2626 assign(op1, get_gpr_dw0(r1));
2627 assign(op2, get_gpr_dw0(r2));
2628 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2629 mkU8(1))));
2630 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2631 mkexpr(carry_in)));
2632 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2633 put_gpr_dw0(r1, mkexpr(result));
2634
2635 return "alcgr";
2636}
2637
2638static HChar *
2639s390_irgen_ALC(UChar r1, IRTemp op2addr)
2640{
2641 IRTemp op1 = newTemp(Ity_I32);
2642 IRTemp op2 = newTemp(Ity_I32);
2643 IRTemp result = newTemp(Ity_I32);
2644 IRTemp carry_in = newTemp(Ity_I32);
2645
2646 assign(op1, get_gpr_w1(r1));
2647 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2648 assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
2649 assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
2650 mkexpr(carry_in)));
2651 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
2652 put_gpr_w1(r1, mkexpr(result));
2653
2654 return "alc";
2655}
2656
2657static HChar *
2658s390_irgen_ALCG(UChar r1, IRTemp op2addr)
2659{
2660 IRTemp op1 = newTemp(Ity_I64);
2661 IRTemp op2 = newTemp(Ity_I64);
2662 IRTemp result = newTemp(Ity_I64);
2663 IRTemp carry_in = newTemp(Ity_I64);
2664
2665 assign(op1, get_gpr_dw0(r1));
2666 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2667 assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
2668 mkU8(1))));
2669 assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
2670 mkexpr(carry_in)));
2671 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
2672 put_gpr_dw0(r1, mkexpr(result));
2673
2674 return "alcg";
2675}
2676
2677static HChar *
2678s390_irgen_ALSI(UChar i2, IRTemp op1addr)
2679{
2680 IRTemp op1 = newTemp(Ity_I32);
2681 UInt op2;
2682 IRTemp result = newTemp(Ity_I32);
2683
2684 assign(op1, load(Ity_I32, mkexpr(op1addr)));
2685 op2 = (UInt)(Int)(Char)i2;
2686 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2687 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2688 mkU32(op2)));
2689 store(mkexpr(op1addr), mkexpr(result));
2690
2691 return "alsi";
2692}
2693
2694static HChar *
2695s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
2696{
2697 IRTemp op1 = newTemp(Ity_I64);
2698 ULong op2;
2699 IRTemp result = newTemp(Ity_I64);
2700
2701 assign(op1, load(Ity_I64, mkexpr(op1addr)));
2702 op2 = (ULong)(Long)(Char)i2;
2703 assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
2704 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
2705 mkU64(op2)));
2706 store(mkexpr(op1addr), mkexpr(result));
2707
2708 return "algsi";
2709}
2710
2711static HChar *
2712s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
2713{
2714 UInt op2;
2715 IRTemp op3 = newTemp(Ity_I32);
2716 IRTemp result = newTemp(Ity_I32);
2717
2718 op2 = (UInt)(Int)(Short)i2;
2719 assign(op3, get_gpr_w1(r3));
2720 assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
2721 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
2722 op3);
2723 put_gpr_w1(r1, mkexpr(result));
2724
2725 return "alhsik";
2726}
2727
2728static HChar *
2729s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
2730{
2731 ULong op2;
2732 IRTemp op3 = newTemp(Ity_I64);
2733 IRTemp result = newTemp(Ity_I64);
2734
2735 op2 = (ULong)(Long)(Short)i2;
2736 assign(op3, get_gpr_dw0(r3));
2737 assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
2738 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
2739 op3);
2740 put_gpr_dw0(r1, mkexpr(result));
2741
2742 return "alghsik";
2743}
2744
2745static HChar *
2746s390_irgen_ALSIH(UChar r1, UInt i2)
2747{
2748 IRTemp op1 = newTemp(Ity_I32);
2749 UInt op2;
2750 IRTemp result = newTemp(Ity_I32);
2751
2752 assign(op1, get_gpr_w0(r1));
2753 op2 = i2;
2754 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2755 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
2756 mkU32(op2)));
2757 put_gpr_w0(r1, mkexpr(result));
2758
2759 return "alsih";
2760}
2761
2762static HChar *
2763s390_irgen_ALSIHN(UChar r1, UInt i2)
2764{
2765 IRTemp op1 = newTemp(Ity_I32);
2766 UInt op2;
2767 IRTemp result = newTemp(Ity_I32);
2768
2769 assign(op1, get_gpr_w0(r1));
2770 op2 = i2;
2771 assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
2772 put_gpr_w0(r1, mkexpr(result));
2773
2774 return "alsihn";
2775}
2776
2777static HChar *
2778s390_irgen_NR(UChar r1, UChar r2)
2779{
2780 IRTemp op1 = newTemp(Ity_I32);
2781 IRTemp op2 = newTemp(Ity_I32);
2782 IRTemp result = newTemp(Ity_I32);
2783
2784 assign(op1, get_gpr_w1(r1));
2785 assign(op2, get_gpr_w1(r2));
2786 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2787 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2788 put_gpr_w1(r1, mkexpr(result));
2789
2790 return "nr";
2791}
2792
2793static HChar *
2794s390_irgen_NGR(UChar r1, UChar r2)
2795{
2796 IRTemp op1 = newTemp(Ity_I64);
2797 IRTemp op2 = newTemp(Ity_I64);
2798 IRTemp result = newTemp(Ity_I64);
2799
2800 assign(op1, get_gpr_dw0(r1));
2801 assign(op2, get_gpr_dw0(r2));
2802 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2803 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2804 put_gpr_dw0(r1, mkexpr(result));
2805
2806 return "ngr";
2807}
2808
2809static HChar *
2810s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
2811{
2812 IRTemp op2 = newTemp(Ity_I32);
2813 IRTemp op3 = newTemp(Ity_I32);
2814 IRTemp result = newTemp(Ity_I32);
2815
2816 assign(op2, get_gpr_w1(r2));
2817 assign(op3, get_gpr_w1(r3));
2818 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
2819 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2820 put_gpr_w1(r1, mkexpr(result));
2821
2822 return "nrk";
2823}
2824
2825static HChar *
2826s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
2827{
2828 IRTemp op2 = newTemp(Ity_I64);
2829 IRTemp op3 = newTemp(Ity_I64);
2830 IRTemp result = newTemp(Ity_I64);
2831
2832 assign(op2, get_gpr_dw0(r2));
2833 assign(op3, get_gpr_dw0(r3));
2834 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
2835 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2836 put_gpr_dw0(r1, mkexpr(result));
2837
2838 return "ngrk";
2839}
2840
2841static HChar *
2842s390_irgen_N(UChar r1, IRTemp op2addr)
2843{
2844 IRTemp op1 = newTemp(Ity_I32);
2845 IRTemp op2 = newTemp(Ity_I32);
2846 IRTemp result = newTemp(Ity_I32);
2847
2848 assign(op1, get_gpr_w1(r1));
2849 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2850 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2851 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2852 put_gpr_w1(r1, mkexpr(result));
2853
2854 return "n";
2855}
2856
2857static HChar *
2858s390_irgen_NY(UChar r1, IRTemp op2addr)
2859{
2860 IRTemp op1 = newTemp(Ity_I32);
2861 IRTemp op2 = newTemp(Ity_I32);
2862 IRTemp result = newTemp(Ity_I32);
2863
2864 assign(op1, get_gpr_w1(r1));
2865 assign(op2, load(Ity_I32, mkexpr(op2addr)));
2866 assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
2867 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2868 put_gpr_w1(r1, mkexpr(result));
2869
2870 return "ny";
2871}
2872
2873static HChar *
2874s390_irgen_NG(UChar r1, IRTemp op2addr)
2875{
2876 IRTemp op1 = newTemp(Ity_I64);
2877 IRTemp op2 = newTemp(Ity_I64);
2878 IRTemp result = newTemp(Ity_I64);
2879
2880 assign(op1, get_gpr_dw0(r1));
2881 assign(op2, load(Ity_I64, mkexpr(op2addr)));
2882 assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
2883 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2884 put_gpr_dw0(r1, mkexpr(result));
2885
2886 return "ng";
2887}
2888
2889static HChar *
2890s390_irgen_NI(UChar i2, IRTemp op1addr)
2891{
2892 IRTemp op1 = newTemp(Ity_I8);
2893 UChar op2;
2894 IRTemp result = newTemp(Ity_I8);
2895
2896 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2897 op2 = i2;
2898 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2899 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2900 store(mkexpr(op1addr), mkexpr(result));
2901
2902 return "ni";
2903}
2904
2905static HChar *
2906s390_irgen_NIY(UChar i2, IRTemp op1addr)
2907{
2908 IRTemp op1 = newTemp(Ity_I8);
2909 UChar op2;
2910 IRTemp result = newTemp(Ity_I8);
2911
2912 assign(op1, load(Ity_I8, mkexpr(op1addr)));
2913 op2 = i2;
2914 assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
2915 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2916 store(mkexpr(op1addr), mkexpr(result));
2917
2918 return "niy";
2919}
2920
2921static HChar *
2922s390_irgen_NIHF(UChar r1, UInt i2)
2923{
2924 IRTemp op1 = newTemp(Ity_I32);
2925 UInt op2;
2926 IRTemp result = newTemp(Ity_I32);
2927
2928 assign(op1, get_gpr_w0(r1));
2929 op2 = i2;
2930 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2931 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2932 put_gpr_w0(r1, mkexpr(result));
2933
2934 return "nihf";
2935}
2936
2937static HChar *
2938s390_irgen_NIHH(UChar r1, UShort i2)
2939{
2940 IRTemp op1 = newTemp(Ity_I16);
2941 UShort op2;
2942 IRTemp result = newTemp(Ity_I16);
2943
2944 assign(op1, get_gpr_hw0(r1));
2945 op2 = i2;
2946 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2947 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2948 put_gpr_hw0(r1, mkexpr(result));
2949
2950 return "nihh";
2951}
2952
2953static HChar *
2954s390_irgen_NIHL(UChar r1, UShort i2)
2955{
2956 IRTemp op1 = newTemp(Ity_I16);
2957 UShort op2;
2958 IRTemp result = newTemp(Ity_I16);
2959
2960 assign(op1, get_gpr_hw1(r1));
2961 op2 = i2;
2962 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2963 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2964 put_gpr_hw1(r1, mkexpr(result));
2965
2966 return "nihl";
2967}
2968
2969static HChar *
2970s390_irgen_NILF(UChar r1, UInt i2)
2971{
2972 IRTemp op1 = newTemp(Ity_I32);
2973 UInt op2;
2974 IRTemp result = newTemp(Ity_I32);
2975
2976 assign(op1, get_gpr_w1(r1));
2977 op2 = i2;
2978 assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
2979 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2980 put_gpr_w1(r1, mkexpr(result));
2981
2982 return "nilf";
2983}
2984
2985static HChar *
2986s390_irgen_NILH(UChar r1, UShort i2)
2987{
2988 IRTemp op1 = newTemp(Ity_I16);
2989 UShort op2;
2990 IRTemp result = newTemp(Ity_I16);
2991
2992 assign(op1, get_gpr_hw2(r1));
2993 op2 = i2;
2994 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
2995 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
2996 put_gpr_hw2(r1, mkexpr(result));
2997
2998 return "nilh";
2999}
3000
3001static HChar *
3002s390_irgen_NILL(UChar r1, UShort i2)
3003{
3004 IRTemp op1 = newTemp(Ity_I16);
3005 UShort op2;
3006 IRTemp result = newTemp(Ity_I16);
3007
3008 assign(op1, get_gpr_hw3(r1));
3009 op2 = i2;
3010 assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
3011 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
3012 put_gpr_hw3(r1, mkexpr(result));
3013
3014 return "nill";
3015}
3016
3017static HChar *
3018s390_irgen_BASR(UChar r1, UChar r2)
3019{
3020 IRTemp target = newTemp(Ity_I64);
3021
3022 if (r2 == 0) {
3023 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3024 } else {
3025 if (r1 != r2) {
3026 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3027 call_function(get_gpr_dw0(r2));
3028 } else {
3029 assign(target, get_gpr_dw0(r2));
3030 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
3031 call_function(mkexpr(target));
3032 }
3033 }
3034
3035 return "basr";
3036}
3037
3038static HChar *
3039s390_irgen_BAS(UChar r1, IRTemp op2addr)
3040{
3041 IRTemp target = newTemp(Ity_I64);
3042
3043 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3044 assign(target, mkexpr(op2addr));
3045 call_function(mkexpr(target));
3046
3047 return "bas";
3048}
3049
3050static HChar *
3051s390_irgen_BCR(UChar r1, UChar r2)
3052{
3053 IRTemp cond = newTemp(Ity_I32);
3054
sewardja52e37e2011-04-28 18:48:06 +00003055 if (r2 == 0 && (r1 >= 14)) { /* serialization */
3056 stmt(IRStmt_MBE(Imbe_Fence));
3057 }
3058
sewardj2019a972011-03-07 16:04:07 +00003059 if ((r2 == 0) || (r1 == 0)) {
3060 } else {
3061 if (r1 == 15) {
3062 return_from_function(get_gpr_dw0(r2));
3063 } else {
3064 assign(cond, s390_call_calculate_cond(r1));
3065 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3066 mkU32(0)), get_gpr_dw0(r2));
3067 }
3068 }
sewardj7ee97522011-05-09 21:45:04 +00003069 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003070 s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
3071
3072 return "bcr";
3073}
3074
3075static HChar *
3076s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
3077{
3078 IRTemp cond = newTemp(Ity_I32);
3079
3080 if (r1 == 0) {
3081 } else {
3082 if (r1 == 15) {
3083 always_goto(mkexpr(op2addr));
3084 } else {
3085 assign(cond, s390_call_calculate_cond(r1));
3086 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3087 mkU32(0)), mkexpr(op2addr));
3088 }
3089 }
sewardj7ee97522011-05-09 21:45:04 +00003090 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003091 s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
3092
3093 return "bc";
3094}
3095
3096static HChar *
3097s390_irgen_BCTR(UChar r1, UChar r2)
3098{
3099 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3100 if (r2 != 0) {
3101 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
3102 ), get_gpr_dw0(r2));
3103 }
3104
3105 return "bctr";
3106}
3107
3108static HChar *
3109s390_irgen_BCTGR(UChar r1, UChar r2)
3110{
3111 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3112 if (r2 != 0) {
3113 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
3114 mkU64(0)), get_gpr_dw0(r2));
3115 }
3116
3117 return "bctgr";
3118}
3119
3120static HChar *
3121s390_irgen_BCT(UChar r1, IRTemp op2addr)
3122{
3123 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3124 if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
3125 mkexpr(op2addr));
3126
3127 return "bct";
3128}
3129
3130static HChar *
3131s390_irgen_BCTG(UChar r1, IRTemp op2addr)
3132{
3133 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3134 if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
3135 mkexpr(op2addr));
3136
3137 return "bctg";
3138}
3139
3140static HChar *
3141s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
3142{
3143 IRTemp value = newTemp(Ity_I32);
3144
3145 assign(value, get_gpr_w1(r3 | 1));
3146 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3147 if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
3148 mkexpr(value)), mkexpr(op2addr));
3149
3150 return "bxh";
3151}
3152
3153static HChar *
3154s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
3155{
3156 IRTemp value = newTemp(Ity_I64);
3157
3158 assign(value, get_gpr_dw0(r3 | 1));
3159 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3160 if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
3161 mkexpr(value)), mkexpr(op2addr));
3162
3163 return "bxhg";
3164}
3165
3166static HChar *
3167s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
3168{
3169 IRTemp value = newTemp(Ity_I32);
3170
3171 assign(value, get_gpr_w1(r3 | 1));
3172 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3173 if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
3174 get_gpr_w1(r1)), mkexpr(op2addr));
3175
3176 return "bxle";
3177}
3178
3179static HChar *
3180s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
3181{
3182 IRTemp value = newTemp(Ity_I64);
3183
3184 assign(value, get_gpr_dw0(r3 | 1));
3185 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3186 if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
3187 get_gpr_dw0(r1)), mkexpr(op2addr));
3188
3189 return "bxleg";
3190}
3191
3192static HChar *
3193s390_irgen_BRAS(UChar r1, UShort i2)
3194{
3195 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
3196 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
3197
3198 return "bras";
3199}
3200
3201static HChar *
3202s390_irgen_BRASL(UChar r1, UInt i2)
3203{
3204 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
3205 call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3206
3207 return "brasl";
3208}
3209
3210static HChar *
3211s390_irgen_BRC(UChar r1, UShort i2)
3212{
3213 IRTemp cond = newTemp(Ity_I32);
3214
3215 if (r1 == 0) {
3216 } else {
3217 if (r1 == 15) {
3218 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
3219 );
3220 } else {
3221 assign(cond, s390_call_calculate_cond(r1));
3222 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3223 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3224
3225 }
3226 }
sewardj7ee97522011-05-09 21:45:04 +00003227 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003228 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
3229
3230 return "brc";
3231}
3232
3233static HChar *
3234s390_irgen_BRCL(UChar r1, UInt i2)
3235{
3236 IRTemp cond = newTemp(Ity_I32);
3237
3238 if (r1 == 0) {
3239 } else {
3240 if (r1 == 15) {
3241 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
3242 } else {
3243 assign(cond, s390_call_calculate_cond(r1));
3244 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3245 guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
3246 }
3247 }
sewardj7ee97522011-05-09 21:45:04 +00003248 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00003249 s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
3250
3251 return "brcl";
3252}
3253
3254static HChar *
3255s390_irgen_BRCT(UChar r1, UShort i2)
3256{
3257 put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
3258 if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
3259 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3260
3261 return "brct";
3262}
3263
3264static HChar *
3265s390_irgen_BRCTG(UChar r1, UShort i2)
3266{
3267 put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
3268 if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
3269 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3270
3271 return "brctg";
3272}
3273
3274static HChar *
3275s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
3276{
3277 IRTemp value = newTemp(Ity_I32);
3278
3279 assign(value, get_gpr_w1(r3 | 1));
3280 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3281 if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
3282 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3283
3284 return "brxh";
3285}
3286
3287static HChar *
3288s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
3289{
3290 IRTemp value = newTemp(Ity_I64);
3291
3292 assign(value, get_gpr_dw0(r3 | 1));
3293 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3294 if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
3295 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3296
3297 return "brxhg";
3298}
3299
3300static HChar *
3301s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
3302{
3303 IRTemp value = newTemp(Ity_I32);
3304
3305 assign(value, get_gpr_w1(r3 | 1));
3306 put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
3307 if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
3308 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3309
3310 return "brxle";
3311}
3312
3313static HChar *
3314s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
3315{
3316 IRTemp value = newTemp(Ity_I64);
3317
3318 assign(value, get_gpr_dw0(r3 | 1));
3319 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
3320 if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
3321 guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
3322
3323 return "brxlg";
3324}
3325
3326static HChar *
3327s390_irgen_CR(UChar r1, UChar r2)
3328{
3329 IRTemp op1 = newTemp(Ity_I32);
3330 IRTemp op2 = newTemp(Ity_I32);
3331
3332 assign(op1, get_gpr_w1(r1));
3333 assign(op2, get_gpr_w1(r2));
3334 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3335
3336 return "cr";
3337}
3338
3339static HChar *
3340s390_irgen_CGR(UChar r1, UChar r2)
3341{
3342 IRTemp op1 = newTemp(Ity_I64);
3343 IRTemp op2 = newTemp(Ity_I64);
3344
3345 assign(op1, get_gpr_dw0(r1));
3346 assign(op2, get_gpr_dw0(r2));
3347 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3348
3349 return "cgr";
3350}
3351
3352static HChar *
3353s390_irgen_CGFR(UChar r1, UChar r2)
3354{
3355 IRTemp op1 = newTemp(Ity_I64);
3356 IRTemp op2 = newTemp(Ity_I64);
3357
3358 assign(op1, get_gpr_dw0(r1));
3359 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
3360 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3361
3362 return "cgfr";
3363}
3364
3365static HChar *
3366s390_irgen_C(UChar r1, IRTemp op2addr)
3367{
3368 IRTemp op1 = newTemp(Ity_I32);
3369 IRTemp op2 = newTemp(Ity_I32);
3370
3371 assign(op1, get_gpr_w1(r1));
3372 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3373 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3374
3375 return "c";
3376}
3377
3378static HChar *
3379s390_irgen_CY(UChar r1, IRTemp op2addr)
3380{
3381 IRTemp op1 = newTemp(Ity_I32);
3382 IRTemp op2 = newTemp(Ity_I32);
3383
3384 assign(op1, get_gpr_w1(r1));
3385 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3386 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3387
3388 return "cy";
3389}
3390
3391static HChar *
3392s390_irgen_CG(UChar r1, IRTemp op2addr)
3393{
3394 IRTemp op1 = newTemp(Ity_I64);
3395 IRTemp op2 = newTemp(Ity_I64);
3396
3397 assign(op1, get_gpr_dw0(r1));
3398 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3399 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3400
3401 return "cg";
3402}
3403
3404static HChar *
3405s390_irgen_CGF(UChar r1, IRTemp op2addr)
3406{
3407 IRTemp op1 = newTemp(Ity_I64);
3408 IRTemp op2 = newTemp(Ity_I64);
3409
3410 assign(op1, get_gpr_dw0(r1));
3411 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
3412 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3413
3414 return "cgf";
3415}
3416
3417static HChar *
3418s390_irgen_CFI(UChar r1, UInt i2)
3419{
3420 IRTemp op1 = newTemp(Ity_I32);
3421 Int op2;
3422
3423 assign(op1, get_gpr_w1(r1));
3424 op2 = (Int)i2;
3425 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3426 mkU32((UInt)op2)));
3427
3428 return "cfi";
3429}
3430
3431static HChar *
3432s390_irgen_CGFI(UChar r1, UInt i2)
3433{
3434 IRTemp op1 = newTemp(Ity_I64);
3435 Long op2;
3436
3437 assign(op1, get_gpr_dw0(r1));
3438 op2 = (Long)(Int)i2;
3439 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3440 mkU64((ULong)op2)));
3441
3442 return "cgfi";
3443}
3444
3445static HChar *
3446s390_irgen_CRL(UChar r1, UInt i2)
3447{
3448 IRTemp op1 = newTemp(Ity_I32);
3449 IRTemp op2 = newTemp(Ity_I32);
3450
3451 assign(op1, get_gpr_w1(r1));
3452 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3453 i2 << 1))));
3454 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3455
3456 return "crl";
3457}
3458
3459static HChar *
3460s390_irgen_CGRL(UChar r1, UInt i2)
3461{
3462 IRTemp op1 = newTemp(Ity_I64);
3463 IRTemp op2 = newTemp(Ity_I64);
3464
3465 assign(op1, get_gpr_dw0(r1));
3466 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
3467 i2 << 1))));
3468 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3469
3470 return "cgrl";
3471}
3472
3473static HChar *
3474s390_irgen_CGFRL(UChar r1, UInt i2)
3475{
3476 IRTemp op1 = newTemp(Ity_I64);
3477 IRTemp op2 = newTemp(Ity_I64);
3478
3479 assign(op1, get_gpr_dw0(r1));
3480 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
3481 ((ULong)(Long)(Int)i2 << 1)))));
3482 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3483
3484 return "cgfrl";
3485}
3486
3487static HChar *
3488s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3489{
3490 IRTemp op1 = newTemp(Ity_I32);
3491 IRTemp op2 = newTemp(Ity_I32);
3492 IRTemp icc = newTemp(Ity_I32);
3493 IRTemp cond = newTemp(Ity_I32);
3494
3495 if (m3 == 0) {
3496 } else {
3497 if (m3 == 14) {
3498 always_goto(mkexpr(op4addr));
3499 } else {
3500 assign(op1, get_gpr_w1(r1));
3501 assign(op2, get_gpr_w1(r2));
3502 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3503 op2));
3504 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3505 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3506 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3507 mkU32(0)), mkexpr(op4addr));
3508 }
3509 }
3510
3511 return "crb";
3512}
3513
3514static HChar *
3515s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
3516{
3517 IRTemp op1 = newTemp(Ity_I64);
3518 IRTemp op2 = newTemp(Ity_I64);
3519 IRTemp icc = newTemp(Ity_I32);
3520 IRTemp cond = newTemp(Ity_I32);
3521
3522 if (m3 == 0) {
3523 } else {
3524 if (m3 == 14) {
3525 always_goto(mkexpr(op4addr));
3526 } else {
3527 assign(op1, get_gpr_dw0(r1));
3528 assign(op2, get_gpr_dw0(r2));
3529 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3530 op2));
3531 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3532 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3533 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3534 mkU32(0)), mkexpr(op4addr));
3535 }
3536 }
3537
3538 return "cgrb";
3539}
3540
3541static HChar *
3542s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3543{
3544 IRTemp op1 = newTemp(Ity_I32);
3545 IRTemp op2 = newTemp(Ity_I32);
3546 IRTemp icc = newTemp(Ity_I32);
3547 IRTemp cond = newTemp(Ity_I32);
3548
3549 if (m3 == 0) {
3550 } else {
3551 if (m3 == 14) {
3552 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3553 );
3554 } else {
3555 assign(op1, get_gpr_w1(r1));
3556 assign(op2, get_gpr_w1(r2));
3557 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3558 op2));
3559 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3560 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3561 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3562 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3563
3564 }
3565 }
3566
3567 return "crj";
3568}
3569
3570static HChar *
3571s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
3572{
3573 IRTemp op1 = newTemp(Ity_I64);
3574 IRTemp op2 = newTemp(Ity_I64);
3575 IRTemp icc = newTemp(Ity_I32);
3576 IRTemp cond = newTemp(Ity_I32);
3577
3578 if (m3 == 0) {
3579 } else {
3580 if (m3 == 14) {
3581 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3582 );
3583 } else {
3584 assign(op1, get_gpr_dw0(r1));
3585 assign(op2, get_gpr_dw0(r2));
3586 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3587 op2));
3588 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3589 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3590 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3591 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3592
3593 }
3594 }
3595
3596 return "cgrj";
3597}
3598
3599static HChar *
3600s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3601{
3602 IRTemp op1 = newTemp(Ity_I32);
3603 Int op2;
3604 IRTemp icc = newTemp(Ity_I32);
3605 IRTemp cond = newTemp(Ity_I32);
3606
3607 if (m3 == 0) {
3608 } else {
3609 if (m3 == 14) {
3610 always_goto(mkexpr(op4addr));
3611 } else {
3612 assign(op1, get_gpr_w1(r1));
3613 op2 = (Int)(Char)i2;
3614 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3615 mktemp(Ity_I32, mkU32((UInt)op2))));
3616 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3617 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3618 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3619 mkU32(0)), mkexpr(op4addr));
3620 }
3621 }
3622
3623 return "cib";
3624}
3625
3626static HChar *
3627s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
3628{
3629 IRTemp op1 = newTemp(Ity_I64);
3630 Long op2;
3631 IRTemp icc = newTemp(Ity_I32);
3632 IRTemp cond = newTemp(Ity_I32);
3633
3634 if (m3 == 0) {
3635 } else {
3636 if (m3 == 14) {
3637 always_goto(mkexpr(op4addr));
3638 } else {
3639 assign(op1, get_gpr_dw0(r1));
3640 op2 = (Long)(Char)i2;
3641 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3642 mktemp(Ity_I64, mkU64((ULong)op2))));
3643 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3644 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3645 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
3646 mkU32(0)), mkexpr(op4addr));
3647 }
3648 }
3649
3650 return "cgib";
3651}
3652
3653static HChar *
3654s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3655{
3656 IRTemp op1 = newTemp(Ity_I32);
3657 Int op2;
3658 IRTemp icc = newTemp(Ity_I32);
3659 IRTemp cond = newTemp(Ity_I32);
3660
3661 if (m3 == 0) {
3662 } else {
3663 if (m3 == 14) {
3664 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3665 );
3666 } else {
3667 assign(op1, get_gpr_w1(r1));
3668 op2 = (Int)(Char)i2;
3669 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3670 mktemp(Ity_I32, mkU32((UInt)op2))));
3671 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3672 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3673 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3674 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3675
3676 }
3677 }
3678
3679 return "cij";
3680}
3681
3682static HChar *
3683s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
3684{
3685 IRTemp op1 = newTemp(Ity_I64);
3686 Long op2;
3687 IRTemp icc = newTemp(Ity_I32);
3688 IRTemp cond = newTemp(Ity_I32);
3689
3690 if (m3 == 0) {
3691 } else {
3692 if (m3 == 14) {
3693 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
3694 );
3695 } else {
3696 assign(op1, get_gpr_dw0(r1));
3697 op2 = (Long)(Char)i2;
3698 assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
3699 mktemp(Ity_I64, mkU64((ULong)op2))));
3700 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
3701 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
3702 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
3703 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
3704
3705 }
3706 }
3707
3708 return "cgij";
3709}
3710
3711static HChar *
3712s390_irgen_CH(UChar r1, IRTemp op2addr)
3713{
3714 IRTemp op1 = newTemp(Ity_I32);
3715 IRTemp op2 = newTemp(Ity_I32);
3716
3717 assign(op1, get_gpr_w1(r1));
3718 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3719 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3720
3721 return "ch";
3722}
3723
3724static HChar *
3725s390_irgen_CHY(UChar r1, IRTemp op2addr)
3726{
3727 IRTemp op1 = newTemp(Ity_I32);
3728 IRTemp op2 = newTemp(Ity_I32);
3729
3730 assign(op1, get_gpr_w1(r1));
3731 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
3732 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3733
3734 return "chy";
3735}
3736
3737static HChar *
3738s390_irgen_CGH(UChar r1, IRTemp op2addr)
3739{
3740 IRTemp op1 = newTemp(Ity_I64);
3741 IRTemp op2 = newTemp(Ity_I64);
3742
3743 assign(op1, get_gpr_dw0(r1));
3744 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
3745 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3746
3747 return "cgh";
3748}
3749
3750static HChar *
3751s390_irgen_CHI(UChar r1, UShort i2)
3752{
3753 IRTemp op1 = newTemp(Ity_I32);
3754 Int op2;
3755
3756 assign(op1, get_gpr_w1(r1));
3757 op2 = (Int)(Short)i2;
3758 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3759 mkU32((UInt)op2)));
3760
3761 return "chi";
3762}
3763
3764static HChar *
3765s390_irgen_CGHI(UChar r1, UShort i2)
3766{
3767 IRTemp op1 = newTemp(Ity_I64);
3768 Long op2;
3769
3770 assign(op1, get_gpr_dw0(r1));
3771 op2 = (Long)(Short)i2;
3772 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3773 mkU64((ULong)op2)));
3774
3775 return "cghi";
3776}
3777
3778static HChar *
3779s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
3780{
3781 IRTemp op1 = newTemp(Ity_I16);
3782 Short op2;
3783
3784 assign(op1, load(Ity_I16, mkexpr(op1addr)));
3785 op2 = (Short)i2;
3786 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
3787 mkU16((UShort)op2)));
3788
3789 return "chhsi";
3790}
3791
3792static HChar *
3793s390_irgen_CHSI(UShort i2, IRTemp op1addr)
3794{
3795 IRTemp op1 = newTemp(Ity_I32);
3796 Int op2;
3797
3798 assign(op1, load(Ity_I32, mkexpr(op1addr)));
3799 op2 = (Int)(Short)i2;
3800 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3801 mkU32((UInt)op2)));
3802
3803 return "chsi";
3804}
3805
3806static HChar *
3807s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
3808{
3809 IRTemp op1 = newTemp(Ity_I64);
3810 Long op2;
3811
3812 assign(op1, load(Ity_I64, mkexpr(op1addr)));
3813 op2 = (Long)(Short)i2;
3814 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
3815 mkU64((ULong)op2)));
3816
3817 return "cghsi";
3818}
3819
3820static HChar *
3821s390_irgen_CHRL(UChar r1, UInt i2)
3822{
3823 IRTemp op1 = newTemp(Ity_I32);
3824 IRTemp op2 = newTemp(Ity_I32);
3825
3826 assign(op1, get_gpr_w1(r1));
3827 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
3828 ((ULong)(Long)(Int)i2 << 1)))));
3829 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3830
3831 return "chrl";
3832}
3833
3834static HChar *
3835s390_irgen_CGHRL(UChar r1, UInt i2)
3836{
3837 IRTemp op1 = newTemp(Ity_I64);
3838 IRTemp op2 = newTemp(Ity_I64);
3839
3840 assign(op1, get_gpr_dw0(r1));
3841 assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
3842 ((ULong)(Long)(Int)i2 << 1)))));
3843 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3844
3845 return "cghrl";
3846}
3847
3848static HChar *
3849s390_irgen_CHHR(UChar r1, UChar r2)
3850{
3851 IRTemp op1 = newTemp(Ity_I32);
3852 IRTemp op2 = newTemp(Ity_I32);
3853
3854 assign(op1, get_gpr_w0(r1));
3855 assign(op2, get_gpr_w0(r2));
3856 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3857
3858 return "chhr";
3859}
3860
3861static HChar *
3862s390_irgen_CHLR(UChar r1, UChar r2)
3863{
3864 IRTemp op1 = newTemp(Ity_I32);
3865 IRTemp op2 = newTemp(Ity_I32);
3866
3867 assign(op1, get_gpr_w0(r1));
3868 assign(op2, get_gpr_w1(r2));
3869 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3870
3871 return "chlr";
3872}
3873
3874static HChar *
3875s390_irgen_CHF(UChar r1, IRTemp op2addr)
3876{
3877 IRTemp op1 = newTemp(Ity_I32);
3878 IRTemp op2 = newTemp(Ity_I32);
3879
3880 assign(op1, get_gpr_w0(r1));
3881 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3882 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
3883
3884 return "chf";
3885}
3886
3887static HChar *
3888s390_irgen_CIH(UChar r1, UInt i2)
3889{
3890 IRTemp op1 = newTemp(Ity_I32);
3891 Int op2;
3892
3893 assign(op1, get_gpr_w0(r1));
3894 op2 = (Int)i2;
3895 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
3896 mkU32((UInt)op2)));
3897
3898 return "cih";
3899}
3900
3901static HChar *
3902s390_irgen_CLR(UChar r1, UChar r2)
3903{
3904 IRTemp op1 = newTemp(Ity_I32);
3905 IRTemp op2 = newTemp(Ity_I32);
3906
3907 assign(op1, get_gpr_w1(r1));
3908 assign(op2, get_gpr_w1(r2));
3909 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3910
3911 return "clr";
3912}
3913
3914static HChar *
3915s390_irgen_CLGR(UChar r1, UChar r2)
3916{
3917 IRTemp op1 = newTemp(Ity_I64);
3918 IRTemp op2 = newTemp(Ity_I64);
3919
3920 assign(op1, get_gpr_dw0(r1));
3921 assign(op2, get_gpr_dw0(r2));
3922 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3923
3924 return "clgr";
3925}
3926
3927static HChar *
3928s390_irgen_CLGFR(UChar r1, UChar r2)
3929{
3930 IRTemp op1 = newTemp(Ity_I64);
3931 IRTemp op2 = newTemp(Ity_I64);
3932
3933 assign(op1, get_gpr_dw0(r1));
3934 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
3935 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3936
3937 return "clgfr";
3938}
3939
3940static HChar *
3941s390_irgen_CL(UChar r1, IRTemp op2addr)
3942{
3943 IRTemp op1 = newTemp(Ity_I32);
3944 IRTemp op2 = newTemp(Ity_I32);
3945
3946 assign(op1, get_gpr_w1(r1));
3947 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3948 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3949
3950 return "cl";
3951}
3952
3953static HChar *
3954s390_irgen_CLY(UChar r1, IRTemp op2addr)
3955{
3956 IRTemp op1 = newTemp(Ity_I32);
3957 IRTemp op2 = newTemp(Ity_I32);
3958
3959 assign(op1, get_gpr_w1(r1));
3960 assign(op2, load(Ity_I32, mkexpr(op2addr)));
3961 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3962
3963 return "cly";
3964}
3965
3966static HChar *
3967s390_irgen_CLG(UChar r1, IRTemp op2addr)
3968{
3969 IRTemp op1 = newTemp(Ity_I64);
3970 IRTemp op2 = newTemp(Ity_I64);
3971
3972 assign(op1, get_gpr_dw0(r1));
3973 assign(op2, load(Ity_I64, mkexpr(op2addr)));
3974 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3975
3976 return "clg";
3977}
3978
3979static HChar *
3980s390_irgen_CLGF(UChar r1, IRTemp op2addr)
3981{
3982 IRTemp op1 = newTemp(Ity_I64);
3983 IRTemp op2 = newTemp(Ity_I64);
3984
3985 assign(op1, get_gpr_dw0(r1));
3986 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
3987 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
3988
3989 return "clgf";
3990}
3991
3992static HChar *
3993s390_irgen_CLFI(UChar r1, UInt i2)
3994{
3995 IRTemp op1 = newTemp(Ity_I32);
3996 UInt op2;
3997
3998 assign(op1, get_gpr_w1(r1));
3999 op2 = i2;
4000 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4001 mkU32(op2)));
4002
4003 return "clfi";
4004}
4005
4006static HChar *
4007s390_irgen_CLGFI(UChar r1, UInt i2)
4008{
4009 IRTemp op1 = newTemp(Ity_I64);
4010 ULong op2;
4011
4012 assign(op1, get_gpr_dw0(r1));
4013 op2 = (ULong)i2;
4014 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4015 mkU64(op2)));
4016
4017 return "clgfi";
4018}
4019
4020static HChar *
4021s390_irgen_CLI(UChar i2, IRTemp op1addr)
4022{
4023 IRTemp op1 = newTemp(Ity_I8);
4024 UChar op2;
4025
4026 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4027 op2 = i2;
4028 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4029 mkU8(op2)));
4030
4031 return "cli";
4032}
4033
4034static HChar *
4035s390_irgen_CLIY(UChar i2, IRTemp op1addr)
4036{
4037 IRTemp op1 = newTemp(Ity_I8);
4038 UChar op2;
4039
4040 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4041 op2 = i2;
4042 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
4043 mkU8(op2)));
4044
4045 return "cliy";
4046}
4047
4048static HChar *
4049s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
4050{
4051 IRTemp op1 = newTemp(Ity_I32);
4052 UInt op2;
4053
4054 assign(op1, load(Ity_I32, mkexpr(op1addr)));
4055 op2 = (UInt)i2;
4056 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4057 mkU32(op2)));
4058
4059 return "clfhsi";
4060}
4061
4062static HChar *
4063s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
4064{
4065 IRTemp op1 = newTemp(Ity_I64);
4066 ULong op2;
4067
4068 assign(op1, load(Ity_I64, mkexpr(op1addr)));
4069 op2 = (ULong)i2;
4070 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
4071 mkU64(op2)));
4072
4073 return "clghsi";
4074}
4075
4076static HChar *
4077s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
4078{
4079 IRTemp op1 = newTemp(Ity_I16);
4080 UShort op2;
4081
4082 assign(op1, load(Ity_I16, mkexpr(op1addr)));
4083 op2 = i2;
4084 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
4085 mkU16(op2)));
4086
4087 return "clhhsi";
4088}
4089
4090static HChar *
4091s390_irgen_CLRL(UChar r1, UInt i2)
4092{
4093 IRTemp op1 = newTemp(Ity_I32);
4094 IRTemp op2 = newTemp(Ity_I32);
4095
4096 assign(op1, get_gpr_w1(r1));
4097 assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4098 i2 << 1))));
4099 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4100
4101 return "clrl";
4102}
4103
4104static HChar *
4105s390_irgen_CLGRL(UChar r1, UInt i2)
4106{
4107 IRTemp op1 = newTemp(Ity_I64);
4108 IRTemp op2 = newTemp(Ity_I64);
4109
4110 assign(op1, get_gpr_dw0(r1));
4111 assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
4112 i2 << 1))));
4113 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4114
4115 return "clgrl";
4116}
4117
4118static HChar *
4119s390_irgen_CLGFRL(UChar r1, UInt i2)
4120{
4121 IRTemp op1 = newTemp(Ity_I64);
4122 IRTemp op2 = newTemp(Ity_I64);
4123
4124 assign(op1, get_gpr_dw0(r1));
4125 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
4126 ((ULong)(Long)(Int)i2 << 1)))));
4127 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4128
4129 return "clgfrl";
4130}
4131
4132static HChar *
4133s390_irgen_CLHRL(UChar r1, UInt i2)
4134{
4135 IRTemp op1 = newTemp(Ity_I32);
4136 IRTemp op2 = newTemp(Ity_I32);
4137
4138 assign(op1, get_gpr_w1(r1));
4139 assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
4140 ((ULong)(Long)(Int)i2 << 1)))));
4141 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4142
4143 return "clhrl";
4144}
4145
4146static HChar *
4147s390_irgen_CLGHRL(UChar r1, UInt i2)
4148{
4149 IRTemp op1 = newTemp(Ity_I64);
4150 IRTemp op2 = newTemp(Ity_I64);
4151
4152 assign(op1, get_gpr_dw0(r1));
4153 assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
4154 ((ULong)(Long)(Int)i2 << 1)))));
4155 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4156
4157 return "clghrl";
4158}
4159
4160static HChar *
4161s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4162{
4163 IRTemp op1 = newTemp(Ity_I32);
4164 IRTemp op2 = newTemp(Ity_I32);
4165 IRTemp icc = newTemp(Ity_I32);
4166 IRTemp cond = newTemp(Ity_I32);
4167
4168 if (m3 == 0) {
4169 } else {
4170 if (m3 == 14) {
4171 always_goto(mkexpr(op4addr));
4172 } else {
4173 assign(op1, get_gpr_w1(r1));
4174 assign(op2, get_gpr_w1(r2));
4175 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4176 op2));
4177 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4178 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4179 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4180 mkU32(0)), mkexpr(op4addr));
4181 }
4182 }
4183
4184 return "clrb";
4185}
4186
4187static HChar *
4188s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
4189{
4190 IRTemp op1 = newTemp(Ity_I64);
4191 IRTemp op2 = newTemp(Ity_I64);
4192 IRTemp icc = newTemp(Ity_I32);
4193 IRTemp cond = newTemp(Ity_I32);
4194
4195 if (m3 == 0) {
4196 } else {
4197 if (m3 == 14) {
4198 always_goto(mkexpr(op4addr));
4199 } else {
4200 assign(op1, get_gpr_dw0(r1));
4201 assign(op2, get_gpr_dw0(r2));
4202 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4203 op2));
4204 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4205 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4206 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4207 mkU32(0)), mkexpr(op4addr));
4208 }
4209 }
4210
4211 return "clgrb";
4212}
4213
4214static HChar *
4215s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4216{
4217 IRTemp op1 = newTemp(Ity_I32);
4218 IRTemp op2 = newTemp(Ity_I32);
4219 IRTemp icc = newTemp(Ity_I32);
4220 IRTemp cond = newTemp(Ity_I32);
4221
4222 if (m3 == 0) {
4223 } else {
4224 if (m3 == 14) {
4225 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4226 );
4227 } else {
4228 assign(op1, get_gpr_w1(r1));
4229 assign(op2, get_gpr_w1(r2));
4230 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4231 op2));
4232 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4233 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4234 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4235 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4236
4237 }
4238 }
4239
4240 return "clrj";
4241}
4242
4243static HChar *
4244s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
4245{
4246 IRTemp op1 = newTemp(Ity_I64);
4247 IRTemp op2 = newTemp(Ity_I64);
4248 IRTemp icc = newTemp(Ity_I32);
4249 IRTemp cond = newTemp(Ity_I32);
4250
4251 if (m3 == 0) {
4252 } else {
4253 if (m3 == 14) {
4254 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4255 );
4256 } else {
4257 assign(op1, get_gpr_dw0(r1));
4258 assign(op2, get_gpr_dw0(r2));
4259 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4260 op2));
4261 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4262 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4263 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4264 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4265
4266 }
4267 }
4268
4269 return "clgrj";
4270}
4271
4272static HChar *
4273s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4274{
4275 IRTemp op1 = newTemp(Ity_I32);
4276 UInt op2;
4277 IRTemp icc = newTemp(Ity_I32);
4278 IRTemp cond = newTemp(Ity_I32);
4279
4280 if (m3 == 0) {
4281 } else {
4282 if (m3 == 14) {
4283 always_goto(mkexpr(op4addr));
4284 } else {
4285 assign(op1, get_gpr_w1(r1));
4286 op2 = (UInt)i2;
4287 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4288 mktemp(Ity_I32, mkU32(op2))));
4289 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4290 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4291 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4292 mkU32(0)), mkexpr(op4addr));
4293 }
4294 }
4295
4296 return "clib";
4297}
4298
4299static HChar *
4300s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
4301{
4302 IRTemp op1 = newTemp(Ity_I64);
4303 ULong op2;
4304 IRTemp icc = newTemp(Ity_I32);
4305 IRTemp cond = newTemp(Ity_I32);
4306
4307 if (m3 == 0) {
4308 } else {
4309 if (m3 == 14) {
4310 always_goto(mkexpr(op4addr));
4311 } else {
4312 assign(op1, get_gpr_dw0(r1));
4313 op2 = (ULong)i2;
4314 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4315 mktemp(Ity_I64, mkU64(op2))));
4316 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4317 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4318 if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
4319 mkU32(0)), mkexpr(op4addr));
4320 }
4321 }
4322
4323 return "clgib";
4324}
4325
4326static HChar *
4327s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4328{
4329 IRTemp op1 = newTemp(Ity_I32);
4330 UInt op2;
4331 IRTemp icc = newTemp(Ity_I32);
4332 IRTemp cond = newTemp(Ity_I32);
4333
4334 if (m3 == 0) {
4335 } else {
4336 if (m3 == 14) {
4337 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4338 );
4339 } else {
4340 assign(op1, get_gpr_w1(r1));
4341 op2 = (UInt)i2;
4342 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4343 mktemp(Ity_I32, mkU32(op2))));
4344 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4345 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4346 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4347 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4348
4349 }
4350 }
4351
4352 return "clij";
4353}
4354
4355static HChar *
4356s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
4357{
4358 IRTemp op1 = newTemp(Ity_I64);
4359 ULong op2;
4360 IRTemp icc = newTemp(Ity_I32);
4361 IRTemp cond = newTemp(Ity_I32);
4362
4363 if (m3 == 0) {
4364 } else {
4365 if (m3 == 14) {
4366 always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
4367 );
4368 } else {
4369 assign(op1, get_gpr_dw0(r1));
4370 op2 = (ULong)i2;
4371 assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
4372 mktemp(Ity_I64, mkU64(op2))));
4373 assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
4374 unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
4375 if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
4376 guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
4377
4378 }
4379 }
4380
4381 return "clgij";
4382}
4383
4384static HChar *
4385s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
4386{
4387 IRTemp op1 = newTemp(Ity_I32);
4388 IRTemp op2 = newTemp(Ity_I32);
4389 IRTemp b0 = newTemp(Ity_I32);
4390 IRTemp b1 = newTemp(Ity_I32);
4391 IRTemp b2 = newTemp(Ity_I32);
4392 IRTemp b3 = newTemp(Ity_I32);
4393 IRTemp c0 = newTemp(Ity_I32);
4394 IRTemp c1 = newTemp(Ity_I32);
4395 IRTemp c2 = newTemp(Ity_I32);
4396 IRTemp c3 = newTemp(Ity_I32);
4397 UChar n;
4398
4399 n = 0;
4400 if ((r3 & 8) != 0) {
4401 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4402 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4403 n = n + 1;
4404 } else {
4405 assign(b0, mkU32(0));
4406 assign(c0, mkU32(0));
4407 }
4408 if ((r3 & 4) != 0) {
4409 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4410 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4411 mkU64(n)))));
4412 n = n + 1;
4413 } else {
4414 assign(b1, mkU32(0));
4415 assign(c1, mkU32(0));
4416 }
4417 if ((r3 & 2) != 0) {
4418 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4419 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4420 mkU64(n)))));
4421 n = n + 1;
4422 } else {
4423 assign(b2, mkU32(0));
4424 assign(c2, mkU32(0));
4425 }
4426 if ((r3 & 1) != 0) {
4427 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4428 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4429 mkU64(n)))));
4430 n = n + 1;
4431 } else {
4432 assign(b3, mkU32(0));
4433 assign(c3, mkU32(0));
4434 }
4435 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4436 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4437 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4438 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4439 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4440 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4441 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4442
4443 return "clm";
4444}
4445
4446static HChar *
4447s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
4448{
4449 IRTemp op1 = newTemp(Ity_I32);
4450 IRTemp op2 = newTemp(Ity_I32);
4451 IRTemp b0 = newTemp(Ity_I32);
4452 IRTemp b1 = newTemp(Ity_I32);
4453 IRTemp b2 = newTemp(Ity_I32);
4454 IRTemp b3 = newTemp(Ity_I32);
4455 IRTemp c0 = newTemp(Ity_I32);
4456 IRTemp c1 = newTemp(Ity_I32);
4457 IRTemp c2 = newTemp(Ity_I32);
4458 IRTemp c3 = newTemp(Ity_I32);
4459 UChar n;
4460
4461 n = 0;
4462 if ((r3 & 8) != 0) {
4463 assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
4464 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4465 n = n + 1;
4466 } else {
4467 assign(b0, mkU32(0));
4468 assign(c0, mkU32(0));
4469 }
4470 if ((r3 & 4) != 0) {
4471 assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
4472 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4473 mkU64(n)))));
4474 n = n + 1;
4475 } else {
4476 assign(b1, mkU32(0));
4477 assign(c1, mkU32(0));
4478 }
4479 if ((r3 & 2) != 0) {
4480 assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
4481 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4482 mkU64(n)))));
4483 n = n + 1;
4484 } else {
4485 assign(b2, mkU32(0));
4486 assign(c2, mkU32(0));
4487 }
4488 if ((r3 & 1) != 0) {
4489 assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
4490 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4491 mkU64(n)))));
4492 n = n + 1;
4493 } else {
4494 assign(b3, mkU32(0));
4495 assign(c3, mkU32(0));
4496 }
4497 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4498 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4499 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4500 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4501 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4502 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4503 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4504
4505 return "clmy";
4506}
4507
4508static HChar *
4509s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
4510{
4511 IRTemp op1 = newTemp(Ity_I32);
4512 IRTemp op2 = newTemp(Ity_I32);
4513 IRTemp b0 = newTemp(Ity_I32);
4514 IRTemp b1 = newTemp(Ity_I32);
4515 IRTemp b2 = newTemp(Ity_I32);
4516 IRTemp b3 = newTemp(Ity_I32);
4517 IRTemp c0 = newTemp(Ity_I32);
4518 IRTemp c1 = newTemp(Ity_I32);
4519 IRTemp c2 = newTemp(Ity_I32);
4520 IRTemp c3 = newTemp(Ity_I32);
4521 UChar n;
4522
4523 n = 0;
4524 if ((r3 & 8) != 0) {
4525 assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
4526 assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
4527 n = n + 1;
4528 } else {
4529 assign(b0, mkU32(0));
4530 assign(c0, mkU32(0));
4531 }
4532 if ((r3 & 4) != 0) {
4533 assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
4534 assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4535 mkU64(n)))));
4536 n = n + 1;
4537 } else {
4538 assign(b1, mkU32(0));
4539 assign(c1, mkU32(0));
4540 }
4541 if ((r3 & 2) != 0) {
4542 assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
4543 assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4544 mkU64(n)))));
4545 n = n + 1;
4546 } else {
4547 assign(b2, mkU32(0));
4548 assign(c2, mkU32(0));
4549 }
4550 if ((r3 & 1) != 0) {
4551 assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
4552 assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
4553 mkU64(n)))));
4554 n = n + 1;
4555 } else {
4556 assign(b3, mkU32(0));
4557 assign(c3, mkU32(0));
4558 }
4559 assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4560 mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
4561 binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
4562 assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
4563 mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
4564 binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
4565 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4566
4567 return "clmh";
4568}
4569
4570static HChar *
4571s390_irgen_CLHHR(UChar r1, UChar r2)
4572{
4573 IRTemp op1 = newTemp(Ity_I32);
4574 IRTemp op2 = newTemp(Ity_I32);
4575
4576 assign(op1, get_gpr_w0(r1));
4577 assign(op2, get_gpr_w0(r2));
4578 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4579
4580 return "clhhr";
4581}
4582
4583static HChar *
4584s390_irgen_CLHLR(UChar r1, UChar r2)
4585{
4586 IRTemp op1 = newTemp(Ity_I32);
4587 IRTemp op2 = newTemp(Ity_I32);
4588
4589 assign(op1, get_gpr_w0(r1));
4590 assign(op2, get_gpr_w1(r2));
4591 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4592
4593 return "clhlr";
4594}
4595
4596static HChar *
4597s390_irgen_CLHF(UChar r1, IRTemp op2addr)
4598{
4599 IRTemp op1 = newTemp(Ity_I32);
4600 IRTemp op2 = newTemp(Ity_I32);
4601
4602 assign(op1, get_gpr_w0(r1));
4603 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4604 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
4605
4606 return "clhf";
4607}
4608
4609static HChar *
4610s390_irgen_CLIH(UChar r1, UInt i2)
4611{
4612 IRTemp op1 = newTemp(Ity_I32);
4613 UInt op2;
4614
4615 assign(op1, get_gpr_w0(r1));
4616 op2 = i2;
4617 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
4618 mkU32(op2)));
4619
4620 return "clih";
4621}
4622
4623static HChar *
4624s390_irgen_CPYA(UChar r1, UChar r2)
4625{
4626 put_ar_w0(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004627 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004628 s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
4629
4630 return "cpya";
4631}
4632
4633static HChar *
4634s390_irgen_XR(UChar r1, UChar r2)
4635{
4636 IRTemp op1 = newTemp(Ity_I32);
4637 IRTemp op2 = newTemp(Ity_I32);
4638 IRTemp result = newTemp(Ity_I32);
4639
4640 if (r1 == r2) {
4641 assign(result, mkU32(0));
4642 } else {
4643 assign(op1, get_gpr_w1(r1));
4644 assign(op2, get_gpr_w1(r2));
4645 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4646 }
4647 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4648 put_gpr_w1(r1, mkexpr(result));
4649
4650 return "xr";
4651}
4652
4653static HChar *
4654s390_irgen_XGR(UChar r1, UChar r2)
4655{
4656 IRTemp op1 = newTemp(Ity_I64);
4657 IRTemp op2 = newTemp(Ity_I64);
4658 IRTemp result = newTemp(Ity_I64);
4659
4660 if (r1 == r2) {
4661 assign(result, mkU64(0));
4662 } else {
4663 assign(op1, get_gpr_dw0(r1));
4664 assign(op2, get_gpr_dw0(r2));
4665 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4666 }
4667 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4668 put_gpr_dw0(r1, mkexpr(result));
4669
4670 return "xgr";
4671}
4672
4673static HChar *
4674s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
4675{
4676 IRTemp op2 = newTemp(Ity_I32);
4677 IRTemp op3 = newTemp(Ity_I32);
4678 IRTemp result = newTemp(Ity_I32);
4679
4680 assign(op2, get_gpr_w1(r2));
4681 assign(op3, get_gpr_w1(r3));
4682 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
4683 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4684 put_gpr_w1(r1, mkexpr(result));
4685
4686 return "xrk";
4687}
4688
4689static HChar *
4690s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
4691{
4692 IRTemp op2 = newTemp(Ity_I64);
4693 IRTemp op3 = newTemp(Ity_I64);
4694 IRTemp result = newTemp(Ity_I64);
4695
4696 assign(op2, get_gpr_dw0(r2));
4697 assign(op3, get_gpr_dw0(r3));
4698 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
4699 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4700 put_gpr_dw0(r1, mkexpr(result));
4701
4702 return "xgrk";
4703}
4704
4705static HChar *
4706s390_irgen_X(UChar r1, IRTemp op2addr)
4707{
4708 IRTemp op1 = newTemp(Ity_I32);
4709 IRTemp op2 = newTemp(Ity_I32);
4710 IRTemp result = newTemp(Ity_I32);
4711
4712 assign(op1, get_gpr_w1(r1));
4713 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4714 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4715 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4716 put_gpr_w1(r1, mkexpr(result));
4717
4718 return "x";
4719}
4720
4721static HChar *
4722s390_irgen_XY(UChar r1, IRTemp op2addr)
4723{
4724 IRTemp op1 = newTemp(Ity_I32);
4725 IRTemp op2 = newTemp(Ity_I32);
4726 IRTemp result = newTemp(Ity_I32);
4727
4728 assign(op1, get_gpr_w1(r1));
4729 assign(op2, load(Ity_I32, mkexpr(op2addr)));
4730 assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
4731 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4732 put_gpr_w1(r1, mkexpr(result));
4733
4734 return "xy";
4735}
4736
4737static HChar *
4738s390_irgen_XG(UChar r1, IRTemp op2addr)
4739{
4740 IRTemp op1 = newTemp(Ity_I64);
4741 IRTemp op2 = newTemp(Ity_I64);
4742 IRTemp result = newTemp(Ity_I64);
4743
4744 assign(op1, get_gpr_dw0(r1));
4745 assign(op2, load(Ity_I64, mkexpr(op2addr)));
4746 assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
4747 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4748 put_gpr_dw0(r1, mkexpr(result));
4749
4750 return "xg";
4751}
4752
4753static HChar *
4754s390_irgen_XI(UChar i2, IRTemp op1addr)
4755{
4756 IRTemp op1 = newTemp(Ity_I8);
4757 UChar op2;
4758 IRTemp result = newTemp(Ity_I8);
4759
4760 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4761 op2 = i2;
4762 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4763 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4764 store(mkexpr(op1addr), mkexpr(result));
4765
4766 return "xi";
4767}
4768
4769static HChar *
4770s390_irgen_XIY(UChar i2, IRTemp op1addr)
4771{
4772 IRTemp op1 = newTemp(Ity_I8);
4773 UChar op2;
4774 IRTemp result = newTemp(Ity_I8);
4775
4776 assign(op1, load(Ity_I8, mkexpr(op1addr)));
4777 op2 = i2;
4778 assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
4779 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4780 store(mkexpr(op1addr), mkexpr(result));
4781
4782 return "xiy";
4783}
4784
4785static HChar *
4786s390_irgen_XIHF(UChar r1, UInt i2)
4787{
4788 IRTemp op1 = newTemp(Ity_I32);
4789 UInt op2;
4790 IRTemp result = newTemp(Ity_I32);
4791
4792 assign(op1, get_gpr_w0(r1));
4793 op2 = i2;
4794 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4795 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4796 put_gpr_w0(r1, mkexpr(result));
4797
4798 return "xihf";
4799}
4800
4801static HChar *
4802s390_irgen_XILF(UChar r1, UInt i2)
4803{
4804 IRTemp op1 = newTemp(Ity_I32);
4805 UInt op2;
4806 IRTemp result = newTemp(Ity_I32);
4807
4808 assign(op1, get_gpr_w1(r1));
4809 op2 = i2;
4810 assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
4811 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
4812 put_gpr_w1(r1, mkexpr(result));
4813
4814 return "xilf";
4815}
4816
4817static HChar *
4818s390_irgen_EAR(UChar r1, UChar r2)
4819{
4820 put_gpr_w1(r1, get_ar_w0(r2));
sewardj7ee97522011-05-09 21:45:04 +00004821 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00004822 s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
4823
4824 return "ear";
4825}
4826
4827static HChar *
4828s390_irgen_IC(UChar r1, IRTemp op2addr)
4829{
4830 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4831
4832 return "ic";
4833}
4834
4835static HChar *
4836s390_irgen_ICY(UChar r1, IRTemp op2addr)
4837{
4838 put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
4839
4840 return "icy";
4841}
4842
4843static HChar *
4844s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
4845{
4846 UChar n;
4847 IRTemp result = newTemp(Ity_I32);
4848 UInt mask;
4849
4850 n = 0;
4851 mask = (UInt)r3;
4852 if ((mask & 8) != 0) {
4853 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4854 n = n + 1;
4855 }
4856 if ((mask & 4) != 0) {
4857 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4858
4859 n = n + 1;
4860 }
4861 if ((mask & 2) != 0) {
4862 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4863
4864 n = n + 1;
4865 }
4866 if ((mask & 1) != 0) {
4867 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4868
4869 n = n + 1;
4870 }
4871 assign(result, get_gpr_w1(r1));
4872 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4873 mkU32(mask)));
4874
4875 return "icm";
4876}
4877
4878static HChar *
4879s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
4880{
4881 UChar n;
4882 IRTemp result = newTemp(Ity_I32);
4883 UInt mask;
4884
4885 n = 0;
4886 mask = (UInt)r3;
4887 if ((mask & 8) != 0) {
4888 put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
4889 n = n + 1;
4890 }
4891 if ((mask & 4) != 0) {
4892 put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4893
4894 n = n + 1;
4895 }
4896 if ((mask & 2) != 0) {
4897 put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4898
4899 n = n + 1;
4900 }
4901 if ((mask & 1) != 0) {
4902 put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4903
4904 n = n + 1;
4905 }
4906 assign(result, get_gpr_w1(r1));
4907 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4908 mkU32(mask)));
4909
4910 return "icmy";
4911}
4912
4913static HChar *
4914s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
4915{
4916 UChar n;
4917 IRTemp result = newTemp(Ity_I32);
4918 UInt mask;
4919
4920 n = 0;
4921 mask = (UInt)r3;
4922 if ((mask & 8) != 0) {
4923 put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
4924 n = n + 1;
4925 }
4926 if ((mask & 4) != 0) {
4927 put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4928
4929 n = n + 1;
4930 }
4931 if ((mask & 2) != 0) {
4932 put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4933
4934 n = n + 1;
4935 }
4936 if ((mask & 1) != 0) {
4937 put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
4938
4939 n = n + 1;
4940 }
4941 assign(result, get_gpr_w0(r1));
4942 s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
4943 mkU32(mask)));
4944
4945 return "icmh";
4946}
4947
4948static HChar *
4949s390_irgen_IIHF(UChar r1, UInt i2)
4950{
4951 put_gpr_w0(r1, mkU32(i2));
4952
4953 return "iihf";
4954}
4955
4956static HChar *
4957s390_irgen_IIHH(UChar r1, UShort i2)
4958{
4959 put_gpr_hw0(r1, mkU16(i2));
4960
4961 return "iihh";
4962}
4963
4964static HChar *
4965s390_irgen_IIHL(UChar r1, UShort i2)
4966{
4967 put_gpr_hw1(r1, mkU16(i2));
4968
4969 return "iihl";
4970}
4971
4972static HChar *
4973s390_irgen_IILF(UChar r1, UInt i2)
4974{
4975 put_gpr_w1(r1, mkU32(i2));
4976
4977 return "iilf";
4978}
4979
4980static HChar *
4981s390_irgen_IILH(UChar r1, UShort i2)
4982{
4983 put_gpr_hw2(r1, mkU16(i2));
4984
4985 return "iilh";
4986}
4987
4988static HChar *
4989s390_irgen_IILL(UChar r1, UShort i2)
4990{
4991 put_gpr_hw3(r1, mkU16(i2));
4992
4993 return "iill";
4994}
4995
4996static HChar *
4997s390_irgen_LR(UChar r1, UChar r2)
4998{
4999 put_gpr_w1(r1, get_gpr_w1(r2));
5000
5001 return "lr";
5002}
5003
5004static HChar *
5005s390_irgen_LGR(UChar r1, UChar r2)
5006{
5007 put_gpr_dw0(r1, get_gpr_dw0(r2));
5008
5009 return "lgr";
5010}
5011
5012static HChar *
5013s390_irgen_LGFR(UChar r1, UChar r2)
5014{
5015 put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
5016
5017 return "lgfr";
5018}
5019
5020static HChar *
5021s390_irgen_L(UChar r1, IRTemp op2addr)
5022{
5023 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5024
5025 return "l";
5026}
5027
5028static HChar *
5029s390_irgen_LY(UChar r1, IRTemp op2addr)
5030{
5031 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5032
5033 return "ly";
5034}
5035
5036static HChar *
5037s390_irgen_LG(UChar r1, IRTemp op2addr)
5038{
5039 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5040
5041 return "lg";
5042}
5043
5044static HChar *
5045s390_irgen_LGF(UChar r1, IRTemp op2addr)
5046{
5047 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5048
5049 return "lgf";
5050}
5051
5052static HChar *
5053s390_irgen_LGFI(UChar r1, UInt i2)
5054{
5055 put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
5056
5057 return "lgfi";
5058}
5059
5060static HChar *
5061s390_irgen_LRL(UChar r1, UInt i2)
5062{
5063 put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5064 i2 << 1))));
5065
5066 return "lrl";
5067}
5068
5069static HChar *
5070s390_irgen_LGRL(UChar r1, UInt i2)
5071{
5072 put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
5073 i2 << 1))));
5074
5075 return "lgrl";
5076}
5077
5078static HChar *
5079s390_irgen_LGFRL(UChar r1, UInt i2)
5080{
5081 put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5082 ((ULong)(Long)(Int)i2 << 1)))));
5083
5084 return "lgfrl";
5085}
5086
5087static HChar *
5088s390_irgen_LA(UChar r1, IRTemp op2addr)
5089{
5090 put_gpr_dw0(r1, mkexpr(op2addr));
5091
5092 return "la";
5093}
5094
5095static HChar *
5096s390_irgen_LAY(UChar r1, IRTemp op2addr)
5097{
5098 put_gpr_dw0(r1, mkexpr(op2addr));
5099
5100 return "lay";
5101}
5102
5103static HChar *
5104s390_irgen_LAE(UChar r1, IRTemp op2addr)
5105{
5106 put_gpr_dw0(r1, mkexpr(op2addr));
5107
5108 return "lae";
5109}
5110
5111static HChar *
5112s390_irgen_LAEY(UChar r1, IRTemp op2addr)
5113{
5114 put_gpr_dw0(r1, mkexpr(op2addr));
5115
5116 return "laey";
5117}
5118
5119static HChar *
5120s390_irgen_LARL(UChar r1, UInt i2)
5121{
5122 put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
5123
5124 return "larl";
5125}
5126
5127static HChar *
5128s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
5129{
5130 IRTemp op2 = newTemp(Ity_I32);
5131 IRTemp op3 = newTemp(Ity_I32);
5132 IRTemp result = newTemp(Ity_I32);
5133
5134 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5135 assign(op3, get_gpr_w1(r3));
5136 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5137 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
5138 store(mkexpr(op2addr), mkexpr(result));
5139 put_gpr_w1(r1, mkexpr(op2));
5140
5141 return "laa";
5142}
5143
5144static HChar *
5145s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
5146{
5147 IRTemp op2 = newTemp(Ity_I64);
5148 IRTemp op3 = newTemp(Ity_I64);
5149 IRTemp result = newTemp(Ity_I64);
5150
5151 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5152 assign(op3, get_gpr_dw0(r3));
5153 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5154 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
5155 store(mkexpr(op2addr), mkexpr(result));
5156 put_gpr_dw0(r1, mkexpr(op2));
5157
5158 return "laag";
5159}
5160
5161static HChar *
5162s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
5163{
5164 IRTemp op2 = newTemp(Ity_I32);
5165 IRTemp op3 = newTemp(Ity_I32);
5166 IRTemp result = newTemp(Ity_I32);
5167
5168 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5169 assign(op3, get_gpr_w1(r3));
5170 assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
5171 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
5172 store(mkexpr(op2addr), mkexpr(result));
5173 put_gpr_w1(r1, mkexpr(op2));
5174
5175 return "laal";
5176}
5177
5178static HChar *
5179s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
5180{
5181 IRTemp op2 = newTemp(Ity_I64);
5182 IRTemp op3 = newTemp(Ity_I64);
5183 IRTemp result = newTemp(Ity_I64);
5184
5185 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5186 assign(op3, get_gpr_dw0(r3));
5187 assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
5188 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
5189 store(mkexpr(op2addr), mkexpr(result));
5190 put_gpr_dw0(r1, mkexpr(op2));
5191
5192 return "laalg";
5193}
5194
5195static HChar *
5196s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
5197{
5198 IRTemp op2 = newTemp(Ity_I32);
5199 IRTemp op3 = newTemp(Ity_I32);
5200 IRTemp result = newTemp(Ity_I32);
5201
5202 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5203 assign(op3, get_gpr_w1(r3));
5204 assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
5205 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5206 store(mkexpr(op2addr), mkexpr(result));
5207 put_gpr_w1(r1, mkexpr(op2));
5208
5209 return "lan";
5210}
5211
5212static HChar *
5213s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
5214{
5215 IRTemp op2 = newTemp(Ity_I64);
5216 IRTemp op3 = newTemp(Ity_I64);
5217 IRTemp result = newTemp(Ity_I64);
5218
5219 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5220 assign(op3, get_gpr_dw0(r3));
5221 assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
5222 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5223 store(mkexpr(op2addr), mkexpr(result));
5224 put_gpr_dw0(r1, mkexpr(op2));
5225
5226 return "lang";
5227}
5228
5229static HChar *
5230s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
5231{
5232 IRTemp op2 = newTemp(Ity_I32);
5233 IRTemp op3 = newTemp(Ity_I32);
5234 IRTemp result = newTemp(Ity_I32);
5235
5236 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5237 assign(op3, get_gpr_w1(r3));
5238 assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
5239 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5240 store(mkexpr(op2addr), mkexpr(result));
5241 put_gpr_w1(r1, mkexpr(op2));
5242
5243 return "lax";
5244}
5245
5246static HChar *
5247s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
5248{
5249 IRTemp op2 = newTemp(Ity_I64);
5250 IRTemp op3 = newTemp(Ity_I64);
5251 IRTemp result = newTemp(Ity_I64);
5252
5253 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5254 assign(op3, get_gpr_dw0(r3));
5255 assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
5256 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5257 store(mkexpr(op2addr), mkexpr(result));
5258 put_gpr_dw0(r1, mkexpr(op2));
5259
5260 return "laxg";
5261}
5262
5263static HChar *
5264s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
5265{
5266 IRTemp op2 = newTemp(Ity_I32);
5267 IRTemp op3 = newTemp(Ity_I32);
5268 IRTemp result = newTemp(Ity_I32);
5269
5270 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5271 assign(op3, get_gpr_w1(r3));
5272 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
5273 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5274 store(mkexpr(op2addr), mkexpr(result));
5275 put_gpr_w1(r1, mkexpr(op2));
5276
5277 return "lao";
5278}
5279
5280static HChar *
5281s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
5282{
5283 IRTemp op2 = newTemp(Ity_I64);
5284 IRTemp op3 = newTemp(Ity_I64);
5285 IRTemp result = newTemp(Ity_I64);
5286
5287 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5288 assign(op3, get_gpr_dw0(r3));
5289 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
5290 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
5291 store(mkexpr(op2addr), mkexpr(result));
5292 put_gpr_dw0(r1, mkexpr(op2));
5293
5294 return "laog";
5295}
5296
5297static HChar *
5298s390_irgen_LTR(UChar r1, UChar r2)
5299{
5300 IRTemp op2 = newTemp(Ity_I32);
5301
5302 assign(op2, get_gpr_w1(r2));
5303 put_gpr_w1(r1, mkexpr(op2));
5304 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5305
5306 return "ltr";
5307}
5308
5309static HChar *
5310s390_irgen_LTGR(UChar r1, UChar r2)
5311{
5312 IRTemp op2 = newTemp(Ity_I64);
5313
5314 assign(op2, get_gpr_dw0(r2));
5315 put_gpr_dw0(r1, mkexpr(op2));
5316 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5317
5318 return "ltgr";
5319}
5320
5321static HChar *
5322s390_irgen_LTGFR(UChar r1, UChar r2)
5323{
5324 IRTemp op2 = newTemp(Ity_I64);
5325
5326 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5327 put_gpr_dw0(r1, mkexpr(op2));
5328 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5329
5330 return "ltgfr";
5331}
5332
5333static HChar *
5334s390_irgen_LT(UChar r1, IRTemp op2addr)
5335{
5336 IRTemp op2 = newTemp(Ity_I32);
5337
5338 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5339 put_gpr_w1(r1, mkexpr(op2));
5340 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5341
5342 return "lt";
5343}
5344
5345static HChar *
5346s390_irgen_LTG(UChar r1, IRTemp op2addr)
5347{
5348 IRTemp op2 = newTemp(Ity_I64);
5349
5350 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5351 put_gpr_dw0(r1, mkexpr(op2));
5352 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5353
5354 return "ltg";
5355}
5356
5357static HChar *
5358s390_irgen_LTGF(UChar r1, IRTemp op2addr)
5359{
5360 IRTemp op2 = newTemp(Ity_I64);
5361
5362 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
5363 put_gpr_dw0(r1, mkexpr(op2));
5364 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
5365
5366 return "ltgf";
5367}
5368
5369static HChar *
5370s390_irgen_LBR(UChar r1, UChar r2)
5371{
5372 put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
5373
5374 return "lbr";
5375}
5376
5377static HChar *
5378s390_irgen_LGBR(UChar r1, UChar r2)
5379{
5380 put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
5381
5382 return "lgbr";
5383}
5384
5385static HChar *
5386s390_irgen_LB(UChar r1, IRTemp op2addr)
5387{
5388 put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5389
5390 return "lb";
5391}
5392
5393static HChar *
5394s390_irgen_LGB(UChar r1, IRTemp op2addr)
5395{
5396 put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
5397
5398 return "lgb";
5399}
5400
5401static HChar *
5402s390_irgen_LBH(UChar r1, IRTemp op2addr)
5403{
5404 put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
5405
5406 return "lbh";
5407}
5408
5409static HChar *
5410s390_irgen_LCR(UChar r1, UChar r2)
5411{
5412 Int op1;
5413 IRTemp op2 = newTemp(Ity_I32);
5414 IRTemp result = newTemp(Ity_I32);
5415
5416 op1 = 0;
5417 assign(op2, get_gpr_w1(r2));
5418 assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
5419 put_gpr_w1(r1, mkexpr(result));
5420 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
5421 op1)), op2);
5422
5423 return "lcr";
5424}
5425
5426static HChar *
5427s390_irgen_LCGR(UChar r1, UChar r2)
5428{
5429 Long op1;
5430 IRTemp op2 = newTemp(Ity_I64);
5431 IRTemp result = newTemp(Ity_I64);
5432
5433 op1 = 0ULL;
5434 assign(op2, get_gpr_dw0(r2));
5435 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5436 put_gpr_dw0(r1, mkexpr(result));
5437 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5438 op1)), op2);
5439
5440 return "lcgr";
5441}
5442
5443static HChar *
5444s390_irgen_LCGFR(UChar r1, UChar r2)
5445{
5446 Long op1;
5447 IRTemp op2 = newTemp(Ity_I64);
5448 IRTemp result = newTemp(Ity_I64);
5449
5450 op1 = 0ULL;
5451 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5452 assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
5453 put_gpr_dw0(r1, mkexpr(result));
5454 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
5455 op1)), op2);
5456
5457 return "lcgfr";
5458}
5459
5460static HChar *
5461s390_irgen_LHR(UChar r1, UChar r2)
5462{
5463 put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
5464
5465 return "lhr";
5466}
5467
5468static HChar *
5469s390_irgen_LGHR(UChar r1, UChar r2)
5470{
5471 put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
5472
5473 return "lghr";
5474}
5475
5476static HChar *
5477s390_irgen_LH(UChar r1, IRTemp op2addr)
5478{
5479 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5480
5481 return "lh";
5482}
5483
5484static HChar *
5485s390_irgen_LHY(UChar r1, IRTemp op2addr)
5486{
5487 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5488
5489 return "lhy";
5490}
5491
5492static HChar *
5493s390_irgen_LGH(UChar r1, IRTemp op2addr)
5494{
5495 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
5496
5497 return "lgh";
5498}
5499
5500static HChar *
5501s390_irgen_LHI(UChar r1, UShort i2)
5502{
5503 put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
5504
5505 return "lhi";
5506}
5507
5508static HChar *
5509s390_irgen_LGHI(UChar r1, UShort i2)
5510{
5511 put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
5512
5513 return "lghi";
5514}
5515
5516static HChar *
5517s390_irgen_LHRL(UChar r1, UInt i2)
5518{
5519 put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5520 ((ULong)(Long)(Int)i2 << 1)))));
5521
5522 return "lhrl";
5523}
5524
5525static HChar *
5526s390_irgen_LGHRL(UChar r1, UInt i2)
5527{
5528 put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5529 ((ULong)(Long)(Int)i2 << 1)))));
5530
5531 return "lghrl";
5532}
5533
5534static HChar *
5535s390_irgen_LHH(UChar r1, IRTemp op2addr)
5536{
5537 put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
5538
5539 return "lhh";
5540}
5541
5542static HChar *
5543s390_irgen_LFH(UChar r1, IRTemp op2addr)
5544{
5545 put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
5546
5547 return "lfh";
5548}
5549
5550static HChar *
5551s390_irgen_LLGFR(UChar r1, UChar r2)
5552{
5553 put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
5554
5555 return "llgfr";
5556}
5557
5558static HChar *
5559s390_irgen_LLGF(UChar r1, IRTemp op2addr)
5560{
5561 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
5562
5563 return "llgf";
5564}
5565
5566static HChar *
5567s390_irgen_LLGFRL(UChar r1, UInt i2)
5568{
5569 put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
5570 ((ULong)(Long)(Int)i2 << 1)))));
5571
5572 return "llgfrl";
5573}
5574
5575static HChar *
5576s390_irgen_LLCR(UChar r1, UChar r2)
5577{
5578 put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
5579
5580 return "llcr";
5581}
5582
5583static HChar *
5584s390_irgen_LLGCR(UChar r1, UChar r2)
5585{
5586 put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
5587
5588 return "llgcr";
5589}
5590
5591static HChar *
5592s390_irgen_LLC(UChar r1, IRTemp op2addr)
5593{
5594 put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5595
5596 return "llc";
5597}
5598
5599static HChar *
5600s390_irgen_LLGC(UChar r1, IRTemp op2addr)
5601{
5602 put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
5603
5604 return "llgc";
5605}
5606
5607static HChar *
5608s390_irgen_LLCH(UChar r1, IRTemp op2addr)
5609{
5610 put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
5611
5612 return "llch";
5613}
5614
5615static HChar *
5616s390_irgen_LLHR(UChar r1, UChar r2)
5617{
5618 put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
5619
5620 return "llhr";
5621}
5622
5623static HChar *
5624s390_irgen_LLGHR(UChar r1, UChar r2)
5625{
5626 put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
5627
5628 return "llghr";
5629}
5630
5631static HChar *
5632s390_irgen_LLH(UChar r1, IRTemp op2addr)
5633{
5634 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5635
5636 return "llh";
5637}
5638
5639static HChar *
5640s390_irgen_LLGH(UChar r1, IRTemp op2addr)
5641{
5642 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
5643
5644 return "llgh";
5645}
5646
5647static HChar *
5648s390_irgen_LLHRL(UChar r1, UInt i2)
5649{
5650 put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
5651 ((ULong)(Long)(Int)i2 << 1)))));
5652
5653 return "llhrl";
5654}
5655
5656static HChar *
5657s390_irgen_LLGHRL(UChar r1, UInt i2)
5658{
5659 put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
5660 ((ULong)(Long)(Int)i2 << 1)))));
5661
5662 return "llghrl";
5663}
5664
5665static HChar *
5666s390_irgen_LLHH(UChar r1, IRTemp op2addr)
5667{
5668 put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
5669
5670 return "llhh";
5671}
5672
5673static HChar *
5674s390_irgen_LLIHF(UChar r1, UInt i2)
5675{
5676 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5677
5678 return "llihf";
5679}
5680
5681static HChar *
5682s390_irgen_LLIHH(UChar r1, UShort i2)
5683{
5684 put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
5685
5686 return "llihh";
5687}
5688
5689static HChar *
5690s390_irgen_LLIHL(UChar r1, UShort i2)
5691{
5692 put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
5693
5694 return "llihl";
5695}
5696
5697static HChar *
5698s390_irgen_LLILF(UChar r1, UInt i2)
5699{
5700 put_gpr_dw0(r1, mkU64(i2));
5701
5702 return "llilf";
5703}
5704
5705static HChar *
5706s390_irgen_LLILH(UChar r1, UShort i2)
5707{
5708 put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
5709
5710 return "llilh";
5711}
5712
5713static HChar *
5714s390_irgen_LLILL(UChar r1, UShort i2)
5715{
5716 put_gpr_dw0(r1, mkU64(i2));
5717
5718 return "llill";
5719}
5720
5721static HChar *
5722s390_irgen_LLGTR(UChar r1, UChar r2)
5723{
5724 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
5725 mkU32(2147483647))));
5726
5727 return "llgtr";
5728}
5729
5730static HChar *
5731s390_irgen_LLGT(UChar r1, IRTemp op2addr)
5732{
5733 put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
5734 mkexpr(op2addr)), mkU32(2147483647))));
5735
5736 return "llgt";
5737}
5738
5739static HChar *
5740s390_irgen_LNR(UChar r1, UChar r2)
5741{
5742 IRTemp op2 = newTemp(Ity_I32);
5743 IRTemp result = newTemp(Ity_I32);
5744
5745 assign(op2, get_gpr_w1(r2));
5746 assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
5747 binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
5748 put_gpr_w1(r1, mkexpr(result));
5749 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5750
5751 return "lnr";
5752}
5753
5754static HChar *
5755s390_irgen_LNGR(UChar r1, UChar r2)
5756{
5757 IRTemp op2 = newTemp(Ity_I64);
5758 IRTemp result = newTemp(Ity_I64);
5759
5760 assign(op2, get_gpr_dw0(r2));
5761 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5762 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5763 put_gpr_dw0(r1, mkexpr(result));
5764 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5765
5766 return "lngr";
5767}
5768
5769static HChar *
5770s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
5771{
5772 IRTemp op2 = newTemp(Ity_I64);
5773 IRTemp result = newTemp(Ity_I64);
5774
5775 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
5776 assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
5777 binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
5778 put_gpr_dw0(r1, mkexpr(result));
5779 s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
5780
5781 return "lngfr";
5782}
5783
5784static HChar *
sewardjd7bde722011-04-05 13:19:33 +00005785s390_irgen_LOCR(UChar m3, UChar r1, UChar r2)
5786{
5787 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5788 guest_IA_next_instr);
5789 put_gpr_w1(r1, get_gpr_w1(r2));
5790
5791 return "locr";
5792}
5793
5794static HChar *
5795s390_irgen_LOCGR(UChar m3, UChar r1, UChar r2)
5796{
5797 if_condition_goto(binop(Iop_CmpEQ32, s390_call_calculate_cond(m3), mkU32(0)),
5798 guest_IA_next_instr);
5799 put_gpr_dw0(r1, get_gpr_dw0(r2));
5800
5801 return "locgr";
5802}
5803
5804static HChar *
5805s390_irgen_LOC(UChar r1, IRTemp op2addr)
5806{
5807 /* condition is checked in format handler */
5808 put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
5809
5810 return "loc";
5811}
5812
5813static HChar *
5814s390_irgen_LOCG(UChar r1, IRTemp op2addr)
5815{
5816 /* condition is checked in format handler */
5817 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5818
5819 return "locg";
5820}
5821
5822static HChar *
sewardj2019a972011-03-07 16:04:07 +00005823s390_irgen_LPQ(UChar r1, IRTemp op2addr)
5824{
5825 put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
5826 put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
5827 ));
5828
5829 return "lpq";
5830}
5831
5832static HChar *
5833s390_irgen_LPR(UChar r1, UChar r2)
5834{
5835 IRTemp op2 = newTemp(Ity_I32);
5836 IRTemp result = newTemp(Ity_I32);
5837
5838 assign(op2, get_gpr_w1(r2));
5839 assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
5840 binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
5841 put_gpr_w1(r1, mkexpr(result));
5842 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
5843
5844 return "lpr";
5845}
5846
5847static HChar *
5848s390_irgen_LPGR(UChar r1, UChar r2)
5849{
5850 IRTemp op2 = newTemp(Ity_I64);
5851 IRTemp result = newTemp(Ity_I64);
5852
5853 assign(op2, get_gpr_dw0(r2));
5854 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5855 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5856 put_gpr_dw0(r1, mkexpr(result));
5857 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5858
5859 return "lpgr";
5860}
5861
5862static HChar *
5863s390_irgen_LPGFR(UChar r1, UChar r2)
5864{
5865 IRTemp op2 = newTemp(Ity_I64);
5866 IRTemp result = newTemp(Ity_I64);
5867
5868 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
5869 assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
5870 binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
5871 put_gpr_dw0(r1, mkexpr(result));
5872 s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
5873
5874 return "lpgfr";
5875}
5876
5877static HChar *
5878s390_irgen_LRVR(UChar r1, UChar r2)
5879{
5880 IRTemp b0 = newTemp(Ity_I8);
5881 IRTemp b1 = newTemp(Ity_I8);
5882 IRTemp b2 = newTemp(Ity_I8);
5883 IRTemp b3 = newTemp(Ity_I8);
5884
5885 assign(b3, get_gpr_b7(r2));
5886 assign(b2, get_gpr_b6(r2));
5887 assign(b1, get_gpr_b5(r2));
5888 assign(b0, get_gpr_b4(r2));
5889 put_gpr_b4(r1, mkexpr(b3));
5890 put_gpr_b5(r1, mkexpr(b2));
5891 put_gpr_b6(r1, mkexpr(b1));
5892 put_gpr_b7(r1, mkexpr(b0));
5893
5894 return "lrvr";
5895}
5896
5897static HChar *
5898s390_irgen_LRVGR(UChar r1, UChar r2)
5899{
5900 IRTemp b0 = newTemp(Ity_I8);
5901 IRTemp b1 = newTemp(Ity_I8);
5902 IRTemp b2 = newTemp(Ity_I8);
5903 IRTemp b3 = newTemp(Ity_I8);
5904 IRTemp b4 = newTemp(Ity_I8);
5905 IRTemp b5 = newTemp(Ity_I8);
5906 IRTemp b6 = newTemp(Ity_I8);
5907 IRTemp b7 = newTemp(Ity_I8);
5908
5909 assign(b7, get_gpr_b7(r2));
5910 assign(b6, get_gpr_b6(r2));
5911 assign(b5, get_gpr_b5(r2));
5912 assign(b4, get_gpr_b4(r2));
5913 assign(b3, get_gpr_b3(r2));
5914 assign(b2, get_gpr_b2(r2));
5915 assign(b1, get_gpr_b1(r2));
5916 assign(b0, get_gpr_b0(r2));
5917 put_gpr_b0(r1, mkexpr(b7));
5918 put_gpr_b1(r1, mkexpr(b6));
5919 put_gpr_b2(r1, mkexpr(b5));
5920 put_gpr_b3(r1, mkexpr(b4));
5921 put_gpr_b4(r1, mkexpr(b3));
5922 put_gpr_b5(r1, mkexpr(b2));
5923 put_gpr_b6(r1, mkexpr(b1));
5924 put_gpr_b7(r1, mkexpr(b0));
5925
5926 return "lrvgr";
5927}
5928
5929static HChar *
5930s390_irgen_LRVH(UChar r1, IRTemp op2addr)
5931{
5932 IRTemp op2 = newTemp(Ity_I16);
5933
5934 assign(op2, load(Ity_I16, mkexpr(op2addr)));
5935 put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
5936 put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
5937
5938 return "lrvh";
5939}
5940
5941static HChar *
5942s390_irgen_LRV(UChar r1, IRTemp op2addr)
5943{
5944 IRTemp op2 = newTemp(Ity_I32);
5945
5946 assign(op2, load(Ity_I32, mkexpr(op2addr)));
5947 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
5948 put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5949 mkU8(8)), mkU32(255))));
5950 put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5951 mkU8(16)), mkU32(255))));
5952 put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
5953 mkU8(24)), mkU32(255))));
5954
5955 return "lrv";
5956}
5957
5958static HChar *
5959s390_irgen_LRVG(UChar r1, IRTemp op2addr)
5960{
5961 IRTemp op2 = newTemp(Ity_I64);
5962
5963 assign(op2, load(Ity_I64, mkexpr(op2addr)));
5964 put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
5965 put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5966 mkU8(8)), mkU64(255))));
5967 put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5968 mkU8(16)), mkU64(255))));
5969 put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5970 mkU8(24)), mkU64(255))));
5971 put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5972 mkU8(32)), mkU64(255))));
5973 put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5974 mkU8(40)), mkU64(255))));
5975 put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5976 mkU8(48)), mkU64(255))));
5977 put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
5978 mkU8(56)), mkU64(255))));
5979
5980 return "lrvg";
5981}
5982
5983static HChar *
5984s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
5985{
5986 store(mkexpr(op1addr), mkU16(i2));
5987
5988 return "mvhhi";
5989}
5990
5991static HChar *
5992s390_irgen_MVHI(UShort i2, IRTemp op1addr)
5993{
5994 store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
5995
5996 return "mvhi";
5997}
5998
5999static HChar *
6000s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
6001{
6002 store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
6003
6004 return "mvghi";
6005}
6006
6007static HChar *
6008s390_irgen_MVI(UChar i2, IRTemp op1addr)
6009{
6010 store(mkexpr(op1addr), mkU8(i2));
6011
6012 return "mvi";
6013}
6014
6015static HChar *
6016s390_irgen_MVIY(UChar i2, IRTemp op1addr)
6017{
6018 store(mkexpr(op1addr), mkU8(i2));
6019
6020 return "mviy";
6021}
6022
6023static HChar *
6024s390_irgen_MR(UChar r1, UChar r2)
6025{
6026 IRTemp op1 = newTemp(Ity_I32);
6027 IRTemp op2 = newTemp(Ity_I32);
6028 IRTemp result = newTemp(Ity_I64);
6029
6030 assign(op1, get_gpr_w1(r1 + 1));
6031 assign(op2, get_gpr_w1(r2));
6032 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6033 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6034 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6035
6036 return "mr";
6037}
6038
6039static HChar *
6040s390_irgen_M(UChar r1, IRTemp op2addr)
6041{
6042 IRTemp op1 = newTemp(Ity_I32);
6043 IRTemp op2 = newTemp(Ity_I32);
6044 IRTemp result = newTemp(Ity_I64);
6045
6046 assign(op1, get_gpr_w1(r1 + 1));
6047 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6048 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6049 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6050 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6051
6052 return "m";
6053}
6054
6055static HChar *
6056s390_irgen_MFY(UChar r1, IRTemp op2addr)
6057{
6058 IRTemp op1 = newTemp(Ity_I32);
6059 IRTemp op2 = newTemp(Ity_I32);
6060 IRTemp result = newTemp(Ity_I64);
6061
6062 assign(op1, get_gpr_w1(r1 + 1));
6063 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6064 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6065 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6066 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6067
6068 return "mfy";
6069}
6070
6071static HChar *
6072s390_irgen_MH(UChar r1, IRTemp op2addr)
6073{
6074 IRTemp op1 = newTemp(Ity_I32);
6075 IRTemp op2 = newTemp(Ity_I16);
6076 IRTemp result = newTemp(Ity_I64);
6077
6078 assign(op1, get_gpr_w1(r1));
6079 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6080 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6081 ));
6082 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6083
6084 return "mh";
6085}
6086
6087static HChar *
6088s390_irgen_MHY(UChar r1, IRTemp op2addr)
6089{
6090 IRTemp op1 = newTemp(Ity_I32);
6091 IRTemp op2 = newTemp(Ity_I16);
6092 IRTemp result = newTemp(Ity_I64);
6093
6094 assign(op1, get_gpr_w1(r1));
6095 assign(op2, load(Ity_I16, mkexpr(op2addr)));
6096 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
6097 ));
6098 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6099
6100 return "mhy";
6101}
6102
6103static HChar *
6104s390_irgen_MHI(UChar r1, UShort i2)
6105{
6106 IRTemp op1 = newTemp(Ity_I32);
6107 Short op2;
6108 IRTemp result = newTemp(Ity_I64);
6109
6110 assign(op1, get_gpr_w1(r1));
6111 op2 = (Short)i2;
6112 assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
6113 mkU16((UShort)op2))));
6114 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6115
6116 return "mhi";
6117}
6118
6119static HChar *
6120s390_irgen_MGHI(UChar r1, UShort i2)
6121{
6122 IRTemp op1 = newTemp(Ity_I64);
6123 Short op2;
6124 IRTemp result = newTemp(Ity_I128);
6125
6126 assign(op1, get_gpr_dw0(r1));
6127 op2 = (Short)i2;
6128 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
6129 mkU16((UShort)op2))));
6130 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6131
6132 return "mghi";
6133}
6134
6135static HChar *
6136s390_irgen_MLR(UChar r1, UChar r2)
6137{
6138 IRTemp op1 = newTemp(Ity_I32);
6139 IRTemp op2 = newTemp(Ity_I32);
6140 IRTemp result = newTemp(Ity_I64);
6141
6142 assign(op1, get_gpr_w1(r1 + 1));
6143 assign(op2, get_gpr_w1(r2));
6144 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6145 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6146 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6147
6148 return "mlr";
6149}
6150
6151static HChar *
6152s390_irgen_MLGR(UChar r1, UChar r2)
6153{
6154 IRTemp op1 = newTemp(Ity_I64);
6155 IRTemp op2 = newTemp(Ity_I64);
6156 IRTemp result = newTemp(Ity_I128);
6157
6158 assign(op1, get_gpr_dw0(r1 + 1));
6159 assign(op2, get_gpr_dw0(r2));
6160 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6161 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6162 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6163
6164 return "mlgr";
6165}
6166
6167static HChar *
6168s390_irgen_ML(UChar r1, IRTemp op2addr)
6169{
6170 IRTemp op1 = newTemp(Ity_I32);
6171 IRTemp op2 = newTemp(Ity_I32);
6172 IRTemp result = newTemp(Ity_I64);
6173
6174 assign(op1, get_gpr_w1(r1 + 1));
6175 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6176 assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
6177 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6178 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6179
6180 return "ml";
6181}
6182
6183static HChar *
6184s390_irgen_MLG(UChar r1, IRTemp op2addr)
6185{
6186 IRTemp op1 = newTemp(Ity_I64);
6187 IRTemp op2 = newTemp(Ity_I64);
6188 IRTemp result = newTemp(Ity_I128);
6189
6190 assign(op1, get_gpr_dw0(r1 + 1));
6191 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6192 assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
6193 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
6194 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
6195
6196 return "mlg";
6197}
6198
6199static HChar *
6200s390_irgen_MSR(UChar r1, UChar r2)
6201{
6202 IRTemp op1 = newTemp(Ity_I32);
6203 IRTemp op2 = newTemp(Ity_I32);
6204 IRTemp result = newTemp(Ity_I64);
6205
6206 assign(op1, get_gpr_w1(r1));
6207 assign(op2, get_gpr_w1(r2));
6208 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6209 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6210
6211 return "msr";
6212}
6213
6214static HChar *
6215s390_irgen_MSGR(UChar r1, UChar r2)
6216{
6217 IRTemp op1 = newTemp(Ity_I64);
6218 IRTemp op2 = newTemp(Ity_I64);
6219 IRTemp result = newTemp(Ity_I128);
6220
6221 assign(op1, get_gpr_dw0(r1));
6222 assign(op2, get_gpr_dw0(r2));
6223 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6224 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6225
6226 return "msgr";
6227}
6228
6229static HChar *
6230s390_irgen_MSGFR(UChar r1, UChar r2)
6231{
6232 IRTemp op1 = newTemp(Ity_I64);
6233 IRTemp op2 = newTemp(Ity_I32);
6234 IRTemp result = newTemp(Ity_I128);
6235
6236 assign(op1, get_gpr_dw0(r1));
6237 assign(op2, get_gpr_w1(r2));
6238 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6239 ));
6240 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6241
6242 return "msgfr";
6243}
6244
6245static HChar *
6246s390_irgen_MS(UChar r1, IRTemp op2addr)
6247{
6248 IRTemp op1 = newTemp(Ity_I32);
6249 IRTemp op2 = newTemp(Ity_I32);
6250 IRTemp result = newTemp(Ity_I64);
6251
6252 assign(op1, get_gpr_w1(r1));
6253 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6254 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6255 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6256
6257 return "ms";
6258}
6259
6260static HChar *
6261s390_irgen_MSY(UChar r1, IRTemp op2addr)
6262{
6263 IRTemp op1 = newTemp(Ity_I32);
6264 IRTemp op2 = newTemp(Ity_I32);
6265 IRTemp result = newTemp(Ity_I64);
6266
6267 assign(op1, get_gpr_w1(r1));
6268 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6269 assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
6270 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6271
6272 return "msy";
6273}
6274
6275static HChar *
6276s390_irgen_MSG(UChar r1, IRTemp op2addr)
6277{
6278 IRTemp op1 = newTemp(Ity_I64);
6279 IRTemp op2 = newTemp(Ity_I64);
6280 IRTemp result = newTemp(Ity_I128);
6281
6282 assign(op1, get_gpr_dw0(r1));
6283 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6284 assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
6285 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6286
6287 return "msg";
6288}
6289
6290static HChar *
6291s390_irgen_MSGF(UChar r1, IRTemp op2addr)
6292{
6293 IRTemp op1 = newTemp(Ity_I64);
6294 IRTemp op2 = newTemp(Ity_I32);
6295 IRTemp result = newTemp(Ity_I128);
6296
6297 assign(op1, get_gpr_dw0(r1));
6298 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6299 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
6300 ));
6301 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6302
6303 return "msgf";
6304}
6305
6306static HChar *
6307s390_irgen_MSFI(UChar r1, UInt i2)
6308{
6309 IRTemp op1 = newTemp(Ity_I32);
6310 Int op2;
6311 IRTemp result = newTemp(Ity_I64);
6312
6313 assign(op1, get_gpr_w1(r1));
6314 op2 = (Int)i2;
6315 assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
6316 put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
6317
6318 return "msfi";
6319}
6320
6321static HChar *
6322s390_irgen_MSGFI(UChar r1, UInt i2)
6323{
6324 IRTemp op1 = newTemp(Ity_I64);
6325 Int op2;
6326 IRTemp result = newTemp(Ity_I128);
6327
6328 assign(op1, get_gpr_dw0(r1));
6329 op2 = (Int)i2;
6330 assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
6331 op2))));
6332 put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
6333
6334 return "msgfi";
6335}
6336
6337static HChar *
6338s390_irgen_OR(UChar r1, UChar r2)
6339{
6340 IRTemp op1 = newTemp(Ity_I32);
6341 IRTemp op2 = newTemp(Ity_I32);
6342 IRTemp result = newTemp(Ity_I32);
6343
6344 assign(op1, get_gpr_w1(r1));
6345 assign(op2, get_gpr_w1(r2));
6346 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6347 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6348 put_gpr_w1(r1, mkexpr(result));
6349
6350 return "or";
6351}
6352
6353static HChar *
6354s390_irgen_OGR(UChar r1, UChar r2)
6355{
6356 IRTemp op1 = newTemp(Ity_I64);
6357 IRTemp op2 = newTemp(Ity_I64);
6358 IRTemp result = newTemp(Ity_I64);
6359
6360 assign(op1, get_gpr_dw0(r1));
6361 assign(op2, get_gpr_dw0(r2));
6362 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6363 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6364 put_gpr_dw0(r1, mkexpr(result));
6365
6366 return "ogr";
6367}
6368
6369static HChar *
6370s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
6371{
6372 IRTemp op2 = newTemp(Ity_I32);
6373 IRTemp op3 = newTemp(Ity_I32);
6374 IRTemp result = newTemp(Ity_I32);
6375
6376 assign(op2, get_gpr_w1(r2));
6377 assign(op3, get_gpr_w1(r3));
6378 assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
6379 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6380 put_gpr_w1(r1, mkexpr(result));
6381
6382 return "ork";
6383}
6384
6385static HChar *
6386s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
6387{
6388 IRTemp op2 = newTemp(Ity_I64);
6389 IRTemp op3 = newTemp(Ity_I64);
6390 IRTemp result = newTemp(Ity_I64);
6391
6392 assign(op2, get_gpr_dw0(r2));
6393 assign(op3, get_gpr_dw0(r3));
6394 assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
6395 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6396 put_gpr_dw0(r1, mkexpr(result));
6397
6398 return "ogrk";
6399}
6400
6401static HChar *
6402s390_irgen_O(UChar r1, IRTemp op2addr)
6403{
6404 IRTemp op1 = newTemp(Ity_I32);
6405 IRTemp op2 = newTemp(Ity_I32);
6406 IRTemp result = newTemp(Ity_I32);
6407
6408 assign(op1, get_gpr_w1(r1));
6409 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6410 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6411 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6412 put_gpr_w1(r1, mkexpr(result));
6413
6414 return "o";
6415}
6416
6417static HChar *
6418s390_irgen_OY(UChar r1, IRTemp op2addr)
6419{
6420 IRTemp op1 = newTemp(Ity_I32);
6421 IRTemp op2 = newTemp(Ity_I32);
6422 IRTemp result = newTemp(Ity_I32);
6423
6424 assign(op1, get_gpr_w1(r1));
6425 assign(op2, load(Ity_I32, mkexpr(op2addr)));
6426 assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
6427 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6428 put_gpr_w1(r1, mkexpr(result));
6429
6430 return "oy";
6431}
6432
6433static HChar *
6434s390_irgen_OG(UChar r1, IRTemp op2addr)
6435{
6436 IRTemp op1 = newTemp(Ity_I64);
6437 IRTemp op2 = newTemp(Ity_I64);
6438 IRTemp result = newTemp(Ity_I64);
6439
6440 assign(op1, get_gpr_dw0(r1));
6441 assign(op2, load(Ity_I64, mkexpr(op2addr)));
6442 assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
6443 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6444 put_gpr_dw0(r1, mkexpr(result));
6445
6446 return "og";
6447}
6448
6449static HChar *
6450s390_irgen_OI(UChar i2, IRTemp op1addr)
6451{
6452 IRTemp op1 = newTemp(Ity_I8);
6453 UChar op2;
6454 IRTemp result = newTemp(Ity_I8);
6455
6456 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6457 op2 = i2;
6458 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6459 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6460 store(mkexpr(op1addr), mkexpr(result));
6461
6462 return "oi";
6463}
6464
6465static HChar *
6466s390_irgen_OIY(UChar i2, IRTemp op1addr)
6467{
6468 IRTemp op1 = newTemp(Ity_I8);
6469 UChar op2;
6470 IRTemp result = newTemp(Ity_I8);
6471
6472 assign(op1, load(Ity_I8, mkexpr(op1addr)));
6473 op2 = i2;
6474 assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
6475 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6476 store(mkexpr(op1addr), mkexpr(result));
6477
6478 return "oiy";
6479}
6480
6481static HChar *
6482s390_irgen_OIHF(UChar r1, UInt i2)
6483{
6484 IRTemp op1 = newTemp(Ity_I32);
6485 UInt op2;
6486 IRTemp result = newTemp(Ity_I32);
6487
6488 assign(op1, get_gpr_w0(r1));
6489 op2 = i2;
6490 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6491 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6492 put_gpr_w0(r1, mkexpr(result));
6493
6494 return "oihf";
6495}
6496
6497static HChar *
6498s390_irgen_OIHH(UChar r1, UShort i2)
6499{
6500 IRTemp op1 = newTemp(Ity_I16);
6501 UShort op2;
6502 IRTemp result = newTemp(Ity_I16);
6503
6504 assign(op1, get_gpr_hw0(r1));
6505 op2 = i2;
6506 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6507 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6508 put_gpr_hw0(r1, mkexpr(result));
6509
6510 return "oihh";
6511}
6512
6513static HChar *
6514s390_irgen_OIHL(UChar r1, UShort i2)
6515{
6516 IRTemp op1 = newTemp(Ity_I16);
6517 UShort op2;
6518 IRTemp result = newTemp(Ity_I16);
6519
6520 assign(op1, get_gpr_hw1(r1));
6521 op2 = i2;
6522 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6523 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6524 put_gpr_hw1(r1, mkexpr(result));
6525
6526 return "oihl";
6527}
6528
6529static HChar *
6530s390_irgen_OILF(UChar r1, UInt i2)
6531{
6532 IRTemp op1 = newTemp(Ity_I32);
6533 UInt op2;
6534 IRTemp result = newTemp(Ity_I32);
6535
6536 assign(op1, get_gpr_w1(r1));
6537 op2 = i2;
6538 assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
6539 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6540 put_gpr_w1(r1, mkexpr(result));
6541
6542 return "oilf";
6543}
6544
6545static HChar *
6546s390_irgen_OILH(UChar r1, UShort i2)
6547{
6548 IRTemp op1 = newTemp(Ity_I16);
6549 UShort op2;
6550 IRTemp result = newTemp(Ity_I16);
6551
6552 assign(op1, get_gpr_hw2(r1));
6553 op2 = i2;
6554 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6555 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6556 put_gpr_hw2(r1, mkexpr(result));
6557
6558 return "oilh";
6559}
6560
6561static HChar *
6562s390_irgen_OILL(UChar r1, UShort i2)
6563{
6564 IRTemp op1 = newTemp(Ity_I16);
6565 UShort op2;
6566 IRTemp result = newTemp(Ity_I16);
6567
6568 assign(op1, get_gpr_hw3(r1));
6569 op2 = i2;
6570 assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
6571 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6572 put_gpr_hw3(r1, mkexpr(result));
6573
6574 return "oill";
6575}
6576
6577static HChar *
6578s390_irgen_PFD(void)
6579{
6580
6581 return "pfd";
6582}
6583
6584static HChar *
6585s390_irgen_PFDRL(void)
6586{
6587
6588 return "pfdrl";
6589}
6590
6591static HChar *
6592s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
6593{
6594 IRTemp amount = newTemp(Ity_I64);
6595 IRTemp op = newTemp(Ity_I32);
6596
6597 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
6598 assign(op, get_gpr_w1(r3));
6599 put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
6600 mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
6601 binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
6602
6603 return "rll";
6604}
6605
6606static HChar *
6607s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
6608{
6609 IRTemp amount = newTemp(Ity_I64);
6610 IRTemp op = newTemp(Ity_I64);
6611
6612 assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6613 assign(op, get_gpr_dw0(r3));
6614 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
6615 mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
6616 binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
6617
6618 return "rllg";
6619}
6620
6621static HChar *
6622s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6623{
6624 UChar from;
6625 UChar to;
6626 UChar rot;
6627 UChar t_bit;
6628 ULong mask;
6629 ULong maskc;
6630 IRTemp result = newTemp(Ity_I64);
6631 IRTemp op2 = newTemp(Ity_I64);
6632
6633 from = i3 & 63;
6634 to = i4 & 63;
6635 rot = i5 & 63;
6636 t_bit = i3 & 128;
6637 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6638 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6639 mkU8(64 - rot))));
6640 if (from <= to) {
6641 mask = ~0ULL;
6642 mask = (mask >> from) & (mask << (63 - to));
6643 maskc = ~mask;
6644 } else {
6645 maskc = ~0ULL;
6646 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6647 mask = ~maskc;
6648 }
6649 assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
6650 ), mkU64(mask)));
6651 if (t_bit == 0) {
6652 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6653 mkU64(maskc)), mkexpr(result)));
6654 }
6655 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6656
6657 return "rnsbg";
6658}
6659
6660static HChar *
6661s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6662{
6663 UChar from;
6664 UChar to;
6665 UChar rot;
6666 UChar t_bit;
6667 ULong mask;
6668 ULong maskc;
6669 IRTemp result = newTemp(Ity_I64);
6670 IRTemp op2 = newTemp(Ity_I64);
6671
6672 from = i3 & 63;
6673 to = i4 & 63;
6674 rot = i5 & 63;
6675 t_bit = i3 & 128;
6676 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6677 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6678 mkU8(64 - rot))));
6679 if (from <= to) {
6680 mask = ~0ULL;
6681 mask = (mask >> from) & (mask << (63 - to));
6682 maskc = ~mask;
6683 } else {
6684 maskc = ~0ULL;
6685 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6686 mask = ~maskc;
6687 }
6688 assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
6689 ), mkU64(mask)));
6690 if (t_bit == 0) {
6691 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6692 mkU64(maskc)), mkexpr(result)));
6693 }
6694 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6695
6696 return "rxsbg";
6697}
6698
6699static HChar *
6700s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6701{
6702 UChar from;
6703 UChar to;
6704 UChar rot;
6705 UChar t_bit;
6706 ULong mask;
6707 ULong maskc;
6708 IRTemp result = newTemp(Ity_I64);
6709 IRTemp op2 = newTemp(Ity_I64);
6710
6711 from = i3 & 63;
6712 to = i4 & 63;
6713 rot = i5 & 63;
6714 t_bit = i3 & 128;
6715 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6716 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6717 mkU8(64 - rot))));
6718 if (from <= to) {
6719 mask = ~0ULL;
6720 mask = (mask >> from) & (mask << (63 - to));
6721 maskc = ~mask;
6722 } else {
6723 maskc = ~0ULL;
6724 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6725 mask = ~maskc;
6726 }
6727 assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
6728 ), mkU64(mask)));
6729 if (t_bit == 0) {
6730 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6731 mkU64(maskc)), mkexpr(result)));
6732 }
6733 s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
6734
6735 return "rosbg";
6736}
6737
6738static HChar *
6739s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
6740{
6741 UChar from;
6742 UChar to;
6743 UChar rot;
6744 UChar z_bit;
6745 ULong mask;
6746 ULong maskc;
6747 IRTemp op2 = newTemp(Ity_I64);
6748 IRTemp result = newTemp(Ity_I64);
6749
6750 from = i3 & 63;
6751 to = i4 & 63;
6752 rot = i5 & 63;
6753 z_bit = i4 & 128;
6754 assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
6755 get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
6756 mkU8(64 - rot))));
6757 if (from <= to) {
6758 mask = ~0ULL;
6759 mask = (mask >> from) & (mask << (63 - to));
6760 maskc = ~mask;
6761 } else {
6762 maskc = ~0ULL;
6763 maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
6764 mask = ~maskc;
6765 }
6766 if (z_bit == 0) {
6767 put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
6768 mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
6769 } else {
6770 put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
6771 }
6772 assign(result, get_gpr_dw0(r1));
6773 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
6774
6775 return "risbg";
6776}
6777
6778static HChar *
6779s390_irgen_SAR(UChar r1, UChar r2)
6780{
6781 put_ar_w0(r1, get_gpr_w1(r2));
sewardj7ee97522011-05-09 21:45:04 +00006782 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00006783 s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
6784
6785 return "sar";
6786}
6787
6788static HChar *
6789s390_irgen_SLDA(UChar r1, IRTemp op2addr)
6790{
6791 IRTemp p1 = newTemp(Ity_I64);
6792 IRTemp p2 = newTemp(Ity_I64);
6793 IRTemp op = newTemp(Ity_I64);
6794 IRTemp result = newTemp(Ity_I64);
6795 Long sign_mask;
6796 IRTemp shift_amount = newTemp(Ity_I64);
6797
6798 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6799 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6800 assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
6801 ));
6802 sign_mask = 1ULL << 63;
6803 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6804 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
6805 unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
6806 binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
6807 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6808 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6809 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6810
6811 return "slda";
6812}
6813
6814static HChar *
6815s390_irgen_SLDL(UChar r1, IRTemp op2addr)
6816{
6817 IRTemp p1 = newTemp(Ity_I64);
6818 IRTemp p2 = newTemp(Ity_I64);
6819 IRTemp result = newTemp(Ity_I64);
6820
6821 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6822 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6823 assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6824 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6825 mkexpr(op2addr), mkU64(63)))));
6826 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6827 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6828
6829 return "sldl";
6830}
6831
6832static HChar *
6833s390_irgen_SLA(UChar r1, IRTemp op2addr)
6834{
6835 IRTemp uop = newTemp(Ity_I32);
6836 IRTemp result = newTemp(Ity_I32);
6837 UInt sign_mask;
6838 IRTemp shift_amount = newTemp(Ity_I64);
6839 IRTemp op = newTemp(Ity_I32);
6840
6841 assign(op, get_gpr_w1(r1));
6842 assign(uop, get_gpr_w1(r1));
6843 sign_mask = 2147483648U;
6844 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6845 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6846 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6847 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6848 put_gpr_w1(r1, mkexpr(result));
6849 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6850
6851 return "sla";
6852}
6853
6854static HChar *
6855s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
6856{
6857 IRTemp uop = newTemp(Ity_I32);
6858 IRTemp result = newTemp(Ity_I32);
6859 UInt sign_mask;
6860 IRTemp shift_amount = newTemp(Ity_I64);
6861 IRTemp op = newTemp(Ity_I32);
6862
6863 assign(op, get_gpr_w1(r3));
6864 assign(uop, get_gpr_w1(r3));
6865 sign_mask = 2147483648U;
6866 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6867 assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
6868 unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
6869 binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
6870 put_gpr_w1(r1, mkexpr(result));
6871 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
6872
6873 return "slak";
6874}
6875
6876static HChar *
6877s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
6878{
6879 IRTemp uop = newTemp(Ity_I64);
6880 IRTemp result = newTemp(Ity_I64);
6881 ULong sign_mask;
6882 IRTemp shift_amount = newTemp(Ity_I64);
6883 IRTemp op = newTemp(Ity_I64);
6884
6885 assign(op, get_gpr_dw0(r3));
6886 assign(uop, get_gpr_dw0(r3));
6887 sign_mask = 9223372036854775808ULL;
6888 assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
6889 assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
6890 unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
6891 binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
6892 put_gpr_dw0(r1, mkexpr(result));
6893 s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
6894
6895 return "slag";
6896}
6897
6898static HChar *
6899s390_irgen_SLL(UChar r1, IRTemp op2addr)
6900{
6901 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
6902 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6903
6904 return "sll";
6905}
6906
6907static HChar *
6908s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
6909{
6910 put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
6911 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6912
6913 return "sllk";
6914}
6915
6916static HChar *
6917s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
6918{
6919 put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
6920 binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
6921
6922 return "sllg";
6923}
6924
6925static HChar *
6926s390_irgen_SRDA(UChar r1, IRTemp op2addr)
6927{
6928 IRTemp p1 = newTemp(Ity_I64);
6929 IRTemp p2 = newTemp(Ity_I64);
6930 IRTemp result = newTemp(Ity_I64);
6931
6932 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6933 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6934 assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6935 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6936 mkexpr(op2addr), mkU64(63)))));
6937 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6938 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6939 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6940
6941 return "srda";
6942}
6943
6944static HChar *
6945s390_irgen_SRDL(UChar r1, IRTemp op2addr)
6946{
6947 IRTemp p1 = newTemp(Ity_I64);
6948 IRTemp p2 = newTemp(Ity_I64);
6949 IRTemp result = newTemp(Ity_I64);
6950
6951 assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
6952 assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
6953 assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
6954 mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
6955 mkexpr(op2addr), mkU64(63)))));
6956 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
6957 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
6958
6959 return "srdl";
6960}
6961
6962static HChar *
6963s390_irgen_SRA(UChar r1, IRTemp op2addr)
6964{
6965 IRTemp result = newTemp(Ity_I32);
6966 IRTemp op = newTemp(Ity_I32);
6967
6968 assign(op, get_gpr_w1(r1));
6969 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6970 mkexpr(op2addr), mkU64(63)))));
6971 put_gpr_w1(r1, mkexpr(result));
6972 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6973
6974 return "sra";
6975}
6976
6977static HChar *
6978s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
6979{
6980 IRTemp result = newTemp(Ity_I32);
6981 IRTemp op = newTemp(Ity_I32);
6982
6983 assign(op, get_gpr_w1(r3));
6984 assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
6985 mkexpr(op2addr), mkU64(63)))));
6986 put_gpr_w1(r1, mkexpr(result));
6987 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
6988
6989 return "srak";
6990}
6991
6992static HChar *
6993s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
6994{
6995 IRTemp result = newTemp(Ity_I64);
6996 IRTemp op = newTemp(Ity_I64);
6997
6998 assign(op, get_gpr_dw0(r3));
6999 assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7000 mkexpr(op2addr), mkU64(63)))));
7001 put_gpr_dw0(r1, mkexpr(result));
7002 s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
7003
7004 return "srag";
7005}
7006
7007static HChar *
7008s390_irgen_SRL(UChar r1, IRTemp op2addr)
7009{
7010 IRTemp op = newTemp(Ity_I32);
7011
7012 assign(op, get_gpr_w1(r1));
7013 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7014 mkexpr(op2addr), mkU64(63)))));
7015
7016 return "srl";
7017}
7018
7019static HChar *
7020s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
7021{
7022 IRTemp op = newTemp(Ity_I32);
7023
7024 assign(op, get_gpr_w1(r3));
7025 put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7026 mkexpr(op2addr), mkU64(63)))));
7027
7028 return "srlk";
7029}
7030
7031static HChar *
7032s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
7033{
7034 IRTemp op = newTemp(Ity_I64);
7035
7036 assign(op, get_gpr_dw0(r3));
7037 put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
7038 mkexpr(op2addr), mkU64(63)))));
7039
7040 return "srlg";
7041}
7042
7043static HChar *
7044s390_irgen_ST(UChar r1, IRTemp op2addr)
7045{
7046 store(mkexpr(op2addr), get_gpr_w1(r1));
7047
7048 return "st";
7049}
7050
7051static HChar *
7052s390_irgen_STY(UChar r1, IRTemp op2addr)
7053{
7054 store(mkexpr(op2addr), get_gpr_w1(r1));
7055
7056 return "sty";
7057}
7058
7059static HChar *
7060s390_irgen_STG(UChar r1, IRTemp op2addr)
7061{
7062 store(mkexpr(op2addr), get_gpr_dw0(r1));
7063
7064 return "stg";
7065}
7066
7067static HChar *
7068s390_irgen_STRL(UChar r1, UInt i2)
7069{
7070 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7071 get_gpr_w1(r1));
7072
7073 return "strl";
7074}
7075
7076static HChar *
7077s390_irgen_STGRL(UChar r1, UInt i2)
7078{
7079 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7080 get_gpr_dw0(r1));
7081
7082 return "stgrl";
7083}
7084
7085static HChar *
7086s390_irgen_STC(UChar r1, IRTemp op2addr)
7087{
7088 store(mkexpr(op2addr), get_gpr_b7(r1));
7089
7090 return "stc";
7091}
7092
7093static HChar *
7094s390_irgen_STCY(UChar r1, IRTemp op2addr)
7095{
7096 store(mkexpr(op2addr), get_gpr_b7(r1));
7097
7098 return "stcy";
7099}
7100
7101static HChar *
7102s390_irgen_STCH(UChar r1, IRTemp op2addr)
7103{
7104 store(mkexpr(op2addr), get_gpr_b3(r1));
7105
7106 return "stch";
7107}
7108
7109static HChar *
7110s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
7111{
7112 UChar mask;
7113 UChar n;
7114
7115 mask = (UChar)r3;
7116 n = 0;
7117 if ((mask & 8) != 0) {
7118 store(mkexpr(op2addr), get_gpr_b4(r1));
7119 n = n + 1;
7120 }
7121 if ((mask & 4) != 0) {
7122 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7123 n = n + 1;
7124 }
7125 if ((mask & 2) != 0) {
7126 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7127 n = n + 1;
7128 }
7129 if ((mask & 1) != 0) {
7130 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7131 }
7132
7133 return "stcm";
7134}
7135
7136static HChar *
7137s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
7138{
7139 UChar mask;
7140 UChar n;
7141
7142 mask = (UChar)r3;
7143 n = 0;
7144 if ((mask & 8) != 0) {
7145 store(mkexpr(op2addr), get_gpr_b4(r1));
7146 n = n + 1;
7147 }
7148 if ((mask & 4) != 0) {
7149 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
7150 n = n + 1;
7151 }
7152 if ((mask & 2) != 0) {
7153 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
7154 n = n + 1;
7155 }
7156 if ((mask & 1) != 0) {
7157 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
7158 }
7159
7160 return "stcmy";
7161}
7162
7163static HChar *
7164s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
7165{
7166 UChar mask;
7167 UChar n;
7168
7169 mask = (UChar)r3;
7170 n = 0;
7171 if ((mask & 8) != 0) {
7172 store(mkexpr(op2addr), get_gpr_b0(r1));
7173 n = n + 1;
7174 }
7175 if ((mask & 4) != 0) {
7176 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
7177 n = n + 1;
7178 }
7179 if ((mask & 2) != 0) {
7180 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
7181 n = n + 1;
7182 }
7183 if ((mask & 1) != 0) {
7184 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
7185 }
7186
7187 return "stcmh";
7188}
7189
7190static HChar *
7191s390_irgen_STH(UChar r1, IRTemp op2addr)
7192{
7193 store(mkexpr(op2addr), get_gpr_hw3(r1));
7194
7195 return "sth";
7196}
7197
7198static HChar *
7199s390_irgen_STHY(UChar r1, IRTemp op2addr)
7200{
7201 store(mkexpr(op2addr), get_gpr_hw3(r1));
7202
7203 return "sthy";
7204}
7205
7206static HChar *
7207s390_irgen_STHRL(UChar r1, UInt i2)
7208{
7209 store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
7210 get_gpr_hw3(r1));
7211
7212 return "sthrl";
7213}
7214
7215static HChar *
7216s390_irgen_STHH(UChar r1, IRTemp op2addr)
7217{
7218 store(mkexpr(op2addr), get_gpr_hw1(r1));
7219
7220 return "sthh";
7221}
7222
7223static HChar *
7224s390_irgen_STFH(UChar r1, IRTemp op2addr)
7225{
7226 store(mkexpr(op2addr), get_gpr_w0(r1));
7227
7228 return "stfh";
7229}
7230
7231static HChar *
sewardjd7bde722011-04-05 13:19:33 +00007232s390_irgen_STOC(UChar r1, IRTemp op2addr)
7233{
7234 /* condition is checked in format handler */
7235 store(mkexpr(op2addr), get_gpr_w1(r1));
7236
7237 return "stoc";
7238}
7239
7240static HChar *
7241s390_irgen_STOCG(UChar r1, IRTemp op2addr)
7242{
7243 /* condition is checked in format handler */
7244 store(mkexpr(op2addr), get_gpr_dw0(r1));
7245
7246 return "stocg";
7247}
7248
7249static HChar *
sewardj2019a972011-03-07 16:04:07 +00007250s390_irgen_STPQ(UChar r1, IRTemp op2addr)
7251{
7252 store(mkexpr(op2addr), get_gpr_dw0(r1));
7253 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
7254
7255 return "stpq";
7256}
7257
7258static HChar *
7259s390_irgen_STRVH(UChar r1, IRTemp op2addr)
7260{
7261 store(mkexpr(op2addr), get_gpr_b7(r1));
7262 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7263
7264 return "strvh";
7265}
7266
7267static HChar *
7268s390_irgen_STRV(UChar r1, IRTemp op2addr)
7269{
7270 store(mkexpr(op2addr), get_gpr_b7(r1));
7271 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7272 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7273 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7274
7275 return "strv";
7276}
7277
7278static HChar *
7279s390_irgen_STRVG(UChar r1, IRTemp op2addr)
7280{
7281 store(mkexpr(op2addr), get_gpr_b7(r1));
7282 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
7283 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
7284 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
7285 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
7286 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
7287 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
7288 store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
7289
7290 return "strvg";
7291}
7292
7293static HChar *
7294s390_irgen_SR(UChar r1, UChar r2)
7295{
7296 IRTemp op1 = newTemp(Ity_I32);
7297 IRTemp op2 = newTemp(Ity_I32);
7298 IRTemp result = newTemp(Ity_I32);
7299
7300 assign(op1, get_gpr_w1(r1));
7301 assign(op2, get_gpr_w1(r2));
7302 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7303 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7304 put_gpr_w1(r1, mkexpr(result));
7305
7306 return "sr";
7307}
7308
7309static HChar *
7310s390_irgen_SGR(UChar r1, UChar r2)
7311{
7312 IRTemp op1 = newTemp(Ity_I64);
7313 IRTemp op2 = newTemp(Ity_I64);
7314 IRTemp result = newTemp(Ity_I64);
7315
7316 assign(op1, get_gpr_dw0(r1));
7317 assign(op2, get_gpr_dw0(r2));
7318 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7319 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7320 put_gpr_dw0(r1, mkexpr(result));
7321
7322 return "sgr";
7323}
7324
7325static HChar *
7326s390_irgen_SGFR(UChar r1, UChar r2)
7327{
7328 IRTemp op1 = newTemp(Ity_I64);
7329 IRTemp op2 = newTemp(Ity_I64);
7330 IRTemp result = newTemp(Ity_I64);
7331
7332 assign(op1, get_gpr_dw0(r1));
7333 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
7334 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7335 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7336 put_gpr_dw0(r1, mkexpr(result));
7337
7338 return "sgfr";
7339}
7340
7341static HChar *
7342s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
7343{
7344 IRTemp op2 = newTemp(Ity_I32);
7345 IRTemp op3 = newTemp(Ity_I32);
7346 IRTemp result = newTemp(Ity_I32);
7347
7348 assign(op2, get_gpr_w1(r2));
7349 assign(op3, get_gpr_w1(r3));
7350 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7351 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7352 put_gpr_w1(r1, mkexpr(result));
7353
7354 return "srk";
7355}
7356
7357static HChar *
7358s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
7359{
7360 IRTemp op2 = newTemp(Ity_I64);
7361 IRTemp op3 = newTemp(Ity_I64);
7362 IRTemp result = newTemp(Ity_I64);
7363
7364 assign(op2, get_gpr_dw0(r2));
7365 assign(op3, get_gpr_dw0(r3));
7366 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7367 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
7368 put_gpr_dw0(r1, mkexpr(result));
7369
7370 return "sgrk";
7371}
7372
7373static HChar *
7374s390_irgen_S(UChar r1, IRTemp op2addr)
7375{
7376 IRTemp op1 = newTemp(Ity_I32);
7377 IRTemp op2 = newTemp(Ity_I32);
7378 IRTemp result = newTemp(Ity_I32);
7379
7380 assign(op1, get_gpr_w1(r1));
7381 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7382 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7383 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7384 put_gpr_w1(r1, mkexpr(result));
7385
7386 return "s";
7387}
7388
7389static HChar *
7390s390_irgen_SY(UChar r1, IRTemp op2addr)
7391{
7392 IRTemp op1 = newTemp(Ity_I32);
7393 IRTemp op2 = newTemp(Ity_I32);
7394 IRTemp result = newTemp(Ity_I32);
7395
7396 assign(op1, get_gpr_w1(r1));
7397 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7398 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7399 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7400 put_gpr_w1(r1, mkexpr(result));
7401
7402 return "sy";
7403}
7404
7405static HChar *
7406s390_irgen_SG(UChar r1, IRTemp op2addr)
7407{
7408 IRTemp op1 = newTemp(Ity_I64);
7409 IRTemp op2 = newTemp(Ity_I64);
7410 IRTemp result = newTemp(Ity_I64);
7411
7412 assign(op1, get_gpr_dw0(r1));
7413 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7414 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7415 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7416 put_gpr_dw0(r1, mkexpr(result));
7417
7418 return "sg";
7419}
7420
7421static HChar *
7422s390_irgen_SGF(UChar r1, IRTemp op2addr)
7423{
7424 IRTemp op1 = newTemp(Ity_I64);
7425 IRTemp op2 = newTemp(Ity_I64);
7426 IRTemp result = newTemp(Ity_I64);
7427
7428 assign(op1, get_gpr_dw0(r1));
7429 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
7430 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7431 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
7432 put_gpr_dw0(r1, mkexpr(result));
7433
7434 return "sgf";
7435}
7436
7437static HChar *
7438s390_irgen_SH(UChar r1, IRTemp op2addr)
7439{
7440 IRTemp op1 = newTemp(Ity_I32);
7441 IRTemp op2 = newTemp(Ity_I32);
7442 IRTemp result = newTemp(Ity_I32);
7443
7444 assign(op1, get_gpr_w1(r1));
7445 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7446 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7447 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7448 put_gpr_w1(r1, mkexpr(result));
7449
7450 return "sh";
7451}
7452
7453static HChar *
7454s390_irgen_SHY(UChar r1, IRTemp op2addr)
7455{
7456 IRTemp op1 = newTemp(Ity_I32);
7457 IRTemp op2 = newTemp(Ity_I32);
7458 IRTemp result = newTemp(Ity_I32);
7459
7460 assign(op1, get_gpr_w1(r1));
7461 assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
7462 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7463 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
7464 put_gpr_w1(r1, mkexpr(result));
7465
7466 return "shy";
7467}
7468
7469static HChar *
7470s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7471{
7472 IRTemp op2 = newTemp(Ity_I32);
7473 IRTemp op3 = newTemp(Ity_I32);
7474 IRTemp result = newTemp(Ity_I32);
7475
7476 assign(op2, get_gpr_w0(r1));
7477 assign(op3, get_gpr_w0(r2));
7478 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7479 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7480 put_gpr_w0(r1, mkexpr(result));
7481
7482 return "shhhr";
7483}
7484
7485static HChar *
7486s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7487{
7488 IRTemp op2 = newTemp(Ity_I32);
7489 IRTemp op3 = newTemp(Ity_I32);
7490 IRTemp result = newTemp(Ity_I32);
7491
7492 assign(op2, get_gpr_w0(r1));
7493 assign(op3, get_gpr_w1(r2));
7494 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7495 s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
7496 put_gpr_w0(r1, mkexpr(result));
7497
7498 return "shhlr";
7499}
7500
7501static HChar *
7502s390_irgen_SLR(UChar r1, UChar r2)
7503{
7504 IRTemp op1 = newTemp(Ity_I32);
7505 IRTemp op2 = newTemp(Ity_I32);
7506 IRTemp result = newTemp(Ity_I32);
7507
7508 assign(op1, get_gpr_w1(r1));
7509 assign(op2, get_gpr_w1(r2));
7510 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7511 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7512 put_gpr_w1(r1, mkexpr(result));
7513
7514 return "slr";
7515}
7516
7517static HChar *
7518s390_irgen_SLGR(UChar r1, UChar r2)
7519{
7520 IRTemp op1 = newTemp(Ity_I64);
7521 IRTemp op2 = newTemp(Ity_I64);
7522 IRTemp result = newTemp(Ity_I64);
7523
7524 assign(op1, get_gpr_dw0(r1));
7525 assign(op2, get_gpr_dw0(r2));
7526 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7527 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7528 put_gpr_dw0(r1, mkexpr(result));
7529
7530 return "slgr";
7531}
7532
7533static HChar *
7534s390_irgen_SLGFR(UChar r1, UChar r2)
7535{
7536 IRTemp op1 = newTemp(Ity_I64);
7537 IRTemp op2 = newTemp(Ity_I64);
7538 IRTemp result = newTemp(Ity_I64);
7539
7540 assign(op1, get_gpr_dw0(r1));
7541 assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
7542 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7543 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7544 put_gpr_dw0(r1, mkexpr(result));
7545
7546 return "slgfr";
7547}
7548
7549static HChar *
7550s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
7551{
7552 IRTemp op2 = newTemp(Ity_I32);
7553 IRTemp op3 = newTemp(Ity_I32);
7554 IRTemp result = newTemp(Ity_I32);
7555
7556 assign(op2, get_gpr_w1(r2));
7557 assign(op3, get_gpr_w1(r3));
7558 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7559 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7560 put_gpr_w1(r1, mkexpr(result));
7561
7562 return "slrk";
7563}
7564
7565static HChar *
7566s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
7567{
7568 IRTemp op2 = newTemp(Ity_I64);
7569 IRTemp op3 = newTemp(Ity_I64);
7570 IRTemp result = newTemp(Ity_I64);
7571
7572 assign(op2, get_gpr_dw0(r2));
7573 assign(op3, get_gpr_dw0(r3));
7574 assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
7575 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
7576 put_gpr_dw0(r1, mkexpr(result));
7577
7578 return "slgrk";
7579}
7580
7581static HChar *
7582s390_irgen_SL(UChar r1, IRTemp op2addr)
7583{
7584 IRTemp op1 = newTemp(Ity_I32);
7585 IRTemp op2 = newTemp(Ity_I32);
7586 IRTemp result = newTemp(Ity_I32);
7587
7588 assign(op1, get_gpr_w1(r1));
7589 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7590 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7591 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7592 put_gpr_w1(r1, mkexpr(result));
7593
7594 return "sl";
7595}
7596
7597static HChar *
7598s390_irgen_SLY(UChar r1, IRTemp op2addr)
7599{
7600 IRTemp op1 = newTemp(Ity_I32);
7601 IRTemp op2 = newTemp(Ity_I32);
7602 IRTemp result = newTemp(Ity_I32);
7603
7604 assign(op1, get_gpr_w1(r1));
7605 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7606 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
7607 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
7608 put_gpr_w1(r1, mkexpr(result));
7609
7610 return "sly";
7611}
7612
7613static HChar *
7614s390_irgen_SLG(UChar r1, IRTemp op2addr)
7615{
7616 IRTemp op1 = newTemp(Ity_I64);
7617 IRTemp op2 = newTemp(Ity_I64);
7618 IRTemp result = newTemp(Ity_I64);
7619
7620 assign(op1, get_gpr_dw0(r1));
7621 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7622 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7623 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7624 put_gpr_dw0(r1, mkexpr(result));
7625
7626 return "slg";
7627}
7628
7629static HChar *
7630s390_irgen_SLGF(UChar r1, IRTemp op2addr)
7631{
7632 IRTemp op1 = newTemp(Ity_I64);
7633 IRTemp op2 = newTemp(Ity_I64);
7634 IRTemp result = newTemp(Ity_I64);
7635
7636 assign(op1, get_gpr_dw0(r1));
7637 assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
7638 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
7639 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
7640 put_gpr_dw0(r1, mkexpr(result));
7641
7642 return "slgf";
7643}
7644
7645static HChar *
7646s390_irgen_SLFI(UChar r1, UInt i2)
7647{
7648 IRTemp op1 = newTemp(Ity_I32);
7649 UInt op2;
7650 IRTemp result = newTemp(Ity_I32);
7651
7652 assign(op1, get_gpr_w1(r1));
7653 op2 = i2;
7654 assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
7655 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
7656 mkU32(op2)));
7657 put_gpr_w1(r1, mkexpr(result));
7658
7659 return "slfi";
7660}
7661
7662static HChar *
7663s390_irgen_SLGFI(UChar r1, UInt i2)
7664{
7665 IRTemp op1 = newTemp(Ity_I64);
7666 ULong op2;
7667 IRTemp result = newTemp(Ity_I64);
7668
7669 assign(op1, get_gpr_dw0(r1));
7670 op2 = (ULong)i2;
7671 assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
7672 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
7673 mkU64(op2)));
7674 put_gpr_dw0(r1, mkexpr(result));
7675
7676 return "slgfi";
7677}
7678
7679static HChar *
7680s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7681{
7682 IRTemp op2 = newTemp(Ity_I32);
7683 IRTemp op3 = newTemp(Ity_I32);
7684 IRTemp result = newTemp(Ity_I32);
7685
7686 assign(op2, get_gpr_w0(r1));
7687 assign(op3, get_gpr_w0(r2));
7688 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7689 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7690 put_gpr_w0(r1, mkexpr(result));
7691
7692 return "slhhhr";
7693}
7694
7695static HChar *
7696s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
7697{
7698 IRTemp op2 = newTemp(Ity_I32);
7699 IRTemp op3 = newTemp(Ity_I32);
7700 IRTemp result = newTemp(Ity_I32);
7701
7702 assign(op2, get_gpr_w0(r1));
7703 assign(op3, get_gpr_w1(r2));
7704 assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
7705 s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
7706 put_gpr_w0(r1, mkexpr(result));
7707
7708 return "slhhlr";
7709}
7710
7711static HChar *
7712s390_irgen_SLBR(UChar r1, UChar r2)
7713{
7714 IRTemp op1 = newTemp(Ity_I32);
7715 IRTemp op2 = newTemp(Ity_I32);
7716 IRTemp result = newTemp(Ity_I32);
7717 IRTemp borrow_in = newTemp(Ity_I32);
7718
7719 assign(op1, get_gpr_w1(r1));
7720 assign(op2, get_gpr_w1(r2));
7721 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7722 s390_call_calculate_cc(), mkU8(1))));
7723 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7724 mkexpr(borrow_in)));
7725 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7726 put_gpr_w1(r1, mkexpr(result));
7727
7728 return "slbr";
7729}
7730
7731static HChar *
7732s390_irgen_SLBGR(UChar r1, UChar r2)
7733{
7734 IRTemp op1 = newTemp(Ity_I64);
7735 IRTemp op2 = newTemp(Ity_I64);
7736 IRTemp result = newTemp(Ity_I64);
7737 IRTemp borrow_in = newTemp(Ity_I64);
7738
7739 assign(op1, get_gpr_dw0(r1));
7740 assign(op2, get_gpr_dw0(r2));
7741 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7742 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7743 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7744 mkexpr(borrow_in)));
7745 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7746 put_gpr_dw0(r1, mkexpr(result));
7747
7748 return "slbgr";
7749}
7750
7751static HChar *
7752s390_irgen_SLB(UChar r1, IRTemp op2addr)
7753{
7754 IRTemp op1 = newTemp(Ity_I32);
7755 IRTemp op2 = newTemp(Ity_I32);
7756 IRTemp result = newTemp(Ity_I32);
7757 IRTemp borrow_in = newTemp(Ity_I32);
7758
7759 assign(op1, get_gpr_w1(r1));
7760 assign(op2, load(Ity_I32, mkexpr(op2addr)));
7761 assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
7762 s390_call_calculate_cc(), mkU8(1))));
7763 assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
7764 mkexpr(borrow_in)));
7765 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
7766 put_gpr_w1(r1, mkexpr(result));
7767
7768 return "slb";
7769}
7770
7771static HChar *
7772s390_irgen_SLBG(UChar r1, IRTemp op2addr)
7773{
7774 IRTemp op1 = newTemp(Ity_I64);
7775 IRTemp op2 = newTemp(Ity_I64);
7776 IRTemp result = newTemp(Ity_I64);
7777 IRTemp borrow_in = newTemp(Ity_I64);
7778
7779 assign(op1, get_gpr_dw0(r1));
7780 assign(op2, load(Ity_I64, mkexpr(op2addr)));
7781 assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
7782 binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
7783 assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
7784 mkexpr(borrow_in)));
7785 s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
7786 put_gpr_dw0(r1, mkexpr(result));
7787
7788 return "slbg";
7789}
7790
7791static HChar *
7792s390_irgen_SVC(UChar i)
7793{
7794 IRTemp sysno = newTemp(Ity_I64);
7795
7796 if (i != 0) {
7797 assign(sysno, mkU64(i));
7798 } else {
7799 assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
7800 }
7801 system_call(mkexpr(sysno));
7802
7803 return "svc";
7804}
7805
7806static HChar *
7807s390_irgen_TS(IRTemp op2addr)
7808{
7809 IRTemp value = newTemp(Ity_I8);
7810
7811 assign(value, load(Ity_I8, mkexpr(op2addr)));
7812 s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
7813 store(mkexpr(op2addr), mkU8(255));
7814
7815 return "ts";
7816}
7817
7818static HChar *
7819s390_irgen_TM(UChar i2, IRTemp op1addr)
7820{
7821 UChar mask;
7822 IRTemp value = newTemp(Ity_I8);
7823
7824 mask = i2;
7825 assign(value, load(Ity_I8, mkexpr(op1addr)));
7826 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7827 mkU8(mask)));
7828
7829 return "tm";
7830}
7831
7832static HChar *
7833s390_irgen_TMY(UChar i2, IRTemp op1addr)
7834{
7835 UChar mask;
7836 IRTemp value = newTemp(Ity_I8);
7837
7838 mask = i2;
7839 assign(value, load(Ity_I8, mkexpr(op1addr)));
7840 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
7841 mkU8(mask)));
7842
7843 return "tmy";
7844}
7845
7846static HChar *
7847s390_irgen_TMHH(UChar r1, UShort i2)
7848{
7849 UShort mask;
7850 IRTemp value = newTemp(Ity_I16);
7851
7852 mask = i2;
7853 assign(value, get_gpr_hw0(r1));
7854 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7855 mkU16(mask)));
7856
7857 return "tmhh";
7858}
7859
7860static HChar *
7861s390_irgen_TMHL(UChar r1, UShort i2)
7862{
7863 UShort mask;
7864 IRTemp value = newTemp(Ity_I16);
7865
7866 mask = i2;
7867 assign(value, get_gpr_hw1(r1));
7868 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7869 mkU16(mask)));
7870
7871 return "tmhl";
7872}
7873
7874static HChar *
7875s390_irgen_TMLH(UChar r1, UShort i2)
7876{
7877 UShort mask;
7878 IRTemp value = newTemp(Ity_I16);
7879
7880 mask = i2;
7881 assign(value, get_gpr_hw2(r1));
7882 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7883 mkU16(mask)));
7884
7885 return "tmlh";
7886}
7887
7888static HChar *
7889s390_irgen_TMLL(UChar r1, UShort i2)
7890{
7891 UShort mask;
7892 IRTemp value = newTemp(Ity_I16);
7893
7894 mask = i2;
7895 assign(value, get_gpr_hw3(r1));
7896 s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
7897 mkU16(mask)));
7898
7899 return "tmll";
7900}
7901
7902static HChar *
7903s390_irgen_EFPC(UChar r1)
7904{
7905 put_gpr_w1(r1, get_fpc_w0());
7906
7907 return "efpc";
7908}
7909
7910static HChar *
7911s390_irgen_LER(UChar r1, UChar r2)
7912{
7913 put_fpr_w0(r1, get_fpr_w0(r2));
7914
7915 return "ler";
7916}
7917
7918static HChar *
7919s390_irgen_LDR(UChar r1, UChar r2)
7920{
7921 put_fpr_dw0(r1, get_fpr_dw0(r2));
7922
7923 return "ldr";
7924}
7925
7926static HChar *
7927s390_irgen_LXR(UChar r1, UChar r2)
7928{
7929 put_fpr_dw0(r1, get_fpr_dw0(r2));
7930 put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
7931
7932 return "lxr";
7933}
7934
7935static HChar *
7936s390_irgen_LE(UChar r1, IRTemp op2addr)
7937{
7938 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7939
7940 return "le";
7941}
7942
7943static HChar *
7944s390_irgen_LD(UChar r1, IRTemp op2addr)
7945{
7946 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7947
7948 return "ld";
7949}
7950
7951static HChar *
7952s390_irgen_LEY(UChar r1, IRTemp op2addr)
7953{
7954 put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
7955
7956 return "ley";
7957}
7958
7959static HChar *
7960s390_irgen_LDY(UChar r1, IRTemp op2addr)
7961{
7962 put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
7963
7964 return "ldy";
7965}
7966
7967static HChar *
7968s390_irgen_LFPC(IRTemp op2addr)
7969{
7970 put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
7971
7972 return "lfpc";
7973}
7974
7975static HChar *
7976s390_irgen_LZER(UChar r1)
7977{
7978 put_fpr_w0(r1, mkF32i(0x0));
7979
7980 return "lzer";
7981}
7982
7983static HChar *
7984s390_irgen_LZDR(UChar r1)
7985{
7986 put_fpr_dw0(r1, mkF64i(0x0));
7987
7988 return "lzdr";
7989}
7990
7991static HChar *
7992s390_irgen_LZXR(UChar r1)
7993{
7994 put_fpr_dw0(r1, mkF64i(0x0));
7995 put_fpr_dw0(r1 + 2, mkF64i(0x0));
7996
7997 return "lzxr";
7998}
7999
8000static HChar *
8001s390_irgen_SRNM(IRTemp op2addr)
8002{
8003 UInt mask;
8004
8005 mask = 3;
8006 put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
8007 binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
8008 );
8009
8010 return "srnm";
8011}
8012
8013static HChar *
8014s390_irgen_SFPC(UChar r1)
8015{
8016 put_fpc_w0(get_gpr_w1(r1));
8017
8018 return "sfpc";
8019}
8020
8021static HChar *
8022s390_irgen_STE(UChar r1, IRTemp op2addr)
8023{
8024 store(mkexpr(op2addr), get_fpr_w0(r1));
8025
8026 return "ste";
8027}
8028
8029static HChar *
8030s390_irgen_STD(UChar r1, IRTemp op2addr)
8031{
8032 store(mkexpr(op2addr), get_fpr_dw0(r1));
8033
8034 return "std";
8035}
8036
8037static HChar *
8038s390_irgen_STEY(UChar r1, IRTemp op2addr)
8039{
8040 store(mkexpr(op2addr), get_fpr_w0(r1));
8041
8042 return "stey";
8043}
8044
8045static HChar *
8046s390_irgen_STDY(UChar r1, IRTemp op2addr)
8047{
8048 store(mkexpr(op2addr), get_fpr_dw0(r1));
8049
8050 return "stdy";
8051}
8052
8053static HChar *
8054s390_irgen_STFPC(IRTemp op2addr)
8055{
8056 store(mkexpr(op2addr), get_fpc_w0());
8057
8058 return "stfpc";
8059}
8060
8061static HChar *
8062s390_irgen_AEBR(UChar r1, UChar r2)
8063{
8064 IRTemp op1 = newTemp(Ity_F32);
8065 IRTemp op2 = newTemp(Ity_F32);
8066 IRTemp result = newTemp(Ity_F32);
8067
8068 assign(op1, get_fpr_w0(r1));
8069 assign(op2, get_fpr_w0(r2));
8070 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8071 mkexpr(op2)));
8072 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8073 put_fpr_w0(r1, mkexpr(result));
8074
8075 return "aebr";
8076}
8077
8078static HChar *
8079s390_irgen_ADBR(UChar r1, UChar r2)
8080{
8081 IRTemp op1 = newTemp(Ity_F64);
8082 IRTemp op2 = newTemp(Ity_F64);
8083 IRTemp result = newTemp(Ity_F64);
8084
8085 assign(op1, get_fpr_dw0(r1));
8086 assign(op2, get_fpr_dw0(r2));
8087 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8088 mkexpr(op2)));
8089 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8090 put_fpr_dw0(r1, mkexpr(result));
8091
8092 return "adbr";
8093}
8094
8095static HChar *
8096s390_irgen_AEB(UChar r1, IRTemp op2addr)
8097{
8098 IRTemp op1 = newTemp(Ity_F32);
8099 IRTemp op2 = newTemp(Ity_F32);
8100 IRTemp result = newTemp(Ity_F32);
8101
8102 assign(op1, get_fpr_w0(r1));
8103 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8104 assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8105 mkexpr(op2)));
8106 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8107 put_fpr_w0(r1, mkexpr(result));
8108
8109 return "aeb";
8110}
8111
8112static HChar *
8113s390_irgen_ADB(UChar r1, IRTemp op2addr)
8114{
8115 IRTemp op1 = newTemp(Ity_F64);
8116 IRTemp op2 = newTemp(Ity_F64);
8117 IRTemp result = newTemp(Ity_F64);
8118
8119 assign(op1, get_fpr_dw0(r1));
8120 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8121 assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8122 mkexpr(op2)));
8123 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8124 put_fpr_dw0(r1, mkexpr(result));
8125
8126 return "adb";
8127}
8128
8129static HChar *
8130s390_irgen_CEFBR(UChar r1, UChar r2)
8131{
8132 IRTemp op2 = newTemp(Ity_I32);
8133
8134 assign(op2, get_gpr_w1(r2));
8135 put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8136
8137 return "cefbr";
8138}
8139
8140static HChar *
8141s390_irgen_CDFBR(UChar r1, UChar r2)
8142{
8143 IRTemp op2 = newTemp(Ity_I32);
8144
8145 assign(op2, get_gpr_w1(r2));
8146 put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
8147
8148 return "cdfbr";
8149}
8150
8151static HChar *
8152s390_irgen_CEGBR(UChar r1, UChar r2)
8153{
8154 IRTemp op2 = newTemp(Ity_I64);
8155
8156 assign(op2, get_gpr_dw0(r2));
8157 put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
8158
8159 return "cegbr";
8160}
8161
8162static HChar *
8163s390_irgen_CDGBR(UChar r1, UChar r2)
8164{
8165 IRTemp op2 = newTemp(Ity_I64);
8166
8167 assign(op2, get_gpr_dw0(r2));
8168 put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
8169
8170 return "cdgbr";
8171}
8172
8173static HChar *
8174s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
8175{
8176 IRTemp op = newTemp(Ity_F32);
8177 IRTemp result = newTemp(Ity_I32);
8178
8179 assign(op, get_fpr_w0(r2));
8180 assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
8181 mkexpr(op)));
8182 put_gpr_w1(r1, mkexpr(result));
8183 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
8184
8185 return "cfebr";
8186}
8187
8188static HChar *
8189s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
8190{
8191 IRTemp op = newTemp(Ity_F64);
8192 IRTemp result = newTemp(Ity_I32);
8193
8194 assign(op, get_fpr_dw0(r2));
8195 assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
8196 mkexpr(op)));
8197 put_gpr_w1(r1, mkexpr(result));
8198 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
8199
8200 return "cfdbr";
8201}
8202
8203static HChar *
8204s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
8205{
8206 IRTemp op = newTemp(Ity_F32);
8207 IRTemp result = newTemp(Ity_I64);
8208
8209 assign(op, get_fpr_w0(r2));
8210 assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
8211 mkexpr(op)));
8212 put_gpr_dw0(r1, mkexpr(result));
8213 s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
8214
8215 return "cgebr";
8216}
8217
8218static HChar *
8219s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
8220{
8221 IRTemp op = newTemp(Ity_F64);
8222 IRTemp result = newTemp(Ity_I64);
8223
8224 assign(op, get_fpr_dw0(r2));
8225 assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
8226 mkexpr(op)));
8227 put_gpr_dw0(r1, mkexpr(result));
8228 s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
8229
8230 return "cgdbr";
8231}
8232
8233static HChar *
8234s390_irgen_DEBR(UChar r1, UChar r2)
8235{
8236 IRTemp op1 = newTemp(Ity_F32);
8237 IRTemp op2 = newTemp(Ity_F32);
8238 IRTemp result = newTemp(Ity_F32);
8239
8240 assign(op1, get_fpr_w0(r1));
8241 assign(op2, get_fpr_w0(r2));
8242 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8243 mkexpr(op2)));
8244 put_fpr_w0(r1, mkexpr(result));
8245
8246 return "debr";
8247}
8248
8249static HChar *
8250s390_irgen_DDBR(UChar r1, UChar r2)
8251{
8252 IRTemp op1 = newTemp(Ity_F64);
8253 IRTemp op2 = newTemp(Ity_F64);
8254 IRTemp result = newTemp(Ity_F64);
8255
8256 assign(op1, get_fpr_dw0(r1));
8257 assign(op2, get_fpr_dw0(r2));
8258 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8259 mkexpr(op2)));
8260 put_fpr_dw0(r1, mkexpr(result));
8261
8262 return "ddbr";
8263}
8264
8265static HChar *
8266s390_irgen_DEB(UChar r1, IRTemp op2addr)
8267{
8268 IRTemp op1 = newTemp(Ity_F32);
8269 IRTemp op2 = newTemp(Ity_F32);
8270 IRTemp result = newTemp(Ity_F32);
8271
8272 assign(op1, get_fpr_w0(r1));
8273 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8274 assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8275 mkexpr(op2)));
8276 put_fpr_w0(r1, mkexpr(result));
8277
8278 return "deb";
8279}
8280
8281static HChar *
8282s390_irgen_DDB(UChar r1, IRTemp op2addr)
8283{
8284 IRTemp op1 = newTemp(Ity_F64);
8285 IRTemp op2 = newTemp(Ity_F64);
8286 IRTemp result = newTemp(Ity_F64);
8287
8288 assign(op1, get_fpr_dw0(r1));
8289 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8290 assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8291 mkexpr(op2)));
8292 put_fpr_dw0(r1, mkexpr(result));
8293
8294 return "ddb";
8295}
8296
8297static HChar *
8298s390_irgen_LTEBR(UChar r1, UChar r2)
8299{
8300 IRTemp result = newTemp(Ity_F32);
8301
8302 assign(result, get_fpr_w0(r2));
8303 put_fpr_w0(r1, mkexpr(result));
8304 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8305
8306 return "ltebr";
8307}
8308
8309static HChar *
8310s390_irgen_LTDBR(UChar r1, UChar r2)
8311{
8312 IRTemp result = newTemp(Ity_F64);
8313
8314 assign(result, get_fpr_dw0(r2));
8315 put_fpr_dw0(r1, mkexpr(result));
8316 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8317
8318 return "ltdbr";
8319}
8320
8321static HChar *
8322s390_irgen_LCEBR(UChar r1, UChar r2)
8323{
8324 IRTemp result = newTemp(Ity_F32);
8325
8326 assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
8327 put_fpr_w0(r1, mkexpr(result));
8328 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8329
8330 return "lcebr";
8331}
8332
8333static HChar *
8334s390_irgen_LCDBR(UChar r1, UChar r2)
8335{
8336 IRTemp result = newTemp(Ity_F64);
8337
8338 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
8339 put_fpr_dw0(r1, mkexpr(result));
8340 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8341
8342 return "lcdbr";
8343}
8344
8345static HChar *
8346s390_irgen_LDEBR(UChar r1, UChar r2)
8347{
8348 IRTemp op = newTemp(Ity_F32);
8349
8350 assign(op, get_fpr_w0(r2));
8351 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8352
8353 return "ldebr";
8354}
8355
8356static HChar *
8357s390_irgen_LDEB(UChar r1, IRTemp op2addr)
8358{
8359 IRTemp op = newTemp(Ity_F32);
8360
8361 assign(op, load(Ity_F32, mkexpr(op2addr)));
8362 put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
8363
8364 return "ldeb";
8365}
8366
8367static HChar *
8368s390_irgen_LEDBR(UChar r1, UChar r2)
8369{
8370 IRTemp op = newTemp(Ity_F64);
8371
8372 assign(op, get_fpr_dw0(r2));
8373 put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
8374
8375 return "ledbr";
8376}
8377
8378static HChar *
8379s390_irgen_MEEBR(UChar r1, UChar r2)
8380{
8381 IRTemp op1 = newTemp(Ity_F32);
8382 IRTemp op2 = newTemp(Ity_F32);
8383 IRTemp result = newTemp(Ity_F32);
8384
8385 assign(op1, get_fpr_w0(r1));
8386 assign(op2, get_fpr_w0(r2));
8387 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8388 mkexpr(op2)));
8389 put_fpr_w0(r1, mkexpr(result));
8390
8391 return "meebr";
8392}
8393
8394static HChar *
8395s390_irgen_MDBR(UChar r1, UChar r2)
8396{
8397 IRTemp op1 = newTemp(Ity_F64);
8398 IRTemp op2 = newTemp(Ity_F64);
8399 IRTemp result = newTemp(Ity_F64);
8400
8401 assign(op1, get_fpr_dw0(r1));
8402 assign(op2, get_fpr_dw0(r2));
8403 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8404 mkexpr(op2)));
8405 put_fpr_dw0(r1, mkexpr(result));
8406
8407 return "mdbr";
8408}
8409
8410static HChar *
8411s390_irgen_MEEB(UChar r1, IRTemp op2addr)
8412{
8413 IRTemp op1 = newTemp(Ity_F32);
8414 IRTemp op2 = newTemp(Ity_F32);
8415 IRTemp result = newTemp(Ity_F32);
8416
8417 assign(op1, get_fpr_w0(r1));
8418 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8419 assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8420 mkexpr(op2)));
8421 put_fpr_w0(r1, mkexpr(result));
8422
8423 return "meeb";
8424}
8425
8426static HChar *
8427s390_irgen_MDB(UChar r1, IRTemp op2addr)
8428{
8429 IRTemp op1 = newTemp(Ity_F64);
8430 IRTemp op2 = newTemp(Ity_F64);
8431 IRTemp result = newTemp(Ity_F64);
8432
8433 assign(op1, get_fpr_dw0(r1));
8434 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8435 assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8436 mkexpr(op2)));
8437 put_fpr_dw0(r1, mkexpr(result));
8438
8439 return "mdb";
8440}
8441
8442static HChar *
8443s390_irgen_SEBR(UChar r1, UChar r2)
8444{
8445 IRTemp op1 = newTemp(Ity_F32);
8446 IRTemp op2 = newTemp(Ity_F32);
8447 IRTemp result = newTemp(Ity_F32);
8448
8449 assign(op1, get_fpr_w0(r1));
8450 assign(op2, get_fpr_w0(r2));
8451 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8452 mkexpr(op2)));
8453 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8454 put_fpr_w0(r1, mkexpr(result));
8455
8456 return "sebr";
8457}
8458
8459static HChar *
8460s390_irgen_SDBR(UChar r1, UChar r2)
8461{
8462 IRTemp op1 = newTemp(Ity_F64);
8463 IRTemp op2 = newTemp(Ity_F64);
8464 IRTemp result = newTemp(Ity_F64);
8465
8466 assign(op1, get_fpr_dw0(r1));
8467 assign(op2, get_fpr_dw0(r2));
8468 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8469 mkexpr(op2)));
8470 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8471 put_fpr_dw0(r1, mkexpr(result));
8472
8473 return "sdbr";
8474}
8475
8476static HChar *
8477s390_irgen_SEB(UChar r1, IRTemp op2addr)
8478{
8479 IRTemp op1 = newTemp(Ity_F32);
8480 IRTemp op2 = newTemp(Ity_F32);
8481 IRTemp result = newTemp(Ity_F32);
8482
8483 assign(op1, get_fpr_w0(r1));
8484 assign(op2, load(Ity_F32, mkexpr(op2addr)));
8485 assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
8486 mkexpr(op2)));
8487 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
8488 put_fpr_w0(r1, mkexpr(result));
8489
8490 return "seb";
8491}
8492
8493static HChar *
8494s390_irgen_SDB(UChar r1, IRTemp op2addr)
8495{
8496 IRTemp op1 = newTemp(Ity_F64);
8497 IRTemp op2 = newTemp(Ity_F64);
8498 IRTemp result = newTemp(Ity_F64);
8499
8500 assign(op1, get_fpr_dw0(r1));
8501 assign(op2, load(Ity_F64, mkexpr(op2addr)));
8502 assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
8503 mkexpr(op2)));
8504 s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
8505 put_fpr_dw0(r1, mkexpr(result));
8506
8507 return "sdb";
8508}
8509
8510
8511static HChar *
8512s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
8513{
8514 IRTemp current1 = newTemp(Ity_I8);
8515 IRTemp current2 = newTemp(Ity_I8);
8516 IRTemp counter = newTemp(Ity_I64);
8517
8518 assign(counter, get_counter_dw0());
8519 put_counter_dw0(mkU64(0));
8520
8521 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8522 mkexpr(counter))));
8523 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8524 mkexpr(counter))));
8525 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8526 False);
8527
8528 /* Both fields differ ? */
8529 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8530 guest_IA_next_instr);
8531
8532 /* Check for end of field */
8533 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8534 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
8535 guest_IA_curr_instr);
8536 put_counter_dw0(mkU64(0));
8537
8538 return "clc";
8539}
8540
8541static HChar *
8542s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
8543{
8544 IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
8545
8546 addr1 = newTemp(Ity_I64);
8547 addr3 = newTemp(Ity_I64);
8548 addr1_load = newTemp(Ity_I64);
8549 addr3_load = newTemp(Ity_I64);
8550 len1 = newTemp(Ity_I64);
8551 len3 = newTemp(Ity_I64);
8552 single1 = newTemp(Ity_I8);
8553 single3 = newTemp(Ity_I8);
8554
8555 assign(addr1, get_gpr_dw0(r1));
8556 assign(len1, get_gpr_dw0(r1 + 1));
8557 assign(addr3, get_gpr_dw0(r3));
8558 assign(len3, get_gpr_dw0(r3 + 1));
8559
8560 /* len1 == 0 and len3 == 0? Exit */
8561 s390_cc_set(0);
8562 if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
8563 mkexpr(len3)), mkU64(0)),
8564 guest_IA_next_instr);
8565
8566 /* A mux requires both ways to be possible. This is a way to prevent clcle
8567 from reading from addr1 if it should read from the pad. Since the pad
8568 has no address, just read from the instruction, we discard that anyway */
8569 assign(addr1_load,
8570 IRExpr_Mux0X(unop(Iop_1Uto8,
8571 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8572 mkexpr(addr1),
8573 mkU64(guest_IA_curr_instr)));
8574
8575 /* same for addr3 */
8576 assign(addr3_load,
8577 IRExpr_Mux0X(unop(Iop_1Uto8,
8578 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8579 mkexpr(addr3),
8580 mkU64(guest_IA_curr_instr)));
8581
8582 assign(single1,
8583 IRExpr_Mux0X(unop(Iop_1Uto8,
8584 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8585 load(Ity_I8, mkexpr(addr1_load)),
8586 unop(Iop_64to8, mkexpr(pad2))));
8587
8588 assign(single3,
8589 IRExpr_Mux0X(unop(Iop_1Uto8,
8590 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8591 load(Ity_I8, mkexpr(addr3_load)),
8592 unop(Iop_64to8, mkexpr(pad2))));
8593
8594 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
8595 /* Both fields differ ? */
8596 if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
8597 guest_IA_next_instr);
8598
8599 /* If a length in 0 we must not change this length and the address */
8600 put_gpr_dw0(r1,
8601 IRExpr_Mux0X(unop(Iop_1Uto8,
8602 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8603 binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
8604 mkexpr(addr1)));
8605
8606 put_gpr_dw0(r1 + 1,
8607 IRExpr_Mux0X(unop(Iop_1Uto8,
8608 binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
8609 binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
8610 mkU64(0)));
8611
8612 put_gpr_dw0(r3,
8613 IRExpr_Mux0X(unop(Iop_1Uto8,
8614 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8615 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
8616 mkexpr(addr3)));
8617
8618 put_gpr_dw0(r3 + 1,
8619 IRExpr_Mux0X(unop(Iop_1Uto8,
8620 binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
8621 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
8622 mkU64(0)));
8623
8624 /* The architecture requires that we exit with CC3 after a machine specific
8625 amount of bytes. We do that if len1+len3 % 4096 == 0 */
8626 s390_cc_set(3);
8627 if_condition_goto(binop(Iop_CmpEQ64,
8628 binop(Iop_And64,
8629 binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
8630 mkU64(0xfff)),
8631 mkU64(0)),
8632 guest_IA_next_instr);
8633
8634 always_goto(mkU64(guest_IA_curr_instr));
8635
8636 return "clcle";
8637}
8638static void
8639s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8640{
8641 IRTemp old1 = newTemp(Ity_I8);
8642 IRTemp old2 = newTemp(Ity_I8);
8643 IRTemp new1 = newTemp(Ity_I8);
8644 IRTemp counter = newTemp(Ity_I32);
8645 IRTemp addr1 = newTemp(Ity_I64);
8646
8647 assign(counter, get_counter_w0());
8648
8649 assign(addr1, binop(Iop_Add64, mkexpr(start1),
8650 unop(Iop_32Uto64, mkexpr(counter))));
8651
8652 assign(old1, load(Ity_I8, mkexpr(addr1)));
8653 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8654 unop(Iop_32Uto64,mkexpr(counter)))));
8655 assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
8656
8657 store(mkexpr(addr1),
8658 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
8659 mkexpr(start2))),
8660 mkexpr(new1), mkU8(0)));
8661 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
8662 get_counter_w1()));
8663
8664 /* Check for end of field */
8665 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
8666 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
8667 guest_IA_curr_instr);
8668 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
8669 False);
8670 put_counter_dw0(mkU64(0));
8671}
8672
8673
8674static void
8675s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8676{
8677 IRTemp current1 = newTemp(Ity_I8);
8678 IRTemp current2 = newTemp(Ity_I8);
8679 IRTemp counter = newTemp(Ity_I64);
8680
8681 assign(counter, get_counter_dw0());
8682 put_counter_dw0(mkU64(0));
8683
8684 assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
8685 mkexpr(counter))));
8686 assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
8687 mkexpr(counter))));
8688 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
8689 False);
8690
8691 /* Both fields differ ? */
8692 if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
8693 guest_IA_next_instr);
8694
8695 /* Check for end of field */
8696 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8697 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8698 guest_IA_curr_instr);
8699 put_counter_dw0(mkU64(0));
8700}
8701
8702static void
8703s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
8704{
8705 IRTemp counter = newTemp(Ity_I64);
8706
8707 assign(counter, get_counter_dw0());
8708
8709 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
8710 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
8711
8712 /* Check for end of field */
8713 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8714 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
8715 guest_IA_curr_instr);
8716 put_counter_dw0(mkU64(0));
8717}
8718
8719
8720
8721static void
8722s390_irgen_EX_SS(UChar r, IRTemp addr2,
8723void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
8724{
8725 struct SS {
8726 unsigned int op : 8;
8727 unsigned int l : 8;
8728 unsigned int b1 : 4;
8729 unsigned int d1 : 12;
8730 unsigned int b2 : 4;
8731 unsigned int d2 : 12;
8732 };
8733 union {
8734 struct SS dec;
8735 unsigned long bytes;
8736 } ss;
8737 IRTemp cond;
8738 IRDirty *d;
8739 IRTemp torun;
8740
8741 IRTemp start1 = newTemp(Ity_I64);
8742 IRTemp start2 = newTemp(Ity_I64);
8743 IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
8744 cond = newTemp(Ity_I1);
8745 torun = newTemp(Ity_I64);
8746
8747 assign(torun, load(Ity_I64, mkexpr(addr2)));
8748 /* Start with a check that the saved code is still correct */
8749 assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
8750 /* If not, save the new value */
8751 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8752 mkIRExprVec_1(mkexpr(torun)));
8753 d->guard = mkexpr(cond);
8754 stmt(IRStmt_Dirty(d));
8755
8756 /* and restart */
8757 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8758 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8759 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8760 IRConst_U64(guest_IA_curr_instr)));
8761
8762 ss.bytes = last_execute_target;
8763 assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
8764 ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
8765 assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
8766 ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
8767 assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
8768 r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
8769 irgen(len, start1, start2);
8770 last_execute_target = 0;
8771}
8772
8773static HChar *
8774s390_irgen_EX(UChar r1, IRTemp addr2)
8775{
8776 switch(last_execute_target & 0xff00000000000000ULL) {
8777 case 0:
8778 {
8779 /* no code information yet */
8780 IRDirty *d;
8781
8782 /* so safe the code... */
8783 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8784 mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
8785 stmt(IRStmt_Dirty(d));
8786 /* and restart */
8787 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8788 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8789 stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
8790 IRConst_U64(guest_IA_curr_instr)));
8791 /* we know that this will be invalidated */
8792 irsb->next = mkU64(guest_IA_next_instr);
8793 dis_res->whatNext = Dis_StopHere;
8794 break;
8795 }
8796
8797 case 0xd200000000000000ULL:
8798 /* special case MVC */
8799 s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
8800 return "mvc via ex";
8801
8802 case 0xd500000000000000ULL:
8803 /* special case CLC */
8804 s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
8805 return "clc via ex";
8806
8807 case 0xd700000000000000ULL:
8808 /* special case XC */
8809 s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
8810 return "xc via ex";
8811
8812
8813 default:
8814 {
8815 /* everything else will get a self checking prefix that also checks the
8816 register content */
8817 IRDirty *d;
8818 UChar *bytes;
8819 IRTemp cond;
8820 IRTemp orperand;
8821 IRTemp torun;
8822
8823 cond = newTemp(Ity_I1);
8824 orperand = newTemp(Ity_I64);
8825 torun = newTemp(Ity_I64);
8826
8827 if (r1 == 0)
8828 assign(orperand, mkU64(0));
8829 else
8830 assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
8831 /* This code is going to be translated */
8832 assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
8833 binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
8834
8835 /* Start with a check that saved code is still correct */
8836 assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
8837 mkU64(last_execute_target)));
8838 /* If not, save the new value */
8839 d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
8840 mkIRExprVec_1(mkexpr(torun)));
8841 d->guard = mkexpr(cond);
8842 stmt(IRStmt_Dirty(d));
8843
8844 /* and restart */
8845 stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
8846 stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
8847 stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
8848 IRConst_U64(guest_IA_curr_instr)));
8849
8850 /* Now comes the actual translation */
8851 bytes = (UChar *) &last_execute_target;
8852 s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
8853 dis_res);
sewardj7ee97522011-05-09 21:45:04 +00008854 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardj2019a972011-03-07 16:04:07 +00008855 vex_printf(" which was executed by\n");
8856 /* dont make useless translations in the next execute */
8857 last_execute_target = 0;
8858 }
8859 }
8860 return "ex";
8861}
8862
8863static HChar *
8864s390_irgen_EXRL(UChar r1, UInt offset)
8865{
8866 IRTemp addr = newTemp(Ity_I64);
8867 /* we might save one round trip because we know the target */
8868 if (!last_execute_target)
8869 last_execute_target = *(ULong *)(HWord)
8870 (guest_IA_curr_instr + offset * 2UL);
8871 assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
8872 s390_irgen_EX(r1, addr);
8873 return "exrl";
8874}
8875
8876static HChar *
8877s390_irgen_IPM(UChar r1)
8878{
8879 // As long as we dont support SPM, lets just assume 0 as program mask
8880 put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
8881 binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
8882
8883 return "ipm";
8884}
8885
8886
8887static HChar *
8888s390_irgen_SRST(UChar r1, UChar r2)
8889{
8890 IRTemp address = newTemp(Ity_I64);
8891 IRTemp next = newTemp(Ity_I64);
8892 IRTemp delim = newTemp(Ity_I8);
8893 IRTemp counter = newTemp(Ity_I64);
8894 IRTemp byte = newTemp(Ity_I8);
8895
8896 assign(address, get_gpr_dw0(r2));
8897 assign(next, get_gpr_dw0(r1));
8898
8899 assign(counter, get_counter_dw0());
8900 put_counter_dw0(mkU64(0));
8901
8902 // start = next? CC=2 and out r1 and r2 unchanged
8903 s390_cc_set(2);
8904 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
8905 if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
8906 guest_IA_next_instr);
8907
8908 assign(byte, load(Ity_I8, mkexpr(address)));
8909 assign(delim, get_gpr_b7(0));
8910
8911 // byte = delim? CC=1, R1=address
8912 s390_cc_set(1);
8913 put_gpr_dw0(r1, mkexpr(address));
8914 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
8915 guest_IA_next_instr);
8916
8917 // else: all equal, no end yet, loop
8918 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8919 put_gpr_dw0(r1, mkexpr(next));
8920 put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
8921 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8922 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8923 // >= 256 bytes done CC=3
8924 s390_cc_set(3);
8925 put_counter_dw0(mkU64(0));
8926
8927 return "srst";
8928}
8929
8930static HChar *
8931s390_irgen_CLST(UChar r1, UChar r2)
8932{
8933 IRTemp address1 = newTemp(Ity_I64);
8934 IRTemp address2 = newTemp(Ity_I64);
8935 IRTemp end = newTemp(Ity_I8);
8936 IRTemp counter = newTemp(Ity_I64);
8937 IRTemp byte1 = newTemp(Ity_I8);
8938 IRTemp byte2 = newTemp(Ity_I8);
8939
8940 assign(address1, get_gpr_dw0(r1));
8941 assign(address2, get_gpr_dw0(r2));
8942 assign(end, get_gpr_b7(0));
8943 assign(counter, get_counter_dw0());
8944 put_counter_dw0(mkU64(0));
8945 assign(byte1, load(Ity_I8, mkexpr(address1)));
8946 assign(byte2, load(Ity_I8, mkexpr(address2)));
8947
8948 // end in both? all equal, reset r1 and r2 to start values
8949 s390_cc_set(0);
8950 put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
8951 put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
8952 if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
8953 binop(Iop_Or8,
8954 binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
8955 binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
8956 guest_IA_next_instr);
8957
8958 put_gpr_dw0(r1, mkexpr(address1));
8959 put_gpr_dw0(r2, mkexpr(address2));
8960
8961 // End found in string1
8962 s390_cc_set(1);
8963 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
8964 guest_IA_next_instr);
8965
8966 // End found in string2
8967 s390_cc_set(2);
8968 if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
8969 guest_IA_next_instr);
8970
8971 // string1 < string2
8972 s390_cc_set(1);
8973 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
8974 unop(Iop_8Uto32, mkexpr(byte2))),
8975 guest_IA_next_instr);
8976
8977 // string2 < string1
8978 s390_cc_set(2);
8979 if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
8980 unop(Iop_8Uto32, mkexpr(byte1))),
8981 guest_IA_next_instr);
8982
8983 // else: all equal, no end yet, loop
8984 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
8985 put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
8986 put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
8987 stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
8988 Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
8989 // >= 256 bytes done CC=3
8990 s390_cc_set(3);
8991 put_counter_dw0(mkU64(0));
8992
8993 return "clst";
8994}
8995
8996static void
8997s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
8998{
8999 UChar reg;
9000 IRTemp addr = newTemp(Ity_I64);
9001
9002 assign(addr, mkexpr(op2addr));
9003 reg = r1;
9004 do {
9005 IRTemp old = addr;
9006
9007 reg %= 16;
9008 put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
9009 addr = newTemp(Ity_I64);
9010 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9011 reg++;
9012 } while (reg != (r3 + 1));
9013}
9014
9015static HChar *
9016s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
9017{
9018 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9019
9020 return "lm";
9021}
9022
9023static HChar *
9024s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
9025{
9026 s390_irgen_load_multiple_32bit(r1, r3, op2addr);
9027
9028 return "lmy";
9029}
9030
9031static HChar *
9032s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
9033{
9034 UChar reg;
9035 IRTemp addr = newTemp(Ity_I64);
9036
9037 assign(addr, mkexpr(op2addr));
9038 reg = r1;
9039 do {
9040 IRTemp old = addr;
9041
9042 reg %= 16;
9043 put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
9044 addr = newTemp(Ity_I64);
9045 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9046 reg++;
9047 } while (reg != (r3 + 1));
9048
9049 return "lmh";
9050}
9051
9052static HChar *
9053s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
9054{
9055 UChar reg;
9056 IRTemp addr = newTemp(Ity_I64);
9057
9058 assign(addr, mkexpr(op2addr));
9059 reg = r1;
9060 do {
9061 IRTemp old = addr;
9062
9063 reg %= 16;
9064 put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
9065 addr = newTemp(Ity_I64);
9066 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9067 reg++;
9068 } while (reg != (r3 + 1));
9069
9070 return "lmg";
9071}
9072
9073static void
9074s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
9075{
9076 UChar reg;
9077 IRTemp addr = newTemp(Ity_I64);
9078
9079 assign(addr, mkexpr(op2addr));
9080 reg = r1;
9081 do {
9082 IRTemp old = addr;
9083
9084 reg %= 16;
9085 store(mkexpr(addr), get_gpr_w1(reg));
9086 addr = newTemp(Ity_I64);
9087 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9088 reg++;
9089 } while( reg != (r3 + 1));
9090}
9091
9092static HChar *
9093s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
9094{
9095 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9096
9097 return "stm";
9098}
9099
9100static HChar *
9101s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
9102{
9103 s390_irgen_store_multiple_32bit(r1, r3, op2addr);
9104
9105 return "stmy";
9106}
9107
9108static HChar *
9109s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
9110{
9111 UChar reg;
9112 IRTemp addr = newTemp(Ity_I64);
9113
9114 assign(addr, mkexpr(op2addr));
9115 reg = r1;
9116 do {
9117 IRTemp old = addr;
9118
9119 reg %= 16;
9120 store(mkexpr(addr), get_gpr_w0(reg));
9121 addr = newTemp(Ity_I64);
9122 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9123 reg++;
9124 } while( reg != (r3 + 1));
9125
9126 return "stmh";
9127}
9128
9129static HChar *
9130s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
9131{
9132 UChar reg;
9133 IRTemp addr = newTemp(Ity_I64);
9134
9135 assign(addr, mkexpr(op2addr));
9136 reg = r1;
9137 do {
9138 IRTemp old = addr;
9139
9140 reg %= 16;
9141 store(mkexpr(addr), get_gpr_dw0(reg));
9142 addr = newTemp(Ity_I64);
9143 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
9144 reg++;
9145 } while( reg != (r3 + 1));
9146
9147 return "stmg";
9148}
9149
9150static void
9151s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
9152{
9153 IRTemp old1 = newTemp(Ity_I8);
9154 IRTemp old2 = newTemp(Ity_I8);
9155 IRTemp new1 = newTemp(Ity_I8);
9156 IRTemp counter = newTemp(Ity_I32);
9157 IRTemp addr1 = newTemp(Ity_I64);
9158
9159 assign(counter, get_counter_w0());
9160
9161 assign(addr1, binop(Iop_Add64, mkexpr(start1),
9162 unop(Iop_32Uto64, mkexpr(counter))));
9163
9164 assign(old1, load(Ity_I8, mkexpr(addr1)));
9165 assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
9166 unop(Iop_32Uto64,mkexpr(counter)))));
9167 assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
9168
9169 /* Special case: xc is used to zero memory */
sewardj2019a972011-03-07 16:04:07 +00009170 if (op == Iop_Xor8) {
9171 store(mkexpr(addr1),
9172 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
9173 mkexpr(start2))),
9174 mkexpr(new1), mkU8(0)));
9175 } else
9176 store(mkexpr(addr1), mkexpr(new1));
9177 put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
9178 get_counter_w1()));
9179
9180 /* Check for end of field */
9181 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9182 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9183 guest_IA_curr_instr);
9184 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
9185 False);
9186 put_counter_dw0(mkU64(0));
9187}
9188
9189static HChar *
9190s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
9191{
9192 s390_irgen_XONC(Iop_Xor8, length, start1, start2);
9193
9194 return "xc";
9195}
9196
sewardjb63967e2011-03-24 08:50:04 +00009197static void
9198s390_irgen_XC_sameloc(UChar length, UChar b, UShort d)
9199{
9200 IRTemp counter = newTemp(Ity_I32);
9201 IRTemp start = newTemp(Ity_I64);
9202 IRTemp addr = newTemp(Ity_I64);
9203
9204 assign(start,
9205 binop(Iop_Add64, mkU64(d), b != 0 ? get_gpr_dw0(b) : mkU64(0)));
9206
9207 if (length < 8) {
9208 UInt i;
9209
9210 for (i = 0; i <= length; ++i) {
9211 store(binop(Iop_Add64, mkexpr(start), mkU64(i)), mkU8(0));
9212 }
9213 } else {
9214 assign(counter, get_counter_w0());
9215
9216 assign(addr, binop(Iop_Add64, mkexpr(start),
9217 unop(Iop_32Uto64, mkexpr(counter))));
9218
9219 store(mkexpr(addr), mkU8(0));
9220
9221 /* Check for end of field */
9222 put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
9223 if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
9224 guest_IA_curr_instr);
9225
9226 /* Reset counter */
9227 put_counter_dw0(mkU64(0));
9228 }
9229
9230 s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, mkU32(0)), False);
9231
sewardj7ee97522011-05-09 21:45:04 +00009232 if (UNLIKELY(vex_traceflags & VEX_TRACE_FE))
sewardjb63967e2011-03-24 08:50:04 +00009233 s390_disasm(ENC3(MNM, UDLB, UDXB), "xc", d, length, b, d, 0, b);
9234}
9235
sewardj2019a972011-03-07 16:04:07 +00009236static HChar *
9237s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
9238{
9239 s390_irgen_XONC(Iop_And8, length, start1, start2);
9240
9241 return "nc";
9242}
9243
9244static HChar *
9245s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
9246{
9247 s390_irgen_XONC(Iop_Or8, length, start1, start2);
9248
9249 return "oc";
9250}
9251
9252
9253static HChar *
9254s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
9255{
9256 IRTemp counter = newTemp(Ity_I64);
9257
9258 assign(counter, get_counter_dw0());
9259
9260 store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
9261 load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
9262
9263 /* Check for end of field */
9264 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9265 if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
9266 guest_IA_curr_instr);
9267 put_counter_dw0(mkU64(0));
9268
9269 return "mvc";
9270}
9271
9272static HChar *
9273s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
9274{
9275 IRTemp addr1, addr3, addr3_load, len1, len3, single;
9276
9277 addr1 = newTemp(Ity_I64);
9278 addr3 = newTemp(Ity_I64);
9279 addr3_load = newTemp(Ity_I64);
9280 len1 = newTemp(Ity_I64);
9281 len3 = newTemp(Ity_I64);
9282 single = newTemp(Ity_I8);
9283
9284 assign(addr1, get_gpr_dw0(r1));
9285 assign(len1, get_gpr_dw0(r1 + 1));
9286 assign(addr3, get_gpr_dw0(r3));
9287 assign(len3, get_gpr_dw0(r3 + 1));
9288
9289 // len1 == 0 ?
9290 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9291 if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
9292 guest_IA_next_instr);
9293
9294 /* This is a hack to prevent mvcle from reading from addr3 if it
9295 should read from the pad. Since the pad has no address, just
9296 read from the instruction, we discard that anyway */
9297 assign(addr3_load,
9298 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9299 mkU64(0))),
9300 mkexpr(addr3),
9301 mkU64(guest_IA_curr_instr)));
9302
9303 assign(single,
9304 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9305 mkU64(0))),
9306 load(Ity_I8, mkexpr(addr3_load)),
9307 unop(Iop_64to8, mkexpr(pad2))));
9308 store(mkexpr(addr1), mkexpr(single));
9309
9310 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
9311
9312 put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
9313
9314 put_gpr_dw0(r3,
9315 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9316 mkU64(0))),
9317 binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
9318 mkexpr(addr3)));
9319
9320 put_gpr_dw0(r3 + 1,
9321 IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
9322 mkU64(0))),
9323 binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
9324 mkU64(0)));
9325
9326 /* We should set CC=3 (faked by overflow add) and leave after
9327 a maximum of ~4096 bytes have been processed. This is simpler:
9328 we leave whenever (len1 % 4096) == 0 */
9329 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
9330
9331 mktemp(Ity_I64, mkU64(-1ULL)), False);
9332 if_condition_goto(binop(Iop_CmpEQ64,
9333 binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
9334 mkU64(0)),
9335 guest_IA_next_instr);
9336
9337 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
9338 if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
9339 guest_IA_curr_instr);
9340
9341 return "mvcle";
9342}
9343
9344static HChar *
9345s390_irgen_MVST(UChar r1, UChar r2)
9346{
9347 IRTemp addr1 = newTemp(Ity_I64);
9348 IRTemp addr2 = newTemp(Ity_I64);
9349 IRTemp end = newTemp(Ity_I8);
9350 IRTemp byte = newTemp(Ity_I8);
9351 IRTemp counter = newTemp(Ity_I64);
9352
9353 assign(addr1, get_gpr_dw0(r1));
9354 assign(addr2, get_gpr_dw0(r2));
9355 assign(counter, get_counter_dw0());
9356 assign(end, get_gpr_b7(0));
9357 assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
9358 store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
9359
9360 // We use unlimited as cpu-determined number
9361 put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
9362 if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
9363 guest_IA_curr_instr);
9364
9365 // and always set cc=1 at the end + update r1
9366 s390_cc_set(1);
9367 put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
9368 put_counter_dw0(mkU64(0));
9369
9370 return "mvst";
9371}
9372
9373static void
9374s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
9375{
9376 IRTemp op1 = newTemp(Ity_I64);
9377 IRTemp result = newTemp(Ity_I64);
9378
9379 assign(op1, binop(Iop_32HLto64,
9380 get_gpr_w1(r1), // high 32 bits
9381 get_gpr_w1(r1 + 1))); // low 32 bits
9382 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9383 put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
9384 put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
9385}
9386
9387static void
9388s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
9389{
9390 IRTemp op1 = newTemp(Ity_I128);
9391 IRTemp result = newTemp(Ity_I128);
9392
9393 assign(op1, binop(Iop_64HLto128,
9394 get_gpr_dw0(r1), // high 64 bits
9395 get_gpr_dw0(r1 + 1))); // low 64 bits
9396 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9397 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9398 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9399}
9400
9401static void
9402s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
9403{
9404 IRTemp op1 = newTemp(Ity_I64);
9405 IRTemp result = newTemp(Ity_I128);
9406
9407 assign(op1, get_gpr_dw0(r1 + 1));
9408 assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
9409 put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
9410 put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
9411}
9412
9413static HChar *
9414s390_irgen_DR(UChar r1, UChar r2)
9415{
9416 IRTemp op2 = newTemp(Ity_I32);
9417
9418 assign(op2, get_gpr_w1(r2));
9419
9420 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9421
9422 return "dr";
9423}
9424
9425static HChar *
9426s390_irgen_D(UChar r1, IRTemp op2addr)
9427{
9428 IRTemp op2 = newTemp(Ity_I32);
9429
9430 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9431
9432 s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
9433
9434 return "d";
9435}
9436
9437static HChar *
9438s390_irgen_DLR(UChar r1, UChar r2)
9439{
9440 IRTemp op2 = newTemp(Ity_I32);
9441
9442 assign(op2, get_gpr_w1(r2));
9443
9444 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9445
9446 return "dr";
9447}
9448
9449static HChar *
9450s390_irgen_DL(UChar r1, IRTemp op2addr)
9451{
9452 IRTemp op2 = newTemp(Ity_I32);
9453
9454 assign(op2, load(Ity_I32, mkexpr(op2addr)));
9455
9456 s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
9457
9458 return "dl";
9459}
9460
9461static HChar *
9462s390_irgen_DLG(UChar r1, IRTemp op2addr)
9463{
9464 IRTemp op2 = newTemp(Ity_I64);
9465
9466 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9467
9468 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9469
9470 return "dlg";
9471}
9472
9473static HChar *
9474s390_irgen_DLGR(UChar r1, UChar r2)
9475{
9476 IRTemp op2 = newTemp(Ity_I64);
9477
9478 assign(op2, get_gpr_dw0(r2));
9479
9480 s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
9481
9482 return "dlgr";
9483}
9484
9485static HChar *
9486s390_irgen_DSGR(UChar r1, UChar r2)
9487{
9488 IRTemp op2 = newTemp(Ity_I64);
9489
9490 assign(op2, get_gpr_dw0(r2));
9491
9492 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9493
9494 return "dsgr";
9495}
9496
9497static HChar *
9498s390_irgen_DSG(UChar r1, IRTemp op2addr)
9499{
9500 IRTemp op2 = newTemp(Ity_I64);
9501
9502 assign(op2, load(Ity_I64, mkexpr(op2addr)));
9503
9504 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9505
9506 return "dsg";
9507}
9508
9509static HChar *
9510s390_irgen_DSGFR(UChar r1, UChar r2)
9511{
9512 IRTemp op2 = newTemp(Ity_I64);
9513
9514 assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
9515
9516 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9517
9518 return "dsgfr";
9519}
9520
9521static HChar *
9522s390_irgen_DSGF(UChar r1, IRTemp op2addr)
9523{
9524 IRTemp op2 = newTemp(Ity_I64);
9525
9526 assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
9527
9528 s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
9529
9530 return "dsgf";
9531}
9532
9533static void
9534s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9535{
9536 UChar reg;
9537 IRTemp addr = newTemp(Ity_I64);
9538
9539 assign(addr, mkexpr(op2addr));
9540 reg = r1;
9541 do {
9542 IRTemp old = addr;
9543
9544 reg %= 16;
9545 put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
9546 addr = newTemp(Ity_I64);
9547 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9548 reg++;
9549 } while (reg != (r3 + 1));
9550}
9551
9552static HChar *
9553s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
9554{
9555 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9556
9557 return "lam";
9558}
9559
9560static HChar *
9561s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
9562{
9563 s390_irgen_load_ar_multiple(r1, r3, op2addr);
9564
9565 return "lamy";
9566}
9567
9568static void
9569s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
9570{
9571 UChar reg;
9572 IRTemp addr = newTemp(Ity_I64);
9573
9574 assign(addr, mkexpr(op2addr));
9575 reg = r1;
9576 do {
9577 IRTemp old = addr;
9578
9579 reg %= 16;
9580 store(mkexpr(addr), get_ar_w0(reg));
9581 addr = newTemp(Ity_I64);
9582 assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
9583 reg++;
9584 } while (reg != (r3 + 1));
9585}
9586
9587static HChar *
9588s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
9589{
9590 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9591
9592 return "stam";
9593}
9594
9595static HChar *
9596s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
9597{
9598 s390_irgen_store_ar_multiple(r1, r3, op2addr);
9599
9600 return "stamy";
9601}
9602
9603
9604/* Implementation for 32-bit compare-and-swap */
9605static void
9606s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
9607{
9608 IRCAS *cas;
9609 IRTemp op1 = newTemp(Ity_I32);
9610 IRTemp old_mem = newTemp(Ity_I32);
9611 IRTemp op3 = newTemp(Ity_I32);
9612 IRTemp result = newTemp(Ity_I32);
9613 IRTemp nequal = newTemp(Ity_I1);
9614
9615 assign(op1, get_gpr_w1(r1));
9616 assign(op3, get_gpr_w1(r3));
9617
9618 /* The first and second operands are compared. If they are equal,
9619 the third operand is stored at the second- operand location. */
9620 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9621 Iend_BE, mkexpr(op2addr),
9622 NULL, mkexpr(op1), /* expected value */
9623 NULL, mkexpr(op3) /* new value */);
9624 stmt(IRStmt_CAS(cas));
9625
9626 /* Set CC. Operands compared equal -> 0, else 1. */
9627 assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
9628 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9629
9630 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9631 Otherwise, store the old_value from memory in r1 and yield. */
9632 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9633 put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9634 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9635 IRConst_U64(guest_IA_next_instr)));
9636}
9637
9638static HChar *
9639s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
9640{
9641 s390_irgen_cas_32(r1, r3, op2addr);
9642
9643 return "cs";
9644}
9645
9646static HChar *
9647s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
9648{
9649 s390_irgen_cas_32(r1, r3, op2addr);
9650
9651 return "csy";
9652}
9653
9654static HChar *
9655s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
9656{
9657 IRCAS *cas;
9658 IRTemp op1 = newTemp(Ity_I64);
9659 IRTemp old_mem = newTemp(Ity_I64);
9660 IRTemp op3 = newTemp(Ity_I64);
9661 IRTemp result = newTemp(Ity_I64);
9662 IRTemp nequal = newTemp(Ity_I1);
9663
9664 assign(op1, get_gpr_dw0(r1));
9665 assign(op3, get_gpr_dw0(r3));
9666
9667 /* The first and second operands are compared. If they are equal,
9668 the third operand is stored at the second- operand location. */
9669 cas = mkIRCAS(IRTemp_INVALID, old_mem,
9670 Iend_BE, mkexpr(op2addr),
9671 NULL, mkexpr(op1), /* expected value */
9672 NULL, mkexpr(op3) /* new value */);
9673 stmt(IRStmt_CAS(cas));
9674
9675 /* Set CC. Operands compared equal -> 0, else 1. */
9676 assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
9677 s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
9678
9679 /* If operands were equal (cc == 0) just store the old value op1 in r1.
9680 Otherwise, store the old_value from memory in r1 and yield. */
9681 assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
9682 put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
9683 stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
9684 IRConst_U64(guest_IA_next_instr)));
9685
9686 return "csg";
9687}
9688
9689
9690/* Binary floating point */
9691
9692static HChar *
9693s390_irgen_AXBR(UChar r1, UChar r2)
9694{
9695 IRTemp op1 = newTemp(Ity_F128);
9696 IRTemp op2 = newTemp(Ity_F128);
9697 IRTemp result = newTemp(Ity_F128);
9698
9699 assign(op1, get_fpr_pair(r1));
9700 assign(op2, get_fpr_pair(r2));
9701 assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9702 mkexpr(op2)));
9703 put_fpr_pair(r1, mkexpr(result));
9704
9705 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9706
9707 return "axbr";
9708}
9709
9710/* The result of a Iop_CmdFxx operation is a condition code. It is
9711 encoded using the values defined in type IRCmpFxxResult.
9712 Before we can store the condition code into the guest state (or do
9713 anything else with it for that matter) we need to convert it to
9714 the encoding that s390 uses. This is what this function does.
9715
9716 s390 VEX b6 b2 b0 cc.1 cc.0
9717 0 0x40 EQ 1 0 0 0 0
9718 1 0x01 LT 0 0 1 0 1
9719 2 0x00 GT 0 0 0 1 0
9720 3 0x45 Unordered 1 1 1 1 1
9721
9722 The following bits from the VEX encoding are interesting:
9723 b0, b2, b6 with b0 being the LSB. We observe:
9724
9725 cc.0 = b0;
9726 cc.1 = b2 | (~b0 & ~b6)
9727
9728 with cc being the s390 condition code.
9729*/
9730static IRExpr *
9731convert_vex_fpcc_to_s390(IRTemp vex_cc)
9732{
9733 IRTemp cc0 = newTemp(Ity_I32);
9734 IRTemp cc1 = newTemp(Ity_I32);
9735 IRTemp b0 = newTemp(Ity_I32);
9736 IRTemp b2 = newTemp(Ity_I32);
9737 IRTemp b6 = newTemp(Ity_I32);
9738
9739 assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
9740 assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
9741 mkU32(1)));
9742 assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
9743 mkU32(1)));
9744
9745 assign(cc0, mkexpr(b0));
9746 assign(cc1, binop(Iop_Or32, mkexpr(b2),
9747 binop(Iop_And32,
9748 binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
9749 binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
9750 )));
9751
9752 return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
9753}
9754
9755static HChar *
9756s390_irgen_CEBR(UChar r1, UChar r2)
9757{
9758 IRTemp op1 = newTemp(Ity_F32);
9759 IRTemp op2 = newTemp(Ity_F32);
9760 IRTemp cc_vex = newTemp(Ity_I32);
9761 IRTemp cc_s390 = newTemp(Ity_I32);
9762
9763 assign(op1, get_fpr_w0(r1));
9764 assign(op2, get_fpr_w0(r2));
9765 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9766
9767 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9768 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9769
9770 return "cebr";
9771}
9772
9773static HChar *
9774s390_irgen_CDBR(UChar r1, UChar r2)
9775{
9776 IRTemp op1 = newTemp(Ity_F64);
9777 IRTemp op2 = newTemp(Ity_F64);
9778 IRTemp cc_vex = newTemp(Ity_I32);
9779 IRTemp cc_s390 = newTemp(Ity_I32);
9780
9781 assign(op1, get_fpr_dw0(r1));
9782 assign(op2, get_fpr_dw0(r2));
9783 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9784
9785 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9786 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9787
9788 return "cdbr";
9789}
9790
9791static HChar *
9792s390_irgen_CXBR(UChar r1, UChar r2)
9793{
9794 IRTemp op1 = newTemp(Ity_F128);
9795 IRTemp op2 = newTemp(Ity_F128);
9796 IRTemp cc_vex = newTemp(Ity_I32);
9797 IRTemp cc_s390 = newTemp(Ity_I32);
9798
9799 assign(op1, get_fpr_pair(r1));
9800 assign(op2, get_fpr_pair(r2));
9801 assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
9802
9803 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9804 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9805
9806 return "cxbr";
9807}
9808
9809static HChar *
9810s390_irgen_CEB(UChar r1, IRTemp op2addr)
9811{
9812 IRTemp op1 = newTemp(Ity_F32);
9813 IRTemp op2 = newTemp(Ity_F32);
9814 IRTemp cc_vex = newTemp(Ity_I32);
9815 IRTemp cc_s390 = newTemp(Ity_I32);
9816
9817 assign(op1, get_fpr_w0(r1));
9818 assign(op2, load(Ity_F32, mkexpr(op2addr)));
9819 assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
9820
9821 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9822 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9823
9824 return "ceb";
9825}
9826
9827static HChar *
9828s390_irgen_CDB(UChar r1, IRTemp op2addr)
9829{
9830 IRTemp op1 = newTemp(Ity_F64);
9831 IRTemp op2 = newTemp(Ity_F64);
9832 IRTemp cc_vex = newTemp(Ity_I32);
9833 IRTemp cc_s390 = newTemp(Ity_I32);
9834
9835 assign(op1, get_fpr_dw0(r1));
9836 assign(op2, load(Ity_F64, mkexpr(op2addr)));
9837 assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
9838
9839 assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
9840 s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
9841
9842 return "cdb";
9843}
9844
9845static HChar *
9846s390_irgen_CXFBR(UChar r1, UChar r2)
9847{
9848 IRTemp op2 = newTemp(Ity_I32);
9849
9850 assign(op2, get_gpr_w1(r2));
9851 put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
9852
9853 return "cxfbr";
9854}
9855
9856static HChar *
9857s390_irgen_CXGBR(UChar r1, UChar r2)
9858{
9859 IRTemp op2 = newTemp(Ity_I64);
9860
9861 assign(op2, get_gpr_dw0(r2));
9862 put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
9863
9864 return "cxgbr";
9865}
9866
9867static HChar *
9868s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
9869{
9870 IRTemp op = newTemp(Ity_F128);
9871 IRTemp result = newTemp(Ity_I32);
9872
9873 assign(op, get_fpr_pair(r2));
9874 assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
9875 mkexpr(op)));
9876 put_gpr_w1(r1, mkexpr(result));
9877 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
9878
9879 return "cfxbr";
9880}
9881
9882static HChar *
9883s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
9884{
9885 IRTemp op = newTemp(Ity_F128);
9886 IRTemp result = newTemp(Ity_I64);
9887
9888 assign(op, get_fpr_pair(r2));
9889 assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
9890 mkexpr(op)));
9891 put_gpr_dw0(r1, mkexpr(result));
9892 s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
9893
9894 return "cgxbr";
9895}
9896
9897static HChar *
9898s390_irgen_DXBR(UChar r1, UChar r2)
9899{
9900 IRTemp op1 = newTemp(Ity_F128);
9901 IRTemp op2 = newTemp(Ity_F128);
9902 IRTemp result = newTemp(Ity_F128);
9903
9904 assign(op1, get_fpr_pair(r1));
9905 assign(op2, get_fpr_pair(r2));
9906 assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
9907 mkexpr(op2)));
9908 put_fpr_pair(r1, mkexpr(result));
9909
9910 return "dxbr";
9911}
9912
9913static HChar *
9914s390_irgen_LTXBR(UChar r1, UChar r2)
9915{
9916 IRTemp result = newTemp(Ity_F128);
9917
9918 assign(result, get_fpr_pair(r2));
9919 put_fpr_pair(r1, mkexpr(result));
9920 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9921
9922 return "ltxbr";
9923}
9924
9925static HChar *
9926s390_irgen_LCXBR(UChar r1, UChar r2)
9927{
9928 IRTemp result = newTemp(Ity_F128);
9929
9930 assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
9931 put_fpr_pair(r1, mkexpr(result));
9932 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
9933
9934 return "lcxbr";
9935}
9936
9937static HChar *
9938s390_irgen_LXDBR(UChar r1, UChar r2)
9939{
9940 IRTemp op = newTemp(Ity_F64);
9941
9942 assign(op, get_fpr_dw0(r2));
9943 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9944
9945 return "lxdbr";
9946}
9947
9948static HChar *
9949s390_irgen_LXEBR(UChar r1, UChar r2)
9950{
9951 IRTemp op = newTemp(Ity_F32);
9952
9953 assign(op, get_fpr_w0(r2));
9954 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9955
9956 return "lxebr";
9957}
9958
9959static HChar *
9960s390_irgen_LXDB(UChar r1, IRTemp op2addr)
9961{
9962 IRTemp op = newTemp(Ity_F64);
9963
9964 assign(op, load(Ity_F64, mkexpr(op2addr)));
9965 put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
9966
9967 return "lxdb";
9968}
9969
9970static HChar *
9971s390_irgen_LXEB(UChar r1, IRTemp op2addr)
9972{
9973 IRTemp op = newTemp(Ity_F32);
9974
9975 assign(op, load(Ity_F32, mkexpr(op2addr)));
9976 put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
9977
9978 return "lxeb";
9979}
9980
9981static HChar *
9982s390_irgen_LNEBR(UChar r1, UChar r2)
9983{
9984 IRTemp result = newTemp(Ity_F32);
9985
9986 assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
9987 put_fpr_w0(r1, mkexpr(result));
9988 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
9989
9990 return "lnebr";
9991}
9992
9993static HChar *
9994s390_irgen_LNDBR(UChar r1, UChar r2)
9995{
9996 IRTemp result = newTemp(Ity_F64);
9997
9998 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
9999 put_fpr_dw0(r1, mkexpr(result));
10000 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10001
10002 return "lndbr";
10003}
10004
10005static HChar *
10006s390_irgen_LNXBR(UChar r1, UChar r2)
10007{
10008 IRTemp result = newTemp(Ity_F128);
10009
10010 assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
10011 put_fpr_pair(r1, mkexpr(result));
10012 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10013
10014 return "lnxbr";
10015}
10016
10017static HChar *
10018s390_irgen_LPEBR(UChar r1, UChar r2)
10019{
10020 IRTemp result = newTemp(Ity_F32);
10021
10022 assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
10023 put_fpr_w0(r1, mkexpr(result));
10024 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
10025
10026 return "lpebr";
10027}
10028
10029static HChar *
10030s390_irgen_LPDBR(UChar r1, UChar r2)
10031{
10032 IRTemp result = newTemp(Ity_F64);
10033
10034 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10035 put_fpr_dw0(r1, mkexpr(result));
10036 s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
10037
10038 return "lpdbr";
10039}
10040
10041static HChar *
10042s390_irgen_LPXBR(UChar r1, UChar r2)
10043{
10044 IRTemp result = newTemp(Ity_F128);
10045
10046 assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
10047 put_fpr_pair(r1, mkexpr(result));
10048 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10049
10050 return "lpxbr";
10051}
10052
10053static HChar *
10054s390_irgen_LDXBR(UChar r1, UChar r2)
10055{
10056 IRTemp result = newTemp(Ity_F64);
10057
10058 assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10059 put_fpr_dw0(r1, mkexpr(result));
10060
10061 return "ldxbr";
10062}
10063
10064static HChar *
10065s390_irgen_LEXBR(UChar r1, UChar r2)
10066{
10067 IRTemp result = newTemp(Ity_F32);
10068
10069 assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10070 put_fpr_w0(r1, mkexpr(result));
10071
10072 return "lexbr";
10073}
10074
10075static HChar *
10076s390_irgen_MXBR(UChar r1, UChar r2)
10077{
10078 IRTemp op1 = newTemp(Ity_F128);
10079 IRTemp op2 = newTemp(Ity_F128);
10080 IRTemp result = newTemp(Ity_F128);
10081
10082 assign(op1, get_fpr_pair(r1));
10083 assign(op2, get_fpr_pair(r2));
10084 assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10085 mkexpr(op2)));
10086 put_fpr_pair(r1, mkexpr(result));
10087
10088 return "mxbr";
10089}
10090
10091static HChar *
10092s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
10093{
10094 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10095 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10096
10097 return "maebr";
10098}
10099
10100static HChar *
10101s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
10102{
10103 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10104 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10105
10106 return "madbr";
10107}
10108
10109static HChar *
10110s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
10111{
10112 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10113
10114 put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
10115 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10116
10117 return "maeb";
10118}
10119
10120static HChar *
10121s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
10122{
10123 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10124
10125 put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
10126 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10127
10128 return "madb";
10129}
10130
10131static HChar *
10132s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
10133{
10134 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10135 get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
10136
10137 return "msebr";
10138}
10139
10140static HChar *
10141s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
10142{
10143 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10144 get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
10145
10146 return "msdbr";
10147}
10148
10149static HChar *
10150s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
10151{
10152 IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
10153
10154 put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
10155 get_fpr_w0(r1), op2, get_fpr_w0(r3)));
10156
10157 return "mseb";
10158}
10159
10160static HChar *
10161s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
10162{
10163 IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
10164
10165 put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
10166 get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
10167
10168 return "msdb";
10169}
10170
10171static HChar *
10172s390_irgen_SQEBR(UChar r1, UChar r2)
10173{
10174 IRTemp result = newTemp(Ity_F32);
10175
10176 assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
10177 put_fpr_w0(r1, mkexpr(result));
10178
10179 return "sqebr";
10180}
10181
10182static HChar *
10183s390_irgen_SQDBR(UChar r1, UChar r2)
10184{
10185 IRTemp result = newTemp(Ity_F64);
10186
10187 assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
10188 put_fpr_dw0(r1, mkexpr(result));
10189
10190 return "sqdbr";
10191}
10192
10193static HChar *
10194s390_irgen_SQXBR(UChar r1, UChar r2)
10195{
10196 IRTemp result = newTemp(Ity_F128);
10197
10198 assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
10199 put_fpr_pair(r1, mkexpr(result));
10200
10201 return "sqxbr";
10202}
10203
10204static HChar *
10205s390_irgen_SQEB(UChar r1, IRTemp op2addr)
10206{
10207 IRTemp op = newTemp(Ity_F32);
10208
10209 assign(op, load(Ity_F32, mkexpr(op2addr)));
10210 put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
10211
10212 return "sqeb";
10213}
10214
10215static HChar *
10216s390_irgen_SQDB(UChar r1, IRTemp op2addr)
10217{
10218 IRTemp op = newTemp(Ity_F64);
10219
10220 assign(op, load(Ity_F64, mkexpr(op2addr)));
10221 put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
10222
10223 return "sqdb";
10224}
10225
10226static HChar *
10227s390_irgen_SXBR(UChar r1, UChar r2)
10228{
10229 IRTemp op1 = newTemp(Ity_F128);
10230 IRTemp op2 = newTemp(Ity_F128);
10231 IRTemp result = newTemp(Ity_F128);
10232
10233 assign(op1, get_fpr_pair(r1));
10234 assign(op2, get_fpr_pair(r2));
10235 assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
10236 mkexpr(op2)));
10237 put_fpr_pair(r1, mkexpr(result));
10238 s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
10239
10240 return "sxbr";
10241}
10242
10243static HChar *
10244s390_irgen_TCEB(UChar r1, IRTemp op2addr)
10245{
10246 IRTemp value = newTemp(Ity_F32);
10247
10248 assign(value, get_fpr_w0(r1));
10249
10250 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
10251
10252 return "tceb";
10253}
10254
10255static HChar *
10256s390_irgen_TCDB(UChar r1, IRTemp op2addr)
10257{
10258 IRTemp value = newTemp(Ity_F64);
10259
10260 assign(value, get_fpr_dw0(r1));
10261
10262 s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
10263
10264 return "tcdb";
10265}
10266
10267static HChar *
10268s390_irgen_TCXB(UChar r1, IRTemp op2addr)
10269{
10270 IRTemp value = newTemp(Ity_F128);
10271
10272 assign(value, get_fpr_pair(r1));
10273
10274 s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
10275
10276 return "tcxb";
10277}
10278
10279static HChar *
10280s390_irgen_LCDFR(UChar r1, UChar r2)
10281{
10282 IRTemp result = newTemp(Ity_F64);
10283
10284 assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
10285 put_fpr_dw0(r1, mkexpr(result));
10286
10287 return "lcdfr";
10288}
10289
10290static HChar *
10291s390_irgen_LNDFR(UChar r1, UChar r2)
10292{
10293 IRTemp result = newTemp(Ity_F64);
10294
10295 assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
10296 put_fpr_dw0(r1, mkexpr(result));
10297
10298 return "lndfr";
10299}
10300
10301static HChar *
10302s390_irgen_LPDFR(UChar r1, UChar r2)
10303{
10304 IRTemp result = newTemp(Ity_F64);
10305
10306 assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
10307 put_fpr_dw0(r1, mkexpr(result));
10308
10309 return "lpdfr";
10310}
10311
10312static HChar *
10313s390_irgen_LDGR(UChar r1, UChar r2)
10314{
10315 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
10316
10317 return "ldgr";
10318}
10319
10320static HChar *
10321s390_irgen_LGDR(UChar r1, UChar r2)
10322{
10323 put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
10324
10325 return "lgdr";
10326}
10327
10328
10329static HChar *
10330s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
10331{
10332 IRTemp sign = newTemp(Ity_I64);
10333 IRTemp value = newTemp(Ity_I64);
10334
10335 assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
10336 mkU64(1ULL << 63)));
10337 assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
10338 mkU64((1ULL << 63) - 1)));
10339 put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
10340 mkexpr(sign))));
10341
10342 return "cpsdr";
10343}
10344
10345
10346static UInt
10347s390_do_cvb(ULong decimal)
10348{
10349#if defined(VGA_s390x)
10350 UInt binary;
10351
10352 __asm__ volatile (
10353 "cvb %[result],%[input]\n\t"
10354 : [result] "=d"(binary)
10355 : [input] "m"(decimal)
10356 );
10357
10358 return binary;
10359#else
10360 return 0;
10361#endif
10362}
10363
10364static IRExpr *
10365s390_call_cvb(IRExpr *in)
10366{
10367 IRExpr **args, *call;
10368
10369 args = mkIRExprVec_1(in);
10370 call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
10371 "s390_do_cvb", &s390_do_cvb, args);
10372
10373 /* Nothing is excluded from definedness checking. */
10374 call->Iex.CCall.cee->mcx_mask = 0;
10375
10376 return call;
10377}
10378
10379static HChar *
10380s390_irgen_CVB(UChar r1, IRTemp op2addr)
10381{
10382 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10383
10384 return "cvb";
10385}
10386
10387static HChar *
10388s390_irgen_CVBY(UChar r1, IRTemp op2addr)
10389{
10390 put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
10391
10392 return "cvby";
10393}
10394
10395
10396static ULong
10397s390_do_cvd(ULong binary_in)
10398{
10399#if defined(VGA_s390x)
10400 UInt binary = binary_in & 0xffffffffULL;
10401 ULong decimal;
10402
10403 __asm__ volatile (
10404 "cvd %[input],%[result]\n\t"
10405 : [result] "=m"(decimal)
10406 : [input] "d"(binary)
10407 );
10408
10409 return decimal;
10410#else
10411 return 0;
10412#endif
10413}
10414
10415static IRExpr *
10416s390_call_cvd(IRExpr *in)
10417{
10418 IRExpr **args, *call;
10419
10420 args = mkIRExprVec_1(in);
10421 call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
10422 "s390_do_cvd", &s390_do_cvd, args);
10423
10424 /* Nothing is excluded from definedness checking. */
10425 call->Iex.CCall.cee->mcx_mask = 0;
10426
10427 return call;
10428}
10429
10430static HChar *
10431s390_irgen_CVD(UChar r1, IRTemp op2addr)
10432{
10433 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10434
10435 return "cvd";
10436}
10437
10438static HChar *
10439s390_irgen_CVDY(UChar r1, IRTemp op2addr)
10440{
10441 store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
10442
10443 return "cvdy";
10444}
10445
10446static HChar *
10447s390_irgen_FLOGR(UChar r1, UChar r2)
10448{
10449 IRTemp input = newTemp(Ity_I64);
10450 IRTemp not_zero = newTemp(Ity_I64);
10451 IRTemp tmpnum = newTemp(Ity_I64);
10452 IRTemp num = newTemp(Ity_I64);
10453 IRTemp shift_amount = newTemp(Ity_I8);
10454
10455 /* We use the "count leading zeroes" operator because the number of
10456 leading zeroes is identical with the bit position of the first '1' bit.
10457 However, that operator does not work when the input value is zero.
10458 Therefore, we set the LSB of the input value to 1 and use Clz64 on
10459 the modified value. If input == 0, then the result is 64. Otherwise,
10460 the result of Clz64 is what we want. */
10461
10462 assign(input, get_gpr_dw0(r2));
10463 assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
10464 assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
10465
10466 /* num = (input == 0) ? 64 : tmpnum */
10467 assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
10468 /* == 0 */ mkU64(64),
10469 /* != 0 */ mkexpr(tmpnum)));
10470
10471 put_gpr_dw0(r1, mkexpr(num));
10472
10473 /* Set the leftmost '1' bit of the input value to zero. The general scheme
10474 is to first shift the input value by NUM + 1 bits to the left which
10475 causes the leftmost '1' bit to disappear. Then we shift logically to
10476 the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
10477 Iop_Shr64 are undefined if the shift-amount is greater than or equal to
10478 the width of the value-to-be-shifted, we need to special case
10479 NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
10480 For both such INPUT values the result will be 0. */
10481
10482 assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
10483 mkU64(1))));
10484
10485 put_gpr_dw0(r1 + 1,
10486 mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
10487 /* == 0 || == 1*/ mkU64(0),
10488 /* otherwise */
10489 binop(Iop_Shr64,
10490 binop(Iop_Shl64, mkexpr(input),
10491 mkexpr(shift_amount)),
10492 mkexpr(shift_amount))));
10493
10494 /* Compare the original value as an unsigned integer with 0. */
10495 s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
10496 mktemp(Ity_I64, mkU64(0)), False);
10497
10498 return "flogr";
10499}
10500
sewardj1e5fea62011-05-17 16:18:36 +000010501static HChar *
10502s390_irgen_STCK(IRTemp op2addr)
10503{
10504 IRDirty *d;
10505 IRTemp cc = newTemp(Ity_I64);
10506
10507 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCK",
10508 &s390x_dirtyhelper_STCK,
10509 mkIRExprVec_1(mkexpr(op2addr)));
10510 d->mFx = Ifx_Write;
10511 d->mAddr = mkexpr(op2addr);
10512 d->mSize = 8;
10513 stmt(IRStmt_Dirty(d));
10514 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10515 mkexpr(cc), mkU64(0), mkU64(0));
10516 return "stck";
10517}
10518
10519static HChar *
10520s390_irgen_STCKF(IRTemp op2addr)
10521{
10522 IRDirty *d;
10523 IRTemp cc = newTemp(Ity_I64);
10524
10525 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKF",
10526 &s390x_dirtyhelper_STCKF,
10527 mkIRExprVec_1(mkexpr(op2addr)));
10528 d->mFx = Ifx_Write;
10529 d->mAddr = mkexpr(op2addr);
10530 d->mSize = 8;
10531 stmt(IRStmt_Dirty(d));
10532 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10533 mkexpr(cc), mkU64(0), mkU64(0));
10534 return "stckf";
10535}
10536
10537static HChar *
10538s390_irgen_STCKE(IRTemp op2addr)
10539{
10540 IRDirty *d;
10541 IRTemp cc = newTemp(Ity_I64);
10542
10543 d = unsafeIRDirty_1_N(cc, 0, "s390x_dirtyhelper_STCKE",
10544 &s390x_dirtyhelper_STCKE,
10545 mkIRExprVec_1(mkexpr(op2addr)));
10546 d->mFx = Ifx_Write;
10547 d->mAddr = mkexpr(op2addr);
10548 d->mSize = 16;
10549 stmt(IRStmt_Dirty(d));
10550 s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
10551 mkexpr(cc), mkU64(0), mkU64(0));
10552 return "stcke";
10553}
10554
sewardj2019a972011-03-07 16:04:07 +000010555/*------------------------------------------------------------*/
10556/*--- Build IR for special instructions ---*/
10557/*------------------------------------------------------------*/
10558
10559void
10560s390_irgen_client_request(void)
10561{
10562 if (0)
10563 vex_printf("%%R3 = client_request ( %%R2 )\n");
10564
10565 irsb->next = mkU64((ULong)(guest_IA_curr_instr
10566 + S390_SPECIAL_OP_PREAMBLE_SIZE
10567 + S390_SPECIAL_OP_SIZE));
10568 irsb->jumpkind = Ijk_ClientReq;
10569
10570 dis_res->whatNext = Dis_StopHere;
10571}
10572
10573void
10574s390_irgen_guest_NRADDR(void)
10575{
10576 if (0)
10577 vex_printf("%%R3 = guest_NRADDR\n");
10578
10579 put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64));
10580}
10581
10582void
10583s390_irgen_call_noredir(void)
10584{
10585 /* Continue after special op */
10586 put_gpr_dw0(14, mkU64(guest_IA_curr_instr
10587 + S390_SPECIAL_OP_PREAMBLE_SIZE
10588 + S390_SPECIAL_OP_SIZE));
10589
10590 /* The address is in REG1, all parameters are in the right (guest) places */
10591 irsb->next = get_gpr_dw0(1);
10592 irsb->jumpkind = Ijk_NoRedir;
10593
10594 dis_res->whatNext = Dis_StopHere;
10595}
10596
10597/* Force proper alignment for the structures below. */
10598#pragma pack(1)
10599
10600
10601static s390_decode_t
10602s390_decode_2byte_and_irgen(UChar *bytes)
10603{
10604 typedef union {
10605 struct {
10606 unsigned int op : 16;
10607 } E;
10608 struct {
10609 unsigned int op : 8;
10610 unsigned int i : 8;
10611 } I;
10612 struct {
10613 unsigned int op : 8;
10614 unsigned int r1 : 4;
10615 unsigned int r2 : 4;
10616 } RR;
10617 } formats;
10618 union {
10619 formats fmt;
10620 UShort value;
10621 } ovl;
10622
10623 vassert(sizeof(formats) == 2);
10624
10625 ((char *)(&ovl.value))[0] = bytes[0];
10626 ((char *)(&ovl.value))[1] = bytes[1];
10627
10628 switch (ovl.value & 0xffff) {
10629 case 0x0101: /* PR */ goto unimplemented;
10630 case 0x0102: /* UPT */ goto unimplemented;
10631 case 0x0104: /* PTFF */ goto unimplemented;
10632 case 0x0107: /* SCKPF */ goto unimplemented;
10633 case 0x010a: /* PFPO */ goto unimplemented;
10634 case 0x010b: /* TAM */ goto unimplemented;
10635 case 0x010c: /* SAM24 */ goto unimplemented;
10636 case 0x010d: /* SAM31 */ goto unimplemented;
10637 case 0x010e: /* SAM64 */ goto unimplemented;
10638 case 0x01ff: /* TRAP2 */ goto unimplemented;
10639 }
10640
10641 switch ((ovl.value & 0xff00) >> 8) {
10642 case 0x04: /* SPM */ goto unimplemented;
10643 case 0x05: /* BALR */ goto unimplemented;
10644 case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10645 goto ok;
10646 case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10647 goto ok;
10648 case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
10649 case 0x0b: /* BSM */ goto unimplemented;
10650 case 0x0c: /* BASSM */ goto unimplemented;
10651 case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10652 goto ok;
10653 case 0x0e: /* MVCL */ goto unimplemented;
10654 case 0x0f: /* CLCL */ goto unimplemented;
10655 case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10656 goto ok;
10657 case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10658 goto ok;
10659 case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10660 goto ok;
10661 case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10662 goto ok;
10663 case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10664 goto ok;
10665 case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10666 goto ok;
10667 case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10668 goto ok;
10669 case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10670 goto ok;
10671 case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10672 goto ok;
10673 case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10674 goto ok;
10675 case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10676 goto ok;
10677 case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10678 goto ok;
10679 case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10680 goto ok;
10681 case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10682 goto ok;
10683 case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10684 goto ok;
10685 case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10686 goto ok;
10687 case 0x20: /* LPDR */ goto unimplemented;
10688 case 0x21: /* LNDR */ goto unimplemented;
10689 case 0x22: /* LTDR */ goto unimplemented;
10690 case 0x23: /* LCDR */ goto unimplemented;
10691 case 0x24: /* HDR */ goto unimplemented;
10692 case 0x25: /* LDXR */ goto unimplemented;
10693 case 0x26: /* MXR */ goto unimplemented;
10694 case 0x27: /* MXDR */ goto unimplemented;
10695 case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10696 goto ok;
10697 case 0x29: /* CDR */ goto unimplemented;
10698 case 0x2a: /* ADR */ goto unimplemented;
10699 case 0x2b: /* SDR */ goto unimplemented;
10700 case 0x2c: /* MDR */ goto unimplemented;
10701 case 0x2d: /* DDR */ goto unimplemented;
10702 case 0x2e: /* AWR */ goto unimplemented;
10703 case 0x2f: /* SWR */ goto unimplemented;
10704 case 0x30: /* LPER */ goto unimplemented;
10705 case 0x31: /* LNER */ goto unimplemented;
10706 case 0x32: /* LTER */ goto unimplemented;
10707 case 0x33: /* LCER */ goto unimplemented;
10708 case 0x34: /* HER */ goto unimplemented;
10709 case 0x35: /* LEDR */ goto unimplemented;
10710 case 0x36: /* AXR */ goto unimplemented;
10711 case 0x37: /* SXR */ goto unimplemented;
10712 case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
10713 goto ok;
10714 case 0x39: /* CER */ goto unimplemented;
10715 case 0x3a: /* AER */ goto unimplemented;
10716 case 0x3b: /* SER */ goto unimplemented;
10717 case 0x3c: /* MDER */ goto unimplemented;
10718 case 0x3d: /* DER */ goto unimplemented;
10719 case 0x3e: /* AUR */ goto unimplemented;
10720 case 0x3f: /* SUR */ goto unimplemented;
10721 }
10722
10723 return S390_DECODE_UNKNOWN_INSN;
10724
10725ok:
10726 return S390_DECODE_OK;
10727
10728unimplemented:
10729 return S390_DECODE_UNIMPLEMENTED_INSN;
10730}
10731
10732static s390_decode_t
10733s390_decode_4byte_and_irgen(UChar *bytes)
10734{
10735 typedef union {
10736 struct {
10737 unsigned int op1 : 8;
10738 unsigned int r1 : 4;
10739 unsigned int op2 : 4;
10740 unsigned int i2 : 16;
10741 } RI;
10742 struct {
10743 unsigned int op : 16;
10744 unsigned int : 8;
10745 unsigned int r1 : 4;
10746 unsigned int r2 : 4;
10747 } RRE;
10748 struct {
10749 unsigned int op : 16;
10750 unsigned int r1 : 4;
10751 unsigned int : 4;
10752 unsigned int r3 : 4;
10753 unsigned int r2 : 4;
10754 } RRF;
10755 struct {
10756 unsigned int op : 16;
10757 unsigned int r3 : 4;
10758 unsigned int m4 : 4;
10759 unsigned int r1 : 4;
10760 unsigned int r2 : 4;
10761 } RRF2;
10762 struct {
10763 unsigned int op : 16;
10764 unsigned int r3 : 4;
10765 unsigned int : 4;
10766 unsigned int r1 : 4;
10767 unsigned int r2 : 4;
10768 } RRF3;
10769 struct {
10770 unsigned int op : 16;
10771 unsigned int r3 : 4;
10772 unsigned int : 4;
10773 unsigned int r1 : 4;
10774 unsigned int r2 : 4;
10775 } RRR;
10776 struct {
10777 unsigned int op : 16;
10778 unsigned int r3 : 4;
10779 unsigned int : 4;
10780 unsigned int r1 : 4;
10781 unsigned int r2 : 4;
10782 } RRF4;
10783 struct {
10784 unsigned int op : 8;
10785 unsigned int r1 : 4;
10786 unsigned int r3 : 4;
10787 unsigned int b2 : 4;
10788 unsigned int d2 : 12;
10789 } RS;
10790 struct {
10791 unsigned int op : 8;
10792 unsigned int r1 : 4;
10793 unsigned int r3 : 4;
10794 unsigned int i2 : 16;
10795 } RSI;
10796 struct {
10797 unsigned int op : 8;
10798 unsigned int r1 : 4;
10799 unsigned int x2 : 4;
10800 unsigned int b2 : 4;
10801 unsigned int d2 : 12;
10802 } RX;
10803 struct {
10804 unsigned int op : 16;
10805 unsigned int b2 : 4;
10806 unsigned int d2 : 12;
10807 } S;
10808 struct {
10809 unsigned int op : 8;
10810 unsigned int i2 : 8;
10811 unsigned int b1 : 4;
10812 unsigned int d1 : 12;
10813 } SI;
10814 } formats;
10815 union {
10816 formats fmt;
10817 UInt value;
10818 } ovl;
10819
10820 vassert(sizeof(formats) == 4);
10821
10822 ((char *)(&ovl.value))[0] = bytes[0];
10823 ((char *)(&ovl.value))[1] = bytes[1];
10824 ((char *)(&ovl.value))[2] = bytes[2];
10825 ((char *)(&ovl.value))[3] = bytes[3];
10826
10827 switch ((ovl.value & 0xff0f0000) >> 16) {
10828 case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
10829 ovl.fmt.RI.i2); goto ok;
10830 case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
10831 ovl.fmt.RI.i2); goto ok;
10832 case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
10833 ovl.fmt.RI.i2); goto ok;
10834 case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
10835 ovl.fmt.RI.i2); goto ok;
10836 case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
10837 ovl.fmt.RI.i2); goto ok;
10838 case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
10839 ovl.fmt.RI.i2); goto ok;
10840 case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
10841 ovl.fmt.RI.i2); goto ok;
10842 case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
10843 ovl.fmt.RI.i2); goto ok;
10844 case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
10845 ovl.fmt.RI.i2); goto ok;
10846 case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
10847 ovl.fmt.RI.i2); goto ok;
10848 case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
10849 ovl.fmt.RI.i2); goto ok;
10850 case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
10851 ovl.fmt.RI.i2); goto ok;
10852 case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
10853 ovl.fmt.RI.i2); goto ok;
10854 case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
10855 ovl.fmt.RI.i2); goto ok;
10856 case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
10857 ovl.fmt.RI.i2); goto ok;
10858 case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
10859 ovl.fmt.RI.i2); goto ok;
10860 case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
10861 ovl.fmt.RI.i2); goto ok;
10862 case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
10863 ovl.fmt.RI.i2); goto ok;
10864 case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
10865 ovl.fmt.RI.i2); goto ok;
10866 case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
10867 ovl.fmt.RI.i2); goto ok;
10868 case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10869 goto ok;
10870 case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
10871 ovl.fmt.RI.i2); goto ok;
10872 case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
10873 ovl.fmt.RI.i2); goto ok;
10874 case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
10875 ovl.fmt.RI.i2); goto ok;
10876 case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10877 goto ok;
10878 case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
10879 ovl.fmt.RI.i2); goto ok;
10880 case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10881 goto ok;
10882 case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
10883 ovl.fmt.RI.i2); goto ok;
10884 case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10885 goto ok;
10886 case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
10887 ovl.fmt.RI.i2); goto ok;
10888 case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
10889 goto ok;
10890 case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
10891 ovl.fmt.RI.i2); goto ok;
10892 }
10893
10894 switch ((ovl.value & 0xffff0000) >> 16) {
10895 case 0x8000: /* SSM */ goto unimplemented;
10896 case 0x8200: /* LPSW */ goto unimplemented;
10897 case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
10898 goto ok;
10899 case 0xb202: /* STIDP */ goto unimplemented;
10900 case 0xb204: /* SCK */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010901 case 0xb205: s390_format_S_RD(s390_irgen_STCK, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010902 case 0xb206: /* SCKC */ goto unimplemented;
10903 case 0xb207: /* STCKC */ goto unimplemented;
10904 case 0xb208: /* SPT */ goto unimplemented;
10905 case 0xb209: /* STPT */ goto unimplemented;
10906 case 0xb20a: /* SPKA */ goto unimplemented;
10907 case 0xb20b: /* IPK */ goto unimplemented;
10908 case 0xb20d: /* PTLB */ goto unimplemented;
10909 case 0xb210: /* SPX */ goto unimplemented;
10910 case 0xb211: /* STPX */ goto unimplemented;
10911 case 0xb212: /* STAP */ goto unimplemented;
10912 case 0xb214: /* SIE */ goto unimplemented;
10913 case 0xb218: /* PC */ goto unimplemented;
10914 case 0xb219: /* SAC */ goto unimplemented;
10915 case 0xb21a: /* CFC */ goto unimplemented;
10916 case 0xb221: /* IPTE */ goto unimplemented;
10917 case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
10918 case 0xb223: /* IVSK */ goto unimplemented;
10919 case 0xb224: /* IAC */ goto unimplemented;
10920 case 0xb225: /* SSAR */ goto unimplemented;
10921 case 0xb226: /* EPAR */ goto unimplemented;
10922 case 0xb227: /* ESAR */ goto unimplemented;
10923 case 0xb228: /* PT */ goto unimplemented;
10924 case 0xb229: /* ISKE */ goto unimplemented;
10925 case 0xb22a: /* RRBE */ goto unimplemented;
10926 case 0xb22b: /* SSKE */ goto unimplemented;
10927 case 0xb22c: /* TB */ goto unimplemented;
10928 case 0xb22d: /* DXR */ goto unimplemented;
10929 case 0xb22e: /* PGIN */ goto unimplemented;
10930 case 0xb22f: /* PGOUT */ goto unimplemented;
10931 case 0xb230: /* CSCH */ goto unimplemented;
10932 case 0xb231: /* HSCH */ goto unimplemented;
10933 case 0xb232: /* MSCH */ goto unimplemented;
10934 case 0xb233: /* SSCH */ goto unimplemented;
10935 case 0xb234: /* STSCH */ goto unimplemented;
10936 case 0xb235: /* TSCH */ goto unimplemented;
10937 case 0xb236: /* TPI */ goto unimplemented;
10938 case 0xb237: /* SAL */ goto unimplemented;
10939 case 0xb238: /* RSCH */ goto unimplemented;
10940 case 0xb239: /* STCRW */ goto unimplemented;
10941 case 0xb23a: /* STCPS */ goto unimplemented;
10942 case 0xb23b: /* RCHP */ goto unimplemented;
10943 case 0xb23c: /* SCHM */ goto unimplemented;
10944 case 0xb240: /* BAKR */ goto unimplemented;
10945 case 0xb241: /* CKSM */ goto unimplemented;
10946 case 0xb244: /* SQDR */ goto unimplemented;
10947 case 0xb245: /* SQER */ goto unimplemented;
10948 case 0xb246: /* STURA */ goto unimplemented;
10949 case 0xb247: /* MSTA */ goto unimplemented;
10950 case 0xb248: /* PALB */ goto unimplemented;
10951 case 0xb249: /* EREG */ goto unimplemented;
10952 case 0xb24a: /* ESTA */ goto unimplemented;
10953 case 0xb24b: /* LURA */ goto unimplemented;
10954 case 0xb24c: /* TAR */ goto unimplemented;
10955 case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
10956 ovl.fmt.RRE.r2); goto ok;
10957 case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10958 goto ok;
10959 case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
10960 goto ok;
10961 case 0xb250: /* CSP */ goto unimplemented;
10962 case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
10963 ovl.fmt.RRE.r2); goto ok;
10964 case 0xb254: /* MVPG */ goto unimplemented;
10965 case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
10966 ovl.fmt.RRE.r2); goto ok;
10967 case 0xb257: /* CUSE */ goto unimplemented;
10968 case 0xb258: /* BSG */ goto unimplemented;
10969 case 0xb25a: /* BSA */ goto unimplemented;
10970 case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
10971 ovl.fmt.RRE.r2); goto ok;
10972 case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
10973 ovl.fmt.RRE.r2); goto ok;
10974 case 0xb263: /* CMPSC */ goto unimplemented;
10975 case 0xb274: /* SIGA */ goto unimplemented;
10976 case 0xb276: /* XSCH */ goto unimplemented;
10977 case 0xb277: /* RP */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010978 case 0xb278: s390_format_S_RD(s390_irgen_STCKE, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010979 case 0xb279: /* SACF */ goto unimplemented;
sewardj1e5fea62011-05-17 16:18:36 +000010980 case 0xb27c: s390_format_S_RD(s390_irgen_STCKF, ovl.fmt.S.b2, ovl.fmt.S.d2);goto ok;
sewardj2019a972011-03-07 16:04:07 +000010981 case 0xb27d: /* STSI */ goto unimplemented;
10982 case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
10983 goto ok;
10984 case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10985 goto ok;
10986 case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
10987 goto ok;
10988 case 0xb2a5: /* TRE */ goto unimplemented;
10989 case 0xb2a6: /* CU21 */ goto unimplemented;
10990 case 0xb2a7: /* CU12 */ goto unimplemented;
10991 case 0xb2b0: /* STFLE */ goto unimplemented;
10992 case 0xb2b1: /* STFL */ goto unimplemented;
10993 case 0xb2b2: /* LPSWE */ goto unimplemented;
10994 case 0xb2b8: /* SRNMB */ goto unimplemented;
10995 case 0xb2b9: /* SRNMT */ goto unimplemented;
10996 case 0xb2bd: /* LFAS */ goto unimplemented;
10997 case 0xb2ff: /* TRAP4 */ goto unimplemented;
10998 case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
10999 ovl.fmt.RRE.r2); goto ok;
11000 case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
11001 ovl.fmt.RRE.r2); goto ok;
11002 case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
11003 ovl.fmt.RRE.r2); goto ok;
11004 case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
11005 ovl.fmt.RRE.r2); goto ok;
11006 case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
11007 ovl.fmt.RRE.r2); goto ok;
11008 case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
11009 ovl.fmt.RRE.r2); goto ok;
11010 case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
11011 ovl.fmt.RRE.r2); goto ok;
11012 case 0xb307: /* MXDBR */ goto unimplemented;
11013 case 0xb308: /* KEBR */ goto unimplemented;
11014 case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
11015 ovl.fmt.RRE.r2); goto ok;
11016 case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
11017 ovl.fmt.RRE.r2); goto ok;
11018 case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
11019 ovl.fmt.RRE.r2); goto ok;
11020 case 0xb30c: /* MDEBR */ goto unimplemented;
11021 case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
11022 ovl.fmt.RRE.r2); goto ok;
11023 case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
11024 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11025 case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
11026 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11027 case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
11028 ovl.fmt.RRE.r2); goto ok;
11029 case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
11030 ovl.fmt.RRE.r2); goto ok;
11031 case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
11032 ovl.fmt.RRE.r2); goto ok;
11033 case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
11034 ovl.fmt.RRE.r2); goto ok;
11035 case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
11036 ovl.fmt.RRE.r2); goto ok;
11037 case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
11038 ovl.fmt.RRE.r2); goto ok;
11039 case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
11040 ovl.fmt.RRE.r2); goto ok;
11041 case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
11042 ovl.fmt.RRE.r2); goto ok;
11043 case 0xb318: /* KDBR */ goto unimplemented;
11044 case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
11045 ovl.fmt.RRE.r2); goto ok;
11046 case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
11047 ovl.fmt.RRE.r2); goto ok;
11048 case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
11049 ovl.fmt.RRE.r2); goto ok;
11050 case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
11051 ovl.fmt.RRE.r2); goto ok;
11052 case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
11053 ovl.fmt.RRE.r2); goto ok;
11054 case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
11055 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11056 case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
11057 ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
11058 case 0xb324: /* LDER */ goto unimplemented;
11059 case 0xb325: /* LXDR */ goto unimplemented;
11060 case 0xb326: /* LXER */ goto unimplemented;
11061 case 0xb32e: /* MAER */ goto unimplemented;
11062 case 0xb32f: /* MSER */ goto unimplemented;
11063 case 0xb336: /* SQXR */ goto unimplemented;
11064 case 0xb337: /* MEER */ goto unimplemented;
11065 case 0xb338: /* MAYLR */ goto unimplemented;
11066 case 0xb339: /* MYLR */ goto unimplemented;
11067 case 0xb33a: /* MAYR */ goto unimplemented;
11068 case 0xb33b: /* MYR */ goto unimplemented;
11069 case 0xb33c: /* MAYHR */ goto unimplemented;
11070 case 0xb33d: /* MYHR */ goto unimplemented;
11071 case 0xb33e: /* MADR */ goto unimplemented;
11072 case 0xb33f: /* MSDR */ goto unimplemented;
11073 case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
11074 ovl.fmt.RRE.r2); goto ok;
11075 case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
11076 ovl.fmt.RRE.r2); goto ok;
11077 case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
11078 ovl.fmt.RRE.r2); goto ok;
11079 case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
11080 ovl.fmt.RRE.r2); goto ok;
11081 case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
11082 ovl.fmt.RRE.r2); goto ok;
11083 case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
11084 ovl.fmt.RRE.r2); goto ok;
11085 case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
11086 ovl.fmt.RRE.r2); goto ok;
11087 case 0xb347: /* FIXBR */ goto unimplemented;
11088 case 0xb348: /* KXBR */ goto unimplemented;
11089 case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
11090 ovl.fmt.RRE.r2); goto ok;
11091 case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
11092 ovl.fmt.RRE.r2); goto ok;
11093 case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
11094 ovl.fmt.RRE.r2); goto ok;
11095 case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
11096 ovl.fmt.RRE.r2); goto ok;
11097 case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
11098 ovl.fmt.RRE.r2); goto ok;
11099 case 0xb350: /* TBEDR */ goto unimplemented;
11100 case 0xb351: /* TBDR */ goto unimplemented;
11101 case 0xb353: /* DIEBR */ goto unimplemented;
11102 case 0xb357: /* FIEBR */ goto unimplemented;
11103 case 0xb358: /* THDER */ goto unimplemented;
11104 case 0xb359: /* THDR */ goto unimplemented;
11105 case 0xb35b: /* DIDBR */ goto unimplemented;
11106 case 0xb35f: /* FIDBR */ goto unimplemented;
11107 case 0xb360: /* LPXR */ goto unimplemented;
11108 case 0xb361: /* LNXR */ goto unimplemented;
11109 case 0xb362: /* LTXR */ goto unimplemented;
11110 case 0xb363: /* LCXR */ goto unimplemented;
11111 case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
11112 ovl.fmt.RRE.r2); goto ok;
11113 case 0xb366: /* LEXR */ goto unimplemented;
11114 case 0xb367: /* FIXR */ goto unimplemented;
11115 case 0xb369: /* CXR */ goto unimplemented;
11116 case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
11117 ovl.fmt.RRE.r2); goto ok;
11118 case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
11119 ovl.fmt.RRE.r2); goto ok;
11120 case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
11121 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11122 goto ok;
11123 case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
11124 ovl.fmt.RRE.r2); goto ok;
11125 case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
11126 case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
11127 case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
11128 case 0xb377: /* FIER */ goto unimplemented;
11129 case 0xb37f: /* FIDR */ goto unimplemented;
11130 case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
11131 case 0xb385: /* SFASR */ goto unimplemented;
11132 case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
11133 case 0xb390: /* CELFBR */ goto unimplemented;
11134 case 0xb391: /* CDLFBR */ goto unimplemented;
11135 case 0xb392: /* CXLFBR */ goto unimplemented;
11136 case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
11137 ovl.fmt.RRE.r2); goto ok;
11138 case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
11139 ovl.fmt.RRE.r2); goto ok;
11140 case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
11141 ovl.fmt.RRE.r2); goto ok;
11142 case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
11143 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11144 goto ok;
11145 case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
11146 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11147 goto ok;
11148 case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
11149 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11150 goto ok;
11151 case 0xb3a0: /* CELGBR */ goto unimplemented;
11152 case 0xb3a1: /* CDLGBR */ goto unimplemented;
11153 case 0xb3a2: /* CXLGBR */ goto unimplemented;
11154 case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
11155 ovl.fmt.RRE.r2); goto ok;
11156 case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
11157 ovl.fmt.RRE.r2); goto ok;
11158 case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
11159 ovl.fmt.RRE.r2); goto ok;
11160 case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
11161 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11162 goto ok;
11163 case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
11164 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11165 goto ok;
11166 case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
11167 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
11168 goto ok;
11169 case 0xb3b4: /* CEFR */ goto unimplemented;
11170 case 0xb3b5: /* CDFR */ goto unimplemented;
11171 case 0xb3b6: /* CXFR */ goto unimplemented;
11172 case 0xb3b8: /* CFER */ goto unimplemented;
11173 case 0xb3b9: /* CFDR */ goto unimplemented;
11174 case 0xb3ba: /* CFXR */ goto unimplemented;
11175 case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
11176 ovl.fmt.RRE.r2); goto ok;
11177 case 0xb3c4: /* CEGR */ goto unimplemented;
11178 case 0xb3c5: /* CDGR */ goto unimplemented;
11179 case 0xb3c6: /* CXGR */ goto unimplemented;
11180 case 0xb3c8: /* CGER */ goto unimplemented;
11181 case 0xb3c9: /* CGDR */ goto unimplemented;
11182 case 0xb3ca: /* CGXR */ goto unimplemented;
11183 case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
11184 ovl.fmt.RRE.r2); goto ok;
11185 case 0xb3d0: /* MDTR */ goto unimplemented;
11186 case 0xb3d1: /* DDTR */ goto unimplemented;
11187 case 0xb3d2: /* ADTR */ goto unimplemented;
11188 case 0xb3d3: /* SDTR */ goto unimplemented;
11189 case 0xb3d4: /* LDETR */ goto unimplemented;
11190 case 0xb3d5: /* LEDTR */ goto unimplemented;
11191 case 0xb3d6: /* LTDTR */ goto unimplemented;
11192 case 0xb3d7: /* FIDTR */ goto unimplemented;
11193 case 0xb3d8: /* MXTR */ goto unimplemented;
11194 case 0xb3d9: /* DXTR */ goto unimplemented;
11195 case 0xb3da: /* AXTR */ goto unimplemented;
11196 case 0xb3db: /* SXTR */ goto unimplemented;
11197 case 0xb3dc: /* LXDTR */ goto unimplemented;
11198 case 0xb3dd: /* LDXTR */ goto unimplemented;
11199 case 0xb3de: /* LTXTR */ goto unimplemented;
11200 case 0xb3df: /* FIXTR */ goto unimplemented;
11201 case 0xb3e0: /* KDTR */ goto unimplemented;
11202 case 0xb3e1: /* CGDTR */ goto unimplemented;
11203 case 0xb3e2: /* CUDTR */ goto unimplemented;
11204 case 0xb3e3: /* CSDTR */ goto unimplemented;
11205 case 0xb3e4: /* CDTR */ goto unimplemented;
11206 case 0xb3e5: /* EEDTR */ goto unimplemented;
11207 case 0xb3e7: /* ESDTR */ goto unimplemented;
11208 case 0xb3e8: /* KXTR */ goto unimplemented;
11209 case 0xb3e9: /* CGXTR */ goto unimplemented;
11210 case 0xb3ea: /* CUXTR */ goto unimplemented;
11211 case 0xb3eb: /* CSXTR */ goto unimplemented;
11212 case 0xb3ec: /* CXTR */ goto unimplemented;
11213 case 0xb3ed: /* EEXTR */ goto unimplemented;
11214 case 0xb3ef: /* ESXTR */ goto unimplemented;
11215 case 0xb3f1: /* CDGTR */ goto unimplemented;
11216 case 0xb3f2: /* CDUTR */ goto unimplemented;
11217 case 0xb3f3: /* CDSTR */ goto unimplemented;
11218 case 0xb3f4: /* CEDTR */ goto unimplemented;
11219 case 0xb3f5: /* QADTR */ goto unimplemented;
11220 case 0xb3f6: /* IEDTR */ goto unimplemented;
11221 case 0xb3f7: /* RRDTR */ goto unimplemented;
11222 case 0xb3f9: /* CXGTR */ goto unimplemented;
11223 case 0xb3fa: /* CXUTR */ goto unimplemented;
11224 case 0xb3fb: /* CXSTR */ goto unimplemented;
11225 case 0xb3fc: /* CEXTR */ goto unimplemented;
11226 case 0xb3fd: /* QAXTR */ goto unimplemented;
11227 case 0xb3fe: /* IEXTR */ goto unimplemented;
11228 case 0xb3ff: /* RRXTR */ goto unimplemented;
11229 case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
11230 ovl.fmt.RRE.r2); goto ok;
11231 case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
11232 ovl.fmt.RRE.r2); goto ok;
11233 case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
11234 ovl.fmt.RRE.r2); goto ok;
11235 case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
11236 ovl.fmt.RRE.r2); goto ok;
11237 case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
11238 ovl.fmt.RRE.r2); goto ok;
11239 case 0xb905: /* LURAG */ goto unimplemented;
11240 case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
11241 ovl.fmt.RRE.r2); goto ok;
11242 case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
11243 ovl.fmt.RRE.r2); goto ok;
11244 case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
11245 ovl.fmt.RRE.r2); goto ok;
11246 case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
11247 ovl.fmt.RRE.r2); goto ok;
11248 case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
11249 ovl.fmt.RRE.r2); goto ok;
11250 case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
11251 ovl.fmt.RRE.r2); goto ok;
11252 case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
11253 ovl.fmt.RRE.r2); goto ok;
11254 case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
11255 ovl.fmt.RRE.r2); goto ok;
11256 case 0xb90e: /* EREGG */ goto unimplemented;
11257 case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
11258 ovl.fmt.RRE.r2); goto ok;
11259 case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
11260 ovl.fmt.RRE.r2); goto ok;
11261 case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
11262 ovl.fmt.RRE.r2); goto ok;
11263 case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
11264 ovl.fmt.RRE.r2); goto ok;
11265 case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
11266 ovl.fmt.RRE.r2); goto ok;
11267 case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
11268 ovl.fmt.RRE.r2); goto ok;
11269 case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
11270 ovl.fmt.RRE.r2); goto ok;
11271 case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
11272 ovl.fmt.RRE.r2); goto ok;
11273 case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
11274 ovl.fmt.RRE.r2); goto ok;
11275 case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
11276 ovl.fmt.RRE.r2); goto ok;
11277 case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
11278 ovl.fmt.RRE.r2); goto ok;
11279 case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
11280 ovl.fmt.RRE.r2); goto ok;
11281 case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
11282 ovl.fmt.RRE.r2); goto ok;
11283 case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
11284 ovl.fmt.RRE.r2); goto ok;
11285 case 0xb91e: /* KMAC */ goto unimplemented;
11286 case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
11287 ovl.fmt.RRE.r2); goto ok;
11288 case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
11289 ovl.fmt.RRE.r2); goto ok;
11290 case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
11291 ovl.fmt.RRE.r2); goto ok;
11292 case 0xb925: /* STURG */ goto unimplemented;
11293 case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
11294 ovl.fmt.RRE.r2); goto ok;
11295 case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
11296 ovl.fmt.RRE.r2); goto ok;
11297 case 0xb928: /* PCKMO */ goto unimplemented;
11298 case 0xb92b: /* KMO */ goto unimplemented;
11299 case 0xb92c: /* PCC */ goto unimplemented;
11300 case 0xb92d: /* KMCTR */ goto unimplemented;
11301 case 0xb92e: /* KM */ goto unimplemented;
11302 case 0xb92f: /* KMC */ goto unimplemented;
11303 case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
11304 ovl.fmt.RRE.r2); goto ok;
11305 case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
11306 ovl.fmt.RRE.r2); goto ok;
11307 case 0xb93e: /* KIMD */ goto unimplemented;
11308 case 0xb93f: /* KLMD */ goto unimplemented;
11309 case 0xb941: /* CFDTR */ goto unimplemented;
11310 case 0xb942: /* CLGDTR */ goto unimplemented;
11311 case 0xb943: /* CLFDTR */ goto unimplemented;
11312 case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
11313 ovl.fmt.RRE.r2); goto ok;
11314 case 0xb949: /* CFXTR */ goto unimplemented;
11315 case 0xb94a: /* CLGXTR */ goto unimplemented;
11316 case 0xb94b: /* CLFXTR */ goto unimplemented;
11317 case 0xb951: /* CDFTR */ goto unimplemented;
11318 case 0xb952: /* CDLGTR */ goto unimplemented;
11319 case 0xb953: /* CDLFTR */ goto unimplemented;
11320 case 0xb959: /* CXFTR */ goto unimplemented;
11321 case 0xb95a: /* CXLGTR */ goto unimplemented;
11322 case 0xb95b: /* CXLFTR */ goto unimplemented;
11323 case 0xb960: /* CGRT */ goto unimplemented;
11324 case 0xb961: /* CLGRT */ goto unimplemented;
11325 case 0xb972: /* CRT */ goto unimplemented;
11326 case 0xb973: /* CLRT */ goto unimplemented;
11327 case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
11328 ovl.fmt.RRE.r2); goto ok;
11329 case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
11330 ovl.fmt.RRE.r2); goto ok;
11331 case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
11332 ovl.fmt.RRE.r2); goto ok;
11333 case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
11334 ovl.fmt.RRE.r2); goto ok;
11335 case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
11336 ovl.fmt.RRE.r2); goto ok;
11337 case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
11338 ovl.fmt.RRE.r2); goto ok;
11339 case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
11340 ovl.fmt.RRE.r2); goto ok;
11341 case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
11342 ovl.fmt.RRE.r2); goto ok;
11343 case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
11344 ovl.fmt.RRE.r2); goto ok;
11345 case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
11346 ovl.fmt.RRE.r2); goto ok;
11347 case 0xb98a: /* CSPG */ goto unimplemented;
11348 case 0xb98d: /* EPSW */ goto unimplemented;
11349 case 0xb98e: /* IDTE */ goto unimplemented;
11350 case 0xb990: /* TRTT */ goto unimplemented;
11351 case 0xb991: /* TRTO */ goto unimplemented;
11352 case 0xb992: /* TROT */ goto unimplemented;
11353 case 0xb993: /* TROO */ goto unimplemented;
11354 case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
11355 ovl.fmt.RRE.r2); goto ok;
11356 case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
11357 ovl.fmt.RRE.r2); goto ok;
11358 case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
11359 ovl.fmt.RRE.r2); goto ok;
11360 case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
11361 ovl.fmt.RRE.r2); goto ok;
11362 case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
11363 ovl.fmt.RRE.r2); goto ok;
11364 case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
11365 ovl.fmt.RRE.r2); goto ok;
11366 case 0xb99a: /* EPAIR */ goto unimplemented;
11367 case 0xb99b: /* ESAIR */ goto unimplemented;
11368 case 0xb99d: /* ESEA */ goto unimplemented;
11369 case 0xb99e: /* PTI */ goto unimplemented;
11370 case 0xb99f: /* SSAIR */ goto unimplemented;
11371 case 0xb9a2: /* PTF */ goto unimplemented;
11372 case 0xb9aa: /* LPTEA */ goto unimplemented;
11373 case 0xb9ae: /* RRBM */ goto unimplemented;
11374 case 0xb9af: /* PFMF */ goto unimplemented;
11375 case 0xb9b0: /* CU14 */ goto unimplemented;
11376 case 0xb9b1: /* CU24 */ goto unimplemented;
11377 case 0xb9b2: /* CU41 */ goto unimplemented;
11378 case 0xb9b3: /* CU42 */ goto unimplemented;
11379 case 0xb9bd: /* TRTRE */ goto unimplemented;
11380 case 0xb9be: /* SRSTU */ goto unimplemented;
11381 case 0xb9bf: /* TRTE */ goto unimplemented;
11382 case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
11383 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11384 goto ok;
11385 case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
11386 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11387 goto ok;
11388 case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
11389 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11390 goto ok;
11391 case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
11392 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11393 goto ok;
11394 case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
11395 ovl.fmt.RRE.r2); goto ok;
11396 case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
11397 ovl.fmt.RRE.r2); goto ok;
11398 case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
11399 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11400 goto ok;
11401 case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
11402 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11403 goto ok;
11404 case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
11405 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11406 goto ok;
11407 case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
11408 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11409 goto ok;
11410 case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
11411 ovl.fmt.RRE.r2); goto ok;
11412 case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
11413 ovl.fmt.RRE.r2); goto ok;
11414 case 0xb9e1: /* POPCNT */ goto unimplemented;
sewardjd7bde722011-04-05 13:19:33 +000011415 case 0xb9e2: s390_format_RRF_U0RR(s390_irgen_LOCGR, ovl.fmt.RRF3.r3,
11416 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11417 S390_XMNM_LOCGR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011418 case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
11419 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11420 goto ok;
11421 case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
11422 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11423 goto ok;
11424 case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
11425 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11426 goto ok;
11427 case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
11428 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11429 goto ok;
11430 case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
11431 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11432 goto ok;
11433 case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
11434 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11435 goto ok;
11436 case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
11437 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11438 goto ok;
sewardjd7bde722011-04-05 13:19:33 +000011439 case 0xb9f2: s390_format_RRF_U0RR(s390_irgen_LOCR, ovl.fmt.RRF3.r3,
11440 ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2,
11441 S390_XMNM_LOCR); goto ok;
sewardj2019a972011-03-07 16:04:07 +000011442 case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
11443 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11444 goto ok;
11445 case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
11446 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11447 goto ok;
11448 case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
11449 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11450 goto ok;
11451 case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
11452 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11453 goto ok;
11454 case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
11455 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11456 goto ok;
11457 case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
11458 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11459 goto ok;
11460 case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
11461 ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
11462 goto ok;
11463 }
11464
11465 switch ((ovl.value & 0xff000000) >> 24) {
11466 case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11467 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11468 case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11469 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11470 case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11471 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11472 case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11473 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11474 case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11475 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11476 case 0x45: /* BAL */ goto unimplemented;
11477 case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11478 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11479 case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11480 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11481 case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11482 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11483 case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11484 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11485 case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11486 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11487 case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11488 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11489 case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11490 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11491 case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11492 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11493 case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11494 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11495 case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11496 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11497 case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11498 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11499 case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11500 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11501 case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11502 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11503 case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11504 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11505 case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11506 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11507 case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11508 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11509 case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11510 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11511 case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11512 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11513 case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11514 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11515 case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11516 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11517 case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11518 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11519 case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11520 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11521 case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11522 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11523 case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11524 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11525 case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11526 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11527 case 0x67: /* MXD */ goto unimplemented;
11528 case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11529 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11530 case 0x69: /* CD */ goto unimplemented;
11531 case 0x6a: /* AD */ goto unimplemented;
11532 case 0x6b: /* SD */ goto unimplemented;
11533 case 0x6c: /* MD */ goto unimplemented;
11534 case 0x6d: /* DD */ goto unimplemented;
11535 case 0x6e: /* AW */ goto unimplemented;
11536 case 0x6f: /* SW */ goto unimplemented;
11537 case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11538 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11539 case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11540 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11541 case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
11542 ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
11543 case 0x79: /* CE */ goto unimplemented;
11544 case 0x7a: /* AE */ goto unimplemented;
11545 case 0x7b: /* SE */ goto unimplemented;
11546 case 0x7c: /* MDE */ goto unimplemented;
11547 case 0x7d: /* DE */ goto unimplemented;
11548 case 0x7e: /* AU */ goto unimplemented;
11549 case 0x7f: /* SU */ goto unimplemented;
11550 case 0x83: /* DIAG */ goto unimplemented;
11551 case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
11552 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11553 case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
11554 ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
11555 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11556 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11557 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11558 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11559 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11560 ovl.fmt.RS.d2); goto ok;
11561 case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11562 ovl.fmt.RS.d2); goto ok;
11563 case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11564 ovl.fmt.RS.d2); goto ok;
11565 case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11566 ovl.fmt.RS.d2); goto ok;
11567 case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11568 ovl.fmt.RS.d2); goto ok;
11569 case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11570 ovl.fmt.RS.d2); goto ok;
11571 case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11572 ovl.fmt.RS.d2); goto ok;
11573 case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
11574 ovl.fmt.RS.d2); goto ok;
11575 case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11576 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11577 case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11578 ovl.fmt.SI.d1); goto ok;
11579 case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11580 ovl.fmt.SI.d1); goto ok;
11581 case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11582 ovl.fmt.SI.d1); goto ok;
11583 case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11584 ovl.fmt.SI.d1); goto ok;
11585 case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11586 ovl.fmt.SI.d1); goto ok;
11587 case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
11588 ovl.fmt.SI.d1); goto ok;
11589 case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11590 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11591 case 0x99: /* TRACE */ goto unimplemented;
11592 case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11593 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11594 case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11595 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11596 case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
11597 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11598 goto ok;
11599 case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
11600 ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
11601 goto ok;
11602 case 0xac: /* STNSM */ goto unimplemented;
11603 case 0xad: /* STOSM */ goto unimplemented;
11604 case 0xae: /* SIGP */ goto unimplemented;
11605 case 0xaf: /* MC */ goto unimplemented;
11606 case 0xb1: /* LRA */ goto unimplemented;
11607 case 0xb6: /* STCTL */ goto unimplemented;
11608 case 0xb7: /* LCTL */ goto unimplemented;
11609 case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11610 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11611 case 0xbb: /* CDS */ goto unimplemented;
11612 case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11613 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11614 case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11615 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11616 case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
11617 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
11618 }
11619
11620 return S390_DECODE_UNKNOWN_INSN;
11621
11622ok:
11623 return S390_DECODE_OK;
11624
11625unimplemented:
11626 return S390_DECODE_UNIMPLEMENTED_INSN;
11627}
11628
11629static s390_decode_t
11630s390_decode_6byte_and_irgen(UChar *bytes)
11631{
11632 typedef union {
11633 struct {
11634 unsigned int op1 : 8;
11635 unsigned int r1 : 4;
11636 unsigned int r3 : 4;
11637 unsigned int i2 : 16;
11638 unsigned int : 8;
11639 unsigned int op2 : 8;
11640 } RIE;
11641 struct {
11642 unsigned int op1 : 8;
11643 unsigned int r1 : 4;
11644 unsigned int r2 : 4;
11645 unsigned int i3 : 8;
11646 unsigned int i4 : 8;
11647 unsigned int i5 : 8;
11648 unsigned int op2 : 8;
11649 } RIE_RRUUU;
11650 struct {
11651 unsigned int op1 : 8;
11652 unsigned int r1 : 4;
11653 unsigned int : 4;
11654 unsigned int i2 : 16;
11655 unsigned int m3 : 4;
11656 unsigned int : 4;
11657 unsigned int op2 : 8;
11658 } RIEv1;
11659 struct {
11660 unsigned int op1 : 8;
11661 unsigned int r1 : 4;
11662 unsigned int r2 : 4;
11663 unsigned int i4 : 16;
11664 unsigned int m3 : 4;
11665 unsigned int : 4;
11666 unsigned int op2 : 8;
11667 } RIE_RRPU;
11668 struct {
11669 unsigned int op1 : 8;
11670 unsigned int r1 : 4;
11671 unsigned int m3 : 4;
11672 unsigned int i4 : 16;
11673 unsigned int i2 : 8;
11674 unsigned int op2 : 8;
11675 } RIEv3;
11676 struct {
11677 unsigned int op1 : 8;
11678 unsigned int r1 : 4;
11679 unsigned int op2 : 4;
11680 unsigned int i2 : 32;
11681 } RIL;
11682 struct {
11683 unsigned int op1 : 8;
11684 unsigned int r1 : 4;
11685 unsigned int m3 : 4;
11686 unsigned int b4 : 4;
11687 unsigned int d4 : 12;
11688 unsigned int i2 : 8;
11689 unsigned int op2 : 8;
11690 } RIS;
11691 struct {
11692 unsigned int op1 : 8;
11693 unsigned int r1 : 4;
11694 unsigned int r2 : 4;
11695 unsigned int b4 : 4;
11696 unsigned int d4 : 12;
11697 unsigned int m3 : 4;
11698 unsigned int : 4;
11699 unsigned int op2 : 8;
11700 } RRS;
11701 struct {
11702 unsigned int op1 : 8;
11703 unsigned int l1 : 4;
11704 unsigned int : 4;
11705 unsigned int b1 : 4;
11706 unsigned int d1 : 12;
11707 unsigned int : 8;
11708 unsigned int op2 : 8;
11709 } RSL;
11710 struct {
11711 unsigned int op1 : 8;
11712 unsigned int r1 : 4;
11713 unsigned int r3 : 4;
11714 unsigned int b2 : 4;
11715 unsigned int dl2 : 12;
11716 unsigned int dh2 : 8;
11717 unsigned int op2 : 8;
11718 } RSY;
11719 struct {
11720 unsigned int op1 : 8;
11721 unsigned int r1 : 4;
11722 unsigned int x2 : 4;
11723 unsigned int b2 : 4;
11724 unsigned int d2 : 12;
11725 unsigned int : 8;
11726 unsigned int op2 : 8;
11727 } RXE;
11728 struct {
11729 unsigned int op1 : 8;
11730 unsigned int r3 : 4;
11731 unsigned int x2 : 4;
11732 unsigned int b2 : 4;
11733 unsigned int d2 : 12;
11734 unsigned int r1 : 4;
11735 unsigned int : 4;
11736 unsigned int op2 : 8;
11737 } RXF;
11738 struct {
11739 unsigned int op1 : 8;
11740 unsigned int r1 : 4;
11741 unsigned int x2 : 4;
11742 unsigned int b2 : 4;
11743 unsigned int dl2 : 12;
11744 unsigned int dh2 : 8;
11745 unsigned int op2 : 8;
11746 } RXY;
11747 struct {
11748 unsigned int op1 : 8;
11749 unsigned int i2 : 8;
11750 unsigned int b1 : 4;
11751 unsigned int dl1 : 12;
11752 unsigned int dh1 : 8;
11753 unsigned int op2 : 8;
11754 } SIY;
11755 struct {
11756 unsigned int op : 8;
11757 unsigned int l : 8;
11758 unsigned int b1 : 4;
11759 unsigned int d1 : 12;
11760 unsigned int b2 : 4;
11761 unsigned int d2 : 12;
11762 } SS;
11763 struct {
11764 unsigned int op : 8;
11765 unsigned int l1 : 4;
11766 unsigned int l2 : 4;
11767 unsigned int b1 : 4;
11768 unsigned int d1 : 12;
11769 unsigned int b2 : 4;
11770 unsigned int d2 : 12;
11771 } SS_LLRDRD;
11772 struct {
11773 unsigned int op : 8;
11774 unsigned int r1 : 4;
11775 unsigned int r3 : 4;
11776 unsigned int b2 : 4;
11777 unsigned int d2 : 12;
11778 unsigned int b4 : 4;
11779 unsigned int d4 : 12;
11780 } SS_RRRDRD2;
11781 struct {
11782 unsigned int op : 16;
11783 unsigned int b1 : 4;
11784 unsigned int d1 : 12;
11785 unsigned int b2 : 4;
11786 unsigned int d2 : 12;
11787 } SSE;
11788 struct {
11789 unsigned int op1 : 8;
11790 unsigned int r3 : 4;
11791 unsigned int op2 : 4;
11792 unsigned int b1 : 4;
11793 unsigned int d1 : 12;
11794 unsigned int b2 : 4;
11795 unsigned int d2 : 12;
11796 } SSF;
11797 struct {
11798 unsigned int op : 16;
11799 unsigned int b1 : 4;
11800 unsigned int d1 : 12;
11801 unsigned int i2 : 16;
11802 } SIL;
11803 } formats;
11804 union {
11805 formats fmt;
11806 ULong value;
11807 } ovl;
11808
11809 vassert(sizeof(formats) == 6);
11810
11811 ((char *)(&ovl.value))[0] = bytes[0];
11812 ((char *)(&ovl.value))[1] = bytes[1];
11813 ((char *)(&ovl.value))[2] = bytes[2];
11814 ((char *)(&ovl.value))[3] = bytes[3];
11815 ((char *)(&ovl.value))[4] = bytes[4];
11816 ((char *)(&ovl.value))[5] = bytes[5];
11817 ((char *)(&ovl.value))[6] = 0x0;
11818 ((char *)(&ovl.value))[7] = 0x0;
11819
11820 switch ((ovl.value >> 16) & 0xff00000000ffULL) {
11821 case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
11822 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11823 ovl.fmt.RXY.dl2,
11824 ovl.fmt.RXY.dh2); goto ok;
11825 case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
11826 case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
11827 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11828 ovl.fmt.RXY.dl2,
11829 ovl.fmt.RXY.dh2); goto ok;
11830 case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
11831 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11832 ovl.fmt.RXY.dl2,
11833 ovl.fmt.RXY.dh2); goto ok;
11834 case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
11835 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11836 ovl.fmt.RXY.dl2,
11837 ovl.fmt.RXY.dh2); goto ok;
11838 case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
11839 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11840 ovl.fmt.RXY.dl2,
11841 ovl.fmt.RXY.dh2); goto ok;
11842 case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
11843 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11844 ovl.fmt.RXY.dl2,
11845 ovl.fmt.RXY.dh2); goto ok;
11846 case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
11847 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11848 ovl.fmt.RXY.dl2,
11849 ovl.fmt.RXY.dh2); goto ok;
11850 case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
11851 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11852 ovl.fmt.RXY.dl2,
11853 ovl.fmt.RXY.dh2); goto ok;
11854 case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
11855 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11856 ovl.fmt.RXY.dl2,
11857 ovl.fmt.RXY.dh2); goto ok;
11858 case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
11859 case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
11860 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11861 ovl.fmt.RXY.dl2,
11862 ovl.fmt.RXY.dh2); goto ok;
11863 case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
11864 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11865 ovl.fmt.RXY.dl2,
11866 ovl.fmt.RXY.dh2); goto ok;
11867 case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
11868 case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
11869 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11870 ovl.fmt.RXY.dl2,
11871 ovl.fmt.RXY.dh2); goto ok;
11872 case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
11873 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11874 ovl.fmt.RXY.dl2,
11875 ovl.fmt.RXY.dh2); goto ok;
11876 case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
11877 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11878 ovl.fmt.RXY.dl2,
11879 ovl.fmt.RXY.dh2); goto ok;
11880 case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
11881 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11882 ovl.fmt.RXY.dl2,
11883 ovl.fmt.RXY.dh2); goto ok;
11884 case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
11885 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11886 ovl.fmt.RXY.dl2,
11887 ovl.fmt.RXY.dh2); goto ok;
11888 case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
11889 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11890 ovl.fmt.RXY.dl2,
11891 ovl.fmt.RXY.dh2); goto ok;
11892 case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
11893 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11894 ovl.fmt.RXY.dl2,
11895 ovl.fmt.RXY.dh2); goto ok;
11896 case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
11897 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11898 ovl.fmt.RXY.dl2,
11899 ovl.fmt.RXY.dh2); goto ok;
11900 case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
11901 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11902 ovl.fmt.RXY.dl2,
11903 ovl.fmt.RXY.dh2); goto ok;
11904 case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
11905 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11906 ovl.fmt.RXY.dl2,
11907 ovl.fmt.RXY.dh2); goto ok;
11908 case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
11909 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11910 ovl.fmt.RXY.dl2,
11911 ovl.fmt.RXY.dh2); goto ok;
11912 case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
11913 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11914 ovl.fmt.RXY.dl2,
11915 ovl.fmt.RXY.dh2); goto ok;
11916 case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
11917 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11918 ovl.fmt.RXY.dl2,
11919 ovl.fmt.RXY.dh2); goto ok;
11920 case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
11921 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11922 ovl.fmt.RXY.dl2,
11923 ovl.fmt.RXY.dh2); goto ok;
11924 case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
11925 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11926 ovl.fmt.RXY.dl2,
11927 ovl.fmt.RXY.dh2); goto ok;
11928 case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
11929 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11930 ovl.fmt.RXY.dl2,
11931 ovl.fmt.RXY.dh2); goto ok;
11932 case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
11933 case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
11934 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11935 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11936 ovl.fmt.RXY.dh2); goto ok;
11937 case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
11938 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11939 ovl.fmt.RXY.dl2,
11940 ovl.fmt.RXY.dh2); goto ok;
11941 case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
11942 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11943 ovl.fmt.RXY.dl2,
11944 ovl.fmt.RXY.dh2); goto ok;
11945 case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
11946 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11947 ovl.fmt.RXY.dl2,
11948 ovl.fmt.RXY.dh2); goto ok;
11949 case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
11950 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11951 ovl.fmt.RXY.dl2,
11952 ovl.fmt.RXY.dh2); goto ok;
11953 case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
11954 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11955 ovl.fmt.RXY.dl2,
11956 ovl.fmt.RXY.dh2); goto ok;
11957 case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
11958 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11959 ovl.fmt.RXY.dl2,
11960 ovl.fmt.RXY.dh2); goto ok;
11961 case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
11962 ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
11963 ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
11964 ovl.fmt.RXY.dh2); goto ok;
11965 case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
11966 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11967 ovl.fmt.RXY.dl2,
11968 ovl.fmt.RXY.dh2); goto ok;
11969 case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
11970 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11971 ovl.fmt.RXY.dl2,
11972 ovl.fmt.RXY.dh2); goto ok;
11973 case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
11974 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11975 ovl.fmt.RXY.dl2,
11976 ovl.fmt.RXY.dh2); goto ok;
11977 case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
11978 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11979 ovl.fmt.RXY.dl2,
11980 ovl.fmt.RXY.dh2); goto ok;
11981 case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
11982 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11983 ovl.fmt.RXY.dl2,
11984 ovl.fmt.RXY.dh2); goto ok;
11985 case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
11986 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11987 ovl.fmt.RXY.dl2,
11988 ovl.fmt.RXY.dh2); goto ok;
11989 case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
11990 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11991 ovl.fmt.RXY.dl2,
11992 ovl.fmt.RXY.dh2); goto ok;
11993 case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
11994 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11995 ovl.fmt.RXY.dl2,
11996 ovl.fmt.RXY.dh2); goto ok;
11997 case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
11998 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
11999 ovl.fmt.RXY.dl2,
12000 ovl.fmt.RXY.dh2); goto ok;
12001 case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
12002 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12003 ovl.fmt.RXY.dl2,
12004 ovl.fmt.RXY.dh2); goto ok;
12005 case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
12006 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12007 ovl.fmt.RXY.dl2,
12008 ovl.fmt.RXY.dh2); goto ok;
12009 case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
12010 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12011 ovl.fmt.RXY.dl2,
12012 ovl.fmt.RXY.dh2); goto ok;
12013 case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
12014 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12015 ovl.fmt.RXY.dl2,
12016 ovl.fmt.RXY.dh2); goto ok;
12017 case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
12018 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12019 ovl.fmt.RXY.dl2,
12020 ovl.fmt.RXY.dh2); goto ok;
12021 case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
12022 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12023 ovl.fmt.RXY.dl2,
12024 ovl.fmt.RXY.dh2); goto ok;
12025 case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
12026 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12027 ovl.fmt.RXY.dl2,
12028 ovl.fmt.RXY.dh2); goto ok;
12029 case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
12030 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12031 ovl.fmt.RXY.dl2,
12032 ovl.fmt.RXY.dh2); goto ok;
12033 case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
12034 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12035 ovl.fmt.RXY.dl2,
12036 ovl.fmt.RXY.dh2); goto ok;
12037 case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
12038 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12039 ovl.fmt.RXY.dl2,
12040 ovl.fmt.RXY.dh2); goto ok;
12041 case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
12042 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12043 ovl.fmt.RXY.dl2,
12044 ovl.fmt.RXY.dh2); goto ok;
12045 case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
12046 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12047 ovl.fmt.RXY.dl2,
12048 ovl.fmt.RXY.dh2); goto ok;
12049 case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
12050 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12051 ovl.fmt.RXY.dl2,
12052 ovl.fmt.RXY.dh2); goto ok;
12053 case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
12054 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12055 ovl.fmt.RXY.dl2,
12056 ovl.fmt.RXY.dh2); goto ok;
12057 case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
12058 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12059 ovl.fmt.RXY.dl2,
12060 ovl.fmt.RXY.dh2); goto ok;
12061 case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
12062 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12063 ovl.fmt.RXY.dl2,
12064 ovl.fmt.RXY.dh2); goto ok;
12065 case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
12066 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12067 ovl.fmt.RXY.dl2,
12068 ovl.fmt.RXY.dh2); goto ok;
12069 case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
12070 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12071 ovl.fmt.RXY.dl2,
12072 ovl.fmt.RXY.dh2); goto ok;
12073 case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
12074 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12075 ovl.fmt.RXY.dl2,
12076 ovl.fmt.RXY.dh2); goto ok;
12077 case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
12078 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12079 ovl.fmt.RXY.dl2,
12080 ovl.fmt.RXY.dh2); goto ok;
12081 case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
12082 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12083 ovl.fmt.RXY.dl2,
12084 ovl.fmt.RXY.dh2); goto ok;
12085 case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
12086 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12087 ovl.fmt.RXY.dl2,
12088 ovl.fmt.RXY.dh2); goto ok;
12089 case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
12090 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12091 ovl.fmt.RXY.dl2,
12092 ovl.fmt.RXY.dh2); goto ok;
12093 case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
12094 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12095 ovl.fmt.RXY.dl2,
12096 ovl.fmt.RXY.dh2); goto ok;
12097 case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
12098 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12099 ovl.fmt.RXY.dl2,
12100 ovl.fmt.RXY.dh2); goto ok;
12101 case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
12102 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12103 ovl.fmt.RXY.dl2,
12104 ovl.fmt.RXY.dh2); goto ok;
12105 case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
12106 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12107 ovl.fmt.RXY.dl2,
12108 ovl.fmt.RXY.dh2); goto ok;
12109 case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
12110 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12111 ovl.fmt.RXY.dl2,
12112 ovl.fmt.RXY.dh2); goto ok;
12113 case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
12114 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12115 ovl.fmt.RXY.dl2,
12116 ovl.fmt.RXY.dh2); goto ok;
12117 case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
12118 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12119 ovl.fmt.RXY.dl2,
12120 ovl.fmt.RXY.dh2); goto ok;
12121 case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
12122 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12123 ovl.fmt.RXY.dl2,
12124 ovl.fmt.RXY.dh2); goto ok;
12125 case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
12126 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12127 ovl.fmt.RXY.dl2,
12128 ovl.fmt.RXY.dh2); goto ok;
12129 case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
12130 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12131 ovl.fmt.RXY.dl2,
12132 ovl.fmt.RXY.dh2); goto ok;
12133 case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
12134 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12135 ovl.fmt.RXY.dl2,
12136 ovl.fmt.RXY.dh2); goto ok;
12137 case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
12138 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12139 ovl.fmt.RXY.dl2,
12140 ovl.fmt.RXY.dh2); goto ok;
12141 case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
12142 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12143 ovl.fmt.RXY.dl2,
12144 ovl.fmt.RXY.dh2); goto ok;
12145 case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
12146 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12147 ovl.fmt.RXY.dl2,
12148 ovl.fmt.RXY.dh2); goto ok;
12149 case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
12150 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12151 ovl.fmt.RXY.dl2,
12152 ovl.fmt.RXY.dh2); goto ok;
12153 case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
12154 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12155 ovl.fmt.RXY.dl2,
12156 ovl.fmt.RXY.dh2); goto ok;
12157 case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
12158 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12159 ovl.fmt.RXY.dl2,
12160 ovl.fmt.RXY.dh2); goto ok;
12161 case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
12162 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12163 ovl.fmt.RXY.dl2,
12164 ovl.fmt.RXY.dh2); goto ok;
12165 case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
12166 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12167 ovl.fmt.RXY.dl2,
12168 ovl.fmt.RXY.dh2); goto ok;
12169 case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
12170 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12171 ovl.fmt.RXY.dl2,
12172 ovl.fmt.RXY.dh2); goto ok;
12173 case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
12174 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12175 ovl.fmt.RXY.dl2,
12176 ovl.fmt.RXY.dh2); goto ok;
12177 case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
12178 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12179 ovl.fmt.RSY.dl2,
12180 ovl.fmt.RSY.dh2); goto ok;
12181 case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
12182 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12183 ovl.fmt.RSY.dl2,
12184 ovl.fmt.RSY.dh2); goto ok;
12185 case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
12186 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12187 ovl.fmt.RSY.dl2,
12188 ovl.fmt.RSY.dh2); goto ok;
12189 case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
12190 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12191 ovl.fmt.RSY.dl2,
12192 ovl.fmt.RSY.dh2); goto ok;
12193 case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
12194 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12195 ovl.fmt.RSY.dl2,
12196 ovl.fmt.RSY.dh2); goto ok;
12197 case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
12198 case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
12199 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12200 ovl.fmt.RSY.dl2,
12201 ovl.fmt.RSY.dh2); goto ok;
12202 case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
12203 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12204 ovl.fmt.RSY.dl2,
12205 ovl.fmt.RSY.dh2); goto ok;
12206 case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
12207 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12208 ovl.fmt.RSY.dl2,
12209 ovl.fmt.RSY.dh2); goto ok;
12210 case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
12211 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12212 ovl.fmt.RSY.dl2,
12213 ovl.fmt.RSY.dh2); goto ok;
12214 case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
12215 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12216 ovl.fmt.RSY.dl2,
12217 ovl.fmt.RSY.dh2); goto ok;
12218 case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
12219 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12220 ovl.fmt.RSY.dl2,
12221 ovl.fmt.RSY.dh2); goto ok;
12222 case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
12223 case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
12224 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12225 ovl.fmt.RSY.dl2,
12226 ovl.fmt.RSY.dh2); goto ok;
12227 case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
12228 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12229 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12230 ovl.fmt.RSY.dh2); goto ok;
12231 case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
12232 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12233 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12234 ovl.fmt.RSY.dh2); goto ok;
12235 case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
12236 case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
12237 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12238 ovl.fmt.RSY.dl2,
12239 ovl.fmt.RSY.dh2); goto ok;
12240 case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
12241 case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
12242 case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
12243 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12244 ovl.fmt.RSY.dl2,
12245 ovl.fmt.RSY.dh2); goto ok;
12246 case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
12247 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12248 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12249 ovl.fmt.RSY.dh2); goto ok;
12250 case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
12251 case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
12252 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12253 ovl.fmt.SIY.dh1); goto ok;
12254 case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
12255 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12256 ovl.fmt.SIY.dh1); goto ok;
12257 case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
12258 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12259 ovl.fmt.SIY.dh1); goto ok;
12260 case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
12261 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12262 ovl.fmt.SIY.dh1); goto ok;
12263 case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
12264 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12265 ovl.fmt.SIY.dh1); goto ok;
12266 case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
12267 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12268 ovl.fmt.SIY.dh1); goto ok;
12269 case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
12270 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12271 ovl.fmt.SIY.dh1); goto ok;
12272 case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
12273 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12274 ovl.fmt.SIY.dh1); goto ok;
12275 case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
12276 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12277 ovl.fmt.SIY.dh1); goto ok;
12278 case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
12279 ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
12280 ovl.fmt.SIY.dh1); goto ok;
12281 case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
12282 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12283 ovl.fmt.RSY.dl2,
12284 ovl.fmt.RSY.dh2); goto ok;
12285 case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
12286 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12287 ovl.fmt.RSY.dl2,
12288 ovl.fmt.RSY.dh2); goto ok;
12289 case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
12290 case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
12291 case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
12292 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12293 ovl.fmt.RSY.dl2,
12294 ovl.fmt.RSY.dh2); goto ok;
12295 case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
12296 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12297 ovl.fmt.RSY.dl2,
12298 ovl.fmt.RSY.dh2); goto ok;
12299 case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
12300 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12301 ovl.fmt.RSY.dl2,
12302 ovl.fmt.RSY.dh2); goto ok;
12303 case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
12304 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12305 ovl.fmt.RSY.dl2,
12306 ovl.fmt.RSY.dh2); goto ok;
12307 case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
12308 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12309 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12310 ovl.fmt.RSY.dh2); goto ok;
12311 case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
12312 case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
12313 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12314 ovl.fmt.RSY.dl2,
12315 ovl.fmt.RSY.dh2); goto ok;
12316 case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
12317 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12318 ovl.fmt.RSY.dl2,
12319 ovl.fmt.RSY.dh2); goto ok;
12320 case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
12321 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12322 ovl.fmt.RSY.dl2,
12323 ovl.fmt.RSY.dh2); goto ok;
12324 case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
12325 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12326 ovl.fmt.RSY.dl2,
12327 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012328 case 0xeb00000000e2ULL: s390_format_RSY_RDRM(s390_irgen_LOCG, ovl.fmt.RSY.r1,
12329 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12330 ovl.fmt.RSY.dl2,
12331 ovl.fmt.RSY.dh2,
12332 S390_XMNM_LOCG); goto ok;
12333 case 0xeb00000000e3ULL: s390_format_RSY_RDRM(s390_irgen_STOCG,
12334 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12335 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12336 ovl.fmt.RSY.dh2,
12337 S390_XMNM_STOCG); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012338 case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
12339 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12340 ovl.fmt.RSY.dl2,
12341 ovl.fmt.RSY.dh2); goto ok;
12342 case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
12343 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12344 ovl.fmt.RSY.dl2,
12345 ovl.fmt.RSY.dh2); goto ok;
12346 case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
12347 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12348 ovl.fmt.RSY.dl2,
12349 ovl.fmt.RSY.dh2); goto ok;
12350 case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
12351 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12352 ovl.fmt.RSY.dl2,
12353 ovl.fmt.RSY.dh2); goto ok;
12354 case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
12355 ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
12356 ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
12357 ovl.fmt.RSY.dh2); goto ok;
sewardjd7bde722011-04-05 13:19:33 +000012358 case 0xeb00000000f2ULL: s390_format_RSY_RDRM(s390_irgen_LOC, ovl.fmt.RSY.r1,
12359 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12360 ovl.fmt.RSY.dl2,
12361 ovl.fmt.RSY.dh2, S390_XMNM_LOC);
12362 goto ok;
12363 case 0xeb00000000f3ULL: s390_format_RSY_RDRM(s390_irgen_STOC, ovl.fmt.RSY.r1,
12364 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12365 ovl.fmt.RSY.dl2,
12366 ovl.fmt.RSY.dh2,
12367 S390_XMNM_STOC); goto ok;
sewardj2019a972011-03-07 16:04:07 +000012368 case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
12369 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12370 ovl.fmt.RSY.dl2,
12371 ovl.fmt.RSY.dh2); goto ok;
12372 case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
12373 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12374 ovl.fmt.RSY.dl2,
12375 ovl.fmt.RSY.dh2); goto ok;
12376 case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
12377 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12378 ovl.fmt.RSY.dl2,
12379 ovl.fmt.RSY.dh2); goto ok;
12380 case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
12381 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12382 ovl.fmt.RSY.dl2,
12383 ovl.fmt.RSY.dh2); goto ok;
12384 case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
12385 ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
12386 ovl.fmt.RSY.dl2,
12387 ovl.fmt.RSY.dh2); goto ok;
12388 case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
12389 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12390 goto ok;
12391 case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
12392 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12393 goto ok;
12394 case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
12395 case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
12396 ovl.fmt.RIE_RRUUU.r1,
12397 ovl.fmt.RIE_RRUUU.r2,
12398 ovl.fmt.RIE_RRUUU.i3,
12399 ovl.fmt.RIE_RRUUU.i4,
12400 ovl.fmt.RIE_RRUUU.i5);
12401 goto ok;
12402 case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
12403 ovl.fmt.RIE_RRUUU.r1,
12404 ovl.fmt.RIE_RRUUU.r2,
12405 ovl.fmt.RIE_RRUUU.i3,
12406 ovl.fmt.RIE_RRUUU.i4,
12407 ovl.fmt.RIE_RRUUU.i5);
12408 goto ok;
12409 case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
12410 ovl.fmt.RIE_RRUUU.r1,
12411 ovl.fmt.RIE_RRUUU.r2,
12412 ovl.fmt.RIE_RRUUU.i3,
12413 ovl.fmt.RIE_RRUUU.i4,
12414 ovl.fmt.RIE_RRUUU.i5);
12415 goto ok;
12416 case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
12417 ovl.fmt.RIE_RRUUU.r1,
12418 ovl.fmt.RIE_RRUUU.r2,
12419 ovl.fmt.RIE_RRUUU.i3,
12420 ovl.fmt.RIE_RRUUU.i4,
12421 ovl.fmt.RIE_RRUUU.i5);
12422 goto ok;
12423 case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
12424 case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
12425 ovl.fmt.RIE_RRPU.r1,
12426 ovl.fmt.RIE_RRPU.r2,
12427 ovl.fmt.RIE_RRPU.i4,
12428 ovl.fmt.RIE_RRPU.m3); goto ok;
12429 case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
12430 ovl.fmt.RIE_RRPU.r1,
12431 ovl.fmt.RIE_RRPU.r2,
12432 ovl.fmt.RIE_RRPU.i4,
12433 ovl.fmt.RIE_RRPU.m3); goto ok;
12434 case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
12435 case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
12436 case 0xec0000000072ULL: /* CIT */ goto unimplemented;
12437 case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
12438 case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
12439 ovl.fmt.RIE_RRPU.r1,
12440 ovl.fmt.RIE_RRPU.r2,
12441 ovl.fmt.RIE_RRPU.i4,
12442 ovl.fmt.RIE_RRPU.m3); goto ok;
12443 case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
12444 ovl.fmt.RIE_RRPU.r1,
12445 ovl.fmt.RIE_RRPU.r2,
12446 ovl.fmt.RIE_RRPU.i4,
12447 ovl.fmt.RIE_RRPU.m3); goto ok;
12448 case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
12449 ovl.fmt.RIEv3.r1,
12450 ovl.fmt.RIEv3.m3,
12451 ovl.fmt.RIEv3.i4,
12452 ovl.fmt.RIEv3.i2); goto ok;
12453 case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
12454 ovl.fmt.RIEv3.r1,
12455 ovl.fmt.RIEv3.m3,
12456 ovl.fmt.RIEv3.i4,
12457 ovl.fmt.RIEv3.i2); goto ok;
12458 case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
12459 ovl.fmt.RIEv3.r1,
12460 ovl.fmt.RIEv3.m3,
12461 ovl.fmt.RIEv3.i4,
12462 ovl.fmt.RIEv3.i2); goto ok;
12463 case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
12464 ovl.fmt.RIEv3.r1,
12465 ovl.fmt.RIEv3.m3,
12466 ovl.fmt.RIEv3.i4,
12467 ovl.fmt.RIEv3.i2); goto ok;
12468 case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
12469 ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
12470 goto ok;
12471 case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
12472 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12473 ovl.fmt.RIE.i2); goto ok;
12474 case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
12475 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12476 ovl.fmt.RIE.i2); goto ok;
12477 case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
12478 ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
12479 ovl.fmt.RIE.i2); goto ok;
12480 case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
12481 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12482 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12483 goto ok;
12484 case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
12485 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12486 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12487 goto ok;
12488 case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
12489 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12490 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12491 goto ok;
12492 case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
12493 ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
12494 ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
12495 goto ok;
12496 case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
12497 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12498 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12499 ovl.fmt.RIS.i2); goto ok;
12500 case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
12501 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12502 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12503 ovl.fmt.RIS.i2); goto ok;
12504 case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
12505 ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
12506 ovl.fmt.RIS.d4,
12507 ovl.fmt.RIS.i2); goto ok;
12508 case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
12509 ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
12510 ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
12511 ovl.fmt.RIS.i2); goto ok;
12512 case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
12513 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12514 ovl.fmt.RXE.d2); goto ok;
12515 case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
12516 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12517 ovl.fmt.RXE.d2); goto ok;
12518 case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
12519 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12520 ovl.fmt.RXE.d2); goto ok;
12521 case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
12522 case 0xed0000000008ULL: /* KEB */ goto unimplemented;
12523 case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
12524 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12525 ovl.fmt.RXE.d2); goto ok;
12526 case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
12527 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12528 ovl.fmt.RXE.d2); goto ok;
12529 case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
12530 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12531 ovl.fmt.RXE.d2); goto ok;
12532 case 0xed000000000cULL: /* MDEB */ goto unimplemented;
12533 case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
12534 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12535 ovl.fmt.RXE.d2); goto ok;
12536 case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
12537 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12538 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12539 ovl.fmt.RXF.r1); goto ok;
12540 case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
12541 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12542 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12543 ovl.fmt.RXF.r1); goto ok;
12544 case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
12545 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12546 ovl.fmt.RXE.d2); goto ok;
12547 case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
12548 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12549 ovl.fmt.RXE.d2); goto ok;
12550 case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
12551 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12552 ovl.fmt.RXE.d2); goto ok;
12553 case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
12554 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12555 ovl.fmt.RXE.d2); goto ok;
12556 case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
12557 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12558 ovl.fmt.RXE.d2); goto ok;
12559 case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
12560 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12561 ovl.fmt.RXE.d2); goto ok;
12562 case 0xed0000000018ULL: /* KDB */ goto unimplemented;
12563 case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
12564 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12565 ovl.fmt.RXE.d2); goto ok;
12566 case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
12567 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12568 ovl.fmt.RXE.d2); goto ok;
12569 case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
12570 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12571 ovl.fmt.RXE.d2); goto ok;
12572 case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
12573 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12574 ovl.fmt.RXE.d2); goto ok;
12575 case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
12576 ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
12577 ovl.fmt.RXE.d2); goto ok;
12578 case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
12579 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12580 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12581 ovl.fmt.RXF.r1); goto ok;
12582 case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
12583 ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
12584 ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
12585 ovl.fmt.RXF.r1); goto ok;
12586 case 0xed0000000024ULL: /* LDE */ goto unimplemented;
12587 case 0xed0000000025ULL: /* LXD */ goto unimplemented;
12588 case 0xed0000000026ULL: /* LXE */ goto unimplemented;
12589 case 0xed000000002eULL: /* MAE */ goto unimplemented;
12590 case 0xed000000002fULL: /* MSE */ goto unimplemented;
12591 case 0xed0000000034ULL: /* SQE */ goto unimplemented;
12592 case 0xed0000000035ULL: /* SQD */ goto unimplemented;
12593 case 0xed0000000037ULL: /* MEE */ goto unimplemented;
12594 case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
12595 case 0xed0000000039ULL: /* MYL */ goto unimplemented;
12596 case 0xed000000003aULL: /* MAY */ goto unimplemented;
12597 case 0xed000000003bULL: /* MY */ goto unimplemented;
12598 case 0xed000000003cULL: /* MAYH */ goto unimplemented;
12599 case 0xed000000003dULL: /* MYH */ goto unimplemented;
12600 case 0xed000000003eULL: /* MAD */ goto unimplemented;
12601 case 0xed000000003fULL: /* MSD */ goto unimplemented;
12602 case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
12603 case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
12604 case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
12605 case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
12606 case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
12607 case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
12608 case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
12609 case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
12610 case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
12611 case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
12612 case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
12613 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12614 ovl.fmt.RXY.dl2,
12615 ovl.fmt.RXY.dh2); goto ok;
12616 case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
12617 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12618 ovl.fmt.RXY.dl2,
12619 ovl.fmt.RXY.dh2); goto ok;
12620 case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
12621 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12622 ovl.fmt.RXY.dl2,
12623 ovl.fmt.RXY.dh2); goto ok;
12624 case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
12625 ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
12626 ovl.fmt.RXY.dl2,
12627 ovl.fmt.RXY.dh2); goto ok;
12628 }
12629
12630 switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
12631 case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
12632 ovl.fmt.RIL.i2); goto ok;
12633 case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
12634 ovl.fmt.RIL.i2); goto ok;
12635 case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
12636 ovl.fmt.RIL.i2); goto ok;
12637 case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
12638 ovl.fmt.RIL.i2); goto ok;
12639 case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
12640 ovl.fmt.RIL.i2); goto ok;
12641 case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
12642 ovl.fmt.RIL.i2); goto ok;
12643 case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
12644 ovl.fmt.RIL.i2); goto ok;
12645 case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
12646 ovl.fmt.RIL.i2); goto ok;
12647 case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
12648 ovl.fmt.RIL.i2); goto ok;
12649 case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
12650 ovl.fmt.RIL.i2); goto ok;
12651 case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
12652 ovl.fmt.RIL.i2); goto ok;
12653 case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
12654 ovl.fmt.RIL.i2); goto ok;
12655 case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
12656 ovl.fmt.RIL.i2); goto ok;
12657 case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
12658 ovl.fmt.RIL.i2); goto ok;
12659 case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
12660 ovl.fmt.RIL.i2); goto ok;
12661 case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
12662 ovl.fmt.RIL.i2); goto ok;
12663 case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
12664 ovl.fmt.RIL.i2); goto ok;
12665 case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
12666 ovl.fmt.RIL.i2); goto ok;
12667 case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
12668 ovl.fmt.RIL.i2); goto ok;
12669 case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
12670 ovl.fmt.RIL.i2); goto ok;
12671 case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
12672 ovl.fmt.RIL.i2); goto ok;
12673 case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
12674 ovl.fmt.RIL.i2); goto ok;
12675 case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
12676 ovl.fmt.RIL.i2); goto ok;
12677 case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
12678 ovl.fmt.RIL.i2); goto ok;
12679 case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
12680 ovl.fmt.RIL.i2); goto ok;
12681 case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
12682 ovl.fmt.RIL.i2); goto ok;
12683 case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
12684 ovl.fmt.RIL.i2); goto ok;
12685 case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
12686 ovl.fmt.RIL.i2); goto ok;
12687 case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
12688 ovl.fmt.RIL.i2); goto ok;
12689 case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
12690 ovl.fmt.RIL.i2); goto ok;
12691 case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
12692 ovl.fmt.RIL.i2); goto ok;
12693 case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
12694 ovl.fmt.RIL.i2); goto ok;
12695 case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
12696 ovl.fmt.RIL.i2); goto ok;
12697 case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
12698 ovl.fmt.RIL.i2); goto ok;
12699 case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
12700 ovl.fmt.RIL.i2); goto ok;
12701 case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
12702 ovl.fmt.RIL.i2); goto ok;
12703 case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
12704 ovl.fmt.RIL.i2); goto ok;
12705 case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
12706 ovl.fmt.RIL.i2); goto ok;
12707 case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
12708 ovl.fmt.RIL.i2); goto ok;
12709 case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
12710 ovl.fmt.RIL.i2); goto ok;
12711 case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
12712 ovl.fmt.RIL.i2); goto ok;
12713 case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
12714 ovl.fmt.RIL.i2); goto ok;
12715 case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
12716 ovl.fmt.RIL.i2); goto ok;
12717 case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
12718 ovl.fmt.RIL.i2); goto ok;
12719 case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
12720 ovl.fmt.RIL.i2); goto ok;
12721 case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
12722 ovl.fmt.RIL.i2); goto ok;
12723 case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
12724 ovl.fmt.RIL.i2); goto ok;
12725 case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
12726 ovl.fmt.RIL.i2); goto ok;
12727 case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
12728 ovl.fmt.RIL.i2); goto ok;
12729 case 0xc800ULL: /* MVCOS */ goto unimplemented;
12730 case 0xc801ULL: /* ECTG */ goto unimplemented;
12731 case 0xc802ULL: /* CSST */ goto unimplemented;
12732 case 0xc804ULL: /* LPD */ goto unimplemented;
12733 case 0xc805ULL: /* LPDG */ goto unimplemented;
12734 case 0xcc06ULL: /* BRCTH */ goto unimplemented;
12735 case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
12736 ovl.fmt.RIL.i2); goto ok;
12737 case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
12738 ovl.fmt.RIL.i2); goto ok;
12739 case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
12740 ovl.fmt.RIL.i2); goto ok;
12741 case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
12742 ovl.fmt.RIL.i2); goto ok;
12743 case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
12744 ovl.fmt.RIL.i2); goto ok;
12745 }
12746
12747 switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
12748 case 0xd0ULL: /* TRTR */ goto unimplemented;
12749 case 0xd1ULL: /* MVN */ goto unimplemented;
12750 case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
12751 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12752 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12753 case 0xd3ULL: /* MVZ */ goto unimplemented;
12754 case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
12755 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12756 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12757 case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
12758 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12759 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
12760 case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
12761 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12762 ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
sewardjb63967e2011-03-24 08:50:04 +000012763 case 0xd7ULL:
12764 if (ovl.fmt.SS.b1 == ovl.fmt.SS.b2 && ovl.fmt.SS.d1 == ovl.fmt.SS.d2)
12765 s390_irgen_XC_sameloc(ovl.fmt.SS.l, ovl.fmt.SS.b1, ovl.fmt.SS.d1);
12766 else
12767 s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
12768 ovl.fmt.SS.b1, ovl.fmt.SS.d1,
12769 ovl.fmt.SS.b2, ovl.fmt.SS.d2);
12770 goto ok;
sewardj2019a972011-03-07 16:04:07 +000012771 case 0xd9ULL: /* MVCK */ goto unimplemented;
12772 case 0xdaULL: /* MVCP */ goto unimplemented;
12773 case 0xdbULL: /* MVCS */ goto unimplemented;
12774 case 0xdcULL: /* TR */ goto unimplemented;
12775 case 0xddULL: /* TRT */ goto unimplemented;
12776 case 0xdeULL: /* ED */ goto unimplemented;
12777 case 0xdfULL: /* EDMK */ goto unimplemented;
12778 case 0xe1ULL: /* PKU */ goto unimplemented;
12779 case 0xe2ULL: /* UNPKU */ goto unimplemented;
12780 case 0xe8ULL: /* MVCIN */ goto unimplemented;
12781 case 0xe9ULL: /* PKA */ goto unimplemented;
12782 case 0xeaULL: /* UNPKA */ goto unimplemented;
12783 case 0xeeULL: /* PLO */ goto unimplemented;
12784 case 0xefULL: /* LMD */ goto unimplemented;
12785 case 0xf0ULL: /* SRP */ goto unimplemented;
12786 case 0xf1ULL: /* MVO */ goto unimplemented;
12787 case 0xf2ULL: /* PACK */ goto unimplemented;
12788 case 0xf3ULL: /* UNPK */ goto unimplemented;
12789 case 0xf8ULL: /* ZAP */ goto unimplemented;
12790 case 0xf9ULL: /* CP */ goto unimplemented;
12791 case 0xfaULL: /* AP */ goto unimplemented;
12792 case 0xfbULL: /* SP */ goto unimplemented;
12793 case 0xfcULL: /* MP */ goto unimplemented;
12794 case 0xfdULL: /* DP */ goto unimplemented;
12795 }
12796
12797 switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
12798 case 0xe500ULL: /* LASP */ goto unimplemented;
12799 case 0xe501ULL: /* TPROT */ goto unimplemented;
12800 case 0xe502ULL: /* STRAG */ goto unimplemented;
12801 case 0xe50eULL: /* MVCSK */ goto unimplemented;
12802 case 0xe50fULL: /* MVCDK */ goto unimplemented;
12803 case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
12804 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12805 goto ok;
12806 case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
12807 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12808 goto ok;
12809 case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
12810 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12811 goto ok;
12812 case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
12813 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12814 goto ok;
12815 case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
12816 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12817 goto ok;
12818 case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
12819 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12820 goto ok;
12821 case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
12822 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12823 goto ok;
12824 case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
12825 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12826 goto ok;
12827 case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
12828 ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
12829 goto ok;
12830 }
12831
12832 return S390_DECODE_UNKNOWN_INSN;
12833
12834ok:
12835 return S390_DECODE_OK;
12836
12837unimplemented:
12838 return S390_DECODE_UNIMPLEMENTED_INSN;
12839}
12840
12841/* Handle "special" instructions. */
12842static s390_decode_t
12843s390_decode_special_and_irgen(UChar *bytes)
12844{
12845 s390_decode_t status = S390_DECODE_OK;
12846
12847 /* Got a "Special" instruction preamble. Which one is it? */
12848 if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
12849 s390_irgen_client_request();
12850 } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
12851 s390_irgen_guest_NRADDR();
12852 } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
12853 s390_irgen_call_noredir();
12854 } else {
12855 /* We don't know what it is. */
12856 return S390_DECODE_UNKNOWN_SPECIAL_INSN;
12857 }
12858
12859 dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
12860
12861 return status;
12862}
12863
12864
12865/* Function returns # bytes that were decoded or 0 in case of failure */
12866UInt
12867s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
12868{
12869 s390_decode_t status;
12870
12871 dis_res = dres;
12872
12873 /* Spot the 8-byte preamble: 18ff lr r15,r15
12874 1811 lr r1,r1
12875 1822 lr r2,r2
12876 1833 lr r3,r3 */
12877 if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
12878 bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
12879 bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
12880
12881 /* Handle special instruction that follows that preamble. */
12882 if (0) vex_printf("special function handling...\n");
12883 bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
12884 status = s390_decode_special_and_irgen(bytes);
12885 insn_length = S390_SPECIAL_OP_SIZE;
12886 } else {
12887 /* Handle normal instructions. */
12888 switch (insn_length) {
12889 case 2:
12890 status = s390_decode_2byte_and_irgen(bytes);
12891 break;
12892
12893 case 4:
12894 status = s390_decode_4byte_and_irgen(bytes);
12895 break;
12896
12897 case 6:
12898 status = s390_decode_6byte_and_irgen(bytes);
12899 break;
12900
12901 default:
12902 status = S390_DECODE_ERROR;
12903 break;
12904 }
12905 }
12906 /* next instruction is execute, stop here */
12907 if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
12908 irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
12909 dis_res->whatNext = Dis_StopHere;
12910 }
12911
12912 if (status == S390_DECODE_OK) return insn_length; /* OK */
12913
12914 /* Decoding failed somehow */
12915 vex_printf("vex s390->IR: ");
12916 switch (status) {
12917 case S390_DECODE_UNKNOWN_INSN:
12918 vex_printf("unknown insn: ");
12919 break;
12920
12921 case S390_DECODE_UNIMPLEMENTED_INSN:
12922 vex_printf("unimplemented insn: ");
12923 break;
12924
12925 case S390_DECODE_UNKNOWN_SPECIAL_INSN:
12926 vex_printf("unimplemented special insn: ");
12927 break;
12928
12929 default:
12930 case S390_DECODE_ERROR:
12931 vex_printf("decoding error: ");
12932 break;
12933 }
12934
12935 vex_printf("%02x%02x", bytes[0], bytes[1]);
12936 if (insn_length > 2) {
12937 vex_printf(" %02x%02x", bytes[2], bytes[3]);
12938 }
12939 if (insn_length > 4) {
12940 vex_printf(" %02x%02x", bytes[4], bytes[5]);
12941 }
12942 vex_printf("\n");
12943
12944 return 0; /* Failed */
12945}
12946
12947
12948/* Generate an IRExpr for an address. */
12949static __inline__ IRExpr *
12950mkaddr_expr(Addr64 addr)
12951{
12952 return IRExpr_Const(IRConst_U64(addr));
12953}
12954
12955
12956/* Disassemble a single instruction INSN into IR. */
12957static DisResult
12958disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
12959 void *callback_data)
12960{
12961 UChar byte;
12962 UInt insn_length;
12963 DisResult dres;
12964
12965 /* ---------------------------------------------------- */
12966 /* --- Compute instruction length -- */
12967 /* ---------------------------------------------------- */
12968
12969 /* Get the first byte of the insn. */
12970 byte = insn[0];
12971
12972 /* The leftmost two bits (0:1) encode the length of the insn in bytes.
12973 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
12974 insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
12975
12976 guest_IA_next_instr = guest_IA_curr_instr + insn_length;
12977
12978 /* ---------------------------------------------------- */
12979 /* --- Initialise the DisResult data -- */
12980 /* ---------------------------------------------------- */
12981 dres.whatNext = Dis_Continue;
12982 dres.len = insn_length;
12983 dres.continueAt = 0;
12984
12985 /* fixs390: we should probably pass the resteer-function and the callback
12986 data. It's not needed for correctness but improves performance. */
12987
12988 /* Normal and special instruction handling starts here. */
12989 if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
12990 /* All decode failures end up here. The decoder has already issued an
12991 error message.
12992 Tell the dispatcher that this insn cannot be decoded, and so has
12993 not been executed, and (is currently) the next to be executed.
12994 IA should be up-to-date since it made so at the start of each
12995 insn, but nevertheless be paranoid and update it again right
12996 now. */
12997 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
12998 mkaddr_expr(guest_IA_curr_instr)));
12999
sewardj15469da2011-04-13 15:10:16 +000013000 irsb->next = mkaddr_expr(guest_IA_next_instr);
sewardj2019a972011-03-07 16:04:07 +000013001 irsb->jumpkind = Ijk_NoDecode;
13002 dres.whatNext = Dis_StopHere;
13003 dres.len = 0;
13004
13005 return dres;
13006 }
13007
13008 return dres;
13009}
13010
13011
13012/*------------------------------------------------------------*/
13013/*--- Top-level fn ---*/
13014/*------------------------------------------------------------*/
13015
13016/* Disassemble a single instruction into IR. The instruction
13017 is located in host memory at &guest_code[delta]. */
13018
13019DisResult
13020disInstr_S390(IRSB *irsb_IN,
13021 Bool put_IP,
13022 Bool (*resteerOkFn)(void *, Addr64),
13023 Bool resteerCisOk,
13024 void *callback_opaque,
13025 UChar *guest_code,
13026 Long delta,
13027 Addr64 guest_IP,
13028 VexArch guest_arch,
13029 VexArchInfo *archinfo,
13030 VexAbiInfo *abiinfo,
13031 Bool host_bigendian)
13032{
13033 vassert(guest_arch == VexArchS390X);
13034
13035 /* The instruction decoder requires a big-endian machine. */
13036 vassert(host_bigendian == True);
13037
13038 /* Set globals (see top of this file) */
13039 guest_IA_curr_instr = guest_IP;
13040
13041 irsb = irsb_IN;
13042
13043 vassert(guest_arch == VexArchS390X);
13044
13045 /* We may be asked to update the guest IA before going further. */
13046 if (put_IP)
13047 addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
13048 mkaddr_expr(guest_IA_curr_instr)));
13049
13050 return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
13051}
13052
13053/*---------------------------------------------------------------*/
13054/*--- end guest_s390_toIR.c ---*/
13055/*---------------------------------------------------------------*/