blob: ed74217536fc4a4da28427943c8be339ca9455a1 [file] [log] [blame]
Chia-I Wuc14d1562014-10-17 09:49:22 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Chia-I Wu <olv@lunarg.com>
26 */
27
Chia-I Wu714df452015-01-01 07:55:04 +080028#include "buf.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080029#include "img.h"
30#include "mem.h"
Chia-I Wu429a0aa2014-10-24 11:57:51 +080031#include "state.h"
Chia-I Wuc14d1562014-10-17 09:49:22 +080032#include "cmd_priv.h"
33
Chia-I Wu714df452015-01-01 07:55:04 +080034static XGL_RESULT cmd_meta_create_buf_view(struct intel_cmd *cmd,
35 XGL_BUFFER buf,
36 XGL_GPU_SIZE range,
37 XGL_FORMAT format,
38 struct intel_buf_view **view)
Chia-I Wuc14d1562014-10-17 09:49:22 +080039{
Chia-I Wu714df452015-01-01 07:55:04 +080040 XGL_BUFFER_VIEW_CREATE_INFO info;
Chia-I Wuc14d1562014-10-17 09:49:22 +080041
42 memset(&info, 0, sizeof(info));
Chia-I Wu714df452015-01-01 07:55:04 +080043 info.sType = XGL_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO;
44 info.buffer = buf;
45 info.viewType = XGL_BUFFER_VIEW_TYPED;
Chia-I Wuc14d1562014-10-17 09:49:22 +080046 info.stride = icd_format_get_size(format);
47 info.format = format;
Chia-I Wu714df452015-01-01 07:55:04 +080048 info.channels.r = XGL_CHANNEL_SWIZZLE_R;
49 info.channels.g = XGL_CHANNEL_SWIZZLE_G;
50 info.channels.b = XGL_CHANNEL_SWIZZLE_B;
51 info.channels.a = XGL_CHANNEL_SWIZZLE_A;
52 info.range = range;
Chia-I Wuc14d1562014-10-17 09:49:22 +080053
Chia-I Wubc7a30c2014-12-13 15:54:10 +080054 /*
55 * We do not rely on the hardware to avoid out-of-bound access. But we do
56 * not want the hardware to ignore the last element either.
57 */
58 if (info.range % info.stride)
59 info.range += info.stride - (info.range % info.stride);
60
Chia-I Wu714df452015-01-01 07:55:04 +080061 return intel_buf_view_create(cmd->dev, &info, view);
Chia-I Wuc14d1562014-10-17 09:49:22 +080062}
63
Chia-I Wu714df452015-01-01 07:55:04 +080064static void cmd_meta_set_src_for_buf(struct intel_cmd *cmd,
65 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080066 XGL_FORMAT format,
67 struct intel_cmd_meta *meta)
68{
Chia-I Wu714df452015-01-01 07:55:04 +080069 struct intel_buf_view *view;
70 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080071
Chia-I Wu714df452015-01-01 07:55:04 +080072 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
73 buf->size, format, &view);
74 if (res != XGL_SUCCESS) {
75 cmd->result = res;
76 return;
77 }
Chia-I Wuc14d1562014-10-17 09:49:22 +080078
79 meta->src.valid = true;
80
Chia-I Wu714df452015-01-01 07:55:04 +080081 memcpy(meta->src.surface, view->cmd,
82 sizeof(view->cmd[0]) * view->cmd_len);
83 meta->src.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +080084
Chia-I Wu714df452015-01-01 07:55:04 +080085 intel_buf_view_destroy(view);
86
87 meta->src.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +080088 meta->src.reloc_offset = 0;
89 meta->src.reloc_flags = 0;
90}
91
Chia-I Wu714df452015-01-01 07:55:04 +080092static void cmd_meta_set_dst_for_buf(struct intel_cmd *cmd,
93 const struct intel_buf *buf,
Chia-I Wuc14d1562014-10-17 09:49:22 +080094 XGL_FORMAT format,
95 struct intel_cmd_meta *meta)
96{
Chia-I Wu714df452015-01-01 07:55:04 +080097 struct intel_buf_view *view;
98 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +080099
Chia-I Wu714df452015-01-01 07:55:04 +0800100 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) buf,
101 buf->size, format, &view);
102 if (res != XGL_SUCCESS) {
103 cmd->result = res;
104 return;
105 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800106
107 meta->dst.valid = true;
108
Chia-I Wu714df452015-01-01 07:55:04 +0800109 memcpy(meta->dst.surface, view->cmd,
110 sizeof(view->cmd[0]) * view->cmd_len);
111 meta->dst.surface_len = view->cmd_len;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800112
Chia-I Wu714df452015-01-01 07:55:04 +0800113 intel_buf_view_destroy(view);
114
115 meta->dst.reloc_target = (intptr_t) buf->obj.mem->bo;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800116 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800117 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800118}
119
120static void cmd_meta_set_src_for_img(struct intel_cmd *cmd,
121 const struct intel_img *img,
122 XGL_FORMAT format,
123 XGL_IMAGE_ASPECT aspect,
124 struct intel_cmd_meta *meta)
125{
126 XGL_IMAGE_VIEW_CREATE_INFO info;
127 struct intel_img_view *view;
128 XGL_RESULT ret;
129
130 memset(&info, 0, sizeof(info));
131 info.sType = XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO;
132 info.image = (XGL_IMAGE) img;
133
134 switch (img->type) {
135 case XGL_IMAGE_1D:
136 info.viewType = XGL_IMAGE_VIEW_1D;
137 break;
138 case XGL_IMAGE_2D:
139 info.viewType = XGL_IMAGE_VIEW_2D;
140 break;
141 case XGL_IMAGE_3D:
142 info.viewType = XGL_IMAGE_VIEW_3D;
143 break;
144 default:
145 break;
146 }
147
148 info.format = format;
149 info.channels.r = XGL_CHANNEL_SWIZZLE_R;
150 info.channels.g = XGL_CHANNEL_SWIZZLE_G;
151 info.channels.b = XGL_CHANNEL_SWIZZLE_B;
152 info.channels.a = XGL_CHANNEL_SWIZZLE_A;
153 info.subresourceRange.aspect = aspect;
154 info.subresourceRange.baseMipLevel = 0;
155 info.subresourceRange.mipLevels = XGL_LAST_MIP_OR_SLICE;
156 info.subresourceRange.baseArraySlice = 0;
157 info.subresourceRange.arraySize = XGL_LAST_MIP_OR_SLICE;
158
159 ret = intel_img_view_create(cmd->dev, &info, &view);
160 if (ret != XGL_SUCCESS) {
161 cmd->result = ret;
162 return;
163 }
164
165 meta->src.valid = true;
166
167 memcpy(meta->src.surface, view->cmd,
168 sizeof(view->cmd[0]) * view->cmd_len);
169 meta->src.surface_len = view->cmd_len;
170
171 meta->src.reloc_target = (intptr_t) img->obj.mem->bo;
172 meta->src.reloc_offset = 0;
173 meta->src.reloc_flags = 0;
174
175 intel_img_view_destroy(view);
176}
177
Chia-I Wu83084ba2014-12-04 12:49:52 +0800178static void cmd_meta_adjust_compressed_dst(struct intel_cmd *cmd,
179 const struct intel_img *img,
180 struct intel_cmd_meta *meta)
181{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600182 int32_t w, h, layer;
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800183 unsigned x_offset, y_offset;
Chia-I Wu83084ba2014-12-04 12:49:52 +0800184
185 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
186 w = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_WIDTH);
187 h = GEN_EXTRACT(meta->dst.surface[2], GEN7_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800188 layer = GEN_EXTRACT(meta->dst.surface[4],
189 GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800190 } else {
191 w = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_WIDTH);
192 h = GEN_EXTRACT(meta->dst.surface[2], GEN6_SURFACE_DW2_HEIGHT);
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800193 layer = GEN_EXTRACT(meta->dst.surface[4],
194 GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800195 }
196
197 /* note that the width/height fields have the real values minus 1 */
198 w = (w + img->layout.block_width) / img->layout.block_width - 1;
199 h = (h + img->layout.block_height) / img->layout.block_height - 1;
200
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800201 /* adjust width and height */
Chia-I Wu83084ba2014-12-04 12:49:52 +0800202 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800203 meta->dst.surface[2] &= ~(GEN7_SURFACE_DW2_WIDTH__MASK |
204 GEN7_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800205 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN7_SURFACE_DW2_WIDTH) |
206 GEN_SHIFT32(h, GEN7_SURFACE_DW2_HEIGHT);
207 } else {
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800208 meta->dst.surface[2] &= ~(GEN6_SURFACE_DW2_WIDTH__MASK |
209 GEN6_SURFACE_DW2_HEIGHT__MASK);
Chia-I Wu83084ba2014-12-04 12:49:52 +0800210 meta->dst.surface[2] |= GEN_SHIFT32(w, GEN6_SURFACE_DW2_WIDTH) |
211 GEN_SHIFT32(h, GEN6_SURFACE_DW2_HEIGHT);
212 }
Chia-I Wu0d8c2ee2014-12-04 13:06:45 +0800213
214 if (!layer)
215 return;
216
217 meta->dst.reloc_offset = intel_layout_get_slice_tile_offset(&img->layout,
218 0, layer, &x_offset, &y_offset);
219
220 /*
221 * The lower 2 bits (or 1 bit for Y) are missing. This may be a problem
222 * for small images (16x16 or smaller). We will need to adjust the
223 * drawing rectangle instead.
224 */
225 x_offset = (x_offset / img->layout.block_width) >> 2;
226 y_offset = (y_offset / img->layout.block_height) >> 1;
227
228 /* adjust min array element and X/Y offsets */
229 if (cmd_gen(cmd) >= INTEL_GEN(7)) {
230 meta->dst.surface[4] &= ~GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
231 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN7_SURFACE_DW5_X_OFFSET) |
232 GEN_SHIFT32(y_offset, GEN7_SURFACE_DW5_Y_OFFSET);
233 } else {
234 meta->dst.surface[4] &= ~GEN6_SURFACE_DW4_MIN_ARRAY_ELEMENT__MASK;
235 meta->dst.surface[5] |= GEN_SHIFT32(x_offset, GEN6_SURFACE_DW5_X_OFFSET) |
236 GEN_SHIFT32(y_offset, GEN6_SURFACE_DW5_Y_OFFSET);
237 }
Chia-I Wu83084ba2014-12-04 12:49:52 +0800238}
239
Chia-I Wuc14d1562014-10-17 09:49:22 +0800240static void cmd_meta_set_dst_for_img(struct intel_cmd *cmd,
241 const struct intel_img *img,
242 XGL_FORMAT format,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600243 uint32_t lod, uint32_t layer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800244 struct intel_cmd_meta *meta)
245{
246 XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO info;
247 struct intel_rt_view *rt;
248 XGL_RESULT ret;
249
250 memset(&info, 0, sizeof(info));
251 info.sType = XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO;
252 info.image = (XGL_IMAGE) img;
253 info.format = format;
254 info.mipLevel = lod;
255 info.baseArraySlice = layer;
256 info.arraySize = 1;
257
258 ret = intel_rt_view_create(cmd->dev, &info, &rt);
259 if (ret != XGL_SUCCESS) {
260 cmd->result = ret;
261 return;
262 }
263
264 meta->dst.valid = true;
265
266 memcpy(meta->dst.surface, rt->cmd, sizeof(rt->cmd[0]) * rt->cmd_len);
267 meta->dst.surface_len = rt->cmd_len;
268
269 meta->dst.reloc_target = (intptr_t) img->obj.mem->bo;
270 meta->dst.reloc_offset = 0;
Chia-I Wuc5e2ae32014-11-25 11:00:12 +0800271 meta->dst.reloc_flags = INTEL_RELOC_WRITE;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800272
Chia-I Wu83084ba2014-12-04 12:49:52 +0800273 if (icd_format_is_compressed(img->layout.format))
274 cmd_meta_adjust_compressed_dst(cmd, img, meta);
275
Chia-I Wuc14d1562014-10-17 09:49:22 +0800276 intel_rt_view_destroy(rt);
277}
278
279static void cmd_meta_set_src_for_writer(struct intel_cmd *cmd,
280 enum intel_cmd_writer_type writer,
281 XGL_GPU_SIZE size,
282 XGL_FORMAT format,
283 struct intel_cmd_meta *meta)
284{
Chia-I Wu714df452015-01-01 07:55:04 +0800285 struct intel_buf_view *view;
286 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800287
Chia-I Wu714df452015-01-01 07:55:04 +0800288 res = cmd_meta_create_buf_view(cmd, (XGL_BUFFER) XGL_NULL_HANDLE,
289 size, format, &view);
290 if (res != XGL_SUCCESS) {
291 cmd->result = res;
292 return;
293 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800294
295 meta->src.valid = true;
296
Chia-I Wu714df452015-01-01 07:55:04 +0800297 memcpy(meta->src.surface, view->cmd,
298 sizeof(view->cmd[0]) * view->cmd_len);
299 meta->src.surface_len = view->cmd_len;
300
301 intel_buf_view_destroy(view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800302
303 meta->src.reloc_target = (intptr_t) writer;
304 meta->src.reloc_offset = 0;
305 meta->src.reloc_flags = INTEL_CMD_RELOC_TARGET_IS_WRITER;
306}
307
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800308static void cmd_meta_set_ds_view(struct intel_cmd *cmd,
309 const struct intel_img *img,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600310 uint32_t lod, uint32_t layer,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800311 struct intel_cmd_meta *meta)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800312{
313 XGL_DEPTH_STENCIL_VIEW_CREATE_INFO info;
314 struct intel_ds_view *ds;
315 XGL_RESULT ret;
316
317 memset(&info, 0, sizeof(info));
318 info.sType = XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO;
319 info.image = (XGL_IMAGE) img;
320 info.mipLevel = lod;
321 info.baseArraySlice = layer;
322 info.arraySize = 1;
323
324 ret = intel_ds_view_create(cmd->dev, &info, &ds);
325 if (ret != XGL_SUCCESS) {
326 cmd->result = ret;
327 return;
328 }
329
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800330 meta->ds.view = ds;
331}
332
333static void cmd_meta_set_ds_state(struct intel_cmd *cmd,
334 XGL_IMAGE_ASPECT aspect,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600335 uint32_t stencil_ref,
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800336 struct intel_cmd_meta *meta)
337{
Tony Barbourfa6cac72015-01-16 14:27:35 -0700338 meta->ds.stencil_ref = stencil_ref;
339 meta->ds.aspect = aspect;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800340}
341
342static enum intel_dev_meta_shader get_shader_id(const struct intel_dev *dev,
343 const struct intel_img *img,
344 bool copy_array)
345{
346 enum intel_dev_meta_shader shader_id;
347
348 switch (img->type) {
349 case XGL_IMAGE_1D:
350 shader_id = (copy_array) ?
351 INTEL_DEV_META_FS_COPY_1D_ARRAY : INTEL_DEV_META_FS_COPY_1D;
352 break;
353 case XGL_IMAGE_2D:
354 shader_id = (img->samples > 1) ? INTEL_DEV_META_FS_COPY_2D_MS :
355 (copy_array) ? INTEL_DEV_META_FS_COPY_2D_ARRAY :
356 INTEL_DEV_META_FS_COPY_2D;
357 break;
358 case XGL_IMAGE_3D:
359 default:
360 shader_id = INTEL_DEV_META_FS_COPY_2D_ARRAY;
361 break;
362 }
363
364 return shader_id;
365}
366
Chia-I Wuf3a27252014-11-24 15:27:01 +0800367static bool cmd_meta_mem_dword_aligned(const struct intel_cmd *cmd,
368 XGL_GPU_SIZE src_offset,
369 XGL_GPU_SIZE dst_offset,
370 XGL_GPU_SIZE size)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800371{
Chia-I Wuf3a27252014-11-24 15:27:01 +0800372 return !((src_offset | dst_offset | size) & 0x3);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800373}
374
375static XGL_FORMAT cmd_meta_img_raw_format(const struct intel_cmd *cmd,
376 XGL_FORMAT format)
377{
Chia-I Wuffdde352014-12-20 15:12:16 +0800378 switch (icd_format_get_size(format)) {
379 case 1:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700380 format = XGL_FMT_R8_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800381 break;
382 case 2:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700383 format = XGL_FMT_R16_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800384 break;
385 case 4:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700386 format = XGL_FMT_R32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800387 break;
388 case 8:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700389 format = XGL_FMT_R32G32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800390 break;
391 case 16:
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700392 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuffdde352014-12-20 15:12:16 +0800393 break;
394 default:
395 assert(!"unsupported image format for raw blit op");
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700396 format = XGL_FMT_UNDEFINED;
Chia-I Wuffdde352014-12-20 15:12:16 +0800397 break;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800398 }
399
400 return format;
401}
402
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600403ICD_EXPORT void XGLAPI xglCmdCopyBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800404 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800405 XGL_BUFFER srcBuffer,
406 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600407 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800408 const XGL_BUFFER_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800409{
410 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800411 struct intel_buf *src = intel_buf(srcBuffer);
412 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800413 struct intel_cmd_meta meta;
414 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600415 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800416
417 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800418 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800419
Chia-I Wuc14d1562014-10-17 09:49:22 +0800420 meta.height = 1;
421 meta.samples = 1;
422
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700423 format = XGL_FMT_UNDEFINED;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800424
425 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800426 const XGL_BUFFER_COPY *region = &pRegions[i];
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700427 XGL_FORMAT fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800428
Chia-I Wuf3a27252014-11-24 15:27:01 +0800429 meta.src.x = region->srcOffset;
430 meta.dst.x = region->destOffset;
431 meta.width = region->copySize;
432
433 if (cmd_meta_mem_dword_aligned(cmd, region->srcOffset,
434 region->destOffset, region->copySize)) {
435 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
436 meta.src.x /= 4;
437 meta.dst.x /= 4;
438 meta.width /= 4;
439
440 /*
441 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to
442 * be 16
443 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700444 fmt = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800445 } else {
446 if (cmd_gen(cmd) == INTEL_GEN(6)) {
447 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
448 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800449 "unaligned xglCmdCopyBuffer unsupported");
Chia-I Wuf3a27252014-11-24 15:27:01 +0800450 cmd->result = XGL_ERROR_UNKNOWN;
451 continue;
452 }
453
454 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM_UNALIGNED;
455
456 /*
457 * INTEL_DEV_META_VS_COPY_MEM_UNALIGNED is untyped but expects the
458 * stride to be 4
459 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700460 fmt = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800461 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800462
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700463 if (format != fmt) {
464 format = fmt;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800465
Chia-I Wu714df452015-01-01 07:55:04 +0800466 cmd_meta_set_src_for_buf(cmd, src, format, &meta);
467 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800468 }
469
Chia-I Wuc14d1562014-10-17 09:49:22 +0800470 cmd_draw_meta(cmd, &meta);
471 }
472}
473
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600474ICD_EXPORT void XGLAPI xglCmdCopyImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800475 XGL_CMD_BUFFER cmdBuffer,
476 XGL_IMAGE srcImage,
477 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600478 uint32_t regionCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800479 const XGL_IMAGE_COPY* pRegions)
480{
481 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
482 struct intel_img *src = intel_img(srcImage);
483 struct intel_img *dst = intel_img(destImage);
484 struct intel_cmd_meta meta;
485 XGL_FORMAT raw_format;
Cody Northrop30a2b462015-02-10 09:28:30 -0700486 bool raw_copy = false;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600487 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800488
489 if (src->type != dst->type) {
490 cmd->result = XGL_ERROR_UNKNOWN;
491 return;
492 }
493
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700494 if (src->layout.format == dst->layout.format) {
Chia-I Wuc14d1562014-10-17 09:49:22 +0800495 raw_copy = true;
496 raw_format = cmd_meta_img_raw_format(cmd, src->layout.format);
497 } else if (icd_format_is_compressed(src->layout.format) ||
498 icd_format_is_compressed(dst->layout.format)) {
499 cmd->result = XGL_ERROR_UNKNOWN;
500 return;
501 }
502
503 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800504 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800505
506 cmd_meta_set_src_for_img(cmd, src,
507 (raw_copy) ? raw_format : src->layout.format,
508 XGL_IMAGE_ASPECT_COLOR, &meta);
509
510 meta.samples = dst->samples;
511
512 for (i = 0; i < regionCount; i++) {
513 const XGL_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600514 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800515
516 meta.shader_id = get_shader_id(cmd->dev, src,
517 (region->extent.depth > 1));
518
519 meta.src.lod = region->srcSubresource.mipLevel;
520 meta.src.layer = region->srcSubresource.arraySlice +
521 region->srcOffset.z;
522 meta.src.x = region->srcOffset.x;
523 meta.src.y = region->srcOffset.y;
524
525 meta.dst.lod = region->destSubresource.mipLevel;
526 meta.dst.layer = region->destSubresource.arraySlice +
527 region->destOffset.z;
528 meta.dst.x = region->destOffset.x;
529 meta.dst.y = region->destOffset.y;
530
531 meta.width = region->extent.width;
532 meta.height = region->extent.height;
533
534 for (j = 0; j < region->extent.depth; j++) {
535 cmd_meta_set_dst_for_img(cmd, dst,
536 (raw_copy) ? raw_format : dst->layout.format,
537 meta.dst.lod, meta.dst.layer, &meta);
538
539 cmd_draw_meta(cmd, &meta);
540
541 meta.src.layer++;
542 meta.dst.layer++;
543 }
544 }
545}
546
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600547ICD_EXPORT void XGLAPI xglCmdCopyBufferToImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800548 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800549 XGL_BUFFER srcBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800550 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600551 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800552 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800553{
554 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800555 struct intel_buf *buf = intel_buf(srcBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800556 struct intel_img *img = intel_img(destImage);
557 struct intel_cmd_meta meta;
558 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600559 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800560
561 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800562 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800563
564 meta.shader_id = INTEL_DEV_META_FS_COPY_MEM_TO_IMG;
565 meta.samples = img->samples;
566
567 format = cmd_meta_img_raw_format(cmd, img->layout.format);
Chia-I Wu714df452015-01-01 07:55:04 +0800568 cmd_meta_set_src_for_buf(cmd, buf, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800569
570 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800571 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600572 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800573
Chia-I Wu714df452015-01-01 07:55:04 +0800574 meta.src.x = region->bufferOffset / icd_format_get_size(format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800575
576 meta.dst.lod = region->imageSubresource.mipLevel;
577 meta.dst.layer = region->imageSubresource.arraySlice +
578 region->imageOffset.z;
579 meta.dst.x = region->imageOffset.x;
580 meta.dst.y = region->imageOffset.y;
581
582 meta.width = region->imageExtent.width;
583 meta.height = region->imageExtent.height;
584
585 for (j = 0; j < region->imageExtent.depth; j++) {
586 cmd_meta_set_dst_for_img(cmd, img, format,
587 meta.dst.lod, meta.dst.layer, &meta);
588
589 cmd_draw_meta(cmd, &meta);
590
591 meta.src.x += meta.width * meta.height;
592 meta.dst.layer++;
593 }
594 }
595}
596
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600597ICD_EXPORT void XGLAPI xglCmdCopyImageToBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800598 XGL_CMD_BUFFER cmdBuffer,
599 XGL_IMAGE srcImage,
Chia-I Wu714df452015-01-01 07:55:04 +0800600 XGL_BUFFER destBuffer,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600601 uint32_t regionCount,
Chia-I Wu714df452015-01-01 07:55:04 +0800602 const XGL_BUFFER_IMAGE_COPY* pRegions)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800603{
604 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
605 struct intel_img *img = intel_img(srcImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800606 struct intel_buf *buf = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800607 struct intel_cmd_meta meta;
Chia-I Wu714df452015-01-01 07:55:04 +0800608 XGL_FORMAT img_format, buf_format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600609 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800610
611 memset(&meta, 0, sizeof(meta));
Chia-I Wua44b6482014-12-20 14:58:01 +0800612 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800613
Chia-I Wua44b6482014-12-20 14:58:01 +0800614 img_format = cmd_meta_img_raw_format(cmd, img->layout.format);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800615
Chia-I Wu714df452015-01-01 07:55:04 +0800616 /* buf_format is ignored by hw, but we derive stride from it */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700617 switch (img_format) {
618 case XGL_FMT_R8_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800619 meta.shader_id = INTEL_DEV_META_VS_COPY_R8_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700620 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800621 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700622 case XGL_FMT_R16_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800623 meta.shader_id = INTEL_DEV_META_VS_COPY_R16_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700624 buf_format = XGL_FMT_R8G8B8A8_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800625 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700626 case XGL_FMT_R32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800627 meta.shader_id = INTEL_DEV_META_VS_COPY_R32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700628 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800629 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700630 case XGL_FMT_R32G32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800631 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700632 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800633 break;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700634 case XGL_FMT_R32G32B32A32_UINT:
Chia-I Wua44b6482014-12-20 14:58:01 +0800635 meta.shader_id = INTEL_DEV_META_VS_COPY_R32G32B32A32_TO_MEM;
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700636 buf_format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wua44b6482014-12-20 14:58:01 +0800637 break;
638 default:
639 break;
640 }
641
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700642 if (img_format == XGL_FMT_UNDEFINED ||
Chia-I Wua44b6482014-12-20 14:58:01 +0800643 (cmd_gen(cmd) == INTEL_GEN(6) &&
644 icd_format_get_size(img_format) < 4)) {
645 intel_dev_log(cmd->dev, XGL_DBG_MSG_ERROR,
646 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
Chia-I Wu714df452015-01-01 07:55:04 +0800647 "xglCmdCopyImageToBuffer with bpp %d unsupported",
Chia-I Wua44b6482014-12-20 14:58:01 +0800648 icd_format_get_size(img->layout.format));
649 cmd->result = XGL_ERROR_UNKNOWN;
650 return;
651 }
652
653 cmd_meta_set_src_for_img(cmd, img, img_format,
654 XGL_IMAGE_ASPECT_COLOR, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800655 cmd_meta_set_dst_for_buf(cmd, buf, buf_format, &meta);
Chia-I Wua44b6482014-12-20 14:58:01 +0800656
Chia-I Wuc14d1562014-10-17 09:49:22 +0800657 meta.samples = 1;
658
659 for (i = 0; i < regionCount; i++) {
Chia-I Wu714df452015-01-01 07:55:04 +0800660 const XGL_BUFFER_IMAGE_COPY *region = &pRegions[i];
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600661 uint32_t j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800662
Chia-I Wuc14d1562014-10-17 09:49:22 +0800663 meta.src.lod = region->imageSubresource.mipLevel;
664 meta.src.layer = region->imageSubresource.arraySlice +
665 region->imageOffset.z;
666 meta.src.x = region->imageOffset.x;
667 meta.src.y = region->imageOffset.y;
668
Chia-I Wu714df452015-01-01 07:55:04 +0800669 meta.dst.x = region->bufferOffset / icd_format_get_size(img_format);
Chia-I Wua44b6482014-12-20 14:58:01 +0800670 meta.width = region->imageExtent.width;
671 meta.height = region->imageExtent.height;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800672
673 for (j = 0; j < region->imageExtent.depth; j++) {
674 cmd_draw_meta(cmd, &meta);
675
676 meta.src.layer++;
Chia-I Wua44b6482014-12-20 14:58:01 +0800677 meta.dst.x += meta.width * meta.height;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800678 }
679 }
680}
681
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600682ICD_EXPORT void XGLAPI xglCmdCloneImageData(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800683 XGL_CMD_BUFFER cmdBuffer,
684 XGL_IMAGE srcImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000685 XGL_IMAGE_LAYOUT srcImageLayout,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800686 XGL_IMAGE destImage,
Mike Stroyan55658c22014-12-04 11:08:39 +0000687 XGL_IMAGE_LAYOUT destImageLayout)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800688{
Chia-I Wud788fc62014-12-22 14:24:11 +0800689 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
690 struct intel_img *src = intel_img(srcImage);
691 struct intel_img *dst = intel_img(destImage);
Chia-I Wu714df452015-01-01 07:55:04 +0800692 struct intel_buf *src_buf, *dst_buf;
693 XGL_BUFFER_CREATE_INFO buf_info;
694 XGL_BUFFER_COPY buf_region;
695 XGL_RESULT res;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800696
Chia-I Wu714df452015-01-01 07:55:04 +0800697 memset(&buf_info, 0, sizeof(buf_info));
698 buf_info.sType = XGL_STRUCTURE_TYPE_BUFFER_CREATE_INFO;
699 buf_info.size = src->obj.mem->size;
700
701 memset(&buf_region, 0, sizeof(buf_region));
702 buf_region.copySize = src->obj.mem->size;
703
704 res = intel_buf_create(cmd->dev, &buf_info, &src_buf);
705 if (res != XGL_SUCCESS) {
706 cmd->result = res;
707 return;
708 }
709
710 res = intel_buf_create(cmd->dev, &buf_info, &dst_buf);
711 if (res != XGL_SUCCESS) {
712 intel_buf_destroy(src_buf);
713 cmd->result = res;
714 return;
715 }
716
717 intel_obj_bind_mem(&src_buf->obj, src->obj.mem, 0);
718 intel_obj_bind_mem(&dst_buf->obj, dst->obj.mem, 0);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800719
Chia-I Wud788fc62014-12-22 14:24:11 +0800720 cmd_batch_flush(cmd, GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH);
Chia-I Wu714df452015-01-01 07:55:04 +0800721 xglCmdCopyBuffer(cmdBuffer, (XGL_BUFFER) src_buf,
722 (XGL_BUFFER) dst_buf, 1, &buf_region);
723
724 intel_buf_destroy(src_buf);
725 intel_buf_destroy(dst_buf);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800726}
727
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600728ICD_EXPORT void XGLAPI xglCmdUpdateBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800729 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800730 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800731 XGL_GPU_SIZE destOffset,
732 XGL_GPU_SIZE dataSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600733 const uint32_t* pData)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800734{
735 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800736 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800737 struct intel_cmd_meta meta;
738 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800739 uint32_t *ptr;
740 uint32_t offset;
741
Chia-I Wuf3a27252014-11-24 15:27:01 +0800742 /* must be 4-byte aligned */
743 if ((destOffset | dataSize) & 3) {
744 cmd->result = XGL_ERROR_UNKNOWN;
745 return;
746 }
747
Chia-I Wuc14d1562014-10-17 09:49:22 +0800748 /* write to dynamic state writer first */
749 offset = cmd_state_pointer(cmd, INTEL_CMD_ITEM_BLOB, 32,
750 (dataSize + 3) / 4, &ptr);
751 memcpy(ptr, pData, dataSize);
752
Chia-I Wuc14d1562014-10-17 09:49:22 +0800753 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800754 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800755
Chia-I Wuf3a27252014-11-24 15:27:01 +0800756 meta.shader_id = INTEL_DEV_META_VS_COPY_MEM;
757
758 meta.src.x = offset / 4;
759 meta.dst.x = destOffset / 4;
760 meta.width = dataSize / 4;
761 meta.height = 1;
762 meta.samples = 1;
763
764 /*
765 * INTEL_DEV_META_VS_COPY_MEM is untyped but expects the stride to be 16
766 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700767 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800768
769 cmd_meta_set_src_for_writer(cmd, INTEL_CMD_WRITER_STATE,
770 offset + dataSize, format, &meta);
Chia-I Wu714df452015-01-01 07:55:04 +0800771 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800772
Chia-I Wuc14d1562014-10-17 09:49:22 +0800773 cmd_draw_meta(cmd, &meta);
774}
775
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600776ICD_EXPORT void XGLAPI xglCmdFillBuffer(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800777 XGL_CMD_BUFFER cmdBuffer,
Chia-I Wu714df452015-01-01 07:55:04 +0800778 XGL_BUFFER destBuffer,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800779 XGL_GPU_SIZE destOffset,
780 XGL_GPU_SIZE fillSize,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600781 uint32_t data)
Chia-I Wuc14d1562014-10-17 09:49:22 +0800782{
783 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
Chia-I Wu714df452015-01-01 07:55:04 +0800784 struct intel_buf *dst = intel_buf(destBuffer);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800785 struct intel_cmd_meta meta;
786 XGL_FORMAT format;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800787
788 /* must be 4-byte aligned */
789 if ((destOffset | fillSize) & 3) {
790 cmd->result = XGL_ERROR_UNKNOWN;
791 return;
792 }
793
794 memset(&meta, 0, sizeof(meta));
Chia-I Wuf3a27252014-11-24 15:27:01 +0800795 meta.mode = INTEL_CMD_META_VS_POINTS;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800796
Chia-I Wuf3a27252014-11-24 15:27:01 +0800797 meta.shader_id = INTEL_DEV_META_VS_FILL_MEM;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800798
799 meta.clear_val[0] = data;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800800
Chia-I Wuf3a27252014-11-24 15:27:01 +0800801 meta.dst.x = destOffset / 4;
802 meta.width = fillSize / 4;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800803 meta.height = 1;
804 meta.samples = 1;
805
Chia-I Wuf3a27252014-11-24 15:27:01 +0800806 /*
807 * INTEL_DEV_META_VS_FILL_MEM is untyped but expects the stride to be 16
808 */
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700809 format = XGL_FMT_R32G32B32A32_UINT;
Chia-I Wuf3a27252014-11-24 15:27:01 +0800810
Chia-I Wu714df452015-01-01 07:55:04 +0800811 cmd_meta_set_dst_for_buf(cmd, dst, format, &meta);
Chia-I Wuf3a27252014-11-24 15:27:01 +0800812
Chia-I Wuc14d1562014-10-17 09:49:22 +0800813 cmd_draw_meta(cmd, &meta);
814}
815
816static void cmd_meta_clear_image(struct intel_cmd *cmd,
817 struct intel_img *img,
818 XGL_FORMAT format,
819 struct intel_cmd_meta *meta,
820 const XGL_IMAGE_SUBRESOURCE_RANGE *range)
821{
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600822 uint32_t mip_levels, array_size;
823 uint32_t i, j;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800824
825 if (range->baseMipLevel >= img->mip_levels ||
826 range->baseArraySlice >= img->array_size)
827 return;
828
829 mip_levels = img->mip_levels - range->baseMipLevel;
830 if (mip_levels > range->mipLevels)
831 mip_levels = range->mipLevels;
832
833 array_size = img->array_size - range->baseArraySlice;
834 if (array_size > range->arraySize)
835 array_size = range->arraySize;
836
Chia-I Wuc14d1562014-10-17 09:49:22 +0800837 for (i = 0; i < mip_levels; i++) {
Chia-I Wufaaed472014-10-28 14:17:43 +0800838 meta->dst.lod = range->baseMipLevel + i;
839 meta->dst.layer = range->baseArraySlice;
840
Chia-I Wuc14d1562014-10-17 09:49:22 +0800841 meta->width = u_minify(img->layout.width0, meta->dst.lod);
842 meta->height = u_minify(img->layout.height0, meta->dst.lod);
843
844 for (j = 0; j < array_size; j++) {
845 if (range->aspect == XGL_IMAGE_ASPECT_COLOR) {
846 cmd_meta_set_dst_for_img(cmd, img, format,
847 meta->dst.lod, meta->dst.layer, meta);
848
849 cmd_draw_meta(cmd, meta);
850 } else {
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800851 cmd_meta_set_ds_view(cmd, img, meta->dst.lod,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800852 meta->dst.layer, meta);
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800853 cmd_meta_set_ds_state(cmd, range->aspect,
854 meta->clear_val[1], meta);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800855
856 cmd_draw_meta(cmd, meta);
857
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800858 intel_ds_view_destroy(meta->ds.view);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800859 }
860
861 meta->dst.layer++;
862 }
Chia-I Wuc14d1562014-10-17 09:49:22 +0800863 }
864}
865
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600866ICD_EXPORT void XGLAPI xglCmdClearColorImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800867 XGL_CMD_BUFFER cmdBuffer,
868 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600869 const float color[4],
870 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800871 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
872{
873 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
874 struct intel_img *img = intel_img(image);
875 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600876 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800877
878 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800879 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800880
881 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
882 meta.samples = img->samples;
883
884 meta.clear_val[0] = u_fui(color[0]);
885 meta.clear_val[1] = u_fui(color[1]);
886 meta.clear_val[2] = u_fui(color[2]);
887 meta.clear_val[3] = u_fui(color[3]);
888
889 for (i = 0; i < rangeCount; i++) {
890 cmd_meta_clear_image(cmd, img, img->layout.format,
891 &meta, &pRanges[i]);
892 }
893}
894
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600895ICD_EXPORT void XGLAPI xglCmdClearColorImageRaw(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800896 XGL_CMD_BUFFER cmdBuffer,
897 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600898 const uint32_t color[4],
899 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800900 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
901{
902 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
903 struct intel_img *img = intel_img(image);
904 struct intel_cmd_meta meta;
905 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600906 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800907
908 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800909 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800910
911 meta.shader_id = INTEL_DEV_META_FS_CLEAR_COLOR;
912 meta.samples = img->samples;
913
Chia-I Wuffdde352014-12-20 15:12:16 +0800914 icd_format_get_raw_value(img->layout.format, color, meta.clear_val);
Chia-I Wuc14d1562014-10-17 09:49:22 +0800915 format = cmd_meta_img_raw_format(cmd, img->layout.format);
916
917 for (i = 0; i < rangeCount; i++)
918 cmd_meta_clear_image(cmd, img, format, &meta, &pRanges[i]);
919}
920
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600921ICD_EXPORT void XGLAPI xglCmdClearDepthStencil(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800922 XGL_CMD_BUFFER cmdBuffer,
923 XGL_IMAGE image,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600924 float depth,
925 uint32_t stencil,
926 uint32_t rangeCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800927 const XGL_IMAGE_SUBRESOURCE_RANGE* pRanges)
928{
929 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
930 struct intel_img *img = intel_img(image);
931 struct intel_cmd_meta meta;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600932 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800933
934 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800935 meta.mode = INTEL_CMD_META_DEPTH_STENCIL_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800936
937 meta.shader_id = INTEL_DEV_META_FS_CLEAR_DEPTH;
938 meta.samples = img->samples;
939
Chia-I Wu429a0aa2014-10-24 11:57:51 +0800940 meta.clear_val[0] = u_fui(depth);
941 meta.clear_val[1] = stencil;
942
Chia-I Wuc14d1562014-10-17 09:49:22 +0800943 for (i = 0; i < rangeCount; i++) {
944 const XGL_IMAGE_SUBRESOURCE_RANGE *range = &pRanges[i];
945
Chia-I Wuc14d1562014-10-17 09:49:22 +0800946 cmd_meta_clear_image(cmd, img, img->layout.format,
947 &meta, range);
948 }
949}
950
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600951ICD_EXPORT void XGLAPI xglCmdResolveImage(
Chia-I Wuc14d1562014-10-17 09:49:22 +0800952 XGL_CMD_BUFFER cmdBuffer,
953 XGL_IMAGE srcImage,
954 XGL_IMAGE destImage,
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600955 uint32_t rectCount,
Chia-I Wuc14d1562014-10-17 09:49:22 +0800956 const XGL_IMAGE_RESOLVE* pRects)
957{
958 struct intel_cmd *cmd = intel_cmd(cmdBuffer);
959 struct intel_img *src = intel_img(srcImage);
960 struct intel_img *dst = intel_img(destImage);
961 struct intel_cmd_meta meta;
962 XGL_FORMAT format;
Mark Lobodzinskie2d07a52015-01-29 08:55:56 -0600963 uint32_t i;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800964
965 if (src->samples <= 1 || dst->samples > 1 ||
Jeremy Hayes2b7e88a2015-01-23 08:51:43 -0700966 src->layout.format != dst->layout.format) {
Chia-I Wuc14d1562014-10-17 09:49:22 +0800967 cmd->result = XGL_ERROR_UNKNOWN;
968 return;
969 }
970
971 memset(&meta, 0, sizeof(meta));
Chia-I Wu29e6f502014-11-24 14:27:29 +0800972 meta.mode = INTEL_CMD_META_FS_RECT;
Chia-I Wuc14d1562014-10-17 09:49:22 +0800973
974 switch (src->samples) {
975 case 2:
976 default:
977 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_2X;
978 break;
979 case 4:
980 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_4X;
981 break;
982 case 8:
983 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_8X;
984 break;
985 case 16:
986 meta.shader_id = INTEL_DEV_META_FS_RESOLVE_16X;
987 break;
988 }
989
990 meta.samples = 1;
991
992 format = cmd_meta_img_raw_format(cmd, src->layout.format);
993 cmd_meta_set_src_for_img(cmd, src, format, XGL_IMAGE_ASPECT_COLOR, &meta);
994
995 for (i = 0; i < rectCount; i++) {
996 const XGL_IMAGE_RESOLVE *rect = &pRects[i];
997
998 meta.src.lod = rect->srcSubresource.mipLevel;
999 meta.src.layer = rect->srcSubresource.arraySlice;
1000 meta.src.x = rect->srcOffset.x;
1001 meta.src.y = rect->srcOffset.y;
1002
1003 meta.dst.lod = rect->destSubresource.mipLevel;
1004 meta.dst.layer = rect->destSubresource.arraySlice;
1005 meta.dst.x = rect->destOffset.x;
1006 meta.dst.y = rect->destOffset.y;
1007
1008 meta.width = rect->extent.width;
1009 meta.height = rect->extent.height;
1010
1011 cmd_meta_set_dst_for_img(cmd, dst, format,
1012 meta.dst.lod, meta.dst.layer, &meta);
1013
1014 cmd_draw_meta(cmd, &meta);
1015 }
1016}