blob: f70a1ca33d1ad6b6c50f6d3d87de4f67d7487624 [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
Chia-I Wude2bb862014-08-19 14:32:47 +080025#include "dispatch.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080026#include "gpu.h"
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060027#include "dev.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080028#include "obj.h"
29
30/**
31 * Return true if an (not so) arbitrary pointer casted to intel_base points to
32 * a valid intel_base. This assumes at least the first sizeof(void*) bytes of
33 * the address are accessible, and they does not happen to be our magic
34 * values.
35 */
36bool intel_base_is_valid(const struct intel_base *base)
37{
Chia-I Wu6a42c2a2014-08-19 14:36:47 +080038 if (base->dispatch != intel_dispatch_get(true) &&
39 base->dispatch != intel_dispatch_get(false))
Chia-I Wu82f50aa2014-08-05 10:43:03 +080040 return false;
41
42 return !intel_gpu_is_valid((const struct intel_gpu *) base);
43}
44
Chia-I Wu26f0bd02014-08-07 10:38:40 +080045XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
46 XGL_SIZE *size, XGL_VOID *data)
47{
48 XGL_RESULT ret = XGL_SUCCESS;
49 XGL_SIZE s;
50
51 switch (type) {
52 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
53 s = sizeof(XGL_MEMORY_REQUIREMENTS);
54 memset(data, 0, s);
55 *size = s;
56 break;
57 default:
58 ret = XGL_ERROR_INVALID_VALUE;
59 break;
60 }
61
62 return ret;
63}
64
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080065static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
66 const void *create_info)
67{
68 const union {
69 const void *ptr;
70 const struct {
71 XGL_STRUCTURE_TYPE struct_type;
72 XGL_VOID *next;
73 } *header;
74 } info = { .ptr = create_info };
75 XGL_SIZE shallow_copy = 0;
76
77 if (!create_info)
78 return true;
79
Chia-I Wub1076d72014-08-18 16:10:20 +080080 switch (dbg->type) {
81 case XGL_DBG_OBJECT_DEVICE:
82 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080083 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080084 case XGL_DBG_OBJECT_GPU_MEMORY:
85 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080086 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
87 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080088 case XGL_DBG_OBJECT_EVENT:
89 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080090 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
91 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080092 case XGL_DBG_OBJECT_FENCE:
93 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080094 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
95 break;
Chia-I Wub1076d72014-08-18 16:10:20 +080096 case XGL_DBG_OBJECT_QUERY_POOL:
97 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -060098 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
99 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800100 case XGL_DBG_OBJECT_IMAGE:
101 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
Chia-I Wufeb441f2014-08-08 21:27:38 +0800102 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
103 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800104 case XGL_DBG_OBJECT_IMAGE_VIEW:
105 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800106 shallow_copy = sizeof(XGL_IMAGE_VIEW_CREATE_INFO);
107 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800108 case XGL_DBG_OBJECT_COLOR_TARGET_VIEW:
109 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800110 shallow_copy = sizeof(XGL_COLOR_ATTACHMENT_VIEW_CREATE_INFO);
111 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800112 case XGL_DBG_OBJECT_DEPTH_STENCIL_VIEW:
113 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_VIEW_CREATE_INFO);
Chia-I Wu5a323262014-08-11 10:31:53 +0800114 shallow_copy = sizeof(XGL_DEPTH_STENCIL_VIEW_CREATE_INFO);
115 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800116 case XGL_DBG_OBJECT_SAMPLER:
117 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
Chia-I Wu28b89962014-08-18 14:40:49 +0800118 shallow_copy = sizeof(XGL_SAMPLER_CREATE_INFO);
119 break;
Chia-I Wub1076d72014-08-18 16:10:20 +0800120 case XGL_DBG_OBJECT_DESCRIPTOR_SET:
121 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DESCRIPTOR_SET_CREATE_INFO);
Chia-I Wub8d04c82014-08-18 15:51:10 +0800122 shallow_copy = sizeof(XGL_DESCRIPTOR_SET_CREATE_INFO);
123 break;
Chia-I Wua5714e82014-08-11 15:33:42 +0800124 case XGL_DBG_OBJECT_VIEWPORT_STATE:
125 /* no struct header! */
126 shallow_copy = sizeof(XGL_VIEWPORT_STATE_CREATE_INFO);
127 break;
128 case XGL_DBG_OBJECT_RASTER_STATE:
129 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_RASTER_STATE_CREATE_INFO);
130 shallow_copy = sizeof(XGL_RASTER_STATE_CREATE_INFO);
131 break;
132 case XGL_DBG_OBJECT_MSAA_STATE:
133 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_MSAA_STATE_CREATE_INFO);
134 shallow_copy = sizeof(XGL_MSAA_STATE_CREATE_INFO);
135 break;
136 case XGL_DBG_OBJECT_COLOR_BLEND_STATE:
137 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_COLOR_BLEND_STATE_CREATE_INFO);
138 shallow_copy = sizeof(XGL_COLOR_BLEND_STATE_CREATE_INFO);
139 break;
140 case XGL_DBG_OBJECT_DEPTH_STENCIL_STATE:
141 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_DEPTH_STENCIL_STATE_CREATE_INFO);
142 shallow_copy = sizeof(XGL_DEPTH_STENCIL_STATE_CREATE_INFO);
143 break;
Chia-I Wu730e5362014-08-19 12:15:09 +0800144 case XGL_DBG_OBJECT_CMD_BUFFER:
145 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_CMD_BUFFER_CREATE_INFO);
146 shallow_copy = sizeof(XGL_CMD_BUFFER_CREATE_INFO);
147 break;
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600148 case XGL_DBG_OBJECT_GRAPHICS_PIPELINE:
149 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
150 break;
Courtney Goeltzenleuchter52ec3362014-08-19 11:52:02 -0600151 case XGL_DBG_OBJECT_SHADER:
152 assert(info.header->struct_type == XGL_STRUCTURE_TYPE_SHADER_CREATE_INFO);
153 shallow_copy = sizeof(XGL_SHADER_CREATE_INFO);
154 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800155 default:
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600156 // log debug message regarding invalid struct_type?
157 intel_dev_log(dbg->dev, XGL_DBG_MSG_ERROR,
158 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
159 "Invalid Create Info type: 0x%x", info.header->struct_type);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800160 return false;
161 break;
162 }
163
164 if (shallow_copy) {
165 assert(!info.header->next);
166
167 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
168 if (!dbg->create_info)
169 return false;
170
171 memcpy(dbg->create_info, create_info, shallow_copy);
Chia-I Wue2934f92014-08-16 13:17:22 +0800172 dbg->create_info_size = shallow_copy;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800173 } else if (info.header->struct_type ==
174 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
175 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
176 XGL_DEVICE_CREATE_INFO *dst;
177 uint8_t *d;
178 XGL_SIZE size;
179 XGL_UINT i;
180
181 size = sizeof(*src);
Chia-I Wue2934f92014-08-16 13:17:22 +0800182 dbg->create_info_size = size;
183
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800184 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
185 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
186 for (i = 0; i < src->extensionCount; i++) {
187 size += 1 +
188 strlen((const char *) src->ppEnabledExtensionNames[i]);
189 }
190
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800191 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800192 if (!dst)
193 return false;
194
195 memcpy(dst, src, sizeof(*src));
196
197 d = (uint8_t *) dst;
198 d += sizeof(*src);
199
200 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
201 memcpy(d, src->pRequestedQueues, size);
202 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
203 d += size;
204
205 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
206 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
207
208 for (i = 0; i < src->extensionCount; i++) {
209 const XGL_SIZE len =
210 strlen((const char *) src->ppEnabledExtensionNames[i]);
211
212 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
213 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
214
215 size += len + 1;
216 }
Courtney Goeltzenleuchter05a60542014-08-15 14:54:34 -0600217 } else if (info.header->struct_type == XGL_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO) {
218 // TODO: What do we want to copy here?
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800219 }
220
221 return true;
222}
223
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800224/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800225 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800226 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800227 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600228struct intel_base_dbg *intel_base_dbg_create(struct intel_dev *dev,
229 XGL_DBG_OBJECT_TYPE type,
Chia-I Wu660caf82014-08-07 10:54:26 +0800230 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800231 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800232{
Chia-I Wu660caf82014-08-07 10:54:26 +0800233 struct intel_base_dbg *dbg;
234
Chia-I Wubbf2c932014-08-07 12:20:08 +0800235 if (!dbg_size)
236 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800237
Chia-I Wubbf2c932014-08-07 12:20:08 +0800238 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800239
Chia-I Wubbf2c932014-08-07 12:20:08 +0800240 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800241 if (!dbg)
242 return NULL;
243
Chia-I Wubbf2c932014-08-07 12:20:08 +0800244 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800245
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800246 dbg->alloc_id = icd_get_allocator_id();
247 dbg->type = type;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600248 dbg->dev = dev;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800249
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800250 if (!base_dbg_copy_create_info(dbg, create_info)) {
251 icd_free(dbg);
252 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800253 }
254
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800255 return dbg;
256}
257
258void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
259{
Chia-I Wu660caf82014-08-07 10:54:26 +0800260 if (dbg->tag)
261 icd_free(dbg->tag);
262
263 if (dbg->create_info)
264 icd_free(dbg->create_info);
265
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800266 icd_free(dbg);
267}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800268
Chia-I Wubbf2c932014-08-07 12:20:08 +0800269/**
270 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
271 * object and the debug metadata. Memories are zeroed.
272 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600273struct intel_base *intel_base_create(struct intel_dev *dev,
274 XGL_SIZE obj_size, bool debug,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800275 XGL_DBG_OBJECT_TYPE type,
276 const void *create_info,
277 XGL_SIZE dbg_size)
278{
279 struct intel_base *base;
280
281 if (!obj_size)
282 obj_size = sizeof(*base);
283
284 assert(obj_size >= sizeof(*base));
285
286 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
287 if (!base)
288 return NULL;
289
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600290 if (dev == NULL) {
291 /*
292 * dev is NULL when we are creating the base device object
293 * Set dev now so that debug setup happens correctly
294 */
295 dev = (struct intel_dev *) base;
296 }
297
Chia-I Wubbf2c932014-08-07 12:20:08 +0800298 memset(base, 0, obj_size);
299
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800300 base->dispatch = intel_dispatch_get(debug);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800301 if (debug) {
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600302 base->dbg = intel_base_dbg_create(dev, type, create_info, dbg_size);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800303 if (!base->dbg) {
304 icd_free(base);
305 return NULL;
306 }
307 }
Chia-I Wu6a42c2a2014-08-19 14:36:47 +0800308
Chia-I Wubbf2c932014-08-07 12:20:08 +0800309 base->get_info = intel_base_get_info;
310
311 return base;
312}
313
314void intel_base_destroy(struct intel_base *base)
315{
316 if (base->dbg)
317 intel_base_dbg_destroy(base->dbg);
318 icd_free(base);
319}
320
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800321XGL_RESULT XGLAPI intelDestroyObject(
322 XGL_OBJECT object)
323{
324 struct intel_obj *obj = intel_obj(object);
325
326 obj->destroy(obj);
327
328 return XGL_SUCCESS;
329}
330
331XGL_RESULT XGLAPI intelGetObjectInfo(
332 XGL_BASE_OBJECT object,
333 XGL_OBJECT_INFO_TYPE infoType,
334 XGL_SIZE* pDataSize,
335 XGL_VOID* pData)
336{
337 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800338
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800339 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800340}
341
342XGL_RESULT XGLAPI intelBindObjectMemory(
343 XGL_OBJECT object,
344 XGL_GPU_MEMORY mem,
345 XGL_GPU_SIZE offset)
346{
347 struct intel_obj *obj = intel_obj(object);
348
349 obj->mem = mem;
350 obj->offset = offset;
351
352 return XGL_SUCCESS;
353}
Chia-I Wu7ec9f342014-08-19 10:47:53 +0800354
355XGL_RESULT XGLAPI intelDbgSetObjectTag(
356 XGL_BASE_OBJECT object,
357 XGL_SIZE tagSize,
358 const XGL_VOID* pTag)
359{
360 struct intel_base *base = intel_base(object);
361 struct intel_base_dbg *dbg = base->dbg;
362 void *tag;
363
364 if (!dbg)
365 return XGL_SUCCESS;
366
367 tag = icd_alloc(tagSize, 0, XGL_SYSTEM_ALLOC_DEBUG);
368 if (!tag)
369 return XGL_ERROR_OUT_OF_MEMORY;
370
371 memcpy(tag, pTag, tagSize);
372
373 if (dbg->tag)
374 icd_free(dbg->tag);
375
376 dbg->tag = tag;
377 dbg->tag_size = tagSize;
378
379 return XGL_SUCCESS;
380}