blob: dcef028648438268f1f53984d4d3413040ac8a35 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +08001// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07002/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07004 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080016#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070017#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070023#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070024#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -080025#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070026#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070030#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080032#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070033#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080034#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070035#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053038#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070039
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070041#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070045#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -070046#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070047#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -080058#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070065#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070072#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -080074#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +053076#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -070077
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070078enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -080094 TDM_QUAT,
95 TDM_QUIN,
96 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -070097 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800104 QUAT_AUX_PCM,
105 QUIN_AUX_PCM,
106 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700107 AUX_PCM_MAX,
108};
109
110enum {
111 PRIM_MI2S = 0,
112 SEC_MI2S,
113 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800114 QUAT_MI2S,
115 QUIN_MI2S,
116 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700117 MI2S_MAX,
118};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700119
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700120enum {
121 WSA_CDC_DMA_RX_0 = 0,
122 WSA_CDC_DMA_RX_1,
123 RX_CDC_DMA_RX_0,
124 RX_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_2,
126 RX_CDC_DMA_RX_3,
127 RX_CDC_DMA_RX_5,
128 CDC_DMA_RX_MAX,
129};
130
131enum {
132 WSA_CDC_DMA_TX_0 = 0,
133 WSA_CDC_DMA_TX_1,
134 WSA_CDC_DMA_TX_2,
135 TX_CDC_DMA_TX_0,
136 TX_CDC_DMA_TX_3,
137 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800138 VA_CDC_DMA_TX_0,
139 VA_CDC_DMA_TX_1,
140 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700141 CDC_DMA_TX_MAX,
142};
143
Banajit Goswami83a370d2019-03-05 16:15:21 -0800144enum {
145 SLIM_RX_7 = 0,
146 SLIM_RX_MAX,
147};
148enum {
149 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530150 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800151 SLIM_TX_MAX,
152};
153
Meng Wange8e53822019-03-18 10:49:50 +0800154enum {
155 AFE_LOOPBACK_TX_IDX = 0,
156 AFE_LOOPBACK_TX_IDX_MAX,
157};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700158struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700159 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700160 int usbc_en2_gpio; /* used by gpio driver API */
161 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
162 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
163 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800164 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
165 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700166 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
167 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
168 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
169 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
170 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800171 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700172};
173
174struct tdm_port {
175 u32 mode;
176 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700177};
178
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800179enum {
180 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700181 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800182 EXT_DISP_RX_IDX_MAX,
183};
184
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700185struct msm_wsa881x_dev_info {
186 struct device_node *of_node;
187 u32 index;
188};
189
190struct aux_codec_dev_info {
191 struct device_node *of_node;
192 u32 index;
193};
194
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700195struct dev_config {
196 u32 sample_rate;
197 u32 bit_format;
198 u32 channels;
199};
200
Banajit Goswami83a370d2019-03-05 16:15:21 -0800201/* Default configuration of slimbus channels */
202static struct dev_config slim_rx_cfg[] = {
203 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
204};
205
206static struct dev_config slim_tx_cfg[] = {
207 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530208 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800209};
210
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800211/* Default configuration of external display BE */
212static struct dev_config ext_disp_rx_cfg[] = {
213 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700214 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800215};
216
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700217static struct dev_config usb_rx_cfg = {
218 .sample_rate = SAMPLING_RATE_48KHZ,
219 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
220 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700221};
222
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700223static struct dev_config usb_tx_cfg = {
224 .sample_rate = SAMPLING_RATE_48KHZ,
225 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
226 .channels = 1,
227};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700228
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700229static struct dev_config proxy_rx_cfg = {
230 .sample_rate = SAMPLING_RATE_48KHZ,
231 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
232 .channels = 2,
233};
234
235static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
236 {
237 AFE_API_VERSION_I2S_CONFIG,
238 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
239 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
240 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
241 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
242 0,
243 },
244 {
245 AFE_API_VERSION_I2S_CONFIG,
246 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
247 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
248 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
249 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
250 0,
251 },
252 {
253 AFE_API_VERSION_I2S_CONFIG,
254 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
255 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
256 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
257 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
258 0,
259 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800260 {
261 AFE_API_VERSION_I2S_CONFIG,
262 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
263 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
264 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
265 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
266 0,
267 },
268 {
269 AFE_API_VERSION_I2S_CONFIG,
270 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
271 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
272 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
273 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
274 0,
275 },
276 {
277 AFE_API_VERSION_I2S_CONFIG,
278 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
279 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
280 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
281 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
282 0,
283 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700284};
285
286struct mi2s_conf {
287 struct mutex lock;
288 u32 ref_cnt;
289 u32 msm_is_mi2s_master;
290};
291
292static u32 mi2s_ebit_clk[MI2S_MAX] = {
293 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
294 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
295 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
296};
297
298static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
299
300/* Default configuration of TDM channels */
301static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
302 { /* PRI TDM */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
311 },
312 { /* SEC TDM */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
321 },
322 { /* TERT TDM */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
331 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800332 { /* QUAT TDM */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
341 },
342 { /* QUIN TDM */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
351 },
352 { /* SEN TDM */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
361 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700362};
363
364static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
365 { /* PRI TDM */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
374 },
375 { /* SEC TDM */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
384 },
385 { /* TERT TDM */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
394 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800395 { /* QUAT TDM */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
404 },
405 { /* QUIN TDM */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
414 },
415 { /* SEN TDM */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
424 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700425};
426
427/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700428static struct dev_config aux_pcm_rx_cfg[] = {
429 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700430 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800432 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700435};
436
437static struct dev_config aux_pcm_tx_cfg[] = {
438 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700439 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800441 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700444};
445
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700446/* Default configuration of MI2S channels */
447static struct dev_config mi2s_rx_cfg[] = {
448 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
449 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
450 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800451 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
452 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
453 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700454};
455
456static struct dev_config mi2s_tx_cfg[] = {
457 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
458 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800460 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
461 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
462 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700463};
464
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700465/* Default configuration of Codec DMA Interface RX */
466static struct dev_config cdc_dma_rx_cfg[] = {
467 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
468 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
469 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
470 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
471 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
472 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
473 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
474};
475
476/* Default configuration of Codec DMA Interface TX */
477static struct dev_config cdc_dma_tx_cfg[] = {
478 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
482 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
483 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800484 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
485 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
486 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700487};
488
Meng Wange8e53822019-03-18 10:49:50 +0800489static struct dev_config afe_loopback_tx_cfg[] = {
490 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
491};
492
Meng Wangd1db67c2019-04-17 12:41:34 +0800493static int msm_vi_feed_tx_ch = 2;
494static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700495static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
496 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700497static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700498static char const *ch_text[] = {"Two", "Three", "Four", "Five",
499 "Six", "Seven", "Eight"};
500static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
501 "KHZ_16", "KHZ_22P05",
502 "KHZ_32", "KHZ_44P1", "KHZ_48",
503 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
504 "KHZ_192", "KHZ_352P8", "KHZ_384"};
505static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
506 "Five", "Six", "Seven",
507 "Eight"};
508static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
509 "KHZ_48", "KHZ_176P4",
510 "KHZ_352P8"};
511static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
512static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
513 "Five", "Six", "Seven", "Eight"};
514static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
515static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
516 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
517 "KHZ_48", "KHZ_96", "KHZ_192"};
518static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
519 "Five", "Six", "Seven",
520 "Eight"};
521
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700522static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
523static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
524 "Five", "Six", "Seven",
525 "Eight"};
526static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
527 "KHZ_16", "KHZ_22P05",
528 "KHZ_32", "KHZ_44P1", "KHZ_48",
529 "KHZ_88P2", "KHZ_96",
530 "KHZ_176P4", "KHZ_192",
531 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700532static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
533 "KHZ_16", "KHZ_22P05",
534 "KHZ_32", "KHZ_44P1", "KHZ_48",
535 "KHZ_88P2", "KHZ_96",
536 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800537static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
538 "S24_3LE"};
539static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
540 "KHZ_192", "KHZ_32", "KHZ_44P1",
541 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800542static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
543 "KHZ_44P1", "KHZ_48",
544 "KHZ_88P2", "KHZ_96"};
545static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
546 "KHZ_44P1", "KHZ_48",
547 "KHZ_88P2", "KHZ_96"};
548static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
549 "KHZ_44P1", "KHZ_48",
550 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800551static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700552
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700553static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
556static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
557static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800559static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700560static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
564static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
565static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700567static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700568static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800570static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
572static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700573static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700574static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800576static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
578static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700579static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
580static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700581static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
582static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
583static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800584static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
585static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
586static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700587static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
588static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800590static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
591static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
592static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700593static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
596static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800598static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
599static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700601static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800604static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
605static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
606static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
611static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
613static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
614static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
617static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
618static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
619static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800620static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
621static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
622static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
624static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700625static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
626static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
627static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
628static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
629static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800630static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
631static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
632static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700633static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
634 cdc_dma_sample_rate_text);
635static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
636 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700637static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
638 cdc_dma_sample_rate_text);
639static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
640 cdc_dma_sample_rate_text);
641static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
642 cdc_dma_sample_rate_text);
643static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
644 cdc_dma_sample_rate_text);
645static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
646 cdc_dma_sample_rate_text);
647static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
648 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800649static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
650 cdc_dma_sample_rate_text);
651static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
652 cdc_dma_sample_rate_text);
653static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
654 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700655
656/* WCD9380 */
657static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
658static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
659static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
660static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
661static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
662static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
663 cdc80_dma_sample_rate_text);
664static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
665 cdc80_dma_sample_rate_text);
666static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
667 cdc80_dma_sample_rate_text);
668static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
669 cdc80_dma_sample_rate_text);
670static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
671 cdc80_dma_sample_rate_text);
672/* WCD9385 */
673static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
674static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
675static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
676static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
677static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
678static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
679 cdc_dma_sample_rate_text);
680static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
681 cdc_dma_sample_rate_text);
682static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
683 cdc_dma_sample_rate_text);
684static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
685 cdc_dma_sample_rate_text);
686static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
687 cdc_dma_sample_rate_text);
688
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800689static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
690static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
691static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
692 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800693static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
694static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
695static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800696static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700697
698static bool is_initial_boot;
699static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700700static struct snd_soc_aux_dev *msm_aux_dev;
701static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700702static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700703static int dmic_0_1_gpio_cnt;
704static int dmic_2_3_gpio_cnt;
705static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700706
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800707static void *def_wcd_mbhc_cal(void);
708
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700709/*
710 * Need to report LINEIN
711 * if R/L channel impedance is larger than 5K ohm
712 */
713static struct wcd_mbhc_config wcd_mbhc_cfg = {
714 .read_fw_bin = false,
715 .calibration = NULL,
716 .detect_extn_cable = true,
717 .mono_stero_detection = false,
718 .swap_gnd_mic = NULL,
719 .hs_ext_micbias = true,
720 .key_code[0] = KEY_MEDIA,
721 .key_code[1] = KEY_VOICECOMMAND,
722 .key_code[2] = KEY_VOLUMEUP,
723 .key_code[3] = KEY_VOLUMEDOWN,
724 .key_code[4] = 0,
725 .key_code[5] = 0,
726 .key_code[6] = 0,
727 .key_code[7] = 0,
728 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530729 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700730 .mbhc_micbias = MIC_BIAS_2,
731 .anc_micbias = MIC_BIAS_2,
732 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530733 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700734};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700735
736static inline int param_is_mask(int p)
737{
738 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
739 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
740}
741
742static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
743 int n)
744{
745 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
746}
747
748static void param_set_mask(struct snd_pcm_hw_params *p, int n,
749 unsigned int bit)
750{
751 if (bit >= SNDRV_MASK_MAX)
752 return;
753 if (param_is_mask(n)) {
754 struct snd_mask *m = param_to_mask(p, n);
755
756 m->bits[0] = 0;
757 m->bits[1] = 0;
758 m->bits[bit >> 5] |= (1 << (bit & 31));
759 }
760}
761
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700762static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
763 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700764{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700765 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700766
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700767 switch (usb_rx_cfg.sample_rate) {
768 case SAMPLING_RATE_384KHZ:
769 sample_rate_val = 12;
770 break;
771 case SAMPLING_RATE_352P8KHZ:
772 sample_rate_val = 11;
773 break;
774 case SAMPLING_RATE_192KHZ:
775 sample_rate_val = 10;
776 break;
777 case SAMPLING_RATE_176P4KHZ:
778 sample_rate_val = 9;
779 break;
780 case SAMPLING_RATE_96KHZ:
781 sample_rate_val = 8;
782 break;
783 case SAMPLING_RATE_88P2KHZ:
784 sample_rate_val = 7;
785 break;
786 case SAMPLING_RATE_48KHZ:
787 sample_rate_val = 6;
788 break;
789 case SAMPLING_RATE_44P1KHZ:
790 sample_rate_val = 5;
791 break;
792 case SAMPLING_RATE_32KHZ:
793 sample_rate_val = 4;
794 break;
795 case SAMPLING_RATE_22P05KHZ:
796 sample_rate_val = 3;
797 break;
798 case SAMPLING_RATE_16KHZ:
799 sample_rate_val = 2;
800 break;
801 case SAMPLING_RATE_11P025KHZ:
802 sample_rate_val = 1;
803 break;
804 case SAMPLING_RATE_8KHZ:
805 default:
806 sample_rate_val = 0;
807 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700808 }
809
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700810 ucontrol->value.integer.value[0] = sample_rate_val;
811 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
812 usb_rx_cfg.sample_rate);
813 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700814}
815
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700816static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
817 struct snd_ctl_elem_value *ucontrol)
818{
819 switch (ucontrol->value.integer.value[0]) {
820 case 12:
821 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
822 break;
823 case 11:
824 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
825 break;
826 case 10:
827 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
828 break;
829 case 9:
830 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
831 break;
832 case 8:
833 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
834 break;
835 case 7:
836 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
837 break;
838 case 6:
839 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
840 break;
841 case 5:
842 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
843 break;
844 case 4:
845 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
846 break;
847 case 3:
848 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
849 break;
850 case 2:
851 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
852 break;
853 case 1:
854 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
855 break;
856 case 0:
857 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
858 break;
859 default:
860 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
861 break;
862 }
863
864 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
865 __func__, ucontrol->value.integer.value[0],
866 usb_rx_cfg.sample_rate);
867 return 0;
868}
869
870static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
871 struct snd_ctl_elem_value *ucontrol)
872{
873 int sample_rate_val = 0;
874
875 switch (usb_tx_cfg.sample_rate) {
876 case SAMPLING_RATE_384KHZ:
877 sample_rate_val = 12;
878 break;
879 case SAMPLING_RATE_352P8KHZ:
880 sample_rate_val = 11;
881 break;
882 case SAMPLING_RATE_192KHZ:
883 sample_rate_val = 10;
884 break;
885 case SAMPLING_RATE_176P4KHZ:
886 sample_rate_val = 9;
887 break;
888 case SAMPLING_RATE_96KHZ:
889 sample_rate_val = 8;
890 break;
891 case SAMPLING_RATE_88P2KHZ:
892 sample_rate_val = 7;
893 break;
894 case SAMPLING_RATE_48KHZ:
895 sample_rate_val = 6;
896 break;
897 case SAMPLING_RATE_44P1KHZ:
898 sample_rate_val = 5;
899 break;
900 case SAMPLING_RATE_32KHZ:
901 sample_rate_val = 4;
902 break;
903 case SAMPLING_RATE_22P05KHZ:
904 sample_rate_val = 3;
905 break;
906 case SAMPLING_RATE_16KHZ:
907 sample_rate_val = 2;
908 break;
909 case SAMPLING_RATE_11P025KHZ:
910 sample_rate_val = 1;
911 break;
912 case SAMPLING_RATE_8KHZ:
913 sample_rate_val = 0;
914 break;
915 default:
916 sample_rate_val = 6;
917 break;
918 }
919
920 ucontrol->value.integer.value[0] = sample_rate_val;
921 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
922 usb_tx_cfg.sample_rate);
923 return 0;
924}
925
926static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
927 struct snd_ctl_elem_value *ucontrol)
928{
929 switch (ucontrol->value.integer.value[0]) {
930 case 12:
931 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
932 break;
933 case 11:
934 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
935 break;
936 case 10:
937 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
938 break;
939 case 9:
940 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
941 break;
942 case 8:
943 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
944 break;
945 case 7:
946 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
947 break;
948 case 6:
949 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
950 break;
951 case 5:
952 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
953 break;
954 case 4:
955 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
956 break;
957 case 3:
958 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
959 break;
960 case 2:
961 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
962 break;
963 case 1:
964 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
965 break;
966 case 0:
967 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
968 break;
969 default:
970 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
971 break;
972 }
973
974 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
975 __func__, ucontrol->value.integer.value[0],
976 usb_tx_cfg.sample_rate);
977 return 0;
978}
Meng Wange8e53822019-03-18 10:49:50 +0800979static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
980 struct snd_ctl_elem_value *ucontrol)
981{
982 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
983 afe_loopback_tx_cfg[0].channels);
984 ucontrol->value.enumerated.item[0] =
985 afe_loopback_tx_cfg[0].channels - 1;
986
987 return 0;
988}
989
990static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 afe_loopback_tx_cfg[0].channels =
994 ucontrol->value.enumerated.item[0] + 1;
995 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
996 afe_loopback_tx_cfg[0].channels);
997
998 return 1;
999}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001000
1001static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1002 struct snd_ctl_elem_value *ucontrol)
1003{
1004 switch (usb_rx_cfg.bit_format) {
1005 case SNDRV_PCM_FORMAT_S32_LE:
1006 ucontrol->value.integer.value[0] = 3;
1007 break;
1008 case SNDRV_PCM_FORMAT_S24_3LE:
1009 ucontrol->value.integer.value[0] = 2;
1010 break;
1011 case SNDRV_PCM_FORMAT_S24_LE:
1012 ucontrol->value.integer.value[0] = 1;
1013 break;
1014 case SNDRV_PCM_FORMAT_S16_LE:
1015 default:
1016 ucontrol->value.integer.value[0] = 0;
1017 break;
1018 }
1019
1020 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1021 __func__, usb_rx_cfg.bit_format,
1022 ucontrol->value.integer.value[0]);
1023 return 0;
1024}
1025
1026static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 int rc = 0;
1030
1031 switch (ucontrol->value.integer.value[0]) {
1032 case 3:
1033 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1034 break;
1035 case 2:
1036 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1037 break;
1038 case 1:
1039 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1040 break;
1041 case 0:
1042 default:
1043 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1044 break;
1045 }
1046 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1047 __func__, usb_rx_cfg.bit_format,
1048 ucontrol->value.integer.value[0]);
1049
1050 return rc;
1051}
1052
1053static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1054 struct snd_ctl_elem_value *ucontrol)
1055{
1056 switch (usb_tx_cfg.bit_format) {
1057 case SNDRV_PCM_FORMAT_S32_LE:
1058 ucontrol->value.integer.value[0] = 3;
1059 break;
1060 case SNDRV_PCM_FORMAT_S24_3LE:
1061 ucontrol->value.integer.value[0] = 2;
1062 break;
1063 case SNDRV_PCM_FORMAT_S24_LE:
1064 ucontrol->value.integer.value[0] = 1;
1065 break;
1066 case SNDRV_PCM_FORMAT_S16_LE:
1067 default:
1068 ucontrol->value.integer.value[0] = 0;
1069 break;
1070 }
1071
1072 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1073 __func__, usb_tx_cfg.bit_format,
1074 ucontrol->value.integer.value[0]);
1075 return 0;
1076}
1077
1078static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 int rc = 0;
1082
1083 switch (ucontrol->value.integer.value[0]) {
1084 case 3:
1085 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1086 break;
1087 case 2:
1088 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1089 break;
1090 case 1:
1091 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1092 break;
1093 case 0:
1094 default:
1095 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1096 break;
1097 }
1098 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1099 __func__, usb_tx_cfg.bit_format,
1100 ucontrol->value.integer.value[0]);
1101
1102 return rc;
1103}
1104
1105static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1106 struct snd_ctl_elem_value *ucontrol)
1107{
1108 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1109 usb_rx_cfg.channels);
1110 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1111 return 0;
1112}
1113
1114static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1115 struct snd_ctl_elem_value *ucontrol)
1116{
1117 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1118
1119 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1120 return 1;
1121}
1122
1123static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125{
1126 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1127 usb_tx_cfg.channels);
1128 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1129 return 0;
1130}
1131
1132static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1133 struct snd_ctl_elem_value *ucontrol)
1134{
1135 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1136
1137 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1138 return 1;
1139}
1140
Meng Wangd1db67c2019-04-17 12:41:34 +08001141static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1142 struct snd_ctl_elem_value *ucontrol)
1143{
1144 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1145 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1146 ucontrol->value.integer.value[0]);
1147 return 0;
1148}
1149
1150static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1151 struct snd_ctl_elem_value *ucontrol)
1152{
1153 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1154 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1155 return 1;
1156}
1157
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001158static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1159{
1160 int idx = 0;
1161
1162 if (strnstr(kcontrol->id.name, "Display Port RX",
1163 sizeof("Display Port RX"))) {
1164 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07001165 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1166 sizeof("Display Port1 RX"))) {
1167 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08001168 } else {
1169 pr_err("%s: unsupported BE: %s\n",
1170 __func__, kcontrol->id.name);
1171 idx = -EINVAL;
1172 }
1173
1174 return idx;
1175}
1176
1177static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1178 struct snd_ctl_elem_value *ucontrol)
1179{
1180 int idx = ext_disp_get_port_idx(kcontrol);
1181
1182 if (idx < 0)
1183 return idx;
1184
1185 switch (ext_disp_rx_cfg[idx].bit_format) {
1186 case SNDRV_PCM_FORMAT_S24_3LE:
1187 ucontrol->value.integer.value[0] = 2;
1188 break;
1189 case SNDRV_PCM_FORMAT_S24_LE:
1190 ucontrol->value.integer.value[0] = 1;
1191 break;
1192 case SNDRV_PCM_FORMAT_S16_LE:
1193 default:
1194 ucontrol->value.integer.value[0] = 0;
1195 break;
1196 }
1197
1198 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1199 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1200 ucontrol->value.integer.value[0]);
1201 return 0;
1202}
1203
1204static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1205 struct snd_ctl_elem_value *ucontrol)
1206{
1207 int idx = ext_disp_get_port_idx(kcontrol);
1208
1209 if (idx < 0)
1210 return idx;
1211
1212 switch (ucontrol->value.integer.value[0]) {
1213 case 2:
1214 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1215 break;
1216 case 1:
1217 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1218 break;
1219 case 0:
1220 default:
1221 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1222 break;
1223 }
1224 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1225 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1226 ucontrol->value.integer.value[0]);
1227
1228 return 0;
1229}
1230
1231static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1232 struct snd_ctl_elem_value *ucontrol)
1233{
1234 int idx = ext_disp_get_port_idx(kcontrol);
1235
1236 if (idx < 0)
1237 return idx;
1238
1239 ucontrol->value.integer.value[0] =
1240 ext_disp_rx_cfg[idx].channels - 2;
1241
1242 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1243 idx, ext_disp_rx_cfg[idx].channels);
1244
1245 return 0;
1246}
1247
1248static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1249 struct snd_ctl_elem_value *ucontrol)
1250{
1251 int idx = ext_disp_get_port_idx(kcontrol);
1252
1253 if (idx < 0)
1254 return idx;
1255
1256 ext_disp_rx_cfg[idx].channels =
1257 ucontrol->value.integer.value[0] + 2;
1258
1259 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1260 idx, ext_disp_rx_cfg[idx].channels);
1261 return 1;
1262}
1263
1264static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1265 struct snd_ctl_elem_value *ucontrol)
1266{
1267 int sample_rate_val;
1268 int idx = ext_disp_get_port_idx(kcontrol);
1269
1270 if (idx < 0)
1271 return idx;
1272
1273 switch (ext_disp_rx_cfg[idx].sample_rate) {
1274 case SAMPLING_RATE_176P4KHZ:
1275 sample_rate_val = 6;
1276 break;
1277
1278 case SAMPLING_RATE_88P2KHZ:
1279 sample_rate_val = 5;
1280 break;
1281
1282 case SAMPLING_RATE_44P1KHZ:
1283 sample_rate_val = 4;
1284 break;
1285
1286 case SAMPLING_RATE_32KHZ:
1287 sample_rate_val = 3;
1288 break;
1289
1290 case SAMPLING_RATE_192KHZ:
1291 sample_rate_val = 2;
1292 break;
1293
1294 case SAMPLING_RATE_96KHZ:
1295 sample_rate_val = 1;
1296 break;
1297
1298 case SAMPLING_RATE_48KHZ:
1299 default:
1300 sample_rate_val = 0;
1301 break;
1302 }
1303
1304 ucontrol->value.integer.value[0] = sample_rate_val;
1305 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1306 idx, ext_disp_rx_cfg[idx].sample_rate);
1307
1308 return 0;
1309}
1310
1311static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1313{
1314 int idx = ext_disp_get_port_idx(kcontrol);
1315
1316 if (idx < 0)
1317 return idx;
1318
1319 switch (ucontrol->value.integer.value[0]) {
1320 case 6:
1321 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1322 break;
1323 case 5:
1324 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1325 break;
1326 case 4:
1327 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1328 break;
1329 case 3:
1330 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1331 break;
1332 case 2:
1333 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1334 break;
1335 case 1:
1336 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1337 break;
1338 case 0:
1339 default:
1340 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1341 break;
1342 }
1343
1344 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1345 __func__, ucontrol->value.integer.value[0], idx,
1346 ext_disp_rx_cfg[idx].sample_rate);
1347 return 0;
1348}
1349
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001350static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1351 struct snd_ctl_elem_value *ucontrol)
1352{
1353 pr_debug("%s: proxy_rx channels = %d\n",
1354 __func__, proxy_rx_cfg.channels);
1355 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1356
1357 return 0;
1358}
1359
1360static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1361 struct snd_ctl_elem_value *ucontrol)
1362{
1363 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1364 pr_debug("%s: proxy_rx channels = %d\n",
1365 __func__, proxy_rx_cfg.channels);
1366
1367 return 1;
1368}
1369
1370static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1371 struct tdm_port *port)
1372{
1373 if (port) {
1374 if (strnstr(kcontrol->id.name, "PRI",
1375 sizeof(kcontrol->id.name))) {
1376 port->mode = TDM_PRI;
1377 } else if (strnstr(kcontrol->id.name, "SEC",
1378 sizeof(kcontrol->id.name))) {
1379 port->mode = TDM_SEC;
1380 } else if (strnstr(kcontrol->id.name, "TERT",
1381 sizeof(kcontrol->id.name))) {
1382 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001383 } else if (strnstr(kcontrol->id.name, "QUAT",
1384 sizeof(kcontrol->id.name))) {
1385 port->mode = TDM_QUAT;
1386 } else if (strnstr(kcontrol->id.name, "QUIN",
1387 sizeof(kcontrol->id.name))) {
1388 port->mode = TDM_QUIN;
1389 } else if (strnstr(kcontrol->id.name, "SEN",
1390 sizeof(kcontrol->id.name))) {
1391 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001392 } else {
1393 pr_err("%s: unsupported mode in: %s\n",
1394 __func__, kcontrol->id.name);
1395 return -EINVAL;
1396 }
1397
1398 if (strnstr(kcontrol->id.name, "RX_0",
1399 sizeof(kcontrol->id.name)) ||
1400 strnstr(kcontrol->id.name, "TX_0",
1401 sizeof(kcontrol->id.name))) {
1402 port->channel = TDM_0;
1403 } else if (strnstr(kcontrol->id.name, "RX_1",
1404 sizeof(kcontrol->id.name)) ||
1405 strnstr(kcontrol->id.name, "TX_1",
1406 sizeof(kcontrol->id.name))) {
1407 port->channel = TDM_1;
1408 } else if (strnstr(kcontrol->id.name, "RX_2",
1409 sizeof(kcontrol->id.name)) ||
1410 strnstr(kcontrol->id.name, "TX_2",
1411 sizeof(kcontrol->id.name))) {
1412 port->channel = TDM_2;
1413 } else if (strnstr(kcontrol->id.name, "RX_3",
1414 sizeof(kcontrol->id.name)) ||
1415 strnstr(kcontrol->id.name, "TX_3",
1416 sizeof(kcontrol->id.name))) {
1417 port->channel = TDM_3;
1418 } else if (strnstr(kcontrol->id.name, "RX_4",
1419 sizeof(kcontrol->id.name)) ||
1420 strnstr(kcontrol->id.name, "TX_4",
1421 sizeof(kcontrol->id.name))) {
1422 port->channel = TDM_4;
1423 } else if (strnstr(kcontrol->id.name, "RX_5",
1424 sizeof(kcontrol->id.name)) ||
1425 strnstr(kcontrol->id.name, "TX_5",
1426 sizeof(kcontrol->id.name))) {
1427 port->channel = TDM_5;
1428 } else if (strnstr(kcontrol->id.name, "RX_6",
1429 sizeof(kcontrol->id.name)) ||
1430 strnstr(kcontrol->id.name, "TX_6",
1431 sizeof(kcontrol->id.name))) {
1432 port->channel = TDM_6;
1433 } else if (strnstr(kcontrol->id.name, "RX_7",
1434 sizeof(kcontrol->id.name)) ||
1435 strnstr(kcontrol->id.name, "TX_7",
1436 sizeof(kcontrol->id.name))) {
1437 port->channel = TDM_7;
1438 } else {
1439 pr_err("%s: unsupported channel in: %s\n",
1440 __func__, kcontrol->id.name);
1441 return -EINVAL;
1442 }
1443 } else {
1444 return -EINVAL;
1445 }
1446 return 0;
1447}
1448
1449static int tdm_get_sample_rate(int value)
1450{
1451 int sample_rate = 0;
1452
1453 switch (value) {
1454 case 0:
1455 sample_rate = SAMPLING_RATE_8KHZ;
1456 break;
1457 case 1:
1458 sample_rate = SAMPLING_RATE_16KHZ;
1459 break;
1460 case 2:
1461 sample_rate = SAMPLING_RATE_32KHZ;
1462 break;
1463 case 3:
1464 sample_rate = SAMPLING_RATE_48KHZ;
1465 break;
1466 case 4:
1467 sample_rate = SAMPLING_RATE_176P4KHZ;
1468 break;
1469 case 5:
1470 sample_rate = SAMPLING_RATE_352P8KHZ;
1471 break;
1472 default:
1473 sample_rate = SAMPLING_RATE_48KHZ;
1474 break;
1475 }
1476 return sample_rate;
1477}
1478
1479static int tdm_get_sample_rate_val(int sample_rate)
1480{
1481 int sample_rate_val = 0;
1482
1483 switch (sample_rate) {
1484 case SAMPLING_RATE_8KHZ:
1485 sample_rate_val = 0;
1486 break;
1487 case SAMPLING_RATE_16KHZ:
1488 sample_rate_val = 1;
1489 break;
1490 case SAMPLING_RATE_32KHZ:
1491 sample_rate_val = 2;
1492 break;
1493 case SAMPLING_RATE_48KHZ:
1494 sample_rate_val = 3;
1495 break;
1496 case SAMPLING_RATE_176P4KHZ:
1497 sample_rate_val = 4;
1498 break;
1499 case SAMPLING_RATE_352P8KHZ:
1500 sample_rate_val = 5;
1501 break;
1502 default:
1503 sample_rate_val = 3;
1504 break;
1505 }
1506 return sample_rate_val;
1507}
1508
1509static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1510 struct snd_ctl_elem_value *ucontrol)
1511{
1512 struct tdm_port port;
1513 int ret = tdm_get_port_idx(kcontrol, &port);
1514
1515 if (ret) {
1516 pr_err("%s: unsupported control: %s\n",
1517 __func__, kcontrol->id.name);
1518 } else {
1519 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1520 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1521
1522 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1523 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1524 ucontrol->value.enumerated.item[0]);
1525 }
1526 return ret;
1527}
1528
1529static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1530 struct snd_ctl_elem_value *ucontrol)
1531{
1532 struct tdm_port port;
1533 int ret = tdm_get_port_idx(kcontrol, &port);
1534
1535 if (ret) {
1536 pr_err("%s: unsupported control: %s\n",
1537 __func__, kcontrol->id.name);
1538 } else {
1539 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1540 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1541
1542 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1543 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1544 ucontrol->value.enumerated.item[0]);
1545 }
1546 return ret;
1547}
1548
1549static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1551{
1552 struct tdm_port port;
1553 int ret = tdm_get_port_idx(kcontrol, &port);
1554
1555 if (ret) {
1556 pr_err("%s: unsupported control: %s\n",
1557 __func__, kcontrol->id.name);
1558 } else {
1559 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1560 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1561
1562 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1563 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1564 ucontrol->value.enumerated.item[0]);
1565 }
1566 return ret;
1567}
1568
1569static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1570 struct snd_ctl_elem_value *ucontrol)
1571{
1572 struct tdm_port port;
1573 int ret = tdm_get_port_idx(kcontrol, &port);
1574
1575 if (ret) {
1576 pr_err("%s: unsupported control: %s\n",
1577 __func__, kcontrol->id.name);
1578 } else {
1579 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1580 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1581
1582 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1583 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1584 ucontrol->value.enumerated.item[0]);
1585 }
1586 return ret;
1587}
1588
1589static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001590{
1591 int format = 0;
1592
1593 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001594 case 0:
1595 format = SNDRV_PCM_FORMAT_S16_LE;
1596 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001597 case 1:
1598 format = SNDRV_PCM_FORMAT_S24_LE;
1599 break;
1600 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001601 format = SNDRV_PCM_FORMAT_S32_LE;
1602 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001603 default:
1604 format = SNDRV_PCM_FORMAT_S16_LE;
1605 break;
1606 }
1607 return format;
1608}
1609
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001610static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001611{
1612 int value = 0;
1613
1614 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001615 case SNDRV_PCM_FORMAT_S16_LE:
1616 value = 0;
1617 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001618 case SNDRV_PCM_FORMAT_S24_LE:
1619 value = 1;
1620 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001621 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001622 value = 2;
1623 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001624 default:
1625 value = 0;
1626 break;
1627 }
1628 return value;
1629}
1630
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001631static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1632 struct snd_ctl_elem_value *ucontrol)
1633{
1634 struct tdm_port port;
1635 int ret = tdm_get_port_idx(kcontrol, &port);
1636
1637 if (ret) {
1638 pr_err("%s: unsupported control: %s\n",
1639 __func__, kcontrol->id.name);
1640 } else {
1641 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1642 tdm_rx_cfg[port.mode][port.channel].bit_format);
1643
1644 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1645 tdm_rx_cfg[port.mode][port.channel].bit_format,
1646 ucontrol->value.enumerated.item[0]);
1647 }
1648 return ret;
1649}
1650
1651static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1652 struct snd_ctl_elem_value *ucontrol)
1653{
1654 struct tdm_port port;
1655 int ret = tdm_get_port_idx(kcontrol, &port);
1656
1657 if (ret) {
1658 pr_err("%s: unsupported control: %s\n",
1659 __func__, kcontrol->id.name);
1660 } else {
1661 tdm_rx_cfg[port.mode][port.channel].bit_format =
1662 tdm_get_format(ucontrol->value.enumerated.item[0]);
1663
1664 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1665 tdm_rx_cfg[port.mode][port.channel].bit_format,
1666 ucontrol->value.enumerated.item[0]);
1667 }
1668 return ret;
1669}
1670
1671static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1672 struct snd_ctl_elem_value *ucontrol)
1673{
1674 struct tdm_port port;
1675 int ret = tdm_get_port_idx(kcontrol, &port);
1676
1677 if (ret) {
1678 pr_err("%s: unsupported control: %s\n",
1679 __func__, kcontrol->id.name);
1680 } else {
1681 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1682 tdm_tx_cfg[port.mode][port.channel].bit_format);
1683
1684 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1685 tdm_tx_cfg[port.mode][port.channel].bit_format,
1686 ucontrol->value.enumerated.item[0]);
1687 }
1688 return ret;
1689}
1690
1691static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1692 struct snd_ctl_elem_value *ucontrol)
1693{
1694 struct tdm_port port;
1695 int ret = tdm_get_port_idx(kcontrol, &port);
1696
1697 if (ret) {
1698 pr_err("%s: unsupported control: %s\n",
1699 __func__, kcontrol->id.name);
1700 } else {
1701 tdm_tx_cfg[port.mode][port.channel].bit_format =
1702 tdm_get_format(ucontrol->value.enumerated.item[0]);
1703
1704 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1705 tdm_tx_cfg[port.mode][port.channel].bit_format,
1706 ucontrol->value.enumerated.item[0]);
1707 }
1708 return ret;
1709}
1710
1711static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1712 struct snd_ctl_elem_value *ucontrol)
1713{
1714 struct tdm_port port;
1715 int ret = tdm_get_port_idx(kcontrol, &port);
1716
1717 if (ret) {
1718 pr_err("%s: unsupported control: %s\n",
1719 __func__, kcontrol->id.name);
1720 } else {
1721
1722 ucontrol->value.enumerated.item[0] =
1723 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1724
1725 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1726 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1727 ucontrol->value.enumerated.item[0]);
1728 }
1729 return ret;
1730}
1731
1732static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1733 struct snd_ctl_elem_value *ucontrol)
1734{
1735 struct tdm_port port;
1736 int ret = tdm_get_port_idx(kcontrol, &port);
1737
1738 if (ret) {
1739 pr_err("%s: unsupported control: %s\n",
1740 __func__, kcontrol->id.name);
1741 } else {
1742 tdm_rx_cfg[port.mode][port.channel].channels =
1743 ucontrol->value.enumerated.item[0] + 1;
1744
1745 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1746 tdm_rx_cfg[port.mode][port.channel].channels,
1747 ucontrol->value.enumerated.item[0] + 1);
1748 }
1749 return ret;
1750}
1751
1752static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1753 struct snd_ctl_elem_value *ucontrol)
1754{
1755 struct tdm_port port;
1756 int ret = tdm_get_port_idx(kcontrol, &port);
1757
1758 if (ret) {
1759 pr_err("%s: unsupported control: %s\n",
1760 __func__, kcontrol->id.name);
1761 } else {
1762 ucontrol->value.enumerated.item[0] =
1763 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1764
1765 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1766 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1767 ucontrol->value.enumerated.item[0]);
1768 }
1769 return ret;
1770}
1771
1772static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1773 struct snd_ctl_elem_value *ucontrol)
1774{
1775 struct tdm_port port;
1776 int ret = tdm_get_port_idx(kcontrol, &port);
1777
1778 if (ret) {
1779 pr_err("%s: unsupported control: %s\n",
1780 __func__, kcontrol->id.name);
1781 } else {
1782 tdm_tx_cfg[port.mode][port.channel].channels =
1783 ucontrol->value.enumerated.item[0] + 1;
1784
1785 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1786 tdm_tx_cfg[port.mode][port.channel].channels,
1787 ucontrol->value.enumerated.item[0] + 1);
1788 }
1789 return ret;
1790}
1791
1792static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1793{
1794 int idx = 0;
1795
1796 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1797 sizeof("PRIM_AUX_PCM"))) {
1798 idx = PRIM_AUX_PCM;
1799 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1800 sizeof("SEC_AUX_PCM"))) {
1801 idx = SEC_AUX_PCM;
1802 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1803 sizeof("TERT_AUX_PCM"))) {
1804 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08001805 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1806 sizeof("QUAT_AUX_PCM"))) {
1807 idx = QUAT_AUX_PCM;
1808 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
1809 sizeof("QUIN_AUX_PCM"))) {
1810 idx = QUIN_AUX_PCM;
1811 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
1812 sizeof("SEN_AUX_PCM"))) {
1813 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001814 } else {
1815 pr_err("%s: unsupported port: %s\n",
1816 __func__, kcontrol->id.name);
1817 idx = -EINVAL;
1818 }
1819
1820 return idx;
1821}
1822
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001823static int aux_pcm_get_sample_rate(int value)
1824{
1825 int sample_rate = 0;
1826
1827 switch (value) {
1828 case 1:
1829 sample_rate = SAMPLING_RATE_16KHZ;
1830 break;
1831 case 0:
1832 default:
1833 sample_rate = SAMPLING_RATE_8KHZ;
1834 break;
1835 }
1836 return sample_rate;
1837}
1838
1839static int aux_pcm_get_sample_rate_val(int sample_rate)
1840{
1841 int sample_rate_val = 0;
1842
1843 switch (sample_rate) {
1844 case SAMPLING_RATE_16KHZ:
1845 sample_rate_val = 1;
1846 break;
1847 case SAMPLING_RATE_8KHZ:
1848 default:
1849 sample_rate_val = 0;
1850 break;
1851 }
1852 return sample_rate_val;
1853}
1854
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001855static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001856{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001857 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001858
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001859 switch (value) {
1860 case 0:
1861 format = SNDRV_PCM_FORMAT_S16_LE;
1862 break;
1863 case 1:
1864 format = SNDRV_PCM_FORMAT_S24_LE;
1865 break;
1866 case 2:
1867 format = SNDRV_PCM_FORMAT_S24_3LE;
1868 break;
1869 case 3:
1870 format = SNDRV_PCM_FORMAT_S32_LE;
1871 break;
1872 default:
1873 format = SNDRV_PCM_FORMAT_S16_LE;
1874 break;
1875 }
1876 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001877}
1878
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001879static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001880{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001881 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001882
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001883 switch (format) {
1884 case SNDRV_PCM_FORMAT_S16_LE:
1885 value = 0;
1886 break;
1887 case SNDRV_PCM_FORMAT_S24_LE:
1888 value = 1;
1889 break;
1890 case SNDRV_PCM_FORMAT_S24_3LE:
1891 value = 2;
1892 break;
1893 case SNDRV_PCM_FORMAT_S32_LE:
1894 value = 3;
1895 break;
1896 default:
1897 value = 0;
1898 break;
1899 }
1900 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001901}
1902
1903static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1904 struct snd_ctl_elem_value *ucontrol)
1905{
1906 int idx = aux_pcm_get_port_idx(kcontrol);
1907
1908 if (idx < 0)
1909 return idx;
1910
1911 ucontrol->value.enumerated.item[0] =
1912 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1913
1914 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1915 idx, aux_pcm_rx_cfg[idx].sample_rate,
1916 ucontrol->value.enumerated.item[0]);
1917
1918 return 0;
1919}
1920
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001921static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001922 struct snd_ctl_elem_value *ucontrol)
1923{
1924 int idx = aux_pcm_get_port_idx(kcontrol);
1925
1926 if (idx < 0)
1927 return idx;
1928
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001929 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001930 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1931
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001932 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1933 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07001934 ucontrol->value.enumerated.item[0]);
1935
1936 return 0;
1937}
1938
1939static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1940 struct snd_ctl_elem_value *ucontrol)
1941{
1942 int idx = aux_pcm_get_port_idx(kcontrol);
1943
1944 if (idx < 0)
1945 return idx;
1946
1947 ucontrol->value.enumerated.item[0] =
1948 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1949
1950 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1951 idx, aux_pcm_tx_cfg[idx].sample_rate,
1952 ucontrol->value.enumerated.item[0]);
1953
1954 return 0;
1955}
1956
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07001957static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1958 struct snd_ctl_elem_value *ucontrol)
1959{
1960 int idx = aux_pcm_get_port_idx(kcontrol);
1961
1962 if (idx < 0)
1963 return idx;
1964
1965 aux_pcm_tx_cfg[idx].sample_rate =
1966 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1967
1968 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1969 idx, aux_pcm_tx_cfg[idx].sample_rate,
1970 ucontrol->value.enumerated.item[0]);
1971
1972 return 0;
1973}
1974
1975static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1976 struct snd_ctl_elem_value *ucontrol)
1977{
1978 int idx = aux_pcm_get_port_idx(kcontrol);
1979
1980 if (idx < 0)
1981 return idx;
1982
1983 ucontrol->value.enumerated.item[0] =
1984 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1985
1986 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1987 idx, aux_pcm_rx_cfg[idx].bit_format,
1988 ucontrol->value.enumerated.item[0]);
1989
1990 return 0;
1991}
1992
1993static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1994 struct snd_ctl_elem_value *ucontrol)
1995{
1996 int idx = aux_pcm_get_port_idx(kcontrol);
1997
1998 if (idx < 0)
1999 return idx;
2000
2001 aux_pcm_rx_cfg[idx].bit_format =
2002 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2003
2004 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2005 idx, aux_pcm_rx_cfg[idx].bit_format,
2006 ucontrol->value.enumerated.item[0]);
2007
2008 return 0;
2009}
2010
2011static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2012 struct snd_ctl_elem_value *ucontrol)
2013{
2014 int idx = aux_pcm_get_port_idx(kcontrol);
2015
2016 if (idx < 0)
2017 return idx;
2018
2019 ucontrol->value.enumerated.item[0] =
2020 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2021
2022 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2023 idx, aux_pcm_tx_cfg[idx].bit_format,
2024 ucontrol->value.enumerated.item[0]);
2025
2026 return 0;
2027}
2028
2029static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2030 struct snd_ctl_elem_value *ucontrol)
2031{
2032 int idx = aux_pcm_get_port_idx(kcontrol);
2033
2034 if (idx < 0)
2035 return idx;
2036
2037 aux_pcm_tx_cfg[idx].bit_format =
2038 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2039
2040 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2041 idx, aux_pcm_tx_cfg[idx].bit_format,
2042 ucontrol->value.enumerated.item[0]);
2043
2044 return 0;
2045}
2046
2047static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2048{
2049 int idx = 0;
2050
2051 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2052 sizeof("PRIM_MI2S_RX"))) {
2053 idx = PRIM_MI2S;
2054 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2055 sizeof("SEC_MI2S_RX"))) {
2056 idx = SEC_MI2S;
2057 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2058 sizeof("TERT_MI2S_RX"))) {
2059 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002060 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2061 sizeof("QUAT_MI2S_RX"))) {
2062 idx = QUAT_MI2S;
2063 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2064 sizeof("QUIN_MI2S_RX"))) {
2065 idx = QUIN_MI2S;
2066 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2067 sizeof("SEN_MI2S_RX"))) {
2068 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002069 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2070 sizeof("PRIM_MI2S_TX"))) {
2071 idx = PRIM_MI2S;
2072 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2073 sizeof("SEC_MI2S_TX"))) {
2074 idx = SEC_MI2S;
2075 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2076 sizeof("TERT_MI2S_TX"))) {
2077 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002078 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2079 sizeof("QUAT_MI2S_TX"))) {
2080 idx = QUAT_MI2S;
2081 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2082 sizeof("QUIN_MI2S_TX"))) {
2083 idx = QUIN_MI2S;
2084 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2085 sizeof("SEN_MI2S_TX"))) {
2086 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002087 } else {
2088 pr_err("%s: unsupported channel: %s\n",
2089 __func__, kcontrol->id.name);
2090 idx = -EINVAL;
2091 }
2092
2093 return idx;
2094}
2095
2096static int mi2s_get_sample_rate(int value)
2097{
2098 int sample_rate = 0;
2099
2100 switch (value) {
2101 case 0:
2102 sample_rate = SAMPLING_RATE_8KHZ;
2103 break;
2104 case 1:
2105 sample_rate = SAMPLING_RATE_11P025KHZ;
2106 break;
2107 case 2:
2108 sample_rate = SAMPLING_RATE_16KHZ;
2109 break;
2110 case 3:
2111 sample_rate = SAMPLING_RATE_22P05KHZ;
2112 break;
2113 case 4:
2114 sample_rate = SAMPLING_RATE_32KHZ;
2115 break;
2116 case 5:
2117 sample_rate = SAMPLING_RATE_44P1KHZ;
2118 break;
2119 case 6:
2120 sample_rate = SAMPLING_RATE_48KHZ;
2121 break;
2122 case 7:
2123 sample_rate = SAMPLING_RATE_96KHZ;
2124 break;
2125 case 8:
2126 sample_rate = SAMPLING_RATE_192KHZ;
2127 break;
2128 default:
2129 sample_rate = SAMPLING_RATE_48KHZ;
2130 break;
2131 }
2132 return sample_rate;
2133}
2134
2135static int mi2s_get_sample_rate_val(int sample_rate)
2136{
2137 int sample_rate_val = 0;
2138
2139 switch (sample_rate) {
2140 case SAMPLING_RATE_8KHZ:
2141 sample_rate_val = 0;
2142 break;
2143 case SAMPLING_RATE_11P025KHZ:
2144 sample_rate_val = 1;
2145 break;
2146 case SAMPLING_RATE_16KHZ:
2147 sample_rate_val = 2;
2148 break;
2149 case SAMPLING_RATE_22P05KHZ:
2150 sample_rate_val = 3;
2151 break;
2152 case SAMPLING_RATE_32KHZ:
2153 sample_rate_val = 4;
2154 break;
2155 case SAMPLING_RATE_44P1KHZ:
2156 sample_rate_val = 5;
2157 break;
2158 case SAMPLING_RATE_48KHZ:
2159 sample_rate_val = 6;
2160 break;
2161 case SAMPLING_RATE_96KHZ:
2162 sample_rate_val = 7;
2163 break;
2164 case SAMPLING_RATE_192KHZ:
2165 sample_rate_val = 8;
2166 break;
2167 default:
2168 sample_rate_val = 6;
2169 break;
2170 }
2171 return sample_rate_val;
2172}
2173
2174static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2175 struct snd_ctl_elem_value *ucontrol)
2176{
2177 int idx = mi2s_get_port_idx(kcontrol);
2178
2179 if (idx < 0)
2180 return idx;
2181
2182 ucontrol->value.enumerated.item[0] =
2183 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2184
2185 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2186 idx, mi2s_rx_cfg[idx].sample_rate,
2187 ucontrol->value.enumerated.item[0]);
2188
2189 return 0;
2190}
2191
2192static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2193 struct snd_ctl_elem_value *ucontrol)
2194{
2195 int idx = mi2s_get_port_idx(kcontrol);
2196
2197 if (idx < 0)
2198 return idx;
2199
2200 mi2s_rx_cfg[idx].sample_rate =
2201 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2202
2203 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2204 idx, mi2s_rx_cfg[idx].sample_rate,
2205 ucontrol->value.enumerated.item[0]);
2206
2207 return 0;
2208}
2209
2210static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2211 struct snd_ctl_elem_value *ucontrol)
2212{
2213 int idx = mi2s_get_port_idx(kcontrol);
2214
2215 if (idx < 0)
2216 return idx;
2217
2218 ucontrol->value.enumerated.item[0] =
2219 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2220
2221 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2222 idx, mi2s_tx_cfg[idx].sample_rate,
2223 ucontrol->value.enumerated.item[0]);
2224
2225 return 0;
2226}
2227
2228static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2229 struct snd_ctl_elem_value *ucontrol)
2230{
2231 int idx = mi2s_get_port_idx(kcontrol);
2232
2233 if (idx < 0)
2234 return idx;
2235
2236 mi2s_tx_cfg[idx].sample_rate =
2237 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2238
2239 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2240 idx, mi2s_tx_cfg[idx].sample_rate,
2241 ucontrol->value.enumerated.item[0]);
2242
2243 return 0;
2244}
2245
2246static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2247 struct snd_ctl_elem_value *ucontrol)
2248{
2249 int idx = mi2s_get_port_idx(kcontrol);
2250
2251 if (idx < 0)
2252 return idx;
2253
2254 ucontrol->value.enumerated.item[0] =
2255 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2256
2257 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2258 idx, mi2s_rx_cfg[idx].bit_format,
2259 ucontrol->value.enumerated.item[0]);
2260
2261 return 0;
2262}
2263
2264static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2265 struct snd_ctl_elem_value *ucontrol)
2266{
2267 int idx = mi2s_get_port_idx(kcontrol);
2268
2269 if (idx < 0)
2270 return idx;
2271
2272 mi2s_rx_cfg[idx].bit_format =
2273 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2274
2275 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2276 idx, mi2s_rx_cfg[idx].bit_format,
2277 ucontrol->value.enumerated.item[0]);
2278
2279 return 0;
2280}
2281
2282static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2283 struct snd_ctl_elem_value *ucontrol)
2284{
2285 int idx = mi2s_get_port_idx(kcontrol);
2286
2287 if (idx < 0)
2288 return idx;
2289
2290 ucontrol->value.enumerated.item[0] =
2291 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2292
2293 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2294 idx, mi2s_tx_cfg[idx].bit_format,
2295 ucontrol->value.enumerated.item[0]);
2296
2297 return 0;
2298}
2299
2300static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2301 struct snd_ctl_elem_value *ucontrol)
2302{
2303 int idx = mi2s_get_port_idx(kcontrol);
2304
2305 if (idx < 0)
2306 return idx;
2307
2308 mi2s_tx_cfg[idx].bit_format =
2309 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2310
2311 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2312 idx, mi2s_tx_cfg[idx].bit_format,
2313 ucontrol->value.enumerated.item[0]);
2314
2315 return 0;
2316}
2317static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2318 struct snd_ctl_elem_value *ucontrol)
2319{
2320 int idx = mi2s_get_port_idx(kcontrol);
2321
2322 if (idx < 0)
2323 return idx;
2324
2325 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2326 idx, mi2s_rx_cfg[idx].channels);
2327 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2328
2329 return 0;
2330}
2331
2332static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2333 struct snd_ctl_elem_value *ucontrol)
2334{
2335 int idx = mi2s_get_port_idx(kcontrol);
2336
2337 if (idx < 0)
2338 return idx;
2339
2340 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2341 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2342 idx, mi2s_rx_cfg[idx].channels);
2343
2344 return 1;
2345}
2346
2347static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2348 struct snd_ctl_elem_value *ucontrol)
2349{
2350 int idx = mi2s_get_port_idx(kcontrol);
2351
2352 if (idx < 0)
2353 return idx;
2354
2355 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2356 idx, mi2s_tx_cfg[idx].channels);
2357 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2358
2359 return 0;
2360}
2361
2362static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2363 struct snd_ctl_elem_value *ucontrol)
2364{
2365 int idx = mi2s_get_port_idx(kcontrol);
2366
2367 if (idx < 0)
2368 return idx;
2369
2370 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2371 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2372 idx, mi2s_tx_cfg[idx].channels);
2373
2374 return 1;
2375}
2376
2377static int msm_get_port_id(int be_id)
2378{
2379 int afe_port_id = 0;
2380
2381 switch (be_id) {
2382 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2383 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2384 break;
2385 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2386 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2387 break;
2388 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2389 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2390 break;
2391 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2392 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2393 break;
2394 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2395 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2396 break;
2397 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2398 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2399 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08002400 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2401 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2402 break;
2403 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2404 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2405 break;
2406 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2407 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2408 break;
2409 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2410 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2411 break;
2412 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2413 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2414 break;
2415 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2416 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2417 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07002418 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2419 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2420 break;
2421 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2422 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2423 break;
2424 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2425 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2426 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07002427 default:
2428 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2429 afe_port_id = -EINVAL;
2430 }
2431
2432 return afe_port_id;
2433}
2434
2435static u32 get_mi2s_bits_per_sample(u32 bit_format)
2436{
2437 u32 bit_per_sample = 0;
2438
2439 switch (bit_format) {
2440 case SNDRV_PCM_FORMAT_S32_LE:
2441 case SNDRV_PCM_FORMAT_S24_3LE:
2442 case SNDRV_PCM_FORMAT_S24_LE:
2443 bit_per_sample = 32;
2444 break;
2445 case SNDRV_PCM_FORMAT_S16_LE:
2446 default:
2447 bit_per_sample = 16;
2448 break;
2449 }
2450
2451 return bit_per_sample;
2452}
2453
2454static void update_mi2s_clk_val(int dai_id, int stream)
2455{
2456 u32 bit_per_sample = 0;
2457
2458 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2459 bit_per_sample =
2460 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2461 mi2s_clk[dai_id].clk_freq_in_hz =
2462 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2463 } else {
2464 bit_per_sample =
2465 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2466 mi2s_clk[dai_id].clk_freq_in_hz =
2467 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2468 }
2469}
2470
2471static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2472{
2473 int ret = 0;
2474 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2475 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2476 int port_id = 0;
2477 int index = cpu_dai->id;
2478
2479 port_id = msm_get_port_id(rtd->dai_link->id);
2480 if (port_id < 0) {
2481 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2482 ret = port_id;
2483 goto err;
2484 }
2485
2486 if (enable) {
2487 update_mi2s_clk_val(index, substream->stream);
2488 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2489 mi2s_clk[index].clk_freq_in_hz);
2490 }
2491
2492 mi2s_clk[index].enable = enable;
2493 ret = afe_set_lpass_clock_v2(port_id,
2494 &mi2s_clk[index]);
2495 if (ret < 0) {
2496 dev_err(rtd->card->dev,
2497 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2498 __func__, port_id, ret);
2499 goto err;
2500 }
2501
2502err:
2503 return ret;
2504}
2505
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002506static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2507{
2508 int idx = 0;
2509
2510 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2511 sizeof("WSA_CDC_DMA_RX_0")))
2512 idx = WSA_CDC_DMA_RX_0;
2513 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2514 sizeof("WSA_CDC_DMA_RX_0")))
2515 idx = WSA_CDC_DMA_RX_1;
2516 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2517 sizeof("RX_CDC_DMA_RX_0")))
2518 idx = RX_CDC_DMA_RX_0;
2519 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2520 sizeof("RX_CDC_DMA_RX_1")))
2521 idx = RX_CDC_DMA_RX_1;
2522 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2523 sizeof("RX_CDC_DMA_RX_2")))
2524 idx = RX_CDC_DMA_RX_2;
2525 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2526 sizeof("RX_CDC_DMA_RX_3")))
2527 idx = RX_CDC_DMA_RX_3;
2528 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2529 sizeof("RX_CDC_DMA_RX_5")))
2530 idx = RX_CDC_DMA_RX_5;
2531 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2532 sizeof("WSA_CDC_DMA_TX_0")))
2533 idx = WSA_CDC_DMA_TX_0;
2534 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2535 sizeof("WSA_CDC_DMA_TX_1")))
2536 idx = WSA_CDC_DMA_TX_1;
2537 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2538 sizeof("WSA_CDC_DMA_TX_2")))
2539 idx = WSA_CDC_DMA_TX_2;
2540 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2541 sizeof("TX_CDC_DMA_TX_0")))
2542 idx = TX_CDC_DMA_TX_0;
2543 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2544 sizeof("TX_CDC_DMA_TX_3")))
2545 idx = TX_CDC_DMA_TX_3;
2546 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2547 sizeof("TX_CDC_DMA_TX_4")))
2548 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08002549 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2550 sizeof("VA_CDC_DMA_TX_0")))
2551 idx = VA_CDC_DMA_TX_0;
2552 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2553 sizeof("VA_CDC_DMA_TX_1")))
2554 idx = VA_CDC_DMA_TX_1;
2555 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2556 sizeof("VA_CDC_DMA_TX_2")))
2557 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002558 else {
2559 pr_err("%s: unsupported channel: %s\n",
2560 __func__, kcontrol->id.name);
2561 return -EINVAL;
2562 }
2563
2564 return idx;
2565}
2566
2567static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2568 struct snd_ctl_elem_value *ucontrol)
2569{
2570 int ch_num = cdc_dma_get_port_idx(kcontrol);
2571
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002572 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002573 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2574 return ch_num;
2575 }
2576
2577 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2578 cdc_dma_rx_cfg[ch_num].channels - 1);
2579 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2580 return 0;
2581}
2582
2583static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2584 struct snd_ctl_elem_value *ucontrol)
2585{
2586 int ch_num = cdc_dma_get_port_idx(kcontrol);
2587
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002588 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002589 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2590 return ch_num;
2591 }
2592
2593 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2594
2595 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2596 cdc_dma_rx_cfg[ch_num].channels);
2597 return 1;
2598}
2599
2600static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2601 struct snd_ctl_elem_value *ucontrol)
2602{
2603 int ch_num = cdc_dma_get_port_idx(kcontrol);
2604
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002605 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002606 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2607 return ch_num;
2608 }
2609
2610 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2611 case SNDRV_PCM_FORMAT_S32_LE:
2612 ucontrol->value.integer.value[0] = 3;
2613 break;
2614 case SNDRV_PCM_FORMAT_S24_3LE:
2615 ucontrol->value.integer.value[0] = 2;
2616 break;
2617 case SNDRV_PCM_FORMAT_S24_LE:
2618 ucontrol->value.integer.value[0] = 1;
2619 break;
2620 case SNDRV_PCM_FORMAT_S16_LE:
2621 default:
2622 ucontrol->value.integer.value[0] = 0;
2623 break;
2624 }
2625
2626 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2627 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2628 ucontrol->value.integer.value[0]);
2629 return 0;
2630}
2631
2632static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2633 struct snd_ctl_elem_value *ucontrol)
2634{
2635 int rc = 0;
2636 int ch_num = cdc_dma_get_port_idx(kcontrol);
2637
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002638 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002639 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2640 return ch_num;
2641 }
2642
2643 switch (ucontrol->value.integer.value[0]) {
2644 case 3:
2645 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2646 break;
2647 case 2:
2648 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2649 break;
2650 case 1:
2651 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2652 break;
2653 case 0:
2654 default:
2655 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2656 break;
2657 }
2658 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2659 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2660 ucontrol->value.integer.value[0]);
2661
2662 return rc;
2663}
2664
2665
2666static int cdc_dma_get_sample_rate_val(int sample_rate)
2667{
2668 int sample_rate_val = 0;
2669
2670 switch (sample_rate) {
2671 case SAMPLING_RATE_8KHZ:
2672 sample_rate_val = 0;
2673 break;
2674 case SAMPLING_RATE_11P025KHZ:
2675 sample_rate_val = 1;
2676 break;
2677 case SAMPLING_RATE_16KHZ:
2678 sample_rate_val = 2;
2679 break;
2680 case SAMPLING_RATE_22P05KHZ:
2681 sample_rate_val = 3;
2682 break;
2683 case SAMPLING_RATE_32KHZ:
2684 sample_rate_val = 4;
2685 break;
2686 case SAMPLING_RATE_44P1KHZ:
2687 sample_rate_val = 5;
2688 break;
2689 case SAMPLING_RATE_48KHZ:
2690 sample_rate_val = 6;
2691 break;
2692 case SAMPLING_RATE_88P2KHZ:
2693 sample_rate_val = 7;
2694 break;
2695 case SAMPLING_RATE_96KHZ:
2696 sample_rate_val = 8;
2697 break;
2698 case SAMPLING_RATE_176P4KHZ:
2699 sample_rate_val = 9;
2700 break;
2701 case SAMPLING_RATE_192KHZ:
2702 sample_rate_val = 10;
2703 break;
2704 case SAMPLING_RATE_352P8KHZ:
2705 sample_rate_val = 11;
2706 break;
2707 case SAMPLING_RATE_384KHZ:
2708 sample_rate_val = 12;
2709 break;
2710 default:
2711 sample_rate_val = 6;
2712 break;
2713 }
2714 return sample_rate_val;
2715}
2716
2717static int cdc_dma_get_sample_rate(int value)
2718{
2719 int sample_rate = 0;
2720
2721 switch (value) {
2722 case 0:
2723 sample_rate = SAMPLING_RATE_8KHZ;
2724 break;
2725 case 1:
2726 sample_rate = SAMPLING_RATE_11P025KHZ;
2727 break;
2728 case 2:
2729 sample_rate = SAMPLING_RATE_16KHZ;
2730 break;
2731 case 3:
2732 sample_rate = SAMPLING_RATE_22P05KHZ;
2733 break;
2734 case 4:
2735 sample_rate = SAMPLING_RATE_32KHZ;
2736 break;
2737 case 5:
2738 sample_rate = SAMPLING_RATE_44P1KHZ;
2739 break;
2740 case 6:
2741 sample_rate = SAMPLING_RATE_48KHZ;
2742 break;
2743 case 7:
2744 sample_rate = SAMPLING_RATE_88P2KHZ;
2745 break;
2746 case 8:
2747 sample_rate = SAMPLING_RATE_96KHZ;
2748 break;
2749 case 9:
2750 sample_rate = SAMPLING_RATE_176P4KHZ;
2751 break;
2752 case 10:
2753 sample_rate = SAMPLING_RATE_192KHZ;
2754 break;
2755 case 11:
2756 sample_rate = SAMPLING_RATE_352P8KHZ;
2757 break;
2758 case 12:
2759 sample_rate = SAMPLING_RATE_384KHZ;
2760 break;
2761 default:
2762 sample_rate = SAMPLING_RATE_48KHZ;
2763 break;
2764 }
2765 return sample_rate;
2766}
2767
2768static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2769 struct snd_ctl_elem_value *ucontrol)
2770{
2771 int ch_num = cdc_dma_get_port_idx(kcontrol);
2772
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002773 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002774 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2775 return ch_num;
2776 }
2777
2778 ucontrol->value.enumerated.item[0] =
2779 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2780
2781 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2782 cdc_dma_rx_cfg[ch_num].sample_rate);
2783 return 0;
2784}
2785
2786static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2787 struct snd_ctl_elem_value *ucontrol)
2788{
2789 int ch_num = cdc_dma_get_port_idx(kcontrol);
2790
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -07002791 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07002792 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2793 return ch_num;
2794 }
2795
2796 cdc_dma_rx_cfg[ch_num].sample_rate =
2797 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2798
2799
2800 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2801 __func__, ucontrol->value.enumerated.item[0],
2802 cdc_dma_rx_cfg[ch_num].sample_rate);
2803 return 0;
2804}
2805
2806static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2807 struct snd_ctl_elem_value *ucontrol)
2808{
2809 int ch_num = cdc_dma_get_port_idx(kcontrol);
2810
2811 if (ch_num < 0) {
2812 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2813 return ch_num;
2814 }
2815
2816 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2817 cdc_dma_tx_cfg[ch_num].channels);
2818 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2819 return 0;
2820}
2821
2822static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2823 struct snd_ctl_elem_value *ucontrol)
2824{
2825 int ch_num = cdc_dma_get_port_idx(kcontrol);
2826
2827 if (ch_num < 0) {
2828 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2829 return ch_num;
2830 }
2831
2832 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2833
2834 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2835 cdc_dma_tx_cfg[ch_num].channels);
2836 return 1;
2837}
2838
2839static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2840 struct snd_ctl_elem_value *ucontrol)
2841{
2842 int sample_rate_val;
2843 int ch_num = cdc_dma_get_port_idx(kcontrol);
2844
2845 if (ch_num < 0) {
2846 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2847 return ch_num;
2848 }
2849
2850 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2851 case SAMPLING_RATE_384KHZ:
2852 sample_rate_val = 12;
2853 break;
2854 case SAMPLING_RATE_352P8KHZ:
2855 sample_rate_val = 11;
2856 break;
2857 case SAMPLING_RATE_192KHZ:
2858 sample_rate_val = 10;
2859 break;
2860 case SAMPLING_RATE_176P4KHZ:
2861 sample_rate_val = 9;
2862 break;
2863 case SAMPLING_RATE_96KHZ:
2864 sample_rate_val = 8;
2865 break;
2866 case SAMPLING_RATE_88P2KHZ:
2867 sample_rate_val = 7;
2868 break;
2869 case SAMPLING_RATE_48KHZ:
2870 sample_rate_val = 6;
2871 break;
2872 case SAMPLING_RATE_44P1KHZ:
2873 sample_rate_val = 5;
2874 break;
2875 case SAMPLING_RATE_32KHZ:
2876 sample_rate_val = 4;
2877 break;
2878 case SAMPLING_RATE_22P05KHZ:
2879 sample_rate_val = 3;
2880 break;
2881 case SAMPLING_RATE_16KHZ:
2882 sample_rate_val = 2;
2883 break;
2884 case SAMPLING_RATE_11P025KHZ:
2885 sample_rate_val = 1;
2886 break;
2887 case SAMPLING_RATE_8KHZ:
2888 sample_rate_val = 0;
2889 break;
2890 default:
2891 sample_rate_val = 6;
2892 break;
2893 }
2894
2895 ucontrol->value.integer.value[0] = sample_rate_val;
2896 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2897 cdc_dma_tx_cfg[ch_num].sample_rate);
2898 return 0;
2899}
2900
2901static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2902 struct snd_ctl_elem_value *ucontrol)
2903{
2904 int ch_num = cdc_dma_get_port_idx(kcontrol);
2905
2906 if (ch_num < 0) {
2907 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2908 return ch_num;
2909 }
2910
2911 switch (ucontrol->value.integer.value[0]) {
2912 case 12:
2913 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2914 break;
2915 case 11:
2916 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2917 break;
2918 case 10:
2919 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2920 break;
2921 case 9:
2922 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2923 break;
2924 case 8:
2925 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2926 break;
2927 case 7:
2928 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2929 break;
2930 case 6:
2931 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2932 break;
2933 case 5:
2934 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2935 break;
2936 case 4:
2937 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2938 break;
2939 case 3:
2940 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2941 break;
2942 case 2:
2943 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2944 break;
2945 case 1:
2946 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2947 break;
2948 case 0:
2949 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2950 break;
2951 default:
2952 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2953 break;
2954 }
2955
2956 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2957 __func__, ucontrol->value.integer.value[0],
2958 cdc_dma_tx_cfg[ch_num].sample_rate);
2959 return 0;
2960}
2961
2962static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2963 struct snd_ctl_elem_value *ucontrol)
2964{
2965 int ch_num = cdc_dma_get_port_idx(kcontrol);
2966
2967 if (ch_num < 0) {
2968 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2969 return ch_num;
2970 }
2971
2972 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2973 case SNDRV_PCM_FORMAT_S32_LE:
2974 ucontrol->value.integer.value[0] = 3;
2975 break;
2976 case SNDRV_PCM_FORMAT_S24_3LE:
2977 ucontrol->value.integer.value[0] = 2;
2978 break;
2979 case SNDRV_PCM_FORMAT_S24_LE:
2980 ucontrol->value.integer.value[0] = 1;
2981 break;
2982 case SNDRV_PCM_FORMAT_S16_LE:
2983 default:
2984 ucontrol->value.integer.value[0] = 0;
2985 break;
2986 }
2987
2988 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2989 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2990 ucontrol->value.integer.value[0]);
2991 return 0;
2992}
2993
2994static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2995 struct snd_ctl_elem_value *ucontrol)
2996{
2997 int rc = 0;
2998 int ch_num = cdc_dma_get_port_idx(kcontrol);
2999
3000 if (ch_num < 0) {
3001 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3002 return ch_num;
3003 }
3004
3005 switch (ucontrol->value.integer.value[0]) {
3006 case 3:
3007 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3008 break;
3009 case 2:
3010 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3011 break;
3012 case 1:
3013 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3014 break;
3015 case 0:
3016 default:
3017 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3018 break;
3019 }
3020 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3021 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3022 ucontrol->value.integer.value[0]);
3023
3024 return rc;
3025}
3026
3027static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3028{
3029 int idx = 0;
3030
3031 switch (be_id) {
3032 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3033 idx = WSA_CDC_DMA_RX_0;
3034 break;
3035 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3036 idx = WSA_CDC_DMA_TX_0;
3037 break;
3038 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3039 idx = WSA_CDC_DMA_RX_1;
3040 break;
3041 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3042 idx = WSA_CDC_DMA_TX_1;
3043 break;
3044 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3045 idx = WSA_CDC_DMA_TX_2;
3046 break;
3047 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3048 idx = RX_CDC_DMA_RX_0;
3049 break;
3050 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3051 idx = RX_CDC_DMA_RX_1;
3052 break;
3053 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3054 idx = RX_CDC_DMA_RX_2;
3055 break;
3056 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3057 idx = RX_CDC_DMA_RX_3;
3058 break;
3059 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3060 idx = RX_CDC_DMA_RX_5;
3061 break;
3062 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3063 idx = TX_CDC_DMA_TX_0;
3064 break;
3065 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3066 idx = TX_CDC_DMA_TX_3;
3067 break;
3068 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3069 idx = TX_CDC_DMA_TX_4;
3070 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003071 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3072 idx = VA_CDC_DMA_TX_0;
3073 break;
3074 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3075 idx = VA_CDC_DMA_TX_1;
3076 break;
3077 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3078 idx = VA_CDC_DMA_TX_2;
3079 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003080 default:
3081 idx = RX_CDC_DMA_RX_0;
3082 break;
3083 }
3084
3085 return idx;
3086}
3087
Banajit Goswami83a370d2019-03-05 16:15:21 -08003088static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3089 struct snd_ctl_elem_value *ucontrol)
3090{
3091 /*
3092 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3093 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3094 * value.
3095 */
3096 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3097 case SAMPLING_RATE_96KHZ:
3098 ucontrol->value.integer.value[0] = 5;
3099 break;
3100 case SAMPLING_RATE_88P2KHZ:
3101 ucontrol->value.integer.value[0] = 4;
3102 break;
3103 case SAMPLING_RATE_48KHZ:
3104 ucontrol->value.integer.value[0] = 3;
3105 break;
3106 case SAMPLING_RATE_44P1KHZ:
3107 ucontrol->value.integer.value[0] = 2;
3108 break;
3109 case SAMPLING_RATE_16KHZ:
3110 ucontrol->value.integer.value[0] = 1;
3111 break;
3112 case SAMPLING_RATE_8KHZ:
3113 default:
3114 ucontrol->value.integer.value[0] = 0;
3115 break;
3116 }
3117 pr_debug("%s: sample rate = %d\n", __func__,
3118 slim_rx_cfg[SLIM_RX_7].sample_rate);
3119
3120 return 0;
3121}
3122
3123static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3124 struct snd_ctl_elem_value *ucontrol)
3125{
3126 switch (ucontrol->value.integer.value[0]) {
3127 case 1:
3128 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3129 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3130 break;
3131 case 2:
3132 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3133 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3134 break;
3135 case 3:
3136 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3137 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3138 break;
3139 case 4:
3140 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3141 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3142 break;
3143 case 5:
3144 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3145 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3146 break;
3147 case 0:
3148 default:
3149 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3150 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3151 break;
3152 }
3153 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3154 __func__,
3155 slim_rx_cfg[SLIM_RX_7].sample_rate,
3156 slim_tx_cfg[SLIM_TX_7].sample_rate,
3157 ucontrol->value.enumerated.item[0]);
3158
3159 return 0;
3160}
3161
3162static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3163 struct snd_ctl_elem_value *ucontrol)
3164{
3165 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3166 case SAMPLING_RATE_96KHZ:
3167 ucontrol->value.integer.value[0] = 5;
3168 break;
3169 case SAMPLING_RATE_88P2KHZ:
3170 ucontrol->value.integer.value[0] = 4;
3171 break;
3172 case SAMPLING_RATE_48KHZ:
3173 ucontrol->value.integer.value[0] = 3;
3174 break;
3175 case SAMPLING_RATE_44P1KHZ:
3176 ucontrol->value.integer.value[0] = 2;
3177 break;
3178 case SAMPLING_RATE_16KHZ:
3179 ucontrol->value.integer.value[0] = 1;
3180 break;
3181 case SAMPLING_RATE_8KHZ:
3182 default:
3183 ucontrol->value.integer.value[0] = 0;
3184 break;
3185 }
3186 pr_debug("%s: sample rate rx = %d\n", __func__,
3187 slim_rx_cfg[SLIM_RX_7].sample_rate);
3188
3189 return 0;
3190}
3191
3192static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3193 struct snd_ctl_elem_value *ucontrol)
3194{
3195 switch (ucontrol->value.integer.value[0]) {
3196 case 1:
3197 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3198 break;
3199 case 2:
3200 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3201 break;
3202 case 3:
3203 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3204 break;
3205 case 4:
3206 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3207 break;
3208 case 5:
3209 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3210 break;
3211 case 0:
3212 default:
3213 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3214 break;
3215 }
3216 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3217 __func__,
3218 slim_rx_cfg[SLIM_RX_7].sample_rate,
3219 ucontrol->value.enumerated.item[0]);
3220
3221 return 0;
3222}
3223
3224static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3225 struct snd_ctl_elem_value *ucontrol)
3226{
3227 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3228 case SAMPLING_RATE_96KHZ:
3229 ucontrol->value.integer.value[0] = 5;
3230 break;
3231 case SAMPLING_RATE_88P2KHZ:
3232 ucontrol->value.integer.value[0] = 4;
3233 break;
3234 case SAMPLING_RATE_48KHZ:
3235 ucontrol->value.integer.value[0] = 3;
3236 break;
3237 case SAMPLING_RATE_44P1KHZ:
3238 ucontrol->value.integer.value[0] = 2;
3239 break;
3240 case SAMPLING_RATE_16KHZ:
3241 ucontrol->value.integer.value[0] = 1;
3242 break;
3243 case SAMPLING_RATE_8KHZ:
3244 default:
3245 ucontrol->value.integer.value[0] = 0;
3246 break;
3247 }
3248 pr_debug("%s: sample rate tx = %d\n", __func__,
3249 slim_tx_cfg[SLIM_TX_7].sample_rate);
3250
3251 return 0;
3252}
3253
3254static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3255 struct snd_ctl_elem_value *ucontrol)
3256{
3257 switch (ucontrol->value.integer.value[0]) {
3258 case 1:
3259 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3260 break;
3261 case 2:
3262 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3263 break;
3264 case 3:
3265 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3266 break;
3267 case 4:
3268 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3269 break;
3270 case 5:
3271 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3272 break;
3273 case 0:
3274 default:
3275 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3276 break;
3277 }
3278 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3279 __func__,
3280 slim_tx_cfg[SLIM_TX_7].sample_rate,
3281 ucontrol->value.enumerated.item[0]);
3282
3283 return 0;
3284}
3285
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003286static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3287 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3288 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3289 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3290 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3291 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3292 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3293 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3294 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3295 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3296 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3297 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3298 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3299 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3300 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3301 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3302 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3303 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3304 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3305 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3306 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3307 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3308 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3309 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3310 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3311 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3312 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003313 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3314 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3315 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3316 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3317 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3318 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003319 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3320 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3321 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3322 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003323 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3324 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3325 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3326 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3327 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3328 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3329 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3330 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3331 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3332 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003333 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3334 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3335 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3336 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3337 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3338 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003339 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3340 wsa_cdc_dma_rx_0_sample_rate,
3341 cdc_dma_rx_sample_rate_get,
3342 cdc_dma_rx_sample_rate_put),
3343 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3344 wsa_cdc_dma_rx_1_sample_rate,
3345 cdc_dma_rx_sample_rate_get,
3346 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003347 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3348 wsa_cdc_dma_tx_0_sample_rate,
3349 cdc_dma_tx_sample_rate_get,
3350 cdc_dma_tx_sample_rate_put),
3351 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3352 wsa_cdc_dma_tx_1_sample_rate,
3353 cdc_dma_tx_sample_rate_get,
3354 cdc_dma_tx_sample_rate_put),
3355 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3356 wsa_cdc_dma_tx_2_sample_rate,
3357 cdc_dma_tx_sample_rate_get,
3358 cdc_dma_tx_sample_rate_put),
3359 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3360 tx_cdc_dma_tx_0_sample_rate,
3361 cdc_dma_tx_sample_rate_get,
3362 cdc_dma_tx_sample_rate_put),
3363 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3364 tx_cdc_dma_tx_3_sample_rate,
3365 cdc_dma_tx_sample_rate_get,
3366 cdc_dma_tx_sample_rate_put),
3367 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3368 tx_cdc_dma_tx_4_sample_rate,
3369 cdc_dma_tx_sample_rate_get,
3370 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08003371 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3372 va_cdc_dma_tx_0_sample_rate,
3373 cdc_dma_tx_sample_rate_get,
3374 cdc_dma_tx_sample_rate_put),
3375 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3376 va_cdc_dma_tx_1_sample_rate,
3377 cdc_dma_tx_sample_rate_get,
3378 cdc_dma_tx_sample_rate_put),
3379 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3380 va_cdc_dma_tx_2_sample_rate,
3381 cdc_dma_tx_sample_rate_get,
3382 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07003383};
3384
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07003385static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3386 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3387 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3388 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3389 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3390 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3391 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3392 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3393 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3394 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3395 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3396 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3397 rx_cdc80_dma_rx_0_sample_rate,
3398 cdc_dma_rx_sample_rate_get,
3399 cdc_dma_rx_sample_rate_put),
3400 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3401 rx_cdc80_dma_rx_1_sample_rate,
3402 cdc_dma_rx_sample_rate_get,
3403 cdc_dma_rx_sample_rate_put),
3404 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3405 rx_cdc80_dma_rx_2_sample_rate,
3406 cdc_dma_rx_sample_rate_get,
3407 cdc_dma_rx_sample_rate_put),
3408 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3409 rx_cdc80_dma_rx_3_sample_rate,
3410 cdc_dma_rx_sample_rate_get,
3411 cdc_dma_rx_sample_rate_put),
3412 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3413 rx_cdc80_dma_rx_5_sample_rate,
3414 cdc_dma_rx_sample_rate_get,
3415 cdc_dma_rx_sample_rate_put),
3416};
3417
3418static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3419 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3420 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3421 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3422 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3423 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3424 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3425 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3426 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3427 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3428 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3429 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3430 rx_cdc85_dma_rx_0_sample_rate,
3431 cdc_dma_rx_sample_rate_get,
3432 cdc_dma_rx_sample_rate_put),
3433 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3434 rx_cdc85_dma_rx_1_sample_rate,
3435 cdc_dma_rx_sample_rate_get,
3436 cdc_dma_rx_sample_rate_put),
3437 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3438 rx_cdc85_dma_rx_2_sample_rate,
3439 cdc_dma_rx_sample_rate_get,
3440 cdc_dma_rx_sample_rate_put),
3441 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3442 rx_cdc85_dma_rx_3_sample_rate,
3443 cdc_dma_rx_sample_rate_get,
3444 cdc_dma_rx_sample_rate_put),
3445 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3446 rx_cdc85_dma_rx_5_sample_rate,
3447 cdc_dma_rx_sample_rate_get,
3448 cdc_dma_rx_sample_rate_put),
3449};
3450
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003451static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3452 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3453 usb_audio_rx_sample_rate_get,
3454 usb_audio_rx_sample_rate_put),
3455 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3456 usb_audio_tx_sample_rate_get,
3457 usb_audio_tx_sample_rate_put),
3458 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3459 tdm_rx_sample_rate_get,
3460 tdm_rx_sample_rate_put),
3461 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3462 tdm_rx_sample_rate_get,
3463 tdm_rx_sample_rate_put),
3464 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3465 tdm_rx_sample_rate_get,
3466 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003467 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3468 tdm_rx_sample_rate_get,
3469 tdm_rx_sample_rate_put),
3470 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3471 tdm_rx_sample_rate_get,
3472 tdm_rx_sample_rate_put),
3473 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3474 tdm_rx_sample_rate_get,
3475 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003476 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3477 tdm_tx_sample_rate_get,
3478 tdm_tx_sample_rate_put),
3479 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3480 tdm_tx_sample_rate_get,
3481 tdm_tx_sample_rate_put),
3482 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3483 tdm_tx_sample_rate_get,
3484 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003485 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3486 tdm_tx_sample_rate_get,
3487 tdm_tx_sample_rate_put),
3488 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3489 tdm_tx_sample_rate_get,
3490 tdm_tx_sample_rate_put),
3491 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3492 tdm_tx_sample_rate_get,
3493 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003494 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3495 aux_pcm_rx_sample_rate_get,
3496 aux_pcm_rx_sample_rate_put),
3497 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3498 aux_pcm_rx_sample_rate_get,
3499 aux_pcm_rx_sample_rate_put),
3500 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3501 aux_pcm_rx_sample_rate_get,
3502 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003503 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3504 aux_pcm_rx_sample_rate_get,
3505 aux_pcm_rx_sample_rate_put),
3506 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3507 aux_pcm_rx_sample_rate_get,
3508 aux_pcm_rx_sample_rate_put),
3509 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3510 aux_pcm_rx_sample_rate_get,
3511 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003512 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3513 aux_pcm_tx_sample_rate_get,
3514 aux_pcm_tx_sample_rate_put),
3515 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3516 aux_pcm_tx_sample_rate_get,
3517 aux_pcm_tx_sample_rate_put),
3518 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3519 aux_pcm_tx_sample_rate_get,
3520 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003521 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3522 aux_pcm_tx_sample_rate_get,
3523 aux_pcm_tx_sample_rate_put),
3524 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3525 aux_pcm_tx_sample_rate_get,
3526 aux_pcm_tx_sample_rate_put),
3527 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3528 aux_pcm_tx_sample_rate_get,
3529 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003530 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3531 mi2s_rx_sample_rate_get,
3532 mi2s_rx_sample_rate_put),
3533 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3534 mi2s_rx_sample_rate_get,
3535 mi2s_rx_sample_rate_put),
3536 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3537 mi2s_rx_sample_rate_get,
3538 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003539 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3540 mi2s_rx_sample_rate_get,
3541 mi2s_rx_sample_rate_put),
3542 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3543 mi2s_rx_sample_rate_get,
3544 mi2s_rx_sample_rate_put),
3545 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3546 mi2s_rx_sample_rate_get,
3547 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003548 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3549 mi2s_tx_sample_rate_get,
3550 mi2s_tx_sample_rate_put),
3551 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3552 mi2s_tx_sample_rate_get,
3553 mi2s_tx_sample_rate_put),
3554 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3555 mi2s_tx_sample_rate_get,
3556 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003557 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3558 mi2s_tx_sample_rate_get,
3559 mi2s_tx_sample_rate_put),
3560 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3561 mi2s_tx_sample_rate_get,
3562 mi2s_tx_sample_rate_put),
3563 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3564 mi2s_tx_sample_rate_get,
3565 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003566 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3567 usb_audio_rx_format_get, usb_audio_rx_format_put),
3568 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3569 usb_audio_tx_format_get, usb_audio_tx_format_put),
3570 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3571 tdm_rx_format_get,
3572 tdm_rx_format_put),
3573 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3574 tdm_rx_format_get,
3575 tdm_rx_format_put),
3576 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3577 tdm_rx_format_get,
3578 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003579 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3580 tdm_rx_format_get,
3581 tdm_rx_format_put),
3582 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3583 tdm_rx_format_get,
3584 tdm_rx_format_put),
3585 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3586 tdm_rx_format_get,
3587 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003588 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3589 tdm_tx_format_get,
3590 tdm_tx_format_put),
3591 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3592 tdm_tx_format_get,
3593 tdm_tx_format_put),
3594 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3595 tdm_tx_format_get,
3596 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003597 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3598 tdm_tx_format_get,
3599 tdm_tx_format_put),
3600 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3601 tdm_tx_format_get,
3602 tdm_tx_format_put),
3603 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3604 tdm_tx_format_get,
3605 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003606 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3607 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3608 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3609 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3610 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3611 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003612 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3613 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3614 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3615 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3616 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3617 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003618 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3619 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3620 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3621 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3622 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3623 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003624 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3625 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3626 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3627 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3628 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3629 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003630 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3631 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3632 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3633 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3634 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3635 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003636 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3637 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3638 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3639 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3640 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3641 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003642 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3643 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3644 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3645 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3646 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3647 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003648 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3649 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3650 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3651 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3652 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3653 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003654 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3655 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3656 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3657 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3658 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3659 proxy_rx_ch_get, proxy_rx_ch_put),
3660 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3661 tdm_rx_ch_get,
3662 tdm_rx_ch_put),
3663 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3664 tdm_rx_ch_get,
3665 tdm_rx_ch_put),
3666 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3667 tdm_rx_ch_get,
3668 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003669 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3670 tdm_rx_ch_get,
3671 tdm_rx_ch_put),
3672 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3673 tdm_rx_ch_get,
3674 tdm_rx_ch_put),
3675 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3676 tdm_rx_ch_get,
3677 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003678 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3679 tdm_tx_ch_get,
3680 tdm_tx_ch_put),
3681 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3682 tdm_tx_ch_get,
3683 tdm_tx_ch_put),
3684 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3685 tdm_tx_ch_get,
3686 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003687 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3688 tdm_tx_ch_get,
3689 tdm_tx_ch_put),
3690 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3691 tdm_tx_ch_get,
3692 tdm_tx_ch_put),
3693 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3694 tdm_tx_ch_get,
3695 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003696 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3697 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3698 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3699 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3700 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3701 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003702 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3703 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3704 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3705 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3706 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3707 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003708 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3709 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3710 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3711 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3712 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3713 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003714 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3715 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3716 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3717 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3718 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3719 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -08003720 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3721 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3722 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3723 ext_disp_rx_format_get, ext_disp_rx_format_put),
3724 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3725 ext_disp_rx_sample_rate_get,
3726 ext_disp_rx_sample_rate_put),
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07003727 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3728 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3729 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3730 ext_disp_rx_format_get, ext_disp_rx_format_put),
3731 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3732 ext_disp_rx_sample_rate_get,
3733 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -08003734 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3735 msm_bt_sample_rate_get,
3736 msm_bt_sample_rate_put),
3737 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3738 msm_bt_sample_rate_rx_get,
3739 msm_bt_sample_rate_rx_put),
3740 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3741 msm_bt_sample_rate_tx_get,
3742 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +08003743 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3744 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +08003745 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3746 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003747};
3748
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07003749static const struct snd_kcontrol_new msm_snd_controls[] = {
3750 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3751 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3752 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3753 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3754 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3755 aux_pcm_rx_sample_rate_get,
3756 aux_pcm_rx_sample_rate_put),
3757 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3758 aux_pcm_tx_sample_rate_get,
3759 aux_pcm_tx_sample_rate_put),
3760};
3761
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08003762static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3763{
3764 int idx;
3765
3766 switch (be_id) {
3767 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3768 idx = EXT_DISP_RX_IDX_DP;
3769 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07003770 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
3771 idx = EXT_DISP_RX_IDX_DP1;
3772 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08003773 default:
3774 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3775 idx = -EINVAL;
3776 break;
3777 }
3778
3779 return idx;
3780}
3781
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07003782static int kona_send_island_va_config(int32_t be_id)
3783{
3784 int rc = 0;
3785 int port_id = 0xFFFF;
3786
3787 port_id = msm_get_port_id(be_id);
3788 if (port_id < 0) {
3789 pr_err("%s: Invalid island interface, be_id: %d\n",
3790 __func__, be_id);
3791 rc = -EINVAL;
3792 } else {
3793 /*
3794 * send island mode config
3795 * This should be the first configuration
3796 */
3797 rc = afe_send_port_island_mode(port_id);
3798 if (rc)
3799 pr_err("%s: afe send island mode failed %d\n",
3800 __func__, rc);
3801 }
3802
3803 return rc;
3804}
3805
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003806static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3807 struct snd_pcm_hw_params *params)
3808{
3809 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3810 struct snd_interval *rate = hw_param_interval(params,
3811 SNDRV_PCM_HW_PARAM_RATE);
3812 struct snd_interval *channels = hw_param_interval(params,
3813 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +08003814 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003815
3816 pr_debug("%s: format = %d, rate = %d\n",
3817 __func__, params_format(params), params_rate(params));
3818
3819 switch (dai_link->id) {
3820 case MSM_BACKEND_DAI_USB_RX:
3821 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3822 usb_rx_cfg.bit_format);
3823 rate->min = rate->max = usb_rx_cfg.sample_rate;
3824 channels->min = channels->max = usb_rx_cfg.channels;
3825 break;
3826
3827 case MSM_BACKEND_DAI_USB_TX:
3828 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3829 usb_tx_cfg.bit_format);
3830 rate->min = rate->max = usb_tx_cfg.sample_rate;
3831 channels->min = channels->max = usb_tx_cfg.channels;
3832 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08003833
3834 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07003835 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08003836 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
3837 if (idx < 0) {
3838 pr_err("%s: Incorrect ext disp idx %d\n",
3839 __func__, idx);
3840 rc = idx;
3841 goto done;
3842 }
3843
3844 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3845 ext_disp_rx_cfg[idx].bit_format);
3846 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
3847 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
3848 break;
3849
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003850 case MSM_BACKEND_DAI_AFE_PCM_RX:
3851 channels->min = channels->max = proxy_rx_cfg.channels;
3852 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3853 break;
3854
3855 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3856 channels->min = channels->max =
3857 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3858 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3859 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3860 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3861 break;
3862
3863 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3864 channels->min = channels->max =
3865 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3866 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3867 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3868 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3869 break;
3870
3871 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3872 channels->min = channels->max =
3873 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3874 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3875 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3876 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3877 break;
3878
3879 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3880 channels->min = channels->max =
3881 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3882 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3883 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3884 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3885 break;
3886
3887 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3888 channels->min = channels->max =
3889 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3890 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3891 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3892 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3893 break;
3894
3895 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3896 channels->min = channels->max =
3897 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3898 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3899 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3900 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3901 break;
3902
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08003903 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3904 channels->min = channels->max =
3905 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3906 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3907 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3908 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3909 break;
3910
3911 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3912 channels->min = channels->max =
3913 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3914 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3915 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3916 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3917 break;
3918
3919 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
3920 channels->min = channels->max =
3921 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
3922 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3923 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
3924 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
3925 break;
3926
3927 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
3928 channels->min = channels->max =
3929 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
3930 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3931 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
3932 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
3933 break;
3934
3935 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
3936 channels->min = channels->max =
3937 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
3938 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3939 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
3940 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
3941 break;
3942
3943 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
3944 channels->min = channels->max =
3945 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
3946 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3947 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
3948 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
3949 break;
3950
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07003951 case MSM_BACKEND_DAI_AUXPCM_RX:
3952 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3953 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3954 rate->min = rate->max =
3955 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3956 channels->min = channels->max =
3957 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3958 break;
3959
3960 case MSM_BACKEND_DAI_AUXPCM_TX:
3961 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3962 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3963 rate->min = rate->max =
3964 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3965 channels->min = channels->max =
3966 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3967 break;
3968
3969 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3970 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3971 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3972 rate->min = rate->max =
3973 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3974 channels->min = channels->max =
3975 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3976 break;
3977
3978 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3979 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3980 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3981 rate->min = rate->max =
3982 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3983 channels->min = channels->max =
3984 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3985 break;
3986
3987 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3988 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3989 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3990 rate->min = rate->max =
3991 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3992 channels->min = channels->max =
3993 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3994 break;
3995
3996 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3997 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3998 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3999 rate->min = rate->max =
4000 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4001 channels->min = channels->max =
4002 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4003 break;
4004
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004005 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4006 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4007 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4008 rate->min = rate->max =
4009 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4010 channels->min = channels->max =
4011 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4012 break;
4013
4014 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4015 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4016 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4017 rate->min = rate->max =
4018 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4019 channels->min = channels->max =
4020 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4021 break;
4022
4023 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4024 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4025 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4026 rate->min = rate->max =
4027 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4028 channels->min = channels->max =
4029 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4030 break;
4031
4032 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4033 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4034 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4035 rate->min = rate->max =
4036 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4037 channels->min = channels->max =
4038 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4039 break;
4040
4041 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4042 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4043 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4044 rate->min = rate->max =
4045 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4046 channels->min = channels->max =
4047 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4048 break;
4049
4050 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4051 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4052 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4053 rate->min = rate->max =
4054 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4055 channels->min = channels->max =
4056 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4057 break;
4058
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004059 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4060 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4061 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4062 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4063 channels->min = channels->max =
4064 mi2s_rx_cfg[PRIM_MI2S].channels;
4065 break;
4066
4067 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4068 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4069 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4070 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4071 channels->min = channels->max =
4072 mi2s_tx_cfg[PRIM_MI2S].channels;
4073 break;
4074
4075 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4076 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4077 mi2s_rx_cfg[SEC_MI2S].bit_format);
4078 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4079 channels->min = channels->max =
4080 mi2s_rx_cfg[SEC_MI2S].channels;
4081 break;
4082
4083 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4084 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4085 mi2s_tx_cfg[SEC_MI2S].bit_format);
4086 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4087 channels->min = channels->max =
4088 mi2s_tx_cfg[SEC_MI2S].channels;
4089 break;
4090
4091 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4092 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4093 mi2s_rx_cfg[TERT_MI2S].bit_format);
4094 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4095 channels->min = channels->max =
4096 mi2s_rx_cfg[TERT_MI2S].channels;
4097 break;
4098
4099 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4100 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4101 mi2s_tx_cfg[TERT_MI2S].bit_format);
4102 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4103 channels->min = channels->max =
4104 mi2s_tx_cfg[TERT_MI2S].channels;
4105 break;
4106
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004107 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4108 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4109 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4110 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4111 channels->min = channels->max =
4112 mi2s_rx_cfg[QUAT_MI2S].channels;
4113 break;
4114
4115 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4116 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4117 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4118 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4119 channels->min = channels->max =
4120 mi2s_tx_cfg[QUAT_MI2S].channels;
4121 break;
4122
4123 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4124 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4125 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4126 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4127 channels->min = channels->max =
4128 mi2s_rx_cfg[QUIN_MI2S].channels;
4129 break;
4130
4131 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4132 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4133 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4134 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4135 channels->min = channels->max =
4136 mi2s_tx_cfg[QUIN_MI2S].channels;
4137 break;
4138
4139 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4140 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4141 mi2s_rx_cfg[SEN_MI2S].bit_format);
4142 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4143 channels->min = channels->max =
4144 mi2s_rx_cfg[SEN_MI2S].channels;
4145 break;
4146
4147 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4148 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4149 mi2s_tx_cfg[SEN_MI2S].bit_format);
4150 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4151 channels->min = channels->max =
4152 mi2s_tx_cfg[SEN_MI2S].channels;
4153 break;
4154
Meng Wang574f4942019-02-18 12:59:41 +08004155 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4156 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4157 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4158 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4159 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4160 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4161 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4162 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4163 cdc_dma_rx_cfg[idx].bit_format);
4164 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4165 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4166 break;
4167
4168 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4169 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4170 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4171 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4172 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004173 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4174 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4175 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4176 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4177 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +08004178 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004179 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4180 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4181 break;
4182
Meng Wang574f4942019-02-18 12:59:41 +08004183 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4184 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4185 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004186 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +08004187 channels->min = channels->max = msm_vi_feed_tx_ch;
4188 break;
4189
Banajit Goswami83a370d2019-03-05 16:15:21 -08004190 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4191 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4192 slim_rx_cfg[SLIM_RX_7].bit_format);
4193 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4194 channels->min = channels->max =
4195 slim_rx_cfg[SLIM_RX_7].channels;
4196 break;
4197
4198 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4199 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4200 channels->min = channels->max =
4201 slim_tx_cfg[SLIM_TX_7].channels;
4202 break;
4203
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304204 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4205 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4206 channels->min = channels->max =
4207 slim_tx_cfg[SLIM_TX_8].channels;
4208 break;
4209
Meng Wange8e53822019-03-18 10:49:50 +08004210 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4211 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4212 afe_loopback_tx_cfg[idx].bit_format);
4213 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4214 channels->min = channels->max =
4215 afe_loopback_tx_cfg[idx].channels;
4216 break;
4217
Meng Wang574f4942019-02-18 12:59:41 +08004218 default:
4219 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004220 break;
4221 }
4222
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004223done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004224 return rc;
4225}
4226
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08004227static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4228{
4229 struct snd_soc_card *card = component->card;
4230 struct msm_asoc_mach_data *pdata =
4231 snd_soc_card_get_drvdata(card);
4232
4233 if (!pdata->fsa_handle)
4234 return false;
4235
4236 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4237}
4238
4239static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4240{
4241 int value = 0;
4242 bool ret = false;
4243 struct snd_soc_card *card;
4244 struct msm_asoc_mach_data *pdata;
4245
4246 if (!component) {
4247 pr_err("%s component is NULL\n", __func__);
4248 return false;
4249 }
4250 card = component->card;
4251 pdata = snd_soc_card_get_drvdata(card);
4252
4253 if (!pdata)
4254 return false;
4255
4256 if (wcd_mbhc_cfg.enable_usbc_analog)
4257 return msm_usbc_swap_gnd_mic(component, active);
4258
4259 /* if usbc is not defined, swap using us_euro_gpio_p */
4260 if (pdata->us_euro_gpio_p) {
4261 value = msm_cdc_pinctrl_get_state(
4262 pdata->us_euro_gpio_p);
4263 if (value)
4264 msm_cdc_pinctrl_select_sleep_state(
4265 pdata->us_euro_gpio_p);
4266 else
4267 msm_cdc_pinctrl_select_active_state(
4268 pdata->us_euro_gpio_p);
4269 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4270 __func__, value, !value);
4271 ret = true;
4272 }
4273
4274 return ret;
4275}
4276
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004277static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4278 struct snd_pcm_hw_params *params)
4279{
4280 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4281 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4282 int ret = 0;
4283 int slot_width = 32;
4284 int channels, slots;
4285 unsigned int slot_mask, rate, clk_freq;
4286 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
4287
4288 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4289
4290 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
4291 switch (cpu_dai->id) {
4292 case AFE_PORT_ID_PRIMARY_TDM_RX:
4293 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4294 break;
4295 case AFE_PORT_ID_SECONDARY_TDM_RX:
4296 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4297 break;
4298 case AFE_PORT_ID_TERTIARY_TDM_RX:
4299 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4300 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004301 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4302 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4303 break;
4304 case AFE_PORT_ID_QUINARY_TDM_RX:
4305 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4306 break;
4307 case AFE_PORT_ID_SENARY_TDM_RX:
4308 slots = tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4309 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004310 case AFE_PORT_ID_PRIMARY_TDM_TX:
4311 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4312 break;
4313 case AFE_PORT_ID_SECONDARY_TDM_TX:
4314 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4315 break;
4316 case AFE_PORT_ID_TERTIARY_TDM_TX:
4317 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4318 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004319 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4320 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4321 break;
4322 case AFE_PORT_ID_QUINARY_TDM_TX:
4323 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4324 break;
4325 case AFE_PORT_ID_SENARY_TDM_TX:
4326 slots = tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4327 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004328
4329 default:
4330 pr_err("%s: dai id 0x%x not supported\n",
4331 __func__, cpu_dai->id);
4332 return -EINVAL;
4333 }
4334
4335 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4336 /*2 slot config - bits 0 and 1 set for the first two slots */
4337 slot_mask = 0x0000FFFF >> (16 - slots);
4338 channels = slots;
4339
4340 pr_debug("%s: tdm rx slot_width %d slots %d\n",
4341 __func__, slot_width, slots);
4342
4343 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4344 slots, slot_width);
4345 if (ret < 0) {
4346 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4347 __func__, ret);
4348 goto end;
4349 }
4350
4351 ret = snd_soc_dai_set_channel_map(cpu_dai,
4352 0, NULL, channels, slot_offset);
4353 if (ret < 0) {
4354 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4355 __func__, ret);
4356 goto end;
4357 }
4358 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4359 /*2 slot config - bits 0 and 1 set for the first two slots */
4360 slot_mask = 0x0000FFFF >> (16 - slots);
4361 channels = slots;
4362
4363 pr_debug("%s: tdm tx slot_width %d slots %d\n",
4364 __func__, slot_width, slots);
4365
4366 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4367 slots, slot_width);
4368 if (ret < 0) {
4369 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4370 __func__, ret);
4371 goto end;
4372 }
4373
4374 ret = snd_soc_dai_set_channel_map(cpu_dai,
4375 channels, slot_offset, 0, NULL);
4376 if (ret < 0) {
4377 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4378 __func__, ret);
4379 goto end;
4380 }
4381 } else {
4382 ret = -EINVAL;
4383 pr_err("%s: invalid use case, err:%d\n",
4384 __func__, ret);
4385 goto end;
4386 }
4387
4388 rate = params_rate(params);
4389 clk_freq = rate * slot_width * slots;
4390 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4391 if (ret < 0)
4392 pr_err("%s: failed to set tdm clk, err:%d\n",
4393 __func__, ret);
4394
4395end:
4396 return ret;
4397}
4398
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004399static int msm_get_tdm_mode(u32 port_id)
4400{
4401 int tdm_mode;
4402
4403 switch (port_id) {
4404 case AFE_PORT_ID_PRIMARY_TDM_RX:
4405 case AFE_PORT_ID_PRIMARY_TDM_TX:
4406 tdm_mode = TDM_PRI;
4407 break;
4408 case AFE_PORT_ID_SECONDARY_TDM_RX:
4409 case AFE_PORT_ID_SECONDARY_TDM_TX:
4410 tdm_mode = TDM_SEC;
4411 break;
4412 case AFE_PORT_ID_TERTIARY_TDM_RX:
4413 case AFE_PORT_ID_TERTIARY_TDM_TX:
4414 tdm_mode = TDM_TERT;
4415 break;
4416 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4417 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4418 tdm_mode = TDM_QUAT;
4419 break;
4420 case AFE_PORT_ID_QUINARY_TDM_RX:
4421 case AFE_PORT_ID_QUINARY_TDM_TX:
4422 tdm_mode = TDM_QUIN;
4423 break;
4424 case AFE_PORT_ID_SENARY_TDM_RX:
4425 case AFE_PORT_ID_SENARY_TDM_TX:
4426 tdm_mode = TDM_SEN;
4427 break;
4428 default:
4429 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4430 tdm_mode = -EINVAL;
4431 }
4432 return tdm_mode;
4433}
4434
4435static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4436{
4437 int ret = 0;
4438 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4439 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4440 struct snd_soc_card *card = rtd->card;
4441 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4442 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4443
4444 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4445 ret = -EINVAL;
4446 pr_err("%s: Invalid TDM interface %d\n",
4447 __func__, ret);
4448 return ret;
4449 }
4450
4451 if (pdata->mi2s_gpio_p[tdm_mode]) {
4452 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4453 == 0) {
4454 ret = msm_cdc_pinctrl_select_active_state(
4455 pdata->mi2s_gpio_p[tdm_mode]);
4456 if (ret) {
4457 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4458 __func__, ret);
4459 goto done;
4460 }
4461 }
4462 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4463 }
4464
4465done:
4466 return ret;
4467}
4468
4469static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4470{
4471 int ret = 0;
4472 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4473 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4474 struct snd_soc_card *card = rtd->card;
4475 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4476 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4477
4478 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4479 ret = -EINVAL;
4480 pr_err("%s: Invalid TDM interface %d\n",
4481 __func__, ret);
4482 return;
4483 }
4484
4485 if (pdata->mi2s_gpio_p[tdm_mode]) {
4486 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4487 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4488 == 0) {
4489 ret = msm_cdc_pinctrl_select_sleep_state(
4490 pdata->mi2s_gpio_p[tdm_mode]);
4491 if (ret)
4492 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4493 __func__, ret);
4494 }
4495 }
4496}
4497
4498static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4499{
4500 int ret = 0;
4501 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4502 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4503 struct snd_soc_card *card = rtd->card;
4504 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4505 u32 aux_mode = cpu_dai->id - 1;
4506
4507 if (aux_mode >= AUX_PCM_MAX) {
4508 ret = -EINVAL;
4509 pr_err("%s: Invalid AUX interface %d\n",
4510 __func__, ret);
4511 return ret;
4512 }
4513
4514 if (pdata->mi2s_gpio_p[aux_mode]) {
4515 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4516 == 0) {
4517 ret = msm_cdc_pinctrl_select_active_state(
4518 pdata->mi2s_gpio_p[aux_mode]);
4519 if (ret) {
4520 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4521 __func__, ret);
4522 goto done;
4523 }
4524 }
4525 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4526 }
4527
4528done:
4529 return ret;
4530}
4531
4532static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4533{
4534 int ret = 0;
4535 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4536 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4537 struct snd_soc_card *card = rtd->card;
4538 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4539 u32 aux_mode = cpu_dai->id - 1;
4540
4541 if (aux_mode >= AUX_PCM_MAX) {
4542 pr_err("%s: Invalid AUX interface %d\n",
4543 __func__, ret);
4544 return;
4545 }
4546
4547 if (pdata->mi2s_gpio_p[aux_mode]) {
4548 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4549 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4550 == 0) {
4551 ret = msm_cdc_pinctrl_select_sleep_state(
4552 pdata->mi2s_gpio_p[aux_mode]);
4553 if (ret)
4554 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4555 __func__, ret);
4556 }
4557 }
4558}
4559
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004560static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4561{
4562 int ret = 0;
4563 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4564 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4565
4566 switch (dai_link->id) {
4567 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4568 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4569 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4570 ret = kona_send_island_va_config(dai_link->id);
4571 if (ret)
4572 pr_err("%s: send island va cfg failed, err: %d\n",
4573 __func__, ret);
4574 break;
4575 }
4576
4577 return ret;
4578}
4579
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004580static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4581 struct snd_pcm_hw_params *params)
4582{
4583 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4584 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4585 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4586 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4587
4588 int ret = 0;
4589 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4590 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4591 u32 user_set_tx_ch = 0;
4592 u32 user_set_rx_ch = 0;
4593 u32 ch_id;
4594
4595 ret = snd_soc_dai_get_channel_map(codec_dai,
4596 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4597 &rx_ch_cdc_dma);
4598 if (ret < 0) {
4599 pr_err("%s: failed to get codec chan map, err:%d\n",
4600 __func__, ret);
4601 goto err;
4602 }
4603
4604 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4605 switch (dai_link->id) {
4606 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4607 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4608 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4609 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4610 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4611 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4612 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4613 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4614 {
4615 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4616 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4617 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4618 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4619 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4620 user_set_rx_ch, &rx_ch_cdc_dma);
4621 if (ret < 0) {
4622 pr_err("%s: failed to set cpu chan map, err:%d\n",
4623 __func__, ret);
4624 goto err;
4625 }
4626
4627 }
4628 break;
4629 }
4630 } else {
4631 switch (dai_link->id) {
4632 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4633 {
4634 user_set_tx_ch = msm_vi_feed_tx_ch;
4635 }
4636 break;
4637 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4638 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4639 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4640 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4641 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08004642 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4643 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4644 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004645 {
4646 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4647 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4648 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4649 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4650 }
4651 break;
4652 }
4653
4654 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4655 &tx_ch_cdc_dma, 0, 0);
4656 if (ret < 0) {
4657 pr_err("%s: failed to set cpu chan map, err:%d\n",
4658 __func__, ret);
4659 goto err;
4660 }
4661 }
4662
4663err:
4664 return ret;
4665}
4666
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004667static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4668{
4669 cpumask_t mask;
4670
4671 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4672 pm_qos_remove_request(&substream->latency_pm_qos_req);
4673
4674 cpumask_clear(&mask);
4675 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4676 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4677 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4678
4679 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4680
4681 pm_qos_add_request(&substream->latency_pm_qos_req,
4682 PM_QOS_CPU_DMA_LATENCY,
4683 MSM_LL_QOS_VALUE);
4684 return 0;
4685}
4686
4687static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4688{
4689 int ret = 0;
4690 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4691 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4692 int index = cpu_dai->id;
4693 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004694 struct snd_soc_card *card = rtd->card;
4695 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004696
4697 dev_dbg(rtd->card->dev,
4698 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4699 __func__, substream->name, substream->stream,
4700 cpu_dai->name, cpu_dai->id);
4701
4702 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4703 ret = -EINVAL;
4704 dev_err(rtd->card->dev,
4705 "%s: CPU DAI id (%d) out of range\n",
4706 __func__, cpu_dai->id);
4707 goto err;
4708 }
4709 /*
4710 * Mutex protection in case the same MI2S
4711 * interface using for both TX and RX so
4712 * that the same clock won't be enable twice.
4713 */
4714 mutex_lock(&mi2s_intf_conf[index].lock);
4715 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4716 /* Check if msm needs to provide the clock to the interface */
4717 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4718 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4719 fmt = SND_SOC_DAIFMT_CBM_CFM;
4720 }
4721 ret = msm_mi2s_set_sclk(substream, true);
4722 if (ret < 0) {
4723 dev_err(rtd->card->dev,
4724 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4725 __func__, ret);
4726 goto clean_up;
4727 }
4728
4729 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4730 if (ret < 0) {
4731 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4732 __func__, index, ret);
4733 goto clk_off;
4734 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004735 if (pdata->mi2s_gpio_p[index]) {
4736 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4737 == 0) {
4738 ret = msm_cdc_pinctrl_select_active_state(
4739 pdata->mi2s_gpio_p[index]);
4740 if (ret) {
4741 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4742 __func__, ret);
4743 goto clk_off;
4744 }
4745 }
4746 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4747 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004748 }
4749clk_off:
4750 if (ret < 0)
4751 msm_mi2s_set_sclk(substream, false);
4752clean_up:
4753 if (ret < 0)
4754 mi2s_intf_conf[index].ref_cnt--;
4755 mutex_unlock(&mi2s_intf_conf[index].lock);
4756err:
4757 return ret;
4758}
4759
4760static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4761{
4762 int ret = 0;
4763 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4764 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004765 struct snd_soc_card *card = rtd->card;
4766 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004767
4768 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4769 substream->name, substream->stream);
4770 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4771 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4772 return;
4773 }
4774
4775 mutex_lock(&mi2s_intf_conf[index].lock);
4776 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004777 if (pdata->mi2s_gpio_p[index]) {
4778 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4779 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4780 == 0) {
4781 ret = msm_cdc_pinctrl_select_sleep_state(
4782 pdata->mi2s_gpio_p[index]);
4783 if (ret)
4784 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4785 __func__, ret);
4786 }
4787 }
4788
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004789 ret = msm_mi2s_set_sclk(substream, false);
4790 if (ret < 0)
4791 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4792 __func__, index, ret);
4793 }
4794 mutex_unlock(&mi2s_intf_conf[index].lock);
4795}
4796
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304797static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4798 struct snd_pcm_hw_params *params)
4799{
4800 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4801 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4802 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4803 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4804 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4805 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4806 int ret = 0;
4807
4808 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4809 codec_dai->name, codec_dai->id);
4810 ret = snd_soc_dai_get_channel_map(codec_dai,
4811 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4812 if (ret) {
4813 dev_err(rtd->dev,
4814 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4815 __func__, ret);
4816 goto err;
4817 }
4818
4819 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4820 __func__, tx_ch_cnt, dai_link->id);
4821
4822 ret = snd_soc_dai_set_channel_map(cpu_dai,
4823 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4824 if (ret)
4825 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4826 __func__, ret);
4827
4828err:
4829 return ret;
4830}
4831
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004832static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4833 struct snd_pcm_hw_params *params)
4834{
4835 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4836 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4837 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4838 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4839 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4840 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4841 int ret = 0;
4842
4843 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4844 codec_dai->name, codec_dai->id);
4845 ret = snd_soc_dai_get_channel_map(codec_dai,
4846 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4847 if (ret) {
4848 dev_err(rtd->dev,
4849 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4850 __func__, ret);
4851 goto err;
4852 }
4853
4854 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4855 __func__, tx_ch_cnt, dai_link->id);
4856
4857 ret = snd_soc_dai_set_channel_map(cpu_dai,
4858 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4859 if (ret)
4860 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4861 __func__, ret);
4862
4863err:
4864 return ret;
4865}
4866
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004867static struct snd_soc_ops kona_aux_be_ops = {
4868 .startup = kona_aux_snd_startup,
4869 .shutdown = kona_aux_snd_shutdown
4870};
4871
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004872static struct snd_soc_ops kona_tdm_be_ops = {
4873 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08004874 .startup = kona_tdm_snd_startup,
4875 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07004876};
4877
4878static struct snd_soc_ops msm_mi2s_be_ops = {
4879 .startup = msm_mi2s_snd_startup,
4880 .shutdown = msm_mi2s_snd_shutdown,
4881};
4882
4883static struct snd_soc_ops msm_fe_qos_ops = {
4884 .prepare = msm_fe_qos_prepare,
4885};
4886
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004887static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -07004888 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004889 .hw_params = msm_snd_cdc_dma_hw_params,
4890};
4891
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08004892static struct snd_soc_ops msm_wcn_ops = {
4893 .hw_params = msm_wcn_hw_params,
4894};
4895
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05304896static struct snd_soc_ops msm_wcn_ops_lito = {
4897 .hw_params = msm_wcn_hw_params_lito,
4898};
4899
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004900static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4901 struct snd_kcontrol *kcontrol, int event)
4902{
4903 struct msm_asoc_mach_data *pdata = NULL;
4904 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
4905 int ret = 0;
4906 u32 dmic_idx;
4907 int *dmic_gpio_cnt;
4908 struct device_node *dmic_gpio;
4909 char *wname;
4910
4911 wname = strpbrk(w->name, "012345");
4912 if (!wname) {
4913 dev_err(component->dev, "%s: widget not found\n", __func__);
4914 return -EINVAL;
4915 }
4916
4917 ret = kstrtouint(wname, 10, &dmic_idx);
4918 if (ret < 0) {
4919 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4920 __func__);
4921 return -EINVAL;
4922 }
4923
4924 pdata = snd_soc_card_get_drvdata(component->card);
4925
4926 switch (dmic_idx) {
4927 case 0:
4928 case 1:
4929 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4930 dmic_gpio = pdata->dmic01_gpio_p;
4931 break;
4932 case 2:
4933 case 3:
4934 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4935 dmic_gpio = pdata->dmic23_gpio_p;
4936 break;
4937 case 4:
4938 case 5:
4939 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
4940 dmic_gpio = pdata->dmic45_gpio_p;
4941 break;
4942 default:
4943 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4944 __func__);
4945 return -EINVAL;
4946 }
4947
4948 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4949 __func__, event, dmic_idx, *dmic_gpio_cnt);
4950
4951 switch (event) {
4952 case SND_SOC_DAPM_PRE_PMU:
4953 (*dmic_gpio_cnt)++;
4954 if (*dmic_gpio_cnt == 1) {
4955 ret = msm_cdc_pinctrl_select_active_state(
4956 dmic_gpio);
4957 if (ret < 0) {
4958 pr_err("%s: gpio set cannot be activated %sd",
4959 __func__, "dmic_gpio");
4960 return ret;
4961 }
4962 }
4963
4964 break;
4965 case SND_SOC_DAPM_POST_PMD:
4966 (*dmic_gpio_cnt)--;
4967 if (*dmic_gpio_cnt == 0) {
4968 ret = msm_cdc_pinctrl_select_sleep_state(
4969 dmic_gpio);
4970 if (ret < 0) {
4971 pr_err("%s: gpio set cannot be de-activated %sd",
4972 __func__, "dmic_gpio");
4973 return ret;
4974 }
4975 }
4976 break;
4977 default:
4978 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4979 return -EINVAL;
4980 }
4981 return 0;
4982}
4983
4984static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4985 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4986 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4987 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4988 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08004989 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004990 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4991 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4992 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4993 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4994 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
4995 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05304996 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
4997 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07004998};
4999
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005000static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5001{
5002 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5003 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5004 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5005
5006 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5007 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5008}
5009
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305010static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5011{
5012 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5013 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5014 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5015
5016 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5017 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5018}
5019
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005020static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5021{
5022 int ret = -EINVAL;
5023 struct snd_soc_component *component;
5024 struct snd_soc_dapm_context *dapm;
5025 struct snd_card *card;
5026 struct snd_info_entry *entry;
5027 struct snd_soc_component *aux_comp;
5028 struct msm_asoc_mach_data *pdata =
5029 snd_soc_card_get_drvdata(rtd->card);
5030
5031 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5032 if (!component) {
5033 pr_err("%s: could not find component for bolero_codec\n",
5034 __func__);
5035 return ret;
5036 }
5037
5038 dapm = snd_soc_component_get_dapm(component);
5039
5040 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5041 ARRAY_SIZE(msm_int_snd_controls));
5042 if (ret < 0) {
5043 pr_err("%s: add_component_controls failed: %d\n",
5044 __func__, ret);
5045 return ret;
5046 }
5047 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5048 ARRAY_SIZE(msm_common_snd_controls));
5049 if (ret < 0) {
5050 pr_err("%s: add common snd controls failed: %d\n",
5051 __func__, ret);
5052 return ret;
5053 }
5054
5055 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5056 ARRAY_SIZE(msm_int_dapm_widgets));
5057
5058 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5059 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5060 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5061 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +05305062 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5063 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +05305064 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5065 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005066
5067 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5068 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5069 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5070 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08005071 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005072
5073 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5074 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5075 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5076 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5077
5078 snd_soc_dapm_sync(dapm);
5079
5080 /*
5081 * Send speaker configuration only for WSA8810.
5082 * Default configuration is for WSA8815.
5083 */
5084 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5085 __func__, rtd->card->num_aux_devs);
5086 if (rtd->card->num_aux_devs &&
5087 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +08005088 list_for_each_entry(aux_comp,
5089 &rtd->card->aux_comp_list,
5090 card_aux_list) {
5091 if (aux_comp->name != NULL && (
5092 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5093 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5094 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005095 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +08005096 wsa_macro_set_spkr_gain_offset(component,
5097 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5098 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005099 }
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -08005100 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5101 sm_port_map);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005102 }
5103 card = rtd->card->snd_card;
5104 if (!pdata->codec_root) {
5105 entry = snd_info_create_subdir(card->module, "codecs",
5106 card->proc_root);
5107 if (!entry) {
5108 pr_debug("%s: Cannot create codecs module entry\n",
5109 __func__);
5110 ret = 0;
5111 goto err;
5112 }
5113 pdata->codec_root = entry;
5114 }
5115 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -08005116 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005117 codec_reg_done = true;
5118 return 0;
5119err:
5120 return ret;
5121}
5122
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08005123static void *def_wcd_mbhc_cal(void)
5124{
5125 void *wcd_mbhc_cal;
5126 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5127 u16 *btn_high;
5128
5129 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5130 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5131 if (!wcd_mbhc_cal)
5132 return NULL;
5133
5134 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5135 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5136 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5137 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5138 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5139
5140 btn_high[0] = 75;
5141 btn_high[1] = 150;
5142 btn_high[2] = 237;
5143 btn_high[3] = 500;
5144 btn_high[4] = 500;
5145 btn_high[5] = 500;
5146 btn_high[6] = 500;
5147 btn_high[7] = 500;
5148
5149 return wcd_mbhc_cal;
5150}
5151
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005152/* Digital audio interface glue - connects codec <---> CPU */
5153static struct snd_soc_dai_link msm_common_dai_links[] = {
5154 /* FrontEnd DAI Links */
5155 {/* hw:x,0 */
5156 .name = MSM_DAILINK_NAME(Media1),
5157 .stream_name = "MultiMedia1",
5158 .cpu_dai_name = "MultiMedia1",
5159 .platform_name = "msm-pcm-dsp.0",
5160 .dynamic = 1,
5161 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5162 .dpcm_playback = 1,
5163 .dpcm_capture = 1,
5164 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5165 SND_SOC_DPCM_TRIGGER_POST},
5166 .codec_dai_name = "snd-soc-dummy-dai",
5167 .codec_name = "snd-soc-dummy",
5168 .ignore_suspend = 1,
5169 /* this dainlink has playback support */
5170 .ignore_pmdown_time = 1,
5171 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5172 },
5173 {/* hw:x,1 */
5174 .name = MSM_DAILINK_NAME(Media2),
5175 .stream_name = "MultiMedia2",
5176 .cpu_dai_name = "MultiMedia2",
5177 .platform_name = "msm-pcm-dsp.0",
5178 .dynamic = 1,
5179 .dpcm_playback = 1,
5180 .dpcm_capture = 1,
5181 .codec_dai_name = "snd-soc-dummy-dai",
5182 .codec_name = "snd-soc-dummy",
5183 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5184 SND_SOC_DPCM_TRIGGER_POST},
5185 .ignore_suspend = 1,
5186 /* this dainlink has playback support */
5187 .ignore_pmdown_time = 1,
5188 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5189 },
5190 {/* hw:x,2 */
5191 .name = "VoiceMMode1",
5192 .stream_name = "VoiceMMode1",
5193 .cpu_dai_name = "VoiceMMode1",
5194 .platform_name = "msm-pcm-voice",
5195 .dynamic = 1,
5196 .dpcm_playback = 1,
5197 .dpcm_capture = 1,
5198 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5199 SND_SOC_DPCM_TRIGGER_POST},
5200 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5201 .ignore_suspend = 1,
5202 .ignore_pmdown_time = 1,
5203 .codec_dai_name = "snd-soc-dummy-dai",
5204 .codec_name = "snd-soc-dummy",
5205 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5206 },
5207 {/* hw:x,3 */
5208 .name = "MSM VoIP",
5209 .stream_name = "VoIP",
5210 .cpu_dai_name = "VoIP",
5211 .platform_name = "msm-voip-dsp",
5212 .dynamic = 1,
5213 .dpcm_playback = 1,
5214 .dpcm_capture = 1,
5215 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5216 SND_SOC_DPCM_TRIGGER_POST},
5217 .codec_dai_name = "snd-soc-dummy-dai",
5218 .codec_name = "snd-soc-dummy",
5219 .ignore_suspend = 1,
5220 /* this dainlink has playback support */
5221 .ignore_pmdown_time = 1,
5222 .id = MSM_FRONTEND_DAI_VOIP,
5223 },
5224 {/* hw:x,4 */
5225 .name = MSM_DAILINK_NAME(ULL),
5226 .stream_name = "MultiMedia3",
5227 .cpu_dai_name = "MultiMedia3",
5228 .platform_name = "msm-pcm-dsp.2",
5229 .dynamic = 1,
5230 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5231 .dpcm_playback = 1,
5232 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5233 SND_SOC_DPCM_TRIGGER_POST},
5234 .codec_dai_name = "snd-soc-dummy-dai",
5235 .codec_name = "snd-soc-dummy",
5236 .ignore_suspend = 1,
5237 /* this dainlink has playback support */
5238 .ignore_pmdown_time = 1,
5239 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5240 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005241 {/* hw:x,5 */
5242 .name = "MSM AFE-PCM RX",
5243 .stream_name = "AFE-PROXY RX",
5244 .cpu_dai_name = "msm-dai-q6-dev.241",
5245 .codec_name = "msm-stub-codec.1",
5246 .codec_dai_name = "msm-stub-rx",
5247 .platform_name = "msm-pcm-afe",
5248 .dpcm_playback = 1,
5249 .ignore_suspend = 1,
5250 /* this dainlink has playback support */
5251 .ignore_pmdown_time = 1,
5252 },
5253 {/* hw:x,6 */
5254 .name = "MSM AFE-PCM TX",
5255 .stream_name = "AFE-PROXY TX",
5256 .cpu_dai_name = "msm-dai-q6-dev.240",
5257 .codec_name = "msm-stub-codec.1",
5258 .codec_dai_name = "msm-stub-tx",
5259 .platform_name = "msm-pcm-afe",
5260 .dpcm_capture = 1,
5261 .ignore_suspend = 1,
5262 },
5263 {/* hw:x,7 */
5264 .name = MSM_DAILINK_NAME(Compress1),
5265 .stream_name = "Compress1",
5266 .cpu_dai_name = "MultiMedia4",
5267 .platform_name = "msm-compress-dsp",
5268 .dynamic = 1,
5269 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5270 .dpcm_playback = 1,
5271 .dpcm_capture = 1,
5272 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5273 SND_SOC_DPCM_TRIGGER_POST},
5274 .codec_dai_name = "snd-soc-dummy-dai",
5275 .codec_name = "snd-soc-dummy",
5276 .ignore_suspend = 1,
5277 .ignore_pmdown_time = 1,
5278 /* this dainlink has playback support */
5279 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5280 },
Meng Wang197cb302019-03-01 13:54:38 +08005281 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005282 {/* hw:x,8 */
5283 .name = "AUXPCM Hostless",
5284 .stream_name = "AUXPCM Hostless",
5285 .cpu_dai_name = "AUXPCM_HOSTLESS",
5286 .platform_name = "msm-pcm-hostless",
5287 .dynamic = 1,
5288 .dpcm_playback = 1,
5289 .dpcm_capture = 1,
5290 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5291 SND_SOC_DPCM_TRIGGER_POST},
5292 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5293 .ignore_suspend = 1,
5294 /* this dainlink has playback support */
5295 .ignore_pmdown_time = 1,
5296 .codec_dai_name = "snd-soc-dummy-dai",
5297 .codec_name = "snd-soc-dummy",
5298 },
5299 {/* hw:x,9 */
5300 .name = MSM_DAILINK_NAME(LowLatency),
5301 .stream_name = "MultiMedia5",
5302 .cpu_dai_name = "MultiMedia5",
5303 .platform_name = "msm-pcm-dsp.1",
5304 .dynamic = 1,
5305 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5306 .dpcm_playback = 1,
5307 .dpcm_capture = 1,
5308 .codec_dai_name = "snd-soc-dummy-dai",
5309 .codec_name = "snd-soc-dummy",
5310 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5311 SND_SOC_DPCM_TRIGGER_POST},
5312 .ignore_suspend = 1,
5313 /* this dainlink has playback support */
5314 .ignore_pmdown_time = 1,
5315 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5316 .ops = &msm_fe_qos_ops,
5317 },
5318 {/* hw:x,10 */
5319 .name = "Listen 1 Audio Service",
5320 .stream_name = "Listen 1 Audio Service",
5321 .cpu_dai_name = "LSM1",
5322 .platform_name = "msm-lsm-client",
5323 .dynamic = 1,
5324 .dpcm_capture = 1,
5325 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5326 SND_SOC_DPCM_TRIGGER_POST },
5327 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5328 .ignore_suspend = 1,
5329 .codec_dai_name = "snd-soc-dummy-dai",
5330 .codec_name = "snd-soc-dummy",
5331 .id = MSM_FRONTEND_DAI_LSM1,
5332 },
5333 /* Multiple Tunnel instances */
5334 {/* hw:x,11 */
5335 .name = MSM_DAILINK_NAME(Compress2),
5336 .stream_name = "Compress2",
5337 .cpu_dai_name = "MultiMedia7",
5338 .platform_name = "msm-compress-dsp",
5339 .dynamic = 1,
5340 .dpcm_playback = 1,
5341 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5342 SND_SOC_DPCM_TRIGGER_POST},
5343 .codec_dai_name = "snd-soc-dummy-dai",
5344 .codec_name = "snd-soc-dummy",
5345 .ignore_suspend = 1,
5346 .ignore_pmdown_time = 1,
5347 /* this dainlink has playback support */
5348 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5349 },
5350 {/* hw:x,12 */
5351 .name = MSM_DAILINK_NAME(MultiMedia10),
5352 .stream_name = "MultiMedia10",
5353 .cpu_dai_name = "MultiMedia10",
5354 .platform_name = "msm-pcm-dsp.1",
5355 .dynamic = 1,
5356 .dpcm_playback = 1,
5357 .dpcm_capture = 1,
5358 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5359 SND_SOC_DPCM_TRIGGER_POST},
5360 .codec_dai_name = "snd-soc-dummy-dai",
5361 .codec_name = "snd-soc-dummy",
5362 .ignore_suspend = 1,
5363 .ignore_pmdown_time = 1,
5364 /* this dainlink has playback support */
5365 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5366 },
5367 {/* hw:x,13 */
5368 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5369 .stream_name = "MM_NOIRQ",
5370 .cpu_dai_name = "MultiMedia8",
5371 .platform_name = "msm-pcm-dsp-noirq",
5372 .dynamic = 1,
5373 .dpcm_playback = 1,
5374 .dpcm_capture = 1,
5375 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5376 SND_SOC_DPCM_TRIGGER_POST},
5377 .codec_dai_name = "snd-soc-dummy-dai",
5378 .codec_name = "snd-soc-dummy",
5379 .ignore_suspend = 1,
5380 .ignore_pmdown_time = 1,
5381 /* this dainlink has playback support */
5382 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5383 .ops = &msm_fe_qos_ops,
5384 },
5385 /* HDMI Hostless */
5386 {/* hw:x,14 */
5387 .name = "HDMI_RX_HOSTLESS",
5388 .stream_name = "HDMI_RX_HOSTLESS",
5389 .cpu_dai_name = "HDMI_HOSTLESS",
5390 .platform_name = "msm-pcm-hostless",
5391 .dynamic = 1,
5392 .dpcm_playback = 1,
5393 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5394 SND_SOC_DPCM_TRIGGER_POST},
5395 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5396 .ignore_suspend = 1,
5397 .ignore_pmdown_time = 1,
5398 .codec_dai_name = "snd-soc-dummy-dai",
5399 .codec_name = "snd-soc-dummy",
5400 },
5401 {/* hw:x,15 */
5402 .name = "VoiceMMode2",
5403 .stream_name = "VoiceMMode2",
5404 .cpu_dai_name = "VoiceMMode2",
5405 .platform_name = "msm-pcm-voice",
5406 .dynamic = 1,
5407 .dpcm_playback = 1,
5408 .dpcm_capture = 1,
5409 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5410 SND_SOC_DPCM_TRIGGER_POST},
5411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5412 .ignore_suspend = 1,
5413 .ignore_pmdown_time = 1,
5414 .codec_dai_name = "snd-soc-dummy-dai",
5415 .codec_name = "snd-soc-dummy",
5416 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5417 },
5418 /* LSM FE */
5419 {/* hw:x,16 */
5420 .name = "Listen 2 Audio Service",
5421 .stream_name = "Listen 2 Audio Service",
5422 .cpu_dai_name = "LSM2",
5423 .platform_name = "msm-lsm-client",
5424 .dynamic = 1,
5425 .dpcm_capture = 1,
5426 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5427 SND_SOC_DPCM_TRIGGER_POST },
5428 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5429 .ignore_suspend = 1,
5430 .codec_dai_name = "snd-soc-dummy-dai",
5431 .codec_name = "snd-soc-dummy",
5432 .id = MSM_FRONTEND_DAI_LSM2,
5433 },
5434 {/* hw:x,17 */
5435 .name = "Listen 3 Audio Service",
5436 .stream_name = "Listen 3 Audio Service",
5437 .cpu_dai_name = "LSM3",
5438 .platform_name = "msm-lsm-client",
5439 .dynamic = 1,
5440 .dpcm_capture = 1,
5441 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5442 SND_SOC_DPCM_TRIGGER_POST },
5443 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5444 .ignore_suspend = 1,
5445 .codec_dai_name = "snd-soc-dummy-dai",
5446 .codec_name = "snd-soc-dummy",
5447 .id = MSM_FRONTEND_DAI_LSM3,
5448 },
5449 {/* hw:x,18 */
5450 .name = "Listen 4 Audio Service",
5451 .stream_name = "Listen 4 Audio Service",
5452 .cpu_dai_name = "LSM4",
5453 .platform_name = "msm-lsm-client",
5454 .dynamic = 1,
5455 .dpcm_capture = 1,
5456 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5457 SND_SOC_DPCM_TRIGGER_POST },
5458 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5459 .ignore_suspend = 1,
5460 .codec_dai_name = "snd-soc-dummy-dai",
5461 .codec_name = "snd-soc-dummy",
5462 .id = MSM_FRONTEND_DAI_LSM4,
5463 },
5464 {/* hw:x,19 */
5465 .name = "Listen 5 Audio Service",
5466 .stream_name = "Listen 5 Audio Service",
5467 .cpu_dai_name = "LSM5",
5468 .platform_name = "msm-lsm-client",
5469 .dynamic = 1,
5470 .dpcm_capture = 1,
5471 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5472 SND_SOC_DPCM_TRIGGER_POST },
5473 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5474 .ignore_suspend = 1,
5475 .codec_dai_name = "snd-soc-dummy-dai",
5476 .codec_name = "snd-soc-dummy",
5477 .id = MSM_FRONTEND_DAI_LSM5,
5478 },
5479 {/* hw:x,20 */
5480 .name = "Listen 6 Audio Service",
5481 .stream_name = "Listen 6 Audio Service",
5482 .cpu_dai_name = "LSM6",
5483 .platform_name = "msm-lsm-client",
5484 .dynamic = 1,
5485 .dpcm_capture = 1,
5486 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5487 SND_SOC_DPCM_TRIGGER_POST },
5488 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5489 .ignore_suspend = 1,
5490 .codec_dai_name = "snd-soc-dummy-dai",
5491 .codec_name = "snd-soc-dummy",
5492 .id = MSM_FRONTEND_DAI_LSM6,
5493 },
5494 {/* hw:x,21 */
5495 .name = "Listen 7 Audio Service",
5496 .stream_name = "Listen 7 Audio Service",
5497 .cpu_dai_name = "LSM7",
5498 .platform_name = "msm-lsm-client",
5499 .dynamic = 1,
5500 .dpcm_capture = 1,
5501 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5502 SND_SOC_DPCM_TRIGGER_POST },
5503 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5504 .ignore_suspend = 1,
5505 .codec_dai_name = "snd-soc-dummy-dai",
5506 .codec_name = "snd-soc-dummy",
5507 .id = MSM_FRONTEND_DAI_LSM7,
5508 },
5509 {/* hw:x,22 */
5510 .name = "Listen 8 Audio Service",
5511 .stream_name = "Listen 8 Audio Service",
5512 .cpu_dai_name = "LSM8",
5513 .platform_name = "msm-lsm-client",
5514 .dynamic = 1,
5515 .dpcm_capture = 1,
5516 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5517 SND_SOC_DPCM_TRIGGER_POST },
5518 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5519 .ignore_suspend = 1,
5520 .codec_dai_name = "snd-soc-dummy-dai",
5521 .codec_name = "snd-soc-dummy",
5522 .id = MSM_FRONTEND_DAI_LSM8,
5523 },
5524 {/* hw:x,23 */
5525 .name = MSM_DAILINK_NAME(Media9),
5526 .stream_name = "MultiMedia9",
5527 .cpu_dai_name = "MultiMedia9",
5528 .platform_name = "msm-pcm-dsp.0",
5529 .dynamic = 1,
5530 .dpcm_playback = 1,
5531 .dpcm_capture = 1,
5532 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5533 SND_SOC_DPCM_TRIGGER_POST},
5534 .codec_dai_name = "snd-soc-dummy-dai",
5535 .codec_name = "snd-soc-dummy",
5536 .ignore_suspend = 1,
5537 /* this dainlink has playback support */
5538 .ignore_pmdown_time = 1,
5539 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5540 },
5541 {/* hw:x,24 */
5542 .name = MSM_DAILINK_NAME(Compress4),
5543 .stream_name = "Compress4",
5544 .cpu_dai_name = "MultiMedia11",
5545 .platform_name = "msm-compress-dsp",
5546 .dynamic = 1,
5547 .dpcm_playback = 1,
5548 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5549 SND_SOC_DPCM_TRIGGER_POST},
5550 .codec_dai_name = "snd-soc-dummy-dai",
5551 .codec_name = "snd-soc-dummy",
5552 .ignore_suspend = 1,
5553 .ignore_pmdown_time = 1,
5554 /* this dainlink has playback support */
5555 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5556 },
5557 {/* hw:x,25 */
5558 .name = MSM_DAILINK_NAME(Compress5),
5559 .stream_name = "Compress5",
5560 .cpu_dai_name = "MultiMedia12",
5561 .platform_name = "msm-compress-dsp",
5562 .dynamic = 1,
5563 .dpcm_playback = 1,
5564 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5565 SND_SOC_DPCM_TRIGGER_POST},
5566 .codec_dai_name = "snd-soc-dummy-dai",
5567 .codec_name = "snd-soc-dummy",
5568 .ignore_suspend = 1,
5569 .ignore_pmdown_time = 1,
5570 /* this dainlink has playback support */
5571 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5572 },
5573 {/* hw:x,26 */
5574 .name = MSM_DAILINK_NAME(Compress6),
5575 .stream_name = "Compress6",
5576 .cpu_dai_name = "MultiMedia13",
5577 .platform_name = "msm-compress-dsp",
5578 .dynamic = 1,
5579 .dpcm_playback = 1,
5580 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5581 SND_SOC_DPCM_TRIGGER_POST},
5582 .codec_dai_name = "snd-soc-dummy-dai",
5583 .codec_name = "snd-soc-dummy",
5584 .ignore_suspend = 1,
5585 .ignore_pmdown_time = 1,
5586 /* this dainlink has playback support */
5587 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5588 },
5589 {/* hw:x,27 */
5590 .name = MSM_DAILINK_NAME(Compress7),
5591 .stream_name = "Compress7",
5592 .cpu_dai_name = "MultiMedia14",
5593 .platform_name = "msm-compress-dsp",
5594 .dynamic = 1,
5595 .dpcm_playback = 1,
5596 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5597 SND_SOC_DPCM_TRIGGER_POST},
5598 .codec_dai_name = "snd-soc-dummy-dai",
5599 .codec_name = "snd-soc-dummy",
5600 .ignore_suspend = 1,
5601 .ignore_pmdown_time = 1,
5602 /* this dainlink has playback support */
5603 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5604 },
5605 {/* hw:x,28 */
5606 .name = MSM_DAILINK_NAME(Compress8),
5607 .stream_name = "Compress8",
5608 .cpu_dai_name = "MultiMedia15",
5609 .platform_name = "msm-compress-dsp",
5610 .dynamic = 1,
5611 .dpcm_playback = 1,
5612 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5613 SND_SOC_DPCM_TRIGGER_POST},
5614 .codec_dai_name = "snd-soc-dummy-dai",
5615 .codec_name = "snd-soc-dummy",
5616 .ignore_suspend = 1,
5617 .ignore_pmdown_time = 1,
5618 /* this dainlink has playback support */
5619 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5620 },
5621 {/* hw:x,29 */
5622 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5623 .stream_name = "MM_NOIRQ_2",
5624 .cpu_dai_name = "MultiMedia16",
5625 .platform_name = "msm-pcm-dsp-noirq",
5626 .dynamic = 1,
5627 .dpcm_playback = 1,
5628 .dpcm_capture = 1,
5629 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5630 SND_SOC_DPCM_TRIGGER_POST},
5631 .codec_dai_name = "snd-soc-dummy-dai",
5632 .codec_name = "snd-soc-dummy",
5633 .ignore_suspend = 1,
5634 .ignore_pmdown_time = 1,
5635 /* this dainlink has playback support */
5636 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -07005637 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005638 },
5639 {/* hw:x,30 */
5640 .name = "CDC_DMA Hostless",
5641 .stream_name = "CDC_DMA Hostless",
5642 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5643 .platform_name = "msm-pcm-hostless",
5644 .dynamic = 1,
5645 .dpcm_playback = 1,
5646 .dpcm_capture = 1,
5647 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5648 SND_SOC_DPCM_TRIGGER_POST},
5649 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5650 .ignore_suspend = 1,
5651 /* this dailink has playback support */
5652 .ignore_pmdown_time = 1,
5653 .codec_dai_name = "snd-soc-dummy-dai",
5654 .codec_name = "snd-soc-dummy",
5655 },
5656 {/* hw:x,31 */
5657 .name = "TX3_CDC_DMA Hostless",
5658 .stream_name = "TX3_CDC_DMA Hostless",
5659 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5660 .platform_name = "msm-pcm-hostless",
5661 .dynamic = 1,
5662 .dpcm_capture = 1,
5663 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5664 SND_SOC_DPCM_TRIGGER_POST},
5665 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5666 .ignore_suspend = 1,
5667 .codec_dai_name = "snd-soc-dummy-dai",
5668 .codec_name = "snd-soc-dummy",
5669 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005670 {/* hw:x,32 */
5671 .name = "Tertiary MI2S TX_Hostless",
5672 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5673 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5674 .platform_name = "msm-pcm-hostless",
5675 .dynamic = 1,
5676 .dpcm_capture = 1,
5677 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5678 SND_SOC_DPCM_TRIGGER_POST},
5679 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5680 .ignore_suspend = 1,
5681 .ignore_pmdown_time = 1,
5682 .codec_dai_name = "snd-soc-dummy-dai",
5683 .codec_name = "snd-soc-dummy",
5684 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005685};
5686
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005687static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005688 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07005689 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5690 .stream_name = "WSA CDC DMA0 Capture",
5691 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5692 .platform_name = "msm-pcm-hostless",
5693 .codec_name = "bolero_codec",
5694 .codec_dai_name = "wsa_macro_vifeedback",
5695 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
5696 .be_hw_params_fixup = msm_be_hw_params_fixup,
5697 .ignore_suspend = 1,
5698 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5699 .ops = &msm_cdc_dma_be_ops,
5700 },
5701};
5702
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005703static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005704 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005705 .name = MSM_DAILINK_NAME(ASM Loopback),
5706 .stream_name = "MultiMedia6",
5707 .cpu_dai_name = "MultiMedia6",
5708 .platform_name = "msm-pcm-loopback",
5709 .dynamic = 1,
5710 .dpcm_playback = 1,
5711 .dpcm_capture = 1,
5712 .codec_dai_name = "snd-soc-dummy-dai",
5713 .codec_name = "snd-soc-dummy",
5714 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5715 SND_SOC_DPCM_TRIGGER_POST},
5716 .ignore_suspend = 1,
5717 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5718 .ignore_pmdown_time = 1,
5719 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5720 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005721 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005722 .name = "USB Audio Hostless",
5723 .stream_name = "USB Audio Hostless",
5724 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5725 .platform_name = "msm-pcm-hostless",
5726 .dynamic = 1,
5727 .dpcm_playback = 1,
5728 .dpcm_capture = 1,
5729 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5730 SND_SOC_DPCM_TRIGGER_POST},
5731 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5732 .ignore_suspend = 1,
5733 .ignore_pmdown_time = 1,
5734 .codec_dai_name = "snd-soc-dummy-dai",
5735 .codec_name = "snd-soc-dummy",
5736 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005737 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005738 .name = "SLIMBUS_7 Hostless",
5739 .stream_name = "SLIMBUS_7 Hostless",
5740 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5741 .platform_name = "msm-pcm-hostless",
5742 .dynamic = 1,
5743 .dpcm_capture = 1,
5744 .dpcm_playback = 1,
5745 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5746 SND_SOC_DPCM_TRIGGER_POST},
5747 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5748 .ignore_suspend = 1,
5749 .ignore_pmdown_time = 1,
5750 .codec_dai_name = "snd-soc-dummy-dai",
5751 .codec_name = "snd-soc-dummy",
5752 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -08005753 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08005754 .name = "Compress Capture",
5755 .stream_name = "Compress9",
5756 .cpu_dai_name = "MultiMedia17",
5757 .platform_name = "msm-compress-dsp",
5758 .dynamic = 1,
5759 .dpcm_capture = 1,
5760 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5761 SND_SOC_DPCM_TRIGGER_POST},
5762 .codec_dai_name = "snd-soc-dummy-dai",
5763 .codec_name = "snd-soc-dummy",
5764 .ignore_suspend = 1,
5765 .ignore_pmdown_time = 1,
5766 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5767 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05305768 {/* hw:x,38 */
5769 .name = "SLIMBUS_8 Hostless",
5770 .stream_name = "SLIMBUS_8 Hostless",
5771 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5772 .platform_name = "msm-pcm-hostless",
5773 .dynamic = 1,
5774 .dpcm_capture = 1,
5775 .dpcm_playback = 1,
5776 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5777 SND_SOC_DPCM_TRIGGER_POST},
5778 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5779 .ignore_suspend = 1,
5780 .ignore_pmdown_time = 1,
5781 .codec_dai_name = "snd-soc-dummy-dai",
5782 .codec_name = "snd-soc-dummy",
5783 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -07005784 {/* hw:x,39 */
5785 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5786 .stream_name = "TX CDC DMA5 Capture",
5787 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5788 .platform_name = "msm-pcm-hostless",
5789 .codec_name = "bolero_codec",
5790 .codec_dai_name = "tx_macro_tx3",
5791 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5792 .be_hw_params_fixup = msm_be_hw_params_fixup,
5793 .ignore_suspend = 1,
5794 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5795 .ops = &msm_cdc_dma_be_ops,
5796 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005797};
5798
5799static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5800 /* Backend AFE DAI Links */
5801 {
5802 .name = LPASS_BE_AFE_PCM_RX,
5803 .stream_name = "AFE Playback",
5804 .cpu_dai_name = "msm-dai-q6-dev.224",
5805 .platform_name = "msm-pcm-routing",
5806 .codec_name = "msm-stub-codec.1",
5807 .codec_dai_name = "msm-stub-rx",
5808 .no_pcm = 1,
5809 .dpcm_playback = 1,
5810 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5811 .be_hw_params_fixup = msm_be_hw_params_fixup,
5812 /* this dainlink has playback support */
5813 .ignore_pmdown_time = 1,
5814 .ignore_suspend = 1,
5815 },
5816 {
5817 .name = LPASS_BE_AFE_PCM_TX,
5818 .stream_name = "AFE Capture",
5819 .cpu_dai_name = "msm-dai-q6-dev.225",
5820 .platform_name = "msm-pcm-routing",
5821 .codec_name = "msm-stub-codec.1",
5822 .codec_dai_name = "msm-stub-tx",
5823 .no_pcm = 1,
5824 .dpcm_capture = 1,
5825 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5826 .be_hw_params_fixup = msm_be_hw_params_fixup,
5827 .ignore_suspend = 1,
5828 },
5829 /* Incall Record Uplink BACK END DAI Link */
5830 {
5831 .name = LPASS_BE_INCALL_RECORD_TX,
5832 .stream_name = "Voice Uplink Capture",
5833 .cpu_dai_name = "msm-dai-q6-dev.32772",
5834 .platform_name = "msm-pcm-routing",
5835 .codec_name = "msm-stub-codec.1",
5836 .codec_dai_name = "msm-stub-tx",
5837 .no_pcm = 1,
5838 .dpcm_capture = 1,
5839 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5840 .be_hw_params_fixup = msm_be_hw_params_fixup,
5841 .ignore_suspend = 1,
5842 },
5843 /* Incall Record Downlink BACK END DAI Link */
5844 {
5845 .name = LPASS_BE_INCALL_RECORD_RX,
5846 .stream_name = "Voice Downlink Capture",
5847 .cpu_dai_name = "msm-dai-q6-dev.32771",
5848 .platform_name = "msm-pcm-routing",
5849 .codec_name = "msm-stub-codec.1",
5850 .codec_dai_name = "msm-stub-tx",
5851 .no_pcm = 1,
5852 .dpcm_capture = 1,
5853 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5854 .be_hw_params_fixup = msm_be_hw_params_fixup,
5855 .ignore_suspend = 1,
5856 },
5857 /* Incall Music BACK END DAI Link */
5858 {
5859 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5860 .stream_name = "Voice Farend Playback",
5861 .cpu_dai_name = "msm-dai-q6-dev.32773",
5862 .platform_name = "msm-pcm-routing",
5863 .codec_name = "msm-stub-codec.1",
5864 .codec_dai_name = "msm-stub-rx",
5865 .no_pcm = 1,
5866 .dpcm_playback = 1,
5867 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5868 .be_hw_params_fixup = msm_be_hw_params_fixup,
5869 .ignore_suspend = 1,
5870 .ignore_pmdown_time = 1,
5871 },
5872 /* Incall Music 2 BACK END DAI Link */
5873 {
5874 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5875 .stream_name = "Voice2 Farend Playback",
5876 .cpu_dai_name = "msm-dai-q6-dev.32770",
5877 .platform_name = "msm-pcm-routing",
5878 .codec_name = "msm-stub-codec.1",
5879 .codec_dai_name = "msm-stub-rx",
5880 .no_pcm = 1,
5881 .dpcm_playback = 1,
5882 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5883 .be_hw_params_fixup = msm_be_hw_params_fixup,
5884 .ignore_suspend = 1,
5885 .ignore_pmdown_time = 1,
5886 },
5887 {
5888 .name = LPASS_BE_USB_AUDIO_RX,
5889 .stream_name = "USB Audio Playback",
5890 .cpu_dai_name = "msm-dai-q6-dev.28672",
5891 .platform_name = "msm-pcm-routing",
5892 .codec_name = "msm-stub-codec.1",
5893 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05305894 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07005895 .no_pcm = 1,
5896 .dpcm_playback = 1,
5897 .id = MSM_BACKEND_DAI_USB_RX,
5898 .be_hw_params_fixup = msm_be_hw_params_fixup,
5899 .ignore_pmdown_time = 1,
5900 .ignore_suspend = 1,
5901 },
5902 {
5903 .name = LPASS_BE_USB_AUDIO_TX,
5904 .stream_name = "USB Audio Capture",
5905 .cpu_dai_name = "msm-dai-q6-dev.28673",
5906 .platform_name = "msm-pcm-routing",
5907 .codec_name = "msm-stub-codec.1",
5908 .codec_dai_name = "msm-stub-tx",
5909 .no_pcm = 1,
5910 .dpcm_capture = 1,
5911 .id = MSM_BACKEND_DAI_USB_TX,
5912 .be_hw_params_fixup = msm_be_hw_params_fixup,
5913 .ignore_suspend = 1,
5914 },
5915 {
5916 .name = LPASS_BE_PRI_TDM_RX_0,
5917 .stream_name = "Primary TDM0 Playback",
5918 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5919 .platform_name = "msm-pcm-routing",
5920 .codec_name = "msm-stub-codec.1",
5921 .codec_dai_name = "msm-stub-rx",
5922 .no_pcm = 1,
5923 .dpcm_playback = 1,
5924 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5925 .be_hw_params_fixup = msm_be_hw_params_fixup,
5926 .ops = &kona_tdm_be_ops,
5927 .ignore_suspend = 1,
5928 .ignore_pmdown_time = 1,
5929 },
5930 {
5931 .name = LPASS_BE_PRI_TDM_TX_0,
5932 .stream_name = "Primary TDM0 Capture",
5933 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5934 .platform_name = "msm-pcm-routing",
5935 .codec_name = "msm-stub-codec.1",
5936 .codec_dai_name = "msm-stub-tx",
5937 .no_pcm = 1,
5938 .dpcm_capture = 1,
5939 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5940 .be_hw_params_fixup = msm_be_hw_params_fixup,
5941 .ops = &kona_tdm_be_ops,
5942 .ignore_suspend = 1,
5943 },
5944 {
5945 .name = LPASS_BE_SEC_TDM_RX_0,
5946 .stream_name = "Secondary TDM0 Playback",
5947 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5948 .platform_name = "msm-pcm-routing",
5949 .codec_name = "msm-stub-codec.1",
5950 .codec_dai_name = "msm-stub-rx",
5951 .no_pcm = 1,
5952 .dpcm_playback = 1,
5953 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5954 .be_hw_params_fixup = msm_be_hw_params_fixup,
5955 .ops = &kona_tdm_be_ops,
5956 .ignore_suspend = 1,
5957 .ignore_pmdown_time = 1,
5958 },
5959 {
5960 .name = LPASS_BE_SEC_TDM_TX_0,
5961 .stream_name = "Secondary TDM0 Capture",
5962 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5963 .platform_name = "msm-pcm-routing",
5964 .codec_name = "msm-stub-codec.1",
5965 .codec_dai_name = "msm-stub-tx",
5966 .no_pcm = 1,
5967 .dpcm_capture = 1,
5968 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5969 .be_hw_params_fixup = msm_be_hw_params_fixup,
5970 .ops = &kona_tdm_be_ops,
5971 .ignore_suspend = 1,
5972 },
5973 {
5974 .name = LPASS_BE_TERT_TDM_RX_0,
5975 .stream_name = "Tertiary TDM0 Playback",
5976 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5977 .platform_name = "msm-pcm-routing",
5978 .codec_name = "msm-stub-codec.1",
5979 .codec_dai_name = "msm-stub-rx",
5980 .no_pcm = 1,
5981 .dpcm_playback = 1,
5982 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5983 .be_hw_params_fixup = msm_be_hw_params_fixup,
5984 .ops = &kona_tdm_be_ops,
5985 .ignore_suspend = 1,
5986 .ignore_pmdown_time = 1,
5987 },
5988 {
5989 .name = LPASS_BE_TERT_TDM_TX_0,
5990 .stream_name = "Tertiary TDM0 Capture",
5991 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5992 .platform_name = "msm-pcm-routing",
5993 .codec_name = "msm-stub-codec.1",
5994 .codec_dai_name = "msm-stub-tx",
5995 .no_pcm = 1,
5996 .dpcm_capture = 1,
5997 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5998 .be_hw_params_fixup = msm_be_hw_params_fixup,
5999 .ops = &kona_tdm_be_ops,
6000 .ignore_suspend = 1,
6001 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006002 {
6003 .name = LPASS_BE_QUAT_TDM_RX_0,
6004 .stream_name = "Quaternary TDM0 Playback",
6005 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6006 .platform_name = "msm-pcm-routing",
6007 .codec_name = "msm-stub-codec.1",
6008 .codec_dai_name = "msm-stub-rx",
6009 .no_pcm = 1,
6010 .dpcm_playback = 1,
6011 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6012 .be_hw_params_fixup = msm_be_hw_params_fixup,
6013 .ops = &kona_tdm_be_ops,
6014 .ignore_suspend = 1,
6015 .ignore_pmdown_time = 1,
6016 },
6017 {
6018 .name = LPASS_BE_QUAT_TDM_TX_0,
6019 .stream_name = "Quaternary TDM0 Capture",
6020 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6021 .platform_name = "msm-pcm-routing",
6022 .codec_name = "msm-stub-codec.1",
6023 .codec_dai_name = "msm-stub-tx",
6024 .no_pcm = 1,
6025 .dpcm_capture = 1,
6026 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6027 .be_hw_params_fixup = msm_be_hw_params_fixup,
6028 .ops = &kona_tdm_be_ops,
6029 .ignore_suspend = 1,
6030 },
6031 {
6032 .name = LPASS_BE_QUIN_TDM_RX_0,
6033 .stream_name = "Quinary TDM0 Playback",
6034 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6035 .platform_name = "msm-pcm-routing",
6036 .codec_name = "msm-stub-codec.1",
6037 .codec_dai_name = "msm-stub-rx",
6038 .no_pcm = 1,
6039 .dpcm_playback = 1,
6040 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6041 .be_hw_params_fixup = msm_be_hw_params_fixup,
6042 .ops = &kona_tdm_be_ops,
6043 .ignore_suspend = 1,
6044 .ignore_pmdown_time = 1,
6045 },
6046 {
6047 .name = LPASS_BE_QUIN_TDM_TX_0,
6048 .stream_name = "Quinary TDM0 Capture",
6049 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6050 .platform_name = "msm-pcm-routing",
6051 .codec_name = "msm-stub-codec.1",
6052 .codec_dai_name = "msm-stub-tx",
6053 .no_pcm = 1,
6054 .dpcm_capture = 1,
6055 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6056 .be_hw_params_fixup = msm_be_hw_params_fixup,
6057 .ops = &kona_tdm_be_ops,
6058 .ignore_suspend = 1,
6059 },
6060 {
6061 .name = LPASS_BE_SEN_TDM_RX_0,
6062 .stream_name = "Senary TDM0 Playback",
6063 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6064 .platform_name = "msm-pcm-routing",
6065 .codec_name = "msm-stub-codec.1",
6066 .codec_dai_name = "msm-stub-rx",
6067 .no_pcm = 1,
6068 .dpcm_playback = 1,
6069 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6070 .be_hw_params_fixup = msm_be_hw_params_fixup,
6071 .ops = &kona_tdm_be_ops,
6072 .ignore_suspend = 1,
6073 .ignore_pmdown_time = 1,
6074 },
6075 {
6076 .name = LPASS_BE_SEN_TDM_TX_0,
6077 .stream_name = "Senary TDM0 Capture",
6078 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6079 .platform_name = "msm-pcm-routing",
6080 .codec_name = "msm-stub-codec.1",
6081 .codec_dai_name = "msm-stub-tx",
6082 .no_pcm = 1,
6083 .dpcm_capture = 1,
6084 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6085 .be_hw_params_fixup = msm_be_hw_params_fixup,
6086 .ops = &kona_tdm_be_ops,
6087 .ignore_suspend = 1,
6088 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006089};
6090
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006091static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6092 {
6093 .name = LPASS_BE_SLIMBUS_7_RX,
6094 .stream_name = "Slimbus7 Playback",
6095 .cpu_dai_name = "msm-dai-q6-dev.16398",
6096 .platform_name = "msm-pcm-routing",
6097 .codec_name = "btfmslim_slave",
6098 /* BT codec driver determines capabilities based on
6099 * dai name, bt codecdai name should always contains
6100 * supported usecase information
6101 */
6102 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6103 .no_pcm = 1,
6104 .dpcm_playback = 1,
6105 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6106 .be_hw_params_fixup = msm_be_hw_params_fixup,
6107 .init = &msm_wcn_init,
6108 .ops = &msm_wcn_ops,
6109 /* dai link has playback support */
6110 .ignore_pmdown_time = 1,
6111 .ignore_suspend = 1,
6112 },
6113 {
6114 .name = LPASS_BE_SLIMBUS_7_TX,
6115 .stream_name = "Slimbus7 Capture",
6116 .cpu_dai_name = "msm-dai-q6-dev.16399",
6117 .platform_name = "msm-pcm-routing",
6118 .codec_name = "btfmslim_slave",
6119 .codec_dai_name = "btfm_bt_sco_slim_tx",
6120 .no_pcm = 1,
6121 .dpcm_capture = 1,
6122 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6123 .be_hw_params_fixup = msm_be_hw_params_fixup,
6124 .ops = &msm_wcn_ops,
6125 .ignore_suspend = 1,
6126 },
6127};
6128
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306129static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6130 {
6131 .name = LPASS_BE_SLIMBUS_7_RX,
6132 .stream_name = "Slimbus7 Playback",
6133 .cpu_dai_name = "msm-dai-q6-dev.16398",
6134 .platform_name = "msm-pcm-routing",
6135 .codec_name = "btfmslim_slave",
6136 /* BT codec driver determines capabilities based on
6137 * dai name, bt codecdai name should always contains
6138 * supported usecase information
6139 */
6140 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6141 .no_pcm = 1,
6142 .dpcm_playback = 1,
6143 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6144 .be_hw_params_fixup = msm_be_hw_params_fixup,
6145 .init = &msm_wcn_init_lito,
6146 .ops = &msm_wcn_ops_lito,
6147 /* dai link has playback support */
6148 .ignore_pmdown_time = 1,
6149 .ignore_suspend = 1,
6150 },
6151 {
6152 .name = LPASS_BE_SLIMBUS_7_TX,
6153 .stream_name = "Slimbus7 Capture",
6154 .cpu_dai_name = "msm-dai-q6-dev.16399",
6155 .platform_name = "msm-pcm-routing",
6156 .codec_name = "btfmslim_slave",
6157 .codec_dai_name = "btfm_bt_sco_slim_tx",
6158 .no_pcm = 1,
6159 .dpcm_capture = 1,
6160 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6161 .be_hw_params_fixup = msm_be_hw_params_fixup,
6162 .ops = &msm_wcn_ops_lito,
6163 .ignore_suspend = 1,
6164 },
6165 {
6166 .name = LPASS_BE_SLIMBUS_8_TX,
6167 .stream_name = "Slimbus8 Capture",
6168 .cpu_dai_name = "msm-dai-q6-dev.16401",
6169 .platform_name = "msm-pcm-routing",
6170 .codec_name = "btfmslim_slave",
6171 .codec_dai_name = "btfm_fm_slim_tx",
6172 .no_pcm = 1,
6173 .dpcm_capture = 1,
6174 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6175 .be_hw_params_fixup = msm_be_hw_params_fixup,
6176 .ops = &msm_wcn_ops_lito,
6177 .ignore_suspend = 1,
6178 },
6179};
6180
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006181static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6182 /* DISP PORT BACK END DAI Link */
6183 {
6184 .name = LPASS_BE_DISPLAY_PORT,
6185 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006186 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006187 .platform_name = "msm-pcm-routing",
6188 .codec_name = "msm-ext-disp-audio-codec-rx",
6189 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6190 .no_pcm = 1,
6191 .dpcm_playback = 1,
6192 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6193 .be_hw_params_fixup = msm_be_hw_params_fixup,
6194 .ignore_pmdown_time = 1,
6195 .ignore_suspend = 1,
6196 },
6197 /* DISP PORT 1 BACK END DAI Link */
6198 {
6199 .name = LPASS_BE_DISPLAY_PORT1,
6200 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -07006201 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006202 .platform_name = "msm-pcm-routing",
6203 .codec_name = "msm-ext-disp-audio-codec-rx",
6204 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6205 .no_pcm = 1,
6206 .dpcm_playback = 1,
6207 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6208 .be_hw_params_fixup = msm_be_hw_params_fixup,
6209 .ignore_pmdown_time = 1,
6210 .ignore_suspend = 1,
6211 },
6212};
6213
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006214static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6215 {
6216 .name = LPASS_BE_PRI_MI2S_RX,
6217 .stream_name = "Primary MI2S Playback",
6218 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6219 .platform_name = "msm-pcm-routing",
6220 .codec_name = "msm-stub-codec.1",
6221 .codec_dai_name = "msm-stub-rx",
6222 .no_pcm = 1,
6223 .dpcm_playback = 1,
6224 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6225 .be_hw_params_fixup = msm_be_hw_params_fixup,
6226 .ops = &msm_mi2s_be_ops,
6227 .ignore_suspend = 1,
6228 .ignore_pmdown_time = 1,
6229 },
6230 {
6231 .name = LPASS_BE_PRI_MI2S_TX,
6232 .stream_name = "Primary MI2S Capture",
6233 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6234 .platform_name = "msm-pcm-routing",
6235 .codec_name = "msm-stub-codec.1",
6236 .codec_dai_name = "msm-stub-tx",
6237 .no_pcm = 1,
6238 .dpcm_capture = 1,
6239 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6240 .be_hw_params_fixup = msm_be_hw_params_fixup,
6241 .ops = &msm_mi2s_be_ops,
6242 .ignore_suspend = 1,
6243 },
6244 {
6245 .name = LPASS_BE_SEC_MI2S_RX,
6246 .stream_name = "Secondary MI2S Playback",
6247 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6248 .platform_name = "msm-pcm-routing",
6249 .codec_name = "msm-stub-codec.1",
6250 .codec_dai_name = "msm-stub-rx",
6251 .no_pcm = 1,
6252 .dpcm_playback = 1,
6253 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6254 .be_hw_params_fixup = msm_be_hw_params_fixup,
6255 .ops = &msm_mi2s_be_ops,
6256 .ignore_suspend = 1,
6257 .ignore_pmdown_time = 1,
6258 },
6259 {
6260 .name = LPASS_BE_SEC_MI2S_TX,
6261 .stream_name = "Secondary MI2S Capture",
6262 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6263 .platform_name = "msm-pcm-routing",
6264 .codec_name = "msm-stub-codec.1",
6265 .codec_dai_name = "msm-stub-tx",
6266 .no_pcm = 1,
6267 .dpcm_capture = 1,
6268 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6269 .be_hw_params_fixup = msm_be_hw_params_fixup,
6270 .ops = &msm_mi2s_be_ops,
6271 .ignore_suspend = 1,
6272 },
6273 {
6274 .name = LPASS_BE_TERT_MI2S_RX,
6275 .stream_name = "Tertiary MI2S Playback",
6276 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6277 .platform_name = "msm-pcm-routing",
6278 .codec_name = "msm-stub-codec.1",
6279 .codec_dai_name = "msm-stub-rx",
6280 .no_pcm = 1,
6281 .dpcm_playback = 1,
6282 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6283 .be_hw_params_fixup = msm_be_hw_params_fixup,
6284 .ops = &msm_mi2s_be_ops,
6285 .ignore_suspend = 1,
6286 .ignore_pmdown_time = 1,
6287 },
6288 {
6289 .name = LPASS_BE_TERT_MI2S_TX,
6290 .stream_name = "Tertiary MI2S Capture",
6291 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6292 .platform_name = "msm-pcm-routing",
6293 .codec_name = "msm-stub-codec.1",
6294 .codec_dai_name = "msm-stub-tx",
6295 .no_pcm = 1,
6296 .dpcm_capture = 1,
6297 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6298 .be_hw_params_fixup = msm_be_hw_params_fixup,
6299 .ops = &msm_mi2s_be_ops,
6300 .ignore_suspend = 1,
6301 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006302 {
6303 .name = LPASS_BE_QUAT_MI2S_RX,
6304 .stream_name = "Quaternary MI2S Playback",
6305 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6306 .platform_name = "msm-pcm-routing",
6307 .codec_name = "msm-stub-codec.1",
6308 .codec_dai_name = "msm-stub-rx",
6309 .no_pcm = 1,
6310 .dpcm_playback = 1,
6311 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6312 .be_hw_params_fixup = msm_be_hw_params_fixup,
6313 .ops = &msm_mi2s_be_ops,
6314 .ignore_suspend = 1,
6315 .ignore_pmdown_time = 1,
6316 },
6317 {
6318 .name = LPASS_BE_QUAT_MI2S_TX,
6319 .stream_name = "Quaternary MI2S Capture",
6320 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6321 .platform_name = "msm-pcm-routing",
6322 .codec_name = "msm-stub-codec.1",
6323 .codec_dai_name = "msm-stub-tx",
6324 .no_pcm = 1,
6325 .dpcm_capture = 1,
6326 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6327 .be_hw_params_fixup = msm_be_hw_params_fixup,
6328 .ops = &msm_mi2s_be_ops,
6329 .ignore_suspend = 1,
6330 },
6331 {
6332 .name = LPASS_BE_QUIN_MI2S_RX,
6333 .stream_name = "Quinary MI2S Playback",
6334 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6335 .platform_name = "msm-pcm-routing",
6336 .codec_name = "msm-stub-codec.1",
6337 .codec_dai_name = "msm-stub-rx",
6338 .no_pcm = 1,
6339 .dpcm_playback = 1,
6340 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6341 .be_hw_params_fixup = msm_be_hw_params_fixup,
6342 .ops = &msm_mi2s_be_ops,
6343 .ignore_suspend = 1,
6344 .ignore_pmdown_time = 1,
6345 },
6346 {
6347 .name = LPASS_BE_QUIN_MI2S_TX,
6348 .stream_name = "Quinary MI2S Capture",
6349 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6350 .platform_name = "msm-pcm-routing",
6351 .codec_name = "msm-stub-codec.1",
6352 .codec_dai_name = "msm-stub-tx",
6353 .no_pcm = 1,
6354 .dpcm_capture = 1,
6355 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6356 .be_hw_params_fixup = msm_be_hw_params_fixup,
6357 .ops = &msm_mi2s_be_ops,
6358 .ignore_suspend = 1,
6359 },
6360 {
6361 .name = LPASS_BE_SENARY_MI2S_RX,
6362 .stream_name = "Senary MI2S Playback",
6363 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6364 .platform_name = "msm-pcm-routing",
6365 .codec_name = "msm-stub-codec.1",
6366 .codec_dai_name = "msm-stub-rx",
6367 .no_pcm = 1,
6368 .dpcm_playback = 1,
6369 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6370 .be_hw_params_fixup = msm_be_hw_params_fixup,
6371 .ops = &msm_mi2s_be_ops,
6372 .ignore_suspend = 1,
6373 .ignore_pmdown_time = 1,
6374 },
6375 {
6376 .name = LPASS_BE_SENARY_MI2S_TX,
6377 .stream_name = "Senary MI2S Capture",
6378 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6379 .platform_name = "msm-pcm-routing",
6380 .codec_name = "msm-stub-codec.1",
6381 .codec_dai_name = "msm-stub-tx",
6382 .no_pcm = 1,
6383 .dpcm_capture = 1,
6384 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6385 .be_hw_params_fixup = msm_be_hw_params_fixup,
6386 .ops = &msm_mi2s_be_ops,
6387 .ignore_suspend = 1,
6388 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006389};
6390
6391static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6392 /* Primary AUX PCM Backend DAI Links */
6393 {
6394 .name = LPASS_BE_AUXPCM_RX,
6395 .stream_name = "AUX PCM Playback",
6396 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6397 .platform_name = "msm-pcm-routing",
6398 .codec_name = "msm-stub-codec.1",
6399 .codec_dai_name = "msm-stub-rx",
6400 .no_pcm = 1,
6401 .dpcm_playback = 1,
6402 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6403 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006404 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006405 .ignore_pmdown_time = 1,
6406 .ignore_suspend = 1,
6407 },
6408 {
6409 .name = LPASS_BE_AUXPCM_TX,
6410 .stream_name = "AUX PCM Capture",
6411 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6412 .platform_name = "msm-pcm-routing",
6413 .codec_name = "msm-stub-codec.1",
6414 .codec_dai_name = "msm-stub-tx",
6415 .no_pcm = 1,
6416 .dpcm_capture = 1,
6417 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6418 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006419 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006420 .ignore_suspend = 1,
6421 },
6422 /* Secondary AUX PCM Backend DAI Links */
6423 {
6424 .name = LPASS_BE_SEC_AUXPCM_RX,
6425 .stream_name = "Sec AUX PCM Playback",
6426 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6427 .platform_name = "msm-pcm-routing",
6428 .codec_name = "msm-stub-codec.1",
6429 .codec_dai_name = "msm-stub-rx",
6430 .no_pcm = 1,
6431 .dpcm_playback = 1,
6432 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6433 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006434 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006435 .ignore_pmdown_time = 1,
6436 .ignore_suspend = 1,
6437 },
6438 {
6439 .name = LPASS_BE_SEC_AUXPCM_TX,
6440 .stream_name = "Sec AUX PCM Capture",
6441 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6442 .platform_name = "msm-pcm-routing",
6443 .codec_name = "msm-stub-codec.1",
6444 .codec_dai_name = "msm-stub-tx",
6445 .no_pcm = 1,
6446 .dpcm_capture = 1,
6447 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6448 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006449 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006450 .ignore_suspend = 1,
6451 },
6452 /* Tertiary AUX PCM Backend DAI Links */
6453 {
6454 .name = LPASS_BE_TERT_AUXPCM_RX,
6455 .stream_name = "Tert AUX PCM Playback",
6456 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6457 .platform_name = "msm-pcm-routing",
6458 .codec_name = "msm-stub-codec.1",
6459 .codec_dai_name = "msm-stub-rx",
6460 .no_pcm = 1,
6461 .dpcm_playback = 1,
6462 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6463 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006464 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006465 .ignore_suspend = 1,
6466 },
6467 {
6468 .name = LPASS_BE_TERT_AUXPCM_TX,
6469 .stream_name = "Tert AUX PCM Capture",
6470 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6471 .platform_name = "msm-pcm-routing",
6472 .codec_name = "msm-stub-codec.1",
6473 .codec_dai_name = "msm-stub-tx",
6474 .no_pcm = 1,
6475 .dpcm_capture = 1,
6476 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6477 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08006478 .ops = &kona_aux_be_ops,
6479 .ignore_suspend = 1,
6480 },
6481 /* Quaternary AUX PCM Backend DAI Links */
6482 {
6483 .name = LPASS_BE_QUAT_AUXPCM_RX,
6484 .stream_name = "Quat AUX PCM Playback",
6485 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6486 .platform_name = "msm-pcm-routing",
6487 .codec_name = "msm-stub-codec.1",
6488 .codec_dai_name = "msm-stub-rx",
6489 .no_pcm = 1,
6490 .dpcm_playback = 1,
6491 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6492 .be_hw_params_fixup = msm_be_hw_params_fixup,
6493 .ops = &kona_aux_be_ops,
6494 .ignore_suspend = 1,
6495 },
6496 {
6497 .name = LPASS_BE_QUAT_AUXPCM_TX,
6498 .stream_name = "Quat AUX PCM Capture",
6499 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6500 .platform_name = "msm-pcm-routing",
6501 .codec_name = "msm-stub-codec.1",
6502 .codec_dai_name = "msm-stub-tx",
6503 .no_pcm = 1,
6504 .dpcm_capture = 1,
6505 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6506 .be_hw_params_fixup = msm_be_hw_params_fixup,
6507 .ops = &kona_aux_be_ops,
6508 .ignore_suspend = 1,
6509 },
6510 /* Quinary AUX PCM Backend DAI Links */
6511 {
6512 .name = LPASS_BE_QUIN_AUXPCM_RX,
6513 .stream_name = "Quin AUX PCM Playback",
6514 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6515 .platform_name = "msm-pcm-routing",
6516 .codec_name = "msm-stub-codec.1",
6517 .codec_dai_name = "msm-stub-rx",
6518 .no_pcm = 1,
6519 .dpcm_playback = 1,
6520 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6521 .be_hw_params_fixup = msm_be_hw_params_fixup,
6522 .ops = &kona_aux_be_ops,
6523 .ignore_suspend = 1,
6524 },
6525 {
6526 .name = LPASS_BE_QUIN_AUXPCM_TX,
6527 .stream_name = "Quin AUX PCM Capture",
6528 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6529 .platform_name = "msm-pcm-routing",
6530 .codec_name = "msm-stub-codec.1",
6531 .codec_dai_name = "msm-stub-tx",
6532 .no_pcm = 1,
6533 .dpcm_capture = 1,
6534 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6535 .be_hw_params_fixup = msm_be_hw_params_fixup,
6536 .ops = &kona_aux_be_ops,
6537 .ignore_suspend = 1,
6538 },
6539 /* Senary AUX PCM Backend DAI Links */
6540 {
6541 .name = LPASS_BE_SEN_AUXPCM_RX,
6542 .stream_name = "Sen AUX PCM Playback",
6543 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6544 .platform_name = "msm-pcm-routing",
6545 .codec_name = "msm-stub-codec.1",
6546 .codec_dai_name = "msm-stub-rx",
6547 .no_pcm = 1,
6548 .dpcm_playback = 1,
6549 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6550 .be_hw_params_fixup = msm_be_hw_params_fixup,
6551 .ops = &kona_aux_be_ops,
6552 .ignore_suspend = 1,
6553 },
6554 {
6555 .name = LPASS_BE_SEN_AUXPCM_TX,
6556 .stream_name = "Sen AUX PCM Capture",
6557 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6558 .platform_name = "msm-pcm-routing",
6559 .codec_name = "msm-stub-codec.1",
6560 .codec_dai_name = "msm-stub-tx",
6561 .no_pcm = 1,
6562 .dpcm_capture = 1,
6563 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6564 .be_hw_params_fixup = msm_be_hw_params_fixup,
6565 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006566 .ignore_suspend = 1,
6567 },
6568};
6569
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006570static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6571 /* WSA CDC DMA Backend DAI Links */
6572 {
6573 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6574 .stream_name = "WSA CDC DMA0 Playback",
6575 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6576 .platform_name = "msm-pcm-routing",
6577 .codec_name = "bolero_codec",
6578 .codec_dai_name = "wsa_macro_rx1",
6579 .no_pcm = 1,
6580 .dpcm_playback = 1,
6581 .init = &msm_int_audrx_init,
6582 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6583 .be_hw_params_fixup = msm_be_hw_params_fixup,
6584 .ignore_pmdown_time = 1,
6585 .ignore_suspend = 1,
6586 .ops = &msm_cdc_dma_be_ops,
6587 },
6588 {
6589 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6590 .stream_name = "WSA CDC DMA1 Playback",
6591 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6592 .platform_name = "msm-pcm-routing",
6593 .codec_name = "bolero_codec",
6594 .codec_dai_name = "wsa_macro_rx_mix",
6595 .no_pcm = 1,
6596 .dpcm_playback = 1,
6597 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ignore_pmdown_time = 1,
6600 .ignore_suspend = 1,
6601 .ops = &msm_cdc_dma_be_ops,
6602 },
6603 {
6604 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6605 .stream_name = "WSA CDC DMA1 Capture",
6606 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6607 .platform_name = "msm-pcm-routing",
6608 .codec_name = "bolero_codec",
6609 .codec_dai_name = "wsa_macro_echo",
6610 .no_pcm = 1,
6611 .dpcm_capture = 1,
6612 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6613 .be_hw_params_fixup = msm_be_hw_params_fixup,
6614 .ignore_suspend = 1,
6615 .ops = &msm_cdc_dma_be_ops,
6616 },
6617};
6618
6619static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6620 /* RX CDC DMA Backend DAI Links */
6621 {
6622 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6623 .stream_name = "RX CDC DMA0 Playback",
6624 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6625 .platform_name = "msm-pcm-routing",
6626 .codec_name = "bolero_codec",
6627 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306628 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006629 .no_pcm = 1,
6630 .dpcm_playback = 1,
6631 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6632 .be_hw_params_fixup = msm_be_hw_params_fixup,
6633 .ignore_pmdown_time = 1,
6634 .ignore_suspend = 1,
6635 .ops = &msm_cdc_dma_be_ops,
6636 },
6637 {
6638 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6639 .stream_name = "RX CDC DMA1 Playback",
6640 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6641 .platform_name = "msm-pcm-routing",
6642 .codec_name = "bolero_codec",
6643 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306644 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006645 .no_pcm = 1,
6646 .dpcm_playback = 1,
6647 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6648 .be_hw_params_fixup = msm_be_hw_params_fixup,
6649 .ignore_pmdown_time = 1,
6650 .ignore_suspend = 1,
6651 .ops = &msm_cdc_dma_be_ops,
6652 },
6653 {
6654 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6655 .stream_name = "RX CDC DMA2 Playback",
6656 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6657 .platform_name = "msm-pcm-routing",
6658 .codec_name = "bolero_codec",
6659 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306660 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006661 .no_pcm = 1,
6662 .dpcm_playback = 1,
6663 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
6665 .ignore_pmdown_time = 1,
6666 .ignore_suspend = 1,
6667 .ops = &msm_cdc_dma_be_ops,
6668 },
6669 {
6670 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6671 .stream_name = "RX CDC DMA3 Playback",
6672 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6673 .platform_name = "msm-pcm-routing",
6674 .codec_name = "bolero_codec",
6675 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +05306676 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006677 .no_pcm = 1,
6678 .dpcm_playback = 1,
6679 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6680 .be_hw_params_fixup = msm_be_hw_params_fixup,
6681 .ignore_pmdown_time = 1,
6682 .ignore_suspend = 1,
6683 .ops = &msm_cdc_dma_be_ops,
6684 },
6685 /* TX CDC DMA Backend DAI Links */
6686 {
6687 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6688 .stream_name = "TX CDC DMA3 Capture",
6689 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6690 .platform_name = "msm-pcm-routing",
6691 .codec_name = "bolero_codec",
6692 .codec_dai_name = "tx_macro_tx1",
6693 .no_pcm = 1,
6694 .dpcm_capture = 1,
6695 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
6696 .be_hw_params_fixup = msm_be_hw_params_fixup,
6697 .ignore_suspend = 1,
6698 .ops = &msm_cdc_dma_be_ops,
6699 },
6700 {
6701 .name = LPASS_BE_TX_CDC_DMA_TX_4,
6702 .stream_name = "TX CDC DMA4 Capture",
6703 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
6704 .platform_name = "msm-pcm-routing",
6705 .codec_name = "bolero_codec",
6706 .codec_dai_name = "tx_macro_tx2",
6707 .no_pcm = 1,
6708 .dpcm_capture = 1,
6709 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
6710 .be_hw_params_fixup = msm_be_hw_params_fixup,
6711 .ignore_suspend = 1,
6712 .ops = &msm_cdc_dma_be_ops,
6713 },
6714};
6715
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08006716static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
6717 {
6718 .name = LPASS_BE_VA_CDC_DMA_TX_0,
6719 .stream_name = "VA CDC DMA0 Capture",
6720 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
6721 .platform_name = "msm-pcm-routing",
6722 .codec_name = "bolero_codec",
6723 .codec_dai_name = "va_macro_tx1",
6724 .no_pcm = 1,
6725 .dpcm_capture = 1,
6726 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
6727 .be_hw_params_fixup = msm_be_hw_params_fixup,
6728 .ignore_suspend = 1,
6729 .ops = &msm_cdc_dma_be_ops,
6730 },
6731 {
6732 .name = LPASS_BE_VA_CDC_DMA_TX_1,
6733 .stream_name = "VA CDC DMA1 Capture",
6734 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
6735 .platform_name = "msm-pcm-routing",
6736 .codec_name = "bolero_codec",
6737 .codec_dai_name = "va_macro_tx2",
6738 .no_pcm = 1,
6739 .dpcm_capture = 1,
6740 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
6741 .be_hw_params_fixup = msm_be_hw_params_fixup,
6742 .ignore_suspend = 1,
6743 .ops = &msm_cdc_dma_be_ops,
6744 },
6745 {
6746 .name = LPASS_BE_VA_CDC_DMA_TX_2,
6747 .stream_name = "VA CDC DMA2 Capture",
6748 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
6749 .platform_name = "msm-pcm-routing",
6750 .codec_name = "bolero_codec",
6751 .codec_dai_name = "va_macro_tx3",
6752 .no_pcm = 1,
6753 .dpcm_capture = 1,
6754 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
6755 .be_hw_params_fixup = msm_be_hw_params_fixup,
6756 .ignore_suspend = 1,
6757 .ops = &msm_cdc_dma_be_ops,
6758 },
6759};
6760
Meng Wange8e53822019-03-18 10:49:50 +08006761static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
6762 {
6763 .name = LPASS_BE_AFE_LOOPBACK_TX,
6764 .stream_name = "AFE Loopback Capture",
6765 .cpu_dai_name = "msm-dai-q6-dev.24577",
6766 .platform_name = "msm-pcm-routing",
6767 .codec_name = "msm-stub-codec.1",
6768 .codec_dai_name = "msm-stub-tx",
6769 .no_pcm = 1,
6770 .dpcm_capture = 1,
6771 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
6772 .be_hw_params_fixup = msm_be_hw_params_fixup,
6773 .ignore_pmdown_time = 1,
6774 .ignore_suspend = 1,
6775 },
6776};
6777
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006778static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006779 ARRAY_SIZE(msm_common_dai_links) +
6780 ARRAY_SIZE(msm_bolero_fe_dai_links) +
6781 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
6782 ARRAY_SIZE(msm_common_be_dai_links) +
6783 ARRAY_SIZE(msm_mi2s_be_dai_links) +
6784 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
6785 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08006786 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006787 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
6788 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +08006789 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306790 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
6791 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006792
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07006793static int msm_populate_dai_link_component_of_node(
6794 struct snd_soc_card *card)
6795{
6796 int i, index, ret = 0;
6797 struct device *cdev = card->dev;
6798 struct snd_soc_dai_link *dai_link = card->dai_link;
6799 struct device_node *np;
6800
6801 if (!cdev) {
6802 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
6803 return -ENODEV;
6804 }
6805
6806 for (i = 0; i < card->num_links; i++) {
6807 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
6808 continue;
6809
6810 /* populate platform_of_node for snd card dai links */
6811 if (dai_link[i].platform_name &&
6812 !dai_link[i].platform_of_node) {
6813 index = of_property_match_string(cdev->of_node,
6814 "asoc-platform-names",
6815 dai_link[i].platform_name);
6816 if (index < 0) {
6817 dev_err(cdev, "%s: No match found for platform name: %s\n",
6818 __func__, dai_link[i].platform_name);
6819 ret = index;
6820 goto err;
6821 }
6822 np = of_parse_phandle(cdev->of_node, "asoc-platform",
6823 index);
6824 if (!np) {
6825 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
6826 __func__, dai_link[i].platform_name,
6827 index);
6828 ret = -ENODEV;
6829 goto err;
6830 }
6831 dai_link[i].platform_of_node = np;
6832 dai_link[i].platform_name = NULL;
6833 }
6834
6835 /* populate cpu_of_node for snd card dai links */
6836 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
6837 index = of_property_match_string(cdev->of_node,
6838 "asoc-cpu-names",
6839 dai_link[i].cpu_dai_name);
6840 if (index >= 0) {
6841 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
6842 index);
6843 if (!np) {
6844 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
6845 __func__,
6846 dai_link[i].cpu_dai_name);
6847 ret = -ENODEV;
6848 goto err;
6849 }
6850 dai_link[i].cpu_of_node = np;
6851 dai_link[i].cpu_dai_name = NULL;
6852 }
6853 }
6854
6855 /* populate codec_of_node for snd card dai links */
6856 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
6857 index = of_property_match_string(cdev->of_node,
6858 "asoc-codec-names",
6859 dai_link[i].codec_name);
6860 if (index < 0)
6861 continue;
6862 np = of_parse_phandle(cdev->of_node, "asoc-codec",
6863 index);
6864 if (!np) {
6865 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
6866 __func__, dai_link[i].codec_name);
6867 ret = -ENODEV;
6868 goto err;
6869 }
6870 dai_link[i].codec_of_node = np;
6871 dai_link[i].codec_name = NULL;
6872 }
6873 }
6874
6875err:
6876 return ret;
6877}
6878
6879static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
6880{
6881 int ret = -EINVAL;
6882 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
6883
6884 if (!component) {
6885 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
6886 return ret;
6887 }
6888
6889 ret = snd_soc_add_component_controls(component, msm_snd_controls,
6890 ARRAY_SIZE(msm_snd_controls));
6891 if (ret < 0) {
6892 dev_err(component->dev,
6893 "%s: add_codec_controls failed, err = %d\n",
6894 __func__, ret);
6895 return ret;
6896 }
6897
6898 return ret;
6899}
6900
6901static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
6902 struct snd_pcm_hw_params *params)
6903{
6904 return 0;
6905}
6906
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07006907static struct snd_soc_ops msm_stub_be_ops = {
6908 .hw_params = msm_snd_stub_hw_params,
6909};
6910
6911struct snd_soc_card snd_soc_card_stub_msm = {
6912 .name = "kona-stub-snd-card",
6913};
6914
6915static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
6916 /* FrontEnd DAI Links */
6917 {
6918 .name = "MSMSTUB Media1",
6919 .stream_name = "MultiMedia1",
6920 .cpu_dai_name = "MultiMedia1",
6921 .platform_name = "msm-pcm-dsp.0",
6922 .dynamic = 1,
6923 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6924 .dpcm_playback = 1,
6925 .dpcm_capture = 1,
6926 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6927 SND_SOC_DPCM_TRIGGER_POST},
6928 .codec_dai_name = "snd-soc-dummy-dai",
6929 .codec_name = "snd-soc-dummy",
6930 .ignore_suspend = 1,
6931 /* this dainlink has playback support */
6932 .ignore_pmdown_time = 1,
6933 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6934 },
6935};
6936
6937static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
6938 /* Backend DAI Links */
6939 {
6940 .name = LPASS_BE_AUXPCM_RX,
6941 .stream_name = "AUX PCM Playback",
6942 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6943 .platform_name = "msm-pcm-routing",
6944 .codec_name = "msm-stub-codec.1",
6945 .codec_dai_name = "msm-stub-rx",
6946 .no_pcm = 1,
6947 .dpcm_playback = 1,
6948 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6949 .init = &msm_audrx_stub_init,
6950 .be_hw_params_fixup = msm_be_hw_params_fixup,
6951 .ignore_pmdown_time = 1,
6952 .ignore_suspend = 1,
6953 .ops = &msm_stub_be_ops,
6954 },
6955 {
6956 .name = LPASS_BE_AUXPCM_TX,
6957 .stream_name = "AUX PCM Capture",
6958 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6959 .platform_name = "msm-pcm-routing",
6960 .codec_name = "msm-stub-codec.1",
6961 .codec_dai_name = "msm-stub-tx",
6962 .no_pcm = 1,
6963 .dpcm_capture = 1,
6964 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6965 .be_hw_params_fixup = msm_be_hw_params_fixup,
6966 .ignore_suspend = 1,
6967 .ops = &msm_stub_be_ops,
6968 },
6969};
6970
6971static struct snd_soc_dai_link msm_stub_dai_links[
6972 ARRAY_SIZE(msm_stub_fe_dai_links) +
6973 ARRAY_SIZE(msm_stub_be_dai_links)];
6974
6975static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07006976 { .compatible = "qcom,kona-asoc-snd",
6977 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07006978 { .compatible = "qcom,kona-asoc-snd-stub",
6979 .data = "stub_codec"},
6980 {},
6981};
6982
6983static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6984{
6985 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07006986 struct snd_soc_dai_link *dailink = NULL;
6987 int len_1 = 0;
6988 int len_2 = 0;
6989 int total_links = 0;
6990 int rc = 0;
6991 u32 mi2s_audio_intf = 0;
6992 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08006993 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05306994 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07006995 const struct of_device_id *match;
6996
6997 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
6998 if (!match) {
6999 dev_err(dev, "%s: No DT match found for sound card\n",
7000 __func__);
7001 return NULL;
7002 }
7003
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007004 if (!strcmp(match->data, "codec")) {
7005 card = &snd_soc_card_kona_msm;
7006
7007 memcpy(msm_kona_dai_links + total_links,
7008 msm_common_dai_links,
7009 sizeof(msm_common_dai_links));
7010 total_links += ARRAY_SIZE(msm_common_dai_links);
7011
7012 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007013 msm_bolero_fe_dai_links,
7014 sizeof(msm_bolero_fe_dai_links));
7015 total_links +=
7016 ARRAY_SIZE(msm_bolero_fe_dai_links);
7017
7018 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007019 msm_common_misc_fe_dai_links,
7020 sizeof(msm_common_misc_fe_dai_links));
7021 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7022
7023 memcpy(msm_kona_dai_links + total_links,
7024 msm_common_be_dai_links,
7025 sizeof(msm_common_be_dai_links));
7026 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7027
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007028 memcpy(msm_kona_dai_links + total_links,
7029 msm_wsa_cdc_dma_be_dai_links,
7030 sizeof(msm_wsa_cdc_dma_be_dai_links));
7031 total_links +=
7032 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7033
7034 memcpy(msm_kona_dai_links + total_links,
7035 msm_rx_tx_cdc_dma_be_dai_links,
7036 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7037 total_links +=
7038 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7039
Xiaoyu Ye2228bf02018-12-12 15:47:20 -08007040 memcpy(msm_kona_dai_links + total_links,
7041 msm_va_cdc_dma_be_dai_links,
7042 sizeof(msm_va_cdc_dma_be_dai_links));
7043 total_links +=
7044 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7045
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007046 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7047 &mi2s_audio_intf);
7048 if (rc) {
7049 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7050 __func__);
7051 } else {
7052 if (mi2s_audio_intf) {
7053 memcpy(msm_kona_dai_links + total_links,
7054 msm_mi2s_be_dai_links,
7055 sizeof(msm_mi2s_be_dai_links));
7056 total_links +=
7057 ARRAY_SIZE(msm_mi2s_be_dai_links);
7058 }
7059 }
7060
7061 rc = of_property_read_u32(dev->of_node,
7062 "qcom,auxpcm-audio-intf",
7063 &auxpcm_audio_intf);
7064 if (rc) {
7065 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7066 __func__);
7067 } else {
7068 if (auxpcm_audio_intf) {
7069 memcpy(msm_kona_dai_links + total_links,
7070 msm_auxpcm_be_dai_links,
7071 sizeof(msm_auxpcm_be_dai_links));
7072 total_links +=
7073 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7074 }
7075 }
7076
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -08007077 rc = of_property_read_u32(dev->of_node,
7078 "qcom,ext-disp-audio-rx", &val);
7079 if (!rc && val) {
7080 dev_dbg(dev, "%s(): ext disp audio support present\n",
7081 __func__);
7082 memcpy(msm_kona_dai_links + total_links,
7083 ext_disp_be_dai_link,
7084 sizeof(ext_disp_be_dai_link));
7085 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7086 }
7087
7088 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7089 if (!rc && val) {
7090 dev_dbg(dev, "%s(): WCN BT support present\n",
7091 __func__);
7092 memcpy(msm_kona_dai_links + total_links,
7093 msm_wcn_be_dai_links,
7094 sizeof(msm_wcn_be_dai_links));
7095 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7096 }
7097
Meng Wange8e53822019-03-18 10:49:50 +08007098 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7099 &val);
7100 if (!rc && val) {
7101 memcpy(msm_kona_dai_links + total_links,
7102 msm_afe_rxtx_lb_be_dai_link,
7103 sizeof(msm_afe_rxtx_lb_be_dai_link));
7104 total_links +=
7105 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7106 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +05307107
7108 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7109 &wcn_btfm_intf);
7110 if (rc) {
7111 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7112 __func__);
7113 } else {
7114 if (wcn_btfm_intf) {
7115 memcpy(msm_kona_dai_links + total_links,
7116 msm_wcn_btfm_be_dai_links,
7117 sizeof(msm_wcn_btfm_be_dai_links));
7118 total_links +=
7119 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7120 }
7121 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007122 dailink = msm_kona_dai_links;
7123 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007124 card = &snd_soc_card_stub_msm;
7125 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7126 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7127
7128 memcpy(msm_stub_dai_links,
7129 msm_stub_fe_dai_links,
7130 sizeof(msm_stub_fe_dai_links));
7131 memcpy(msm_stub_dai_links + len_1,
7132 msm_stub_be_dai_links,
7133 sizeof(msm_stub_be_dai_links));
7134
7135 dailink = msm_stub_dai_links;
7136 total_links = len_2;
7137 }
7138
7139 if (card) {
7140 card->dai_link = dailink;
7141 card->num_links = total_links;
7142 }
7143
7144 return card;
7145}
7146
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007147static int msm_wsa881x_init(struct snd_soc_component *component)
7148{
7149 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7150 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7151 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7152 SPKR_L_BOOST, SPKR_L_VI};
7153 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7154 SPKR_R_BOOST, SPKR_R_VI};
7155 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7156 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7157 struct msm_asoc_mach_data *pdata;
7158 struct snd_soc_dapm_context *dapm;
7159 struct snd_card *card;
7160 struct snd_info_entry *entry;
7161 int ret = 0;
7162
7163 if (!component) {
7164 pr_err("%s component is NULL\n", __func__);
7165 return -EINVAL;
7166 }
7167
7168 card = component->card->snd_card;
7169 dapm = snd_soc_component_get_dapm(component);
7170
7171 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7172 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7173 __func__, component->name);
7174 wsa881x_set_channel_map(component, &spkleft_ports[0],
7175 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7176 &ch_rate[0], &spkleft_port_types[0]);
7177 if (dapm->component) {
7178 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7179 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7180 }
7181 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7182 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7183 __func__, component->name);
7184 wsa881x_set_channel_map(component, &spkright_ports[0],
7185 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7186 &ch_rate[0], &spkright_port_types[0]);
7187 if (dapm->component) {
7188 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7189 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7190 }
7191 } else {
7192 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7193 component->name);
7194 ret = -EINVAL;
7195 goto err;
7196 }
7197 pdata = snd_soc_card_get_drvdata(component->card);
7198 if (!pdata->codec_root) {
7199 entry = snd_info_create_subdir(card->module, "codecs",
7200 card->proc_root);
7201 if (!entry) {
7202 pr_err("%s: Cannot create codecs module entry\n",
7203 __func__);
7204 ret = 0;
7205 goto err;
7206 }
7207 pdata->codec_root = entry;
7208 }
7209 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7210 component);
7211err:
7212 return ret;
7213}
7214
7215static int msm_aux_codec_init(struct snd_soc_component *component)
7216{
7217 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7218 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007219 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007220 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007221 struct snd_info_entry *entry;
7222 struct snd_card *card = component->card->snd_card;
7223 struct msm_asoc_mach_data *pdata;
7224
7225 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7226 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7227 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7228 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7229 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7230 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7231 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7232 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7233 snd_soc_dapm_sync(dapm);
7234
7235 pdata = snd_soc_card_get_drvdata(component->card);
7236 if (!pdata->codec_root) {
7237 entry = snd_info_create_subdir(card->module, "codecs",
7238 card->proc_root);
7239 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007240 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007241 __func__);
7242 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007243 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007244 }
7245 pdata->codec_root = entry;
7246 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007247 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7248
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -07007249 codec_variant = wcd938x_get_codec_variant(component);
7250 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7251 if (codec_variant == WCD9380)
7252 ret = snd_soc_add_component_controls(component,
7253 msm_int_wcd9380_snd_controls,
7254 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7255 else if (codec_variant == WCD9385)
7256 ret = snd_soc_add_component_controls(component,
7257 msm_int_wcd9385_snd_controls,
7258 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7259
7260 if (ret < 0) {
7261 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7262 __func__, ret);
7263 return ret;
7264 }
7265
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007266mbhc_cfg_cal:
7267 mbhc_calibration = def_wcd_mbhc_cal();
7268 if (!mbhc_calibration)
7269 return -ENOMEM;
7270 wcd_mbhc_cfg.calibration = mbhc_calibration;
7271 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7272 if (ret) {
7273 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7274 __func__, ret);
7275 goto err_hs_detect;
7276 }
7277 return 0;
7278
7279err_hs_detect:
7280 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007281 return ret;
7282}
7283
7284static int msm_init_aux_dev(struct platform_device *pdev,
7285 struct snd_soc_card *card)
7286{
7287 struct device_node *wsa_of_node;
7288 struct device_node *aux_codec_of_node;
7289 u32 wsa_max_devs;
7290 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307291 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007292 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007293 int i;
7294 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7295 struct aux_codec_dev_info *aux_cdc_dev_info;
7296 const char *auxdev_name_prefix[1];
7297 char *dev_name_str = NULL;
7298 int found = 0;
7299 int codecs_found = 0;
7300 int ret = 0;
7301
7302 /* Get maximum WSA device count for this platform */
7303 ret = of_property_read_u32(pdev->dev.of_node,
7304 "qcom,wsa-max-devs", &wsa_max_devs);
7305 if (ret) {
7306 dev_info(&pdev->dev,
7307 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7308 __func__, pdev->dev.of_node->full_name, ret);
7309 wsa_max_devs = 0;
7310 goto codec_aux_dev;
7311 }
7312 if (wsa_max_devs == 0) {
7313 dev_warn(&pdev->dev,
7314 "%s: Max WSA devices is 0 for this target?\n",
7315 __func__);
7316 goto codec_aux_dev;
7317 }
7318
7319 /* Get count of WSA device phandles for this platform */
7320 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7321 "qcom,wsa-devs", NULL);
7322 if (wsa_dev_cnt == -ENOENT) {
7323 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7324 __func__);
7325 goto err;
7326 } else if (wsa_dev_cnt <= 0) {
7327 dev_err(&pdev->dev,
7328 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7329 __func__, wsa_dev_cnt);
7330 ret = -EINVAL;
7331 goto err;
7332 }
7333
7334 /*
7335 * Expect total phandles count to be NOT less than maximum possible
7336 * WSA count. However, if it is less, then assign same value to
7337 * max count as well.
7338 */
7339 if (wsa_dev_cnt < wsa_max_devs) {
7340 dev_dbg(&pdev->dev,
7341 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7342 __func__, wsa_max_devs, wsa_dev_cnt);
7343 wsa_max_devs = wsa_dev_cnt;
7344 }
7345
7346 /* Make sure prefix string passed for each WSA device */
7347 ret = of_property_count_strings(pdev->dev.of_node,
7348 "qcom,wsa-aux-dev-prefix");
7349 if (ret != wsa_dev_cnt) {
7350 dev_err(&pdev->dev,
7351 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7352 __func__, wsa_dev_cnt, ret);
7353 ret = -EINVAL;
7354 goto err;
7355 }
7356
7357 /*
7358 * Alloc mem to store phandle and index info of WSA device, if already
7359 * registered with ALSA core
7360 */
7361 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7362 sizeof(struct msm_wsa881x_dev_info),
7363 GFP_KERNEL);
7364 if (!wsa881x_dev_info) {
7365 ret = -ENOMEM;
7366 goto err;
7367 }
7368
7369 /*
7370 * search and check whether all WSA devices are already
7371 * registered with ALSA core or not. If found a node, store
7372 * the node and the index in a local array of struct for later
7373 * use.
7374 */
7375 for (i = 0; i < wsa_dev_cnt; i++) {
7376 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7377 "qcom,wsa-devs", i);
7378 if (unlikely(!wsa_of_node)) {
7379 /* we should not be here */
7380 dev_err(&pdev->dev,
7381 "%s: wsa dev node is not present\n",
7382 __func__);
7383 ret = -EINVAL;
7384 goto err;
7385 }
7386 if (soc_find_component(wsa_of_node, NULL)) {
7387 /* WSA device registered with ALSA core */
7388 wsa881x_dev_info[found].of_node = wsa_of_node;
7389 wsa881x_dev_info[found].index = i;
7390 found++;
7391 if (found == wsa_max_devs)
7392 break;
7393 }
7394 }
7395
7396 if (found < wsa_max_devs) {
7397 dev_dbg(&pdev->dev,
7398 "%s: failed to find %d components. Found only %d\n",
7399 __func__, wsa_max_devs, found);
7400 return -EPROBE_DEFER;
7401 }
7402 dev_info(&pdev->dev,
7403 "%s: found %d wsa881x devices registered with ALSA core\n",
7404 __func__, found);
7405
7406codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307407 /* Get maximum aux codec device count for this platform */
7408 ret = of_property_read_u32(pdev->dev.of_node,
7409 "qcom,codec-max-aux-devs",
7410 &codec_max_aux_devs);
7411 if (ret) {
7412 dev_err(&pdev->dev,
7413 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7414 __func__, pdev->dev.of_node->full_name, ret);
7415 codec_max_aux_devs = 0;
7416 goto aux_dev_register;
7417 }
7418 if (codec_max_aux_devs == 0) {
7419 dev_dbg(&pdev->dev,
7420 "%s: Max aux codec devices is 0 for this target?\n",
7421 __func__);
7422 goto aux_dev_register;
7423 }
7424
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007425 /* Get count of aux codec device phandles for this platform */
7426 codec_aux_dev_cnt = of_count_phandle_with_args(
7427 pdev->dev.of_node,
7428 "qcom,codec-aux-devs", NULL);
7429 if (codec_aux_dev_cnt == -ENOENT) {
7430 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7431 __func__);
7432 goto err;
7433 } else if (codec_aux_dev_cnt <= 0) {
7434 dev_err(&pdev->dev,
7435 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7436 __func__, codec_aux_dev_cnt);
7437 ret = -EINVAL;
7438 goto err;
7439 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007440
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007441 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307442 * Expect total phandles count to be NOT less than maximum possible
7443 * AUX device count. However, if it is less, then assign same value to
7444 * max count as well.
7445 */
7446 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7447 dev_dbg(&pdev->dev,
7448 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7449 __func__, codec_max_aux_devs,
7450 codec_aux_dev_cnt);
7451 codec_max_aux_devs = codec_aux_dev_cnt;
7452 }
7453
7454 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007455 * Alloc mem to store phandle and index info of aux codec
7456 * if already registered with ALSA core
7457 */
7458 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7459 sizeof(struct aux_codec_dev_info),
7460 GFP_KERNEL);
7461 if (!aux_cdc_dev_info) {
7462 ret = -ENOMEM;
7463 goto err;
7464 }
7465
7466 /*
7467 * search and check whether all aux codecs are already
7468 * registered with ALSA core or not. If found a node, store
7469 * the node and the index in a local array of struct for later
7470 * use.
7471 */
7472 for (i = 0; i < codec_aux_dev_cnt; i++) {
7473 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7474 "qcom,codec-aux-devs", i);
7475 if (unlikely(!aux_codec_of_node)) {
7476 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007477 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007478 "%s: aux codec dev node is not present\n",
7479 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007480 ret = -EINVAL;
7481 goto err;
7482 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007483 if (soc_find_component(aux_codec_of_node, NULL)) {
7484 /* AUX codec registered with ALSA core */
7485 aux_cdc_dev_info[codecs_found].of_node =
7486 aux_codec_of_node;
7487 aux_cdc_dev_info[codecs_found].index = i;
7488 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007489 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007490 }
7491
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007492 if (codecs_found < codec_aux_dev_cnt) {
7493 dev_dbg(&pdev->dev,
7494 "%s: failed to find %d components. Found only %d\n",
7495 __func__, codec_aux_dev_cnt, codecs_found);
7496 return -EPROBE_DEFER;
7497 }
7498 dev_info(&pdev->dev,
7499 "%s: found %d AUX codecs registered with ALSA core\n",
7500 __func__, codecs_found);
7501
Sudheer Papothid6d524d2019-06-19 02:31:11 +05307502aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007503 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7504 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7505
7506 /* Alloc array of AUX devs struct */
7507 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7508 sizeof(struct snd_soc_aux_dev),
7509 GFP_KERNEL);
7510 if (!msm_aux_dev) {
7511 ret = -ENOMEM;
7512 goto err;
7513 }
7514
7515 /* Alloc array of codec conf struct */
7516 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7517 sizeof(struct snd_soc_codec_conf),
7518 GFP_KERNEL);
7519 if (!msm_codec_conf) {
7520 ret = -ENOMEM;
7521 goto err;
7522 }
7523
7524 for (i = 0; i < wsa_max_devs; i++) {
7525 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7526 GFP_KERNEL);
7527 if (!dev_name_str) {
7528 ret = -ENOMEM;
7529 goto err;
7530 }
7531
7532 ret = of_property_read_string_index(pdev->dev.of_node,
7533 "qcom,wsa-aux-dev-prefix",
7534 wsa881x_dev_info[i].index,
7535 auxdev_name_prefix);
7536 if (ret) {
7537 dev_err(&pdev->dev,
7538 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7539 __func__, ret);
7540 ret = -EINVAL;
7541 goto err;
7542 }
7543
7544 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7545 msm_aux_dev[i].name = dev_name_str;
7546 msm_aux_dev[i].codec_name = NULL;
7547 msm_aux_dev[i].codec_of_node =
7548 wsa881x_dev_info[i].of_node;
7549 msm_aux_dev[i].init = msm_wsa881x_init;
7550 msm_codec_conf[i].dev_name = NULL;
7551 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7552 msm_codec_conf[i].of_node =
7553 wsa881x_dev_info[i].of_node;
7554 }
7555
7556 for (i = 0; i < codec_aux_dev_cnt; i++) {
7557 msm_aux_dev[wsa_max_devs + i].name = NULL;
7558 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7559 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7560 aux_cdc_dev_info[i].of_node;
7561 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7562 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7563 msm_codec_conf[wsa_max_devs + i].name_prefix =
7564 NULL;
7565 msm_codec_conf[wsa_max_devs + i].of_node =
7566 aux_cdc_dev_info[i].of_node;
7567 }
7568
7569 card->codec_conf = msm_codec_conf;
7570 card->aux_dev = msm_aux_dev;
7571err:
7572 return ret;
7573}
7574
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007575static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7576{
7577 int count = 0;
7578 u32 mi2s_master_slave[MI2S_MAX];
7579 int ret = 0;
7580
7581 for (count = 0; count < MI2S_MAX; count++) {
7582 mutex_init(&mi2s_intf_conf[count].lock);
7583 mi2s_intf_conf[count].ref_cnt = 0;
7584 }
7585
7586 ret = of_property_read_u32_array(pdev->dev.of_node,
7587 "qcom,msm-mi2s-master",
7588 mi2s_master_slave, MI2S_MAX);
7589 if (ret) {
7590 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7591 __func__);
7592 } else {
7593 for (count = 0; count < MI2S_MAX; count++) {
7594 mi2s_intf_conf[count].msm_is_mi2s_master =
7595 mi2s_master_slave[count];
7596 }
7597 }
7598}
7599
7600static void msm_i2s_auxpcm_deinit(void)
7601{
7602 int count = 0;
7603
7604 for (count = 0; count < MI2S_MAX; count++) {
7605 mutex_destroy(&mi2s_intf_conf[count].lock);
7606 mi2s_intf_conf[count].ref_cnt = 0;
7607 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7608 }
7609}
7610
7611static int kona_ssr_enable(struct device *dev, void *data)
7612{
7613 struct platform_device *pdev = to_platform_device(dev);
7614 struct snd_soc_card *card = platform_get_drvdata(pdev);
7615 int ret = 0;
7616
7617 if (!card) {
7618 dev_err(dev, "%s: card is NULL\n", __func__);
7619 ret = -EINVAL;
7620 goto err;
7621 }
7622
7623 if (!strcmp(card->name, "kona-stub-snd-card")) {
7624 /* TODO */
7625 dev_dbg(dev, "%s: TODO \n", __func__);
7626 }
7627
7628 snd_soc_card_change_online_state(card, 1);
7629 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7630
7631err:
7632 return ret;
7633}
7634
7635static void kona_ssr_disable(struct device *dev, void *data)
7636{
7637 struct platform_device *pdev = to_platform_device(dev);
7638 struct snd_soc_card *card = platform_get_drvdata(pdev);
7639
7640 if (!card) {
7641 dev_err(dev, "%s: card is NULL\n", __func__);
7642 return;
7643 }
7644
7645 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7646 snd_soc_card_change_online_state(card, 0);
7647
7648 if (!strcmp(card->name, "kona-stub-snd-card")) {
7649 /* TODO */
7650 dev_dbg(dev, "%s: TODO \n", __func__);
7651 }
7652}
7653
7654static const struct snd_event_ops kona_ssr_ops = {
7655 .enable = kona_ssr_enable,
7656 .disable = kona_ssr_disable,
7657};
7658
7659static int msm_audio_ssr_compare(struct device *dev, void *data)
7660{
7661 struct device_node *node = data;
7662
7663 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7664 __func__, dev->of_node, node);
7665 return (dev->of_node && dev->of_node == node);
7666}
7667
7668static int msm_audio_ssr_register(struct device *dev)
7669{
7670 struct device_node *np = dev->of_node;
7671 struct snd_event_clients *ssr_clients = NULL;
7672 struct device_node *node = NULL;
7673 int ret = 0;
7674 int i = 0;
7675
7676 for (i = 0; ; i++) {
7677 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7678 if (!node)
7679 break;
7680 snd_event_mstr_add_client(&ssr_clients,
7681 msm_audio_ssr_compare, node);
7682 }
7683
7684 ret = snd_event_master_register(dev, &kona_ssr_ops,
7685 ssr_clients, NULL);
7686 if (!ret)
7687 snd_event_notify(dev, SND_EVENT_UP);
7688
7689 return ret;
7690}
7691
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007692static int msm_asoc_machine_probe(struct platform_device *pdev)
7693{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007694 struct snd_soc_card *card = NULL;
7695 struct msm_asoc_mach_data *pdata = NULL;
7696 const char *mbhc_audio_jack_type = NULL;
7697 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007698 uint index = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007699
7700 if (!pdev->dev.of_node) {
7701 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
7702 return -EINVAL;
7703 }
7704
7705 pdata = devm_kzalloc(&pdev->dev,
7706 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
7707 if (!pdata)
7708 return -ENOMEM;
7709
7710 card = populate_snd_card_dailinks(&pdev->dev);
7711 if (!card) {
7712 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
7713 ret = -EINVAL;
7714 goto err;
7715 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007716
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007717 card->dev = &pdev->dev;
7718 platform_set_drvdata(pdev, card);
7719 snd_soc_card_set_drvdata(card, pdata);
7720
7721 ret = snd_soc_of_parse_card_name(card, "qcom,model");
7722 if (ret) {
7723 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
7724 __func__, ret);
7725 goto err;
7726 }
7727
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007728 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
7729 if (ret) {
7730 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
7731 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007732 goto err;
7733 }
7734
7735 ret = msm_populate_dai_link_component_of_node(card);
7736 if (ret) {
7737 ret = -EPROBE_DEFER;
7738 goto err;
7739 }
7740
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -07007741 ret = msm_init_aux_dev(pdev, card);
7742 if (ret)
7743 goto err;
7744
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007745 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007746 if (ret == -EPROBE_DEFER) {
7747 if (codec_reg_done)
7748 ret = -EINVAL;
7749 goto err;
7750 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007751 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
7752 __func__, ret);
7753 goto err;
7754 }
7755 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
7756 __func__, card->name);
7757
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007758 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
7759 "qcom,hph-en1-gpio", 0);
7760 if (!pdata->hph_en1_gpio_p) {
7761 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7762 __func__, "qcom,hph-en1-gpio",
7763 pdev->dev.of_node->full_name);
7764 }
7765
7766 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
7767 "qcom,hph-en0-gpio", 0);
7768 if (!pdata->hph_en0_gpio_p) {
7769 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7770 __func__, "qcom,hph-en0-gpio",
7771 pdev->dev.of_node->full_name);
7772 }
7773
7774 ret = of_property_read_string(pdev->dev.of_node,
7775 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
7776 if (ret) {
7777 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
7778 __func__, "qcom,mbhc-audio-jack-type",
7779 pdev->dev.of_node->full_name);
7780 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
7781 } else {
7782 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
7783 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7784 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
7785 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
7786 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7787 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
7788 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
7789 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7790 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
7791 } else {
7792 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7793 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
7794 }
7795 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -08007796 /*
7797 * Parse US-Euro gpio info from DT. Report no error if us-euro
7798 * entry is not found in DT file as some targets do not support
7799 * US-Euro detection
7800 */
7801 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
7802 "qcom,us-euro-gpios", 0);
7803 if (!pdata->us_euro_gpio_p) {
7804 dev_dbg(&pdev->dev, "property %s not detected in node %s",
7805 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
7806 } else {
7807 dev_dbg(&pdev->dev, "%s detected\n",
7808 "qcom,us-euro-gpios");
7809 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
7810 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007811
Meng Wanga60b4082019-02-25 17:02:23 +08007812 if (wcd_mbhc_cfg.enable_usbc_analog)
7813 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
7814
7815 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
7816 "fsa4480-i2c-handle", 0);
7817 if (!pdata->fsa_handle)
7818 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
7819 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
7820
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007821 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -08007822 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
7823 "qcom,cdc-dmic01-gpios",
7824 0);
7825 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
7826 "qcom,cdc-dmic23-gpios",
7827 0);
7828 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
7829 "qcom,cdc-dmic45-gpios",
7830 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +05307831 if (pdata->dmic01_gpio_p)
7832 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
7833 if (pdata->dmic23_gpio_p)
7834 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +05307835 if (pdata->dmic45_gpio_p)
7836 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007837
Karthikeyan Mani12dcf642019-01-29 11:21:15 -08007838 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
7839 "qcom,pri-mi2s-gpios", 0);
7840 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
7841 "qcom,sec-mi2s-gpios", 0);
7842 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7843 "qcom,tert-mi2s-gpios", 0);
7844 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7845 "qcom,quat-mi2s-gpios", 0);
7846 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7847 "qcom,quin-mi2s-gpios", 0);
7848 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7849 "qcom,sen-mi2s-gpios", 0);
7850 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
7851 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
7852
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007853 ret = msm_audio_ssr_register(&pdev->dev);
7854 if (ret)
7855 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
7856 __func__, ret);
7857
7858 is_initial_boot = true;
7859
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007860 return 0;
7861err:
7862 devm_kfree(&pdev->dev, pdata);
7863 return ret;
7864}
7865
7866static int msm_asoc_machine_remove(struct platform_device *pdev)
7867{
7868 struct snd_soc_card *card = platform_get_drvdata(pdev);
7869
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007870 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007871 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -07007872 msm_i2s_auxpcm_deinit();
7873
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007874 return 0;
7875}
7876
7877static struct platform_driver kona_asoc_machine_driver = {
7878 .driver = {
7879 .name = DRV_NAME,
7880 .owner = THIS_MODULE,
7881 .pm = &snd_soc_pm_ops,
7882 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +08007883 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -07007884 },
7885 .probe = msm_asoc_machine_probe,
7886 .remove = msm_asoc_machine_remove,
7887};
7888module_platform_driver(kona_asoc_machine_driver);
7889
7890MODULE_DESCRIPTION("ALSA SoC msm");
7891MODULE_LICENSE("GPL v2");
7892MODULE_ALIAS("platform:" DRV_NAME);
7893MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);