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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / ae5dca483066862053ff9814a4c2d4c9cb26dbea / . / asoc / kona.c
blob: c98de7aa100c6758708ad5aa7589243e399abc39 [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]76#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]77
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]78enum {
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]79 RX_PATH = 0,
80 TX_PATH,
81 MAX_PATH,
82};
83
84enum {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]85 TDM_0 = 0,
86 TDM_1,
87 TDM_2,
88 TDM_3,
89 TDM_4,
90 TDM_5,
91 TDM_6,
92 TDM_7,
93 TDM_PORT_MAX,
94};
95
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]96#define TDM_MAX_SLOTS 8
97#define TDM_SLOT_WIDTH_BITS 32
98
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]99enum {
100 TDM_PRI = 0,
101 TDM_SEC,
102 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]103 TDM_QUAT,
104 TDM_QUIN,
105 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]106 TDM_INTERFACE_MAX,
107};
108
109enum {
110 PRIM_AUX_PCM = 0,
111 SEC_AUX_PCM,
112 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]113 QUAT_AUX_PCM,
114 QUIN_AUX_PCM,
115 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]116 AUX_PCM_MAX,
117};
118
119enum {
120 PRIM_MI2S = 0,
121 SEC_MI2S,
122 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]123 QUAT_MI2S,
124 QUIN_MI2S,
125 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]126 MI2S_MAX,
127};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]128
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]129enum {
130 WSA_CDC_DMA_RX_0 = 0,
131 WSA_CDC_DMA_RX_1,
132 RX_CDC_DMA_RX_0,
133 RX_CDC_DMA_RX_1,
134 RX_CDC_DMA_RX_2,
135 RX_CDC_DMA_RX_3,
136 RX_CDC_DMA_RX_5,
137 CDC_DMA_RX_MAX,
138};
139
140enum {
141 WSA_CDC_DMA_TX_0 = 0,
142 WSA_CDC_DMA_TX_1,
143 WSA_CDC_DMA_TX_2,
144 TX_CDC_DMA_TX_0,
145 TX_CDC_DMA_TX_3,
146 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]147 VA_CDC_DMA_TX_0,
148 VA_CDC_DMA_TX_1,
149 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]150 CDC_DMA_TX_MAX,
151};
152
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]153enum {
154 SLIM_RX_7 = 0,
155 SLIM_RX_MAX,
156};
157enum {
158 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]159 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]160 SLIM_TX_MAX,
161};
162
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]163enum {
164 AFE_LOOPBACK_TX_IDX = 0,
165 AFE_LOOPBACK_TX_IDX_MAX,
166};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]167struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]168 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]169 int usbc_en2_gpio; /* used by gpio driver API */
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]170 int lito_v2_enabled;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]171 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
172 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
173 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]174 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
175 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]176 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
177 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
178 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
179 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
180 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]181 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]182};
183
184struct tdm_port {
185 u32 mode;
186 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]187};
188
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]189struct tdm_dev_config {
190 unsigned int tdm_slot_offset[TDM_MAX_SLOTS];
191};
192
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]193enum {
194 EXT_DISP_RX_IDX_DP = 0,
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]195 EXT_DISP_RX_IDX_DP1,
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]196 EXT_DISP_RX_IDX_MAX,
197};
198
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]199struct msm_wsa881x_dev_info {
200 struct device_node *of_node;
201 u32 index;
202};
203
204struct aux_codec_dev_info {
205 struct device_node *of_node;
206 u32 index;
207};
208
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]209struct dev_config {
210 u32 sample_rate;
211 u32 bit_format;
212 u32 channels;
213};
214
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]215/* Default configuration of slimbus channels */
216static struct dev_config slim_rx_cfg[] = {
217 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
218};
219
220static struct dev_config slim_tx_cfg[] = {
221 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]222 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]223};
224
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]225/* Default configuration of external display BE */
226static struct dev_config ext_disp_rx_cfg[] = {
227 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]228 [EXT_DISP_RX_IDX_DP1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]229};
230
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]231static struct dev_config usb_rx_cfg = {
232 .sample_rate = SAMPLING_RATE_48KHZ,
233 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
234 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]235};
236
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]237static struct dev_config usb_tx_cfg = {
238 .sample_rate = SAMPLING_RATE_48KHZ,
239 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
240 .channels = 1,
241};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]242
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]243static struct dev_config proxy_rx_cfg = {
244 .sample_rate = SAMPLING_RATE_48KHZ,
245 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
246 .channels = 2,
247};
248
249static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
250 {
251 AFE_API_VERSION_I2S_CONFIG,
252 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
253 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
254 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
255 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
256 0,
257 },
258 {
259 AFE_API_VERSION_I2S_CONFIG,
260 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
261 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
262 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
263 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
264 0,
265 },
266 {
267 AFE_API_VERSION_I2S_CONFIG,
268 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
269 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
270 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
271 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
272 0,
273 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]274 {
275 AFE_API_VERSION_I2S_CONFIG,
276 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
277 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
278 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
279 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
280 0,
281 },
282 {
283 AFE_API_VERSION_I2S_CONFIG,
284 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
285 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
286 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
287 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
288 0,
289 },
290 {
291 AFE_API_VERSION_I2S_CONFIG,
292 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
293 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
294 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
295 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
296 0,
297 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]298};
299
300struct mi2s_conf {
301 struct mutex lock;
302 u32 ref_cnt;
303 u32 msm_is_mi2s_master;
304};
305
306static u32 mi2s_ebit_clk[MI2S_MAX] = {
307 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
308 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
309 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
310};
311
312static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
313
314/* Default configuration of TDM channels */
315static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
316 { /* PRI TDM */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
325 },
326 { /* SEC TDM */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
335 },
336 { /* TERT TDM */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
345 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]346 { /* QUAT TDM */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
355 },
356 { /* QUIN TDM */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
359 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
360 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
361 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
362 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
363 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
365 },
366 { /* SEN TDM */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
372 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
373 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
375 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]376};
377
378static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
379 { /* PRI TDM */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
382 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
383 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
388 },
389 { /* SEC TDM */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
392 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
393 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
398 },
399 { /* TERT TDM */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
402 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
403 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
408 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]409 { /* QUAT TDM */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
412 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
413 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
418 },
419 { /* QUIN TDM */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
422 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
423 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
424 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
425 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
426 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
427 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
428 },
429 { /* SEN TDM */
430 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
431 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
432 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
433 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
434 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
435 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
436 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
437 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
438 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]439};
440
441/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]442static struct dev_config aux_pcm_rx_cfg[] = {
443 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]444 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
445 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]446 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]449};
450
451static struct dev_config aux_pcm_tx_cfg[] = {
452 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]453 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
454 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]455 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]458};
459
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]460/* Default configuration of MI2S channels */
461static struct dev_config mi2s_rx_cfg[] = {
462 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
463 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
464 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]465 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
466 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
467 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]468};
469
470static struct dev_config mi2s_tx_cfg[] = {
471 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
472 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
473 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]474 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
475 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
476 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]477};
478
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]479static struct tdm_dev_config pri_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
480 { /* PRI TDM */
481 { {0, 4, 0xFFFF} }, /* RX_0 */
482 { {8, 12, 0xFFFF} }, /* RX_1 */
483 { {16, 20, 0xFFFF} }, /* RX_2 */
484 { {24, 28, 0xFFFF} }, /* RX_3 */
485 { {0xFFFF} }, /* RX_4 */
486 { {0xFFFF} }, /* RX_5 */
487 { {0xFFFF} }, /* RX_6 */
488 { {0xFFFF} }, /* RX_7 */
489 },
490 {
491 { {0, 4, 8, 12, 0xFFFF} }, /* TX_0 */
492 { {8, 12, 0xFFFF} }, /* TX_1 */
493 { {16, 20, 0xFFFF} }, /* TX_2 */
494 { {24, 28, 0xFFFF} }, /* TX_3 */
495 { {0xFFFF} }, /* TX_4 */
496 { {0xFFFF} }, /* TX_5 */
497 { {0xFFFF} }, /* TX_6 */
498 { {0xFFFF} }, /* TX_7 */
499 },
500};
501
502static struct tdm_dev_config sec_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
503 { /* SEC TDM */
504 { {0, 4, 0xFFFF} }, /* RX_0 */
505 { {8, 12, 0xFFFF} }, /* RX_1 */
506 { {16, 20, 0xFFFF} }, /* RX_2 */
507 { {24, 28, 0xFFFF} }, /* RX_3 */
508 { {0xFFFF} }, /* RX_4 */
509 { {0xFFFF} }, /* RX_5 */
510 { {0xFFFF} }, /* RX_6 */
511 { {0xFFFF} }, /* RX_7 */
512 },
513 {
514 { {0, 4, 0xFFFF} }, /* TX_0 */
515 { {8, 12, 0xFFFF} }, /* TX_1 */
516 { {16, 20, 0xFFFF} }, /* TX_2 */
517 { {24, 28, 0xFFFF} }, /* TX_3 */
518 { {0xFFFF} }, /* TX_4 */
519 { {0xFFFF} }, /* TX_5 */
520 { {0xFFFF} }, /* TX_6 */
521 { {0xFFFF} }, /* TX_7 */
522 },
523};
524
525static struct tdm_dev_config tert_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
526 { /* TERT TDM */
527 { {0, 4, 0xFFFF} }, /* RX_0 */
528 { {8, 12, 0xFFFF} }, /* RX_1 */
529 { {16, 20, 0xFFFF} }, /* RX_2 */
530 { {24, 28, 0xFFFF} }, /* RX_3 */
531 { {0xFFFF} }, /* RX_4 */
532 { {0xFFFF} }, /* RX_5 */
533 { {0xFFFF} }, /* RX_6 */
534 { {0xFFFF} }, /* RX_7 */
535 },
536 {
537 { {0, 4, 0xFFFF} }, /* TX_0 */
538 { {8, 12, 0xFFFF} }, /* TX_1 */
539 { {16, 20, 0xFFFF} }, /* TX_2 */
540 { {24, 28, 0xFFFF} }, /* TX_3 */
541 { {0xFFFF} }, /* TX_4 */
542 { {0xFFFF} }, /* TX_5 */
543 { {0xFFFF} }, /* TX_6 */
544 { {0xFFFF} }, /* TX_7 */
545 },
546};
547
548static struct tdm_dev_config quat_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
549 { /* QUAT TDM */
550 { {0, 4, 0xFFFF} }, /* RX_0 */
551 { {8, 12, 0xFFFF} }, /* RX_1 */
552 { {16, 20, 0xFFFF} }, /* RX_2 */
553 { {24, 28, 0xFFFF} }, /* RX_3 */
554 { {0xFFFF} }, /* RX_4 */
555 { {0xFFFF} }, /* RX_5 */
556 { {0xFFFF} }, /* RX_6 */
557 { {0xFFFF} }, /* RX_7 */
558 },
559 {
560 { {0, 4, 0xFFFF} }, /* TX_0 */
561 { {8, 12, 0xFFFF} }, /* TX_1 */
562 { {16, 20, 0xFFFF} }, /* TX_2 */
563 { {24, 28, 0xFFFF} }, /* TX_3 */
564 { {0xFFFF} }, /* TX_4 */
565 { {0xFFFF} }, /* TX_5 */
566 { {0xFFFF} }, /* TX_6 */
567 { {0xFFFF} }, /* TX_7 */
568 },
569};
570
571static struct tdm_dev_config quin_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
572 { /* QUIN TDM */
573 { {0, 4, 0xFFFF} }, /* RX_0 */
574 { {8, 12, 0xFFFF} }, /* RX_1 */
575 { {16, 20, 0xFFFF} }, /* RX_2 */
576 { {24, 28, 0xFFFF} }, /* RX_3 */
577 { {0xFFFF} }, /* RX_4 */
578 { {0xFFFF} }, /* RX_5 */
579 { {0xFFFF} }, /* RX_6 */
580 { {0xFFFF} }, /* RX_7 */
581 },
582 {
583 { {0, 4, 0xFFFF} }, /* TX_0 */
584 { {8, 12, 0xFFFF} }, /* TX_1 */
585 { {16, 20, 0xFFFF} }, /* TX_2 */
586 { {24, 28, 0xFFFF} }, /* TX_3 */
587 { {0xFFFF} }, /* TX_4 */
588 { {0xFFFF} }, /* TX_5 */
589 { {0xFFFF} }, /* TX_6 */
590 { {0xFFFF} }, /* TX_7 */
591 },
592};
593
594static struct tdm_dev_config sen_tdm_dev_config[MAX_PATH][TDM_PORT_MAX] = {
595 { /* SEN TDM */
596 { {0, 4, 0xFFFF} }, /* RX_0 */
597 { {8, 12, 0xFFFF} }, /* RX_1 */
598 { {16, 20, 0xFFFF} }, /* RX_2 */
599 { {24, 28, 0xFFFF} }, /* RX_3 */
600 { {0xFFFF} }, /* RX_4 */
601 { {0xFFFF} }, /* RX_5 */
602 { {0xFFFF} }, /* RX_6 */
603 { {0xFFFF} }, /* RX_7 */
604 },
605 {
606 { {0, 4, 0xFFFF} }, /* TX_0 */
607 { {8, 12, 0xFFFF} }, /* TX_1 */
608 { {16, 20, 0xFFFF} }, /* TX_2 */
609 { {24, 28, 0xFFFF} }, /* TX_3 */
610 { {0xFFFF} }, /* TX_4 */
611 { {0xFFFF} }, /* TX_5 */
612 { {0xFFFF} }, /* TX_6 */
613 { {0xFFFF} }, /* TX_7 */
614 },
615};
616
617static void *tdm_cfg[TDM_INTERFACE_MAX] = {
618 pri_tdm_dev_config,
619 sec_tdm_dev_config,
620 tert_tdm_dev_config,
621 quat_tdm_dev_config,
622 quin_tdm_dev_config,
623 sen_tdm_dev_config,
624};
625
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]626/* Default configuration of Codec DMA Interface RX */
627static struct dev_config cdc_dma_rx_cfg[] = {
628 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
629 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
630 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
631 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
632 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
633 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
634 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
635};
636
637/* Default configuration of Codec DMA Interface TX */
638static struct dev_config cdc_dma_tx_cfg[] = {
639 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
640 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
641 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
642 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
643 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
644 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]645 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
646 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
647 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]648};
649
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]650static struct dev_config afe_loopback_tx_cfg[] = {
651 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
652};
653
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]654static int msm_vi_feed_tx_ch = 2;
655static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]656static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
657 "S32_LE"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]658static char const *cdc80_bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]659static char const *ch_text[] = {"Two", "Three", "Four", "Five",
660 "Six", "Seven", "Eight"};
661static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
662 "KHZ_16", "KHZ_22P05",
663 "KHZ_32", "KHZ_44P1", "KHZ_48",
664 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
665 "KHZ_192", "KHZ_352P8", "KHZ_384"};
666static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
667 "Five", "Six", "Seven",
668 "Eight"};
669static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
670 "KHZ_48", "KHZ_176P4",
671 "KHZ_352P8"};
672static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
673static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
674 "Five", "Six", "Seven", "Eight"};
675static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
676static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
677 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
678 "KHZ_48", "KHZ_96", "KHZ_192"};
679static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
680 "Five", "Six", "Seven",
681 "Eight"};
682
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]683static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
684static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
685 "Five", "Six", "Seven",
686 "Eight"};
687static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
688 "KHZ_16", "KHZ_22P05",
689 "KHZ_32", "KHZ_44P1", "KHZ_48",
690 "KHZ_88P2", "KHZ_96",
691 "KHZ_176P4", "KHZ_192",
692 "KHZ_352P8", "KHZ_384"};
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]693static char const *cdc80_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
694 "KHZ_16", "KHZ_22P05",
695 "KHZ_32", "KHZ_44P1", "KHZ_48",
696 "KHZ_88P2", "KHZ_96",
697 "KHZ_176P4", "KHZ_192"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]698static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
699 "S24_3LE"};
700static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
701 "KHZ_192", "KHZ_32", "KHZ_44P1",
702 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]703static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
704 "KHZ_44P1", "KHZ_48",
705 "KHZ_88P2", "KHZ_96"};
706static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
707 "KHZ_44P1", "KHZ_48",
708 "KHZ_88P2", "KHZ_96"};
709static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
710 "KHZ_44P1", "KHZ_48",
711 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]712static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]713
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]714static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
715static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
716static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
717static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
718static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
719static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]720static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]721static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
722static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
723static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
724static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
725static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
726static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
727static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]728static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]729static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
730static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]731static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
732static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
733static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]734static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]735static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
736static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]737static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
738static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
739static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]740static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
741static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]742static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
743static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
744static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]745static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
746static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
747static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]748static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
749static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
750static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]751static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
752static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
753static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]754static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
755static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
756static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
757static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
758static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]759static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
760static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
761static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]762static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
763static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
764static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]765static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
766static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
767static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]768static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
769static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
770static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
771static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
772static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
773static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
774static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
775static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
776static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
777static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
778static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
779static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
780static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]781static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
782static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
783static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]784static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
785static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]786static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
787static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
788static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
789static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
790static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]791static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
792static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
793static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]794static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
795 cdc_dma_sample_rate_text);
796static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
797 cdc_dma_sample_rate_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]798static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
799 cdc_dma_sample_rate_text);
800static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
801 cdc_dma_sample_rate_text);
802static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
803 cdc_dma_sample_rate_text);
804static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
805 cdc_dma_sample_rate_text);
806static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
807 cdc_dma_sample_rate_text);
808static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
809 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]810static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
811 cdc_dma_sample_rate_text);
812static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
813 cdc_dma_sample_rate_text);
814static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
815 cdc_dma_sample_rate_text);
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]816
817/* WCD9380 */
818static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_format, cdc80_bit_format_text);
819static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_format, cdc80_bit_format_text);
820static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_format, cdc80_bit_format_text);
821static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_format, cdc80_bit_format_text);
822static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_format, cdc80_bit_format_text);
823static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_0_sample_rate,
824 cdc80_dma_sample_rate_text);
825static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_1_sample_rate,
826 cdc80_dma_sample_rate_text);
827static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_2_sample_rate,
828 cdc80_dma_sample_rate_text);
829static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_3_sample_rate,
830 cdc80_dma_sample_rate_text);
831static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc80_dma_rx_5_sample_rate,
832 cdc80_dma_sample_rate_text);
833/* WCD9385 */
834static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_format, bit_format_text);
835static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_format, bit_format_text);
836static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_format, bit_format_text);
837static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_format, bit_format_text);
838static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_format, bit_format_text);
839static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_0_sample_rate,
840 cdc_dma_sample_rate_text);
841static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_1_sample_rate,
842 cdc_dma_sample_rate_text);
843static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_2_sample_rate,
844 cdc_dma_sample_rate_text);
845static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_3_sample_rate,
846 cdc_dma_sample_rate_text);
847static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc85_dma_rx_5_sample_rate,
848 cdc_dma_sample_rate_text);
849
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]850static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
851static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
852static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
853 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]854static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
855static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
856static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]857static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]858
859static bool is_initial_boot;
860static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]861static struct snd_soc_aux_dev *msm_aux_dev;
862static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]863static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]864static int dmic_0_1_gpio_cnt;
865static int dmic_2_3_gpio_cnt;
866static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]867
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]868static void *def_wcd_mbhc_cal(void);
869
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]870/*
871 * Need to report LINEIN
872 * if R/L channel impedance is larger than 5K ohm
873 */
874static struct wcd_mbhc_config wcd_mbhc_cfg = {
875 .read_fw_bin = false,
876 .calibration = NULL,
877 .detect_extn_cable = true,
878 .mono_stero_detection = false,
879 .swap_gnd_mic = NULL,
880 .hs_ext_micbias = true,
881 .key_code[0] = KEY_MEDIA,
882 .key_code[1] = KEY_VOICECOMMAND,
883 .key_code[2] = KEY_VOLUMEUP,
884 .key_code[3] = KEY_VOLUMEDOWN,
885 .key_code[4] = 0,
886 .key_code[5] = 0,
887 .key_code[6] = 0,
888 .key_code[7] = 0,
889 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]890 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]891 .mbhc_micbias = MIC_BIAS_2,
892 .anc_micbias = MIC_BIAS_2,
893 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]894 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]895};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]896
897static inline int param_is_mask(int p)
898{
899 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
900 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
901}
902
903static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
904 int n)
905{
906 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
907}
908
909static void param_set_mask(struct snd_pcm_hw_params *p, int n,
910 unsigned int bit)
911{
912 if (bit >= SNDRV_MASK_MAX)
913 return;
914 if (param_is_mask(n)) {
915 struct snd_mask *m = param_to_mask(p, n);
916
917 m->bits[0] = 0;
918 m->bits[1] = 0;
919 m->bits[bit >> 5] |= (1 << (bit & 31));
920 }
921}
922
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]923static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
924 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]925{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]926 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]927
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]928 switch (usb_rx_cfg.sample_rate) {
929 case SAMPLING_RATE_384KHZ:
930 sample_rate_val = 12;
931 break;
932 case SAMPLING_RATE_352P8KHZ:
933 sample_rate_val = 11;
934 break;
935 case SAMPLING_RATE_192KHZ:
936 sample_rate_val = 10;
937 break;
938 case SAMPLING_RATE_176P4KHZ:
939 sample_rate_val = 9;
940 break;
941 case SAMPLING_RATE_96KHZ:
942 sample_rate_val = 8;
943 break;
944 case SAMPLING_RATE_88P2KHZ:
945 sample_rate_val = 7;
946 break;
947 case SAMPLING_RATE_48KHZ:
948 sample_rate_val = 6;
949 break;
950 case SAMPLING_RATE_44P1KHZ:
951 sample_rate_val = 5;
952 break;
953 case SAMPLING_RATE_32KHZ:
954 sample_rate_val = 4;
955 break;
956 case SAMPLING_RATE_22P05KHZ:
957 sample_rate_val = 3;
958 break;
959 case SAMPLING_RATE_16KHZ:
960 sample_rate_val = 2;
961 break;
962 case SAMPLING_RATE_11P025KHZ:
963 sample_rate_val = 1;
964 break;
965 case SAMPLING_RATE_8KHZ:
966 default:
967 sample_rate_val = 0;
968 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]969 }
970
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]971 ucontrol->value.integer.value[0] = sample_rate_val;
972 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
973 usb_rx_cfg.sample_rate);
974 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]975}
976
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]977static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
978 struct snd_ctl_elem_value *ucontrol)
979{
980 switch (ucontrol->value.integer.value[0]) {
981 case 12:
982 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
983 break;
984 case 11:
985 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
986 break;
987 case 10:
988 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
989 break;
990 case 9:
991 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
992 break;
993 case 8:
994 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
995 break;
996 case 7:
997 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
998 break;
999 case 6:
1000 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1001 break;
1002 case 5:
1003 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1004 break;
1005 case 4:
1006 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1007 break;
1008 case 3:
1009 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1010 break;
1011 case 2:
1012 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1013 break;
1014 case 1:
1015 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1016 break;
1017 case 0:
1018 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1019 break;
1020 default:
1021 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1022 break;
1023 }
1024
1025 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1026 __func__, ucontrol->value.integer.value[0],
1027 usb_rx_cfg.sample_rate);
1028 return 0;
1029}
1030
1031static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1032 struct snd_ctl_elem_value *ucontrol)
1033{
1034 int sample_rate_val = 0;
1035
1036 switch (usb_tx_cfg.sample_rate) {
1037 case SAMPLING_RATE_384KHZ:
1038 sample_rate_val = 12;
1039 break;
1040 case SAMPLING_RATE_352P8KHZ:
1041 sample_rate_val = 11;
1042 break;
1043 case SAMPLING_RATE_192KHZ:
1044 sample_rate_val = 10;
1045 break;
1046 case SAMPLING_RATE_176P4KHZ:
1047 sample_rate_val = 9;
1048 break;
1049 case SAMPLING_RATE_96KHZ:
1050 sample_rate_val = 8;
1051 break;
1052 case SAMPLING_RATE_88P2KHZ:
1053 sample_rate_val = 7;
1054 break;
1055 case SAMPLING_RATE_48KHZ:
1056 sample_rate_val = 6;
1057 break;
1058 case SAMPLING_RATE_44P1KHZ:
1059 sample_rate_val = 5;
1060 break;
1061 case SAMPLING_RATE_32KHZ:
1062 sample_rate_val = 4;
1063 break;
1064 case SAMPLING_RATE_22P05KHZ:
1065 sample_rate_val = 3;
1066 break;
1067 case SAMPLING_RATE_16KHZ:
1068 sample_rate_val = 2;
1069 break;
1070 case SAMPLING_RATE_11P025KHZ:
1071 sample_rate_val = 1;
1072 break;
1073 case SAMPLING_RATE_8KHZ:
1074 sample_rate_val = 0;
1075 break;
1076 default:
1077 sample_rate_val = 6;
1078 break;
1079 }
1080
1081 ucontrol->value.integer.value[0] = sample_rate_val;
1082 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1083 usb_tx_cfg.sample_rate);
1084 return 0;
1085}
1086
1087static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 switch (ucontrol->value.integer.value[0]) {
1091 case 12:
1092 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1093 break;
1094 case 11:
1095 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1096 break;
1097 case 10:
1098 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1099 break;
1100 case 9:
1101 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1102 break;
1103 case 8:
1104 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1105 break;
1106 case 7:
1107 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1108 break;
1109 case 6:
1110 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1111 break;
1112 case 5:
1113 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1114 break;
1115 case 4:
1116 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1117 break;
1118 case 3:
1119 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1120 break;
1121 case 2:
1122 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1123 break;
1124 case 1:
1125 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1126 break;
1127 case 0:
1128 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1129 break;
1130 default:
1131 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1132 break;
1133 }
1134
1135 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1136 __func__, ucontrol->value.integer.value[0],
1137 usb_tx_cfg.sample_rate);
1138 return 0;
1139}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]1140static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
1141 struct snd_ctl_elem_value *ucontrol)
1142{
1143 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1144 afe_loopback_tx_cfg[0].channels);
1145 ucontrol->value.enumerated.item[0] =
1146 afe_loopback_tx_cfg[0].channels - 1;
1147
1148 return 0;
1149}
1150
1151static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
1152 struct snd_ctl_elem_value *ucontrol)
1153{
1154 afe_loopback_tx_cfg[0].channels =
1155 ucontrol->value.enumerated.item[0] + 1;
1156 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
1157 afe_loopback_tx_cfg[0].channels);
1158
1159 return 1;
1160}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1161
1162static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1163 struct snd_ctl_elem_value *ucontrol)
1164{
1165 switch (usb_rx_cfg.bit_format) {
1166 case SNDRV_PCM_FORMAT_S32_LE:
1167 ucontrol->value.integer.value[0] = 3;
1168 break;
1169 case SNDRV_PCM_FORMAT_S24_3LE:
1170 ucontrol->value.integer.value[0] = 2;
1171 break;
1172 case SNDRV_PCM_FORMAT_S24_LE:
1173 ucontrol->value.integer.value[0] = 1;
1174 break;
1175 case SNDRV_PCM_FORMAT_S16_LE:
1176 default:
1177 ucontrol->value.integer.value[0] = 0;
1178 break;
1179 }
1180
1181 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1182 __func__, usb_rx_cfg.bit_format,
1183 ucontrol->value.integer.value[0]);
1184 return 0;
1185}
1186
1187static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1188 struct snd_ctl_elem_value *ucontrol)
1189{
1190 int rc = 0;
1191
1192 switch (ucontrol->value.integer.value[0]) {
1193 case 3:
1194 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1195 break;
1196 case 2:
1197 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1198 break;
1199 case 1:
1200 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1201 break;
1202 case 0:
1203 default:
1204 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1205 break;
1206 }
1207 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1208 __func__, usb_rx_cfg.bit_format,
1209 ucontrol->value.integer.value[0]);
1210
1211 return rc;
1212}
1213
1214static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1215 struct snd_ctl_elem_value *ucontrol)
1216{
1217 switch (usb_tx_cfg.bit_format) {
1218 case SNDRV_PCM_FORMAT_S32_LE:
1219 ucontrol->value.integer.value[0] = 3;
1220 break;
1221 case SNDRV_PCM_FORMAT_S24_3LE:
1222 ucontrol->value.integer.value[0] = 2;
1223 break;
1224 case SNDRV_PCM_FORMAT_S24_LE:
1225 ucontrol->value.integer.value[0] = 1;
1226 break;
1227 case SNDRV_PCM_FORMAT_S16_LE:
1228 default:
1229 ucontrol->value.integer.value[0] = 0;
1230 break;
1231 }
1232
1233 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1234 __func__, usb_tx_cfg.bit_format,
1235 ucontrol->value.integer.value[0]);
1236 return 0;
1237}
1238
1239static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1240 struct snd_ctl_elem_value *ucontrol)
1241{
1242 int rc = 0;
1243
1244 switch (ucontrol->value.integer.value[0]) {
1245 case 3:
1246 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1247 break;
1248 case 2:
1249 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1250 break;
1251 case 1:
1252 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1253 break;
1254 case 0:
1255 default:
1256 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1257 break;
1258 }
1259 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1260 __func__, usb_tx_cfg.bit_format,
1261 ucontrol->value.integer.value[0]);
1262
1263 return rc;
1264}
1265
1266static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1267 struct snd_ctl_elem_value *ucontrol)
1268{
1269 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1270 usb_rx_cfg.channels);
1271 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1272 return 0;
1273}
1274
1275static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1277{
1278 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1279
1280 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1281 return 1;
1282}
1283
1284static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1285 struct snd_ctl_elem_value *ucontrol)
1286{
1287 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1288 usb_tx_cfg.channels);
1289 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1290 return 0;
1291}
1292
1293static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1294 struct snd_ctl_elem_value *ucontrol)
1295{
1296 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1297
1298 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1299 return 1;
1300}
1301
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1302static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_value *ucontrol)
1304{
1305 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1306 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1307 ucontrol->value.integer.value[0]);
1308 return 0;
1309}
1310
1311static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1312 struct snd_ctl_elem_value *ucontrol)
1313{
1314 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1315 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1316 return 1;
1317}
1318
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1319static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1320{
1321 int idx = 0;
1322
1323 if (strnstr(kcontrol->id.name, "Display Port RX",
1324 sizeof("Display Port RX"))) {
1325 idx = EXT_DISP_RX_IDX_DP;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]1326 } else if (strnstr(kcontrol->id.name, "Display Port1 RX",
1327 sizeof("Display Port1 RX"))) {
1328 idx = EXT_DISP_RX_IDX_DP1;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1329 } else {
1330 pr_err("%s: unsupported BE: %s\n",
1331 __func__, kcontrol->id.name);
1332 idx = -EINVAL;
1333 }
1334
1335 return idx;
1336}
1337
1338static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1339 struct snd_ctl_elem_value *ucontrol)
1340{
1341 int idx = ext_disp_get_port_idx(kcontrol);
1342
1343 if (idx < 0)
1344 return idx;
1345
1346 switch (ext_disp_rx_cfg[idx].bit_format) {
1347 case SNDRV_PCM_FORMAT_S24_3LE:
1348 ucontrol->value.integer.value[0] = 2;
1349 break;
1350 case SNDRV_PCM_FORMAT_S24_LE:
1351 ucontrol->value.integer.value[0] = 1;
1352 break;
1353 case SNDRV_PCM_FORMAT_S16_LE:
1354 default:
1355 ucontrol->value.integer.value[0] = 0;
1356 break;
1357 }
1358
1359 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1360 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1361 ucontrol->value.integer.value[0]);
1362 return 0;
1363}
1364
1365static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1366 struct snd_ctl_elem_value *ucontrol)
1367{
1368 int idx = ext_disp_get_port_idx(kcontrol);
1369
1370 if (idx < 0)
1371 return idx;
1372
1373 switch (ucontrol->value.integer.value[0]) {
1374 case 2:
1375 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1376 break;
1377 case 1:
1378 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1379 break;
1380 case 0:
1381 default:
1382 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1383 break;
1384 }
1385 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1386 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1387 ucontrol->value.integer.value[0]);
1388
1389 return 0;
1390}
1391
1392static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1393 struct snd_ctl_elem_value *ucontrol)
1394{
1395 int idx = ext_disp_get_port_idx(kcontrol);
1396
1397 if (idx < 0)
1398 return idx;
1399
1400 ucontrol->value.integer.value[0] =
1401 ext_disp_rx_cfg[idx].channels - 2;
1402
1403 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1404 idx, ext_disp_rx_cfg[idx].channels);
1405
1406 return 0;
1407}
1408
1409static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1410 struct snd_ctl_elem_value *ucontrol)
1411{
1412 int idx = ext_disp_get_port_idx(kcontrol);
1413
1414 if (idx < 0)
1415 return idx;
1416
1417 ext_disp_rx_cfg[idx].channels =
1418 ucontrol->value.integer.value[0] + 2;
1419
1420 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1421 idx, ext_disp_rx_cfg[idx].channels);
1422 return 1;
1423}
1424
1425static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1426 struct snd_ctl_elem_value *ucontrol)
1427{
1428 int sample_rate_val;
1429 int idx = ext_disp_get_port_idx(kcontrol);
1430
1431 if (idx < 0)
1432 return idx;
1433
1434 switch (ext_disp_rx_cfg[idx].sample_rate) {
1435 case SAMPLING_RATE_176P4KHZ:
1436 sample_rate_val = 6;
1437 break;
1438
1439 case SAMPLING_RATE_88P2KHZ:
1440 sample_rate_val = 5;
1441 break;
1442
1443 case SAMPLING_RATE_44P1KHZ:
1444 sample_rate_val = 4;
1445 break;
1446
1447 case SAMPLING_RATE_32KHZ:
1448 sample_rate_val = 3;
1449 break;
1450
1451 case SAMPLING_RATE_192KHZ:
1452 sample_rate_val = 2;
1453 break;
1454
1455 case SAMPLING_RATE_96KHZ:
1456 sample_rate_val = 1;
1457 break;
1458
1459 case SAMPLING_RATE_48KHZ:
1460 default:
1461 sample_rate_val = 0;
1462 break;
1463 }
1464
1465 ucontrol->value.integer.value[0] = sample_rate_val;
1466 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1467 idx, ext_disp_rx_cfg[idx].sample_rate);
1468
1469 return 0;
1470}
1471
1472static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1473 struct snd_ctl_elem_value *ucontrol)
1474{
1475 int idx = ext_disp_get_port_idx(kcontrol);
1476
1477 if (idx < 0)
1478 return idx;
1479
1480 switch (ucontrol->value.integer.value[0]) {
1481 case 6:
1482 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1483 break;
1484 case 5:
1485 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1486 break;
1487 case 4:
1488 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1489 break;
1490 case 3:
1491 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1492 break;
1493 case 2:
1494 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1495 break;
1496 case 1:
1497 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1498 break;
1499 case 0:
1500 default:
1501 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1502 break;
1503 }
1504
1505 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1506 __func__, ucontrol->value.integer.value[0], idx,
1507 ext_disp_rx_cfg[idx].sample_rate);
1508 return 0;
1509}
1510
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1511static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1512 struct snd_ctl_elem_value *ucontrol)
1513{
1514 pr_debug("%s: proxy_rx channels = %d\n",
1515 __func__, proxy_rx_cfg.channels);
1516 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1517
1518 return 0;
1519}
1520
1521static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1522 struct snd_ctl_elem_value *ucontrol)
1523{
1524 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1525 pr_debug("%s: proxy_rx channels = %d\n",
1526 __func__, proxy_rx_cfg.channels);
1527
1528 return 1;
1529}
1530
1531static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1532 struct tdm_port *port)
1533{
1534 if (port) {
1535 if (strnstr(kcontrol->id.name, "PRI",
1536 sizeof(kcontrol->id.name))) {
1537 port->mode = TDM_PRI;
1538 } else if (strnstr(kcontrol->id.name, "SEC",
1539 sizeof(kcontrol->id.name))) {
1540 port->mode = TDM_SEC;
1541 } else if (strnstr(kcontrol->id.name, "TERT",
1542 sizeof(kcontrol->id.name))) {
1543 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1544 } else if (strnstr(kcontrol->id.name, "QUAT",
1545 sizeof(kcontrol->id.name))) {
1546 port->mode = TDM_QUAT;
1547 } else if (strnstr(kcontrol->id.name, "QUIN",
1548 sizeof(kcontrol->id.name))) {
1549 port->mode = TDM_QUIN;
1550 } else if (strnstr(kcontrol->id.name, "SEN",
1551 sizeof(kcontrol->id.name))) {
1552 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1553 } else {
1554 pr_err("%s: unsupported mode in: %s\n",
1555 __func__, kcontrol->id.name);
1556 return -EINVAL;
1557 }
1558
1559 if (strnstr(kcontrol->id.name, "RX_0",
1560 sizeof(kcontrol->id.name)) ||
1561 strnstr(kcontrol->id.name, "TX_0",
1562 sizeof(kcontrol->id.name))) {
1563 port->channel = TDM_0;
1564 } else if (strnstr(kcontrol->id.name, "RX_1",
1565 sizeof(kcontrol->id.name)) ||
1566 strnstr(kcontrol->id.name, "TX_1",
1567 sizeof(kcontrol->id.name))) {
1568 port->channel = TDM_1;
1569 } else if (strnstr(kcontrol->id.name, "RX_2",
1570 sizeof(kcontrol->id.name)) ||
1571 strnstr(kcontrol->id.name, "TX_2",
1572 sizeof(kcontrol->id.name))) {
1573 port->channel = TDM_2;
1574 } else if (strnstr(kcontrol->id.name, "RX_3",
1575 sizeof(kcontrol->id.name)) ||
1576 strnstr(kcontrol->id.name, "TX_3",
1577 sizeof(kcontrol->id.name))) {
1578 port->channel = TDM_3;
1579 } else if (strnstr(kcontrol->id.name, "RX_4",
1580 sizeof(kcontrol->id.name)) ||
1581 strnstr(kcontrol->id.name, "TX_4",
1582 sizeof(kcontrol->id.name))) {
1583 port->channel = TDM_4;
1584 } else if (strnstr(kcontrol->id.name, "RX_5",
1585 sizeof(kcontrol->id.name)) ||
1586 strnstr(kcontrol->id.name, "TX_5",
1587 sizeof(kcontrol->id.name))) {
1588 port->channel = TDM_5;
1589 } else if (strnstr(kcontrol->id.name, "RX_6",
1590 sizeof(kcontrol->id.name)) ||
1591 strnstr(kcontrol->id.name, "TX_6",
1592 sizeof(kcontrol->id.name))) {
1593 port->channel = TDM_6;
1594 } else if (strnstr(kcontrol->id.name, "RX_7",
1595 sizeof(kcontrol->id.name)) ||
1596 strnstr(kcontrol->id.name, "TX_7",
1597 sizeof(kcontrol->id.name))) {
1598 port->channel = TDM_7;
1599 } else {
1600 pr_err("%s: unsupported channel in: %s\n",
1601 __func__, kcontrol->id.name);
1602 return -EINVAL;
1603 }
1604 } else {
1605 return -EINVAL;
1606 }
1607 return 0;
1608}
1609
1610static int tdm_get_sample_rate(int value)
1611{
1612 int sample_rate = 0;
1613
1614 switch (value) {
1615 case 0:
1616 sample_rate = SAMPLING_RATE_8KHZ;
1617 break;
1618 case 1:
1619 sample_rate = SAMPLING_RATE_16KHZ;
1620 break;
1621 case 2:
1622 sample_rate = SAMPLING_RATE_32KHZ;
1623 break;
1624 case 3:
1625 sample_rate = SAMPLING_RATE_48KHZ;
1626 break;
1627 case 4:
1628 sample_rate = SAMPLING_RATE_176P4KHZ;
1629 break;
1630 case 5:
1631 sample_rate = SAMPLING_RATE_352P8KHZ;
1632 break;
1633 default:
1634 sample_rate = SAMPLING_RATE_48KHZ;
1635 break;
1636 }
1637 return sample_rate;
1638}
1639
1640static int tdm_get_sample_rate_val(int sample_rate)
1641{
1642 int sample_rate_val = 0;
1643
1644 switch (sample_rate) {
1645 case SAMPLING_RATE_8KHZ:
1646 sample_rate_val = 0;
1647 break;
1648 case SAMPLING_RATE_16KHZ:
1649 sample_rate_val = 1;
1650 break;
1651 case SAMPLING_RATE_32KHZ:
1652 sample_rate_val = 2;
1653 break;
1654 case SAMPLING_RATE_48KHZ:
1655 sample_rate_val = 3;
1656 break;
1657 case SAMPLING_RATE_176P4KHZ:
1658 sample_rate_val = 4;
1659 break;
1660 case SAMPLING_RATE_352P8KHZ:
1661 sample_rate_val = 5;
1662 break;
1663 default:
1664 sample_rate_val = 3;
1665 break;
1666 }
1667 return sample_rate_val;
1668}
1669
1670static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1671 struct snd_ctl_elem_value *ucontrol)
1672{
1673 struct tdm_port port;
1674 int ret = tdm_get_port_idx(kcontrol, &port);
1675
1676 if (ret) {
1677 pr_err("%s: unsupported control: %s\n",
1678 __func__, kcontrol->id.name);
1679 } else {
1680 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1681 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1682
1683 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1684 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1685 ucontrol->value.enumerated.item[0]);
1686 }
1687 return ret;
1688}
1689
1690static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1691 struct snd_ctl_elem_value *ucontrol)
1692{
1693 struct tdm_port port;
1694 int ret = tdm_get_port_idx(kcontrol, &port);
1695
1696 if (ret) {
1697 pr_err("%s: unsupported control: %s\n",
1698 __func__, kcontrol->id.name);
1699 } else {
1700 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1701 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1702
1703 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1704 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1705 ucontrol->value.enumerated.item[0]);
1706 }
1707 return ret;
1708}
1709
1710static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1711 struct snd_ctl_elem_value *ucontrol)
1712{
1713 struct tdm_port port;
1714 int ret = tdm_get_port_idx(kcontrol, &port);
1715
1716 if (ret) {
1717 pr_err("%s: unsupported control: %s\n",
1718 __func__, kcontrol->id.name);
1719 } else {
1720 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1721 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1722
1723 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1724 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1725 ucontrol->value.enumerated.item[0]);
1726 }
1727 return ret;
1728}
1729
1730static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
1732{
1733 struct tdm_port port;
1734 int ret = tdm_get_port_idx(kcontrol, &port);
1735
1736 if (ret) {
1737 pr_err("%s: unsupported control: %s\n",
1738 __func__, kcontrol->id.name);
1739 } else {
1740 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1741 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1742
1743 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1744 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1745 ucontrol->value.enumerated.item[0]);
1746 }
1747 return ret;
1748}
1749
1750static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1751{
1752 int format = 0;
1753
1754 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1755 case 0:
1756 format = SNDRV_PCM_FORMAT_S16_LE;
1757 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1758 case 1:
1759 format = SNDRV_PCM_FORMAT_S24_LE;
1760 break;
1761 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1762 format = SNDRV_PCM_FORMAT_S32_LE;
1763 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1764 default:
1765 format = SNDRV_PCM_FORMAT_S16_LE;
1766 break;
1767 }
1768 return format;
1769}
1770
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1771static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1772{
1773 int value = 0;
1774
1775 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1776 case SNDRV_PCM_FORMAT_S16_LE:
1777 value = 0;
1778 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1779 case SNDRV_PCM_FORMAT_S24_LE:
1780 value = 1;
1781 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1782 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1783 value = 2;
1784 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1785 default:
1786 value = 0;
1787 break;
1788 }
1789 return value;
1790}
1791
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1792static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1793 struct snd_ctl_elem_value *ucontrol)
1794{
1795 struct tdm_port port;
1796 int ret = tdm_get_port_idx(kcontrol, &port);
1797
1798 if (ret) {
1799 pr_err("%s: unsupported control: %s\n",
1800 __func__, kcontrol->id.name);
1801 } else {
1802 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1803 tdm_rx_cfg[port.mode][port.channel].bit_format);
1804
1805 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1806 tdm_rx_cfg[port.mode][port.channel].bit_format,
1807 ucontrol->value.enumerated.item[0]);
1808 }
1809 return ret;
1810}
1811
1812static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1813 struct snd_ctl_elem_value *ucontrol)
1814{
1815 struct tdm_port port;
1816 int ret = tdm_get_port_idx(kcontrol, &port);
1817
1818 if (ret) {
1819 pr_err("%s: unsupported control: %s\n",
1820 __func__, kcontrol->id.name);
1821 } else {
1822 tdm_rx_cfg[port.mode][port.channel].bit_format =
1823 tdm_get_format(ucontrol->value.enumerated.item[0]);
1824
1825 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1826 tdm_rx_cfg[port.mode][port.channel].bit_format,
1827 ucontrol->value.enumerated.item[0]);
1828 }
1829 return ret;
1830}
1831
1832static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1833 struct snd_ctl_elem_value *ucontrol)
1834{
1835 struct tdm_port port;
1836 int ret = tdm_get_port_idx(kcontrol, &port);
1837
1838 if (ret) {
1839 pr_err("%s: unsupported control: %s\n",
1840 __func__, kcontrol->id.name);
1841 } else {
1842 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1843 tdm_tx_cfg[port.mode][port.channel].bit_format);
1844
1845 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1846 tdm_tx_cfg[port.mode][port.channel].bit_format,
1847 ucontrol->value.enumerated.item[0]);
1848 }
1849 return ret;
1850}
1851
1852static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1853 struct snd_ctl_elem_value *ucontrol)
1854{
1855 struct tdm_port port;
1856 int ret = tdm_get_port_idx(kcontrol, &port);
1857
1858 if (ret) {
1859 pr_err("%s: unsupported control: %s\n",
1860 __func__, kcontrol->id.name);
1861 } else {
1862 tdm_tx_cfg[port.mode][port.channel].bit_format =
1863 tdm_get_format(ucontrol->value.enumerated.item[0]);
1864
1865 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1866 tdm_tx_cfg[port.mode][port.channel].bit_format,
1867 ucontrol->value.enumerated.item[0]);
1868 }
1869 return ret;
1870}
1871
1872static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1873 struct snd_ctl_elem_value *ucontrol)
1874{
1875 struct tdm_port port;
1876 int ret = tdm_get_port_idx(kcontrol, &port);
1877
1878 if (ret) {
1879 pr_err("%s: unsupported control: %s\n",
1880 __func__, kcontrol->id.name);
1881 } else {
1882
1883 ucontrol->value.enumerated.item[0] =
1884 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1885
1886 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1887 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1888 ucontrol->value.enumerated.item[0]);
1889 }
1890 return ret;
1891}
1892
1893static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1894 struct snd_ctl_elem_value *ucontrol)
1895{
1896 struct tdm_port port;
1897 int ret = tdm_get_port_idx(kcontrol, &port);
1898
1899 if (ret) {
1900 pr_err("%s: unsupported control: %s\n",
1901 __func__, kcontrol->id.name);
1902 } else {
1903 tdm_rx_cfg[port.mode][port.channel].channels =
1904 ucontrol->value.enumerated.item[0] + 1;
1905
1906 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1907 tdm_rx_cfg[port.mode][port.channel].channels,
1908 ucontrol->value.enumerated.item[0] + 1);
1909 }
1910 return ret;
1911}
1912
1913static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1914 struct snd_ctl_elem_value *ucontrol)
1915{
1916 struct tdm_port port;
1917 int ret = tdm_get_port_idx(kcontrol, &port);
1918
1919 if (ret) {
1920 pr_err("%s: unsupported control: %s\n",
1921 __func__, kcontrol->id.name);
1922 } else {
1923 ucontrol->value.enumerated.item[0] =
1924 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1925
1926 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1927 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1928 ucontrol->value.enumerated.item[0]);
1929 }
1930 return ret;
1931}
1932
1933static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1934 struct snd_ctl_elem_value *ucontrol)
1935{
1936 struct tdm_port port;
1937 int ret = tdm_get_port_idx(kcontrol, &port);
1938
1939 if (ret) {
1940 pr_err("%s: unsupported control: %s\n",
1941 __func__, kcontrol->id.name);
1942 } else {
1943 tdm_tx_cfg[port.mode][port.channel].channels =
1944 ucontrol->value.enumerated.item[0] + 1;
1945
1946 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1947 tdm_tx_cfg[port.mode][port.channel].channels,
1948 ucontrol->value.enumerated.item[0] + 1);
1949 }
1950 return ret;
1951}
1952
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]1953static int tdm_slot_map_put(struct snd_kcontrol *kcontrol,
1954 struct snd_ctl_elem_value *ucontrol)
1955{
1956 int slot_index = 0;
1957 int interface = ucontrol->value.integer.value[0];
1958 int channel = ucontrol->value.integer.value[1];
1959 unsigned int offset_val = 0;
1960 unsigned int *slot_offset = NULL;
1961 struct tdm_dev_config *config = NULL;
1962
1963 if (interface < 0 || interface >= (TDM_INTERFACE_MAX * MAX_PATH)) {
1964 pr_err("%s: incorrect interface = %d\n", __func__, interface);
1965 return -EINVAL;
1966 }
1967 if (channel < 0 || channel >= TDM_PORT_MAX) {
1968 pr_err("%s: incorrect channel = %d\n", __func__, channel);
1969 return -EINVAL;
1970 }
1971
1972 pr_debug("%s: interface = %d, channel = %d\n", __func__,
1973 interface, channel);
1974
1975 config = ((struct tdm_dev_config *) tdm_cfg[interface / MAX_PATH]) +
1976 ((interface % MAX_PATH) * TDM_PORT_MAX) + channel;
1977 slot_offset = config->tdm_slot_offset;
1978
1979 for (slot_index = 0; slot_index < TDM_MAX_SLOTS; slot_index++) {
1980 offset_val = ucontrol->value.integer.value[MAX_PATH +
1981 slot_index];
1982 /* Offset value can only be 0, 4, 8, ..28 */
1983 if (offset_val % 4 == 0 && offset_val <= 28)
1984 slot_offset[slot_index] = offset_val;
1985 pr_debug("%s: slot offset[%d] = %d\n", __func__,
1986 slot_index, slot_offset[slot_index]);
1987 }
1988
1989 return 0;
1990}
1991
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1992static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1993{
1994 int idx = 0;
1995
1996 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1997 sizeof("PRIM_AUX_PCM"))) {
1998 idx = PRIM_AUX_PCM;
1999 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2000 sizeof("SEC_AUX_PCM"))) {
2001 idx = SEC_AUX_PCM;
2002 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2003 sizeof("TERT_AUX_PCM"))) {
2004 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2005 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2006 sizeof("QUAT_AUX_PCM"))) {
2007 idx = QUAT_AUX_PCM;
2008 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2009 sizeof("QUIN_AUX_PCM"))) {
2010 idx = QUIN_AUX_PCM;
2011 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
2012 sizeof("SEN_AUX_PCM"))) {
2013 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2014 } else {
2015 pr_err("%s: unsupported port: %s\n",
2016 __func__, kcontrol->id.name);
2017 idx = -EINVAL;
2018 }
2019
2020 return idx;
2021}
2022
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2023static int aux_pcm_get_sample_rate(int value)
2024{
2025 int sample_rate = 0;
2026
2027 switch (value) {
2028 case 1:
2029 sample_rate = SAMPLING_RATE_16KHZ;
2030 break;
2031 case 0:
2032 default:
2033 sample_rate = SAMPLING_RATE_8KHZ;
2034 break;
2035 }
2036 return sample_rate;
2037}
2038
2039static int aux_pcm_get_sample_rate_val(int sample_rate)
2040{
2041 int sample_rate_val = 0;
2042
2043 switch (sample_rate) {
2044 case SAMPLING_RATE_16KHZ:
2045 sample_rate_val = 1;
2046 break;
2047 case SAMPLING_RATE_8KHZ:
2048 default:
2049 sample_rate_val = 0;
2050 break;
2051 }
2052 return sample_rate_val;
2053}
2054
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2055static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2056{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2057 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2058
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2059 switch (value) {
2060 case 0:
2061 format = SNDRV_PCM_FORMAT_S16_LE;
2062 break;
2063 case 1:
2064 format = SNDRV_PCM_FORMAT_S24_LE;
2065 break;
2066 case 2:
2067 format = SNDRV_PCM_FORMAT_S24_3LE;
2068 break;
2069 case 3:
2070 format = SNDRV_PCM_FORMAT_S32_LE;
2071 break;
2072 default:
2073 format = SNDRV_PCM_FORMAT_S16_LE;
2074 break;
2075 }
2076 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2077}
2078
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2079static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2080{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2081 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2082
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2083 switch (format) {
2084 case SNDRV_PCM_FORMAT_S16_LE:
2085 value = 0;
2086 break;
2087 case SNDRV_PCM_FORMAT_S24_LE:
2088 value = 1;
2089 break;
2090 case SNDRV_PCM_FORMAT_S24_3LE:
2091 value = 2;
2092 break;
2093 case SNDRV_PCM_FORMAT_S32_LE:
2094 value = 3;
2095 break;
2096 default:
2097 value = 0;
2098 break;
2099 }
2100 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2101}
2102
2103static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2104 struct snd_ctl_elem_value *ucontrol)
2105{
2106 int idx = aux_pcm_get_port_idx(kcontrol);
2107
2108 if (idx < 0)
2109 return idx;
2110
2111 ucontrol->value.enumerated.item[0] =
2112 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2113
2114 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2115 idx, aux_pcm_rx_cfg[idx].sample_rate,
2116 ucontrol->value.enumerated.item[0]);
2117
2118 return 0;
2119}
2120
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2121static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2122 struct snd_ctl_elem_value *ucontrol)
2123{
2124 int idx = aux_pcm_get_port_idx(kcontrol);
2125
2126 if (idx < 0)
2127 return idx;
2128
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2129 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2130 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2131
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2132 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2133 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2134 ucontrol->value.enumerated.item[0]);
2135
2136 return 0;
2137}
2138
2139static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2140 struct snd_ctl_elem_value *ucontrol)
2141{
2142 int idx = aux_pcm_get_port_idx(kcontrol);
2143
2144 if (idx < 0)
2145 return idx;
2146
2147 ucontrol->value.enumerated.item[0] =
2148 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2149
2150 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2151 idx, aux_pcm_tx_cfg[idx].sample_rate,
2152 ucontrol->value.enumerated.item[0]);
2153
2154 return 0;
2155}
2156
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2157static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2158 struct snd_ctl_elem_value *ucontrol)
2159{
2160 int idx = aux_pcm_get_port_idx(kcontrol);
2161
2162 if (idx < 0)
2163 return idx;
2164
2165 aux_pcm_tx_cfg[idx].sample_rate =
2166 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2167
2168 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2169 idx, aux_pcm_tx_cfg[idx].sample_rate,
2170 ucontrol->value.enumerated.item[0]);
2171
2172 return 0;
2173}
2174
2175static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
2176 struct snd_ctl_elem_value *ucontrol)
2177{
2178 int idx = aux_pcm_get_port_idx(kcontrol);
2179
2180 if (idx < 0)
2181 return idx;
2182
2183 ucontrol->value.enumerated.item[0] =
2184 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
2185
2186 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2187 idx, aux_pcm_rx_cfg[idx].bit_format,
2188 ucontrol->value.enumerated.item[0]);
2189
2190 return 0;
2191}
2192
2193static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
2194 struct snd_ctl_elem_value *ucontrol)
2195{
2196 int idx = aux_pcm_get_port_idx(kcontrol);
2197
2198 if (idx < 0)
2199 return idx;
2200
2201 aux_pcm_rx_cfg[idx].bit_format =
2202 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2203
2204 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2205 idx, aux_pcm_rx_cfg[idx].bit_format,
2206 ucontrol->value.enumerated.item[0]);
2207
2208 return 0;
2209}
2210
2211static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
2212 struct snd_ctl_elem_value *ucontrol)
2213{
2214 int idx = aux_pcm_get_port_idx(kcontrol);
2215
2216 if (idx < 0)
2217 return idx;
2218
2219 ucontrol->value.enumerated.item[0] =
2220 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
2221
2222 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2223 idx, aux_pcm_tx_cfg[idx].bit_format,
2224 ucontrol->value.enumerated.item[0]);
2225
2226 return 0;
2227}
2228
2229static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2230 struct snd_ctl_elem_value *ucontrol)
2231{
2232 int idx = aux_pcm_get_port_idx(kcontrol);
2233
2234 if (idx < 0)
2235 return idx;
2236
2237 aux_pcm_tx_cfg[idx].bit_format =
2238 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2239
2240 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2241 idx, aux_pcm_tx_cfg[idx].bit_format,
2242 ucontrol->value.enumerated.item[0]);
2243
2244 return 0;
2245}
2246
2247static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2248{
2249 int idx = 0;
2250
2251 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2252 sizeof("PRIM_MI2S_RX"))) {
2253 idx = PRIM_MI2S;
2254 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2255 sizeof("SEC_MI2S_RX"))) {
2256 idx = SEC_MI2S;
2257 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2258 sizeof("TERT_MI2S_RX"))) {
2259 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2260 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2261 sizeof("QUAT_MI2S_RX"))) {
2262 idx = QUAT_MI2S;
2263 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2264 sizeof("QUIN_MI2S_RX"))) {
2265 idx = QUIN_MI2S;
2266 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2267 sizeof("SEN_MI2S_RX"))) {
2268 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2269 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2270 sizeof("PRIM_MI2S_TX"))) {
2271 idx = PRIM_MI2S;
2272 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2273 sizeof("SEC_MI2S_TX"))) {
2274 idx = SEC_MI2S;
2275 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2276 sizeof("TERT_MI2S_TX"))) {
2277 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2278 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2279 sizeof("QUAT_MI2S_TX"))) {
2280 idx = QUAT_MI2S;
2281 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2282 sizeof("QUIN_MI2S_TX"))) {
2283 idx = QUIN_MI2S;
2284 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2285 sizeof("SEN_MI2S_TX"))) {
2286 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2287 } else {
2288 pr_err("%s: unsupported channel: %s\n",
2289 __func__, kcontrol->id.name);
2290 idx = -EINVAL;
2291 }
2292
2293 return idx;
2294}
2295
2296static int mi2s_get_sample_rate(int value)
2297{
2298 int sample_rate = 0;
2299
2300 switch (value) {
2301 case 0:
2302 sample_rate = SAMPLING_RATE_8KHZ;
2303 break;
2304 case 1:
2305 sample_rate = SAMPLING_RATE_11P025KHZ;
2306 break;
2307 case 2:
2308 sample_rate = SAMPLING_RATE_16KHZ;
2309 break;
2310 case 3:
2311 sample_rate = SAMPLING_RATE_22P05KHZ;
2312 break;
2313 case 4:
2314 sample_rate = SAMPLING_RATE_32KHZ;
2315 break;
2316 case 5:
2317 sample_rate = SAMPLING_RATE_44P1KHZ;
2318 break;
2319 case 6:
2320 sample_rate = SAMPLING_RATE_48KHZ;
2321 break;
2322 case 7:
2323 sample_rate = SAMPLING_RATE_96KHZ;
2324 break;
2325 case 8:
2326 sample_rate = SAMPLING_RATE_192KHZ;
2327 break;
2328 default:
2329 sample_rate = SAMPLING_RATE_48KHZ;
2330 break;
2331 }
2332 return sample_rate;
2333}
2334
2335static int mi2s_get_sample_rate_val(int sample_rate)
2336{
2337 int sample_rate_val = 0;
2338
2339 switch (sample_rate) {
2340 case SAMPLING_RATE_8KHZ:
2341 sample_rate_val = 0;
2342 break;
2343 case SAMPLING_RATE_11P025KHZ:
2344 sample_rate_val = 1;
2345 break;
2346 case SAMPLING_RATE_16KHZ:
2347 sample_rate_val = 2;
2348 break;
2349 case SAMPLING_RATE_22P05KHZ:
2350 sample_rate_val = 3;
2351 break;
2352 case SAMPLING_RATE_32KHZ:
2353 sample_rate_val = 4;
2354 break;
2355 case SAMPLING_RATE_44P1KHZ:
2356 sample_rate_val = 5;
2357 break;
2358 case SAMPLING_RATE_48KHZ:
2359 sample_rate_val = 6;
2360 break;
2361 case SAMPLING_RATE_96KHZ:
2362 sample_rate_val = 7;
2363 break;
2364 case SAMPLING_RATE_192KHZ:
2365 sample_rate_val = 8;
2366 break;
2367 default:
2368 sample_rate_val = 6;
2369 break;
2370 }
2371 return sample_rate_val;
2372}
2373
2374static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2375 struct snd_ctl_elem_value *ucontrol)
2376{
2377 int idx = mi2s_get_port_idx(kcontrol);
2378
2379 if (idx < 0)
2380 return idx;
2381
2382 ucontrol->value.enumerated.item[0] =
2383 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2384
2385 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2386 idx, mi2s_rx_cfg[idx].sample_rate,
2387 ucontrol->value.enumerated.item[0]);
2388
2389 return 0;
2390}
2391
2392static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2393 struct snd_ctl_elem_value *ucontrol)
2394{
2395 int idx = mi2s_get_port_idx(kcontrol);
2396
2397 if (idx < 0)
2398 return idx;
2399
2400 mi2s_rx_cfg[idx].sample_rate =
2401 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2402
2403 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2404 idx, mi2s_rx_cfg[idx].sample_rate,
2405 ucontrol->value.enumerated.item[0]);
2406
2407 return 0;
2408}
2409
2410static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2411 struct snd_ctl_elem_value *ucontrol)
2412{
2413 int idx = mi2s_get_port_idx(kcontrol);
2414
2415 if (idx < 0)
2416 return idx;
2417
2418 ucontrol->value.enumerated.item[0] =
2419 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2420
2421 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2422 idx, mi2s_tx_cfg[idx].sample_rate,
2423 ucontrol->value.enumerated.item[0]);
2424
2425 return 0;
2426}
2427
2428static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2429 struct snd_ctl_elem_value *ucontrol)
2430{
2431 int idx = mi2s_get_port_idx(kcontrol);
2432
2433 if (idx < 0)
2434 return idx;
2435
2436 mi2s_tx_cfg[idx].sample_rate =
2437 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2438
2439 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2440 idx, mi2s_tx_cfg[idx].sample_rate,
2441 ucontrol->value.enumerated.item[0]);
2442
2443 return 0;
2444}
2445
2446static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2447 struct snd_ctl_elem_value *ucontrol)
2448{
2449 int idx = mi2s_get_port_idx(kcontrol);
2450
2451 if (idx < 0)
2452 return idx;
2453
2454 ucontrol->value.enumerated.item[0] =
2455 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2456
2457 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2458 idx, mi2s_rx_cfg[idx].bit_format,
2459 ucontrol->value.enumerated.item[0]);
2460
2461 return 0;
2462}
2463
2464static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2465 struct snd_ctl_elem_value *ucontrol)
2466{
2467 int idx = mi2s_get_port_idx(kcontrol);
2468
2469 if (idx < 0)
2470 return idx;
2471
2472 mi2s_rx_cfg[idx].bit_format =
2473 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2474
2475 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2476 idx, mi2s_rx_cfg[idx].bit_format,
2477 ucontrol->value.enumerated.item[0]);
2478
2479 return 0;
2480}
2481
2482static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2483 struct snd_ctl_elem_value *ucontrol)
2484{
2485 int idx = mi2s_get_port_idx(kcontrol);
2486
2487 if (idx < 0)
2488 return idx;
2489
2490 ucontrol->value.enumerated.item[0] =
2491 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2492
2493 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2494 idx, mi2s_tx_cfg[idx].bit_format,
2495 ucontrol->value.enumerated.item[0]);
2496
2497 return 0;
2498}
2499
2500static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2501 struct snd_ctl_elem_value *ucontrol)
2502{
2503 int idx = mi2s_get_port_idx(kcontrol);
2504
2505 if (idx < 0)
2506 return idx;
2507
2508 mi2s_tx_cfg[idx].bit_format =
2509 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2510
2511 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2512 idx, mi2s_tx_cfg[idx].bit_format,
2513 ucontrol->value.enumerated.item[0]);
2514
2515 return 0;
2516}
2517static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2518 struct snd_ctl_elem_value *ucontrol)
2519{
2520 int idx = mi2s_get_port_idx(kcontrol);
2521
2522 if (idx < 0)
2523 return idx;
2524
2525 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2526 idx, mi2s_rx_cfg[idx].channels);
2527 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2528
2529 return 0;
2530}
2531
2532static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2533 struct snd_ctl_elem_value *ucontrol)
2534{
2535 int idx = mi2s_get_port_idx(kcontrol);
2536
2537 if (idx < 0)
2538 return idx;
2539
2540 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2541 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2542 idx, mi2s_rx_cfg[idx].channels);
2543
2544 return 1;
2545}
2546
2547static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2548 struct snd_ctl_elem_value *ucontrol)
2549{
2550 int idx = mi2s_get_port_idx(kcontrol);
2551
2552 if (idx < 0)
2553 return idx;
2554
2555 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2556 idx, mi2s_tx_cfg[idx].channels);
2557 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2558
2559 return 0;
2560}
2561
2562static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2563 struct snd_ctl_elem_value *ucontrol)
2564{
2565 int idx = mi2s_get_port_idx(kcontrol);
2566
2567 if (idx < 0)
2568 return idx;
2569
2570 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2571 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2572 idx, mi2s_tx_cfg[idx].channels);
2573
2574 return 1;
2575}
2576
2577static int msm_get_port_id(int be_id)
2578{
2579 int afe_port_id = 0;
2580
2581 switch (be_id) {
2582 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2583 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2584 break;
2585 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2586 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2587 break;
2588 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2589 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2590 break;
2591 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2592 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2593 break;
2594 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2595 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2596 break;
2597 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2598 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2599 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2600 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2601 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2602 break;
2603 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2604 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2605 break;
2606 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2607 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2608 break;
2609 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2610 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2611 break;
2612 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2613 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2614 break;
2615 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2616 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2617 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2618 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2619 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2620 break;
2621 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2622 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2623 break;
2624 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2625 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2626 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2627 default:
2628 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2629 afe_port_id = -EINVAL;
2630 }
2631
2632 return afe_port_id;
2633}
2634
2635static u32 get_mi2s_bits_per_sample(u32 bit_format)
2636{
2637 u32 bit_per_sample = 0;
2638
2639 switch (bit_format) {
2640 case SNDRV_PCM_FORMAT_S32_LE:
2641 case SNDRV_PCM_FORMAT_S24_3LE:
2642 case SNDRV_PCM_FORMAT_S24_LE:
2643 bit_per_sample = 32;
2644 break;
2645 case SNDRV_PCM_FORMAT_S16_LE:
2646 default:
2647 bit_per_sample = 16;
2648 break;
2649 }
2650
2651 return bit_per_sample;
2652}
2653
2654static void update_mi2s_clk_val(int dai_id, int stream)
2655{
2656 u32 bit_per_sample = 0;
2657
2658 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2659 bit_per_sample =
2660 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2661 mi2s_clk[dai_id].clk_freq_in_hz =
2662 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2663 } else {
2664 bit_per_sample =
2665 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2666 mi2s_clk[dai_id].clk_freq_in_hz =
2667 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2668 }
2669}
2670
2671static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2672{
2673 int ret = 0;
2674 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2675 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2676 int port_id = 0;
2677 int index = cpu_dai->id;
2678
2679 port_id = msm_get_port_id(rtd->dai_link->id);
2680 if (port_id < 0) {
2681 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2682 ret = port_id;
2683 goto err;
2684 }
2685
2686 if (enable) {
2687 update_mi2s_clk_val(index, substream->stream);
2688 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2689 mi2s_clk[index].clk_freq_in_hz);
2690 }
2691
2692 mi2s_clk[index].enable = enable;
2693 ret = afe_set_lpass_clock_v2(port_id,
2694 &mi2s_clk[index]);
2695 if (ret < 0) {
2696 dev_err(rtd->card->dev,
2697 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2698 __func__, port_id, ret);
2699 goto err;
2700 }
2701
2702err:
2703 return ret;
2704}
2705
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2706static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2707{
2708 int idx = 0;
2709
2710 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2711 sizeof("WSA_CDC_DMA_RX_0")))
2712 idx = WSA_CDC_DMA_RX_0;
2713 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2714 sizeof("WSA_CDC_DMA_RX_0")))
2715 idx = WSA_CDC_DMA_RX_1;
2716 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2717 sizeof("RX_CDC_DMA_RX_0")))
2718 idx = RX_CDC_DMA_RX_0;
2719 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2720 sizeof("RX_CDC_DMA_RX_1")))
2721 idx = RX_CDC_DMA_RX_1;
2722 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2723 sizeof("RX_CDC_DMA_RX_2")))
2724 idx = RX_CDC_DMA_RX_2;
2725 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2726 sizeof("RX_CDC_DMA_RX_3")))
2727 idx = RX_CDC_DMA_RX_3;
2728 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2729 sizeof("RX_CDC_DMA_RX_5")))
2730 idx = RX_CDC_DMA_RX_5;
2731 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2732 sizeof("WSA_CDC_DMA_TX_0")))
2733 idx = WSA_CDC_DMA_TX_0;
2734 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2735 sizeof("WSA_CDC_DMA_TX_1")))
2736 idx = WSA_CDC_DMA_TX_1;
2737 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2738 sizeof("WSA_CDC_DMA_TX_2")))
2739 idx = WSA_CDC_DMA_TX_2;
2740 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2741 sizeof("TX_CDC_DMA_TX_0")))
2742 idx = TX_CDC_DMA_TX_0;
2743 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2744 sizeof("TX_CDC_DMA_TX_3")))
2745 idx = TX_CDC_DMA_TX_3;
2746 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2747 sizeof("TX_CDC_DMA_TX_4")))
2748 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2749 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2750 sizeof("VA_CDC_DMA_TX_0")))
2751 idx = VA_CDC_DMA_TX_0;
2752 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2753 sizeof("VA_CDC_DMA_TX_1")))
2754 idx = VA_CDC_DMA_TX_1;
2755 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2756 sizeof("VA_CDC_DMA_TX_2")))
2757 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2758 else {
2759 pr_err("%s: unsupported channel: %s\n",
2760 __func__, kcontrol->id.name);
2761 return -EINVAL;
2762 }
2763
2764 return idx;
2765}
2766
2767static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2768 struct snd_ctl_elem_value *ucontrol)
2769{
2770 int ch_num = cdc_dma_get_port_idx(kcontrol);
2771
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2772 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2773 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2774 return ch_num;
2775 }
2776
2777 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2778 cdc_dma_rx_cfg[ch_num].channels - 1);
2779 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2780 return 0;
2781}
2782
2783static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2784 struct snd_ctl_elem_value *ucontrol)
2785{
2786 int ch_num = cdc_dma_get_port_idx(kcontrol);
2787
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2788 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2789 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2790 return ch_num;
2791 }
2792
2793 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2794
2795 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2796 cdc_dma_rx_cfg[ch_num].channels);
2797 return 1;
2798}
2799
2800static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2801 struct snd_ctl_elem_value *ucontrol)
2802{
2803 int ch_num = cdc_dma_get_port_idx(kcontrol);
2804
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2805 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2806 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2807 return ch_num;
2808 }
2809
2810 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2811 case SNDRV_PCM_FORMAT_S32_LE:
2812 ucontrol->value.integer.value[0] = 3;
2813 break;
2814 case SNDRV_PCM_FORMAT_S24_3LE:
2815 ucontrol->value.integer.value[0] = 2;
2816 break;
2817 case SNDRV_PCM_FORMAT_S24_LE:
2818 ucontrol->value.integer.value[0] = 1;
2819 break;
2820 case SNDRV_PCM_FORMAT_S16_LE:
2821 default:
2822 ucontrol->value.integer.value[0] = 0;
2823 break;
2824 }
2825
2826 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2827 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2828 ucontrol->value.integer.value[0]);
2829 return 0;
2830}
2831
2832static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2833 struct snd_ctl_elem_value *ucontrol)
2834{
2835 int rc = 0;
2836 int ch_num = cdc_dma_get_port_idx(kcontrol);
2837
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2838 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2839 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2840 return ch_num;
2841 }
2842
2843 switch (ucontrol->value.integer.value[0]) {
2844 case 3:
2845 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2846 break;
2847 case 2:
2848 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2849 break;
2850 case 1:
2851 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2852 break;
2853 case 0:
2854 default:
2855 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2856 break;
2857 }
2858 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2859 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2860 ucontrol->value.integer.value[0]);
2861
2862 return rc;
2863}
2864
2865
2866static int cdc_dma_get_sample_rate_val(int sample_rate)
2867{
2868 int sample_rate_val = 0;
2869
2870 switch (sample_rate) {
2871 case SAMPLING_RATE_8KHZ:
2872 sample_rate_val = 0;
2873 break;
2874 case SAMPLING_RATE_11P025KHZ:
2875 sample_rate_val = 1;
2876 break;
2877 case SAMPLING_RATE_16KHZ:
2878 sample_rate_val = 2;
2879 break;
2880 case SAMPLING_RATE_22P05KHZ:
2881 sample_rate_val = 3;
2882 break;
2883 case SAMPLING_RATE_32KHZ:
2884 sample_rate_val = 4;
2885 break;
2886 case SAMPLING_RATE_44P1KHZ:
2887 sample_rate_val = 5;
2888 break;
2889 case SAMPLING_RATE_48KHZ:
2890 sample_rate_val = 6;
2891 break;
2892 case SAMPLING_RATE_88P2KHZ:
2893 sample_rate_val = 7;
2894 break;
2895 case SAMPLING_RATE_96KHZ:
2896 sample_rate_val = 8;
2897 break;
2898 case SAMPLING_RATE_176P4KHZ:
2899 sample_rate_val = 9;
2900 break;
2901 case SAMPLING_RATE_192KHZ:
2902 sample_rate_val = 10;
2903 break;
2904 case SAMPLING_RATE_352P8KHZ:
2905 sample_rate_val = 11;
2906 break;
2907 case SAMPLING_RATE_384KHZ:
2908 sample_rate_val = 12;
2909 break;
2910 default:
2911 sample_rate_val = 6;
2912 break;
2913 }
2914 return sample_rate_val;
2915}
2916
2917static int cdc_dma_get_sample_rate(int value)
2918{
2919 int sample_rate = 0;
2920
2921 switch (value) {
2922 case 0:
2923 sample_rate = SAMPLING_RATE_8KHZ;
2924 break;
2925 case 1:
2926 sample_rate = SAMPLING_RATE_11P025KHZ;
2927 break;
2928 case 2:
2929 sample_rate = SAMPLING_RATE_16KHZ;
2930 break;
2931 case 3:
2932 sample_rate = SAMPLING_RATE_22P05KHZ;
2933 break;
2934 case 4:
2935 sample_rate = SAMPLING_RATE_32KHZ;
2936 break;
2937 case 5:
2938 sample_rate = SAMPLING_RATE_44P1KHZ;
2939 break;
2940 case 6:
2941 sample_rate = SAMPLING_RATE_48KHZ;
2942 break;
2943 case 7:
2944 sample_rate = SAMPLING_RATE_88P2KHZ;
2945 break;
2946 case 8:
2947 sample_rate = SAMPLING_RATE_96KHZ;
2948 break;
2949 case 9:
2950 sample_rate = SAMPLING_RATE_176P4KHZ;
2951 break;
2952 case 10:
2953 sample_rate = SAMPLING_RATE_192KHZ;
2954 break;
2955 case 11:
2956 sample_rate = SAMPLING_RATE_352P8KHZ;
2957 break;
2958 case 12:
2959 sample_rate = SAMPLING_RATE_384KHZ;
2960 break;
2961 default:
2962 sample_rate = SAMPLING_RATE_48KHZ;
2963 break;
2964 }
2965 return sample_rate;
2966}
2967
2968static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2969 struct snd_ctl_elem_value *ucontrol)
2970{
2971 int ch_num = cdc_dma_get_port_idx(kcontrol);
2972
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2973 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2974 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2975 return ch_num;
2976 }
2977
2978 ucontrol->value.enumerated.item[0] =
2979 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2980
2981 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2982 cdc_dma_rx_cfg[ch_num].sample_rate);
2983 return 0;
2984}
2985
2986static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2987 struct snd_ctl_elem_value *ucontrol)
2988{
2989 int ch_num = cdc_dma_get_port_idx(kcontrol);
2990
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2991 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2992 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2993 return ch_num;
2994 }
2995
2996 cdc_dma_rx_cfg[ch_num].sample_rate =
2997 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2998
2999
3000 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
3001 __func__, ucontrol->value.enumerated.item[0],
3002 cdc_dma_rx_cfg[ch_num].sample_rate);
3003 return 0;
3004}
3005
3006static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
3007 struct snd_ctl_elem_value *ucontrol)
3008{
3009 int ch_num = cdc_dma_get_port_idx(kcontrol);
3010
3011 if (ch_num < 0) {
3012 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3013 return ch_num;
3014 }
3015
3016 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3017 cdc_dma_tx_cfg[ch_num].channels);
3018 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
3019 return 0;
3020}
3021
3022static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
3023 struct snd_ctl_elem_value *ucontrol)
3024{
3025 int ch_num = cdc_dma_get_port_idx(kcontrol);
3026
3027 if (ch_num < 0) {
3028 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3029 return ch_num;
3030 }
3031
3032 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
3033
3034 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
3035 cdc_dma_tx_cfg[ch_num].channels);
3036 return 1;
3037}
3038
3039static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3040 struct snd_ctl_elem_value *ucontrol)
3041{
3042 int sample_rate_val;
3043 int ch_num = cdc_dma_get_port_idx(kcontrol);
3044
3045 if (ch_num < 0) {
3046 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3047 return ch_num;
3048 }
3049
3050 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
3051 case SAMPLING_RATE_384KHZ:
3052 sample_rate_val = 12;
3053 break;
3054 case SAMPLING_RATE_352P8KHZ:
3055 sample_rate_val = 11;
3056 break;
3057 case SAMPLING_RATE_192KHZ:
3058 sample_rate_val = 10;
3059 break;
3060 case SAMPLING_RATE_176P4KHZ:
3061 sample_rate_val = 9;
3062 break;
3063 case SAMPLING_RATE_96KHZ:
3064 sample_rate_val = 8;
3065 break;
3066 case SAMPLING_RATE_88P2KHZ:
3067 sample_rate_val = 7;
3068 break;
3069 case SAMPLING_RATE_48KHZ:
3070 sample_rate_val = 6;
3071 break;
3072 case SAMPLING_RATE_44P1KHZ:
3073 sample_rate_val = 5;
3074 break;
3075 case SAMPLING_RATE_32KHZ:
3076 sample_rate_val = 4;
3077 break;
3078 case SAMPLING_RATE_22P05KHZ:
3079 sample_rate_val = 3;
3080 break;
3081 case SAMPLING_RATE_16KHZ:
3082 sample_rate_val = 2;
3083 break;
3084 case SAMPLING_RATE_11P025KHZ:
3085 sample_rate_val = 1;
3086 break;
3087 case SAMPLING_RATE_8KHZ:
3088 sample_rate_val = 0;
3089 break;
3090 default:
3091 sample_rate_val = 6;
3092 break;
3093 }
3094
3095 ucontrol->value.integer.value[0] = sample_rate_val;
3096 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
3097 cdc_dma_tx_cfg[ch_num].sample_rate);
3098 return 0;
3099}
3100
3101static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3102 struct snd_ctl_elem_value *ucontrol)
3103{
3104 int ch_num = cdc_dma_get_port_idx(kcontrol);
3105
3106 if (ch_num < 0) {
3107 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3108 return ch_num;
3109 }
3110
3111 switch (ucontrol->value.integer.value[0]) {
3112 case 12:
3113 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
3114 break;
3115 case 11:
3116 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
3117 break;
3118 case 10:
3119 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
3120 break;
3121 case 9:
3122 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
3123 break;
3124 case 8:
3125 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
3126 break;
3127 case 7:
3128 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
3129 break;
3130 case 6:
3131 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3132 break;
3133 case 5:
3134 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
3135 break;
3136 case 4:
3137 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
3138 break;
3139 case 3:
3140 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
3141 break;
3142 case 2:
3143 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
3144 break;
3145 case 1:
3146 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
3147 break;
3148 case 0:
3149 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
3150 break;
3151 default:
3152 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
3153 break;
3154 }
3155
3156 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
3157 __func__, ucontrol->value.integer.value[0],
3158 cdc_dma_tx_cfg[ch_num].sample_rate);
3159 return 0;
3160}
3161
3162static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
3163 struct snd_ctl_elem_value *ucontrol)
3164{
3165 int ch_num = cdc_dma_get_port_idx(kcontrol);
3166
3167 if (ch_num < 0) {
3168 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3169 return ch_num;
3170 }
3171
3172 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
3173 case SNDRV_PCM_FORMAT_S32_LE:
3174 ucontrol->value.integer.value[0] = 3;
3175 break;
3176 case SNDRV_PCM_FORMAT_S24_3LE:
3177 ucontrol->value.integer.value[0] = 2;
3178 break;
3179 case SNDRV_PCM_FORMAT_S24_LE:
3180 ucontrol->value.integer.value[0] = 1;
3181 break;
3182 case SNDRV_PCM_FORMAT_S16_LE:
3183 default:
3184 ucontrol->value.integer.value[0] = 0;
3185 break;
3186 }
3187
3188 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3189 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3190 ucontrol->value.integer.value[0]);
3191 return 0;
3192}
3193
3194static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
3195 struct snd_ctl_elem_value *ucontrol)
3196{
3197 int rc = 0;
3198 int ch_num = cdc_dma_get_port_idx(kcontrol);
3199
3200 if (ch_num < 0) {
3201 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
3202 return ch_num;
3203 }
3204
3205 switch (ucontrol->value.integer.value[0]) {
3206 case 3:
3207 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
3208 break;
3209 case 2:
3210 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
3211 break;
3212 case 1:
3213 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
3214 break;
3215 case 0:
3216 default:
3217 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
3218 break;
3219 }
3220 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
3221 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
3222 ucontrol->value.integer.value[0]);
3223
3224 return rc;
3225}
3226
3227static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3228{
3229 int idx = 0;
3230
3231 switch (be_id) {
3232 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3233 idx = WSA_CDC_DMA_RX_0;
3234 break;
3235 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3236 idx = WSA_CDC_DMA_TX_0;
3237 break;
3238 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3239 idx = WSA_CDC_DMA_RX_1;
3240 break;
3241 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3242 idx = WSA_CDC_DMA_TX_1;
3243 break;
3244 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3245 idx = WSA_CDC_DMA_TX_2;
3246 break;
3247 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3248 idx = RX_CDC_DMA_RX_0;
3249 break;
3250 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3251 idx = RX_CDC_DMA_RX_1;
3252 break;
3253 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3254 idx = RX_CDC_DMA_RX_2;
3255 break;
3256 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3257 idx = RX_CDC_DMA_RX_3;
3258 break;
3259 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3260 idx = RX_CDC_DMA_RX_5;
3261 break;
3262 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3263 idx = TX_CDC_DMA_TX_0;
3264 break;
3265 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3266 idx = TX_CDC_DMA_TX_3;
3267 break;
3268 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3269 idx = TX_CDC_DMA_TX_4;
3270 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3271 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3272 idx = VA_CDC_DMA_TX_0;
3273 break;
3274 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3275 idx = VA_CDC_DMA_TX_1;
3276 break;
3277 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3278 idx = VA_CDC_DMA_TX_2;
3279 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3280 default:
3281 idx = RX_CDC_DMA_RX_0;
3282 break;
3283 }
3284
3285 return idx;
3286}
3287
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3288static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3289 struct snd_ctl_elem_value *ucontrol)
3290{
3291 /*
3292 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3293 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3294 * value.
3295 */
3296 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3297 case SAMPLING_RATE_96KHZ:
3298 ucontrol->value.integer.value[0] = 5;
3299 break;
3300 case SAMPLING_RATE_88P2KHZ:
3301 ucontrol->value.integer.value[0] = 4;
3302 break;
3303 case SAMPLING_RATE_48KHZ:
3304 ucontrol->value.integer.value[0] = 3;
3305 break;
3306 case SAMPLING_RATE_44P1KHZ:
3307 ucontrol->value.integer.value[0] = 2;
3308 break;
3309 case SAMPLING_RATE_16KHZ:
3310 ucontrol->value.integer.value[0] = 1;
3311 break;
3312 case SAMPLING_RATE_8KHZ:
3313 default:
3314 ucontrol->value.integer.value[0] = 0;
3315 break;
3316 }
3317 pr_debug("%s: sample rate = %d\n", __func__,
3318 slim_rx_cfg[SLIM_RX_7].sample_rate);
3319
3320 return 0;
3321}
3322
3323static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3324 struct snd_ctl_elem_value *ucontrol)
3325{
3326 switch (ucontrol->value.integer.value[0]) {
3327 case 1:
3328 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3329 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3330 break;
3331 case 2:
3332 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3333 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3334 break;
3335 case 3:
3336 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3337 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3338 break;
3339 case 4:
3340 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3341 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3342 break;
3343 case 5:
3344 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3345 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3346 break;
3347 case 0:
3348 default:
3349 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3350 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3351 break;
3352 }
3353 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3354 __func__,
3355 slim_rx_cfg[SLIM_RX_7].sample_rate,
3356 slim_tx_cfg[SLIM_TX_7].sample_rate,
3357 ucontrol->value.enumerated.item[0]);
3358
3359 return 0;
3360}
3361
3362static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3363 struct snd_ctl_elem_value *ucontrol)
3364{
3365 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3366 case SAMPLING_RATE_96KHZ:
3367 ucontrol->value.integer.value[0] = 5;
3368 break;
3369 case SAMPLING_RATE_88P2KHZ:
3370 ucontrol->value.integer.value[0] = 4;
3371 break;
3372 case SAMPLING_RATE_48KHZ:
3373 ucontrol->value.integer.value[0] = 3;
3374 break;
3375 case SAMPLING_RATE_44P1KHZ:
3376 ucontrol->value.integer.value[0] = 2;
3377 break;
3378 case SAMPLING_RATE_16KHZ:
3379 ucontrol->value.integer.value[0] = 1;
3380 break;
3381 case SAMPLING_RATE_8KHZ:
3382 default:
3383 ucontrol->value.integer.value[0] = 0;
3384 break;
3385 }
3386 pr_debug("%s: sample rate rx = %d\n", __func__,
3387 slim_rx_cfg[SLIM_RX_7].sample_rate);
3388
3389 return 0;
3390}
3391
3392static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3393 struct snd_ctl_elem_value *ucontrol)
3394{
3395 switch (ucontrol->value.integer.value[0]) {
3396 case 1:
3397 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3398 break;
3399 case 2:
3400 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3401 break;
3402 case 3:
3403 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3404 break;
3405 case 4:
3406 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3407 break;
3408 case 5:
3409 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3410 break;
3411 case 0:
3412 default:
3413 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3414 break;
3415 }
3416 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3417 __func__,
3418 slim_rx_cfg[SLIM_RX_7].sample_rate,
3419 ucontrol->value.enumerated.item[0]);
3420
3421 return 0;
3422}
3423
3424static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3425 struct snd_ctl_elem_value *ucontrol)
3426{
3427 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3428 case SAMPLING_RATE_96KHZ:
3429 ucontrol->value.integer.value[0] = 5;
3430 break;
3431 case SAMPLING_RATE_88P2KHZ:
3432 ucontrol->value.integer.value[0] = 4;
3433 break;
3434 case SAMPLING_RATE_48KHZ:
3435 ucontrol->value.integer.value[0] = 3;
3436 break;
3437 case SAMPLING_RATE_44P1KHZ:
3438 ucontrol->value.integer.value[0] = 2;
3439 break;
3440 case SAMPLING_RATE_16KHZ:
3441 ucontrol->value.integer.value[0] = 1;
3442 break;
3443 case SAMPLING_RATE_8KHZ:
3444 default:
3445 ucontrol->value.integer.value[0] = 0;
3446 break;
3447 }
3448 pr_debug("%s: sample rate tx = %d\n", __func__,
3449 slim_tx_cfg[SLIM_TX_7].sample_rate);
3450
3451 return 0;
3452}
3453
3454static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3455 struct snd_ctl_elem_value *ucontrol)
3456{
3457 switch (ucontrol->value.integer.value[0]) {
3458 case 1:
3459 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3460 break;
3461 case 2:
3462 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3463 break;
3464 case 3:
3465 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3466 break;
3467 case 4:
3468 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3469 break;
3470 case 5:
3471 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3472 break;
3473 case 0:
3474 default:
3475 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3476 break;
3477 }
3478 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3479 __func__,
3480 slim_tx_cfg[SLIM_TX_7].sample_rate,
3481 ucontrol->value.enumerated.item[0]);
3482
3483 return 0;
3484}
3485
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3486static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3487 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3488 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3489 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3490 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3491 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3492 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3493 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3494 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3495 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3496 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3497 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3498 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3499 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3500 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3501 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3502 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3503 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3504 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3505 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3506 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3507 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3508 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3509 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3510 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3511 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3512 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3513 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3514 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3515 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3516 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3517 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3518 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3519 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3520 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3521 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3522 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3523 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3524 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3525 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3526 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3527 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3528 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3529 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3530 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3531 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3532 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3533 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3534 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3535 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3536 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3537 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3538 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3539 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3540 wsa_cdc_dma_rx_0_sample_rate,
3541 cdc_dma_rx_sample_rate_get,
3542 cdc_dma_rx_sample_rate_put),
3543 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3544 wsa_cdc_dma_rx_1_sample_rate,
3545 cdc_dma_rx_sample_rate_get,
3546 cdc_dma_rx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3547 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3548 wsa_cdc_dma_tx_0_sample_rate,
3549 cdc_dma_tx_sample_rate_get,
3550 cdc_dma_tx_sample_rate_put),
3551 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3552 wsa_cdc_dma_tx_1_sample_rate,
3553 cdc_dma_tx_sample_rate_get,
3554 cdc_dma_tx_sample_rate_put),
3555 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3556 wsa_cdc_dma_tx_2_sample_rate,
3557 cdc_dma_tx_sample_rate_get,
3558 cdc_dma_tx_sample_rate_put),
3559 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3560 tx_cdc_dma_tx_0_sample_rate,
3561 cdc_dma_tx_sample_rate_get,
3562 cdc_dma_tx_sample_rate_put),
3563 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3564 tx_cdc_dma_tx_3_sample_rate,
3565 cdc_dma_tx_sample_rate_get,
3566 cdc_dma_tx_sample_rate_put),
3567 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3568 tx_cdc_dma_tx_4_sample_rate,
3569 cdc_dma_tx_sample_rate_get,
3570 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3571 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3572 va_cdc_dma_tx_0_sample_rate,
3573 cdc_dma_tx_sample_rate_get,
3574 cdc_dma_tx_sample_rate_put),
3575 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3576 va_cdc_dma_tx_1_sample_rate,
3577 cdc_dma_tx_sample_rate_get,
3578 cdc_dma_tx_sample_rate_put),
3579 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3580 va_cdc_dma_tx_2_sample_rate,
3581 cdc_dma_tx_sample_rate_get,
3582 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3583};
3584
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]3585static const struct snd_kcontrol_new msm_int_wcd9380_snd_controls[] = {
3586 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc80_dma_rx_0_format,
3587 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3588 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc80_dma_rx_1_format,
3589 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3590 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc80_dma_rx_2_format,
3591 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3592 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc80_dma_rx_3_format,
3593 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3594 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc80_dma_rx_5_format,
3595 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3596 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3597 rx_cdc80_dma_rx_0_sample_rate,
3598 cdc_dma_rx_sample_rate_get,
3599 cdc_dma_rx_sample_rate_put),
3600 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3601 rx_cdc80_dma_rx_1_sample_rate,
3602 cdc_dma_rx_sample_rate_get,
3603 cdc_dma_rx_sample_rate_put),
3604 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3605 rx_cdc80_dma_rx_2_sample_rate,
3606 cdc_dma_rx_sample_rate_get,
3607 cdc_dma_rx_sample_rate_put),
3608 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3609 rx_cdc80_dma_rx_3_sample_rate,
3610 cdc_dma_rx_sample_rate_get,
3611 cdc_dma_rx_sample_rate_put),
3612 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3613 rx_cdc80_dma_rx_5_sample_rate,
3614 cdc_dma_rx_sample_rate_get,
3615 cdc_dma_rx_sample_rate_put),
3616};
3617
3618static const struct snd_kcontrol_new msm_int_wcd9385_snd_controls[] = {
3619 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc85_dma_rx_0_format,
3620 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3621 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc85_dma_rx_1_format,
3622 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3623 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc85_dma_rx_2_format,
3624 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3625 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc85_dma_rx_3_format,
3626 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3627 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc85_dma_rx_5_format,
3628 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3629 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3630 rx_cdc85_dma_rx_0_sample_rate,
3631 cdc_dma_rx_sample_rate_get,
3632 cdc_dma_rx_sample_rate_put),
3633 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3634 rx_cdc85_dma_rx_1_sample_rate,
3635 cdc_dma_rx_sample_rate_get,
3636 cdc_dma_rx_sample_rate_put),
3637 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3638 rx_cdc85_dma_rx_2_sample_rate,
3639 cdc_dma_rx_sample_rate_get,
3640 cdc_dma_rx_sample_rate_put),
3641 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3642 rx_cdc85_dma_rx_3_sample_rate,
3643 cdc_dma_rx_sample_rate_get,
3644 cdc_dma_rx_sample_rate_put),
3645 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3646 rx_cdc85_dma_rx_5_sample_rate,
3647 cdc_dma_rx_sample_rate_get,
3648 cdc_dma_rx_sample_rate_put),
3649};
3650
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3651static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3652 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3653 usb_audio_rx_sample_rate_get,
3654 usb_audio_rx_sample_rate_put),
3655 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3656 usb_audio_tx_sample_rate_get,
3657 usb_audio_tx_sample_rate_put),
3658 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3659 tdm_rx_sample_rate_get,
3660 tdm_rx_sample_rate_put),
3661 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3662 tdm_rx_sample_rate_get,
3663 tdm_rx_sample_rate_put),
3664 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3665 tdm_rx_sample_rate_get,
3666 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3667 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3668 tdm_rx_sample_rate_get,
3669 tdm_rx_sample_rate_put),
3670 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3671 tdm_rx_sample_rate_get,
3672 tdm_rx_sample_rate_put),
3673 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3674 tdm_rx_sample_rate_get,
3675 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3676 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3677 tdm_tx_sample_rate_get,
3678 tdm_tx_sample_rate_put),
3679 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3680 tdm_tx_sample_rate_get,
3681 tdm_tx_sample_rate_put),
3682 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3683 tdm_tx_sample_rate_get,
3684 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3685 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3686 tdm_tx_sample_rate_get,
3687 tdm_tx_sample_rate_put),
3688 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3689 tdm_tx_sample_rate_get,
3690 tdm_tx_sample_rate_put),
3691 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3692 tdm_tx_sample_rate_get,
3693 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3694 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3695 aux_pcm_rx_sample_rate_get,
3696 aux_pcm_rx_sample_rate_put),
3697 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3698 aux_pcm_rx_sample_rate_get,
3699 aux_pcm_rx_sample_rate_put),
3700 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3701 aux_pcm_rx_sample_rate_get,
3702 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3703 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3704 aux_pcm_rx_sample_rate_get,
3705 aux_pcm_rx_sample_rate_put),
3706 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3707 aux_pcm_rx_sample_rate_get,
3708 aux_pcm_rx_sample_rate_put),
3709 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3710 aux_pcm_rx_sample_rate_get,
3711 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3712 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3713 aux_pcm_tx_sample_rate_get,
3714 aux_pcm_tx_sample_rate_put),
3715 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3716 aux_pcm_tx_sample_rate_get,
3717 aux_pcm_tx_sample_rate_put),
3718 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3719 aux_pcm_tx_sample_rate_get,
3720 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3721 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3722 aux_pcm_tx_sample_rate_get,
3723 aux_pcm_tx_sample_rate_put),
3724 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3725 aux_pcm_tx_sample_rate_get,
3726 aux_pcm_tx_sample_rate_put),
3727 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3728 aux_pcm_tx_sample_rate_get,
3729 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3730 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3731 mi2s_rx_sample_rate_get,
3732 mi2s_rx_sample_rate_put),
3733 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3734 mi2s_rx_sample_rate_get,
3735 mi2s_rx_sample_rate_put),
3736 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3737 mi2s_rx_sample_rate_get,
3738 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3739 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3740 mi2s_rx_sample_rate_get,
3741 mi2s_rx_sample_rate_put),
3742 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3743 mi2s_rx_sample_rate_get,
3744 mi2s_rx_sample_rate_put),
3745 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3746 mi2s_rx_sample_rate_get,
3747 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3748 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3749 mi2s_tx_sample_rate_get,
3750 mi2s_tx_sample_rate_put),
3751 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3752 mi2s_tx_sample_rate_get,
3753 mi2s_tx_sample_rate_put),
3754 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3755 mi2s_tx_sample_rate_get,
3756 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3757 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3758 mi2s_tx_sample_rate_get,
3759 mi2s_tx_sample_rate_put),
3760 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3761 mi2s_tx_sample_rate_get,
3762 mi2s_tx_sample_rate_put),
3763 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3764 mi2s_tx_sample_rate_get,
3765 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3766 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3767 usb_audio_rx_format_get, usb_audio_rx_format_put),
3768 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3769 usb_audio_tx_format_get, usb_audio_tx_format_put),
3770 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3771 tdm_rx_format_get,
3772 tdm_rx_format_put),
3773 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3774 tdm_rx_format_get,
3775 tdm_rx_format_put),
3776 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3777 tdm_rx_format_get,
3778 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3779 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3780 tdm_rx_format_get,
3781 tdm_rx_format_put),
3782 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3783 tdm_rx_format_get,
3784 tdm_rx_format_put),
3785 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3786 tdm_rx_format_get,
3787 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3788 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3789 tdm_tx_format_get,
3790 tdm_tx_format_put),
3791 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3792 tdm_tx_format_get,
3793 tdm_tx_format_put),
3794 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3795 tdm_tx_format_get,
3796 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3797 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3798 tdm_tx_format_get,
3799 tdm_tx_format_put),
3800 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3801 tdm_tx_format_get,
3802 tdm_tx_format_put),
3803 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3804 tdm_tx_format_get,
3805 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3806 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3807 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3808 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3809 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3810 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3811 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3812 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3813 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3814 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3815 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3816 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3817 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3818 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3819 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3820 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3821 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3822 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3823 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3824 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3825 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3826 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3827 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3828 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3829 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3830 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3831 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3832 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3833 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3834 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3835 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3836 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3837 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3838 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3839 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3840 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3841 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3842 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3843 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3844 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3845 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3846 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3847 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3848 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3849 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3850 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3851 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3852 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3853 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3854 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3855 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3856 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3857 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3858 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3859 proxy_rx_ch_get, proxy_rx_ch_put),
3860 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3861 tdm_rx_ch_get,
3862 tdm_rx_ch_put),
3863 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3864 tdm_rx_ch_get,
3865 tdm_rx_ch_put),
3866 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3867 tdm_rx_ch_get,
3868 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3869 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3870 tdm_rx_ch_get,
3871 tdm_rx_ch_put),
3872 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3873 tdm_rx_ch_get,
3874 tdm_rx_ch_put),
3875 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3876 tdm_rx_ch_get,
3877 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3878 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3879 tdm_tx_ch_get,
3880 tdm_tx_ch_put),
3881 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3882 tdm_tx_ch_get,
3883 tdm_tx_ch_put),
3884 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3885 tdm_tx_ch_get,
3886 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3887 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3888 tdm_tx_ch_get,
3889 tdm_tx_ch_put),
3890 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3891 tdm_tx_ch_get,
3892 tdm_tx_ch_put),
3893 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3894 tdm_tx_ch_get,
3895 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3896 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3897 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3898 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3899 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3900 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3901 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3902 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3903 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3904 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3905 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3906 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3907 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3908 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3909 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3910 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3911 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3912 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3913 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3914 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3915 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3916 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3917 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3918 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3919 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3920 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3921 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3922 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3923 ext_disp_rx_format_get, ext_disp_rx_format_put),
3924 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3925 ext_disp_rx_sample_rate_get,
3926 ext_disp_rx_sample_rate_put),
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]3927 SOC_ENUM_EXT("Display Port1 RX Channels", ext_disp_rx_chs,
3928 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3929 SOC_ENUM_EXT("Display Port1 RX Bit Format", ext_disp_rx_format,
3930 ext_disp_rx_format_get, ext_disp_rx_format_put),
3931 SOC_ENUM_EXT("Display Port1 RX SampleRate", ext_disp_rx_sample_rate,
3932 ext_disp_rx_sample_rate_get,
3933 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3934 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3935 msm_bt_sample_rate_get,
3936 msm_bt_sample_rate_put),
3937 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3938 msm_bt_sample_rate_rx_get,
3939 msm_bt_sample_rate_rx_put),
3940 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3941 msm_bt_sample_rate_tx_get,
3942 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3943 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3944 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3945 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3946 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]3947 SOC_SINGLE_MULTI_EXT("TDM Slot Map", SND_SOC_NOPM, 0, 255, 0,
3948 TDM_MAX_SLOTS + MAX_PATH, NULL, tdm_slot_map_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3949};
3950
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3951static const struct snd_kcontrol_new msm_snd_controls[] = {
3952 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3953 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3954 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3955 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3956 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3957 aux_pcm_rx_sample_rate_get,
3958 aux_pcm_rx_sample_rate_put),
3959 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3960 aux_pcm_tx_sample_rate_get,
3961 aux_pcm_tx_sample_rate_put),
3962};
3963
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3964static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3965{
3966 int idx;
3967
3968 switch (be_id) {
3969 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3970 idx = EXT_DISP_RX_IDX_DP;
3971 break;
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]3972 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
3973 idx = EXT_DISP_RX_IDX_DP1;
3974 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3975 default:
3976 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3977 idx = -EINVAL;
3978 break;
3979 }
3980
3981 return idx;
3982}
3983
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]3984static int kona_send_island_va_config(int32_t be_id)
3985{
3986 int rc = 0;
3987 int port_id = 0xFFFF;
3988
3989 port_id = msm_get_port_id(be_id);
3990 if (port_id < 0) {
3991 pr_err("%s: Invalid island interface, be_id: %d\n",
3992 __func__, be_id);
3993 rc = -EINVAL;
3994 } else {
3995 /*
3996 * send island mode config
3997 * This should be the first configuration
3998 */
3999 rc = afe_send_port_island_mode(port_id);
4000 if (rc)
4001 pr_err("%s: afe send island mode failed %d\n",
4002 __func__, rc);
4003 }
4004
4005 return rc;
4006}
4007
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4008static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4009 struct snd_pcm_hw_params *params)
4010{
4011 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4012 struct snd_interval *rate = hw_param_interval(params,
4013 SNDRV_PCM_HW_PARAM_RATE);
4014 struct snd_interval *channels = hw_param_interval(params,
4015 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4016 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4017
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4018 pr_debug("%s: dai_id= %d, format = %d, rate = %d\n",
4019 __func__, dai_link->id, params_format(params),
4020 params_rate(params));
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4021
4022 switch (dai_link->id) {
4023 case MSM_BACKEND_DAI_USB_RX:
4024 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4025 usb_rx_cfg.bit_format);
4026 rate->min = rate->max = usb_rx_cfg.sample_rate;
4027 channels->min = channels->max = usb_rx_cfg.channels;
4028 break;
4029
4030 case MSM_BACKEND_DAI_USB_TX:
4031 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4032 usb_tx_cfg.bit_format);
4033 rate->min = rate->max = usb_tx_cfg.sample_rate;
4034 channels->min = channels->max = usb_tx_cfg.channels;
4035 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4036
4037 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]4038 case MSM_BACKEND_DAI_DISPLAY_PORT_RX_1:
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4039 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4040 if (idx < 0) {
4041 pr_err("%s: Incorrect ext disp idx %d\n",
4042 __func__, idx);
4043 rc = idx;
4044 goto done;
4045 }
4046
4047 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4048 ext_disp_rx_cfg[idx].bit_format);
4049 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4050 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4051 break;
4052
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4053 case MSM_BACKEND_DAI_AFE_PCM_RX:
4054 channels->min = channels->max = proxy_rx_cfg.channels;
4055 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4056 break;
4057
4058 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4059 channels->min = channels->max =
4060 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4061 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4062 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4063 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4064 break;
4065
4066 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4067 channels->min = channels->max =
4068 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4069 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4070 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4071 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4072 break;
4073
4074 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4075 channels->min = channels->max =
4076 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4077 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4078 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4079 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4080 break;
4081
4082 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4083 channels->min = channels->max =
4084 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4085 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4086 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4087 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4088 break;
4089
4090 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4091 channels->min = channels->max =
4092 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4093 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4094 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4095 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4096 break;
4097
4098 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4099 channels->min = channels->max =
4100 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4101 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4102 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4103 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4104 break;
4105
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4106 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4107 channels->min = channels->max =
4108 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4109 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4110 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4111 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4112 break;
4113
4114 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4115 channels->min = channels->max =
4116 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4117 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4118 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4119 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4120 break;
4121
4122 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4123 channels->min = channels->max =
4124 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4125 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4126 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4127 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4128 break;
4129
4130 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4131 channels->min = channels->max =
4132 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4133 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4134 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4135 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4136 break;
4137
4138 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
4139 channels->min = channels->max =
4140 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4141 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4142 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
4143 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
4144 break;
4145
4146 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
4147 channels->min = channels->max =
4148 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4149 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4150 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
4151 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
4152 break;
4153
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4154 case MSM_BACKEND_DAI_AUXPCM_RX:
4155 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4156 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4157 rate->min = rate->max =
4158 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4159 channels->min = channels->max =
4160 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4161 break;
4162
4163 case MSM_BACKEND_DAI_AUXPCM_TX:
4164 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4165 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4166 rate->min = rate->max =
4167 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4168 channels->min = channels->max =
4169 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4170 break;
4171
4172 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4173 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4174 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4175 rate->min = rate->max =
4176 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4177 channels->min = channels->max =
4178 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4179 break;
4180
4181 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4182 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4183 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4184 rate->min = rate->max =
4185 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4186 channels->min = channels->max =
4187 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4188 break;
4189
4190 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4191 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4192 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4193 rate->min = rate->max =
4194 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4195 channels->min = channels->max =
4196 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4197 break;
4198
4199 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4200 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4201 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4202 rate->min = rate->max =
4203 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4204 channels->min = channels->max =
4205 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4206 break;
4207
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4208 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4242 break;
4243
4244 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
4251 break;
4252
4253 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
4260 break;
4261
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4262 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4265 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4266 channels->min = channels->max =
4267 mi2s_rx_cfg[PRIM_MI2S].channels;
4268 break;
4269
4270 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4271 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4272 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4273 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4274 channels->min = channels->max =
4275 mi2s_tx_cfg[PRIM_MI2S].channels;
4276 break;
4277
4278 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4279 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4280 mi2s_rx_cfg[SEC_MI2S].bit_format);
4281 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4282 channels->min = channels->max =
4283 mi2s_rx_cfg[SEC_MI2S].channels;
4284 break;
4285
4286 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4287 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4288 mi2s_tx_cfg[SEC_MI2S].bit_format);
4289 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4290 channels->min = channels->max =
4291 mi2s_tx_cfg[SEC_MI2S].channels;
4292 break;
4293
4294 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4295 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4296 mi2s_rx_cfg[TERT_MI2S].bit_format);
4297 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4298 channels->min = channels->max =
4299 mi2s_rx_cfg[TERT_MI2S].channels;
4300 break;
4301
4302 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4303 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4304 mi2s_tx_cfg[TERT_MI2S].bit_format);
4305 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4306 channels->min = channels->max =
4307 mi2s_tx_cfg[TERT_MI2S].channels;
4308 break;
4309
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4310 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4311 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4312 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4313 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4314 channels->min = channels->max =
4315 mi2s_rx_cfg[QUAT_MI2S].channels;
4316 break;
4317
4318 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4319 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4320 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4321 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4322 channels->min = channels->max =
4323 mi2s_tx_cfg[QUAT_MI2S].channels;
4324 break;
4325
4326 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4327 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4328 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4329 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4330 channels->min = channels->max =
4331 mi2s_rx_cfg[QUIN_MI2S].channels;
4332 break;
4333
4334 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4335 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4336 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4337 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4338 channels->min = channels->max =
4339 mi2s_tx_cfg[QUIN_MI2S].channels;
4340 break;
4341
4342 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4343 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4344 mi2s_rx_cfg[SEN_MI2S].bit_format);
4345 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4346 channels->min = channels->max =
4347 mi2s_rx_cfg[SEN_MI2S].channels;
4348 break;
4349
4350 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4351 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4352 mi2s_tx_cfg[SEN_MI2S].bit_format);
4353 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4354 channels->min = channels->max =
4355 mi2s_tx_cfg[SEN_MI2S].channels;
4356 break;
4357
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4358 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4359 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4360 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4361 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4362 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4363 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4364 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 cdc_dma_rx_cfg[idx].bit_format);
4367 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4368 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4369 break;
4370
4371 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4372 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4373 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4374 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4375 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4376 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4377 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4378 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4379 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4380 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4381 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4382 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4383 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4384 break;
4385
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4386 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4387 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4388 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4389 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4390 channels->min = channels->max = msm_vi_feed_tx_ch;
4391 break;
4392
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4393 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4394 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4395 slim_rx_cfg[SLIM_RX_7].bit_format);
4396 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4397 channels->min = channels->max =
4398 slim_rx_cfg[SLIM_RX_7].channels;
4399 break;
4400
4401 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4402 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4403 channels->min = channels->max =
4404 slim_tx_cfg[SLIM_TX_7].channels;
4405 break;
4406
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4407 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4408 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4409 channels->min = channels->max =
4410 slim_tx_cfg[SLIM_TX_8].channels;
4411 break;
4412
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4413 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4414 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4415 afe_loopback_tx_cfg[idx].bit_format);
4416 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4417 channels->min = channels->max =
4418 afe_loopback_tx_cfg[idx].channels;
4419 break;
4420
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4421 default:
4422 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4423 break;
4424 }
4425
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4426done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4427 return rc;
4428}
4429
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4430static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4431{
4432 struct snd_soc_card *card = component->card;
4433 struct msm_asoc_mach_data *pdata =
4434 snd_soc_card_get_drvdata(card);
4435
4436 if (!pdata->fsa_handle)
4437 return false;
4438
4439 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4440}
4441
4442static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4443{
4444 int value = 0;
4445 bool ret = false;
4446 struct snd_soc_card *card;
4447 struct msm_asoc_mach_data *pdata;
4448
4449 if (!component) {
4450 pr_err("%s component is NULL\n", __func__);
4451 return false;
4452 }
4453 card = component->card;
4454 pdata = snd_soc_card_get_drvdata(card);
4455
4456 if (!pdata)
4457 return false;
4458
4459 if (wcd_mbhc_cfg.enable_usbc_analog)
4460 return msm_usbc_swap_gnd_mic(component, active);
4461
4462 /* if usbc is not defined, swap using us_euro_gpio_p */
4463 if (pdata->us_euro_gpio_p) {
4464 value = msm_cdc_pinctrl_get_state(
4465 pdata->us_euro_gpio_p);
4466 if (value)
4467 msm_cdc_pinctrl_select_sleep_state(
4468 pdata->us_euro_gpio_p);
4469 else
4470 msm_cdc_pinctrl_select_active_state(
4471 pdata->us_euro_gpio_p);
4472 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4473 __func__, value, !value);
4474 ret = true;
4475 }
4476
4477 return ret;
4478}
4479
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4480static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4481 struct snd_pcm_hw_params *params)
4482{
4483 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4484 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4485 int ret = 0;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4486 int slot_width = TDM_SLOT_WIDTH_BITS;
4487 int channels, slots = TDM_MAX_SLOTS;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4488 unsigned int slot_mask, rate, clk_freq;
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4489 unsigned int *slot_offset;
4490 struct tdm_dev_config *config;
4491 unsigned int path_dir = 0, interface = 0, channel_interface = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4492
4493 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4494
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4495 if (cpu_dai->id < AFE_PORT_ID_TDM_PORT_RANGE_START) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4496 pr_err("%s: dai id 0x%x not supported\n",
4497 __func__, cpu_dai->id);
4498 return -EINVAL;
4499 }
4500
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4501 /* RX or TX */
4502 path_dir = cpu_dai->id % MAX_PATH;
4503
4504 /* PRI, SEC, TERT, QUAT, QUIN, ... */
4505 interface = (cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START)
4506 / (MAX_PATH * TDM_PORT_MAX);
4507
4508 /* 0, 1, 2, .. 7 */
4509 channel_interface =
4510 ((cpu_dai->id - AFE_PORT_ID_TDM_PORT_RANGE_START) / MAX_PATH)
4511 % TDM_PORT_MAX;
4512
4513 pr_debug("%s: path dir: %u, interface %u, channel interface %u\n",
4514 __func__, path_dir, interface, channel_interface);
4515
4516 config = ((struct tdm_dev_config *) tdm_cfg[interface]) +
4517 (path_dir * TDM_PORT_MAX) + channel_interface;
4518 slot_offset = config->tdm_slot_offset;
4519
4520 if (path_dir)
4521 channels = tdm_tx_cfg[interface][channel_interface].channels;
4522 else
4523 channels = tdm_rx_cfg[interface][channel_interface].channels;
4524
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4525 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4526 /*2 slot config - bits 0 and 1 set for the first two slots */
4527 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4528
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4529 pr_debug("%s: tdm rx slot_width %d slots %d slot_mask %x\n",
4530 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4531
4532 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4533 slots, slot_width);
4534 if (ret < 0) {
4535 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4536 __func__, ret);
4537 goto end;
4538 }
4539
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4540 pr_debug("%s: tdm rx channels: %d\n", __func__, channels);
4541
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4542 ret = snd_soc_dai_set_channel_map(cpu_dai,
4543 0, NULL, channels, slot_offset);
4544 if (ret < 0) {
4545 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4546 __func__, ret);
4547 goto end;
4548 }
4549 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4550 /*2 slot config - bits 0 and 1 set for the first two slots */
4551 slot_mask = 0x0000FFFF >> (16 - slots);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4552
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4553 pr_debug("%s: tdm tx slot_width %d slots %d slot_mask %x\n",
4554 __func__, slot_width, slots, slot_mask);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4555
4556 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4557 slots, slot_width);
4558 if (ret < 0) {
4559 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4560 __func__, ret);
4561 goto end;
4562 }
4563
Vignesh Kulothungan2139a7d2019-08-07 12:07:20 -0700[diff] [blame]4564 pr_debug("%s: tdm tx channels: %d\n", __func__, channels);
4565
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4566 ret = snd_soc_dai_set_channel_map(cpu_dai,
4567 channels, slot_offset, 0, NULL);
4568 if (ret < 0) {
4569 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4570 __func__, ret);
4571 goto end;
4572 }
4573 } else {
4574 ret = -EINVAL;
4575 pr_err("%s: invalid use case, err:%d\n",
4576 __func__, ret);
4577 goto end;
4578 }
4579
4580 rate = params_rate(params);
4581 clk_freq = rate * slot_width * slots;
4582 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4583 if (ret < 0)
4584 pr_err("%s: failed to set tdm clk, err:%d\n",
4585 __func__, ret);
4586
4587end:
4588 return ret;
4589}
4590
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4591static int msm_get_tdm_mode(u32 port_id)
4592{
4593 int tdm_mode;
4594
4595 switch (port_id) {
4596 case AFE_PORT_ID_PRIMARY_TDM_RX:
4597 case AFE_PORT_ID_PRIMARY_TDM_TX:
4598 tdm_mode = TDM_PRI;
4599 break;
4600 case AFE_PORT_ID_SECONDARY_TDM_RX:
4601 case AFE_PORT_ID_SECONDARY_TDM_TX:
4602 tdm_mode = TDM_SEC;
4603 break;
4604 case AFE_PORT_ID_TERTIARY_TDM_RX:
4605 case AFE_PORT_ID_TERTIARY_TDM_TX:
4606 tdm_mode = TDM_TERT;
4607 break;
4608 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4609 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4610 tdm_mode = TDM_QUAT;
4611 break;
4612 case AFE_PORT_ID_QUINARY_TDM_RX:
4613 case AFE_PORT_ID_QUINARY_TDM_TX:
4614 tdm_mode = TDM_QUIN;
4615 break;
4616 case AFE_PORT_ID_SENARY_TDM_RX:
4617 case AFE_PORT_ID_SENARY_TDM_TX:
4618 tdm_mode = TDM_SEN;
4619 break;
4620 default:
4621 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4622 tdm_mode = -EINVAL;
4623 }
4624 return tdm_mode;
4625}
4626
4627static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4628{
4629 int ret = 0;
4630 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4631 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4632 struct snd_soc_card *card = rtd->card;
4633 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4634 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4635
4636 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4637 ret = -EINVAL;
4638 pr_err("%s: Invalid TDM interface %d\n",
4639 __func__, ret);
4640 return ret;
4641 }
4642
4643 if (pdata->mi2s_gpio_p[tdm_mode]) {
4644 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4645 == 0) {
4646 ret = msm_cdc_pinctrl_select_active_state(
4647 pdata->mi2s_gpio_p[tdm_mode]);
4648 if (ret) {
4649 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4650 __func__, ret);
4651 goto done;
4652 }
4653 }
4654 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4655 }
4656
4657done:
4658 return ret;
4659}
4660
4661static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4662{
4663 int ret = 0;
4664 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4665 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4666 struct snd_soc_card *card = rtd->card;
4667 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4668 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4669
4670 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4671 ret = -EINVAL;
4672 pr_err("%s: Invalid TDM interface %d\n",
4673 __func__, ret);
4674 return;
4675 }
4676
4677 if (pdata->mi2s_gpio_p[tdm_mode]) {
4678 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4679 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4680 == 0) {
4681 ret = msm_cdc_pinctrl_select_sleep_state(
4682 pdata->mi2s_gpio_p[tdm_mode]);
4683 if (ret)
4684 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4685 __func__, ret);
4686 }
4687 }
4688}
4689
4690static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4691{
4692 int ret = 0;
4693 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4694 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4695 struct snd_soc_card *card = rtd->card;
4696 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4697 u32 aux_mode = cpu_dai->id - 1;
4698
4699 if (aux_mode >= AUX_PCM_MAX) {
4700 ret = -EINVAL;
4701 pr_err("%s: Invalid AUX interface %d\n",
4702 __func__, ret);
4703 return ret;
4704 }
4705
4706 if (pdata->mi2s_gpio_p[aux_mode]) {
4707 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4708 == 0) {
4709 ret = msm_cdc_pinctrl_select_active_state(
4710 pdata->mi2s_gpio_p[aux_mode]);
4711 if (ret) {
4712 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4713 __func__, ret);
4714 goto done;
4715 }
4716 }
4717 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4718 }
4719
4720done:
4721 return ret;
4722}
4723
4724static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4725{
4726 int ret = 0;
4727 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4728 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4729 struct snd_soc_card *card = rtd->card;
4730 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4731 u32 aux_mode = cpu_dai->id - 1;
4732
4733 if (aux_mode >= AUX_PCM_MAX) {
4734 pr_err("%s: Invalid AUX interface %d\n",
4735 __func__, ret);
4736 return;
4737 }
4738
4739 if (pdata->mi2s_gpio_p[aux_mode]) {
4740 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4741 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4742 == 0) {
4743 ret = msm_cdc_pinctrl_select_sleep_state(
4744 pdata->mi2s_gpio_p[aux_mode]);
4745 if (ret)
4746 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4747 __func__, ret);
4748 }
4749 }
4750}
4751
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4752static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4753{
4754 int ret = 0;
4755 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4756 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4757
4758 switch (dai_link->id) {
4759 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4760 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4761 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4762 ret = kona_send_island_va_config(dai_link->id);
4763 if (ret)
4764 pr_err("%s: send island va cfg failed, err: %d\n",
4765 __func__, ret);
4766 break;
4767 }
4768
4769 return ret;
4770}
4771
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4772static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4773 struct snd_pcm_hw_params *params)
4774{
4775 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4776 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4777 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4778 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4779
4780 int ret = 0;
4781 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4782 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4783 u32 user_set_tx_ch = 0;
4784 u32 user_set_rx_ch = 0;
4785 u32 ch_id;
4786
4787 ret = snd_soc_dai_get_channel_map(codec_dai,
4788 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4789 &rx_ch_cdc_dma);
4790 if (ret < 0) {
4791 pr_err("%s: failed to get codec chan map, err:%d\n",
4792 __func__, ret);
4793 goto err;
4794 }
4795
4796 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4797 switch (dai_link->id) {
4798 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4799 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4800 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4801 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4802 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4803 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4804 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4805 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4806 {
4807 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4808 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4809 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4810 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4811 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4812 user_set_rx_ch, &rx_ch_cdc_dma);
4813 if (ret < 0) {
4814 pr_err("%s: failed to set cpu chan map, err:%d\n",
4815 __func__, ret);
4816 goto err;
4817 }
4818
4819 }
4820 break;
4821 }
4822 } else {
4823 switch (dai_link->id) {
4824 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4825 {
4826 user_set_tx_ch = msm_vi_feed_tx_ch;
4827 }
4828 break;
4829 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4830 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4831 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4832 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4833 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4834 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4835 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4836 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4837 {
4838 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4839 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4840 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4841 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4842 }
4843 break;
4844 }
4845
4846 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4847 &tx_ch_cdc_dma, 0, 0);
4848 if (ret < 0) {
4849 pr_err("%s: failed to set cpu chan map, err:%d\n",
4850 __func__, ret);
4851 goto err;
4852 }
4853 }
4854
4855err:
4856 return ret;
4857}
4858
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4859static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4860{
4861 cpumask_t mask;
4862
4863 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4864 pm_qos_remove_request(&substream->latency_pm_qos_req);
4865
4866 cpumask_clear(&mask);
4867 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4868 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4869 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4870
4871 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4872
4873 pm_qos_add_request(&substream->latency_pm_qos_req,
4874 PM_QOS_CPU_DMA_LATENCY,
4875 MSM_LL_QOS_VALUE);
4876 return 0;
4877}
4878
4879static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4880{
4881 int ret = 0;
4882 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4883 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4884 int index = cpu_dai->id;
4885 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4886 struct snd_soc_card *card = rtd->card;
4887 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4888
4889 dev_dbg(rtd->card->dev,
4890 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4891 __func__, substream->name, substream->stream,
4892 cpu_dai->name, cpu_dai->id);
4893
4894 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4895 ret = -EINVAL;
4896 dev_err(rtd->card->dev,
4897 "%s: CPU DAI id (%d) out of range\n",
4898 __func__, cpu_dai->id);
4899 goto err;
4900 }
4901 /*
4902 * Mutex protection in case the same MI2S
4903 * interface using for both TX and RX so
4904 * that the same clock won't be enable twice.
4905 */
4906 mutex_lock(&mi2s_intf_conf[index].lock);
4907 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4908 /* Check if msm needs to provide the clock to the interface */
4909 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4910 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4911 fmt = SND_SOC_DAIFMT_CBM_CFM;
4912 }
4913 ret = msm_mi2s_set_sclk(substream, true);
4914 if (ret < 0) {
4915 dev_err(rtd->card->dev,
4916 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4917 __func__, ret);
4918 goto clean_up;
4919 }
4920
4921 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4922 if (ret < 0) {
4923 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4924 __func__, index, ret);
4925 goto clk_off;
4926 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4927 if (pdata->mi2s_gpio_p[index]) {
4928 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4929 == 0) {
4930 ret = msm_cdc_pinctrl_select_active_state(
4931 pdata->mi2s_gpio_p[index]);
4932 if (ret) {
4933 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4934 __func__, ret);
4935 goto clk_off;
4936 }
4937 }
4938 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4939 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4940 }
4941clk_off:
4942 if (ret < 0)
4943 msm_mi2s_set_sclk(substream, false);
4944clean_up:
4945 if (ret < 0)
4946 mi2s_intf_conf[index].ref_cnt--;
4947 mutex_unlock(&mi2s_intf_conf[index].lock);
4948err:
4949 return ret;
4950}
4951
4952static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4953{
4954 int ret = 0;
4955 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4956 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4957 struct snd_soc_card *card = rtd->card;
4958 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4959
4960 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4961 substream->name, substream->stream);
4962 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4963 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4964 return;
4965 }
4966
4967 mutex_lock(&mi2s_intf_conf[index].lock);
4968 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4969 if (pdata->mi2s_gpio_p[index]) {
4970 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4971 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4972 == 0) {
4973 ret = msm_cdc_pinctrl_select_sleep_state(
4974 pdata->mi2s_gpio_p[index]);
4975 if (ret)
4976 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4977 __func__, ret);
4978 }
4979 }
4980
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4981 ret = msm_mi2s_set_sclk(substream, false);
4982 if (ret < 0)
4983 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4984 __func__, index, ret);
4985 }
4986 mutex_unlock(&mi2s_intf_conf[index].lock);
4987}
4988
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4989static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4990 struct snd_pcm_hw_params *params)
4991{
4992 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4993 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4994 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4995 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4996 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4997 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4998 int ret = 0;
4999
5000 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5001 codec_dai->name, codec_dai->id);
5002 ret = snd_soc_dai_get_channel_map(codec_dai,
5003 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5004 if (ret) {
5005 dev_err(rtd->dev,
5006 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5007 __func__, ret);
5008 goto err;
5009 }
5010
5011 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5012 __func__, tx_ch_cnt, dai_link->id);
5013
5014 ret = snd_soc_dai_set_channel_map(cpu_dai,
5015 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5016 if (ret)
5017 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5018 __func__, ret);
5019
5020err:
5021 return ret;
5022}
5023
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5024static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5025 struct snd_pcm_hw_params *params)
5026{
5027 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5028 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5029 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5030 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5031 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5032 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5033 int ret = 0;
5034
5035 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5036 codec_dai->name, codec_dai->id);
5037 ret = snd_soc_dai_get_channel_map(codec_dai,
5038 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5039 if (ret) {
5040 dev_err(rtd->dev,
5041 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5042 __func__, ret);
5043 goto err;
5044 }
5045
5046 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5047 __func__, tx_ch_cnt, dai_link->id);
5048
5049 ret = snd_soc_dai_set_channel_map(cpu_dai,
5050 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5051 if (ret)
5052 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5053 __func__, ret);
5054
5055err:
5056 return ret;
5057}
5058
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5059static struct snd_soc_ops kona_aux_be_ops = {
5060 .startup = kona_aux_snd_startup,
5061 .shutdown = kona_aux_snd_shutdown
5062};
5063
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5064static struct snd_soc_ops kona_tdm_be_ops = {
5065 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5066 .startup = kona_tdm_snd_startup,
5067 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5068};
5069
5070static struct snd_soc_ops msm_mi2s_be_ops = {
5071 .startup = msm_mi2s_snd_startup,
5072 .shutdown = msm_mi2s_snd_shutdown,
5073};
5074
5075static struct snd_soc_ops msm_fe_qos_ops = {
5076 .prepare = msm_fe_qos_prepare,
5077};
5078
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5079static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]5080 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5081 .hw_params = msm_snd_cdc_dma_hw_params,
5082};
5083
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5084static struct snd_soc_ops msm_wcn_ops = {
5085 .hw_params = msm_wcn_hw_params,
5086};
5087
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5088static struct snd_soc_ops msm_wcn_ops_lito = {
5089 .hw_params = msm_wcn_hw_params_lito,
5090};
5091
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5092static int msm_dmic_event(struct snd_soc_dapm_widget *w,
5093 struct snd_kcontrol *kcontrol, int event)
5094{
5095 struct msm_asoc_mach_data *pdata = NULL;
5096 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5097 int ret = 0;
5098 u32 dmic_idx;
5099 int *dmic_gpio_cnt;
5100 struct device_node *dmic_gpio;
5101 char *wname;
5102
5103 wname = strpbrk(w->name, "012345");
5104 if (!wname) {
5105 dev_err(component->dev, "%s: widget not found\n", __func__);
5106 return -EINVAL;
5107 }
5108
5109 ret = kstrtouint(wname, 10, &dmic_idx);
5110 if (ret < 0) {
5111 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
5112 __func__);
5113 return -EINVAL;
5114 }
5115
5116 pdata = snd_soc_card_get_drvdata(component->card);
5117
5118 switch (dmic_idx) {
5119 case 0:
5120 case 1:
5121 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
5122 dmic_gpio = pdata->dmic01_gpio_p;
5123 break;
5124 case 2:
5125 case 3:
5126 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
5127 dmic_gpio = pdata->dmic23_gpio_p;
5128 break;
5129 case 4:
5130 case 5:
5131 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
5132 dmic_gpio = pdata->dmic45_gpio_p;
5133 break;
5134 default:
5135 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
5136 __func__);
5137 return -EINVAL;
5138 }
5139
5140 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
5141 __func__, event, dmic_idx, *dmic_gpio_cnt);
5142
5143 switch (event) {
5144 case SND_SOC_DAPM_PRE_PMU:
5145 (*dmic_gpio_cnt)++;
5146 if (*dmic_gpio_cnt == 1) {
5147 ret = msm_cdc_pinctrl_select_active_state(
5148 dmic_gpio);
5149 if (ret < 0) {
5150 pr_err("%s: gpio set cannot be activated %sd",
5151 __func__, "dmic_gpio");
5152 return ret;
5153 }
5154 }
5155
5156 break;
5157 case SND_SOC_DAPM_POST_PMD:
5158 (*dmic_gpio_cnt)--;
5159 if (*dmic_gpio_cnt == 0) {
5160 ret = msm_cdc_pinctrl_select_sleep_state(
5161 dmic_gpio);
5162 if (ret < 0) {
5163 pr_err("%s: gpio set cannot be de-activated %sd",
5164 __func__, "dmic_gpio");
5165 return ret;
5166 }
5167 }
5168 break;
5169 default:
5170 pr_err("%s: invalid DAPM event %d\n", __func__, event);
5171 return -EINVAL;
5172 }
5173 return 0;
5174}
5175
5176static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
5177 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
5178 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
5179 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
5180 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5181 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5182 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
5183 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
5184 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
5185 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
5186 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
5187 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5188 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
5189 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5190};
5191
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5192static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
5193{
5194 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5195 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
5196 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5197
5198 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5199 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5200}
5201
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5202static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
5203{
5204 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
5205 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
5206 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5207
5208 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
5209 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
5210}
5211
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5212static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
5213{
5214 int ret = -EINVAL;
5215 struct snd_soc_component *component;
5216 struct snd_soc_dapm_context *dapm;
5217 struct snd_card *card;
5218 struct snd_info_entry *entry;
5219 struct snd_soc_component *aux_comp;
5220 struct msm_asoc_mach_data *pdata =
5221 snd_soc_card_get_drvdata(rtd->card);
5222
5223 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
5224 if (!component) {
5225 pr_err("%s: could not find component for bolero_codec\n",
5226 __func__);
5227 return ret;
5228 }
5229
5230 dapm = snd_soc_component_get_dapm(component);
5231
5232 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
5233 ARRAY_SIZE(msm_int_snd_controls));
5234 if (ret < 0) {
5235 pr_err("%s: add_component_controls failed: %d\n",
5236 __func__, ret);
5237 return ret;
5238 }
5239 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
5240 ARRAY_SIZE(msm_common_snd_controls));
5241 if (ret < 0) {
5242 pr_err("%s: add common snd controls failed: %d\n",
5243 __func__, ret);
5244 return ret;
5245 }
5246
5247 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
5248 ARRAY_SIZE(msm_int_dapm_widgets));
5249
5250 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
5251 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
5252 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
5253 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]5254 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
5255 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]5256 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
5257 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5258
5259 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
5260 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
5261 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
5262 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]5263 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5264
5265 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
5266 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
5267 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
5268 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5269
5270 snd_soc_dapm_sync(dapm);
5271
5272 /*
5273 * Send speaker configuration only for WSA8810.
5274 * Default configuration is for WSA8815.
5275 */
5276 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5277 __func__, rtd->card->num_aux_devs);
5278 if (rtd->card->num_aux_devs &&
5279 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5280 list_for_each_entry(aux_comp,
5281 &rtd->card->aux_comp_list,
5282 card_aux_list) {
5283 if (aux_comp->name != NULL && (
5284 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5285 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5286 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5287 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5288 wsa_macro_set_spkr_gain_offset(component,
5289 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5290 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5291 }
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]5292 if (pdata->lito_v2_enabled) {
5293 /*
5294 * Enable tx data line3 for saipan version v2 amd
5295 * write corresponding lpi register.
5296 */
5297 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map_v2),
5298 sm_port_map_v2);
5299 } else {
5300 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5301 sm_port_map);
5302 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5303 }
5304 card = rtd->card->snd_card;
5305 if (!pdata->codec_root) {
5306 entry = snd_info_create_subdir(card->module, "codecs",
5307 card->proc_root);
5308 if (!entry) {
5309 pr_debug("%s: Cannot create codecs module entry\n",
5310 __func__);
5311 ret = 0;
5312 goto err;
5313 }
5314 pdata->codec_root = entry;
5315 }
5316 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5317 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5318 codec_reg_done = true;
5319 return 0;
5320err:
5321 return ret;
5322}
5323
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5324static void *def_wcd_mbhc_cal(void)
5325{
5326 void *wcd_mbhc_cal;
5327 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5328 u16 *btn_high;
5329
5330 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5331 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5332 if (!wcd_mbhc_cal)
5333 return NULL;
5334
5335 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5336 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5337 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5338 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5339 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5340
5341 btn_high[0] = 75;
5342 btn_high[1] = 150;
5343 btn_high[2] = 237;
5344 btn_high[3] = 500;
5345 btn_high[4] = 500;
5346 btn_high[5] = 500;
5347 btn_high[6] = 500;
5348 btn_high[7] = 500;
5349
5350 return wcd_mbhc_cal;
5351}
5352
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5353/* Digital audio interface glue - connects codec <---> CPU */
5354static struct snd_soc_dai_link msm_common_dai_links[] = {
5355 /* FrontEnd DAI Links */
5356 {/* hw:x,0 */
5357 .name = MSM_DAILINK_NAME(Media1),
5358 .stream_name = "MultiMedia1",
5359 .cpu_dai_name = "MultiMedia1",
5360 .platform_name = "msm-pcm-dsp.0",
5361 .dynamic = 1,
5362 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5363 .dpcm_playback = 1,
5364 .dpcm_capture = 1,
5365 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5366 SND_SOC_DPCM_TRIGGER_POST},
5367 .codec_dai_name = "snd-soc-dummy-dai",
5368 .codec_name = "snd-soc-dummy",
5369 .ignore_suspend = 1,
5370 /* this dainlink has playback support */
5371 .ignore_pmdown_time = 1,
5372 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5373 },
5374 {/* hw:x,1 */
5375 .name = MSM_DAILINK_NAME(Media2),
5376 .stream_name = "MultiMedia2",
5377 .cpu_dai_name = "MultiMedia2",
5378 .platform_name = "msm-pcm-dsp.0",
5379 .dynamic = 1,
5380 .dpcm_playback = 1,
5381 .dpcm_capture = 1,
5382 .codec_dai_name = "snd-soc-dummy-dai",
5383 .codec_name = "snd-soc-dummy",
5384 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5385 SND_SOC_DPCM_TRIGGER_POST},
5386 .ignore_suspend = 1,
5387 /* this dainlink has playback support */
5388 .ignore_pmdown_time = 1,
5389 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5390 },
5391 {/* hw:x,2 */
5392 .name = "VoiceMMode1",
5393 .stream_name = "VoiceMMode1",
5394 .cpu_dai_name = "VoiceMMode1",
5395 .platform_name = "msm-pcm-voice",
5396 .dynamic = 1,
5397 .dpcm_playback = 1,
5398 .dpcm_capture = 1,
5399 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5400 SND_SOC_DPCM_TRIGGER_POST},
5401 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5402 .ignore_suspend = 1,
5403 .ignore_pmdown_time = 1,
5404 .codec_dai_name = "snd-soc-dummy-dai",
5405 .codec_name = "snd-soc-dummy",
5406 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5407 },
5408 {/* hw:x,3 */
5409 .name = "MSM VoIP",
5410 .stream_name = "VoIP",
5411 .cpu_dai_name = "VoIP",
5412 .platform_name = "msm-voip-dsp",
5413 .dynamic = 1,
5414 .dpcm_playback = 1,
5415 .dpcm_capture = 1,
5416 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5417 SND_SOC_DPCM_TRIGGER_POST},
5418 .codec_dai_name = "snd-soc-dummy-dai",
5419 .codec_name = "snd-soc-dummy",
5420 .ignore_suspend = 1,
5421 /* this dainlink has playback support */
5422 .ignore_pmdown_time = 1,
5423 .id = MSM_FRONTEND_DAI_VOIP,
5424 },
5425 {/* hw:x,4 */
5426 .name = MSM_DAILINK_NAME(ULL),
5427 .stream_name = "MultiMedia3",
5428 .cpu_dai_name = "MultiMedia3",
5429 .platform_name = "msm-pcm-dsp.2",
5430 .dynamic = 1,
5431 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5432 .dpcm_playback = 1,
5433 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5434 SND_SOC_DPCM_TRIGGER_POST},
5435 .codec_dai_name = "snd-soc-dummy-dai",
5436 .codec_name = "snd-soc-dummy",
5437 .ignore_suspend = 1,
5438 /* this dainlink has playback support */
5439 .ignore_pmdown_time = 1,
5440 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5441 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5442 {/* hw:x,5 */
5443 .name = "MSM AFE-PCM RX",
5444 .stream_name = "AFE-PROXY RX",
5445 .cpu_dai_name = "msm-dai-q6-dev.241",
5446 .codec_name = "msm-stub-codec.1",
5447 .codec_dai_name = "msm-stub-rx",
5448 .platform_name = "msm-pcm-afe",
5449 .dpcm_playback = 1,
5450 .ignore_suspend = 1,
5451 /* this dainlink has playback support */
5452 .ignore_pmdown_time = 1,
5453 },
5454 {/* hw:x,6 */
5455 .name = "MSM AFE-PCM TX",
5456 .stream_name = "AFE-PROXY TX",
5457 .cpu_dai_name = "msm-dai-q6-dev.240",
5458 .codec_name = "msm-stub-codec.1",
5459 .codec_dai_name = "msm-stub-tx",
5460 .platform_name = "msm-pcm-afe",
5461 .dpcm_capture = 1,
5462 .ignore_suspend = 1,
5463 },
5464 {/* hw:x,7 */
5465 .name = MSM_DAILINK_NAME(Compress1),
5466 .stream_name = "Compress1",
5467 .cpu_dai_name = "MultiMedia4",
5468 .platform_name = "msm-compress-dsp",
5469 .dynamic = 1,
5470 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5471 .dpcm_playback = 1,
5472 .dpcm_capture = 1,
5473 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5474 SND_SOC_DPCM_TRIGGER_POST},
5475 .codec_dai_name = "snd-soc-dummy-dai",
5476 .codec_name = "snd-soc-dummy",
5477 .ignore_suspend = 1,
5478 .ignore_pmdown_time = 1,
5479 /* this dainlink has playback support */
5480 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5481 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5482 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5483 {/* hw:x,8 */
5484 .name = "AUXPCM Hostless",
5485 .stream_name = "AUXPCM Hostless",
5486 .cpu_dai_name = "AUXPCM_HOSTLESS",
5487 .platform_name = "msm-pcm-hostless",
5488 .dynamic = 1,
5489 .dpcm_playback = 1,
5490 .dpcm_capture = 1,
5491 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5492 SND_SOC_DPCM_TRIGGER_POST},
5493 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5494 .ignore_suspend = 1,
5495 /* this dainlink has playback support */
5496 .ignore_pmdown_time = 1,
5497 .codec_dai_name = "snd-soc-dummy-dai",
5498 .codec_name = "snd-soc-dummy",
5499 },
5500 {/* hw:x,9 */
5501 .name = MSM_DAILINK_NAME(LowLatency),
5502 .stream_name = "MultiMedia5",
5503 .cpu_dai_name = "MultiMedia5",
5504 .platform_name = "msm-pcm-dsp.1",
5505 .dynamic = 1,
5506 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5507 .dpcm_playback = 1,
5508 .dpcm_capture = 1,
5509 .codec_dai_name = "snd-soc-dummy-dai",
5510 .codec_name = "snd-soc-dummy",
5511 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5512 SND_SOC_DPCM_TRIGGER_POST},
5513 .ignore_suspend = 1,
5514 /* this dainlink has playback support */
5515 .ignore_pmdown_time = 1,
5516 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5517 .ops = &msm_fe_qos_ops,
5518 },
5519 {/* hw:x,10 */
5520 .name = "Listen 1 Audio Service",
5521 .stream_name = "Listen 1 Audio Service",
5522 .cpu_dai_name = "LSM1",
5523 .platform_name = "msm-lsm-client",
5524 .dynamic = 1,
5525 .dpcm_capture = 1,
5526 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5527 SND_SOC_DPCM_TRIGGER_POST },
5528 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5529 .ignore_suspend = 1,
5530 .codec_dai_name = "snd-soc-dummy-dai",
5531 .codec_name = "snd-soc-dummy",
5532 .id = MSM_FRONTEND_DAI_LSM1,
5533 },
5534 /* Multiple Tunnel instances */
5535 {/* hw:x,11 */
5536 .name = MSM_DAILINK_NAME(Compress2),
5537 .stream_name = "Compress2",
5538 .cpu_dai_name = "MultiMedia7",
5539 .platform_name = "msm-compress-dsp",
5540 .dynamic = 1,
5541 .dpcm_playback = 1,
5542 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5543 SND_SOC_DPCM_TRIGGER_POST},
5544 .codec_dai_name = "snd-soc-dummy-dai",
5545 .codec_name = "snd-soc-dummy",
5546 .ignore_suspend = 1,
5547 .ignore_pmdown_time = 1,
5548 /* this dainlink has playback support */
5549 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5550 },
5551 {/* hw:x,12 */
5552 .name = MSM_DAILINK_NAME(MultiMedia10),
5553 .stream_name = "MultiMedia10",
5554 .cpu_dai_name = "MultiMedia10",
5555 .platform_name = "msm-pcm-dsp.1",
5556 .dynamic = 1,
5557 .dpcm_playback = 1,
5558 .dpcm_capture = 1,
5559 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5560 SND_SOC_DPCM_TRIGGER_POST},
5561 .codec_dai_name = "snd-soc-dummy-dai",
5562 .codec_name = "snd-soc-dummy",
5563 .ignore_suspend = 1,
5564 .ignore_pmdown_time = 1,
5565 /* this dainlink has playback support */
5566 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5567 },
5568 {/* hw:x,13 */
5569 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5570 .stream_name = "MM_NOIRQ",
5571 .cpu_dai_name = "MultiMedia8",
5572 .platform_name = "msm-pcm-dsp-noirq",
5573 .dynamic = 1,
5574 .dpcm_playback = 1,
5575 .dpcm_capture = 1,
5576 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5577 SND_SOC_DPCM_TRIGGER_POST},
5578 .codec_dai_name = "snd-soc-dummy-dai",
5579 .codec_name = "snd-soc-dummy",
5580 .ignore_suspend = 1,
5581 .ignore_pmdown_time = 1,
5582 /* this dainlink has playback support */
5583 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5584 .ops = &msm_fe_qos_ops,
5585 },
5586 /* HDMI Hostless */
5587 {/* hw:x,14 */
5588 .name = "HDMI_RX_HOSTLESS",
5589 .stream_name = "HDMI_RX_HOSTLESS",
5590 .cpu_dai_name = "HDMI_HOSTLESS",
5591 .platform_name = "msm-pcm-hostless",
5592 .dynamic = 1,
5593 .dpcm_playback = 1,
5594 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5595 SND_SOC_DPCM_TRIGGER_POST},
5596 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5597 .ignore_suspend = 1,
5598 .ignore_pmdown_time = 1,
5599 .codec_dai_name = "snd-soc-dummy-dai",
5600 .codec_name = "snd-soc-dummy",
5601 },
5602 {/* hw:x,15 */
5603 .name = "VoiceMMode2",
5604 .stream_name = "VoiceMMode2",
5605 .cpu_dai_name = "VoiceMMode2",
5606 .platform_name = "msm-pcm-voice",
5607 .dynamic = 1,
5608 .dpcm_playback = 1,
5609 .dpcm_capture = 1,
5610 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5611 SND_SOC_DPCM_TRIGGER_POST},
5612 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5613 .ignore_suspend = 1,
5614 .ignore_pmdown_time = 1,
5615 .codec_dai_name = "snd-soc-dummy-dai",
5616 .codec_name = "snd-soc-dummy",
5617 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5618 },
5619 /* LSM FE */
5620 {/* hw:x,16 */
5621 .name = "Listen 2 Audio Service",
5622 .stream_name = "Listen 2 Audio Service",
5623 .cpu_dai_name = "LSM2",
5624 .platform_name = "msm-lsm-client",
5625 .dynamic = 1,
5626 .dpcm_capture = 1,
5627 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5628 SND_SOC_DPCM_TRIGGER_POST },
5629 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5630 .ignore_suspend = 1,
5631 .codec_dai_name = "snd-soc-dummy-dai",
5632 .codec_name = "snd-soc-dummy",
5633 .id = MSM_FRONTEND_DAI_LSM2,
5634 },
5635 {/* hw:x,17 */
5636 .name = "Listen 3 Audio Service",
5637 .stream_name = "Listen 3 Audio Service",
5638 .cpu_dai_name = "LSM3",
5639 .platform_name = "msm-lsm-client",
5640 .dynamic = 1,
5641 .dpcm_capture = 1,
5642 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5643 SND_SOC_DPCM_TRIGGER_POST },
5644 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5645 .ignore_suspend = 1,
5646 .codec_dai_name = "snd-soc-dummy-dai",
5647 .codec_name = "snd-soc-dummy",
5648 .id = MSM_FRONTEND_DAI_LSM3,
5649 },
5650 {/* hw:x,18 */
5651 .name = "Listen 4 Audio Service",
5652 .stream_name = "Listen 4 Audio Service",
5653 .cpu_dai_name = "LSM4",
5654 .platform_name = "msm-lsm-client",
5655 .dynamic = 1,
5656 .dpcm_capture = 1,
5657 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5658 SND_SOC_DPCM_TRIGGER_POST },
5659 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5660 .ignore_suspend = 1,
5661 .codec_dai_name = "snd-soc-dummy-dai",
5662 .codec_name = "snd-soc-dummy",
5663 .id = MSM_FRONTEND_DAI_LSM4,
5664 },
5665 {/* hw:x,19 */
5666 .name = "Listen 5 Audio Service",
5667 .stream_name = "Listen 5 Audio Service",
5668 .cpu_dai_name = "LSM5",
5669 .platform_name = "msm-lsm-client",
5670 .dynamic = 1,
5671 .dpcm_capture = 1,
5672 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5673 SND_SOC_DPCM_TRIGGER_POST },
5674 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5675 .ignore_suspend = 1,
5676 .codec_dai_name = "snd-soc-dummy-dai",
5677 .codec_name = "snd-soc-dummy",
5678 .id = MSM_FRONTEND_DAI_LSM5,
5679 },
5680 {/* hw:x,20 */
5681 .name = "Listen 6 Audio Service",
5682 .stream_name = "Listen 6 Audio Service",
5683 .cpu_dai_name = "LSM6",
5684 .platform_name = "msm-lsm-client",
5685 .dynamic = 1,
5686 .dpcm_capture = 1,
5687 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5688 SND_SOC_DPCM_TRIGGER_POST },
5689 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5690 .ignore_suspend = 1,
5691 .codec_dai_name = "snd-soc-dummy-dai",
5692 .codec_name = "snd-soc-dummy",
5693 .id = MSM_FRONTEND_DAI_LSM6,
5694 },
5695 {/* hw:x,21 */
5696 .name = "Listen 7 Audio Service",
5697 .stream_name = "Listen 7 Audio Service",
5698 .cpu_dai_name = "LSM7",
5699 .platform_name = "msm-lsm-client",
5700 .dynamic = 1,
5701 .dpcm_capture = 1,
5702 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5703 SND_SOC_DPCM_TRIGGER_POST },
5704 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5705 .ignore_suspend = 1,
5706 .codec_dai_name = "snd-soc-dummy-dai",
5707 .codec_name = "snd-soc-dummy",
5708 .id = MSM_FRONTEND_DAI_LSM7,
5709 },
5710 {/* hw:x,22 */
5711 .name = "Listen 8 Audio Service",
5712 .stream_name = "Listen 8 Audio Service",
5713 .cpu_dai_name = "LSM8",
5714 .platform_name = "msm-lsm-client",
5715 .dynamic = 1,
5716 .dpcm_capture = 1,
5717 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5718 SND_SOC_DPCM_TRIGGER_POST },
5719 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5720 .ignore_suspend = 1,
5721 .codec_dai_name = "snd-soc-dummy-dai",
5722 .codec_name = "snd-soc-dummy",
5723 .id = MSM_FRONTEND_DAI_LSM8,
5724 },
5725 {/* hw:x,23 */
5726 .name = MSM_DAILINK_NAME(Media9),
5727 .stream_name = "MultiMedia9",
5728 .cpu_dai_name = "MultiMedia9",
5729 .platform_name = "msm-pcm-dsp.0",
5730 .dynamic = 1,
5731 .dpcm_playback = 1,
5732 .dpcm_capture = 1,
5733 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5734 SND_SOC_DPCM_TRIGGER_POST},
5735 .codec_dai_name = "snd-soc-dummy-dai",
5736 .codec_name = "snd-soc-dummy",
5737 .ignore_suspend = 1,
5738 /* this dainlink has playback support */
5739 .ignore_pmdown_time = 1,
5740 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5741 },
5742 {/* hw:x,24 */
5743 .name = MSM_DAILINK_NAME(Compress4),
5744 .stream_name = "Compress4",
5745 .cpu_dai_name = "MultiMedia11",
5746 .platform_name = "msm-compress-dsp",
5747 .dynamic = 1,
5748 .dpcm_playback = 1,
5749 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5750 SND_SOC_DPCM_TRIGGER_POST},
5751 .codec_dai_name = "snd-soc-dummy-dai",
5752 .codec_name = "snd-soc-dummy",
5753 .ignore_suspend = 1,
5754 .ignore_pmdown_time = 1,
5755 /* this dainlink has playback support */
5756 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5757 },
5758 {/* hw:x,25 */
5759 .name = MSM_DAILINK_NAME(Compress5),
5760 .stream_name = "Compress5",
5761 .cpu_dai_name = "MultiMedia12",
5762 .platform_name = "msm-compress-dsp",
5763 .dynamic = 1,
5764 .dpcm_playback = 1,
5765 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5766 SND_SOC_DPCM_TRIGGER_POST},
5767 .codec_dai_name = "snd-soc-dummy-dai",
5768 .codec_name = "snd-soc-dummy",
5769 .ignore_suspend = 1,
5770 .ignore_pmdown_time = 1,
5771 /* this dainlink has playback support */
5772 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5773 },
5774 {/* hw:x,26 */
5775 .name = MSM_DAILINK_NAME(Compress6),
5776 .stream_name = "Compress6",
5777 .cpu_dai_name = "MultiMedia13",
5778 .platform_name = "msm-compress-dsp",
5779 .dynamic = 1,
5780 .dpcm_playback = 1,
5781 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5782 SND_SOC_DPCM_TRIGGER_POST},
5783 .codec_dai_name = "snd-soc-dummy-dai",
5784 .codec_name = "snd-soc-dummy",
5785 .ignore_suspend = 1,
5786 .ignore_pmdown_time = 1,
5787 /* this dainlink has playback support */
5788 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5789 },
5790 {/* hw:x,27 */
5791 .name = MSM_DAILINK_NAME(Compress7),
5792 .stream_name = "Compress7",
5793 .cpu_dai_name = "MultiMedia14",
5794 .platform_name = "msm-compress-dsp",
5795 .dynamic = 1,
5796 .dpcm_playback = 1,
5797 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5798 SND_SOC_DPCM_TRIGGER_POST},
5799 .codec_dai_name = "snd-soc-dummy-dai",
5800 .codec_name = "snd-soc-dummy",
5801 .ignore_suspend = 1,
5802 .ignore_pmdown_time = 1,
5803 /* this dainlink has playback support */
5804 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5805 },
5806 {/* hw:x,28 */
5807 .name = MSM_DAILINK_NAME(Compress8),
5808 .stream_name = "Compress8",
5809 .cpu_dai_name = "MultiMedia15",
5810 .platform_name = "msm-compress-dsp",
5811 .dynamic = 1,
5812 .dpcm_playback = 1,
5813 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5814 SND_SOC_DPCM_TRIGGER_POST},
5815 .codec_dai_name = "snd-soc-dummy-dai",
5816 .codec_name = "snd-soc-dummy",
5817 .ignore_suspend = 1,
5818 .ignore_pmdown_time = 1,
5819 /* this dainlink has playback support */
5820 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5821 },
5822 {/* hw:x,29 */
5823 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5824 .stream_name = "MM_NOIRQ_2",
5825 .cpu_dai_name = "MultiMedia16",
5826 .platform_name = "msm-pcm-dsp-noirq",
5827 .dynamic = 1,
5828 .dpcm_playback = 1,
5829 .dpcm_capture = 1,
5830 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5831 SND_SOC_DPCM_TRIGGER_POST},
5832 .codec_dai_name = "snd-soc-dummy-dai",
5833 .codec_name = "snd-soc-dummy",
5834 .ignore_suspend = 1,
5835 .ignore_pmdown_time = 1,
5836 /* this dainlink has playback support */
5837 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5838 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5839 },
5840 {/* hw:x,30 */
5841 .name = "CDC_DMA Hostless",
5842 .stream_name = "CDC_DMA Hostless",
5843 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5844 .platform_name = "msm-pcm-hostless",
5845 .dynamic = 1,
5846 .dpcm_playback = 1,
5847 .dpcm_capture = 1,
5848 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5849 SND_SOC_DPCM_TRIGGER_POST},
5850 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5851 .ignore_suspend = 1,
5852 /* this dailink has playback support */
5853 .ignore_pmdown_time = 1,
5854 .codec_dai_name = "snd-soc-dummy-dai",
5855 .codec_name = "snd-soc-dummy",
5856 },
5857 {/* hw:x,31 */
5858 .name = "TX3_CDC_DMA Hostless",
5859 .stream_name = "TX3_CDC_DMA Hostless",
5860 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5861 .platform_name = "msm-pcm-hostless",
5862 .dynamic = 1,
5863 .dpcm_capture = 1,
5864 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5865 SND_SOC_DPCM_TRIGGER_POST},
5866 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5867 .ignore_suspend = 1,
5868 .codec_dai_name = "snd-soc-dummy-dai",
5869 .codec_name = "snd-soc-dummy",
5870 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5871 {/* hw:x,32 */
5872 .name = "Tertiary MI2S TX_Hostless",
5873 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5874 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5875 .platform_name = "msm-pcm-hostless",
5876 .dynamic = 1,
5877 .dpcm_capture = 1,
5878 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5879 SND_SOC_DPCM_TRIGGER_POST},
5880 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5881 .ignore_suspend = 1,
5882 .ignore_pmdown_time = 1,
5883 .codec_dai_name = "snd-soc-dummy-dai",
5884 .codec_name = "snd-soc-dummy",
5885 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5886};
5887
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5888static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5889 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5890 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5891 .stream_name = "WSA CDC DMA0 Capture",
5892 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5893 .platform_name = "msm-pcm-hostless",
5894 .codec_name = "bolero_codec",
5895 .codec_dai_name = "wsa_macro_vifeedback",
5896 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
5897 .be_hw_params_fixup = msm_be_hw_params_fixup,
5898 .ignore_suspend = 1,
5899 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5900 .ops = &msm_cdc_dma_be_ops,
5901 },
5902};
5903
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5904static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5905 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5906 .name = MSM_DAILINK_NAME(ASM Loopback),
5907 .stream_name = "MultiMedia6",
5908 .cpu_dai_name = "MultiMedia6",
5909 .platform_name = "msm-pcm-loopback",
5910 .dynamic = 1,
5911 .dpcm_playback = 1,
5912 .dpcm_capture = 1,
5913 .codec_dai_name = "snd-soc-dummy-dai",
5914 .codec_name = "snd-soc-dummy",
5915 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5916 SND_SOC_DPCM_TRIGGER_POST},
5917 .ignore_suspend = 1,
5918 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5919 .ignore_pmdown_time = 1,
5920 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5921 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5922 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5923 .name = "USB Audio Hostless",
5924 .stream_name = "USB Audio Hostless",
5925 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5926 .platform_name = "msm-pcm-hostless",
5927 .dynamic = 1,
5928 .dpcm_playback = 1,
5929 .dpcm_capture = 1,
5930 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5931 SND_SOC_DPCM_TRIGGER_POST},
5932 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5933 .ignore_suspend = 1,
5934 .ignore_pmdown_time = 1,
5935 .codec_dai_name = "snd-soc-dummy-dai",
5936 .codec_name = "snd-soc-dummy",
5937 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5938 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5939 .name = "SLIMBUS_7 Hostless",
5940 .stream_name = "SLIMBUS_7 Hostless",
5941 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5942 .platform_name = "msm-pcm-hostless",
5943 .dynamic = 1,
5944 .dpcm_capture = 1,
5945 .dpcm_playback = 1,
5946 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5947 SND_SOC_DPCM_TRIGGER_POST},
5948 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5949 .ignore_suspend = 1,
5950 .ignore_pmdown_time = 1,
5951 .codec_dai_name = "snd-soc-dummy-dai",
5952 .codec_name = "snd-soc-dummy",
5953 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5954 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5955 .name = "Compress Capture",
5956 .stream_name = "Compress9",
5957 .cpu_dai_name = "MultiMedia17",
5958 .platform_name = "msm-compress-dsp",
5959 .dynamic = 1,
5960 .dpcm_capture = 1,
5961 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5962 SND_SOC_DPCM_TRIGGER_POST},
5963 .codec_dai_name = "snd-soc-dummy-dai",
5964 .codec_name = "snd-soc-dummy",
5965 .ignore_suspend = 1,
5966 .ignore_pmdown_time = 1,
5967 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5968 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5969 {/* hw:x,38 */
5970 .name = "SLIMBUS_8 Hostless",
5971 .stream_name = "SLIMBUS_8 Hostless",
5972 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5973 .platform_name = "msm-pcm-hostless",
5974 .dynamic = 1,
5975 .dpcm_capture = 1,
5976 .dpcm_playback = 1,
5977 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5978 SND_SOC_DPCM_TRIGGER_POST},
5979 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5980 .ignore_suspend = 1,
5981 .ignore_pmdown_time = 1,
5982 .codec_dai_name = "snd-soc-dummy-dai",
5983 .codec_name = "snd-soc-dummy",
5984 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]5985 {/* hw:x,39 */
5986 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5987 .stream_name = "TX CDC DMA5 Capture",
5988 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5989 .platform_name = "msm-pcm-hostless",
5990 .codec_name = "bolero_codec",
5991 .codec_dai_name = "tx_macro_tx3",
5992 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5993 .be_hw_params_fixup = msm_be_hw_params_fixup,
5994 .ignore_suspend = 1,
5995 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5996 .ops = &msm_cdc_dma_be_ops,
5997 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5998};
5999
6000static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6001 /* Backend AFE DAI Links */
6002 {
6003 .name = LPASS_BE_AFE_PCM_RX,
6004 .stream_name = "AFE Playback",
6005 .cpu_dai_name = "msm-dai-q6-dev.224",
6006 .platform_name = "msm-pcm-routing",
6007 .codec_name = "msm-stub-codec.1",
6008 .codec_dai_name = "msm-stub-rx",
6009 .no_pcm = 1,
6010 .dpcm_playback = 1,
6011 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6012 .be_hw_params_fixup = msm_be_hw_params_fixup,
6013 /* this dainlink has playback support */
6014 .ignore_pmdown_time = 1,
6015 .ignore_suspend = 1,
6016 },
6017 {
6018 .name = LPASS_BE_AFE_PCM_TX,
6019 .stream_name = "AFE Capture",
6020 .cpu_dai_name = "msm-dai-q6-dev.225",
6021 .platform_name = "msm-pcm-routing",
6022 .codec_name = "msm-stub-codec.1",
6023 .codec_dai_name = "msm-stub-tx",
6024 .no_pcm = 1,
6025 .dpcm_capture = 1,
6026 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6027 .be_hw_params_fixup = msm_be_hw_params_fixup,
6028 .ignore_suspend = 1,
6029 },
6030 /* Incall Record Uplink BACK END DAI Link */
6031 {
6032 .name = LPASS_BE_INCALL_RECORD_TX,
6033 .stream_name = "Voice Uplink Capture",
6034 .cpu_dai_name = "msm-dai-q6-dev.32772",
6035 .platform_name = "msm-pcm-routing",
6036 .codec_name = "msm-stub-codec.1",
6037 .codec_dai_name = "msm-stub-tx",
6038 .no_pcm = 1,
6039 .dpcm_capture = 1,
6040 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6041 .be_hw_params_fixup = msm_be_hw_params_fixup,
6042 .ignore_suspend = 1,
6043 },
6044 /* Incall Record Downlink BACK END DAI Link */
6045 {
6046 .name = LPASS_BE_INCALL_RECORD_RX,
6047 .stream_name = "Voice Downlink Capture",
6048 .cpu_dai_name = "msm-dai-q6-dev.32771",
6049 .platform_name = "msm-pcm-routing",
6050 .codec_name = "msm-stub-codec.1",
6051 .codec_dai_name = "msm-stub-tx",
6052 .no_pcm = 1,
6053 .dpcm_capture = 1,
6054 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6055 .be_hw_params_fixup = msm_be_hw_params_fixup,
6056 .ignore_suspend = 1,
6057 },
6058 /* Incall Music BACK END DAI Link */
6059 {
6060 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6061 .stream_name = "Voice Farend Playback",
6062 .cpu_dai_name = "msm-dai-q6-dev.32773",
6063 .platform_name = "msm-pcm-routing",
6064 .codec_name = "msm-stub-codec.1",
6065 .codec_dai_name = "msm-stub-rx",
6066 .no_pcm = 1,
6067 .dpcm_playback = 1,
6068 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6069 .be_hw_params_fixup = msm_be_hw_params_fixup,
6070 .ignore_suspend = 1,
6071 .ignore_pmdown_time = 1,
6072 },
6073 /* Incall Music 2 BACK END DAI Link */
6074 {
6075 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6076 .stream_name = "Voice2 Farend Playback",
6077 .cpu_dai_name = "msm-dai-q6-dev.32770",
6078 .platform_name = "msm-pcm-routing",
6079 .codec_name = "msm-stub-codec.1",
6080 .codec_dai_name = "msm-stub-rx",
6081 .no_pcm = 1,
6082 .dpcm_playback = 1,
6083 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6084 .be_hw_params_fixup = msm_be_hw_params_fixup,
6085 .ignore_suspend = 1,
6086 .ignore_pmdown_time = 1,
6087 },
6088 {
6089 .name = LPASS_BE_USB_AUDIO_RX,
6090 .stream_name = "USB Audio Playback",
6091 .cpu_dai_name = "msm-dai-q6-dev.28672",
6092 .platform_name = "msm-pcm-routing",
6093 .codec_name = "msm-stub-codec.1",
6094 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6095 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6096 .no_pcm = 1,
6097 .dpcm_playback = 1,
6098 .id = MSM_BACKEND_DAI_USB_RX,
6099 .be_hw_params_fixup = msm_be_hw_params_fixup,
6100 .ignore_pmdown_time = 1,
6101 .ignore_suspend = 1,
6102 },
6103 {
6104 .name = LPASS_BE_USB_AUDIO_TX,
6105 .stream_name = "USB Audio Capture",
6106 .cpu_dai_name = "msm-dai-q6-dev.28673",
6107 .platform_name = "msm-pcm-routing",
6108 .codec_name = "msm-stub-codec.1",
6109 .codec_dai_name = "msm-stub-tx",
6110 .no_pcm = 1,
6111 .dpcm_capture = 1,
6112 .id = MSM_BACKEND_DAI_USB_TX,
6113 .be_hw_params_fixup = msm_be_hw_params_fixup,
6114 .ignore_suspend = 1,
6115 },
6116 {
6117 .name = LPASS_BE_PRI_TDM_RX_0,
6118 .stream_name = "Primary TDM0 Playback",
6119 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6120 .platform_name = "msm-pcm-routing",
6121 .codec_name = "msm-stub-codec.1",
6122 .codec_dai_name = "msm-stub-rx",
6123 .no_pcm = 1,
6124 .dpcm_playback = 1,
6125 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6126 .be_hw_params_fixup = msm_be_hw_params_fixup,
6127 .ops = &kona_tdm_be_ops,
6128 .ignore_suspend = 1,
6129 .ignore_pmdown_time = 1,
6130 },
6131 {
6132 .name = LPASS_BE_PRI_TDM_TX_0,
6133 .stream_name = "Primary TDM0 Capture",
6134 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6135 .platform_name = "msm-pcm-routing",
6136 .codec_name = "msm-stub-codec.1",
6137 .codec_dai_name = "msm-stub-tx",
6138 .no_pcm = 1,
6139 .dpcm_capture = 1,
6140 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6141 .be_hw_params_fixup = msm_be_hw_params_fixup,
6142 .ops = &kona_tdm_be_ops,
6143 .ignore_suspend = 1,
6144 },
6145 {
6146 .name = LPASS_BE_SEC_TDM_RX_0,
6147 .stream_name = "Secondary TDM0 Playback",
6148 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6149 .platform_name = "msm-pcm-routing",
6150 .codec_name = "msm-stub-codec.1",
6151 .codec_dai_name = "msm-stub-rx",
6152 .no_pcm = 1,
6153 .dpcm_playback = 1,
6154 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6155 .be_hw_params_fixup = msm_be_hw_params_fixup,
6156 .ops = &kona_tdm_be_ops,
6157 .ignore_suspend = 1,
6158 .ignore_pmdown_time = 1,
6159 },
6160 {
6161 .name = LPASS_BE_SEC_TDM_TX_0,
6162 .stream_name = "Secondary TDM0 Capture",
6163 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6164 .platform_name = "msm-pcm-routing",
6165 .codec_name = "msm-stub-codec.1",
6166 .codec_dai_name = "msm-stub-tx",
6167 .no_pcm = 1,
6168 .dpcm_capture = 1,
6169 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6170 .be_hw_params_fixup = msm_be_hw_params_fixup,
6171 .ops = &kona_tdm_be_ops,
6172 .ignore_suspend = 1,
6173 },
6174 {
6175 .name = LPASS_BE_TERT_TDM_RX_0,
6176 .stream_name = "Tertiary TDM0 Playback",
6177 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6178 .platform_name = "msm-pcm-routing",
6179 .codec_name = "msm-stub-codec.1",
6180 .codec_dai_name = "msm-stub-rx",
6181 .no_pcm = 1,
6182 .dpcm_playback = 1,
6183 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6184 .be_hw_params_fixup = msm_be_hw_params_fixup,
6185 .ops = &kona_tdm_be_ops,
6186 .ignore_suspend = 1,
6187 .ignore_pmdown_time = 1,
6188 },
6189 {
6190 .name = LPASS_BE_TERT_TDM_TX_0,
6191 .stream_name = "Tertiary TDM0 Capture",
6192 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6193 .platform_name = "msm-pcm-routing",
6194 .codec_name = "msm-stub-codec.1",
6195 .codec_dai_name = "msm-stub-tx",
6196 .no_pcm = 1,
6197 .dpcm_capture = 1,
6198 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6199 .be_hw_params_fixup = msm_be_hw_params_fixup,
6200 .ops = &kona_tdm_be_ops,
6201 .ignore_suspend = 1,
6202 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6203 {
6204 .name = LPASS_BE_QUAT_TDM_RX_0,
6205 .stream_name = "Quaternary TDM0 Playback",
6206 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6207 .platform_name = "msm-pcm-routing",
6208 .codec_name = "msm-stub-codec.1",
6209 .codec_dai_name = "msm-stub-rx",
6210 .no_pcm = 1,
6211 .dpcm_playback = 1,
6212 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6213 .be_hw_params_fixup = msm_be_hw_params_fixup,
6214 .ops = &kona_tdm_be_ops,
6215 .ignore_suspend = 1,
6216 .ignore_pmdown_time = 1,
6217 },
6218 {
6219 .name = LPASS_BE_QUAT_TDM_TX_0,
6220 .stream_name = "Quaternary TDM0 Capture",
6221 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6222 .platform_name = "msm-pcm-routing",
6223 .codec_name = "msm-stub-codec.1",
6224 .codec_dai_name = "msm-stub-tx",
6225 .no_pcm = 1,
6226 .dpcm_capture = 1,
6227 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6228 .be_hw_params_fixup = msm_be_hw_params_fixup,
6229 .ops = &kona_tdm_be_ops,
6230 .ignore_suspend = 1,
6231 },
6232 {
6233 .name = LPASS_BE_QUIN_TDM_RX_0,
6234 .stream_name = "Quinary TDM0 Playback",
6235 .cpu_dai_name = "msm-dai-q6-tdm.36928",
6236 .platform_name = "msm-pcm-routing",
6237 .codec_name = "msm-stub-codec.1",
6238 .codec_dai_name = "msm-stub-rx",
6239 .no_pcm = 1,
6240 .dpcm_playback = 1,
6241 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
6242 .be_hw_params_fixup = msm_be_hw_params_fixup,
6243 .ops = &kona_tdm_be_ops,
6244 .ignore_suspend = 1,
6245 .ignore_pmdown_time = 1,
6246 },
6247 {
6248 .name = LPASS_BE_QUIN_TDM_TX_0,
6249 .stream_name = "Quinary TDM0 Capture",
6250 .cpu_dai_name = "msm-dai-q6-tdm.36929",
6251 .platform_name = "msm-pcm-routing",
6252 .codec_name = "msm-stub-codec.1",
6253 .codec_dai_name = "msm-stub-tx",
6254 .no_pcm = 1,
6255 .dpcm_capture = 1,
6256 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
6257 .be_hw_params_fixup = msm_be_hw_params_fixup,
6258 .ops = &kona_tdm_be_ops,
6259 .ignore_suspend = 1,
6260 },
6261 {
6262 .name = LPASS_BE_SEN_TDM_RX_0,
6263 .stream_name = "Senary TDM0 Playback",
6264 .cpu_dai_name = "msm-dai-q6-tdm.36944",
6265 .platform_name = "msm-pcm-routing",
6266 .codec_name = "msm-stub-codec.1",
6267 .codec_dai_name = "msm-stub-rx",
6268 .no_pcm = 1,
6269 .dpcm_playback = 1,
6270 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
6271 .be_hw_params_fixup = msm_be_hw_params_fixup,
6272 .ops = &kona_tdm_be_ops,
6273 .ignore_suspend = 1,
6274 .ignore_pmdown_time = 1,
6275 },
6276 {
6277 .name = LPASS_BE_SEN_TDM_TX_0,
6278 .stream_name = "Senary TDM0 Capture",
6279 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6280 .platform_name = "msm-pcm-routing",
6281 .codec_name = "msm-stub-codec.1",
6282 .codec_dai_name = "msm-stub-tx",
6283 .no_pcm = 1,
6284 .dpcm_capture = 1,
6285 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6286 .be_hw_params_fixup = msm_be_hw_params_fixup,
6287 .ops = &kona_tdm_be_ops,
6288 .ignore_suspend = 1,
6289 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6290};
6291
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6292static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6293 {
6294 .name = LPASS_BE_SLIMBUS_7_RX,
6295 .stream_name = "Slimbus7 Playback",
6296 .cpu_dai_name = "msm-dai-q6-dev.16398",
6297 .platform_name = "msm-pcm-routing",
6298 .codec_name = "btfmslim_slave",
6299 /* BT codec driver determines capabilities based on
6300 * dai name, bt codecdai name should always contains
6301 * supported usecase information
6302 */
6303 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6304 .no_pcm = 1,
6305 .dpcm_playback = 1,
6306 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6307 .be_hw_params_fixup = msm_be_hw_params_fixup,
6308 .init = &msm_wcn_init,
6309 .ops = &msm_wcn_ops,
6310 /* dai link has playback support */
6311 .ignore_pmdown_time = 1,
6312 .ignore_suspend = 1,
6313 },
6314 {
6315 .name = LPASS_BE_SLIMBUS_7_TX,
6316 .stream_name = "Slimbus7 Capture",
6317 .cpu_dai_name = "msm-dai-q6-dev.16399",
6318 .platform_name = "msm-pcm-routing",
6319 .codec_name = "btfmslim_slave",
6320 .codec_dai_name = "btfm_bt_sco_slim_tx",
6321 .no_pcm = 1,
6322 .dpcm_capture = 1,
6323 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6324 .be_hw_params_fixup = msm_be_hw_params_fixup,
6325 .ops = &msm_wcn_ops,
6326 .ignore_suspend = 1,
6327 },
6328};
6329
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6330static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6331 {
6332 .name = LPASS_BE_SLIMBUS_7_RX,
6333 .stream_name = "Slimbus7 Playback",
6334 .cpu_dai_name = "msm-dai-q6-dev.16398",
6335 .platform_name = "msm-pcm-routing",
6336 .codec_name = "btfmslim_slave",
6337 /* BT codec driver determines capabilities based on
6338 * dai name, bt codecdai name should always contains
6339 * supported usecase information
6340 */
6341 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6342 .no_pcm = 1,
6343 .dpcm_playback = 1,
6344 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6345 .be_hw_params_fixup = msm_be_hw_params_fixup,
6346 .init = &msm_wcn_init_lito,
6347 .ops = &msm_wcn_ops_lito,
6348 /* dai link has playback support */
6349 .ignore_pmdown_time = 1,
6350 .ignore_suspend = 1,
6351 },
6352 {
6353 .name = LPASS_BE_SLIMBUS_7_TX,
6354 .stream_name = "Slimbus7 Capture",
6355 .cpu_dai_name = "msm-dai-q6-dev.16399",
6356 .platform_name = "msm-pcm-routing",
6357 .codec_name = "btfmslim_slave",
6358 .codec_dai_name = "btfm_bt_sco_slim_tx",
6359 .no_pcm = 1,
6360 .dpcm_capture = 1,
6361 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6362 .be_hw_params_fixup = msm_be_hw_params_fixup,
6363 .ops = &msm_wcn_ops_lito,
6364 .ignore_suspend = 1,
6365 },
6366 {
6367 .name = LPASS_BE_SLIMBUS_8_TX,
6368 .stream_name = "Slimbus8 Capture",
6369 .cpu_dai_name = "msm-dai-q6-dev.16401",
6370 .platform_name = "msm-pcm-routing",
6371 .codec_name = "btfmslim_slave",
6372 .codec_dai_name = "btfm_fm_slim_tx",
6373 .no_pcm = 1,
6374 .dpcm_capture = 1,
6375 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6376 .be_hw_params_fixup = msm_be_hw_params_fixup,
6377 .ops = &msm_wcn_ops_lito,
6378 .ignore_suspend = 1,
6379 },
6380};
6381
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6382static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6383 /* DISP PORT BACK END DAI Link */
6384 {
6385 .name = LPASS_BE_DISPLAY_PORT,
6386 .stream_name = "Display Port Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6387 .cpu_dai_name = "msm-dai-q6-dp.0",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6388 .platform_name = "msm-pcm-routing",
6389 .codec_name = "msm-ext-disp-audio-codec-rx",
6390 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6391 .no_pcm = 1,
6392 .dpcm_playback = 1,
6393 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6394 .be_hw_params_fixup = msm_be_hw_params_fixup,
6395 .ignore_pmdown_time = 1,
6396 .ignore_suspend = 1,
6397 },
6398 /* DISP PORT 1 BACK END DAI Link */
6399 {
6400 .name = LPASS_BE_DISPLAY_PORT1,
6401 .stream_name = "Display Port1 Playback",
Vignesh Kulothunganf86a3552019-07-11 15:46:25 -0700[diff] [blame]6402 .cpu_dai_name = "msm-dai-q6-dp.1",
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6403 .platform_name = "msm-pcm-routing",
6404 .codec_name = "msm-ext-disp-audio-codec-rx",
6405 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6406 .no_pcm = 1,
6407 .dpcm_playback = 1,
6408 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6409 .be_hw_params_fixup = msm_be_hw_params_fixup,
6410 .ignore_pmdown_time = 1,
6411 .ignore_suspend = 1,
6412 },
6413};
6414
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6415static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6416 {
6417 .name = LPASS_BE_PRI_MI2S_RX,
6418 .stream_name = "Primary MI2S Playback",
6419 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6420 .platform_name = "msm-pcm-routing",
6421 .codec_name = "msm-stub-codec.1",
6422 .codec_dai_name = "msm-stub-rx",
6423 .no_pcm = 1,
6424 .dpcm_playback = 1,
6425 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6426 .be_hw_params_fixup = msm_be_hw_params_fixup,
6427 .ops = &msm_mi2s_be_ops,
6428 .ignore_suspend = 1,
6429 .ignore_pmdown_time = 1,
6430 },
6431 {
6432 .name = LPASS_BE_PRI_MI2S_TX,
6433 .stream_name = "Primary MI2S Capture",
6434 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6435 .platform_name = "msm-pcm-routing",
6436 .codec_name = "msm-stub-codec.1",
6437 .codec_dai_name = "msm-stub-tx",
6438 .no_pcm = 1,
6439 .dpcm_capture = 1,
6440 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6441 .be_hw_params_fixup = msm_be_hw_params_fixup,
6442 .ops = &msm_mi2s_be_ops,
6443 .ignore_suspend = 1,
6444 },
6445 {
6446 .name = LPASS_BE_SEC_MI2S_RX,
6447 .stream_name = "Secondary MI2S Playback",
6448 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6449 .platform_name = "msm-pcm-routing",
6450 .codec_name = "msm-stub-codec.1",
6451 .codec_dai_name = "msm-stub-rx",
6452 .no_pcm = 1,
6453 .dpcm_playback = 1,
6454 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6455 .be_hw_params_fixup = msm_be_hw_params_fixup,
6456 .ops = &msm_mi2s_be_ops,
6457 .ignore_suspend = 1,
6458 .ignore_pmdown_time = 1,
6459 },
6460 {
6461 .name = LPASS_BE_SEC_MI2S_TX,
6462 .stream_name = "Secondary MI2S Capture",
6463 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6464 .platform_name = "msm-pcm-routing",
6465 .codec_name = "msm-stub-codec.1",
6466 .codec_dai_name = "msm-stub-tx",
6467 .no_pcm = 1,
6468 .dpcm_capture = 1,
6469 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6470 .be_hw_params_fixup = msm_be_hw_params_fixup,
6471 .ops = &msm_mi2s_be_ops,
6472 .ignore_suspend = 1,
6473 },
6474 {
6475 .name = LPASS_BE_TERT_MI2S_RX,
6476 .stream_name = "Tertiary MI2S Playback",
6477 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6478 .platform_name = "msm-pcm-routing",
6479 .codec_name = "msm-stub-codec.1",
6480 .codec_dai_name = "msm-stub-rx",
6481 .no_pcm = 1,
6482 .dpcm_playback = 1,
6483 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6484 .be_hw_params_fixup = msm_be_hw_params_fixup,
6485 .ops = &msm_mi2s_be_ops,
6486 .ignore_suspend = 1,
6487 .ignore_pmdown_time = 1,
6488 },
6489 {
6490 .name = LPASS_BE_TERT_MI2S_TX,
6491 .stream_name = "Tertiary MI2S Capture",
6492 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6493 .platform_name = "msm-pcm-routing",
6494 .codec_name = "msm-stub-codec.1",
6495 .codec_dai_name = "msm-stub-tx",
6496 .no_pcm = 1,
6497 .dpcm_capture = 1,
6498 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6499 .be_hw_params_fixup = msm_be_hw_params_fixup,
6500 .ops = &msm_mi2s_be_ops,
6501 .ignore_suspend = 1,
6502 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6503 {
6504 .name = LPASS_BE_QUAT_MI2S_RX,
6505 .stream_name = "Quaternary MI2S Playback",
6506 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6507 .platform_name = "msm-pcm-routing",
6508 .codec_name = "msm-stub-codec.1",
6509 .codec_dai_name = "msm-stub-rx",
6510 .no_pcm = 1,
6511 .dpcm_playback = 1,
6512 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6513 .be_hw_params_fixup = msm_be_hw_params_fixup,
6514 .ops = &msm_mi2s_be_ops,
6515 .ignore_suspend = 1,
6516 .ignore_pmdown_time = 1,
6517 },
6518 {
6519 .name = LPASS_BE_QUAT_MI2S_TX,
6520 .stream_name = "Quaternary MI2S Capture",
6521 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6522 .platform_name = "msm-pcm-routing",
6523 .codec_name = "msm-stub-codec.1",
6524 .codec_dai_name = "msm-stub-tx",
6525 .no_pcm = 1,
6526 .dpcm_capture = 1,
6527 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6528 .be_hw_params_fixup = msm_be_hw_params_fixup,
6529 .ops = &msm_mi2s_be_ops,
6530 .ignore_suspend = 1,
6531 },
6532 {
6533 .name = LPASS_BE_QUIN_MI2S_RX,
6534 .stream_name = "Quinary MI2S Playback",
6535 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6536 .platform_name = "msm-pcm-routing",
6537 .codec_name = "msm-stub-codec.1",
6538 .codec_dai_name = "msm-stub-rx",
6539 .no_pcm = 1,
6540 .dpcm_playback = 1,
6541 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6542 .be_hw_params_fixup = msm_be_hw_params_fixup,
6543 .ops = &msm_mi2s_be_ops,
6544 .ignore_suspend = 1,
6545 .ignore_pmdown_time = 1,
6546 },
6547 {
6548 .name = LPASS_BE_QUIN_MI2S_TX,
6549 .stream_name = "Quinary MI2S Capture",
6550 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6551 .platform_name = "msm-pcm-routing",
6552 .codec_name = "msm-stub-codec.1",
6553 .codec_dai_name = "msm-stub-tx",
6554 .no_pcm = 1,
6555 .dpcm_capture = 1,
6556 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6557 .be_hw_params_fixup = msm_be_hw_params_fixup,
6558 .ops = &msm_mi2s_be_ops,
6559 .ignore_suspend = 1,
6560 },
6561 {
6562 .name = LPASS_BE_SENARY_MI2S_RX,
6563 .stream_name = "Senary MI2S Playback",
6564 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6565 .platform_name = "msm-pcm-routing",
6566 .codec_name = "msm-stub-codec.1",
6567 .codec_dai_name = "msm-stub-rx",
6568 .no_pcm = 1,
6569 .dpcm_playback = 1,
6570 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6571 .be_hw_params_fixup = msm_be_hw_params_fixup,
6572 .ops = &msm_mi2s_be_ops,
6573 .ignore_suspend = 1,
6574 .ignore_pmdown_time = 1,
6575 },
6576 {
6577 .name = LPASS_BE_SENARY_MI2S_TX,
6578 .stream_name = "Senary MI2S Capture",
6579 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6580 .platform_name = "msm-pcm-routing",
6581 .codec_name = "msm-stub-codec.1",
6582 .codec_dai_name = "msm-stub-tx",
6583 .no_pcm = 1,
6584 .dpcm_capture = 1,
6585 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6586 .be_hw_params_fixup = msm_be_hw_params_fixup,
6587 .ops = &msm_mi2s_be_ops,
6588 .ignore_suspend = 1,
6589 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6590};
6591
6592static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6593 /* Primary AUX PCM Backend DAI Links */
6594 {
6595 .name = LPASS_BE_AUXPCM_RX,
6596 .stream_name = "AUX PCM Playback",
6597 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6598 .platform_name = "msm-pcm-routing",
6599 .codec_name = "msm-stub-codec.1",
6600 .codec_dai_name = "msm-stub-rx",
6601 .no_pcm = 1,
6602 .dpcm_playback = 1,
6603 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6604 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6605 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6606 .ignore_pmdown_time = 1,
6607 .ignore_suspend = 1,
6608 },
6609 {
6610 .name = LPASS_BE_AUXPCM_TX,
6611 .stream_name = "AUX PCM Capture",
6612 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6613 .platform_name = "msm-pcm-routing",
6614 .codec_name = "msm-stub-codec.1",
6615 .codec_dai_name = "msm-stub-tx",
6616 .no_pcm = 1,
6617 .dpcm_capture = 1,
6618 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6619 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6620 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6621 .ignore_suspend = 1,
6622 },
6623 /* Secondary AUX PCM Backend DAI Links */
6624 {
6625 .name = LPASS_BE_SEC_AUXPCM_RX,
6626 .stream_name = "Sec AUX PCM Playback",
6627 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6628 .platform_name = "msm-pcm-routing",
6629 .codec_name = "msm-stub-codec.1",
6630 .codec_dai_name = "msm-stub-rx",
6631 .no_pcm = 1,
6632 .dpcm_playback = 1,
6633 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6634 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6635 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6636 .ignore_pmdown_time = 1,
6637 .ignore_suspend = 1,
6638 },
6639 {
6640 .name = LPASS_BE_SEC_AUXPCM_TX,
6641 .stream_name = "Sec AUX PCM Capture",
6642 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6643 .platform_name = "msm-pcm-routing",
6644 .codec_name = "msm-stub-codec.1",
6645 .codec_dai_name = "msm-stub-tx",
6646 .no_pcm = 1,
6647 .dpcm_capture = 1,
6648 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6649 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6650 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6651 .ignore_suspend = 1,
6652 },
6653 /* Tertiary AUX PCM Backend DAI Links */
6654 {
6655 .name = LPASS_BE_TERT_AUXPCM_RX,
6656 .stream_name = "Tert AUX PCM Playback",
6657 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6658 .platform_name = "msm-pcm-routing",
6659 .codec_name = "msm-stub-codec.1",
6660 .codec_dai_name = "msm-stub-rx",
6661 .no_pcm = 1,
6662 .dpcm_playback = 1,
6663 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6665 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6666 .ignore_suspend = 1,
6667 },
6668 {
6669 .name = LPASS_BE_TERT_AUXPCM_TX,
6670 .stream_name = "Tert AUX PCM Capture",
6671 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6672 .platform_name = "msm-pcm-routing",
6673 .codec_name = "msm-stub-codec.1",
6674 .codec_dai_name = "msm-stub-tx",
6675 .no_pcm = 1,
6676 .dpcm_capture = 1,
6677 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6678 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6679 .ops = &kona_aux_be_ops,
6680 .ignore_suspend = 1,
6681 },
6682 /* Quaternary AUX PCM Backend DAI Links */
6683 {
6684 .name = LPASS_BE_QUAT_AUXPCM_RX,
6685 .stream_name = "Quat AUX PCM Playback",
6686 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6687 .platform_name = "msm-pcm-routing",
6688 .codec_name = "msm-stub-codec.1",
6689 .codec_dai_name = "msm-stub-rx",
6690 .no_pcm = 1,
6691 .dpcm_playback = 1,
6692 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6693 .be_hw_params_fixup = msm_be_hw_params_fixup,
6694 .ops = &kona_aux_be_ops,
6695 .ignore_suspend = 1,
6696 },
6697 {
6698 .name = LPASS_BE_QUAT_AUXPCM_TX,
6699 .stream_name = "Quat AUX PCM Capture",
6700 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6701 .platform_name = "msm-pcm-routing",
6702 .codec_name = "msm-stub-codec.1",
6703 .codec_dai_name = "msm-stub-tx",
6704 .no_pcm = 1,
6705 .dpcm_capture = 1,
6706 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6707 .be_hw_params_fixup = msm_be_hw_params_fixup,
6708 .ops = &kona_aux_be_ops,
6709 .ignore_suspend = 1,
6710 },
6711 /* Quinary AUX PCM Backend DAI Links */
6712 {
6713 .name = LPASS_BE_QUIN_AUXPCM_RX,
6714 .stream_name = "Quin AUX PCM Playback",
6715 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6716 .platform_name = "msm-pcm-routing",
6717 .codec_name = "msm-stub-codec.1",
6718 .codec_dai_name = "msm-stub-rx",
6719 .no_pcm = 1,
6720 .dpcm_playback = 1,
6721 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6722 .be_hw_params_fixup = msm_be_hw_params_fixup,
6723 .ops = &kona_aux_be_ops,
6724 .ignore_suspend = 1,
6725 },
6726 {
6727 .name = LPASS_BE_QUIN_AUXPCM_TX,
6728 .stream_name = "Quin AUX PCM Capture",
6729 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6730 .platform_name = "msm-pcm-routing",
6731 .codec_name = "msm-stub-codec.1",
6732 .codec_dai_name = "msm-stub-tx",
6733 .no_pcm = 1,
6734 .dpcm_capture = 1,
6735 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6736 .be_hw_params_fixup = msm_be_hw_params_fixup,
6737 .ops = &kona_aux_be_ops,
6738 .ignore_suspend = 1,
6739 },
6740 /* Senary AUX PCM Backend DAI Links */
6741 {
6742 .name = LPASS_BE_SEN_AUXPCM_RX,
6743 .stream_name = "Sen AUX PCM Playback",
6744 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6745 .platform_name = "msm-pcm-routing",
6746 .codec_name = "msm-stub-codec.1",
6747 .codec_dai_name = "msm-stub-rx",
6748 .no_pcm = 1,
6749 .dpcm_playback = 1,
6750 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6751 .be_hw_params_fixup = msm_be_hw_params_fixup,
6752 .ops = &kona_aux_be_ops,
6753 .ignore_suspend = 1,
6754 },
6755 {
6756 .name = LPASS_BE_SEN_AUXPCM_TX,
6757 .stream_name = "Sen AUX PCM Capture",
6758 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6759 .platform_name = "msm-pcm-routing",
6760 .codec_name = "msm-stub-codec.1",
6761 .codec_dai_name = "msm-stub-tx",
6762 .no_pcm = 1,
6763 .dpcm_capture = 1,
6764 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6765 .be_hw_params_fixup = msm_be_hw_params_fixup,
6766 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6767 .ignore_suspend = 1,
6768 },
6769};
6770
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6771static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6772 /* WSA CDC DMA Backend DAI Links */
6773 {
6774 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6775 .stream_name = "WSA CDC DMA0 Playback",
6776 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6777 .platform_name = "msm-pcm-routing",
6778 .codec_name = "bolero_codec",
6779 .codec_dai_name = "wsa_macro_rx1",
6780 .no_pcm = 1,
6781 .dpcm_playback = 1,
6782 .init = &msm_int_audrx_init,
6783 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6784 .be_hw_params_fixup = msm_be_hw_params_fixup,
6785 .ignore_pmdown_time = 1,
6786 .ignore_suspend = 1,
6787 .ops = &msm_cdc_dma_be_ops,
6788 },
6789 {
6790 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6791 .stream_name = "WSA CDC DMA1 Playback",
6792 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6793 .platform_name = "msm-pcm-routing",
6794 .codec_name = "bolero_codec",
6795 .codec_dai_name = "wsa_macro_rx_mix",
6796 .no_pcm = 1,
6797 .dpcm_playback = 1,
6798 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6799 .be_hw_params_fixup = msm_be_hw_params_fixup,
6800 .ignore_pmdown_time = 1,
6801 .ignore_suspend = 1,
6802 .ops = &msm_cdc_dma_be_ops,
6803 },
6804 {
6805 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6806 .stream_name = "WSA CDC DMA1 Capture",
6807 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6808 .platform_name = "msm-pcm-routing",
6809 .codec_name = "bolero_codec",
6810 .codec_dai_name = "wsa_macro_echo",
6811 .no_pcm = 1,
6812 .dpcm_capture = 1,
6813 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6814 .be_hw_params_fixup = msm_be_hw_params_fixup,
6815 .ignore_suspend = 1,
6816 .ops = &msm_cdc_dma_be_ops,
6817 },
6818};
6819
6820static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6821 /* RX CDC DMA Backend DAI Links */
6822 {
6823 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6824 .stream_name = "RX CDC DMA0 Playback",
6825 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6826 .platform_name = "msm-pcm-routing",
6827 .codec_name = "bolero_codec",
6828 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6829 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6830 .no_pcm = 1,
6831 .dpcm_playback = 1,
6832 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6833 .be_hw_params_fixup = msm_be_hw_params_fixup,
6834 .ignore_pmdown_time = 1,
6835 .ignore_suspend = 1,
6836 .ops = &msm_cdc_dma_be_ops,
6837 },
6838 {
6839 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6840 .stream_name = "RX CDC DMA1 Playback",
6841 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6842 .platform_name = "msm-pcm-routing",
6843 .codec_name = "bolero_codec",
6844 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6845 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6846 .no_pcm = 1,
6847 .dpcm_playback = 1,
6848 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6849 .be_hw_params_fixup = msm_be_hw_params_fixup,
6850 .ignore_pmdown_time = 1,
6851 .ignore_suspend = 1,
6852 .ops = &msm_cdc_dma_be_ops,
6853 },
6854 {
6855 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6856 .stream_name = "RX CDC DMA2 Playback",
6857 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6858 .platform_name = "msm-pcm-routing",
6859 .codec_name = "bolero_codec",
6860 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6861 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6862 .no_pcm = 1,
6863 .dpcm_playback = 1,
6864 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6865 .be_hw_params_fixup = msm_be_hw_params_fixup,
6866 .ignore_pmdown_time = 1,
6867 .ignore_suspend = 1,
6868 .ops = &msm_cdc_dma_be_ops,
6869 },
6870 {
6871 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6872 .stream_name = "RX CDC DMA3 Playback",
6873 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6874 .platform_name = "msm-pcm-routing",
6875 .codec_name = "bolero_codec",
6876 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6877 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6878 .no_pcm = 1,
6879 .dpcm_playback = 1,
6880 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6881 .be_hw_params_fixup = msm_be_hw_params_fixup,
6882 .ignore_pmdown_time = 1,
6883 .ignore_suspend = 1,
6884 .ops = &msm_cdc_dma_be_ops,
6885 },
6886 /* TX CDC DMA Backend DAI Links */
6887 {
6888 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6889 .stream_name = "TX CDC DMA3 Capture",
6890 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6891 .platform_name = "msm-pcm-routing",
6892 .codec_name = "bolero_codec",
6893 .codec_dai_name = "tx_macro_tx1",
6894 .no_pcm = 1,
6895 .dpcm_capture = 1,
6896 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
6897 .be_hw_params_fixup = msm_be_hw_params_fixup,
6898 .ignore_suspend = 1,
6899 .ops = &msm_cdc_dma_be_ops,
6900 },
6901 {
6902 .name = LPASS_BE_TX_CDC_DMA_TX_4,
6903 .stream_name = "TX CDC DMA4 Capture",
6904 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
6905 .platform_name = "msm-pcm-routing",
6906 .codec_name = "bolero_codec",
6907 .codec_dai_name = "tx_macro_tx2",
6908 .no_pcm = 1,
6909 .dpcm_capture = 1,
6910 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
6911 .be_hw_params_fixup = msm_be_hw_params_fixup,
6912 .ignore_suspend = 1,
6913 .ops = &msm_cdc_dma_be_ops,
6914 },
6915};
6916
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6917static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
6918 {
6919 .name = LPASS_BE_VA_CDC_DMA_TX_0,
6920 .stream_name = "VA CDC DMA0 Capture",
6921 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
6922 .platform_name = "msm-pcm-routing",
6923 .codec_name = "bolero_codec",
6924 .codec_dai_name = "va_macro_tx1",
6925 .no_pcm = 1,
6926 .dpcm_capture = 1,
6927 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
6928 .be_hw_params_fixup = msm_be_hw_params_fixup,
6929 .ignore_suspend = 1,
6930 .ops = &msm_cdc_dma_be_ops,
6931 },
6932 {
6933 .name = LPASS_BE_VA_CDC_DMA_TX_1,
6934 .stream_name = "VA CDC DMA1 Capture",
6935 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
6936 .platform_name = "msm-pcm-routing",
6937 .codec_name = "bolero_codec",
6938 .codec_dai_name = "va_macro_tx2",
6939 .no_pcm = 1,
6940 .dpcm_capture = 1,
6941 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
6942 .be_hw_params_fixup = msm_be_hw_params_fixup,
6943 .ignore_suspend = 1,
6944 .ops = &msm_cdc_dma_be_ops,
6945 },
6946 {
6947 .name = LPASS_BE_VA_CDC_DMA_TX_2,
6948 .stream_name = "VA CDC DMA2 Capture",
6949 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
6950 .platform_name = "msm-pcm-routing",
6951 .codec_name = "bolero_codec",
6952 .codec_dai_name = "va_macro_tx3",
6953 .no_pcm = 1,
6954 .dpcm_capture = 1,
6955 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
6956 .be_hw_params_fixup = msm_be_hw_params_fixup,
6957 .ignore_suspend = 1,
6958 .ops = &msm_cdc_dma_be_ops,
6959 },
6960};
6961
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6962static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
6963 {
6964 .name = LPASS_BE_AFE_LOOPBACK_TX,
6965 .stream_name = "AFE Loopback Capture",
6966 .cpu_dai_name = "msm-dai-q6-dev.24577",
6967 .platform_name = "msm-pcm-routing",
6968 .codec_name = "msm-stub-codec.1",
6969 .codec_dai_name = "msm-stub-tx",
6970 .no_pcm = 1,
6971 .dpcm_capture = 1,
6972 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
6973 .be_hw_params_fixup = msm_be_hw_params_fixup,
6974 .ignore_pmdown_time = 1,
6975 .ignore_suspend = 1,
6976 },
6977};
6978
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6979static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6980 ARRAY_SIZE(msm_common_dai_links) +
6981 ARRAY_SIZE(msm_bolero_fe_dai_links) +
6982 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
6983 ARRAY_SIZE(msm_common_be_dai_links) +
6984 ARRAY_SIZE(msm_mi2s_be_dai_links) +
6985 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
6986 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6987 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6988 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
6989 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6990 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6991 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
6992 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6993
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6994static int msm_populate_dai_link_component_of_node(
6995 struct snd_soc_card *card)
6996{
6997 int i, index, ret = 0;
6998 struct device *cdev = card->dev;
6999 struct snd_soc_dai_link *dai_link = card->dai_link;
7000 struct device_node *np;
7001
7002 if (!cdev) {
7003 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
7004 return -ENODEV;
7005 }
7006
7007 for (i = 0; i < card->num_links; i++) {
7008 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7009 continue;
7010
7011 /* populate platform_of_node for snd card dai links */
7012 if (dai_link[i].platform_name &&
7013 !dai_link[i].platform_of_node) {
7014 index = of_property_match_string(cdev->of_node,
7015 "asoc-platform-names",
7016 dai_link[i].platform_name);
7017 if (index < 0) {
7018 dev_err(cdev, "%s: No match found for platform name: %s\n",
7019 __func__, dai_link[i].platform_name);
7020 ret = index;
7021 goto err;
7022 }
7023 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7024 index);
7025 if (!np) {
7026 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
7027 __func__, dai_link[i].platform_name,
7028 index);
7029 ret = -ENODEV;
7030 goto err;
7031 }
7032 dai_link[i].platform_of_node = np;
7033 dai_link[i].platform_name = NULL;
7034 }
7035
7036 /* populate cpu_of_node for snd card dai links */
7037 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7038 index = of_property_match_string(cdev->of_node,
7039 "asoc-cpu-names",
7040 dai_link[i].cpu_dai_name);
7041 if (index >= 0) {
7042 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7043 index);
7044 if (!np) {
7045 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
7046 __func__,
7047 dai_link[i].cpu_dai_name);
7048 ret = -ENODEV;
7049 goto err;
7050 }
7051 dai_link[i].cpu_of_node = np;
7052 dai_link[i].cpu_dai_name = NULL;
7053 }
7054 }
7055
7056 /* populate codec_of_node for snd card dai links */
7057 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7058 index = of_property_match_string(cdev->of_node,
7059 "asoc-codec-names",
7060 dai_link[i].codec_name);
7061 if (index < 0)
7062 continue;
7063 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7064 index);
7065 if (!np) {
7066 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
7067 __func__, dai_link[i].codec_name);
7068 ret = -ENODEV;
7069 goto err;
7070 }
7071 dai_link[i].codec_of_node = np;
7072 dai_link[i].codec_name = NULL;
7073 }
7074 }
7075
7076err:
7077 return ret;
7078}
7079
7080static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7081{
7082 int ret = -EINVAL;
7083 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
7084
7085 if (!component) {
7086 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
7087 return ret;
7088 }
7089
7090 ret = snd_soc_add_component_controls(component, msm_snd_controls,
7091 ARRAY_SIZE(msm_snd_controls));
7092 if (ret < 0) {
7093 dev_err(component->dev,
7094 "%s: add_codec_controls failed, err = %d\n",
7095 __func__, ret);
7096 return ret;
7097 }
7098
7099 return ret;
7100}
7101
7102static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7103 struct snd_pcm_hw_params *params)
7104{
7105 return 0;
7106}
7107
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7108static struct snd_soc_ops msm_stub_be_ops = {
7109 .hw_params = msm_snd_stub_hw_params,
7110};
7111
7112struct snd_soc_card snd_soc_card_stub_msm = {
7113 .name = "kona-stub-snd-card",
7114};
7115
7116static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7117 /* FrontEnd DAI Links */
7118 {
7119 .name = "MSMSTUB Media1",
7120 .stream_name = "MultiMedia1",
7121 .cpu_dai_name = "MultiMedia1",
7122 .platform_name = "msm-pcm-dsp.0",
7123 .dynamic = 1,
7124 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7125 .dpcm_playback = 1,
7126 .dpcm_capture = 1,
7127 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7128 SND_SOC_DPCM_TRIGGER_POST},
7129 .codec_dai_name = "snd-soc-dummy-dai",
7130 .codec_name = "snd-soc-dummy",
7131 .ignore_suspend = 1,
7132 /* this dainlink has playback support */
7133 .ignore_pmdown_time = 1,
7134 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7135 },
7136};
7137
7138static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7139 /* Backend DAI Links */
7140 {
7141 .name = LPASS_BE_AUXPCM_RX,
7142 .stream_name = "AUX PCM Playback",
7143 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7144 .platform_name = "msm-pcm-routing",
7145 .codec_name = "msm-stub-codec.1",
7146 .codec_dai_name = "msm-stub-rx",
7147 .no_pcm = 1,
7148 .dpcm_playback = 1,
7149 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7150 .init = &msm_audrx_stub_init,
7151 .be_hw_params_fixup = msm_be_hw_params_fixup,
7152 .ignore_pmdown_time = 1,
7153 .ignore_suspend = 1,
7154 .ops = &msm_stub_be_ops,
7155 },
7156 {
7157 .name = LPASS_BE_AUXPCM_TX,
7158 .stream_name = "AUX PCM Capture",
7159 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7160 .platform_name = "msm-pcm-routing",
7161 .codec_name = "msm-stub-codec.1",
7162 .codec_dai_name = "msm-stub-tx",
7163 .no_pcm = 1,
7164 .dpcm_capture = 1,
7165 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7166 .be_hw_params_fixup = msm_be_hw_params_fixup,
7167 .ignore_suspend = 1,
7168 .ops = &msm_stub_be_ops,
7169 },
7170};
7171
7172static struct snd_soc_dai_link msm_stub_dai_links[
7173 ARRAY_SIZE(msm_stub_fe_dai_links) +
7174 ARRAY_SIZE(msm_stub_be_dai_links)];
7175
7176static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7177 { .compatible = "qcom,kona-asoc-snd",
7178 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7179 { .compatible = "qcom,kona-asoc-snd-stub",
7180 .data = "stub_codec"},
7181 {},
7182};
7183
7184static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7185{
7186 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7187 struct snd_soc_dai_link *dailink = NULL;
7188 int len_1 = 0;
7189 int len_2 = 0;
7190 int total_links = 0;
7191 int rc = 0;
7192 u32 mi2s_audio_intf = 0;
7193 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7194 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7195 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7196 const struct of_device_id *match;
7197
7198 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
7199 if (!match) {
7200 dev_err(dev, "%s: No DT match found for sound card\n",
7201 __func__);
7202 return NULL;
7203 }
7204
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7205 if (!strcmp(match->data, "codec")) {
7206 card = &snd_soc_card_kona_msm;
7207
7208 memcpy(msm_kona_dai_links + total_links,
7209 msm_common_dai_links,
7210 sizeof(msm_common_dai_links));
7211 total_links += ARRAY_SIZE(msm_common_dai_links);
7212
7213 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7214 msm_bolero_fe_dai_links,
7215 sizeof(msm_bolero_fe_dai_links));
7216 total_links +=
7217 ARRAY_SIZE(msm_bolero_fe_dai_links);
7218
7219 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7220 msm_common_misc_fe_dai_links,
7221 sizeof(msm_common_misc_fe_dai_links));
7222 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7223
7224 memcpy(msm_kona_dai_links + total_links,
7225 msm_common_be_dai_links,
7226 sizeof(msm_common_be_dai_links));
7227 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7228
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7229 memcpy(msm_kona_dai_links + total_links,
7230 msm_wsa_cdc_dma_be_dai_links,
7231 sizeof(msm_wsa_cdc_dma_be_dai_links));
7232 total_links +=
7233 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
7234
7235 memcpy(msm_kona_dai_links + total_links,
7236 msm_rx_tx_cdc_dma_be_dai_links,
7237 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7238 total_links +=
7239 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7240
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]7241 memcpy(msm_kona_dai_links + total_links,
7242 msm_va_cdc_dma_be_dai_links,
7243 sizeof(msm_va_cdc_dma_be_dai_links));
7244 total_links +=
7245 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
7246
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7247 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7248 &mi2s_audio_intf);
7249 if (rc) {
7250 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7251 __func__);
7252 } else {
7253 if (mi2s_audio_intf) {
7254 memcpy(msm_kona_dai_links + total_links,
7255 msm_mi2s_be_dai_links,
7256 sizeof(msm_mi2s_be_dai_links));
7257 total_links +=
7258 ARRAY_SIZE(msm_mi2s_be_dai_links);
7259 }
7260 }
7261
7262 rc = of_property_read_u32(dev->of_node,
7263 "qcom,auxpcm-audio-intf",
7264 &auxpcm_audio_intf);
7265 if (rc) {
7266 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7267 __func__);
7268 } else {
7269 if (auxpcm_audio_intf) {
7270 memcpy(msm_kona_dai_links + total_links,
7271 msm_auxpcm_be_dai_links,
7272 sizeof(msm_auxpcm_be_dai_links));
7273 total_links +=
7274 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7275 }
7276 }
7277
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7278 rc = of_property_read_u32(dev->of_node,
7279 "qcom,ext-disp-audio-rx", &val);
7280 if (!rc && val) {
7281 dev_dbg(dev, "%s(): ext disp audio support present\n",
7282 __func__);
7283 memcpy(msm_kona_dai_links + total_links,
7284 ext_disp_be_dai_link,
7285 sizeof(ext_disp_be_dai_link));
7286 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7287 }
7288
7289 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7290 if (!rc && val) {
7291 dev_dbg(dev, "%s(): WCN BT support present\n",
7292 __func__);
7293 memcpy(msm_kona_dai_links + total_links,
7294 msm_wcn_be_dai_links,
7295 sizeof(msm_wcn_be_dai_links));
7296 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7297 }
7298
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7299 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7300 &val);
7301 if (!rc && val) {
7302 memcpy(msm_kona_dai_links + total_links,
7303 msm_afe_rxtx_lb_be_dai_link,
7304 sizeof(msm_afe_rxtx_lb_be_dai_link));
7305 total_links +=
7306 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7307 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7308
7309 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7310 &wcn_btfm_intf);
7311 if (rc) {
7312 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7313 __func__);
7314 } else {
7315 if (wcn_btfm_intf) {
7316 memcpy(msm_kona_dai_links + total_links,
7317 msm_wcn_btfm_be_dai_links,
7318 sizeof(msm_wcn_btfm_be_dai_links));
7319 total_links +=
7320 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7321 }
7322 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7323 dailink = msm_kona_dai_links;
7324 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7325 card = &snd_soc_card_stub_msm;
7326 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7327 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7328
7329 memcpy(msm_stub_dai_links,
7330 msm_stub_fe_dai_links,
7331 sizeof(msm_stub_fe_dai_links));
7332 memcpy(msm_stub_dai_links + len_1,
7333 msm_stub_be_dai_links,
7334 sizeof(msm_stub_be_dai_links));
7335
7336 dailink = msm_stub_dai_links;
7337 total_links = len_2;
7338 }
7339
7340 if (card) {
7341 card->dai_link = dailink;
7342 card->num_links = total_links;
7343 }
7344
7345 return card;
7346}
7347
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7348static int msm_wsa881x_init(struct snd_soc_component *component)
7349{
7350 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7351 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7352 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7353 SPKR_L_BOOST, SPKR_L_VI};
7354 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7355 SPKR_R_BOOST, SPKR_R_VI};
7356 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7357 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7358 struct msm_asoc_mach_data *pdata;
7359 struct snd_soc_dapm_context *dapm;
7360 struct snd_card *card;
7361 struct snd_info_entry *entry;
7362 int ret = 0;
7363
7364 if (!component) {
7365 pr_err("%s component is NULL\n", __func__);
7366 return -EINVAL;
7367 }
7368
7369 card = component->card->snd_card;
7370 dapm = snd_soc_component_get_dapm(component);
7371
7372 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7373 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7374 __func__, component->name);
7375 wsa881x_set_channel_map(component, &spkleft_ports[0],
7376 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7377 &ch_rate[0], &spkleft_port_types[0]);
7378 if (dapm->component) {
7379 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7380 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7381 }
7382 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7383 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7384 __func__, component->name);
7385 wsa881x_set_channel_map(component, &spkright_ports[0],
7386 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7387 &ch_rate[0], &spkright_port_types[0]);
7388 if (dapm->component) {
7389 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7390 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7391 }
7392 } else {
7393 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7394 component->name);
7395 ret = -EINVAL;
7396 goto err;
7397 }
7398 pdata = snd_soc_card_get_drvdata(component->card);
7399 if (!pdata->codec_root) {
7400 entry = snd_info_create_subdir(card->module, "codecs",
7401 card->proc_root);
7402 if (!entry) {
7403 pr_err("%s: Cannot create codecs module entry\n",
7404 __func__);
7405 ret = 0;
7406 goto err;
7407 }
7408 pdata->codec_root = entry;
7409 }
7410 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7411 component);
7412err:
7413 return ret;
7414}
7415
7416static int msm_aux_codec_init(struct snd_soc_component *component)
7417{
7418 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7419 int ret = 0;
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7420 int codec_variant = -1;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7421 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7422 struct snd_info_entry *entry;
7423 struct snd_card *card = component->card->snd_card;
7424 struct msm_asoc_mach_data *pdata;
7425
7426 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7427 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7428 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7429 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7430 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7431 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7432 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7433 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7434 snd_soc_dapm_sync(dapm);
7435
7436 pdata = snd_soc_card_get_drvdata(component->card);
7437 if (!pdata->codec_root) {
7438 entry = snd_info_create_subdir(card->module, "codecs",
7439 card->proc_root);
7440 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7441 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7442 __func__);
7443 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7444 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7445 }
7446 pdata->codec_root = entry;
7447 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7448 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7449
Vignesh Kulothungan406c2bf2019-07-19 10:17:55 -0700[diff] [blame]7450 codec_variant = wcd938x_get_codec_variant(component);
7451 dev_dbg(component->dev, "%s: variant %d\n", __func__, codec_variant);
7452 if (codec_variant == WCD9380)
7453 ret = snd_soc_add_component_controls(component,
7454 msm_int_wcd9380_snd_controls,
7455 ARRAY_SIZE(msm_int_wcd9380_snd_controls));
7456 else if (codec_variant == WCD9385)
7457 ret = snd_soc_add_component_controls(component,
7458 msm_int_wcd9385_snd_controls,
7459 ARRAY_SIZE(msm_int_wcd9385_snd_controls));
7460
7461 if (ret < 0) {
7462 dev_err(component->dev, "%s: add codec specific snd controls failed: %d\n",
7463 __func__, ret);
7464 return ret;
7465 }
7466
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7467mbhc_cfg_cal:
7468 mbhc_calibration = def_wcd_mbhc_cal();
7469 if (!mbhc_calibration)
7470 return -ENOMEM;
7471 wcd_mbhc_cfg.calibration = mbhc_calibration;
7472 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7473 if (ret) {
7474 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7475 __func__, ret);
7476 goto err_hs_detect;
7477 }
7478 return 0;
7479
7480err_hs_detect:
7481 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7482 return ret;
7483}
7484
7485static int msm_init_aux_dev(struct platform_device *pdev,
7486 struct snd_soc_card *card)
7487{
7488 struct device_node *wsa_of_node;
7489 struct device_node *aux_codec_of_node;
7490 u32 wsa_max_devs;
7491 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7492 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7493 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7494 int i;
7495 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7496 struct aux_codec_dev_info *aux_cdc_dev_info;
7497 const char *auxdev_name_prefix[1];
7498 char *dev_name_str = NULL;
7499 int found = 0;
7500 int codecs_found = 0;
7501 int ret = 0;
7502
7503 /* Get maximum WSA device count for this platform */
7504 ret = of_property_read_u32(pdev->dev.of_node,
7505 "qcom,wsa-max-devs", &wsa_max_devs);
7506 if (ret) {
7507 dev_info(&pdev->dev,
7508 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7509 __func__, pdev->dev.of_node->full_name, ret);
7510 wsa_max_devs = 0;
7511 goto codec_aux_dev;
7512 }
7513 if (wsa_max_devs == 0) {
7514 dev_warn(&pdev->dev,
7515 "%s: Max WSA devices is 0 for this target?\n",
7516 __func__);
7517 goto codec_aux_dev;
7518 }
7519
7520 /* Get count of WSA device phandles for this platform */
7521 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7522 "qcom,wsa-devs", NULL);
7523 if (wsa_dev_cnt == -ENOENT) {
7524 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7525 __func__);
7526 goto err;
7527 } else if (wsa_dev_cnt <= 0) {
7528 dev_err(&pdev->dev,
7529 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7530 __func__, wsa_dev_cnt);
7531 ret = -EINVAL;
7532 goto err;
7533 }
7534
7535 /*
7536 * Expect total phandles count to be NOT less than maximum possible
7537 * WSA count. However, if it is less, then assign same value to
7538 * max count as well.
7539 */
7540 if (wsa_dev_cnt < wsa_max_devs) {
7541 dev_dbg(&pdev->dev,
7542 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7543 __func__, wsa_max_devs, wsa_dev_cnt);
7544 wsa_max_devs = wsa_dev_cnt;
7545 }
7546
7547 /* Make sure prefix string passed for each WSA device */
7548 ret = of_property_count_strings(pdev->dev.of_node,
7549 "qcom,wsa-aux-dev-prefix");
7550 if (ret != wsa_dev_cnt) {
7551 dev_err(&pdev->dev,
7552 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7553 __func__, wsa_dev_cnt, ret);
7554 ret = -EINVAL;
7555 goto err;
7556 }
7557
7558 /*
7559 * Alloc mem to store phandle and index info of WSA device, if already
7560 * registered with ALSA core
7561 */
7562 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7563 sizeof(struct msm_wsa881x_dev_info),
7564 GFP_KERNEL);
7565 if (!wsa881x_dev_info) {
7566 ret = -ENOMEM;
7567 goto err;
7568 }
7569
7570 /*
7571 * search and check whether all WSA devices are already
7572 * registered with ALSA core or not. If found a node, store
7573 * the node and the index in a local array of struct for later
7574 * use.
7575 */
7576 for (i = 0; i < wsa_dev_cnt; i++) {
7577 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7578 "qcom,wsa-devs", i);
7579 if (unlikely(!wsa_of_node)) {
7580 /* we should not be here */
7581 dev_err(&pdev->dev,
7582 "%s: wsa dev node is not present\n",
7583 __func__);
7584 ret = -EINVAL;
7585 goto err;
7586 }
7587 if (soc_find_component(wsa_of_node, NULL)) {
7588 /* WSA device registered with ALSA core */
7589 wsa881x_dev_info[found].of_node = wsa_of_node;
7590 wsa881x_dev_info[found].index = i;
7591 found++;
7592 if (found == wsa_max_devs)
7593 break;
7594 }
7595 }
7596
7597 if (found < wsa_max_devs) {
7598 dev_dbg(&pdev->dev,
7599 "%s: failed to find %d components. Found only %d\n",
7600 __func__, wsa_max_devs, found);
7601 return -EPROBE_DEFER;
7602 }
7603 dev_info(&pdev->dev,
7604 "%s: found %d wsa881x devices registered with ALSA core\n",
7605 __func__, found);
7606
7607codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7608 /* Get maximum aux codec device count for this platform */
7609 ret = of_property_read_u32(pdev->dev.of_node,
7610 "qcom,codec-max-aux-devs",
7611 &codec_max_aux_devs);
7612 if (ret) {
7613 dev_err(&pdev->dev,
7614 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7615 __func__, pdev->dev.of_node->full_name, ret);
7616 codec_max_aux_devs = 0;
7617 goto aux_dev_register;
7618 }
7619 if (codec_max_aux_devs == 0) {
7620 dev_dbg(&pdev->dev,
7621 "%s: Max aux codec devices is 0 for this target?\n",
7622 __func__);
7623 goto aux_dev_register;
7624 }
7625
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7626 /* Get count of aux codec device phandles for this platform */
7627 codec_aux_dev_cnt = of_count_phandle_with_args(
7628 pdev->dev.of_node,
7629 "qcom,codec-aux-devs", NULL);
7630 if (codec_aux_dev_cnt == -ENOENT) {
7631 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7632 __func__);
7633 goto err;
7634 } else if (codec_aux_dev_cnt <= 0) {
7635 dev_err(&pdev->dev,
7636 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7637 __func__, codec_aux_dev_cnt);
7638 ret = -EINVAL;
7639 goto err;
7640 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7641
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7642 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7643 * Expect total phandles count to be NOT less than maximum possible
7644 * AUX device count. However, if it is less, then assign same value to
7645 * max count as well.
7646 */
7647 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7648 dev_dbg(&pdev->dev,
7649 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7650 __func__, codec_max_aux_devs,
7651 codec_aux_dev_cnt);
7652 codec_max_aux_devs = codec_aux_dev_cnt;
7653 }
7654
7655 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7656 * Alloc mem to store phandle and index info of aux codec
7657 * if already registered with ALSA core
7658 */
7659 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7660 sizeof(struct aux_codec_dev_info),
7661 GFP_KERNEL);
7662 if (!aux_cdc_dev_info) {
7663 ret = -ENOMEM;
7664 goto err;
7665 }
7666
7667 /*
7668 * search and check whether all aux codecs are already
7669 * registered with ALSA core or not. If found a node, store
7670 * the node and the index in a local array of struct for later
7671 * use.
7672 */
7673 for (i = 0; i < codec_aux_dev_cnt; i++) {
7674 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7675 "qcom,codec-aux-devs", i);
7676 if (unlikely(!aux_codec_of_node)) {
7677 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7678 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7679 "%s: aux codec dev node is not present\n",
7680 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7681 ret = -EINVAL;
7682 goto err;
7683 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7684 if (soc_find_component(aux_codec_of_node, NULL)) {
7685 /* AUX codec registered with ALSA core */
7686 aux_cdc_dev_info[codecs_found].of_node =
7687 aux_codec_of_node;
7688 aux_cdc_dev_info[codecs_found].index = i;
7689 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7690 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7691 }
7692
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7693 if (codecs_found < codec_aux_dev_cnt) {
7694 dev_dbg(&pdev->dev,
7695 "%s: failed to find %d components. Found only %d\n",
7696 __func__, codec_aux_dev_cnt, codecs_found);
7697 return -EPROBE_DEFER;
7698 }
7699 dev_info(&pdev->dev,
7700 "%s: found %d AUX codecs registered with ALSA core\n",
7701 __func__, codecs_found);
7702
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7703aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7704 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7705 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7706
7707 /* Alloc array of AUX devs struct */
7708 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7709 sizeof(struct snd_soc_aux_dev),
7710 GFP_KERNEL);
7711 if (!msm_aux_dev) {
7712 ret = -ENOMEM;
7713 goto err;
7714 }
7715
7716 /* Alloc array of codec conf struct */
7717 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7718 sizeof(struct snd_soc_codec_conf),
7719 GFP_KERNEL);
7720 if (!msm_codec_conf) {
7721 ret = -ENOMEM;
7722 goto err;
7723 }
7724
7725 for (i = 0; i < wsa_max_devs; i++) {
7726 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7727 GFP_KERNEL);
7728 if (!dev_name_str) {
7729 ret = -ENOMEM;
7730 goto err;
7731 }
7732
7733 ret = of_property_read_string_index(pdev->dev.of_node,
7734 "qcom,wsa-aux-dev-prefix",
7735 wsa881x_dev_info[i].index,
7736 auxdev_name_prefix);
7737 if (ret) {
7738 dev_err(&pdev->dev,
7739 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7740 __func__, ret);
7741 ret = -EINVAL;
7742 goto err;
7743 }
7744
7745 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7746 msm_aux_dev[i].name = dev_name_str;
7747 msm_aux_dev[i].codec_name = NULL;
7748 msm_aux_dev[i].codec_of_node =
7749 wsa881x_dev_info[i].of_node;
7750 msm_aux_dev[i].init = msm_wsa881x_init;
7751 msm_codec_conf[i].dev_name = NULL;
7752 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7753 msm_codec_conf[i].of_node =
7754 wsa881x_dev_info[i].of_node;
7755 }
7756
7757 for (i = 0; i < codec_aux_dev_cnt; i++) {
7758 msm_aux_dev[wsa_max_devs + i].name = NULL;
7759 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7760 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7761 aux_cdc_dev_info[i].of_node;
7762 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7763 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7764 msm_codec_conf[wsa_max_devs + i].name_prefix =
7765 NULL;
7766 msm_codec_conf[wsa_max_devs + i].of_node =
7767 aux_cdc_dev_info[i].of_node;
7768 }
7769
7770 card->codec_conf = msm_codec_conf;
7771 card->aux_dev = msm_aux_dev;
7772err:
7773 return ret;
7774}
7775
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7776static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7777{
7778 int count = 0;
7779 u32 mi2s_master_slave[MI2S_MAX];
7780 int ret = 0;
7781
7782 for (count = 0; count < MI2S_MAX; count++) {
7783 mutex_init(&mi2s_intf_conf[count].lock);
7784 mi2s_intf_conf[count].ref_cnt = 0;
7785 }
7786
7787 ret = of_property_read_u32_array(pdev->dev.of_node,
7788 "qcom,msm-mi2s-master",
7789 mi2s_master_slave, MI2S_MAX);
7790 if (ret) {
7791 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7792 __func__);
7793 } else {
7794 for (count = 0; count < MI2S_MAX; count++) {
7795 mi2s_intf_conf[count].msm_is_mi2s_master =
7796 mi2s_master_slave[count];
7797 }
7798 }
7799}
7800
7801static void msm_i2s_auxpcm_deinit(void)
7802{
7803 int count = 0;
7804
7805 for (count = 0; count < MI2S_MAX; count++) {
7806 mutex_destroy(&mi2s_intf_conf[count].lock);
7807 mi2s_intf_conf[count].ref_cnt = 0;
7808 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7809 }
7810}
7811
7812static int kona_ssr_enable(struct device *dev, void *data)
7813{
7814 struct platform_device *pdev = to_platform_device(dev);
7815 struct snd_soc_card *card = platform_get_drvdata(pdev);
7816 int ret = 0;
7817
7818 if (!card) {
7819 dev_err(dev, "%s: card is NULL\n", __func__);
7820 ret = -EINVAL;
7821 goto err;
7822 }
7823
7824 if (!strcmp(card->name, "kona-stub-snd-card")) {
7825 /* TODO */
7826 dev_dbg(dev, "%s: TODO \n", __func__);
7827 }
7828
7829 snd_soc_card_change_online_state(card, 1);
7830 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7831
7832err:
7833 return ret;
7834}
7835
7836static void kona_ssr_disable(struct device *dev, void *data)
7837{
7838 struct platform_device *pdev = to_platform_device(dev);
7839 struct snd_soc_card *card = platform_get_drvdata(pdev);
7840
7841 if (!card) {
7842 dev_err(dev, "%s: card is NULL\n", __func__);
7843 return;
7844 }
7845
7846 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7847 snd_soc_card_change_online_state(card, 0);
7848
7849 if (!strcmp(card->name, "kona-stub-snd-card")) {
7850 /* TODO */
7851 dev_dbg(dev, "%s: TODO \n", __func__);
7852 }
7853}
7854
7855static const struct snd_event_ops kona_ssr_ops = {
7856 .enable = kona_ssr_enable,
7857 .disable = kona_ssr_disable,
7858};
7859
7860static int msm_audio_ssr_compare(struct device *dev, void *data)
7861{
7862 struct device_node *node = data;
7863
7864 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7865 __func__, dev->of_node, node);
7866 return (dev->of_node && dev->of_node == node);
7867}
7868
7869static int msm_audio_ssr_register(struct device *dev)
7870{
7871 struct device_node *np = dev->of_node;
7872 struct snd_event_clients *ssr_clients = NULL;
7873 struct device_node *node = NULL;
7874 int ret = 0;
7875 int i = 0;
7876
7877 for (i = 0; ; i++) {
7878 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7879 if (!node)
7880 break;
7881 snd_event_mstr_add_client(&ssr_clients,
7882 msm_audio_ssr_compare, node);
7883 }
7884
7885 ret = snd_event_master_register(dev, &kona_ssr_ops,
7886 ssr_clients, NULL);
7887 if (!ret)
7888 snd_event_notify(dev, SND_EVENT_UP);
7889
7890 return ret;
7891}
7892
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7893static int msm_asoc_machine_probe(struct platform_device *pdev)
7894{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7895 struct snd_soc_card *card = NULL;
7896 struct msm_asoc_mach_data *pdata = NULL;
7897 const char *mbhc_audio_jack_type = NULL;
7898 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]7899 uint index = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7900
7901 if (!pdev->dev.of_node) {
7902 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
7903 return -EINVAL;
7904 }
7905
7906 pdata = devm_kzalloc(&pdev->dev,
7907 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
7908 if (!pdata)
7909 return -ENOMEM;
7910
Vatsal Bucha71e0b482019-09-11 14:51:20 +0530[diff] [blame]7911 of_property_read_u32(pdev->dev.of_node,
7912 "qcom,lito-is-v2-enabled",
7913 &pdata->lito_v2_enabled);
7914
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7915 card = populate_snd_card_dailinks(&pdev->dev);
7916 if (!card) {
7917 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
7918 ret = -EINVAL;
7919 goto err;
7920 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7921
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7922 card->dev = &pdev->dev;
7923 platform_set_drvdata(pdev, card);
7924 snd_soc_card_set_drvdata(card, pdata);
7925
7926 ret = snd_soc_of_parse_card_name(card, "qcom,model");
7927 if (ret) {
7928 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
7929 __func__, ret);
7930 goto err;
7931 }
7932
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7933 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
7934 if (ret) {
7935 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
7936 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7937 goto err;
7938 }
7939
7940 ret = msm_populate_dai_link_component_of_node(card);
7941 if (ret) {
7942 ret = -EPROBE_DEFER;
7943 goto err;
7944 }
7945
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7946 ret = msm_init_aux_dev(pdev, card);
7947 if (ret)
7948 goto err;
7949
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7950 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7951 if (ret == -EPROBE_DEFER) {
7952 if (codec_reg_done)
7953 ret = -EINVAL;
7954 goto err;
7955 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7956 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
7957 __func__, ret);
7958 goto err;
7959 }
7960 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
7961 __func__, card->name);
7962
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7963 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
7964 "qcom,hph-en1-gpio", 0);
7965 if (!pdata->hph_en1_gpio_p) {
7966 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7967 __func__, "qcom,hph-en1-gpio",
7968 pdev->dev.of_node->full_name);
7969 }
7970
7971 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
7972 "qcom,hph-en0-gpio", 0);
7973 if (!pdata->hph_en0_gpio_p) {
7974 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7975 __func__, "qcom,hph-en0-gpio",
7976 pdev->dev.of_node->full_name);
7977 }
7978
7979 ret = of_property_read_string(pdev->dev.of_node,
7980 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
7981 if (ret) {
7982 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
7983 __func__, "qcom,mbhc-audio-jack-type",
7984 pdev->dev.of_node->full_name);
7985 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
7986 } else {
7987 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
7988 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7989 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
7990 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
7991 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7992 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
7993 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
7994 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7995 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
7996 } else {
7997 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7998 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
7999 }
8000 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]8001 /*
8002 * Parse US-Euro gpio info from DT. Report no error if us-euro
8003 * entry is not found in DT file as some targets do not support
8004 * US-Euro detection
8005 */
8006 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8007 "qcom,us-euro-gpios", 0);
8008 if (!pdata->us_euro_gpio_p) {
8009 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8010 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8011 } else {
8012 dev_dbg(&pdev->dev, "%s detected\n",
8013 "qcom,us-euro-gpios");
8014 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8015 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8016
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]8017 if (wcd_mbhc_cfg.enable_usbc_analog)
8018 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
8019
8020 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
8021 "fsa4480-i2c-handle", 0);
8022 if (!pdata->fsa_handle)
8023 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8024 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
8025
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8026 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]8027 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8028 "qcom,cdc-dmic01-gpios",
8029 0);
8030 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8031 "qcom,cdc-dmic23-gpios",
8032 0);
8033 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
8034 "qcom,cdc-dmic45-gpios",
8035 0);
Laxminath Kasam168173e2019-09-16 12:59:43 +0530[diff] [blame]8036 if (pdata->dmic01_gpio_p)
8037 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic01_gpio_p, false);
8038 if (pdata->dmic23_gpio_p)
8039 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic23_gpio_p, false);
Sudheer Papothic51afbc2019-08-01 10:25:32 +0530[diff] [blame]8040 if (pdata->dmic45_gpio_p)
8041 msm_cdc_pinctrl_set_wakeup_capable(pdata->dmic45_gpio_p, false);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8042
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]8043 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
8044 "qcom,pri-mi2s-gpios", 0);
8045 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
8046 "qcom,sec-mi2s-gpios", 0);
8047 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8048 "qcom,tert-mi2s-gpios", 0);
8049 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
8050 "qcom,quat-mi2s-gpios", 0);
8051 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8052 "qcom,quin-mi2s-gpios", 0);
8053 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
8054 "qcom,sen-mi2s-gpios", 0);
8055 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
8056 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
8057
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8058 ret = msm_audio_ssr_register(&pdev->dev);
8059 if (ret)
8060 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8061 __func__, ret);
8062
8063 is_initial_boot = true;
8064
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8065 return 0;
8066err:
8067 devm_kfree(&pdev->dev, pdata);
8068 return ret;
8069}
8070
8071static int msm_asoc_machine_remove(struct platform_device *pdev)
8072{
8073 struct snd_soc_card *card = platform_get_drvdata(pdev);
8074
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8075 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8076 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]8077 msm_i2s_auxpcm_deinit();
8078
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8079 return 0;
8080}
8081
8082static struct platform_driver kona_asoc_machine_driver = {
8083 .driver = {
8084 .name = DRV_NAME,
8085 .owner = THIS_MODULE,
8086 .pm = &snd_soc_pm_ops,
8087 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]8088 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]8089 },
8090 .probe = msm_asoc_machine_probe,
8091 .remove = msm_asoc_machine_remove,
8092};
8093module_platform_driver(kona_asoc_machine_driver);
8094
8095MODULE_DESCRIPTION("ALSA SoC msm");
8096MODULE_LICENSE("GPL v2");
8097MODULE_ALIAS("platform:" DRV_NAME);
8098MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);