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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 94bc9eae4483499d46481f6dcaf9cf9558835ba0 / . / asoc / bengal.c
blob: 7c2002815ee256aa1b520e3a666729af331ab09d [file] [log] [blame]
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/soc/qcom/fsa4480-i2c.h>
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]17#include <linux/nvmem-consumer.h>
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
24#include <soc/snd_event.h>
25#include <dsp/audio_notifier.h>
26#include <soc/swr-common.h>
27#include <dsp/q6afe-v2.h>
28#include <dsp/q6core.h>
29#include "device_event.h"
30#include "msm-pcm-routing-v2.h"
31#include "asoc/msm-cdc-pinctrl.h"
32#include "asoc/wcd-mbhc-v2.h"
33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]34#include "codecs/rouleur/rouleur-mbhc.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]35#include "codecs/wsa881x-analog.h"
36#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]37#include "codecs/rouleur/rouleur.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]38#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "bengal-port-config.h"
41
42#define DRV_NAME "bengal-asoc-snd"
43#define __CHIPSET__ "BENGAL "
44#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
45
46#define SAMPLING_RATE_8KHZ 8000
47#define SAMPLING_RATE_11P025KHZ 11025
48#define SAMPLING_RATE_16KHZ 16000
49#define SAMPLING_RATE_22P05KHZ 22050
50#define SAMPLING_RATE_32KHZ 32000
51#define SAMPLING_RATE_44P1KHZ 44100
52#define SAMPLING_RATE_48KHZ 48000
53#define SAMPLING_RATE_88P2KHZ 88200
54#define SAMPLING_RATE_96KHZ 96000
55#define SAMPLING_RATE_176P4KHZ 176400
56#define SAMPLING_RATE_192KHZ 192000
57#define SAMPLING_RATE_352P8KHZ 352800
58#define SAMPLING_RATE_384KHZ 384000
59
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define WCD9XXX_MBHC_DEF_BUTTONS 8
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]62#define ROULEUR_MBHC_DEF_BUTTONS 5
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]63#define CODEC_EXT_CLK_RATE 9600000
64#define ADSP_STATE_READY_TIMEOUT_MS 3000
65#define DEV_NAME_STR_LEN 32
66#define WCD_MBHC_HS_V_MAX 1600
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]67#define ROULEUR_MBHC_HS_V_MAX 1700
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]68
69#define TDM_CHANNEL_MAX 8
70#define DEV_NAME_STR_LEN 32
71
72/* time in us to ensure LPM doesn't go in C3/C4 */
73#define MSM_LL_QOS_VALUE 300
74
75#define ADSP_STATE_READY_TIMEOUT_MS 3000
76
77#define WCN_CDC_SLIM_RX_CH_MAX 2
78#define WCN_CDC_SLIM_TX_CH_MAX 3
79
80enum {
81 TDM_0 = 0,
82 TDM_1,
83 TDM_2,
84 TDM_3,
85 TDM_4,
86 TDM_5,
87 TDM_6,
88 TDM_7,
89 TDM_PORT_MAX,
90};
91
92enum {
93 TDM_PRI = 0,
94 TDM_SEC,
95 TDM_TERT,
96 TDM_QUAT,
97 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
104 QUAT_AUX_PCM,
105 AUX_PCM_MAX,
106};
107
108enum {
109 PRIM_MI2S = 0,
110 SEC_MI2S,
111 TERT_MI2S,
112 QUAT_MI2S,
113 MI2S_MAX,
114};
115
116enum {
117 RX_CDC_DMA_RX_0 = 0,
118 RX_CDC_DMA_RX_1,
119 RX_CDC_DMA_RX_2,
120 RX_CDC_DMA_RX_3,
121 RX_CDC_DMA_RX_5,
122 CDC_DMA_RX_MAX,
123};
124
125enum {
126 TX_CDC_DMA_TX_0 = 0,
127 TX_CDC_DMA_TX_3,
128 TX_CDC_DMA_TX_4,
129 VA_CDC_DMA_TX_0,
130 VA_CDC_DMA_TX_1,
131 VA_CDC_DMA_TX_2,
132 CDC_DMA_TX_MAX,
133};
134
135enum {
136 SLIM_RX_7 = 0,
137 SLIM_RX_MAX,
138};
139
140enum {
141 SLIM_TX_7 = 0,
142 SLIM_TX_8,
143 SLIM_TX_MAX,
144};
145
146enum {
147 AFE_LOOPBACK_TX_IDX = 0,
148 AFE_LOOPBACK_TX_IDX_MAX,
149};
150struct msm_asoc_mach_data {
151 struct snd_info_entry *codec_root;
152 int usbc_en2_gpio; /* used by gpio driver API */
153 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
154 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
155 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
156 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
157 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
158 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
159 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
160 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
161 bool is_afe_config_done;
162 struct device_node *fsa_handle;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]163 bool va_disable;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]164};
165
166struct tdm_port {
167 u32 mode;
168 u32 channel;
169};
170
171enum {
172 EXT_DISP_RX_IDX_DP = 0,
173 EXT_DISP_RX_IDX_DP1,
174 EXT_DISP_RX_IDX_MAX,
175};
176
177struct msm_wsa881x_dev_info {
178 struct device_node *of_node;
179 u32 index;
180};
181
182struct aux_codec_dev_info {
183 struct device_node *of_node;
184 u32 index;
185};
186
187struct dev_config {
188 u32 sample_rate;
189 u32 bit_format;
190 u32 channels;
191};
192
193/* Default configuration of slimbus channels */
194static struct dev_config slim_rx_cfg[] = {
195 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
196};
197
198static struct dev_config slim_tx_cfg[] = {
199 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
200 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
201};
202
203static struct dev_config usb_rx_cfg = {
204 .sample_rate = SAMPLING_RATE_48KHZ,
205 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
206 .channels = 2,
207};
208
209static struct dev_config usb_tx_cfg = {
210 .sample_rate = SAMPLING_RATE_48KHZ,
211 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
212 .channels = 1,
213};
214
215static struct dev_config proxy_rx_cfg = {
216 .sample_rate = SAMPLING_RATE_48KHZ,
217 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
218 .channels = 2,
219};
220
221static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
222 {
223 AFE_API_VERSION_I2S_CONFIG,
224 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
225 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
226 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
227 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
228 0,
229 },
230 {
231 AFE_API_VERSION_I2S_CONFIG,
232 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
233 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
234 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
235 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
236 0,
237 },
238 {
239 AFE_API_VERSION_I2S_CONFIG,
240 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
241 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
242 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
243 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
244 0,
245 },
246 {
247 AFE_API_VERSION_I2S_CONFIG,
248 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
249 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
250 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
251 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
252 0,
253 },
254};
255
256struct mi2s_conf {
257 struct mutex lock;
258 u32 ref_cnt;
259 u32 msm_is_mi2s_master;
260};
261
262static u32 mi2s_ebit_clk[MI2S_MAX] = {
263 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
264 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
265 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
266};
267
268static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
269
270/* Default configuration of TDM channels */
271static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
272 { /* PRI TDM */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
281 },
282 { /* SEC TDM */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
291 },
292 { /* TERT TDM */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
299 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
301 },
302 { /* QUAT TDM */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
309 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
311 },
312};
313
314static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
315 { /* PRI TDM */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
324 },
325 { /* SEC TDM */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
334 },
335 { /* TERT TDM */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
344 },
345 { /* QUAT TDM */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
354 },
355};
356
357/* Default configuration of AUX PCM channels */
358static struct dev_config aux_pcm_rx_cfg[] = {
359 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363};
364
365static struct dev_config aux_pcm_tx_cfg[] = {
366 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370};
371
372/* Default configuration of MI2S channels */
373static struct dev_config mi2s_rx_cfg[] = {
374 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
377 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
378};
379
380static struct dev_config mi2s_tx_cfg[] = {
381 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
382 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
383 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
384 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
385};
386
387/* Default configuration of Codec DMA Interface RX */
388static struct dev_config cdc_dma_rx_cfg[] = {
389 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394};
395
396/* Default configuration of Codec DMA Interface TX */
397static struct dev_config cdc_dma_tx_cfg[] = {
398 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
399 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
400 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
401 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
402 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
403 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
404};
405
406static struct dev_config afe_loopback_tx_cfg[] = {
407 [AFE_LOOPBACK_TX_IDX] = {
408 SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
409};
410
411static int msm_vi_feed_tx_ch = 2;
412static const char *const vi_feed_ch_text[] = {"One", "Two"};
413static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
414 "S32_LE"};
415static char const *ch_text[] = {"Two", "Three", "Four", "Five",
416 "Six", "Seven", "Eight"};
417static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
418 "KHZ_16", "KHZ_22P05",
419 "KHZ_32", "KHZ_44P1", "KHZ_48",
420 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
421 "KHZ_192", "KHZ_352P8", "KHZ_384"};
422static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
423 "Five", "Six", "Seven",
424 "Eight"};
425static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
426 "KHZ_48", "KHZ_176P4",
427 "KHZ_352P8"};
428static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
429static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
430 "Five", "Six", "Seven", "Eight"};
431static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
432static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
433 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
434 "KHZ_48", "KHZ_96", "KHZ_192"};
435static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
436 "Five", "Six", "Seven",
437 "Eight"};
438
439static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
440static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
441 "Five", "Six", "Seven",
442 "Eight"};
443static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
444 "KHZ_16", "KHZ_22P05",
445 "KHZ_32", "KHZ_44P1", "KHZ_48",
446 "KHZ_88P2", "KHZ_96",
447 "KHZ_176P4", "KHZ_192",
448 "KHZ_352P8", "KHZ_384"};
449static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
450 "KHZ_44P1", "KHZ_48",
451 "KHZ_88P2", "KHZ_96"};
452static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
453 "KHZ_44P1", "KHZ_48",
454 "KHZ_88P2", "KHZ_96"};
455static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
456 "KHZ_44P1", "KHZ_48",
457 "KHZ_88P2", "KHZ_96"};
458static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
459
460static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
461static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
462static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
463static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
464static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
465static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
466static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
467static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
468static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
469static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
470static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
471static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
472static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
473static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
474static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
475static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
476static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
477static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
478static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
479static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
480static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
481static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
482static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
483static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
484static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
485static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
486static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
487static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
488static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
489static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
490static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
491static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
492static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
493static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
494static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
495static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
496static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
497static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
498static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
525 cdc_dma_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
527 cdc_dma_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
529 cdc_dma_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
531 cdc_dma_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
533 cdc_dma_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
535 cdc_dma_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
537 cdc_dma_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
539 cdc_dma_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
541 cdc_dma_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
543 cdc_dma_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
545 cdc_dma_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
548static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
549static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
550
551static bool is_initial_boot;
552static bool codec_reg_done;
553static struct snd_soc_aux_dev *msm_aux_dev;
554static struct snd_soc_codec_conf *msm_codec_conf;
555static struct snd_soc_card snd_soc_card_bengal_msm;
556static int dmic_0_1_gpio_cnt;
557static int dmic_2_3_gpio_cnt;
558
559static void *def_wcd_mbhc_cal(void);
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]560static void *def_rouleur_mbhc_cal(void);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]561
562/*
563 * Need to report LINEIN
564 * if R/L channel impedance is larger than 5K ohm
565 */
566static struct wcd_mbhc_config wcd_mbhc_cfg = {
567 .read_fw_bin = false,
568 .calibration = NULL,
569 .detect_extn_cable = true,
570 .mono_stero_detection = false,
571 .swap_gnd_mic = NULL,
572 .hs_ext_micbias = true,
573 .key_code[0] = KEY_MEDIA,
574 .key_code[1] = KEY_VOICECOMMAND,
575 .key_code[2] = KEY_VOLUMEUP,
576 .key_code[3] = KEY_VOLUMEDOWN,
577 .key_code[4] = 0,
578 .key_code[5] = 0,
579 .key_code[6] = 0,
580 .key_code[7] = 0,
581 .linein_th = 5000,
582 .moisture_en = false,
583 .mbhc_micbias = MIC_BIAS_2,
584 .anc_micbias = MIC_BIAS_2,
585 .enable_anc_mic_detect = false,
586 .moisture_duty_cycle_en = true,
587};
588
589static inline int param_is_mask(int p)
590{
591 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
592 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
593}
594
595static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
596 int n)
597{
598 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
599}
600
601static void param_set_mask(struct snd_pcm_hw_params *p, int n,
602 unsigned int bit)
603{
604 if (bit >= SNDRV_MASK_MAX)
605 return;
606 if (param_is_mask(n)) {
607 struct snd_mask *m = param_to_mask(p, n);
608
609 m->bits[0] = 0;
610 m->bits[1] = 0;
611 m->bits[bit >> 5] |= (1 << (bit & 31));
612 }
613}
614
615static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
617{
618 int sample_rate_val = 0;
619
620 switch (usb_rx_cfg.sample_rate) {
621 case SAMPLING_RATE_384KHZ:
622 sample_rate_val = 12;
623 break;
624 case SAMPLING_RATE_352P8KHZ:
625 sample_rate_val = 11;
626 break;
627 case SAMPLING_RATE_192KHZ:
628 sample_rate_val = 10;
629 break;
630 case SAMPLING_RATE_176P4KHZ:
631 sample_rate_val = 9;
632 break;
633 case SAMPLING_RATE_96KHZ:
634 sample_rate_val = 8;
635 break;
636 case SAMPLING_RATE_88P2KHZ:
637 sample_rate_val = 7;
638 break;
639 case SAMPLING_RATE_48KHZ:
640 sample_rate_val = 6;
641 break;
642 case SAMPLING_RATE_44P1KHZ:
643 sample_rate_val = 5;
644 break;
645 case SAMPLING_RATE_32KHZ:
646 sample_rate_val = 4;
647 break;
648 case SAMPLING_RATE_22P05KHZ:
649 sample_rate_val = 3;
650 break;
651 case SAMPLING_RATE_16KHZ:
652 sample_rate_val = 2;
653 break;
654 case SAMPLING_RATE_11P025KHZ:
655 sample_rate_val = 1;
656 break;
657 case SAMPLING_RATE_8KHZ:
658 default:
659 sample_rate_val = 0;
660 break;
661 }
662
663 ucontrol->value.integer.value[0] = sample_rate_val;
664 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
665 usb_rx_cfg.sample_rate);
666 return 0;
667}
668
669static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
670 struct snd_ctl_elem_value *ucontrol)
671{
672 switch (ucontrol->value.integer.value[0]) {
673 case 12:
674 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
675 break;
676 case 11:
677 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
678 break;
679 case 10:
680 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
681 break;
682 case 9:
683 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
684 break;
685 case 8:
686 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
687 break;
688 case 7:
689 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
690 break;
691 case 6:
692 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
693 break;
694 case 5:
695 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
696 break;
697 case 4:
698 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
699 break;
700 case 3:
701 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
702 break;
703 case 2:
704 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
705 break;
706 case 1:
707 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
708 break;
709 case 0:
710 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
711 break;
712 default:
713 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
714 break;
715 }
716
717 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
718 __func__, ucontrol->value.integer.value[0],
719 usb_rx_cfg.sample_rate);
720 return 0;
721}
722
723static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
724 struct snd_ctl_elem_value *ucontrol)
725{
726 int sample_rate_val = 0;
727
728 switch (usb_tx_cfg.sample_rate) {
729 case SAMPLING_RATE_384KHZ:
730 sample_rate_val = 12;
731 break;
732 case SAMPLING_RATE_352P8KHZ:
733 sample_rate_val = 11;
734 break;
735 case SAMPLING_RATE_192KHZ:
736 sample_rate_val = 10;
737 break;
738 case SAMPLING_RATE_176P4KHZ:
739 sample_rate_val = 9;
740 break;
741 case SAMPLING_RATE_96KHZ:
742 sample_rate_val = 8;
743 break;
744 case SAMPLING_RATE_88P2KHZ:
745 sample_rate_val = 7;
746 break;
747 case SAMPLING_RATE_48KHZ:
748 sample_rate_val = 6;
749 break;
750 case SAMPLING_RATE_44P1KHZ:
751 sample_rate_val = 5;
752 break;
753 case SAMPLING_RATE_32KHZ:
754 sample_rate_val = 4;
755 break;
756 case SAMPLING_RATE_22P05KHZ:
757 sample_rate_val = 3;
758 break;
759 case SAMPLING_RATE_16KHZ:
760 sample_rate_val = 2;
761 break;
762 case SAMPLING_RATE_11P025KHZ:
763 sample_rate_val = 1;
764 break;
765 case SAMPLING_RATE_8KHZ:
766 sample_rate_val = 0;
767 break;
768 default:
769 sample_rate_val = 6;
770 break;
771 }
772
773 ucontrol->value.integer.value[0] = sample_rate_val;
774 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
775 usb_tx_cfg.sample_rate);
776 return 0;
777}
778
779static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
780 struct snd_ctl_elem_value *ucontrol)
781{
782 switch (ucontrol->value.integer.value[0]) {
783 case 12:
784 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
785 break;
786 case 11:
787 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
788 break;
789 case 10:
790 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
791 break;
792 case 9:
793 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
794 break;
795 case 8:
796 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
797 break;
798 case 7:
799 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
800 break;
801 case 6:
802 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
803 break;
804 case 5:
805 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
806 break;
807 case 4:
808 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
809 break;
810 case 3:
811 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
812 break;
813 case 2:
814 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
815 break;
816 case 1:
817 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
818 break;
819 case 0:
820 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
821 break;
822 default:
823 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
824 break;
825 }
826
827 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
828 __func__, ucontrol->value.integer.value[0],
829 usb_tx_cfg.sample_rate);
830 return 0;
831}
832static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
833 struct snd_ctl_elem_value *ucontrol)
834{
835 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
836 afe_loopback_tx_cfg[0].channels);
837 ucontrol->value.enumerated.item[0] =
838 afe_loopback_tx_cfg[0].channels - 1;
839
840 return 0;
841}
842
843static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
844 struct snd_ctl_elem_value *ucontrol)
845{
846 afe_loopback_tx_cfg[0].channels =
847 ucontrol->value.enumerated.item[0] + 1;
848 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
849 afe_loopback_tx_cfg[0].channels);
850
851 return 1;
852}
853
854static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
855 struct snd_ctl_elem_value *ucontrol)
856{
857 switch (usb_rx_cfg.bit_format) {
858 case SNDRV_PCM_FORMAT_S32_LE:
859 ucontrol->value.integer.value[0] = 3;
860 break;
861 case SNDRV_PCM_FORMAT_S24_3LE:
862 ucontrol->value.integer.value[0] = 2;
863 break;
864 case SNDRV_PCM_FORMAT_S24_LE:
865 ucontrol->value.integer.value[0] = 1;
866 break;
867 case SNDRV_PCM_FORMAT_S16_LE:
868 default:
869 ucontrol->value.integer.value[0] = 0;
870 break;
871 }
872
873 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
874 __func__, usb_rx_cfg.bit_format,
875 ucontrol->value.integer.value[0]);
876 return 0;
877}
878
879static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
880 struct snd_ctl_elem_value *ucontrol)
881{
882 int rc = 0;
883
884 switch (ucontrol->value.integer.value[0]) {
885 case 3:
886 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
887 break;
888 case 2:
889 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
890 break;
891 case 1:
892 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
893 break;
894 case 0:
895 default:
896 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
897 break;
898 }
899 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
900 __func__, usb_rx_cfg.bit_format,
901 ucontrol->value.integer.value[0]);
902
903 return rc;
904}
905
906static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
907 struct snd_ctl_elem_value *ucontrol)
908{
909 switch (usb_tx_cfg.bit_format) {
910 case SNDRV_PCM_FORMAT_S32_LE:
911 ucontrol->value.integer.value[0] = 3;
912 break;
913 case SNDRV_PCM_FORMAT_S24_3LE:
914 ucontrol->value.integer.value[0] = 2;
915 break;
916 case SNDRV_PCM_FORMAT_S24_LE:
917 ucontrol->value.integer.value[0] = 1;
918 break;
919 case SNDRV_PCM_FORMAT_S16_LE:
920 default:
921 ucontrol->value.integer.value[0] = 0;
922 break;
923 }
924
925 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
926 __func__, usb_tx_cfg.bit_format,
927 ucontrol->value.integer.value[0]);
928 return 0;
929}
930
931static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
932 struct snd_ctl_elem_value *ucontrol)
933{
934 int rc = 0;
935
936 switch (ucontrol->value.integer.value[0]) {
937 case 3:
938 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
939 break;
940 case 2:
941 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
942 break;
943 case 1:
944 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
945 break;
946 case 0:
947 default:
948 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
949 break;
950 }
951 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
952 __func__, usb_tx_cfg.bit_format,
953 ucontrol->value.integer.value[0]);
954
955 return rc;
956}
957
958static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960{
961 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
962 usb_rx_cfg.channels);
963 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
964 return 0;
965}
966
967static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
968 struct snd_ctl_elem_value *ucontrol)
969{
970 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
971
972 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
973 return 1;
974}
975
976static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
977 struct snd_ctl_elem_value *ucontrol)
978{
979 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
980 usb_tx_cfg.channels);
981 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
982 return 0;
983}
984
985static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
986 struct snd_ctl_elem_value *ucontrol)
987{
988 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
989
990 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
991 return 1;
992}
993
994static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
995 struct snd_ctl_elem_value *ucontrol)
996{
997 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
998 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
999 ucontrol->value.integer.value[0]);
1000 return 0;
1001}
1002
1003static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1004 struct snd_ctl_elem_value *ucontrol)
1005{
1006 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1007 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1008 return 1;
1009}
1010
1011static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1012 struct snd_ctl_elem_value *ucontrol)
1013{
1014 pr_debug("%s: proxy_rx channels = %d\n",
1015 __func__, proxy_rx_cfg.channels);
1016 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1017
1018 return 0;
1019}
1020
1021static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1022 struct snd_ctl_elem_value *ucontrol)
1023{
1024 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1025 pr_debug("%s: proxy_rx channels = %d\n",
1026 __func__, proxy_rx_cfg.channels);
1027
1028 return 1;
1029}
1030
1031static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1032 struct tdm_port *port)
1033{
1034 if (port) {
1035 if (strnstr(kcontrol->id.name, "PRI",
1036 sizeof(kcontrol->id.name))) {
1037 port->mode = TDM_PRI;
1038 } else if (strnstr(kcontrol->id.name, "SEC",
1039 sizeof(kcontrol->id.name))) {
1040 port->mode = TDM_SEC;
1041 } else if (strnstr(kcontrol->id.name, "TERT",
1042 sizeof(kcontrol->id.name))) {
1043 port->mode = TDM_TERT;
1044 } else if (strnstr(kcontrol->id.name, "QUAT",
1045 sizeof(kcontrol->id.name))) {
1046 port->mode = TDM_QUAT;
1047 } else {
1048 pr_err("%s: unsupported mode in: %s\n",
1049 __func__, kcontrol->id.name);
1050 return -EINVAL;
1051 }
1052
1053 if (strnstr(kcontrol->id.name, "RX_0",
1054 sizeof(kcontrol->id.name)) ||
1055 strnstr(kcontrol->id.name, "TX_0",
1056 sizeof(kcontrol->id.name))) {
1057 port->channel = TDM_0;
1058 } else if (strnstr(kcontrol->id.name, "RX_1",
1059 sizeof(kcontrol->id.name)) ||
1060 strnstr(kcontrol->id.name, "TX_1",
1061 sizeof(kcontrol->id.name))) {
1062 port->channel = TDM_1;
1063 } else if (strnstr(kcontrol->id.name, "RX_2",
1064 sizeof(kcontrol->id.name)) ||
1065 strnstr(kcontrol->id.name, "TX_2",
1066 sizeof(kcontrol->id.name))) {
1067 port->channel = TDM_2;
1068 } else if (strnstr(kcontrol->id.name, "RX_3",
1069 sizeof(kcontrol->id.name)) ||
1070 strnstr(kcontrol->id.name, "TX_3",
1071 sizeof(kcontrol->id.name))) {
1072 port->channel = TDM_3;
1073 } else if (strnstr(kcontrol->id.name, "RX_4",
1074 sizeof(kcontrol->id.name)) ||
1075 strnstr(kcontrol->id.name, "TX_4",
1076 sizeof(kcontrol->id.name))) {
1077 port->channel = TDM_4;
1078 } else if (strnstr(kcontrol->id.name, "RX_5",
1079 sizeof(kcontrol->id.name)) ||
1080 strnstr(kcontrol->id.name, "TX_5",
1081 sizeof(kcontrol->id.name))) {
1082 port->channel = TDM_5;
1083 } else if (strnstr(kcontrol->id.name, "RX_6",
1084 sizeof(kcontrol->id.name)) ||
1085 strnstr(kcontrol->id.name, "TX_6",
1086 sizeof(kcontrol->id.name))) {
1087 port->channel = TDM_6;
1088 } else if (strnstr(kcontrol->id.name, "RX_7",
1089 sizeof(kcontrol->id.name)) ||
1090 strnstr(kcontrol->id.name, "TX_7",
1091 sizeof(kcontrol->id.name))) {
1092 port->channel = TDM_7;
1093 } else {
1094 pr_err("%s: unsupported channel in: %s\n",
1095 __func__, kcontrol->id.name);
1096 return -EINVAL;
1097 }
1098 } else {
1099 return -EINVAL;
1100 }
1101 return 0;
1102}
1103
1104static int tdm_get_sample_rate(int value)
1105{
1106 int sample_rate = 0;
1107
1108 switch (value) {
1109 case 0:
1110 sample_rate = SAMPLING_RATE_8KHZ;
1111 break;
1112 case 1:
1113 sample_rate = SAMPLING_RATE_16KHZ;
1114 break;
1115 case 2:
1116 sample_rate = SAMPLING_RATE_32KHZ;
1117 break;
1118 case 3:
1119 sample_rate = SAMPLING_RATE_48KHZ;
1120 break;
1121 case 4:
1122 sample_rate = SAMPLING_RATE_176P4KHZ;
1123 break;
1124 case 5:
1125 sample_rate = SAMPLING_RATE_352P8KHZ;
1126 break;
1127 default:
1128 sample_rate = SAMPLING_RATE_48KHZ;
1129 break;
1130 }
1131 return sample_rate;
1132}
1133
1134static int tdm_get_sample_rate_val(int sample_rate)
1135{
1136 int sample_rate_val = 0;
1137
1138 switch (sample_rate) {
1139 case SAMPLING_RATE_8KHZ:
1140 sample_rate_val = 0;
1141 break;
1142 case SAMPLING_RATE_16KHZ:
1143 sample_rate_val = 1;
1144 break;
1145 case SAMPLING_RATE_32KHZ:
1146 sample_rate_val = 2;
1147 break;
1148 case SAMPLING_RATE_48KHZ:
1149 sample_rate_val = 3;
1150 break;
1151 case SAMPLING_RATE_176P4KHZ:
1152 sample_rate_val = 4;
1153 break;
1154 case SAMPLING_RATE_352P8KHZ:
1155 sample_rate_val = 5;
1156 break;
1157 default:
1158 sample_rate_val = 3;
1159 break;
1160 }
1161 return sample_rate_val;
1162}
1163
1164static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1165 struct snd_ctl_elem_value *ucontrol)
1166{
1167 struct tdm_port port;
1168 int ret = tdm_get_port_idx(kcontrol, &port);
1169
1170 if (ret) {
1171 pr_err("%s: unsupported control: %s\n",
1172 __func__, kcontrol->id.name);
1173 } else {
1174 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1175 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1176
1177 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1178 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1179 ucontrol->value.enumerated.item[0]);
1180 }
1181 return ret;
1182}
1183
1184static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1185 struct snd_ctl_elem_value *ucontrol)
1186{
1187 struct tdm_port port;
1188 int ret = tdm_get_port_idx(kcontrol, &port);
1189
1190 if (ret) {
1191 pr_err("%s: unsupported control: %s\n",
1192 __func__, kcontrol->id.name);
1193 } else {
1194 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1195 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1196
1197 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1198 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1199 ucontrol->value.enumerated.item[0]);
1200 }
1201 return ret;
1202}
1203
1204static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1205 struct snd_ctl_elem_value *ucontrol)
1206{
1207 struct tdm_port port;
1208 int ret = tdm_get_port_idx(kcontrol, &port);
1209
1210 if (ret) {
1211 pr_err("%s: unsupported control: %s\n",
1212 __func__, kcontrol->id.name);
1213 } else {
1214 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1215 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1216
1217 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1218 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1219 ucontrol->value.enumerated.item[0]);
1220 }
1221 return ret;
1222}
1223
1224static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1225 struct snd_ctl_elem_value *ucontrol)
1226{
1227 struct tdm_port port;
1228 int ret = tdm_get_port_idx(kcontrol, &port);
1229
1230 if (ret) {
1231 pr_err("%s: unsupported control: %s\n",
1232 __func__, kcontrol->id.name);
1233 } else {
1234 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1235 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1236
1237 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1238 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1239 ucontrol->value.enumerated.item[0]);
1240 }
1241 return ret;
1242}
1243
1244static int tdm_get_format(int value)
1245{
1246 int format = 0;
1247
1248 switch (value) {
1249 case 0:
1250 format = SNDRV_PCM_FORMAT_S16_LE;
1251 break;
1252 case 1:
1253 format = SNDRV_PCM_FORMAT_S24_LE;
1254 break;
1255 case 2:
1256 format = SNDRV_PCM_FORMAT_S32_LE;
1257 break;
1258 default:
1259 format = SNDRV_PCM_FORMAT_S16_LE;
1260 break;
1261 }
1262 return format;
1263}
1264
1265static int tdm_get_format_val(int format)
1266{
1267 int value = 0;
1268
1269 switch (format) {
1270 case SNDRV_PCM_FORMAT_S16_LE:
1271 value = 0;
1272 break;
1273 case SNDRV_PCM_FORMAT_S24_LE:
1274 value = 1;
1275 break;
1276 case SNDRV_PCM_FORMAT_S32_LE:
1277 value = 2;
1278 break;
1279 default:
1280 value = 0;
1281 break;
1282 }
1283 return value;
1284}
1285
1286static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1287 struct snd_ctl_elem_value *ucontrol)
1288{
1289 struct tdm_port port;
1290 int ret = tdm_get_port_idx(kcontrol, &port);
1291
1292 if (ret) {
1293 pr_err("%s: unsupported control: %s\n",
1294 __func__, kcontrol->id.name);
1295 } else {
1296 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1297 tdm_rx_cfg[port.mode][port.channel].bit_format);
1298
1299 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1300 tdm_rx_cfg[port.mode][port.channel].bit_format,
1301 ucontrol->value.enumerated.item[0]);
1302 }
1303 return ret;
1304}
1305
1306static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1307 struct snd_ctl_elem_value *ucontrol)
1308{
1309 struct tdm_port port;
1310 int ret = tdm_get_port_idx(kcontrol, &port);
1311
1312 if (ret) {
1313 pr_err("%s: unsupported control: %s\n",
1314 __func__, kcontrol->id.name);
1315 } else {
1316 tdm_rx_cfg[port.mode][port.channel].bit_format =
1317 tdm_get_format(ucontrol->value.enumerated.item[0]);
1318
1319 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1320 tdm_rx_cfg[port.mode][port.channel].bit_format,
1321 ucontrol->value.enumerated.item[0]);
1322 }
1323 return ret;
1324}
1325
1326static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1327 struct snd_ctl_elem_value *ucontrol)
1328{
1329 struct tdm_port port;
1330 int ret = tdm_get_port_idx(kcontrol, &port);
1331
1332 if (ret) {
1333 pr_err("%s: unsupported control: %s\n",
1334 __func__, kcontrol->id.name);
1335 } else {
1336 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1337 tdm_tx_cfg[port.mode][port.channel].bit_format);
1338
1339 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1340 tdm_tx_cfg[port.mode][port.channel].bit_format,
1341 ucontrol->value.enumerated.item[0]);
1342 }
1343 return ret;
1344}
1345
1346static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1347 struct snd_ctl_elem_value *ucontrol)
1348{
1349 struct tdm_port port;
1350 int ret = tdm_get_port_idx(kcontrol, &port);
1351
1352 if (ret) {
1353 pr_err("%s: unsupported control: %s\n",
1354 __func__, kcontrol->id.name);
1355 } else {
1356 tdm_tx_cfg[port.mode][port.channel].bit_format =
1357 tdm_get_format(ucontrol->value.enumerated.item[0]);
1358
1359 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1360 tdm_tx_cfg[port.mode][port.channel].bit_format,
1361 ucontrol->value.enumerated.item[0]);
1362 }
1363 return ret;
1364}
1365
1366static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1367 struct snd_ctl_elem_value *ucontrol)
1368{
1369 struct tdm_port port;
1370 int ret = tdm_get_port_idx(kcontrol, &port);
1371
1372 if (ret) {
1373 pr_err("%s: unsupported control: %s\n",
1374 __func__, kcontrol->id.name);
1375 } else {
1376
1377 ucontrol->value.enumerated.item[0] =
1378 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1379
1380 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1381 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1382 ucontrol->value.enumerated.item[0]);
1383 }
1384 return ret;
1385}
1386
1387static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1388 struct snd_ctl_elem_value *ucontrol)
1389{
1390 struct tdm_port port;
1391 int ret = tdm_get_port_idx(kcontrol, &port);
1392
1393 if (ret) {
1394 pr_err("%s: unsupported control: %s\n",
1395 __func__, kcontrol->id.name);
1396 } else {
1397 tdm_rx_cfg[port.mode][port.channel].channels =
1398 ucontrol->value.enumerated.item[0] + 1;
1399
1400 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1401 tdm_rx_cfg[port.mode][port.channel].channels,
1402 ucontrol->value.enumerated.item[0] + 1);
1403 }
1404 return ret;
1405}
1406
1407static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1408 struct snd_ctl_elem_value *ucontrol)
1409{
1410 struct tdm_port port;
1411 int ret = tdm_get_port_idx(kcontrol, &port);
1412
1413 if (ret) {
1414 pr_err("%s: unsupported control: %s\n",
1415 __func__, kcontrol->id.name);
1416 } else {
1417 ucontrol->value.enumerated.item[0] =
1418 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1419
1420 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1421 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1422 ucontrol->value.enumerated.item[0]);
1423 }
1424 return ret;
1425}
1426
1427static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1428 struct snd_ctl_elem_value *ucontrol)
1429{
1430 struct tdm_port port;
1431 int ret = tdm_get_port_idx(kcontrol, &port);
1432
1433 if (ret) {
1434 pr_err("%s: unsupported control: %s\n",
1435 __func__, kcontrol->id.name);
1436 } else {
1437 tdm_tx_cfg[port.mode][port.channel].channels =
1438 ucontrol->value.enumerated.item[0] + 1;
1439
1440 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1441 tdm_tx_cfg[port.mode][port.channel].channels,
1442 ucontrol->value.enumerated.item[0] + 1);
1443 }
1444 return ret;
1445}
1446
1447static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1448{
1449 int idx = 0;
1450
1451 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1452 sizeof("PRIM_AUX_PCM"))) {
1453 idx = PRIM_AUX_PCM;
1454 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1455 sizeof("SEC_AUX_PCM"))) {
1456 idx = SEC_AUX_PCM;
1457 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1458 sizeof("TERT_AUX_PCM"))) {
1459 idx = TERT_AUX_PCM;
1460 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1461 sizeof("QUAT_AUX_PCM"))) {
1462 idx = QUAT_AUX_PCM;
1463 } else {
1464 pr_err("%s: unsupported port: %s\n",
1465 __func__, kcontrol->id.name);
1466 idx = -EINVAL;
1467 }
1468
1469 return idx;
1470}
1471
1472static int aux_pcm_get_sample_rate(int value)
1473{
1474 int sample_rate = 0;
1475
1476 switch (value) {
1477 case 1:
1478 sample_rate = SAMPLING_RATE_16KHZ;
1479 break;
1480 case 0:
1481 default:
1482 sample_rate = SAMPLING_RATE_8KHZ;
1483 break;
1484 }
1485 return sample_rate;
1486}
1487
1488static int aux_pcm_get_sample_rate_val(int sample_rate)
1489{
1490 int sample_rate_val = 0;
1491
1492 switch (sample_rate) {
1493 case SAMPLING_RATE_16KHZ:
1494 sample_rate_val = 1;
1495 break;
1496 case SAMPLING_RATE_8KHZ:
1497 default:
1498 sample_rate_val = 0;
1499 break;
1500 }
1501 return sample_rate_val;
1502}
1503
1504static int mi2s_auxpcm_get_format(int value)
1505{
1506 int format = 0;
1507
1508 switch (value) {
1509 case 0:
1510 format = SNDRV_PCM_FORMAT_S16_LE;
1511 break;
1512 case 1:
1513 format = SNDRV_PCM_FORMAT_S24_LE;
1514 break;
1515 case 2:
1516 format = SNDRV_PCM_FORMAT_S24_3LE;
1517 break;
1518 case 3:
1519 format = SNDRV_PCM_FORMAT_S32_LE;
1520 break;
1521 default:
1522 format = SNDRV_PCM_FORMAT_S16_LE;
1523 break;
1524 }
1525 return format;
1526}
1527
1528static int mi2s_auxpcm_get_format_value(int format)
1529{
1530 int value = 0;
1531
1532 switch (format) {
1533 case SNDRV_PCM_FORMAT_S16_LE:
1534 value = 0;
1535 break;
1536 case SNDRV_PCM_FORMAT_S24_LE:
1537 value = 1;
1538 break;
1539 case SNDRV_PCM_FORMAT_S24_3LE:
1540 value = 2;
1541 break;
1542 case SNDRV_PCM_FORMAT_S32_LE:
1543 value = 3;
1544 break;
1545 default:
1546 value = 0;
1547 break;
1548 }
1549 return value;
1550}
1551
1552static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1553 struct snd_ctl_elem_value *ucontrol)
1554{
1555 int idx = aux_pcm_get_port_idx(kcontrol);
1556
1557 if (idx < 0)
1558 return idx;
1559
1560 ucontrol->value.enumerated.item[0] =
1561 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1562
1563 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1564 idx, aux_pcm_rx_cfg[idx].sample_rate,
1565 ucontrol->value.enumerated.item[0]);
1566
1567 return 0;
1568}
1569
1570static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1571 struct snd_ctl_elem_value *ucontrol)
1572{
1573 int idx = aux_pcm_get_port_idx(kcontrol);
1574
1575 if (idx < 0)
1576 return idx;
1577
1578 aux_pcm_rx_cfg[idx].sample_rate =
1579 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1580
1581 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1582 idx, aux_pcm_rx_cfg[idx].sample_rate,
1583 ucontrol->value.enumerated.item[0]);
1584
1585 return 0;
1586}
1587
1588static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1589 struct snd_ctl_elem_value *ucontrol)
1590{
1591 int idx = aux_pcm_get_port_idx(kcontrol);
1592
1593 if (idx < 0)
1594 return idx;
1595
1596 ucontrol->value.enumerated.item[0] =
1597 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1598
1599 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1600 idx, aux_pcm_tx_cfg[idx].sample_rate,
1601 ucontrol->value.enumerated.item[0]);
1602
1603 return 0;
1604}
1605
1606static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1607 struct snd_ctl_elem_value *ucontrol)
1608{
1609 int idx = aux_pcm_get_port_idx(kcontrol);
1610
1611 if (idx < 0)
1612 return idx;
1613
1614 aux_pcm_tx_cfg[idx].sample_rate =
1615 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1616
1617 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1618 idx, aux_pcm_tx_cfg[idx].sample_rate,
1619 ucontrol->value.enumerated.item[0]);
1620
1621 return 0;
1622}
1623
1624static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1625 struct snd_ctl_elem_value *ucontrol)
1626{
1627 int idx = aux_pcm_get_port_idx(kcontrol);
1628
1629 if (idx < 0)
1630 return idx;
1631
1632 ucontrol->value.enumerated.item[0] =
1633 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1634
1635 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1636 idx, aux_pcm_rx_cfg[idx].bit_format,
1637 ucontrol->value.enumerated.item[0]);
1638
1639 return 0;
1640}
1641
1642static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1643 struct snd_ctl_elem_value *ucontrol)
1644{
1645 int idx = aux_pcm_get_port_idx(kcontrol);
1646
1647 if (idx < 0)
1648 return idx;
1649
1650 aux_pcm_rx_cfg[idx].bit_format =
1651 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1652
1653 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1654 idx, aux_pcm_rx_cfg[idx].bit_format,
1655 ucontrol->value.enumerated.item[0]);
1656
1657 return 0;
1658}
1659
1660static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1662{
1663 int idx = aux_pcm_get_port_idx(kcontrol);
1664
1665 if (idx < 0)
1666 return idx;
1667
1668 ucontrol->value.enumerated.item[0] =
1669 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1670
1671 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1672 idx, aux_pcm_tx_cfg[idx].bit_format,
1673 ucontrol->value.enumerated.item[0]);
1674
1675 return 0;
1676}
1677
1678static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
1680{
1681 int idx = aux_pcm_get_port_idx(kcontrol);
1682
1683 if (idx < 0)
1684 return idx;
1685
1686 aux_pcm_tx_cfg[idx].bit_format =
1687 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1688
1689 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1690 idx, aux_pcm_tx_cfg[idx].bit_format,
1691 ucontrol->value.enumerated.item[0]);
1692
1693 return 0;
1694}
1695
1696static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1697{
1698 int idx = 0;
1699
1700 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1701 sizeof("PRIM_MI2S_RX"))) {
1702 idx = PRIM_MI2S;
1703 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1704 sizeof("SEC_MI2S_RX"))) {
1705 idx = SEC_MI2S;
1706 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1707 sizeof("TERT_MI2S_RX"))) {
1708 idx = TERT_MI2S;
1709 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1710 sizeof("QUAT_MI2S_RX"))) {
1711 idx = QUAT_MI2S;
1712 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1713 sizeof("PRIM_MI2S_TX"))) {
1714 idx = PRIM_MI2S;
1715 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1716 sizeof("SEC_MI2S_TX"))) {
1717 idx = SEC_MI2S;
1718 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1719 sizeof("TERT_MI2S_TX"))) {
1720 idx = TERT_MI2S;
1721 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1722 sizeof("QUAT_MI2S_TX"))) {
1723 idx = QUAT_MI2S;
1724 } else {
1725 pr_err("%s: unsupported channel: %s\n",
1726 __func__, kcontrol->id.name);
1727 idx = -EINVAL;
1728 }
1729
1730 return idx;
1731}
1732
1733static int mi2s_get_sample_rate(int value)
1734{
1735 int sample_rate = 0;
1736
1737 switch (value) {
1738 case 0:
1739 sample_rate = SAMPLING_RATE_8KHZ;
1740 break;
1741 case 1:
1742 sample_rate = SAMPLING_RATE_11P025KHZ;
1743 break;
1744 case 2:
1745 sample_rate = SAMPLING_RATE_16KHZ;
1746 break;
1747 case 3:
1748 sample_rate = SAMPLING_RATE_22P05KHZ;
1749 break;
1750 case 4:
1751 sample_rate = SAMPLING_RATE_32KHZ;
1752 break;
1753 case 5:
1754 sample_rate = SAMPLING_RATE_44P1KHZ;
1755 break;
1756 case 6:
1757 sample_rate = SAMPLING_RATE_48KHZ;
1758 break;
1759 case 7:
1760 sample_rate = SAMPLING_RATE_96KHZ;
1761 break;
1762 case 8:
1763 sample_rate = SAMPLING_RATE_192KHZ;
1764 break;
1765 default:
1766 sample_rate = SAMPLING_RATE_48KHZ;
1767 break;
1768 }
1769 return sample_rate;
1770}
1771
1772static int mi2s_get_sample_rate_val(int sample_rate)
1773{
1774 int sample_rate_val = 0;
1775
1776 switch (sample_rate) {
1777 case SAMPLING_RATE_8KHZ:
1778 sample_rate_val = 0;
1779 break;
1780 case SAMPLING_RATE_11P025KHZ:
1781 sample_rate_val = 1;
1782 break;
1783 case SAMPLING_RATE_16KHZ:
1784 sample_rate_val = 2;
1785 break;
1786 case SAMPLING_RATE_22P05KHZ:
1787 sample_rate_val = 3;
1788 break;
1789 case SAMPLING_RATE_32KHZ:
1790 sample_rate_val = 4;
1791 break;
1792 case SAMPLING_RATE_44P1KHZ:
1793 sample_rate_val = 5;
1794 break;
1795 case SAMPLING_RATE_48KHZ:
1796 sample_rate_val = 6;
1797 break;
1798 case SAMPLING_RATE_96KHZ:
1799 sample_rate_val = 7;
1800 break;
1801 case SAMPLING_RATE_192KHZ:
1802 sample_rate_val = 8;
1803 break;
1804 default:
1805 sample_rate_val = 6;
1806 break;
1807 }
1808 return sample_rate_val;
1809}
1810
1811static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1812 struct snd_ctl_elem_value *ucontrol)
1813{
1814 int idx = mi2s_get_port_idx(kcontrol);
1815
1816 if (idx < 0)
1817 return idx;
1818
1819 ucontrol->value.enumerated.item[0] =
1820 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1821
1822 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1823 idx, mi2s_rx_cfg[idx].sample_rate,
1824 ucontrol->value.enumerated.item[0]);
1825
1826 return 0;
1827}
1828
1829static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1830 struct snd_ctl_elem_value *ucontrol)
1831{
1832 int idx = mi2s_get_port_idx(kcontrol);
1833
1834 if (idx < 0)
1835 return idx;
1836
1837 mi2s_rx_cfg[idx].sample_rate =
1838 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1839
1840 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1841 idx, mi2s_rx_cfg[idx].sample_rate,
1842 ucontrol->value.enumerated.item[0]);
1843
1844 return 0;
1845}
1846
1847static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1848 struct snd_ctl_elem_value *ucontrol)
1849{
1850 int idx = mi2s_get_port_idx(kcontrol);
1851
1852 if (idx < 0)
1853 return idx;
1854
1855 ucontrol->value.enumerated.item[0] =
1856 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1857
1858 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1859 idx, mi2s_tx_cfg[idx].sample_rate,
1860 ucontrol->value.enumerated.item[0]);
1861
1862 return 0;
1863}
1864
1865static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1866 struct snd_ctl_elem_value *ucontrol)
1867{
1868 int idx = mi2s_get_port_idx(kcontrol);
1869
1870 if (idx < 0)
1871 return idx;
1872
1873 mi2s_tx_cfg[idx].sample_rate =
1874 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1875
1876 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1877 idx, mi2s_tx_cfg[idx].sample_rate,
1878 ucontrol->value.enumerated.item[0]);
1879
1880 return 0;
1881}
1882
1883static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1884 struct snd_ctl_elem_value *ucontrol)
1885{
1886 int idx = mi2s_get_port_idx(kcontrol);
1887
1888 if (idx < 0)
1889 return idx;
1890
1891 ucontrol->value.enumerated.item[0] =
1892 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
1893
1894 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1895 idx, mi2s_rx_cfg[idx].bit_format,
1896 ucontrol->value.enumerated.item[0]);
1897
1898 return 0;
1899}
1900
1901static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1902 struct snd_ctl_elem_value *ucontrol)
1903{
1904 int idx = mi2s_get_port_idx(kcontrol);
1905
1906 if (idx < 0)
1907 return idx;
1908
1909 mi2s_rx_cfg[idx].bit_format =
1910 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1911
1912 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1913 idx, mi2s_rx_cfg[idx].bit_format,
1914 ucontrol->value.enumerated.item[0]);
1915
1916 return 0;
1917}
1918
1919static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1920 struct snd_ctl_elem_value *ucontrol)
1921{
1922 int idx = mi2s_get_port_idx(kcontrol);
1923
1924 if (idx < 0)
1925 return idx;
1926
1927 ucontrol->value.enumerated.item[0] =
1928 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
1929
1930 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1931 idx, mi2s_tx_cfg[idx].bit_format,
1932 ucontrol->value.enumerated.item[0]);
1933
1934 return 0;
1935}
1936
1937static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1938 struct snd_ctl_elem_value *ucontrol)
1939{
1940 int idx = mi2s_get_port_idx(kcontrol);
1941
1942 if (idx < 0)
1943 return idx;
1944
1945 mi2s_tx_cfg[idx].bit_format =
1946 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1947
1948 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1949 idx, mi2s_tx_cfg[idx].bit_format,
1950 ucontrol->value.enumerated.item[0]);
1951
1952 return 0;
1953}
1954static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1955 struct snd_ctl_elem_value *ucontrol)
1956{
1957 int idx = mi2s_get_port_idx(kcontrol);
1958
1959 if (idx < 0)
1960 return idx;
1961
1962 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1963 idx, mi2s_rx_cfg[idx].channels);
1964 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1965
1966 return 0;
1967}
1968
1969static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1970 struct snd_ctl_elem_value *ucontrol)
1971{
1972 int idx = mi2s_get_port_idx(kcontrol);
1973
1974 if (idx < 0)
1975 return idx;
1976
1977 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1978 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1979 idx, mi2s_rx_cfg[idx].channels);
1980
1981 return 1;
1982}
1983
1984static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1985 struct snd_ctl_elem_value *ucontrol)
1986{
1987 int idx = mi2s_get_port_idx(kcontrol);
1988
1989 if (idx < 0)
1990 return idx;
1991
1992 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1993 idx, mi2s_tx_cfg[idx].channels);
1994 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1995
1996 return 0;
1997}
1998
1999static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2000 struct snd_ctl_elem_value *ucontrol)
2001{
2002 int idx = mi2s_get_port_idx(kcontrol);
2003
2004 if (idx < 0)
2005 return idx;
2006
2007 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2008 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2009 idx, mi2s_tx_cfg[idx].channels);
2010
2011 return 1;
2012}
2013
2014static int msm_get_port_id(int be_id)
2015{
2016 int afe_port_id = 0;
2017
2018 switch (be_id) {
2019 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2020 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2021 break;
2022 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2023 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2024 break;
2025 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2026 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2027 break;
2028 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2029 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2030 break;
2031 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2032 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2033 break;
2034 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2035 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2036 break;
2037 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2038 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2039 break;
2040 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2041 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2042 break;
2043 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2044 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2045 break;
2046 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2047 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2048 break;
2049 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2050 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2051 break;
2052 default:
2053 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2054 afe_port_id = -EINVAL;
2055 }
2056
2057 return afe_port_id;
2058}
2059
2060static u32 get_mi2s_bits_per_sample(u32 bit_format)
2061{
2062 u32 bit_per_sample = 0;
2063
2064 switch (bit_format) {
2065 case SNDRV_PCM_FORMAT_S32_LE:
2066 case SNDRV_PCM_FORMAT_S24_3LE:
2067 case SNDRV_PCM_FORMAT_S24_LE:
2068 bit_per_sample = 32;
2069 break;
2070 case SNDRV_PCM_FORMAT_S16_LE:
2071 default:
2072 bit_per_sample = 16;
2073 break;
2074 }
2075
2076 return bit_per_sample;
2077}
2078
2079static void update_mi2s_clk_val(int dai_id, int stream)
2080{
2081 u32 bit_per_sample = 0;
2082
2083 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2084 bit_per_sample =
2085 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2086 mi2s_clk[dai_id].clk_freq_in_hz =
2087 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2088 } else {
2089 bit_per_sample =
2090 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2091 mi2s_clk[dai_id].clk_freq_in_hz =
2092 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2093 }
2094}
2095
2096static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2097{
2098 int ret = 0;
2099 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2100 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2101 int port_id = 0;
2102 int index = cpu_dai->id;
2103
2104 port_id = msm_get_port_id(rtd->dai_link->id);
2105 if (port_id < 0) {
2106 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2107 ret = port_id;
2108 goto err;
2109 }
2110
2111 if (enable) {
2112 update_mi2s_clk_val(index, substream->stream);
2113 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2114 mi2s_clk[index].clk_freq_in_hz);
2115 }
2116
2117 mi2s_clk[index].enable = enable;
2118 ret = afe_set_lpass_clock_v2(port_id,
2119 &mi2s_clk[index]);
2120 if (ret < 0) {
2121 dev_err(rtd->card->dev,
2122 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2123 __func__, port_id, ret);
2124 goto err;
2125 }
2126
2127err:
2128 return ret;
2129}
2130
2131static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2132{
2133 int idx = 0;
2134
2135 if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2136 sizeof("RX_CDC_DMA_RX_0")))
2137 idx = RX_CDC_DMA_RX_0;
2138 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2139 sizeof("RX_CDC_DMA_RX_1")))
2140 idx = RX_CDC_DMA_RX_1;
2141 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2142 sizeof("RX_CDC_DMA_RX_2")))
2143 idx = RX_CDC_DMA_RX_2;
2144 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2145 sizeof("RX_CDC_DMA_RX_3")))
2146 idx = RX_CDC_DMA_RX_3;
2147 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2148 sizeof("RX_CDC_DMA_RX_5")))
2149 idx = RX_CDC_DMA_RX_5;
2150 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2151 sizeof("TX_CDC_DMA_TX_0")))
2152 idx = TX_CDC_DMA_TX_0;
2153 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2154 sizeof("TX_CDC_DMA_TX_3")))
2155 idx = TX_CDC_DMA_TX_3;
2156 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2157 sizeof("TX_CDC_DMA_TX_4")))
2158 idx = TX_CDC_DMA_TX_4;
2159 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2160 sizeof("VA_CDC_DMA_TX_0")))
2161 idx = VA_CDC_DMA_TX_0;
2162 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2163 sizeof("VA_CDC_DMA_TX_1")))
2164 idx = VA_CDC_DMA_TX_1;
2165 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2166 sizeof("VA_CDC_DMA_TX_2")))
2167 idx = VA_CDC_DMA_TX_2;
2168 else {
2169 pr_err("%s: unsupported channel: %s\n",
2170 __func__, kcontrol->id.name);
2171 return -EINVAL;
2172 }
2173
2174 return idx;
2175}
2176
2177static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2178 struct snd_ctl_elem_value *ucontrol)
2179{
2180 int ch_num = cdc_dma_get_port_idx(kcontrol);
2181
2182 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2183 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2184 return ch_num;
2185 }
2186
2187 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2188 cdc_dma_rx_cfg[ch_num].channels - 1);
2189 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2190 return 0;
2191}
2192
2193static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2194 struct snd_ctl_elem_value *ucontrol)
2195{
2196 int ch_num = cdc_dma_get_port_idx(kcontrol);
2197
2198 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2199 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2200 return ch_num;
2201 }
2202
2203 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2204
2205 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2206 cdc_dma_rx_cfg[ch_num].channels);
2207 return 1;
2208}
2209
2210static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2211 struct snd_ctl_elem_value *ucontrol)
2212{
2213 int ch_num = cdc_dma_get_port_idx(kcontrol);
2214
2215 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2216 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2217 return ch_num;
2218 }
2219
2220 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2221 case SNDRV_PCM_FORMAT_S32_LE:
2222 ucontrol->value.integer.value[0] = 3;
2223 break;
2224 case SNDRV_PCM_FORMAT_S24_3LE:
2225 ucontrol->value.integer.value[0] = 2;
2226 break;
2227 case SNDRV_PCM_FORMAT_S24_LE:
2228 ucontrol->value.integer.value[0] = 1;
2229 break;
2230 case SNDRV_PCM_FORMAT_S16_LE:
2231 default:
2232 ucontrol->value.integer.value[0] = 0;
2233 break;
2234 }
2235
2236 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2237 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2238 ucontrol->value.integer.value[0]);
2239 return 0;
2240}
2241
2242static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2243 struct snd_ctl_elem_value *ucontrol)
2244{
2245 int rc = 0;
2246 int ch_num = cdc_dma_get_port_idx(kcontrol);
2247
2248 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2249 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2250 return ch_num;
2251 }
2252
2253 switch (ucontrol->value.integer.value[0]) {
2254 case 3:
2255 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2256 break;
2257 case 2:
2258 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2259 break;
2260 case 1:
2261 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2262 break;
2263 case 0:
2264 default:
2265 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2266 break;
2267 }
2268 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2269 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2270 ucontrol->value.integer.value[0]);
2271
2272 return rc;
2273}
2274
2275
2276static int cdc_dma_get_sample_rate_val(int sample_rate)
2277{
2278 int sample_rate_val = 0;
2279
2280 switch (sample_rate) {
2281 case SAMPLING_RATE_8KHZ:
2282 sample_rate_val = 0;
2283 break;
2284 case SAMPLING_RATE_11P025KHZ:
2285 sample_rate_val = 1;
2286 break;
2287 case SAMPLING_RATE_16KHZ:
2288 sample_rate_val = 2;
2289 break;
2290 case SAMPLING_RATE_22P05KHZ:
2291 sample_rate_val = 3;
2292 break;
2293 case SAMPLING_RATE_32KHZ:
2294 sample_rate_val = 4;
2295 break;
2296 case SAMPLING_RATE_44P1KHZ:
2297 sample_rate_val = 5;
2298 break;
2299 case SAMPLING_RATE_48KHZ:
2300 sample_rate_val = 6;
2301 break;
2302 case SAMPLING_RATE_88P2KHZ:
2303 sample_rate_val = 7;
2304 break;
2305 case SAMPLING_RATE_96KHZ:
2306 sample_rate_val = 8;
2307 break;
2308 case SAMPLING_RATE_176P4KHZ:
2309 sample_rate_val = 9;
2310 break;
2311 case SAMPLING_RATE_192KHZ:
2312 sample_rate_val = 10;
2313 break;
2314 case SAMPLING_RATE_352P8KHZ:
2315 sample_rate_val = 11;
2316 break;
2317 case SAMPLING_RATE_384KHZ:
2318 sample_rate_val = 12;
2319 break;
2320 default:
2321 sample_rate_val = 6;
2322 break;
2323 }
2324 return sample_rate_val;
2325}
2326
2327static int cdc_dma_get_sample_rate(int value)
2328{
2329 int sample_rate = 0;
2330
2331 switch (value) {
2332 case 0:
2333 sample_rate = SAMPLING_RATE_8KHZ;
2334 break;
2335 case 1:
2336 sample_rate = SAMPLING_RATE_11P025KHZ;
2337 break;
2338 case 2:
2339 sample_rate = SAMPLING_RATE_16KHZ;
2340 break;
2341 case 3:
2342 sample_rate = SAMPLING_RATE_22P05KHZ;
2343 break;
2344 case 4:
2345 sample_rate = SAMPLING_RATE_32KHZ;
2346 break;
2347 case 5:
2348 sample_rate = SAMPLING_RATE_44P1KHZ;
2349 break;
2350 case 6:
2351 sample_rate = SAMPLING_RATE_48KHZ;
2352 break;
2353 case 7:
2354 sample_rate = SAMPLING_RATE_88P2KHZ;
2355 break;
2356 case 8:
2357 sample_rate = SAMPLING_RATE_96KHZ;
2358 break;
2359 case 9:
2360 sample_rate = SAMPLING_RATE_176P4KHZ;
2361 break;
2362 case 10:
2363 sample_rate = SAMPLING_RATE_192KHZ;
2364 break;
2365 case 11:
2366 sample_rate = SAMPLING_RATE_352P8KHZ;
2367 break;
2368 case 12:
2369 sample_rate = SAMPLING_RATE_384KHZ;
2370 break;
2371 default:
2372 sample_rate = SAMPLING_RATE_48KHZ;
2373 break;
2374 }
2375 return sample_rate;
2376}
2377
2378static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2379 struct snd_ctl_elem_value *ucontrol)
2380{
2381 int ch_num = cdc_dma_get_port_idx(kcontrol);
2382
2383 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2384 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2385 return ch_num;
2386 }
2387
2388 ucontrol->value.enumerated.item[0] =
2389 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2390
2391 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2392 cdc_dma_rx_cfg[ch_num].sample_rate);
2393 return 0;
2394}
2395
2396static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2397 struct snd_ctl_elem_value *ucontrol)
2398{
2399 int ch_num = cdc_dma_get_port_idx(kcontrol);
2400
2401 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2402 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2403 return ch_num;
2404 }
2405
2406 cdc_dma_rx_cfg[ch_num].sample_rate =
2407 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2408
2409
2410 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2411 __func__, ucontrol->value.enumerated.item[0],
2412 cdc_dma_rx_cfg[ch_num].sample_rate);
2413 return 0;
2414}
2415
2416static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2417 struct snd_ctl_elem_value *ucontrol)
2418{
2419 int ch_num = cdc_dma_get_port_idx(kcontrol);
2420
2421 if (ch_num < 0) {
2422 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2423 return ch_num;
2424 }
2425
2426 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2427 cdc_dma_tx_cfg[ch_num].channels);
2428 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2429 return 0;
2430}
2431
2432static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2433 struct snd_ctl_elem_value *ucontrol)
2434{
2435 int ch_num = cdc_dma_get_port_idx(kcontrol);
2436
2437 if (ch_num < 0) {
2438 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2439 return ch_num;
2440 }
2441
2442 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2443
2444 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2445 cdc_dma_tx_cfg[ch_num].channels);
2446 return 1;
2447}
2448
2449static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2450 struct snd_ctl_elem_value *ucontrol)
2451{
2452 int sample_rate_val;
2453 int ch_num = cdc_dma_get_port_idx(kcontrol);
2454
2455 if (ch_num < 0) {
2456 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2457 return ch_num;
2458 }
2459
2460 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2461 case SAMPLING_RATE_384KHZ:
2462 sample_rate_val = 12;
2463 break;
2464 case SAMPLING_RATE_352P8KHZ:
2465 sample_rate_val = 11;
2466 break;
2467 case SAMPLING_RATE_192KHZ:
2468 sample_rate_val = 10;
2469 break;
2470 case SAMPLING_RATE_176P4KHZ:
2471 sample_rate_val = 9;
2472 break;
2473 case SAMPLING_RATE_96KHZ:
2474 sample_rate_val = 8;
2475 break;
2476 case SAMPLING_RATE_88P2KHZ:
2477 sample_rate_val = 7;
2478 break;
2479 case SAMPLING_RATE_48KHZ:
2480 sample_rate_val = 6;
2481 break;
2482 case SAMPLING_RATE_44P1KHZ:
2483 sample_rate_val = 5;
2484 break;
2485 case SAMPLING_RATE_32KHZ:
2486 sample_rate_val = 4;
2487 break;
2488 case SAMPLING_RATE_22P05KHZ:
2489 sample_rate_val = 3;
2490 break;
2491 case SAMPLING_RATE_16KHZ:
2492 sample_rate_val = 2;
2493 break;
2494 case SAMPLING_RATE_11P025KHZ:
2495 sample_rate_val = 1;
2496 break;
2497 case SAMPLING_RATE_8KHZ:
2498 sample_rate_val = 0;
2499 break;
2500 default:
2501 sample_rate_val = 6;
2502 break;
2503 }
2504
2505 ucontrol->value.integer.value[0] = sample_rate_val;
2506 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2507 cdc_dma_tx_cfg[ch_num].sample_rate);
2508 return 0;
2509}
2510
2511static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2512 struct snd_ctl_elem_value *ucontrol)
2513{
2514 int ch_num = cdc_dma_get_port_idx(kcontrol);
2515
2516 if (ch_num < 0) {
2517 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2518 return ch_num;
2519 }
2520
2521 switch (ucontrol->value.integer.value[0]) {
2522 case 12:
2523 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2524 break;
2525 case 11:
2526 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2527 break;
2528 case 10:
2529 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2530 break;
2531 case 9:
2532 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2533 break;
2534 case 8:
2535 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2536 break;
2537 case 7:
2538 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2539 break;
2540 case 6:
2541 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2542 break;
2543 case 5:
2544 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2545 break;
2546 case 4:
2547 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2548 break;
2549 case 3:
2550 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2551 break;
2552 case 2:
2553 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2554 break;
2555 case 1:
2556 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2557 break;
2558 case 0:
2559 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2560 break;
2561 default:
2562 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2563 break;
2564 }
2565
2566 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2567 __func__, ucontrol->value.integer.value[0],
2568 cdc_dma_tx_cfg[ch_num].sample_rate);
2569 return 0;
2570}
2571
2572static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2573 struct snd_ctl_elem_value *ucontrol)
2574{
2575 int ch_num = cdc_dma_get_port_idx(kcontrol);
2576
2577 if (ch_num < 0) {
2578 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2579 return ch_num;
2580 }
2581
2582 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2583 case SNDRV_PCM_FORMAT_S32_LE:
2584 ucontrol->value.integer.value[0] = 3;
2585 break;
2586 case SNDRV_PCM_FORMAT_S24_3LE:
2587 ucontrol->value.integer.value[0] = 2;
2588 break;
2589 case SNDRV_PCM_FORMAT_S24_LE:
2590 ucontrol->value.integer.value[0] = 1;
2591 break;
2592 case SNDRV_PCM_FORMAT_S16_LE:
2593 default:
2594 ucontrol->value.integer.value[0] = 0;
2595 break;
2596 }
2597
2598 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2599 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2600 ucontrol->value.integer.value[0]);
2601 return 0;
2602}
2603
2604static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2605 struct snd_ctl_elem_value *ucontrol)
2606{
2607 int rc = 0;
2608 int ch_num = cdc_dma_get_port_idx(kcontrol);
2609
2610 if (ch_num < 0) {
2611 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2612 return ch_num;
2613 }
2614
2615 switch (ucontrol->value.integer.value[0]) {
2616 case 3:
2617 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2618 break;
2619 case 2:
2620 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2621 break;
2622 case 1:
2623 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2624 break;
2625 case 0:
2626 default:
2627 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2628 break;
2629 }
2630 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2631 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2632 ucontrol->value.integer.value[0]);
2633
2634 return rc;
2635}
2636
2637static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2638{
2639 int idx = 0;
2640
2641 switch (be_id) {
2642 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2643 idx = RX_CDC_DMA_RX_0;
2644 break;
2645 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2646 idx = RX_CDC_DMA_RX_1;
2647 break;
2648 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2649 idx = RX_CDC_DMA_RX_2;
2650 break;
2651 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2652 idx = RX_CDC_DMA_RX_3;
2653 break;
2654 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2655 idx = RX_CDC_DMA_RX_5;
2656 break;
2657 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2658 idx = TX_CDC_DMA_TX_0;
2659 break;
2660 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2661 idx = TX_CDC_DMA_TX_3;
2662 break;
2663 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2664 idx = TX_CDC_DMA_TX_4;
2665 break;
2666 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2667 idx = VA_CDC_DMA_TX_0;
2668 break;
2669 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2670 idx = VA_CDC_DMA_TX_1;
2671 break;
2672 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2673 idx = VA_CDC_DMA_TX_2;
2674 break;
2675 default:
2676 idx = RX_CDC_DMA_RX_0;
2677 break;
2678 }
2679
2680 return idx;
2681}
2682
2683static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2684 struct snd_ctl_elem_value *ucontrol)
2685{
2686 /*
2687 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2688 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2689 * value.
2690 */
2691 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2692 case SAMPLING_RATE_96KHZ:
2693 ucontrol->value.integer.value[0] = 5;
2694 break;
2695 case SAMPLING_RATE_88P2KHZ:
2696 ucontrol->value.integer.value[0] = 4;
2697 break;
2698 case SAMPLING_RATE_48KHZ:
2699 ucontrol->value.integer.value[0] = 3;
2700 break;
2701 case SAMPLING_RATE_44P1KHZ:
2702 ucontrol->value.integer.value[0] = 2;
2703 break;
2704 case SAMPLING_RATE_16KHZ:
2705 ucontrol->value.integer.value[0] = 1;
2706 break;
2707 case SAMPLING_RATE_8KHZ:
2708 default:
2709 ucontrol->value.integer.value[0] = 0;
2710 break;
2711 }
2712 pr_debug("%s: sample rate = %d\n", __func__,
2713 slim_rx_cfg[SLIM_RX_7].sample_rate);
2714
2715 return 0;
2716}
2717
2718static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2719 struct snd_ctl_elem_value *ucontrol)
2720{
2721 switch (ucontrol->value.integer.value[0]) {
2722 case 1:
2723 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2724 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2725 break;
2726 case 2:
2727 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2728 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2729 break;
2730 case 3:
2731 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2732 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2733 break;
2734 case 4:
2735 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2736 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2737 break;
2738 case 5:
2739 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2740 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2741 break;
2742 case 0:
2743 default:
2744 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2745 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2746 break;
2747 }
2748 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2749 __func__,
2750 slim_rx_cfg[SLIM_RX_7].sample_rate,
2751 slim_tx_cfg[SLIM_TX_7].sample_rate,
2752 ucontrol->value.enumerated.item[0]);
2753
2754 return 0;
2755}
2756
2757static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2758 struct snd_ctl_elem_value *ucontrol)
2759{
2760 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2761 case SAMPLING_RATE_96KHZ:
2762 ucontrol->value.integer.value[0] = 5;
2763 break;
2764 case SAMPLING_RATE_88P2KHZ:
2765 ucontrol->value.integer.value[0] = 4;
2766 break;
2767 case SAMPLING_RATE_48KHZ:
2768 ucontrol->value.integer.value[0] = 3;
2769 break;
2770 case SAMPLING_RATE_44P1KHZ:
2771 ucontrol->value.integer.value[0] = 2;
2772 break;
2773 case SAMPLING_RATE_16KHZ:
2774 ucontrol->value.integer.value[0] = 1;
2775 break;
2776 case SAMPLING_RATE_8KHZ:
2777 default:
2778 ucontrol->value.integer.value[0] = 0;
2779 break;
2780 }
2781 pr_debug("%s: sample rate rx = %d\n", __func__,
2782 slim_rx_cfg[SLIM_RX_7].sample_rate);
2783
2784 return 0;
2785}
2786
2787static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2788 struct snd_ctl_elem_value *ucontrol)
2789{
2790 switch (ucontrol->value.integer.value[0]) {
2791 case 1:
2792 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2793 break;
2794 case 2:
2795 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2796 break;
2797 case 3:
2798 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2799 break;
2800 case 4:
2801 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2802 break;
2803 case 5:
2804 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2805 break;
2806 case 0:
2807 default:
2808 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2809 break;
2810 }
2811 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2812 __func__,
2813 slim_rx_cfg[SLIM_RX_7].sample_rate,
2814 ucontrol->value.enumerated.item[0]);
2815
2816 return 0;
2817}
2818
2819static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
2820 struct snd_ctl_elem_value *ucontrol)
2821{
2822 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
2823 case SAMPLING_RATE_96KHZ:
2824 ucontrol->value.integer.value[0] = 5;
2825 break;
2826 case SAMPLING_RATE_88P2KHZ:
2827 ucontrol->value.integer.value[0] = 4;
2828 break;
2829 case SAMPLING_RATE_48KHZ:
2830 ucontrol->value.integer.value[0] = 3;
2831 break;
2832 case SAMPLING_RATE_44P1KHZ:
2833 ucontrol->value.integer.value[0] = 2;
2834 break;
2835 case SAMPLING_RATE_16KHZ:
2836 ucontrol->value.integer.value[0] = 1;
2837 break;
2838 case SAMPLING_RATE_8KHZ:
2839 default:
2840 ucontrol->value.integer.value[0] = 0;
2841 break;
2842 }
2843 pr_debug("%s: sample rate tx = %d\n", __func__,
2844 slim_tx_cfg[SLIM_TX_7].sample_rate);
2845
2846 return 0;
2847}
2848
2849static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
2850 struct snd_ctl_elem_value *ucontrol)
2851{
2852 switch (ucontrol->value.integer.value[0]) {
2853 case 1:
2854 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2855 break;
2856 case 2:
2857 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2858 break;
2859 case 3:
2860 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2861 break;
2862 case 4:
2863 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2864 break;
2865 case 5:
2866 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2867 break;
2868 case 0:
2869 default:
2870 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2871 break;
2872 }
2873 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
2874 __func__,
2875 slim_tx_cfg[SLIM_TX_7].sample_rate,
2876 ucontrol->value.enumerated.item[0]);
2877
2878 return 0;
2879}
2880
2881static const struct snd_kcontrol_new msm_int_snd_controls[] = {
2882 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
2883 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2884 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
2885 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2886 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
2887 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2888 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
2889 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2890 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
2891 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2892 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
2893 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2894 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
2895 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2896 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
2897 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2898 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
2899 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2900 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
2901 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2902 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
2903 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2904 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
2905 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2906 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
2907 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2908 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
2909 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2910 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
2911 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2912 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
2913 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2914 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
2915 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2916 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
2917 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2918 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
2919 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2920 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
2921 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2922 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
2923 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2924 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
2925 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2926 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
2927 rx_cdc_dma_rx_0_sample_rate,
2928 cdc_dma_rx_sample_rate_get,
2929 cdc_dma_rx_sample_rate_put),
2930 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
2931 rx_cdc_dma_rx_1_sample_rate,
2932 cdc_dma_rx_sample_rate_get,
2933 cdc_dma_rx_sample_rate_put),
2934 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
2935 rx_cdc_dma_rx_2_sample_rate,
2936 cdc_dma_rx_sample_rate_get,
2937 cdc_dma_rx_sample_rate_put),
2938 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
2939 rx_cdc_dma_rx_3_sample_rate,
2940 cdc_dma_rx_sample_rate_get,
2941 cdc_dma_rx_sample_rate_put),
2942 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
2943 rx_cdc_dma_rx_5_sample_rate,
2944 cdc_dma_rx_sample_rate_get,
2945 cdc_dma_rx_sample_rate_put),
2946 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
2947 tx_cdc_dma_tx_0_sample_rate,
2948 cdc_dma_tx_sample_rate_get,
2949 cdc_dma_tx_sample_rate_put),
2950 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
2951 tx_cdc_dma_tx_3_sample_rate,
2952 cdc_dma_tx_sample_rate_get,
2953 cdc_dma_tx_sample_rate_put),
2954 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
2955 tx_cdc_dma_tx_4_sample_rate,
2956 cdc_dma_tx_sample_rate_get,
2957 cdc_dma_tx_sample_rate_put),
2958 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
2959 va_cdc_dma_tx_0_sample_rate,
2960 cdc_dma_tx_sample_rate_get,
2961 cdc_dma_tx_sample_rate_put),
2962 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
2963 va_cdc_dma_tx_1_sample_rate,
2964 cdc_dma_tx_sample_rate_get,
2965 cdc_dma_tx_sample_rate_put),
2966 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
2967 va_cdc_dma_tx_2_sample_rate,
2968 cdc_dma_tx_sample_rate_get,
2969 cdc_dma_tx_sample_rate_put),
2970};
2971
2972static const struct snd_kcontrol_new msm_common_snd_controls[] = {
2973 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
2974 usb_audio_rx_sample_rate_get,
2975 usb_audio_rx_sample_rate_put),
2976 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
2977 usb_audio_tx_sample_rate_get,
2978 usb_audio_tx_sample_rate_put),
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]2979 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
2980 usb_audio_rx_format_get, usb_audio_rx_format_put),
2981 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
2982 usb_audio_tx_format_get, usb_audio_tx_format_put),
2983 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
2984 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
2985 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
2986 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
2987 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
2988 proxy_rx_ch_get, proxy_rx_ch_put),
2989 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
2990 msm_bt_sample_rate_get,
2991 msm_bt_sample_rate_put),
2992 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
2993 msm_bt_sample_rate_rx_get,
2994 msm_bt_sample_rate_rx_put),
2995 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
2996 msm_bt_sample_rate_tx_get,
2997 msm_bt_sample_rate_tx_put),
2998 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
2999 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3000 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3001 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3002};
3003
3004static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3005 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3006 tdm_rx_sample_rate_get,
3007 tdm_rx_sample_rate_put),
3008 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3009 tdm_rx_sample_rate_get,
3010 tdm_rx_sample_rate_put),
3011 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3012 tdm_rx_sample_rate_get,
3013 tdm_rx_sample_rate_put),
3014 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3015 tdm_rx_sample_rate_get,
3016 tdm_rx_sample_rate_put),
3017 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3018 tdm_tx_sample_rate_get,
3019 tdm_tx_sample_rate_put),
3020 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3021 tdm_tx_sample_rate_get,
3022 tdm_tx_sample_rate_put),
3023 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3024 tdm_tx_sample_rate_get,
3025 tdm_tx_sample_rate_put),
3026 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3027 tdm_tx_sample_rate_get,
3028 tdm_tx_sample_rate_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3029 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3030 tdm_rx_format_get,
3031 tdm_rx_format_put),
3032 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3033 tdm_rx_format_get,
3034 tdm_rx_format_put),
3035 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3036 tdm_rx_format_get,
3037 tdm_rx_format_put),
3038 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3039 tdm_rx_format_get,
3040 tdm_rx_format_put),
3041 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3042 tdm_tx_format_get,
3043 tdm_tx_format_put),
3044 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3045 tdm_tx_format_get,
3046 tdm_tx_format_put),
3047 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3048 tdm_tx_format_get,
3049 tdm_tx_format_put),
3050 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3051 tdm_tx_format_get,
3052 tdm_tx_format_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3053 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3054 tdm_rx_ch_get,
3055 tdm_rx_ch_put),
3056 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3057 tdm_rx_ch_get,
3058 tdm_rx_ch_put),
3059 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3060 tdm_rx_ch_get,
3061 tdm_rx_ch_put),
3062 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3063 tdm_rx_ch_get,
3064 tdm_rx_ch_put),
3065 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3066 tdm_tx_ch_get,
3067 tdm_tx_ch_put),
3068 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3069 tdm_tx_ch_get,
3070 tdm_tx_ch_put),
3071 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3072 tdm_tx_ch_get,
3073 tdm_tx_ch_put),
3074 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3075 tdm_tx_ch_get,
3076 tdm_tx_ch_put),
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]3077};
3078
3079static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
3080 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3081 aux_pcm_rx_sample_rate_get,
3082 aux_pcm_rx_sample_rate_put),
3083 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3084 aux_pcm_rx_sample_rate_get,
3085 aux_pcm_rx_sample_rate_put),
3086 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3087 aux_pcm_rx_sample_rate_get,
3088 aux_pcm_rx_sample_rate_put),
3089 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3090 aux_pcm_rx_sample_rate_get,
3091 aux_pcm_rx_sample_rate_put),
3092 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3093 aux_pcm_tx_sample_rate_get,
3094 aux_pcm_tx_sample_rate_put),
3095 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3096 aux_pcm_tx_sample_rate_get,
3097 aux_pcm_tx_sample_rate_put),
3098 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3099 aux_pcm_tx_sample_rate_get,
3100 aux_pcm_tx_sample_rate_put),
3101 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3102 aux_pcm_tx_sample_rate_get,
3103 aux_pcm_tx_sample_rate_put),
3104 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3105 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3106 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3107 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3108 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3109 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3110 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3111 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3112 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3113 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3114 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3115 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3116 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3117 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3118 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3119 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3120};
3121
3122static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
3123 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3124 mi2s_rx_sample_rate_get,
3125 mi2s_rx_sample_rate_put),
3126 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3127 mi2s_rx_sample_rate_get,
3128 mi2s_rx_sample_rate_put),
3129 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3130 mi2s_rx_sample_rate_get,
3131 mi2s_rx_sample_rate_put),
3132 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3133 mi2s_rx_sample_rate_get,
3134 mi2s_tx_sample_rate_put),
3135 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3136 mi2s_tx_sample_rate_get,
3137 mi2s_tx_sample_rate_put),
3138 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3139 mi2s_tx_sample_rate_get,
3140 mi2s_tx_sample_rate_put),
3141 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3142 mi2s_tx_sample_rate_get,
3143 mi2s_tx_sample_rate_put),
3144 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3145 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3146 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3147 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3148 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3149 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3150 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3151 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3152 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3153 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3154 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3155 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3156 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3157 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3158 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3159 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3160 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3161 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3162 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3163 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3164 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3165 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3166 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3167 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3168 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3169 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3170 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3171 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3172 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3173 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3174 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3175 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3176};
3177
3178static const struct snd_kcontrol_new msm_snd_controls[] = {
3179 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3180 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3181 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3182 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3183 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3184 aux_pcm_rx_sample_rate_get,
3185 aux_pcm_rx_sample_rate_put),
3186 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3187 aux_pcm_tx_sample_rate_get,
3188 aux_pcm_tx_sample_rate_put),
3189};
3190
3191static int bengal_send_island_va_config(int32_t be_id)
3192{
3193 int rc = 0;
3194 int port_id = 0xFFFF;
3195
3196 port_id = msm_get_port_id(be_id);
3197 if (port_id < 0) {
3198 pr_err("%s: Invalid island interface, be_id: %d\n",
3199 __func__, be_id);
3200 rc = -EINVAL;
3201 } else {
3202 /*
3203 * send island mode config
3204 * This should be the first configuration
3205 */
3206 rc = afe_send_port_island_mode(port_id);
3207 if (rc)
3208 pr_err("%s: afe send island mode failed %d\n",
3209 __func__, rc);
3210 }
3211
3212 return rc;
3213}
3214
3215static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3216 struct snd_pcm_hw_params *params)
3217{
3218 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3219 struct snd_interval *rate = hw_param_interval(params,
3220 SNDRV_PCM_HW_PARAM_RATE);
3221 struct snd_interval *channels = hw_param_interval(params,
3222 SNDRV_PCM_HW_PARAM_CHANNELS);
3223 int idx = 0;
3224
3225 pr_debug("%s: format = %d, rate = %d\n",
3226 __func__, params_format(params), params_rate(params));
3227
3228 switch (dai_link->id) {
3229 case MSM_BACKEND_DAI_USB_RX:
3230 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3231 usb_rx_cfg.bit_format);
3232 rate->min = rate->max = usb_rx_cfg.sample_rate;
3233 channels->min = channels->max = usb_rx_cfg.channels;
3234 break;
3235
3236 case MSM_BACKEND_DAI_USB_TX:
3237 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3238 usb_tx_cfg.bit_format);
3239 rate->min = rate->max = usb_tx_cfg.sample_rate;
3240 channels->min = channels->max = usb_tx_cfg.channels;
3241 break;
3242
3243 case MSM_BACKEND_DAI_AFE_PCM_RX:
3244 channels->min = channels->max = proxy_rx_cfg.channels;
3245 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3246 break;
3247
3248 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3249 channels->min = channels->max =
3250 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3251 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3252 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3253 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3254 break;
3255
3256 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3257 channels->min = channels->max =
3258 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3259 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3260 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3261 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3262 break;
3263
3264 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3265 channels->min = channels->max =
3266 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3267 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3268 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3269 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3270 break;
3271
3272 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3273 channels->min = channels->max =
3274 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3275 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3276 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3277 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3278 break;
3279
3280 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3281 channels->min = channels->max =
3282 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3283 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3284 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3285 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3286 break;
3287
3288 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3289 channels->min = channels->max =
3290 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3291 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3292 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3293 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3294 break;
3295
3296 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3297 channels->min = channels->max =
3298 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3300 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3301 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3302 break;
3303
3304 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3305 channels->min = channels->max =
3306 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3308 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3309 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3310 break;
3311
3312 case MSM_BACKEND_DAI_AUXPCM_RX:
3313 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3314 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3315 rate->min = rate->max =
3316 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3317 channels->min = channels->max =
3318 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3319 break;
3320
3321 case MSM_BACKEND_DAI_AUXPCM_TX:
3322 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3323 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3324 rate->min = rate->max =
3325 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3326 channels->min = channels->max =
3327 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3328 break;
3329
3330 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3332 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3333 rate->min = rate->max =
3334 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3335 channels->min = channels->max =
3336 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3337 break;
3338
3339 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3341 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3342 rate->min = rate->max =
3343 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3344 channels->min = channels->max =
3345 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3346 break;
3347
3348 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3350 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3351 rate->min = rate->max =
3352 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3353 channels->min = channels->max =
3354 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3355 break;
3356
3357 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3358 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3359 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3360 rate->min = rate->max =
3361 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3362 channels->min = channels->max =
3363 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3364 break;
3365
3366 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3367 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3368 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3369 rate->min = rate->max =
3370 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3371 channels->min = channels->max =
3372 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3373 break;
3374
3375 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3376 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3377 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3378 rate->min = rate->max =
3379 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3380 channels->min = channels->max =
3381 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3382 break;
3383
3384 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3385 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3386 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3387 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3388 channels->min = channels->max =
3389 mi2s_rx_cfg[PRIM_MI2S].channels;
3390 break;
3391
3392 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3393 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3394 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3395 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3396 channels->min = channels->max =
3397 mi2s_tx_cfg[PRIM_MI2S].channels;
3398 break;
3399
3400 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3401 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3402 mi2s_rx_cfg[SEC_MI2S].bit_format);
3403 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3404 channels->min = channels->max =
3405 mi2s_rx_cfg[SEC_MI2S].channels;
3406 break;
3407
3408 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3409 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3410 mi2s_tx_cfg[SEC_MI2S].bit_format);
3411 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3412 channels->min = channels->max =
3413 mi2s_tx_cfg[SEC_MI2S].channels;
3414 break;
3415
3416 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3417 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3418 mi2s_rx_cfg[TERT_MI2S].bit_format);
3419 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3420 channels->min = channels->max =
3421 mi2s_rx_cfg[TERT_MI2S].channels;
3422 break;
3423
3424 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3425 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3426 mi2s_tx_cfg[TERT_MI2S].bit_format);
3427 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3428 channels->min = channels->max =
3429 mi2s_tx_cfg[TERT_MI2S].channels;
3430 break;
3431
3432 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
3433 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3434 mi2s_rx_cfg[QUAT_MI2S].bit_format);
3435 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
3436 channels->min = channels->max =
3437 mi2s_rx_cfg[QUAT_MI2S].channels;
3438 break;
3439
3440 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
3441 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3442 mi2s_tx_cfg[QUAT_MI2S].bit_format);
3443 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
3444 channels->min = channels->max =
3445 mi2s_tx_cfg[QUAT_MI2S].channels;
3446 break;
3447
3448 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3449 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3450 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3451 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3452 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3454 cdc_dma_rx_cfg[idx].bit_format);
3455 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3456 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3457 break;
3458
3459 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3460 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3461 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3462 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3463 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3464 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3465 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3466 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3467 cdc_dma_tx_cfg[idx].bit_format);
3468 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3469 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3470 break;
3471
3472 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3473 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3474 slim_rx_cfg[SLIM_RX_7].bit_format);
3475 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3476 channels->min = channels->max =
3477 slim_rx_cfg[SLIM_RX_7].channels;
3478 break;
3479
3480 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlaee5d0372019-12-06 16:08:14 +0530[diff] [blame]3481 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3482 slim_tx_cfg[SLIM_TX_7].bit_format);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3483 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3484 channels->min = channels->max =
3485 slim_tx_cfg[SLIM_TX_7].channels;
3486 break;
3487
3488 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3489 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3490 channels->min = channels->max =
3491 slim_tx_cfg[SLIM_TX_8].channels;
3492 break;
3493
3494 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3495 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3496 afe_loopback_tx_cfg[idx].bit_format);
3497 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3498 channels->min = channels->max =
3499 afe_loopback_tx_cfg[idx].channels;
3500 break;
3501
3502 default:
3503 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3504 break;
3505 }
3506
3507 return 0;
3508}
3509
3510static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
3511 bool active)
3512{
3513 struct snd_soc_card *card = component->card;
3514 struct msm_asoc_mach_data *pdata =
3515 snd_soc_card_get_drvdata(card);
3516
3517 if (!pdata->fsa_handle)
3518 return false;
3519
3520 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3521}
3522
3523static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3524{
3525 int value = 0;
3526 bool ret = false;
3527 struct snd_soc_card *card;
3528 struct msm_asoc_mach_data *pdata;
3529
3530 if (!component) {
3531 pr_err("%s component is NULL\n", __func__);
3532 return false;
3533 }
3534 card = component->card;
3535 pdata = snd_soc_card_get_drvdata(card);
3536
3537 if (!pdata)
3538 return false;
3539
3540 if (wcd_mbhc_cfg.enable_usbc_analog)
3541 return msm_usbc_swap_gnd_mic(component, active);
3542
3543 /* if usbc is not defined, swap using us_euro_gpio_p */
3544 if (pdata->us_euro_gpio_p) {
3545 value = msm_cdc_pinctrl_get_state(
3546 pdata->us_euro_gpio_p);
3547 if (value)
3548 msm_cdc_pinctrl_select_sleep_state(
3549 pdata->us_euro_gpio_p);
3550 else
3551 msm_cdc_pinctrl_select_active_state(
3552 pdata->us_euro_gpio_p);
3553 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3554 __func__, value, !value);
3555 ret = true;
3556 }
3557
3558 return ret;
3559}
3560
3561static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3562 struct snd_pcm_hw_params *params)
3563{
3564 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3565 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3566 int ret = 0;
3567 int slot_width = 32;
3568 int channels, slots;
3569 unsigned int slot_mask, rate, clk_freq;
3570 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3571
3572 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3573
3574 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3575 switch (cpu_dai->id) {
3576 case AFE_PORT_ID_PRIMARY_TDM_RX:
3577 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3578 break;
3579 case AFE_PORT_ID_SECONDARY_TDM_RX:
3580 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3581 break;
3582 case AFE_PORT_ID_TERTIARY_TDM_RX:
3583 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3584 break;
3585 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3586 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3587 break;
3588 case AFE_PORT_ID_PRIMARY_TDM_TX:
3589 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3590 break;
3591 case AFE_PORT_ID_SECONDARY_TDM_TX:
3592 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3593 break;
3594 case AFE_PORT_ID_TERTIARY_TDM_TX:
3595 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3596 break;
3597 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3598 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3599 break;
3600
3601 default:
3602 pr_err("%s: dai id 0x%x not supported\n",
3603 __func__, cpu_dai->id);
3604 return -EINVAL;
3605 }
3606
3607 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3608 /*2 slot config - bits 0 and 1 set for the first two slots */
3609 slot_mask = 0x0000FFFF >> (16 - slots);
3610 channels = slots;
3611
3612 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3613 __func__, slot_width, slots);
3614
3615 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3616 slots, slot_width);
3617 if (ret < 0) {
3618 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3619 __func__, ret);
3620 goto end;
3621 }
3622
3623 ret = snd_soc_dai_set_channel_map(cpu_dai,
3624 0, NULL, channels, slot_offset);
3625 if (ret < 0) {
3626 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3627 __func__, ret);
3628 goto end;
3629 }
3630 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3631 /*2 slot config - bits 0 and 1 set for the first two slots */
3632 slot_mask = 0x0000FFFF >> (16 - slots);
3633 channels = slots;
3634
3635 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3636 __func__, slot_width, slots);
3637
3638 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3639 slots, slot_width);
3640 if (ret < 0) {
3641 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3642 __func__, ret);
3643 goto end;
3644 }
3645
3646 ret = snd_soc_dai_set_channel_map(cpu_dai,
3647 channels, slot_offset, 0, NULL);
3648 if (ret < 0) {
3649 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3650 __func__, ret);
3651 goto end;
3652 }
3653 } else {
3654 ret = -EINVAL;
3655 pr_err("%s: invalid use case, err:%d\n",
3656 __func__, ret);
3657 goto end;
3658 }
3659
3660 rate = params_rate(params);
3661 clk_freq = rate * slot_width * slots;
3662 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3663 if (ret < 0)
3664 pr_err("%s: failed to set tdm clk, err:%d\n",
3665 __func__, ret);
3666
3667end:
3668 return ret;
3669}
3670
3671static int msm_get_tdm_mode(u32 port_id)
3672{
3673 int tdm_mode;
3674
3675 switch (port_id) {
3676 case AFE_PORT_ID_PRIMARY_TDM_RX:
3677 case AFE_PORT_ID_PRIMARY_TDM_TX:
3678 tdm_mode = TDM_PRI;
3679 break;
3680 case AFE_PORT_ID_SECONDARY_TDM_RX:
3681 case AFE_PORT_ID_SECONDARY_TDM_TX:
3682 tdm_mode = TDM_SEC;
3683 break;
3684 case AFE_PORT_ID_TERTIARY_TDM_RX:
3685 case AFE_PORT_ID_TERTIARY_TDM_TX:
3686 tdm_mode = TDM_TERT;
3687 break;
3688 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3689 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3690 tdm_mode = TDM_QUAT;
3691 break;
3692 default:
3693 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
3694 tdm_mode = -EINVAL;
3695 }
3696 return tdm_mode;
3697}
3698
3699static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
3700{
3701 int ret = 0;
3702 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3703 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3704 struct snd_soc_card *card = rtd->card;
3705 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3706 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3707
3708 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3709 ret = -EINVAL;
3710 pr_err("%s: Invalid TDM interface %d\n",
3711 __func__, ret);
3712 return ret;
3713 }
3714
3715 if (pdata->mi2s_gpio_p[tdm_mode]) {
3716 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3717 == 0) {
3718 ret = msm_cdc_pinctrl_select_active_state(
3719 pdata->mi2s_gpio_p[tdm_mode]);
3720 if (ret) {
3721 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
3722 __func__, ret);
3723 goto done;
3724 }
3725 }
3726 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3727 }
3728
3729done:
3730 return ret;
3731}
3732
3733static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
3734{
3735 int ret = 0;
3736 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3737 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3738 struct snd_soc_card *card = rtd->card;
3739 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3740 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3741
3742 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3743 ret = -EINVAL;
3744 pr_err("%s: Invalid TDM interface %d\n",
3745 __func__, ret);
3746 return;
3747 }
3748
3749 if (pdata->mi2s_gpio_p[tdm_mode]) {
3750 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3751 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3752 == 0) {
3753 ret = msm_cdc_pinctrl_select_sleep_state(
3754 pdata->mi2s_gpio_p[tdm_mode]);
3755 if (ret)
3756 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
3757 __func__, ret);
3758 }
3759 }
3760}
3761
3762static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
3763{
3764 int ret = 0;
3765 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3766 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3767 struct snd_soc_card *card = rtd->card;
3768 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3769 u32 aux_mode = cpu_dai->id - 1;
3770
3771 if (aux_mode >= AUX_PCM_MAX) {
3772 ret = -EINVAL;
3773 pr_err("%s: Invalid AUX interface %d\n",
3774 __func__, ret);
3775 return ret;
3776 }
3777
3778 if (pdata->mi2s_gpio_p[aux_mode]) {
3779 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3780 == 0) {
3781 ret = msm_cdc_pinctrl_select_active_state(
3782 pdata->mi2s_gpio_p[aux_mode]);
3783 if (ret) {
3784 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
3785 __func__, ret);
3786 goto done;
3787 }
3788 }
3789 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3790 }
3791
3792done:
3793 return ret;
3794}
3795
3796static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
3797{
3798 int ret = 0;
3799 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3800 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3801 struct snd_soc_card *card = rtd->card;
3802 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3803 u32 aux_mode = cpu_dai->id - 1;
3804
3805 if (aux_mode >= AUX_PCM_MAX) {
3806 pr_err("%s: Invalid AUX interface %d\n",
3807 __func__, ret);
3808 return;
3809 }
3810
3811 if (pdata->mi2s_gpio_p[aux_mode]) {
3812 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3813 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3814 == 0) {
3815 ret = msm_cdc_pinctrl_select_sleep_state(
3816 pdata->mi2s_gpio_p[aux_mode]);
3817 if (ret)
3818 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
3819 __func__, ret);
3820 }
3821 }
3822}
3823
3824static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
3825{
3826 int ret = 0;
3827 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3828 struct snd_soc_dai_link *dai_link = rtd->dai_link;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3829 struct snd_soc_card *card = rtd->card;
3830 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3831
3832 switch (dai_link->id) {
3833 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3834 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3835 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3836 if (pdata->va_disable) {
3837 pr_debug("%s: SVA not supported\n", __func__);
3838 return -EINVAL;
3839 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3840 ret = bengal_send_island_va_config(dai_link->id);
3841 if (ret)
3842 pr_err("%s: send island va cfg failed, err: %d\n",
3843 __func__, ret);
3844 break;
3845 }
3846
3847 return ret;
3848}
3849
3850static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3851 struct snd_pcm_hw_params *params)
3852{
3853 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3854 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3855 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3856 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3857
3858 int ret = 0;
3859 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3860 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3861 u32 user_set_tx_ch = 0;
3862 u32 user_set_rx_ch = 0;
3863 u32 ch_id;
3864
3865 ret = snd_soc_dai_get_channel_map(codec_dai,
3866 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3867 &rx_ch_cdc_dma);
3868 if (ret < 0) {
3869 pr_err("%s: failed to get codec chan map, err:%d\n",
3870 __func__, ret);
3871 goto err;
3872 }
3873
3874 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3875 switch (dai_link->id) {
3876 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3877 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3878 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3879 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3880 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3881 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3882 {
3883 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3884 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3885 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3886 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3887 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3888 user_set_rx_ch, &rx_ch_cdc_dma);
3889 if (ret < 0) {
3890 pr_err("%s: failed to set cpu chan map, err:%d\n",
3891 __func__, ret);
3892 goto err;
3893 }
3894
3895 }
3896 break;
3897 }
3898 } else {
3899 switch (dai_link->id) {
3900 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3901 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3902 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3903 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3904 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3905 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3906 {
3907 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3908 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3909 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3910 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3911 }
3912 break;
3913 }
3914
3915 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3916 &tx_ch_cdc_dma, 0, 0);
3917 if (ret < 0) {
3918 pr_err("%s: failed to set cpu chan map, err:%d\n",
3919 __func__, ret);
3920 goto err;
3921 }
3922 }
3923
3924err:
3925 return ret;
3926}
3927
3928static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3929{
3930 cpumask_t mask;
3931
3932 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3933 pm_qos_remove_request(&substream->latency_pm_qos_req);
3934
3935 cpumask_clear(&mask);
3936 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3937 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3938 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3939
3940 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3941
3942 pm_qos_add_request(&substream->latency_pm_qos_req,
3943 PM_QOS_CPU_DMA_LATENCY,
3944 MSM_LL_QOS_VALUE);
3945 return 0;
3946}
3947
3948static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3949{
3950 int ret = 0;
3951 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3952 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3953 int index = cpu_dai->id;
3954 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3955 struct snd_soc_card *card = rtd->card;
3956 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3957
3958 dev_dbg(rtd->card->dev,
3959 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3960 __func__, substream->name, substream->stream,
3961 cpu_dai->name, cpu_dai->id);
3962
3963 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3964 ret = -EINVAL;
3965 dev_err(rtd->card->dev,
3966 "%s: CPU DAI id (%d) out of range\n",
3967 __func__, cpu_dai->id);
3968 goto err;
3969 }
3970 /*
3971 * Mutex protection in case the same MI2S
3972 * interface using for both TX and RX so
3973 * that the same clock won't be enable twice.
3974 */
3975 mutex_lock(&mi2s_intf_conf[index].lock);
3976 if (++mi2s_intf_conf[index].ref_cnt == 1) {
3977 /* Check if msm needs to provide the clock to the interface */
3978 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
3979 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
3980 fmt = SND_SOC_DAIFMT_CBM_CFM;
3981 }
3982 ret = msm_mi2s_set_sclk(substream, true);
3983 if (ret < 0) {
3984 dev_err(rtd->card->dev,
3985 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
3986 __func__, ret);
3987 goto clean_up;
3988 }
3989
3990 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
3991 if (ret < 0) {
3992 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
3993 __func__, index, ret);
3994 goto clk_off;
3995 }
3996 if (pdata->mi2s_gpio_p[index]) {
3997 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
3998 == 0) {
3999 ret = msm_cdc_pinctrl_select_active_state(
4000 pdata->mi2s_gpio_p[index]);
4001 if (ret) {
4002 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4003 __func__, ret);
4004 goto clk_off;
4005 }
4006 }
4007 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4008 }
4009 }
4010clk_off:
4011 if (ret < 0)
4012 msm_mi2s_set_sclk(substream, false);
4013clean_up:
4014 if (ret < 0)
4015 mi2s_intf_conf[index].ref_cnt--;
4016 mutex_unlock(&mi2s_intf_conf[index].lock);
4017err:
4018 return ret;
4019}
4020
4021static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4022{
4023 int ret = 0;
4024 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4025 int index = rtd->cpu_dai->id;
4026 struct snd_soc_card *card = rtd->card;
4027 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4028
4029 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4030 substream->name, substream->stream);
4031 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4032 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4033 return;
4034 }
4035
4036 mutex_lock(&mi2s_intf_conf[index].lock);
4037 if (--mi2s_intf_conf[index].ref_cnt == 0) {
4038 if (pdata->mi2s_gpio_p[index]) {
4039 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4040 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4041 == 0) {
4042 ret = msm_cdc_pinctrl_select_sleep_state(
4043 pdata->mi2s_gpio_p[index]);
4044 if (ret)
4045 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4046 __func__, ret);
4047 }
4048 }
4049
4050 ret = msm_mi2s_set_sclk(substream, false);
4051 if (ret < 0)
4052 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4053 __func__, index, ret);
4054 }
4055 mutex_unlock(&mi2s_intf_conf[index].lock);
4056}
4057
4058static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4059 struct snd_pcm_hw_params *params)
4060{
4061 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4062 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4063 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4064 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4065 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4066 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4067 int ret = 0;
4068
4069 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4070 codec_dai->name, codec_dai->id);
4071 ret = snd_soc_dai_get_channel_map(codec_dai,
4072 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4073 if (ret) {
4074 dev_err(rtd->dev,
4075 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4076 __func__, ret);
4077 goto err;
4078 }
4079
4080 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4081 __func__, tx_ch_cnt, dai_link->id);
4082
4083 ret = snd_soc_dai_set_channel_map(cpu_dai,
4084 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4085 if (ret)
4086 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4087 __func__, ret);
4088
4089err:
4090 return ret;
4091}
4092
4093static struct snd_soc_ops bengal_aux_be_ops = {
4094 .startup = bengal_aux_snd_startup,
4095 .shutdown = bengal_aux_snd_shutdown
4096};
4097
4098static struct snd_soc_ops bengal_tdm_be_ops = {
4099 .hw_params = bengal_tdm_snd_hw_params,
4100 .startup = bengal_tdm_snd_startup,
4101 .shutdown = bengal_tdm_snd_shutdown
4102};
4103
4104static struct snd_soc_ops msm_mi2s_be_ops = {
4105 .startup = msm_mi2s_snd_startup,
4106 .shutdown = msm_mi2s_snd_shutdown,
4107};
4108
4109static struct snd_soc_ops msm_fe_qos_ops = {
4110 .prepare = msm_fe_qos_prepare,
4111};
4112
4113static struct snd_soc_ops msm_cdc_dma_be_ops = {
4114 .startup = msm_snd_cdc_dma_startup,
4115 .hw_params = msm_snd_cdc_dma_hw_params,
4116};
4117
4118static struct snd_soc_ops msm_wcn_ops = {
4119 .hw_params = msm_wcn_hw_params,
4120};
4121
4122static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4123 struct snd_kcontrol *kcontrol, int event)
4124{
4125 struct msm_asoc_mach_data *pdata = NULL;
4126 struct snd_soc_component *component =
4127 snd_soc_dapm_to_component(w->dapm);
4128 int ret = 0;
4129 u32 dmic_idx;
4130 int *dmic_gpio_cnt;
4131 struct device_node *dmic_gpio;
4132 char *wname;
4133
4134 wname = strpbrk(w->name, "0123");
4135 if (!wname) {
4136 dev_err(component->dev, "%s: widget not found\n", __func__);
4137 return -EINVAL;
4138 }
4139
4140 ret = kstrtouint(wname, 10, &dmic_idx);
4141 if (ret < 0) {
4142 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4143 __func__);
4144 return -EINVAL;
4145 }
4146
4147 pdata = snd_soc_card_get_drvdata(component->card);
4148
4149 switch (dmic_idx) {
4150 case 0:
4151 case 1:
4152 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4153 dmic_gpio = pdata->dmic01_gpio_p;
4154 break;
4155 case 2:
4156 case 3:
4157 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4158 dmic_gpio = pdata->dmic23_gpio_p;
4159 break;
4160 default:
4161 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4162 __func__);
4163 return -EINVAL;
4164 }
4165
4166 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4167 __func__, event, dmic_idx, *dmic_gpio_cnt);
4168
4169 switch (event) {
4170 case SND_SOC_DAPM_PRE_PMU:
4171 (*dmic_gpio_cnt)++;
4172 if (*dmic_gpio_cnt == 1) {
4173 ret = msm_cdc_pinctrl_select_active_state(
4174 dmic_gpio);
4175 if (ret < 0) {
4176 pr_err("%s: gpio set cannot be activated %sd",
4177 __func__, "dmic_gpio");
4178 return ret;
4179 }
4180 }
4181
4182 break;
4183 case SND_SOC_DAPM_POST_PMD:
4184 (*dmic_gpio_cnt)--;
4185 if (*dmic_gpio_cnt == 0) {
4186 ret = msm_cdc_pinctrl_select_sleep_state(
4187 dmic_gpio);
4188 if (ret < 0) {
4189 pr_err("%s: gpio set cannot be de-activated %sd",
4190 __func__, "dmic_gpio");
4191 return ret;
4192 }
4193 }
4194 break;
4195 default:
4196 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4197 return -EINVAL;
4198 }
4199 return 0;
4200}
4201
4202static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4203 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4204 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4205 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4206 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4207 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4208 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4209 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4210 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4211};
4212
4213static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4214{
4215 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4216 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4217 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4218
4219 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4220 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4221}
4222
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]4223#ifndef CONFIG_TDM_DISABLE
4224static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
4225{
4226 snd_soc_add_component_controls(component, msm_tdm_snd_controls,
4227 ARRAY_SIZE(msm_tdm_snd_controls));
4228}
4229#else
4230static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
4231{
4232 return;
4233}
4234#endif
4235
4236#ifndef CONFIG_MI2S_DISABLE
4237static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
4238{
4239 snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
4240 ARRAY_SIZE(msm_mi2s_snd_controls));
4241}
4242#else
4243static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
4244{
4245 return;
4246}
4247#endif
4248
4249#ifndef CONFIG_AUXPCM_DISABLE
4250static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
4251{
4252 snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
4253 ARRAY_SIZE(msm_auxpcm_snd_controls));
4254}
4255#else
4256static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
4257{
4258 return;
4259}
4260#endif
4261
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4262static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4263{
4264 int ret = -EINVAL;
4265 struct snd_soc_component *component;
4266 struct snd_soc_dapm_context *dapm;
4267 struct snd_card *card;
4268 struct snd_info_entry *entry;
Aditya Bavanari21d663f2020-04-18 11:21:43 +0530[diff] [blame]4269 struct platform_device *pdev = NULL;
4270 int i = 0;
4271 char *data = NULL;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4272 struct msm_asoc_mach_data *pdata =
4273 snd_soc_card_get_drvdata(rtd->card);
4274
4275 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4276 if (!component) {
4277 pr_err("%s: could not find component for bolero_codec\n",
4278 __func__);
4279 return ret;
4280 }
4281
4282 dapm = snd_soc_component_get_dapm(component);
4283
4284 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4285 ARRAY_SIZE(msm_int_snd_controls));
4286 if (ret < 0) {
4287 pr_err("%s: add_component_controls failed: %d\n",
4288 __func__, ret);
4289 return ret;
4290 }
4291 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4292 ARRAY_SIZE(msm_common_snd_controls));
4293 if (ret < 0) {
4294 pr_err("%s: add common snd controls failed: %d\n",
4295 __func__, ret);
4296 return ret;
4297 }
4298
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]4299 msm_add_tdm_snd_controls(component);
4300 msm_add_mi2s_snd_controls(component);
4301 msm_add_auxpcm_snd_controls(component);
4302
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4303 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4304 ARRAY_SIZE(msm_int_dapm_widgets));
4305
4306 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4307 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4308 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4309 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4310
4311 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4312 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4313 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4314 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4315
4316 snd_soc_dapm_sync(dapm);
4317
Aditya Bavanari21d663f2020-04-18 11:21:43 +0530[diff] [blame]4318 for (i = 0; i < rtd->card->num_aux_devs; i++)
4319 {
4320 if (msm_aux_dev[i].name != NULL ) {
4321 if (strstr(msm_aux_dev[i].name, "wsa"))
4322 continue;
4323 }
4324
4325 if (msm_aux_dev[i].codec_of_node) {
4326 pdev = of_find_device_by_node(
4327 msm_aux_dev[i].codec_of_node);
4328
4329 if (pdev)
4330 data = (char*) of_device_get_match_data(
4331 &pdev->dev);
4332 if (data != NULL) {
4333 if (!strncmp(data, "wcd937x",
4334 sizeof("wcd937x"))) {
4335 bolero_set_port_map(component,
4336 ARRAY_SIZE(sm_port_map),
4337 sm_port_map);
4338 break;
4339 } else if (!strncmp( data, "rouleur",
4340 sizeof("rouleur"))) {
4341 bolero_set_port_map(component,
4342 ARRAY_SIZE(sm_port_map_rouleur),
4343 sm_port_map_rouleur);
4344 break;
4345 }
4346 }
4347 }
4348 }
4349
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4350 card = rtd->card->snd_card;
4351 if (!pdata->codec_root) {
4352 entry = snd_info_create_subdir(card->module, "codecs",
4353 card->proc_root);
4354 if (!entry) {
4355 pr_debug("%s: Cannot create codecs module entry\n",
4356 __func__);
4357 ret = 0;
4358 goto err;
4359 }
4360 pdata->codec_root = entry;
4361 }
4362 bolero_info_create_codec_entry(pdata->codec_root, component);
4363 bolero_register_wake_irq(component, false);
4364 codec_reg_done = true;
4365 return 0;
4366err:
4367 return ret;
4368}
4369
4370static void *def_wcd_mbhc_cal(void)
4371{
4372 void *wcd_mbhc_cal;
4373 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4374 u16 *btn_high;
4375
4376 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4377 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4378 if (!wcd_mbhc_cal)
4379 return NULL;
4380
4381 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4382 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4383 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4384 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4385 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4386
4387 btn_high[0] = 75;
4388 btn_high[1] = 150;
4389 btn_high[2] = 237;
4390 btn_high[3] = 500;
4391 btn_high[4] = 500;
4392 btn_high[5] = 500;
4393 btn_high[6] = 500;
4394 btn_high[7] = 500;
4395
4396 return wcd_mbhc_cal;
4397}
4398
Aditya Bavanari9f892d82020-04-29 20:40:53 +0530[diff] [blame]4399static void *def_rouleur_mbhc_cal(void)
4400{
4401 void *wcd_mbhc_cal;
4402 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4403 u16 *btn_high;
4404
4405 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(ROULEUR_MBHC_DEF_BUTTONS,
4406 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4407 if (!wcd_mbhc_cal)
4408 return NULL;
4409
4410 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max =
4411 ROULEUR_MBHC_HS_V_MAX;
4412 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn =
4413 ROULEUR_MBHC_DEF_BUTTONS;
4414 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4415 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4416 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4417
4418 btn_high[0] = 75;
4419 btn_high[1] = 150;
4420 btn_high[2] = 237;
4421 btn_high[3] = 500;
4422 btn_high[4] = 500;
4423
4424 return wcd_mbhc_cal;
4425}
4426
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4427/* Digital audio interface glue - connects codec <---> CPU */
4428static struct snd_soc_dai_link msm_common_dai_links[] = {
4429 /* FrontEnd DAI Links */
4430 {/* hw:x,0 */
4431 .name = MSM_DAILINK_NAME(Media1),
4432 .stream_name = "MultiMedia1",
4433 .cpu_dai_name = "MultiMedia1",
4434 .platform_name = "msm-pcm-dsp.0",
4435 .dynamic = 1,
4436 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4437 .dpcm_playback = 1,
4438 .dpcm_capture = 1,
4439 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4440 SND_SOC_DPCM_TRIGGER_POST},
4441 .codec_dai_name = "snd-soc-dummy-dai",
4442 .codec_name = "snd-soc-dummy",
4443 .ignore_suspend = 1,
4444 /* this dainlink has playback support */
4445 .ignore_pmdown_time = 1,
4446 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4447 },
4448 {/* hw:x,1 */
4449 .name = MSM_DAILINK_NAME(Media2),
4450 .stream_name = "MultiMedia2",
4451 .cpu_dai_name = "MultiMedia2",
4452 .platform_name = "msm-pcm-dsp.0",
4453 .dynamic = 1,
4454 .dpcm_playback = 1,
4455 .dpcm_capture = 1,
4456 .codec_dai_name = "snd-soc-dummy-dai",
4457 .codec_name = "snd-soc-dummy",
4458 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4459 SND_SOC_DPCM_TRIGGER_POST},
4460 .ignore_suspend = 1,
4461 /* this dainlink has playback support */
4462 .ignore_pmdown_time = 1,
4463 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4464 },
4465 {/* hw:x,2 */
4466 .name = "VoiceMMode1",
4467 .stream_name = "VoiceMMode1",
4468 .cpu_dai_name = "VoiceMMode1",
4469 .platform_name = "msm-pcm-voice",
4470 .dynamic = 1,
4471 .dpcm_playback = 1,
4472 .dpcm_capture = 1,
4473 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4474 SND_SOC_DPCM_TRIGGER_POST},
4475 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4476 .ignore_suspend = 1,
4477 .ignore_pmdown_time = 1,
4478 .codec_dai_name = "snd-soc-dummy-dai",
4479 .codec_name = "snd-soc-dummy",
4480 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4481 },
4482 {/* hw:x,3 */
4483 .name = "MSM VoIP",
4484 .stream_name = "VoIP",
4485 .cpu_dai_name = "VoIP",
4486 .platform_name = "msm-voip-dsp",
4487 .dynamic = 1,
4488 .dpcm_playback = 1,
4489 .dpcm_capture = 1,
4490 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4491 SND_SOC_DPCM_TRIGGER_POST},
4492 .codec_dai_name = "snd-soc-dummy-dai",
4493 .codec_name = "snd-soc-dummy",
4494 .ignore_suspend = 1,
4495 /* this dainlink has playback support */
4496 .ignore_pmdown_time = 1,
4497 .id = MSM_FRONTEND_DAI_VOIP,
4498 },
4499 {/* hw:x,4 */
4500 .name = MSM_DAILINK_NAME(ULL),
4501 .stream_name = "MultiMedia3",
4502 .cpu_dai_name = "MultiMedia3",
4503 .platform_name = "msm-pcm-dsp.2",
4504 .dynamic = 1,
4505 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4506 .dpcm_playback = 1,
4507 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4508 SND_SOC_DPCM_TRIGGER_POST},
4509 .codec_dai_name = "snd-soc-dummy-dai",
4510 .codec_name = "snd-soc-dummy",
4511 .ignore_suspend = 1,
4512 /* this dainlink has playback support */
4513 .ignore_pmdown_time = 1,
4514 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4515 },
4516 {/* hw:x,5 */
4517 .name = "MSM AFE-PCM RX",
4518 .stream_name = "AFE-PROXY RX",
4519 .cpu_dai_name = "msm-dai-q6-dev.241",
4520 .codec_name = "msm-stub-codec.1",
4521 .codec_dai_name = "msm-stub-rx",
4522 .platform_name = "msm-pcm-afe",
4523 .dpcm_playback = 1,
4524 .ignore_suspend = 1,
4525 /* this dainlink has playback support */
4526 .ignore_pmdown_time = 1,
4527 },
4528 {/* hw:x,6 */
4529 .name = "MSM AFE-PCM TX",
4530 .stream_name = "AFE-PROXY TX",
4531 .cpu_dai_name = "msm-dai-q6-dev.240",
4532 .codec_name = "msm-stub-codec.1",
4533 .codec_dai_name = "msm-stub-tx",
4534 .platform_name = "msm-pcm-afe",
4535 .dpcm_capture = 1,
4536 .ignore_suspend = 1,
4537 },
4538 {/* hw:x,7 */
4539 .name = MSM_DAILINK_NAME(Compress1),
4540 .stream_name = "Compress1",
4541 .cpu_dai_name = "MultiMedia4",
4542 .platform_name = "msm-compress-dsp",
4543 .dynamic = 1,
4544 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4545 .dpcm_playback = 1,
4546 .dpcm_capture = 1,
4547 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4548 SND_SOC_DPCM_TRIGGER_POST},
4549 .codec_dai_name = "snd-soc-dummy-dai",
4550 .codec_name = "snd-soc-dummy",
4551 .ignore_suspend = 1,
4552 .ignore_pmdown_time = 1,
4553 /* this dainlink has playback support */
4554 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4555 },
4556 /* Hostless PCM purpose */
4557 {/* hw:x,8 */
4558 .name = "AUXPCM Hostless",
4559 .stream_name = "AUXPCM Hostless",
4560 .cpu_dai_name = "AUXPCM_HOSTLESS",
4561 .platform_name = "msm-pcm-hostless",
4562 .dynamic = 1,
4563 .dpcm_playback = 1,
4564 .dpcm_capture = 1,
4565 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4566 SND_SOC_DPCM_TRIGGER_POST},
4567 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4568 .ignore_suspend = 1,
4569 /* this dainlink has playback support */
4570 .ignore_pmdown_time = 1,
4571 .codec_dai_name = "snd-soc-dummy-dai",
4572 .codec_name = "snd-soc-dummy",
4573 },
4574 {/* hw:x,9 */
4575 .name = MSM_DAILINK_NAME(LowLatency),
4576 .stream_name = "MultiMedia5",
4577 .cpu_dai_name = "MultiMedia5",
4578 .platform_name = "msm-pcm-dsp.1",
4579 .dynamic = 1,
4580 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4581 .dpcm_playback = 1,
4582 .dpcm_capture = 1,
4583 .codec_dai_name = "snd-soc-dummy-dai",
4584 .codec_name = "snd-soc-dummy",
4585 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4586 SND_SOC_DPCM_TRIGGER_POST},
4587 .ignore_suspend = 1,
4588 /* this dainlink has playback support */
4589 .ignore_pmdown_time = 1,
4590 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4591 .ops = &msm_fe_qos_ops,
4592 },
4593 {/* hw:x,10 */
4594 .name = "Listen 1 Audio Service",
4595 .stream_name = "Listen 1 Audio Service",
4596 .cpu_dai_name = "LSM1",
4597 .platform_name = "msm-lsm-client",
4598 .dynamic = 1,
4599 .dpcm_capture = 1,
4600 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4601 SND_SOC_DPCM_TRIGGER_POST },
4602 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4603 .ignore_suspend = 1,
4604 .codec_dai_name = "snd-soc-dummy-dai",
4605 .codec_name = "snd-soc-dummy",
4606 .id = MSM_FRONTEND_DAI_LSM1,
4607 },
4608 /* Multiple Tunnel instances */
4609 {/* hw:x,11 */
4610 .name = MSM_DAILINK_NAME(Compress2),
4611 .stream_name = "Compress2",
4612 .cpu_dai_name = "MultiMedia7",
4613 .platform_name = "msm-compress-dsp",
4614 .dynamic = 1,
4615 .dpcm_playback = 1,
4616 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4617 SND_SOC_DPCM_TRIGGER_POST},
4618 .codec_dai_name = "snd-soc-dummy-dai",
4619 .codec_name = "snd-soc-dummy",
4620 .ignore_suspend = 1,
4621 .ignore_pmdown_time = 1,
4622 /* this dainlink has playback support */
4623 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4624 },
4625 {/* hw:x,12 */
4626 .name = MSM_DAILINK_NAME(MultiMedia10),
4627 .stream_name = "MultiMedia10",
4628 .cpu_dai_name = "MultiMedia10",
4629 .platform_name = "msm-pcm-dsp.1",
4630 .dynamic = 1,
4631 .dpcm_playback = 1,
4632 .dpcm_capture = 1,
4633 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4634 SND_SOC_DPCM_TRIGGER_POST},
4635 .codec_dai_name = "snd-soc-dummy-dai",
4636 .codec_name = "snd-soc-dummy",
4637 .ignore_suspend = 1,
4638 .ignore_pmdown_time = 1,
4639 /* this dainlink has playback support */
4640 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4641 },
4642 {/* hw:x,13 */
4643 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4644 .stream_name = "MM_NOIRQ",
4645 .cpu_dai_name = "MultiMedia8",
4646 .platform_name = "msm-pcm-dsp-noirq",
4647 .dynamic = 1,
4648 .dpcm_playback = 1,
4649 .dpcm_capture = 1,
4650 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4651 SND_SOC_DPCM_TRIGGER_POST},
4652 .codec_dai_name = "snd-soc-dummy-dai",
4653 .codec_name = "snd-soc-dummy",
4654 .ignore_suspend = 1,
4655 .ignore_pmdown_time = 1,
4656 /* this dainlink has playback support */
4657 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4658 .ops = &msm_fe_qos_ops,
4659 },
4660 /* HDMI Hostless */
4661 {/* hw:x,14 */
4662 .name = "HDMI_RX_HOSTLESS",
4663 .stream_name = "HDMI_RX_HOSTLESS",
4664 .cpu_dai_name = "HDMI_HOSTLESS",
4665 .platform_name = "msm-pcm-hostless",
4666 .dynamic = 1,
4667 .dpcm_playback = 1,
4668 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4669 SND_SOC_DPCM_TRIGGER_POST},
4670 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4671 .ignore_suspend = 1,
4672 .ignore_pmdown_time = 1,
4673 .codec_dai_name = "snd-soc-dummy-dai",
4674 .codec_name = "snd-soc-dummy",
4675 },
4676 {/* hw:x,15 */
4677 .name = "VoiceMMode2",
4678 .stream_name = "VoiceMMode2",
4679 .cpu_dai_name = "VoiceMMode2",
4680 .platform_name = "msm-pcm-voice",
4681 .dynamic = 1,
4682 .dpcm_playback = 1,
4683 .dpcm_capture = 1,
4684 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4685 SND_SOC_DPCM_TRIGGER_POST},
4686 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4687 .ignore_suspend = 1,
4688 .ignore_pmdown_time = 1,
4689 .codec_dai_name = "snd-soc-dummy-dai",
4690 .codec_name = "snd-soc-dummy",
4691 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4692 },
4693 /* LSM FE */
4694 {/* hw:x,16 */
4695 .name = "Listen 2 Audio Service",
4696 .stream_name = "Listen 2 Audio Service",
4697 .cpu_dai_name = "LSM2",
4698 .platform_name = "msm-lsm-client",
4699 .dynamic = 1,
4700 .dpcm_capture = 1,
4701 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4702 SND_SOC_DPCM_TRIGGER_POST },
4703 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4704 .ignore_suspend = 1,
4705 .codec_dai_name = "snd-soc-dummy-dai",
4706 .codec_name = "snd-soc-dummy",
4707 .id = MSM_FRONTEND_DAI_LSM2,
4708 },
4709 {/* hw:x,17 */
4710 .name = "Listen 3 Audio Service",
4711 .stream_name = "Listen 3 Audio Service",
4712 .cpu_dai_name = "LSM3",
4713 .platform_name = "msm-lsm-client",
4714 .dynamic = 1,
4715 .dpcm_capture = 1,
4716 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4717 SND_SOC_DPCM_TRIGGER_POST },
4718 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4719 .ignore_suspend = 1,
4720 .codec_dai_name = "snd-soc-dummy-dai",
4721 .codec_name = "snd-soc-dummy",
4722 .id = MSM_FRONTEND_DAI_LSM3,
4723 },
4724 {/* hw:x,18 */
4725 .name = "Listen 4 Audio Service",
4726 .stream_name = "Listen 4 Audio Service",
4727 .cpu_dai_name = "LSM4",
4728 .platform_name = "msm-lsm-client",
4729 .dynamic = 1,
4730 .dpcm_capture = 1,
4731 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4732 SND_SOC_DPCM_TRIGGER_POST },
4733 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4734 .ignore_suspend = 1,
4735 .codec_dai_name = "snd-soc-dummy-dai",
4736 .codec_name = "snd-soc-dummy",
4737 .id = MSM_FRONTEND_DAI_LSM4,
4738 },
4739 {/* hw:x,19 */
4740 .name = "Listen 5 Audio Service",
4741 .stream_name = "Listen 5 Audio Service",
4742 .cpu_dai_name = "LSM5",
4743 .platform_name = "msm-lsm-client",
4744 .dynamic = 1,
4745 .dpcm_capture = 1,
4746 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4747 SND_SOC_DPCM_TRIGGER_POST },
4748 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4749 .ignore_suspend = 1,
4750 .codec_dai_name = "snd-soc-dummy-dai",
4751 .codec_name = "snd-soc-dummy",
4752 .id = MSM_FRONTEND_DAI_LSM5,
4753 },
4754 {/* hw:x,20 */
4755 .name = "Listen 6 Audio Service",
4756 .stream_name = "Listen 6 Audio Service",
4757 .cpu_dai_name = "LSM6",
4758 .platform_name = "msm-lsm-client",
4759 .dynamic = 1,
4760 .dpcm_capture = 1,
4761 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4762 SND_SOC_DPCM_TRIGGER_POST },
4763 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4764 .ignore_suspend = 1,
4765 .codec_dai_name = "snd-soc-dummy-dai",
4766 .codec_name = "snd-soc-dummy",
4767 .id = MSM_FRONTEND_DAI_LSM6,
4768 },
4769 {/* hw:x,21 */
4770 .name = "Listen 7 Audio Service",
4771 .stream_name = "Listen 7 Audio Service",
4772 .cpu_dai_name = "LSM7",
4773 .platform_name = "msm-lsm-client",
4774 .dynamic = 1,
4775 .dpcm_capture = 1,
4776 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4777 SND_SOC_DPCM_TRIGGER_POST },
4778 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4779 .ignore_suspend = 1,
4780 .codec_dai_name = "snd-soc-dummy-dai",
4781 .codec_name = "snd-soc-dummy",
4782 .id = MSM_FRONTEND_DAI_LSM7,
4783 },
4784 {/* hw:x,22 */
4785 .name = "Listen 8 Audio Service",
4786 .stream_name = "Listen 8 Audio Service",
4787 .cpu_dai_name = "LSM8",
4788 .platform_name = "msm-lsm-client",
4789 .dynamic = 1,
4790 .dpcm_capture = 1,
4791 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4792 SND_SOC_DPCM_TRIGGER_POST },
4793 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4794 .ignore_suspend = 1,
4795 .codec_dai_name = "snd-soc-dummy-dai",
4796 .codec_name = "snd-soc-dummy",
4797 .id = MSM_FRONTEND_DAI_LSM8,
4798 },
4799 {/* hw:x,23 */
4800 .name = MSM_DAILINK_NAME(Media9),
4801 .stream_name = "MultiMedia9",
4802 .cpu_dai_name = "MultiMedia9",
4803 .platform_name = "msm-pcm-dsp.0",
4804 .dynamic = 1,
4805 .dpcm_playback = 1,
4806 .dpcm_capture = 1,
4807 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4808 SND_SOC_DPCM_TRIGGER_POST},
4809 .codec_dai_name = "snd-soc-dummy-dai",
4810 .codec_name = "snd-soc-dummy",
4811 .ignore_suspend = 1,
4812 /* this dainlink has playback support */
4813 .ignore_pmdown_time = 1,
4814 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4815 },
4816 {/* hw:x,24 */
4817 .name = MSM_DAILINK_NAME(Compress4),
4818 .stream_name = "Compress4",
4819 .cpu_dai_name = "MultiMedia11",
4820 .platform_name = "msm-compress-dsp",
4821 .dynamic = 1,
4822 .dpcm_playback = 1,
4823 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4824 SND_SOC_DPCM_TRIGGER_POST},
4825 .codec_dai_name = "snd-soc-dummy-dai",
4826 .codec_name = "snd-soc-dummy",
4827 .ignore_suspend = 1,
4828 .ignore_pmdown_time = 1,
4829 /* this dainlink has playback support */
4830 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4831 },
4832 {/* hw:x,25 */
4833 .name = MSM_DAILINK_NAME(Compress5),
4834 .stream_name = "Compress5",
4835 .cpu_dai_name = "MultiMedia12",
4836 .platform_name = "msm-compress-dsp",
4837 .dynamic = 1,
4838 .dpcm_playback = 1,
4839 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4840 SND_SOC_DPCM_TRIGGER_POST},
4841 .codec_dai_name = "snd-soc-dummy-dai",
4842 .codec_name = "snd-soc-dummy",
4843 .ignore_suspend = 1,
4844 .ignore_pmdown_time = 1,
4845 /* this dainlink has playback support */
4846 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4847 },
4848 {/* hw:x,26 */
4849 .name = MSM_DAILINK_NAME(Compress6),
4850 .stream_name = "Compress6",
4851 .cpu_dai_name = "MultiMedia13",
4852 .platform_name = "msm-compress-dsp",
4853 .dynamic = 1,
4854 .dpcm_playback = 1,
4855 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4856 SND_SOC_DPCM_TRIGGER_POST},
4857 .codec_dai_name = "snd-soc-dummy-dai",
4858 .codec_name = "snd-soc-dummy",
4859 .ignore_suspend = 1,
4860 .ignore_pmdown_time = 1,
4861 /* this dainlink has playback support */
4862 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4863 },
4864 {/* hw:x,27 */
4865 .name = MSM_DAILINK_NAME(Compress7),
4866 .stream_name = "Compress7",
4867 .cpu_dai_name = "MultiMedia14",
4868 .platform_name = "msm-compress-dsp",
4869 .dynamic = 1,
4870 .dpcm_playback = 1,
4871 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4872 SND_SOC_DPCM_TRIGGER_POST},
4873 .codec_dai_name = "snd-soc-dummy-dai",
4874 .codec_name = "snd-soc-dummy",
4875 .ignore_suspend = 1,
4876 .ignore_pmdown_time = 1,
4877 /* this dainlink has playback support */
4878 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4879 },
4880 {/* hw:x,28 */
4881 .name = MSM_DAILINK_NAME(Compress8),
4882 .stream_name = "Compress8",
4883 .cpu_dai_name = "MultiMedia15",
4884 .platform_name = "msm-compress-dsp",
4885 .dynamic = 1,
4886 .dpcm_playback = 1,
4887 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4888 SND_SOC_DPCM_TRIGGER_POST},
4889 .codec_dai_name = "snd-soc-dummy-dai",
4890 .codec_name = "snd-soc-dummy",
4891 .ignore_suspend = 1,
4892 .ignore_pmdown_time = 1,
4893 /* this dainlink has playback support */
4894 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4895 },
4896 {/* hw:x,29 */
4897 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4898 .stream_name = "MM_NOIRQ_2",
4899 .cpu_dai_name = "MultiMedia16",
4900 .platform_name = "msm-pcm-dsp-noirq",
4901 .dynamic = 1,
4902 .dpcm_playback = 1,
4903 .dpcm_capture = 1,
4904 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4905 SND_SOC_DPCM_TRIGGER_POST},
4906 .codec_dai_name = "snd-soc-dummy-dai",
4907 .codec_name = "snd-soc-dummy",
4908 .ignore_suspend = 1,
4909 .ignore_pmdown_time = 1,
4910 /* this dainlink has playback support */
4911 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
4912 .ops = &msm_fe_qos_ops,
4913 },
4914 {/* hw:x,30 */
4915 .name = "CDC_DMA Hostless",
4916 .stream_name = "CDC_DMA Hostless",
4917 .cpu_dai_name = "CDC_DMA_HOSTLESS",
4918 .platform_name = "msm-pcm-hostless",
4919 .dynamic = 1,
4920 .dpcm_playback = 1,
4921 .dpcm_capture = 1,
4922 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4923 SND_SOC_DPCM_TRIGGER_POST},
4924 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4925 .ignore_suspend = 1,
4926 /* this dailink has playback support */
4927 .ignore_pmdown_time = 1,
4928 .codec_dai_name = "snd-soc-dummy-dai",
4929 .codec_name = "snd-soc-dummy",
4930 },
4931 {/* hw:x,31 */
4932 .name = "TX3_CDC_DMA Hostless",
4933 .stream_name = "TX3_CDC_DMA Hostless",
4934 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
4935 .platform_name = "msm-pcm-hostless",
4936 .dynamic = 1,
4937 .dpcm_capture = 1,
4938 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4939 SND_SOC_DPCM_TRIGGER_POST},
4940 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4941 .ignore_suspend = 1,
4942 .codec_dai_name = "snd-soc-dummy-dai",
4943 .codec_name = "snd-soc-dummy",
4944 },
4945 {/* hw:x,32 */
4946 .name = "Tertiary MI2S TX_Hostless",
4947 .stream_name = "Tertiary MI2S_TX Hostless Capture",
4948 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
4949 .platform_name = "msm-pcm-hostless",
4950 .dynamic = 1,
4951 .dpcm_capture = 1,
4952 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4953 SND_SOC_DPCM_TRIGGER_POST},
4954 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4955 .ignore_suspend = 1,
4956 .ignore_pmdown_time = 1,
4957 .codec_dai_name = "snd-soc-dummy-dai",
4958 .codec_name = "snd-soc-dummy",
4959 },
4960};
4961
4962static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4963 {/* hw:x,33 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4964 .name = MSM_DAILINK_NAME(ASM Loopback),
4965 .stream_name = "MultiMedia6",
4966 .cpu_dai_name = "MultiMedia6",
4967 .platform_name = "msm-pcm-loopback",
4968 .dynamic = 1,
4969 .dpcm_playback = 1,
4970 .dpcm_capture = 1,
4971 .codec_dai_name = "snd-soc-dummy-dai",
4972 .codec_name = "snd-soc-dummy",
4973 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4974 SND_SOC_DPCM_TRIGGER_POST},
4975 .ignore_suspend = 1,
4976 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4977 .ignore_pmdown_time = 1,
4978 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
4979 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4980 {/* hw:x,34 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4981 .name = "USB Audio Hostless",
4982 .stream_name = "USB Audio Hostless",
4983 .cpu_dai_name = "USBAUDIO_HOSTLESS",
4984 .platform_name = "msm-pcm-hostless",
4985 .dynamic = 1,
4986 .dpcm_playback = 1,
4987 .dpcm_capture = 1,
4988 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4989 SND_SOC_DPCM_TRIGGER_POST},
4990 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4991 .ignore_suspend = 1,
4992 .ignore_pmdown_time = 1,
4993 .codec_dai_name = "snd-soc-dummy-dai",
4994 .codec_name = "snd-soc-dummy",
4995 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4996 {/* hw:x,35 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4997 .name = "SLIMBUS_7 Hostless",
4998 .stream_name = "SLIMBUS_7 Hostless",
4999 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5000 .platform_name = "msm-pcm-hostless",
5001 .dynamic = 1,
5002 .dpcm_capture = 1,
5003 .dpcm_playback = 1,
5004 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5005 SND_SOC_DPCM_TRIGGER_POST},
5006 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5007 .ignore_suspend = 1,
5008 .ignore_pmdown_time = 1,
5009 .codec_dai_name = "snd-soc-dummy-dai",
5010 .codec_name = "snd-soc-dummy",
5011 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5012 {/* hw:x,36 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5013 .name = "Compress Capture",
5014 .stream_name = "Compress9",
5015 .cpu_dai_name = "MultiMedia17",
5016 .platform_name = "msm-compress-dsp",
5017 .dynamic = 1,
5018 .dpcm_capture = 1,
5019 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5020 SND_SOC_DPCM_TRIGGER_POST},
5021 .codec_dai_name = "snd-soc-dummy-dai",
5022 .codec_name = "snd-soc-dummy",
5023 .ignore_suspend = 1,
5024 .ignore_pmdown_time = 1,
5025 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5026 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5027 {/* hw:x,37 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5028 .name = "SLIMBUS_8 Hostless",
5029 .stream_name = "SLIMBUS_8 Hostless",
5030 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5031 .platform_name = "msm-pcm-hostless",
5032 .dynamic = 1,
5033 .dpcm_capture = 1,
5034 .dpcm_playback = 1,
5035 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5036 SND_SOC_DPCM_TRIGGER_POST},
5037 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5038 .ignore_suspend = 1,
5039 .ignore_pmdown_time = 1,
5040 .codec_dai_name = "snd-soc-dummy-dai",
5041 .codec_name = "snd-soc-dummy",
5042 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]5043 {/* hw:x,38 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5044 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5045 .stream_name = "TX CDC DMA5 Capture",
5046 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5047 .platform_name = "msm-pcm-hostless",
5048 .codec_name = "bolero_codec",
5049 .codec_dai_name = "tx_macro_tx3",
5050 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5051 .be_hw_params_fixup = msm_be_hw_params_fixup,
5052 .ignore_suspend = 1,
5053 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5054 .ops = &msm_cdc_dma_be_ops,
5055 },
5056};
5057
5058static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5059 /* Backend AFE DAI Links */
5060 {
5061 .name = LPASS_BE_AFE_PCM_RX,
5062 .stream_name = "AFE Playback",
5063 .cpu_dai_name = "msm-dai-q6-dev.224",
5064 .platform_name = "msm-pcm-routing",
5065 .codec_name = "msm-stub-codec.1",
5066 .codec_dai_name = "msm-stub-rx",
5067 .no_pcm = 1,
5068 .dpcm_playback = 1,
5069 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5070 .be_hw_params_fixup = msm_be_hw_params_fixup,
5071 /* this dainlink has playback support */
5072 .ignore_pmdown_time = 1,
5073 .ignore_suspend = 1,
5074 },
5075 {
5076 .name = LPASS_BE_AFE_PCM_TX,
5077 .stream_name = "AFE Capture",
5078 .cpu_dai_name = "msm-dai-q6-dev.225",
5079 .platform_name = "msm-pcm-routing",
5080 .codec_name = "msm-stub-codec.1",
5081 .codec_dai_name = "msm-stub-tx",
5082 .no_pcm = 1,
5083 .dpcm_capture = 1,
5084 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5085 .be_hw_params_fixup = msm_be_hw_params_fixup,
5086 .ignore_suspend = 1,
5087 },
5088 /* Incall Record Uplink BACK END DAI Link */
5089 {
5090 .name = LPASS_BE_INCALL_RECORD_TX,
5091 .stream_name = "Voice Uplink Capture",
5092 .cpu_dai_name = "msm-dai-q6-dev.32772",
5093 .platform_name = "msm-pcm-routing",
5094 .codec_name = "msm-stub-codec.1",
5095 .codec_dai_name = "msm-stub-tx",
5096 .no_pcm = 1,
5097 .dpcm_capture = 1,
5098 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5099 .be_hw_params_fixup = msm_be_hw_params_fixup,
5100 .ignore_suspend = 1,
5101 },
5102 /* Incall Record Downlink BACK END DAI Link */
5103 {
5104 .name = LPASS_BE_INCALL_RECORD_RX,
5105 .stream_name = "Voice Downlink Capture",
5106 .cpu_dai_name = "msm-dai-q6-dev.32771",
5107 .platform_name = "msm-pcm-routing",
5108 .codec_name = "msm-stub-codec.1",
5109 .codec_dai_name = "msm-stub-tx",
5110 .no_pcm = 1,
5111 .dpcm_capture = 1,
5112 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5113 .be_hw_params_fixup = msm_be_hw_params_fixup,
5114 .ignore_suspend = 1,
5115 },
5116 /* Incall Music BACK END DAI Link */
5117 {
5118 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5119 .stream_name = "Voice Farend Playback",
5120 .cpu_dai_name = "msm-dai-q6-dev.32773",
5121 .platform_name = "msm-pcm-routing",
5122 .codec_name = "msm-stub-codec.1",
5123 .codec_dai_name = "msm-stub-rx",
5124 .no_pcm = 1,
5125 .dpcm_playback = 1,
5126 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5127 .be_hw_params_fixup = msm_be_hw_params_fixup,
5128 .ignore_suspend = 1,
5129 .ignore_pmdown_time = 1,
5130 },
5131 /* Incall Music 2 BACK END DAI Link */
5132 {
5133 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5134 .stream_name = "Voice2 Farend Playback",
5135 .cpu_dai_name = "msm-dai-q6-dev.32770",
5136 .platform_name = "msm-pcm-routing",
5137 .codec_name = "msm-stub-codec.1",
5138 .codec_dai_name = "msm-stub-rx",
5139 .no_pcm = 1,
5140 .dpcm_playback = 1,
5141 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5142 .be_hw_params_fixup = msm_be_hw_params_fixup,
5143 .ignore_suspend = 1,
5144 .ignore_pmdown_time = 1,
5145 },
Samyak Jainc345c632020-04-05 21:41:23 +0530[diff] [blame]5146 /* Proxy Tx BACK END DAI Link */
5147 {
5148 .name = LPASS_BE_PROXY_TX,
5149 .stream_name = "Proxy Capture",
5150 .cpu_dai_name = "msm-dai-q6-dev.8195",
5151 .platform_name = "msm-pcm-routing",
5152 .codec_name = "msm-stub-codec.1",
5153 .codec_dai_name = "msm-stub-tx",
5154 .no_pcm = 1,
5155 .dpcm_capture = 1,
5156 .id = MSM_BACKEND_DAI_PROXY_TX,
5157 .ignore_suspend = 1,
5158 },
5159 /* Proxy Rx BACK END DAI Link */
5160 {
5161 .name = LPASS_BE_PROXY_RX,
5162 .stream_name = "Proxy Playback",
5163 .cpu_dai_name = "msm-dai-q6-dev.8194",
5164 .platform_name = "msm-pcm-routing",
5165 .codec_name = "msm-stub-codec.1",
5166 .codec_dai_name = "msm-stub-rx",
5167 .no_pcm = 1,
5168 .dpcm_playback = 1,
5169 .id = MSM_BACKEND_DAI_PROXY_RX,
5170 .ignore_pmdown_time = 1,
5171 .ignore_suspend = 1,
5172 },
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5173 {
5174 .name = LPASS_BE_USB_AUDIO_RX,
5175 .stream_name = "USB Audio Playback",
5176 .cpu_dai_name = "msm-dai-q6-dev.28672",
5177 .platform_name = "msm-pcm-routing",
5178 .codec_name = "msm-stub-codec.1",
5179 .codec_dai_name = "msm-stub-rx",
5180 .dynamic_be = 1,
5181 .no_pcm = 1,
5182 .dpcm_playback = 1,
5183 .id = MSM_BACKEND_DAI_USB_RX,
5184 .be_hw_params_fixup = msm_be_hw_params_fixup,
5185 .ignore_pmdown_time = 1,
5186 .ignore_suspend = 1,
5187 },
5188 {
5189 .name = LPASS_BE_USB_AUDIO_TX,
5190 .stream_name = "USB Audio Capture",
5191 .cpu_dai_name = "msm-dai-q6-dev.28673",
5192 .platform_name = "msm-pcm-routing",
5193 .codec_name = "msm-stub-codec.1",
5194 .codec_dai_name = "msm-stub-tx",
5195 .no_pcm = 1,
5196 .dpcm_capture = 1,
5197 .id = MSM_BACKEND_DAI_USB_TX,
5198 .be_hw_params_fixup = msm_be_hw_params_fixup,
5199 .ignore_suspend = 1,
5200 },
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]5201};
5202
5203static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5204 {
5205 .name = LPASS_BE_PRI_TDM_RX_0,
5206 .stream_name = "Primary TDM0 Playback",
5207 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5208 .platform_name = "msm-pcm-routing",
5209 .codec_name = "msm-stub-codec.1",
5210 .codec_dai_name = "msm-stub-rx",
5211 .no_pcm = 1,
5212 .dpcm_playback = 1,
5213 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5214 .be_hw_params_fixup = msm_be_hw_params_fixup,
5215 .ops = &bengal_tdm_be_ops,
5216 .ignore_suspend = 1,
5217 .ignore_pmdown_time = 1,
5218 },
5219 {
5220 .name = LPASS_BE_PRI_TDM_TX_0,
5221 .stream_name = "Primary TDM0 Capture",
5222 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5223 .platform_name = "msm-pcm-routing",
5224 .codec_name = "msm-stub-codec.1",
5225 .codec_dai_name = "msm-stub-tx",
5226 .no_pcm = 1,
5227 .dpcm_capture = 1,
5228 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5229 .be_hw_params_fixup = msm_be_hw_params_fixup,
5230 .ops = &bengal_tdm_be_ops,
5231 .ignore_suspend = 1,
5232 },
5233 {
5234 .name = LPASS_BE_SEC_TDM_RX_0,
5235 .stream_name = "Secondary TDM0 Playback",
5236 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5237 .platform_name = "msm-pcm-routing",
5238 .codec_name = "msm-stub-codec.1",
5239 .codec_dai_name = "msm-stub-rx",
5240 .no_pcm = 1,
5241 .dpcm_playback = 1,
5242 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5243 .be_hw_params_fixup = msm_be_hw_params_fixup,
5244 .ops = &bengal_tdm_be_ops,
5245 .ignore_suspend = 1,
5246 .ignore_pmdown_time = 1,
5247 },
5248 {
5249 .name = LPASS_BE_SEC_TDM_TX_0,
5250 .stream_name = "Secondary TDM0 Capture",
5251 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5252 .platform_name = "msm-pcm-routing",
5253 .codec_name = "msm-stub-codec.1",
5254 .codec_dai_name = "msm-stub-tx",
5255 .no_pcm = 1,
5256 .dpcm_capture = 1,
5257 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5258 .be_hw_params_fixup = msm_be_hw_params_fixup,
5259 .ops = &bengal_tdm_be_ops,
5260 .ignore_suspend = 1,
5261 },
5262 {
5263 .name = LPASS_BE_TERT_TDM_RX_0,
5264 .stream_name = "Tertiary TDM0 Playback",
5265 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5266 .platform_name = "msm-pcm-routing",
5267 .codec_name = "msm-stub-codec.1",
5268 .codec_dai_name = "msm-stub-rx",
5269 .no_pcm = 1,
5270 .dpcm_playback = 1,
5271 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5272 .be_hw_params_fixup = msm_be_hw_params_fixup,
5273 .ops = &bengal_tdm_be_ops,
5274 .ignore_suspend = 1,
5275 .ignore_pmdown_time = 1,
5276 },
5277 {
5278 .name = LPASS_BE_TERT_TDM_TX_0,
5279 .stream_name = "Tertiary TDM0 Capture",
5280 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5281 .platform_name = "msm-pcm-routing",
5282 .codec_name = "msm-stub-codec.1",
5283 .codec_dai_name = "msm-stub-tx",
5284 .no_pcm = 1,
5285 .dpcm_capture = 1,
5286 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5287 .be_hw_params_fixup = msm_be_hw_params_fixup,
5288 .ops = &bengal_tdm_be_ops,
5289 .ignore_suspend = 1,
5290 },
5291 {
5292 .name = LPASS_BE_QUAT_TDM_RX_0,
5293 .stream_name = "Quaternary TDM0 Playback",
5294 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5295 .platform_name = "msm-pcm-routing",
5296 .codec_name = "msm-stub-codec.1",
5297 .codec_dai_name = "msm-stub-rx",
5298 .no_pcm = 1,
5299 .dpcm_playback = 1,
5300 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5301 .be_hw_params_fixup = msm_be_hw_params_fixup,
5302 .ops = &bengal_tdm_be_ops,
5303 .ignore_suspend = 1,
5304 .ignore_pmdown_time = 1,
5305 },
5306 {
5307 .name = LPASS_BE_QUAT_TDM_TX_0,
5308 .stream_name = "Quaternary TDM0 Capture",
5309 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5310 .platform_name = "msm-pcm-routing",
5311 .codec_name = "msm-stub-codec.1",
5312 .codec_dai_name = "msm-stub-tx",
5313 .no_pcm = 1,
5314 .dpcm_capture = 1,
5315 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5316 .be_hw_params_fixup = msm_be_hw_params_fixup,
5317 .ops = &bengal_tdm_be_ops,
5318 .ignore_suspend = 1,
5319 },
5320};
5321
5322static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5323 {
5324 .name = LPASS_BE_SLIMBUS_7_RX,
5325 .stream_name = "Slimbus7 Playback",
5326 .cpu_dai_name = "msm-dai-q6-dev.16398",
5327 .platform_name = "msm-pcm-routing",
5328 .codec_name = "btfmslim_slave",
5329 /* BT codec driver determines capabilities based on
5330 * dai name, bt codecdai name should always contains
5331 * supported usecase information
5332 */
5333 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5334 .no_pcm = 1,
5335 .dpcm_playback = 1,
5336 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5337 .be_hw_params_fixup = msm_be_hw_params_fixup,
5338 .init = &msm_wcn_init,
5339 .ops = &msm_wcn_ops,
5340 /* dai link has playback support */
5341 .ignore_pmdown_time = 1,
5342 .ignore_suspend = 1,
5343 },
5344 {
5345 .name = LPASS_BE_SLIMBUS_7_TX,
5346 .stream_name = "Slimbus7 Capture",
5347 .cpu_dai_name = "msm-dai-q6-dev.16399",
5348 .platform_name = "msm-pcm-routing",
5349 .codec_name = "btfmslim_slave",
5350 .codec_dai_name = "btfm_bt_sco_slim_tx",
5351 .no_pcm = 1,
5352 .dpcm_capture = 1,
5353 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5354 .be_hw_params_fixup = msm_be_hw_params_fixup,
5355 .ops = &msm_wcn_ops,
5356 .ignore_suspend = 1,
5357 },
5358 {
5359 .name = LPASS_BE_SLIMBUS_8_TX,
5360 .stream_name = "Slimbus8 Capture",
5361 .cpu_dai_name = "msm-dai-q6-dev.16401",
5362 .platform_name = "msm-pcm-routing",
5363 .codec_name = "btfmslim_slave",
5364 .codec_dai_name = "btfm_fm_slim_tx",
5365 .no_pcm = 1,
5366 .dpcm_capture = 1,
5367 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5368 .be_hw_params_fixup = msm_be_hw_params_fixup,
5369 .ops = &msm_wcn_ops,
5370 .ignore_suspend = 1,
5371 },
5372};
5373
5374static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5375 {
5376 .name = LPASS_BE_PRI_MI2S_RX,
5377 .stream_name = "Primary MI2S Playback",
5378 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5379 .platform_name = "msm-pcm-routing",
5380 .codec_name = "msm-stub-codec.1",
5381 .codec_dai_name = "msm-stub-rx",
5382 .no_pcm = 1,
5383 .dpcm_playback = 1,
5384 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5385 .be_hw_params_fixup = msm_be_hw_params_fixup,
5386 .ops = &msm_mi2s_be_ops,
5387 .ignore_suspend = 1,
5388 .ignore_pmdown_time = 1,
5389 },
5390 {
5391 .name = LPASS_BE_PRI_MI2S_TX,
5392 .stream_name = "Primary MI2S Capture",
5393 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5394 .platform_name = "msm-pcm-routing",
5395 .codec_name = "msm-stub-codec.1",
5396 .codec_dai_name = "msm-stub-tx",
5397 .no_pcm = 1,
5398 .dpcm_capture = 1,
5399 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5400 .be_hw_params_fixup = msm_be_hw_params_fixup,
5401 .ops = &msm_mi2s_be_ops,
5402 .ignore_suspend = 1,
5403 },
5404 {
5405 .name = LPASS_BE_SEC_MI2S_RX,
5406 .stream_name = "Secondary MI2S Playback",
5407 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5408 .platform_name = "msm-pcm-routing",
5409 .codec_name = "msm-stub-codec.1",
5410 .codec_dai_name = "msm-stub-rx",
5411 .no_pcm = 1,
5412 .dpcm_playback = 1,
5413 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5414 .be_hw_params_fixup = msm_be_hw_params_fixup,
5415 .ops = &msm_mi2s_be_ops,
5416 .ignore_suspend = 1,
5417 .ignore_pmdown_time = 1,
5418 },
5419 {
5420 .name = LPASS_BE_SEC_MI2S_TX,
5421 .stream_name = "Secondary MI2S Capture",
5422 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5423 .platform_name = "msm-pcm-routing",
5424 .codec_name = "msm-stub-codec.1",
5425 .codec_dai_name = "msm-stub-tx",
5426 .no_pcm = 1,
5427 .dpcm_capture = 1,
5428 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5429 .be_hw_params_fixup = msm_be_hw_params_fixup,
5430 .ops = &msm_mi2s_be_ops,
5431 .ignore_suspend = 1,
5432 },
5433 {
5434 .name = LPASS_BE_TERT_MI2S_RX,
5435 .stream_name = "Tertiary MI2S Playback",
5436 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5437 .platform_name = "msm-pcm-routing",
5438 .codec_name = "msm-stub-codec.1",
5439 .codec_dai_name = "msm-stub-rx",
5440 .no_pcm = 1,
5441 .dpcm_playback = 1,
5442 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5443 .be_hw_params_fixup = msm_be_hw_params_fixup,
5444 .ops = &msm_mi2s_be_ops,
5445 .ignore_suspend = 1,
5446 .ignore_pmdown_time = 1,
5447 },
5448 {
5449 .name = LPASS_BE_TERT_MI2S_TX,
5450 .stream_name = "Tertiary MI2S Capture",
5451 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5452 .platform_name = "msm-pcm-routing",
5453 .codec_name = "msm-stub-codec.1",
5454 .codec_dai_name = "msm-stub-tx",
5455 .no_pcm = 1,
5456 .dpcm_capture = 1,
5457 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5458 .be_hw_params_fixup = msm_be_hw_params_fixup,
5459 .ops = &msm_mi2s_be_ops,
5460 .ignore_suspend = 1,
5461 },
5462 {
5463 .name = LPASS_BE_QUAT_MI2S_RX,
5464 .stream_name = "Quaternary MI2S Playback",
5465 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5466 .platform_name = "msm-pcm-routing",
5467 .codec_name = "msm-stub-codec.1",
5468 .codec_dai_name = "msm-stub-rx",
5469 .no_pcm = 1,
5470 .dpcm_playback = 1,
5471 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
5472 .be_hw_params_fixup = msm_be_hw_params_fixup,
5473 .ops = &msm_mi2s_be_ops,
5474 .ignore_suspend = 1,
5475 .ignore_pmdown_time = 1,
5476 },
5477 {
5478 .name = LPASS_BE_QUAT_MI2S_TX,
5479 .stream_name = "Quaternary MI2S Capture",
5480 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5481 .platform_name = "msm-pcm-routing",
5482 .codec_name = "msm-stub-codec.1",
5483 .codec_dai_name = "msm-stub-tx",
5484 .no_pcm = 1,
5485 .dpcm_capture = 1,
5486 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
5487 .be_hw_params_fixup = msm_be_hw_params_fixup,
5488 .ops = &msm_mi2s_be_ops,
5489 .ignore_suspend = 1,
5490 },
5491};
5492
5493static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5494 /* Primary AUX PCM Backend DAI Links */
5495 {
5496 .name = LPASS_BE_AUXPCM_RX,
5497 .stream_name = "AUX PCM Playback",
5498 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5499 .platform_name = "msm-pcm-routing",
5500 .codec_name = "msm-stub-codec.1",
5501 .codec_dai_name = "msm-stub-rx",
5502 .no_pcm = 1,
5503 .dpcm_playback = 1,
5504 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5505 .be_hw_params_fixup = msm_be_hw_params_fixup,
5506 .ops = &bengal_aux_be_ops,
5507 .ignore_pmdown_time = 1,
5508 .ignore_suspend = 1,
5509 },
5510 {
5511 .name = LPASS_BE_AUXPCM_TX,
5512 .stream_name = "AUX PCM Capture",
5513 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5514 .platform_name = "msm-pcm-routing",
5515 .codec_name = "msm-stub-codec.1",
5516 .codec_dai_name = "msm-stub-tx",
5517 .no_pcm = 1,
5518 .dpcm_capture = 1,
5519 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5520 .be_hw_params_fixup = msm_be_hw_params_fixup,
5521 .ops = &bengal_aux_be_ops,
5522 .ignore_suspend = 1,
5523 },
5524 /* Secondary AUX PCM Backend DAI Links */
5525 {
5526 .name = LPASS_BE_SEC_AUXPCM_RX,
5527 .stream_name = "Sec AUX PCM Playback",
5528 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5529 .platform_name = "msm-pcm-routing",
5530 .codec_name = "msm-stub-codec.1",
5531 .codec_dai_name = "msm-stub-rx",
5532 .no_pcm = 1,
5533 .dpcm_playback = 1,
5534 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5535 .be_hw_params_fixup = msm_be_hw_params_fixup,
5536 .ops = &bengal_aux_be_ops,
5537 .ignore_pmdown_time = 1,
5538 .ignore_suspend = 1,
5539 },
5540 {
5541 .name = LPASS_BE_SEC_AUXPCM_TX,
5542 .stream_name = "Sec AUX PCM Capture",
5543 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5544 .platform_name = "msm-pcm-routing",
5545 .codec_name = "msm-stub-codec.1",
5546 .codec_dai_name = "msm-stub-tx",
5547 .no_pcm = 1,
5548 .dpcm_capture = 1,
5549 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5550 .be_hw_params_fixup = msm_be_hw_params_fixup,
5551 .ops = &bengal_aux_be_ops,
5552 .ignore_suspend = 1,
5553 },
5554 /* Tertiary AUX PCM Backend DAI Links */
5555 {
5556 .name = LPASS_BE_TERT_AUXPCM_RX,
5557 .stream_name = "Tert AUX PCM Playback",
5558 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5559 .platform_name = "msm-pcm-routing",
5560 .codec_name = "msm-stub-codec.1",
5561 .codec_dai_name = "msm-stub-rx",
5562 .no_pcm = 1,
5563 .dpcm_playback = 1,
5564 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5565 .be_hw_params_fixup = msm_be_hw_params_fixup,
5566 .ops = &bengal_aux_be_ops,
5567 .ignore_suspend = 1,
5568 },
5569 {
5570 .name = LPASS_BE_TERT_AUXPCM_TX,
5571 .stream_name = "Tert AUX PCM Capture",
5572 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5573 .platform_name = "msm-pcm-routing",
5574 .codec_name = "msm-stub-codec.1",
5575 .codec_dai_name = "msm-stub-tx",
5576 .no_pcm = 1,
5577 .dpcm_capture = 1,
5578 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5579 .be_hw_params_fixup = msm_be_hw_params_fixup,
5580 .ops = &bengal_aux_be_ops,
5581 .ignore_suspend = 1,
5582 },
5583 /* Quaternary AUX PCM Backend DAI Links */
5584 {
5585 .name = LPASS_BE_QUAT_AUXPCM_RX,
5586 .stream_name = "Quat AUX PCM Playback",
5587 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5588 .platform_name = "msm-pcm-routing",
5589 .codec_name = "msm-stub-codec.1",
5590 .codec_dai_name = "msm-stub-rx",
5591 .no_pcm = 1,
5592 .dpcm_playback = 1,
5593 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
5594 .be_hw_params_fixup = msm_be_hw_params_fixup,
5595 .ops = &bengal_aux_be_ops,
5596 .ignore_suspend = 1,
5597 },
5598 {
5599 .name = LPASS_BE_QUAT_AUXPCM_TX,
5600 .stream_name = "Quat AUX PCM Capture",
5601 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5602 .platform_name = "msm-pcm-routing",
5603 .codec_name = "msm-stub-codec.1",
5604 .codec_dai_name = "msm-stub-tx",
5605 .no_pcm = 1,
5606 .dpcm_capture = 1,
5607 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
5608 .be_hw_params_fixup = msm_be_hw_params_fixup,
5609 .ops = &bengal_aux_be_ops,
5610 .ignore_suspend = 1,
5611 },
5612};
5613
5614static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5615 /* RX CDC DMA Backend DAI Links */
5616 {
5617 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5618 .stream_name = "RX CDC DMA0 Playback",
5619 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5620 .platform_name = "msm-pcm-routing",
5621 .codec_name = "bolero_codec",
5622 .codec_dai_name = "rx_macro_rx1",
5623 .dynamic_be = 1,
5624 .no_pcm = 1,
5625 .dpcm_playback = 1,
5626 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5627 .be_hw_params_fixup = msm_be_hw_params_fixup,
5628 .ignore_pmdown_time = 1,
5629 .ignore_suspend = 1,
5630 .ops = &msm_cdc_dma_be_ops,
5631 },
5632 {
5633 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5634 .stream_name = "RX CDC DMA1 Playback",
5635 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5636 .platform_name = "msm-pcm-routing",
5637 .codec_name = "bolero_codec",
5638 .codec_dai_name = "rx_macro_rx2",
5639 .dynamic_be = 1,
5640 .no_pcm = 1,
5641 .dpcm_playback = 1,
5642 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5643 .be_hw_params_fixup = msm_be_hw_params_fixup,
5644 .ignore_pmdown_time = 1,
5645 .ignore_suspend = 1,
5646 .ops = &msm_cdc_dma_be_ops,
5647 },
5648 {
5649 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5650 .stream_name = "RX CDC DMA2 Playback",
5651 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5652 .platform_name = "msm-pcm-routing",
5653 .codec_name = "bolero_codec",
5654 .codec_dai_name = "rx_macro_rx3",
5655 .dynamic_be = 1,
5656 .no_pcm = 1,
5657 .dpcm_playback = 1,
5658 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5659 .be_hw_params_fixup = msm_be_hw_params_fixup,
5660 .ignore_pmdown_time = 1,
5661 .ignore_suspend = 1,
5662 .ops = &msm_cdc_dma_be_ops,
5663 },
5664 {
5665 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5666 .stream_name = "RX CDC DMA3 Playback",
5667 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5668 .platform_name = "msm-pcm-routing",
5669 .codec_name = "bolero_codec",
5670 .codec_dai_name = "rx_macro_rx4",
5671 .dynamic_be = 1,
5672 .no_pcm = 1,
5673 .dpcm_playback = 1,
5674 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5675 .be_hw_params_fixup = msm_be_hw_params_fixup,
5676 .ignore_pmdown_time = 1,
5677 .ignore_suspend = 1,
5678 .ops = &msm_cdc_dma_be_ops,
5679 },
5680 /* TX CDC DMA Backend DAI Links */
5681 {
5682 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5683 .stream_name = "TX CDC DMA3 Capture",
5684 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5685 .platform_name = "msm-pcm-routing",
5686 .codec_name = "bolero_codec",
5687 .codec_dai_name = "tx_macro_tx1",
5688 .no_pcm = 1,
5689 .dpcm_capture = 1,
5690 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5691 .be_hw_params_fixup = msm_be_hw_params_fixup,
5692 .ignore_suspend = 1,
5693 .ops = &msm_cdc_dma_be_ops,
5694 },
5695 {
5696 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5697 .stream_name = "TX CDC DMA4 Capture",
5698 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5699 .platform_name = "msm-pcm-routing",
5700 .codec_name = "bolero_codec",
5701 .codec_dai_name = "tx_macro_tx2",
5702 .no_pcm = 1,
5703 .dpcm_capture = 1,
5704 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5705 .be_hw_params_fixup = msm_be_hw_params_fixup,
5706 .ignore_suspend = 1,
5707 .ops = &msm_cdc_dma_be_ops,
5708 },
5709};
5710
5711static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5712 {
5713 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5714 .stream_name = "VA CDC DMA0 Capture",
5715 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5716 .platform_name = "msm-pcm-routing",
5717 .codec_name = "bolero_codec",
5718 .codec_dai_name = "va_macro_tx1",
5719 .no_pcm = 1,
5720 .dpcm_capture = 1,
5721 .init = &msm_int_audrx_init,
5722 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5723 .be_hw_params_fixup = msm_be_hw_params_fixup,
5724 .ignore_suspend = 1,
5725 .ops = &msm_cdc_dma_be_ops,
5726 },
5727 {
5728 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5729 .stream_name = "VA CDC DMA1 Capture",
5730 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5731 .platform_name = "msm-pcm-routing",
5732 .codec_name = "bolero_codec",
5733 .codec_dai_name = "va_macro_tx2",
5734 .no_pcm = 1,
5735 .dpcm_capture = 1,
5736 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5737 .be_hw_params_fixup = msm_be_hw_params_fixup,
5738 .ignore_suspend = 1,
5739 .ops = &msm_cdc_dma_be_ops,
5740 },
5741 {
5742 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5743 .stream_name = "VA CDC DMA2 Capture",
5744 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5745 .platform_name = "msm-pcm-routing",
5746 .codec_name = "bolero_codec",
5747 .codec_dai_name = "va_macro_tx3",
5748 .no_pcm = 1,
5749 .dpcm_capture = 1,
5750 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5751 .be_hw_params_fixup = msm_be_hw_params_fixup,
5752 .ignore_suspend = 1,
5753 .ops = &msm_cdc_dma_be_ops,
5754 },
5755};
5756
5757static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5758 {
5759 .name = LPASS_BE_AFE_LOOPBACK_TX,
5760 .stream_name = "AFE Loopback Capture",
5761 .cpu_dai_name = "msm-dai-q6-dev.24577",
5762 .platform_name = "msm-pcm-routing",
5763 .codec_name = "msm-stub-codec.1",
5764 .codec_dai_name = "msm-stub-tx",
5765 .no_pcm = 1,
5766 .dpcm_capture = 1,
5767 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5768 .be_hw_params_fixup = msm_be_hw_params_fixup,
5769 .ignore_pmdown_time = 1,
5770 .ignore_suspend = 1,
5771 },
5772};
5773
5774static struct snd_soc_dai_link msm_bengal_dai_links[
5775 ARRAY_SIZE(msm_common_dai_links) +
5776 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5777 ARRAY_SIZE(msm_common_be_dai_links) +
5778 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5779 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5780 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
5781 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5782 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]5783 ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
5784 ARRAY_SIZE(msm_tdm_be_dai_links)];
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5785
5786static int msm_populate_dai_link_component_of_node(
5787 struct snd_soc_card *card)
5788{
5789 int i, index, ret = 0;
5790 struct device *cdev = card->dev;
5791 struct snd_soc_dai_link *dai_link = card->dai_link;
5792 struct device_node *np;
5793
5794 if (!cdev) {
5795 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5796 return -ENODEV;
5797 }
5798
5799 for (i = 0; i < card->num_links; i++) {
5800 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5801 continue;
5802
5803 /* populate platform_of_node for snd card dai links */
5804 if (dai_link[i].platform_name &&
5805 !dai_link[i].platform_of_node) {
5806 index = of_property_match_string(cdev->of_node,
5807 "asoc-platform-names",
5808 dai_link[i].platform_name);
5809 if (index < 0) {
5810 dev_err(cdev,
5811 "%s: No match found for platform name: %s\n",
5812 __func__, dai_link[i].platform_name);
5813 ret = index;
5814 goto err;
5815 }
5816 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5817 index);
5818 if (!np) {
5819 dev_err(cdev,
5820 "%s: retrieving phandle for platform %s, index %d failed\n",
5821 __func__, dai_link[i].platform_name,
5822 index);
5823 ret = -ENODEV;
5824 goto err;
5825 }
5826 dai_link[i].platform_of_node = np;
5827 dai_link[i].platform_name = NULL;
5828 }
5829
5830 /* populate cpu_of_node for snd card dai links */
5831 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5832 index = of_property_match_string(cdev->of_node,
5833 "asoc-cpu-names",
5834 dai_link[i].cpu_dai_name);
5835 if (index >= 0) {
5836 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5837 index);
5838 if (!np) {
5839 dev_err(cdev,
5840 "%s: retrieving phandle for cpu dai %s failed\n",
5841 __func__,
5842 dai_link[i].cpu_dai_name);
5843 ret = -ENODEV;
5844 goto err;
5845 }
5846 dai_link[i].cpu_of_node = np;
5847 dai_link[i].cpu_dai_name = NULL;
5848 }
5849 }
5850
5851 /* populate codec_of_node for snd card dai links */
5852 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5853 index = of_property_match_string(cdev->of_node,
5854 "asoc-codec-names",
5855 dai_link[i].codec_name);
5856 if (index < 0)
5857 continue;
5858 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5859 index);
5860 if (!np) {
5861 dev_err(cdev,
5862 "%s: retrieving phandle for codec %s failed\n",
5863 __func__, dai_link[i].codec_name);
5864 ret = -ENODEV;
5865 goto err;
5866 }
5867 dai_link[i].codec_of_node = np;
5868 dai_link[i].codec_name = NULL;
5869 }
5870 }
5871
5872err:
5873 return ret;
5874}
5875
5876static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
5877{
5878 int ret = -EINVAL;
5879 struct snd_soc_component *component =
5880 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
5881
5882 if (!component) {
5883 pr_err("* %s: No match for msm-stub-codec component\n",
5884 __func__);
5885 return ret;
5886 }
5887
5888 ret = snd_soc_add_component_controls(component, msm_snd_controls,
5889 ARRAY_SIZE(msm_snd_controls));
5890 if (ret < 0) {
5891 dev_err(component->dev,
5892 "%s: add_codec_controls failed, err = %d\n",
5893 __func__, ret);
5894 return ret;
5895 }
5896
5897 return ret;
5898}
5899
5900static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
5901 struct snd_pcm_hw_params *params)
5902{
5903 return 0;
5904}
5905
5906static struct snd_soc_ops msm_stub_be_ops = {
5907 .hw_params = msm_snd_stub_hw_params,
5908};
5909
5910struct snd_soc_card snd_soc_card_stub_msm = {
5911 .name = "bengal-stub-snd-card",
5912};
5913
5914static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
5915 /* FrontEnd DAI Links */
5916 {
5917 .name = "MSMSTUB Media1",
5918 .stream_name = "MultiMedia1",
5919 .cpu_dai_name = "MultiMedia1",
5920 .platform_name = "msm-pcm-dsp.0",
5921 .dynamic = 1,
5922 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5923 .dpcm_playback = 1,
5924 .dpcm_capture = 1,
5925 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5926 SND_SOC_DPCM_TRIGGER_POST},
5927 .codec_dai_name = "snd-soc-dummy-dai",
5928 .codec_name = "snd-soc-dummy",
5929 .ignore_suspend = 1,
5930 /* this dainlink has playback support */
5931 .ignore_pmdown_time = 1,
5932 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5933 },
5934};
5935
5936static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
5937 /* Backend DAI Links */
5938 {
5939 .name = LPASS_BE_AUXPCM_RX,
5940 .stream_name = "AUX PCM Playback",
5941 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5942 .platform_name = "msm-pcm-routing",
5943 .codec_name = "msm-stub-codec.1",
5944 .codec_dai_name = "msm-stub-rx",
5945 .no_pcm = 1,
5946 .dpcm_playback = 1,
5947 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5948 .init = &msm_audrx_stub_init,
5949 .be_hw_params_fixup = msm_be_hw_params_fixup,
5950 .ignore_pmdown_time = 1,
5951 .ignore_suspend = 1,
5952 .ops = &msm_stub_be_ops,
5953 },
5954 {
5955 .name = LPASS_BE_AUXPCM_TX,
5956 .stream_name = "AUX PCM Capture",
5957 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5958 .platform_name = "msm-pcm-routing",
5959 .codec_name = "msm-stub-codec.1",
5960 .codec_dai_name = "msm-stub-tx",
5961 .no_pcm = 1,
5962 .dpcm_capture = 1,
5963 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5964 .be_hw_params_fixup = msm_be_hw_params_fixup,
5965 .ignore_suspend = 1,
5966 .ops = &msm_stub_be_ops,
5967 },
5968};
5969
5970static struct snd_soc_dai_link msm_stub_dai_links[
5971 ARRAY_SIZE(msm_stub_fe_dai_links) +
5972 ARRAY_SIZE(msm_stub_be_dai_links)];
5973
5974static const struct of_device_id bengal_asoc_machine_of_match[] = {
5975 { .compatible = "qcom,bengal-asoc-snd",
5976 .data = "codec"},
5977 { .compatible = "qcom,bengal-asoc-snd-stub",
5978 .data = "stub_codec"},
5979 {},
5980};
5981
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame^]5982static int msm_snd_card_bengal_late_probe(struct snd_soc_card *card)
5983{
5984 struct snd_soc_component *component;
5985 struct platform_device *pdev = NULL;
5986 char *data = NULL;
5987 int ret = 0, i = 0;
5988 void *mbhc_calibration;
5989
5990 for (i = 0; i < card->num_aux_devs; i++)
5991 {
5992 if (msm_aux_dev[i].name != NULL ) {
5993 if (strstr(msm_aux_dev[i].name, "wsa"))
5994 continue;
5995 }
5996
5997 if (msm_aux_dev[i].codec_of_node) {
5998 pdev = of_find_device_by_node(
5999 msm_aux_dev[i].codec_of_node);
6000 if (pdev) {
6001 data = (char*) of_device_get_match_data(
6002 &pdev->dev);
6003 component = soc_find_component(
6004 msm_aux_dev[i].codec_of_node,
6005 NULL);
6006 }
6007 }
6008 }
6009
6010 if (data != NULL && component != NULL) {
6011 if (!strncmp(data, "wcd937x", sizeof("wcd937x"))) {
6012 mbhc_calibration = def_wcd_mbhc_cal();
6013 if (!mbhc_calibration)
6014 goto err_mbhc_cal;
6015 wcd_mbhc_cfg.calibration = mbhc_calibration;
6016 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6017 } else if (!strncmp( data, "rouleur", sizeof("rouleur"))) {
6018 mbhc_calibration = def_rouleur_mbhc_cal();
6019 if (!mbhc_calibration)
6020 goto err_mbhc_cal;
6021 wcd_mbhc_cfg.calibration = mbhc_calibration;
6022 ret = rouleur_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6023 }
6024 }
6025
6026 if (ret) {
6027 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6028 __func__, ret);
6029 goto err_hs_detect;
6030 }
6031 return 0;
6032
6033err_hs_detect:
6034 kfree(mbhc_calibration);
6035err_mbhc_cal:
6036 return ret;
6037}
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6038static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6039{
6040 struct snd_soc_card *card = NULL;
6041 struct snd_soc_dai_link *dailink = NULL;
6042 int len_1 = 0;
6043 int len_2 = 0;
6044 int total_links = 0;
6045 int rc = 0;
6046 u32 mi2s_audio_intf = 0;
6047 u32 auxpcm_audio_intf = 0;
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6048 u32 rxtx_bolero_codec = 0;
6049 u32 va_bolero_codec = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6050 u32 val = 0;
6051 u32 wcn_btfm_intf = 0;
6052 const struct of_device_id *match;
6053
6054 match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
6055 if (!match) {
6056 dev_err(dev, "%s: No DT match found for sound card\n",
6057 __func__);
6058 return NULL;
6059 }
6060
6061 if (!strcmp(match->data, "codec")) {
6062 card = &snd_soc_card_bengal_msm;
6063
6064 memcpy(msm_bengal_dai_links + total_links,
6065 msm_common_dai_links,
6066 sizeof(msm_common_dai_links));
6067 total_links += ARRAY_SIZE(msm_common_dai_links);
6068
6069 memcpy(msm_bengal_dai_links + total_links,
6070 msm_common_misc_fe_dai_links,
6071 sizeof(msm_common_misc_fe_dai_links));
6072 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
6073
6074 memcpy(msm_bengal_dai_links + total_links,
6075 msm_common_be_dai_links,
6076 sizeof(msm_common_be_dai_links));
6077 total_links += ARRAY_SIZE(msm_common_be_dai_links);
6078
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6079 rc = of_property_read_u32(dev->of_node,
6080 "qcom,rxtx-bolero-codec",
6081 &rxtx_bolero_codec);
6082 if (rc) {
6083 dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
6084 __func__);
6085 } else {
6086 if (rxtx_bolero_codec) {
6087 memcpy(msm_bengal_dai_links + total_links,
6088 msm_rx_tx_cdc_dma_be_dai_links,
6089 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
6090 total_links +=
6091 ARRAY_SIZE(
6092 msm_rx_tx_cdc_dma_be_dai_links);
6093 }
6094 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6095
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]6096 rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
6097 &va_bolero_codec);
6098 if (rc) {
6099 dev_dbg(dev, "%s: No DT match VA Macro codec\n",
6100 __func__);
6101 } else {
6102 if (va_bolero_codec) {
6103 memcpy(msm_bengal_dai_links + total_links,
6104 msm_va_cdc_dma_be_dai_links,
6105 sizeof(msm_va_cdc_dma_be_dai_links));
6106 total_links +=
6107 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
6108 }
6109 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6110
6111 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
6112 &mi2s_audio_intf);
6113 if (rc) {
6114 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
6115 __func__);
6116 } else {
6117 if (mi2s_audio_intf) {
6118 memcpy(msm_bengal_dai_links + total_links,
6119 msm_mi2s_be_dai_links,
6120 sizeof(msm_mi2s_be_dai_links));
6121 total_links +=
6122 ARRAY_SIZE(msm_mi2s_be_dai_links);
6123 }
6124 }
6125
6126 rc = of_property_read_u32(dev->of_node,
6127 "qcom,auxpcm-audio-intf",
6128 &auxpcm_audio_intf);
6129 if (rc) {
6130 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
6131 __func__);
6132 } else {
6133 if (auxpcm_audio_intf) {
6134 memcpy(msm_bengal_dai_links + total_links,
6135 msm_auxpcm_be_dai_links,
6136 sizeof(msm_auxpcm_be_dai_links));
6137 total_links +=
6138 ARRAY_SIZE(msm_auxpcm_be_dai_links);
6139 }
6140 }
6141
6142 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
6143 &val);
6144 if (!rc && val) {
6145 memcpy(msm_bengal_dai_links + total_links,
6146 msm_afe_rxtx_lb_be_dai_link,
6147 sizeof(msm_afe_rxtx_lb_be_dai_link));
6148 total_links +=
6149 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
6150 }
6151
Harshal Ahire42999452020-01-28 14:22:01 +0530[diff] [blame]6152 rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
6153 &val);
6154 if (!rc && val) {
6155 memcpy(msm_bengal_dai_links + total_links,
6156 msm_tdm_be_dai_links,
6157 sizeof(msm_tdm_be_dai_links));
6158 total_links +=
6159 ARRAY_SIZE(msm_tdm_be_dai_links);
6160 }
6161
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6162 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
6163 &wcn_btfm_intf);
6164 if (rc) {
6165 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
6166 __func__);
6167 } else {
6168 if (wcn_btfm_intf) {
6169 memcpy(msm_bengal_dai_links + total_links,
6170 msm_wcn_btfm_be_dai_links,
6171 sizeof(msm_wcn_btfm_be_dai_links));
6172 total_links +=
6173 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
6174 }
6175 }
6176 dailink = msm_bengal_dai_links;
6177 } else if (!strcmp(match->data, "stub_codec")) {
6178 card = &snd_soc_card_stub_msm;
6179 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
6180 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
6181
6182 memcpy(msm_stub_dai_links,
6183 msm_stub_fe_dai_links,
6184 sizeof(msm_stub_fe_dai_links));
6185 memcpy(msm_stub_dai_links + len_1,
6186 msm_stub_be_dai_links,
6187 sizeof(msm_stub_be_dai_links));
6188
6189 dailink = msm_stub_dai_links;
6190 total_links = len_2;
6191 }
6192
6193 if (card) {
6194 card->dai_link = dailink;
6195 card->num_links = total_links;
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame^]6196 card->late_probe = msm_snd_card_bengal_late_probe;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6197 }
6198
6199 return card;
6200}
6201
6202static int msm_aux_codec_init(struct snd_soc_component *component)
6203{
6204 struct snd_soc_dapm_context *dapm =
6205 snd_soc_component_get_dapm(component);
6206 int ret = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6207 struct snd_info_entry *entry;
6208 struct snd_card *card = component->card->snd_card;
6209 struct msm_asoc_mach_data *pdata;
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6210 struct platform_device *pdev = NULL;
6211 char *data = NULL;
6212 int i = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6213
6214 snd_soc_dapm_ignore_suspend(dapm, "EAR");
6215 snd_soc_dapm_ignore_suspend(dapm, "AUX");
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6216 snd_soc_dapm_ignore_suspend(dapm, "LO");
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6217 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
6218 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
6219 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
6220 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
6221 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
6222 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
6223 snd_soc_dapm_sync(dapm);
6224
6225 pdata = snd_soc_card_get_drvdata(component->card);
6226 if (!pdata->codec_root) {
6227 entry = snd_info_create_subdir(card->module, "codecs",
6228 card->proc_root);
6229 if (!entry) {
6230 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
6231 __func__);
6232 ret = 0;
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame^]6233 goto err;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6234 }
6235 pdata->codec_root = entry;
6236 }
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame]6237
6238 for (i = 0; i < component->card->num_aux_devs; i++)
6239 {
6240 if (msm_aux_dev[i].name != NULL ) {
6241 if (strstr(msm_aux_dev[i].name, "wsa"))
6242 continue;
6243 }
6244
6245 if (msm_aux_dev[i].codec_of_node) {
6246 pdev = of_find_device_by_node(
6247 msm_aux_dev[i].codec_of_node);
6248 if (pdev)
6249 data = (char*) of_device_get_match_data(
6250 &pdev->dev);
6251
6252 if (data != NULL) {
6253 if (!strncmp(data, "wcd937x",
6254 sizeof("wcd937x"))) {
6255 wcd937x_info_create_codec_entry(
6256 pdata->codec_root, component);
6257 break;
6258 } else if (!strncmp(data, "rouleur",
6259 sizeof("rouleur"))) {
6260 rouleur_info_create_codec_entry(
6261 pdata->codec_root, component);
6262 break;
6263 }
6264 }
6265 }
6266 }
Vatsal Bucha94bc9ea2020-05-21 12:04:20 +0530[diff] [blame^]6267err:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6268 return ret;
6269}
6270
6271static int msm_init_aux_dev(struct platform_device *pdev,
6272 struct snd_soc_card *card)
6273{
6274 struct device_node *wsa_of_node;
6275 struct device_node *aux_codec_of_node;
6276 u32 wsa_max_devs;
6277 u32 wsa_dev_cnt;
6278 u32 codec_max_aux_devs = 0;
6279 u32 codec_aux_dev_cnt = 0;
6280 int i;
6281 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6282 struct aux_codec_dev_info *aux_cdc_dev_info;
6283 const char *auxdev_name_prefix[1];
6284 char *dev_name_str = NULL;
6285 int found = 0;
6286 int codecs_found = 0;
6287 int ret = 0;
6288
6289 /* Get maximum WSA device count for this platform */
6290 ret = of_property_read_u32(pdev->dev.of_node,
6291 "qcom,wsa-max-devs", &wsa_max_devs);
6292 if (ret) {
6293 dev_info(&pdev->dev,
6294 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6295 __func__, pdev->dev.of_node->full_name, ret);
6296 wsa_max_devs = 0;
6297 goto codec_aux_dev;
6298 }
6299 if (wsa_max_devs == 0) {
6300 dev_warn(&pdev->dev,
6301 "%s: Max WSA devices is 0 for this target?\n",
6302 __func__);
6303 goto codec_aux_dev;
6304 }
6305
6306 /* Get count of WSA device phandles for this platform */
6307 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6308 "qcom,wsa-devs", NULL);
6309 if (wsa_dev_cnt == -ENOENT) {
6310 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6311 __func__);
6312 goto err;
6313 } else if (wsa_dev_cnt <= 0) {
6314 dev_err(&pdev->dev,
6315 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6316 __func__, wsa_dev_cnt);
6317 ret = -EINVAL;
6318 goto err;
6319 }
6320
6321 /*
6322 * Expect total phandles count to be NOT less than maximum possible
6323 * WSA count. However, if it is less, then assign same value to
6324 * max count as well.
6325 */
6326 if (wsa_dev_cnt < wsa_max_devs) {
6327 dev_dbg(&pdev->dev,
6328 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6329 __func__, wsa_max_devs, wsa_dev_cnt);
6330 wsa_max_devs = wsa_dev_cnt;
6331 }
6332
6333 /* Make sure prefix string passed for each WSA device */
6334 ret = of_property_count_strings(pdev->dev.of_node,
6335 "qcom,wsa-aux-dev-prefix");
6336 if (ret != wsa_dev_cnt) {
6337 dev_err(&pdev->dev,
6338 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6339 __func__, wsa_dev_cnt, ret);
6340 ret = -EINVAL;
6341 goto err;
6342 }
6343
6344 /*
6345 * Alloc mem to store phandle and index info of WSA device, if already
6346 * registered with ALSA core
6347 */
6348 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6349 sizeof(struct msm_wsa881x_dev_info),
6350 GFP_KERNEL);
6351 if (!wsa881x_dev_info) {
6352 ret = -ENOMEM;
6353 goto err;
6354 }
6355
6356 /*
6357 * search and check whether all WSA devices are already
6358 * registered with ALSA core or not. If found a node, store
6359 * the node and the index in a local array of struct for later
6360 * use.
6361 */
6362 for (i = 0; i < wsa_dev_cnt; i++) {
6363 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6364 "qcom,wsa-devs", i);
6365 if (unlikely(!wsa_of_node)) {
6366 /* we should not be here */
6367 dev_err(&pdev->dev,
6368 "%s: wsa dev node is not present\n",
6369 __func__);
6370 ret = -EINVAL;
6371 goto err;
6372 }
6373 if (soc_find_component(wsa_of_node, NULL)) {
6374 /* WSA device registered with ALSA core */
6375 wsa881x_dev_info[found].of_node = wsa_of_node;
6376 wsa881x_dev_info[found].index = i;
6377 found++;
6378 if (found == wsa_max_devs)
6379 break;
6380 }
6381 }
6382
6383 if (found < wsa_max_devs) {
6384 dev_dbg(&pdev->dev,
6385 "%s: failed to find %d components. Found only %d\n",
6386 __func__, wsa_max_devs, found);
6387 return -EPROBE_DEFER;
6388 }
6389 dev_info(&pdev->dev,
6390 "%s: found %d wsa881x devices registered with ALSA core\n",
6391 __func__, found);
6392
6393codec_aux_dev:
6394 /* Get maximum aux codec device count for this platform */
6395 ret = of_property_read_u32(pdev->dev.of_node,
6396 "qcom,codec-max-aux-devs",
6397 &codec_max_aux_devs);
6398 if (ret) {
6399 dev_err(&pdev->dev,
6400 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
6401 __func__, pdev->dev.of_node->full_name, ret);
6402 codec_max_aux_devs = 0;
6403 goto aux_dev_register;
6404 }
6405 if (codec_max_aux_devs == 0) {
6406 dev_dbg(&pdev->dev,
6407 "%s: Max aux codec devices is 0 for this target?\n",
6408 __func__);
6409 goto aux_dev_register;
6410 }
6411
6412 /* Get count of aux codec device phandles for this platform */
6413 codec_aux_dev_cnt = of_count_phandle_with_args(
6414 pdev->dev.of_node,
6415 "qcom,codec-aux-devs", NULL);
6416 if (codec_aux_dev_cnt == -ENOENT) {
6417 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6418 __func__);
6419 goto err;
6420 } else if (codec_aux_dev_cnt <= 0) {
6421 dev_err(&pdev->dev,
6422 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6423 __func__, codec_aux_dev_cnt);
6424 ret = -EINVAL;
6425 goto err;
6426 }
6427
6428 /*
6429 * Expect total phandles count to be NOT less than maximum possible
6430 * AUX device count. However, if it is less, then assign same value to
6431 * max count as well.
6432 */
6433 if (codec_aux_dev_cnt < codec_max_aux_devs) {
6434 dev_dbg(&pdev->dev,
6435 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
6436 __func__, codec_max_aux_devs,
6437 codec_aux_dev_cnt);
6438 codec_max_aux_devs = codec_aux_dev_cnt;
6439 }
6440
6441 /*
6442 * Alloc mem to store phandle and index info of aux codec
6443 * if already registered with ALSA core
6444 */
6445 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6446 sizeof(struct aux_codec_dev_info),
6447 GFP_KERNEL);
6448 if (!aux_cdc_dev_info) {
6449 ret = -ENOMEM;
6450 goto err;
6451 }
6452
6453 /*
6454 * search and check whether all aux codecs are already
6455 * registered with ALSA core or not. If found a node, store
6456 * the node and the index in a local array of struct for later
6457 * use.
6458 */
6459 for (i = 0; i < codec_aux_dev_cnt; i++) {
6460 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6461 "qcom,codec-aux-devs", i);
6462 if (unlikely(!aux_codec_of_node)) {
6463 /* we should not be here */
6464 dev_err(&pdev->dev,
6465 "%s: aux codec dev node is not present\n",
6466 __func__);
6467 ret = -EINVAL;
6468 goto err;
6469 }
6470 if (soc_find_component(aux_codec_of_node, NULL)) {
6471 /* AUX codec registered with ALSA core */
6472 aux_cdc_dev_info[codecs_found].of_node =
6473 aux_codec_of_node;
6474 aux_cdc_dev_info[codecs_found].index = i;
6475 codecs_found++;
6476 }
6477 }
6478
6479 if (codecs_found < codec_aux_dev_cnt) {
6480 dev_dbg(&pdev->dev,
6481 "%s: failed to find %d components. Found only %d\n",
6482 __func__, codec_aux_dev_cnt, codecs_found);
6483 return -EPROBE_DEFER;
6484 }
6485 dev_info(&pdev->dev,
6486 "%s: found %d AUX codecs registered with ALSA core\n",
6487 __func__, codecs_found);
6488
6489aux_dev_register:
6490 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6491 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6492
6493 /* Alloc array of AUX devs struct */
6494 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6495 sizeof(struct snd_soc_aux_dev),
6496 GFP_KERNEL);
6497 if (!msm_aux_dev) {
6498 ret = -ENOMEM;
6499 goto err;
6500 }
6501
6502 /* Alloc array of codec conf struct */
6503 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6504 sizeof(struct snd_soc_codec_conf),
6505 GFP_KERNEL);
6506 if (!msm_codec_conf) {
6507 ret = -ENOMEM;
6508 goto err;
6509 }
6510
6511 for (i = 0; i < wsa_max_devs; i++) {
6512 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6513 GFP_KERNEL);
6514 if (!dev_name_str) {
6515 ret = -ENOMEM;
6516 goto err;
6517 }
6518
6519 ret = of_property_read_string_index(pdev->dev.of_node,
6520 "qcom,wsa-aux-dev-prefix",
6521 wsa881x_dev_info[i].index,
6522 auxdev_name_prefix);
6523 if (ret) {
6524 dev_err(&pdev->dev,
6525 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6526 __func__, ret);
6527 ret = -EINVAL;
6528 goto err;
6529 }
6530
6531 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6532 msm_aux_dev[i].name = dev_name_str;
6533 msm_aux_dev[i].codec_name = NULL;
6534 msm_aux_dev[i].codec_of_node =
6535 wsa881x_dev_info[i].of_node;
6536 msm_aux_dev[i].init = NULL;
6537 msm_codec_conf[i].dev_name = NULL;
6538 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6539 msm_codec_conf[i].of_node =
6540 wsa881x_dev_info[i].of_node;
6541 }
6542
6543 for (i = 0; i < codec_aux_dev_cnt; i++) {
6544 msm_aux_dev[wsa_max_devs + i].name = NULL;
6545 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6546 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6547 aux_cdc_dev_info[i].of_node;
6548 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6549 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6550 msm_codec_conf[wsa_max_devs + i].name_prefix =
6551 NULL;
6552 msm_codec_conf[wsa_max_devs + i].of_node =
6553 aux_cdc_dev_info[i].of_node;
6554 }
6555
6556 card->codec_conf = msm_codec_conf;
6557 card->aux_dev = msm_aux_dev;
6558err:
6559 return ret;
6560}
6561
6562static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6563{
6564 int count = 0;
6565 u32 mi2s_master_slave[MI2S_MAX];
6566 int ret = 0;
6567
6568 for (count = 0; count < MI2S_MAX; count++) {
6569 mutex_init(&mi2s_intf_conf[count].lock);
6570 mi2s_intf_conf[count].ref_cnt = 0;
6571 }
6572
6573 ret = of_property_read_u32_array(pdev->dev.of_node,
6574 "qcom,msm-mi2s-master",
6575 mi2s_master_slave, MI2S_MAX);
6576 if (ret) {
6577 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6578 __func__);
6579 } else {
6580 for (count = 0; count < MI2S_MAX; count++) {
6581 mi2s_intf_conf[count].msm_is_mi2s_master =
6582 mi2s_master_slave[count];
6583 }
6584 }
6585}
6586
6587static void msm_i2s_auxpcm_deinit(void)
6588{
6589 int count = 0;
6590
6591 for (count = 0; count < MI2S_MAX; count++) {
6592 mutex_destroy(&mi2s_intf_conf[count].lock);
6593 mi2s_intf_conf[count].ref_cnt = 0;
6594 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6595 }
6596}
6597
6598static int bengal_ssr_enable(struct device *dev, void *data)
6599{
6600 struct platform_device *pdev = to_platform_device(dev);
6601 struct snd_soc_card *card = platform_get_drvdata(pdev);
6602 int ret = 0;
6603
6604 if (!card) {
6605 dev_err(dev, "%s: card is NULL\n", __func__);
6606 ret = -EINVAL;
6607 goto err;
6608 }
6609
6610 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6611 /* TODO */
6612 dev_dbg(dev, "%s: TODO\n", __func__);
6613 }
6614
6615 snd_soc_card_change_online_state(card, 1);
6616 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6617
6618err:
6619 return ret;
6620}
6621
6622static void bengal_ssr_disable(struct device *dev, void *data)
6623{
6624 struct platform_device *pdev = to_platform_device(dev);
6625 struct snd_soc_card *card = platform_get_drvdata(pdev);
6626
6627 if (!card) {
6628 dev_err(dev, "%s: card is NULL\n", __func__);
6629 return;
6630 }
6631
6632 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6633 snd_soc_card_change_online_state(card, 0);
6634
6635 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6636 /* TODO */
6637 dev_dbg(dev, "%s: TODO\n", __func__);
6638 }
6639}
6640
6641static const struct snd_event_ops bengal_ssr_ops = {
6642 .enable = bengal_ssr_enable,
6643 .disable = bengal_ssr_disable,
6644};
6645
6646static int msm_audio_ssr_compare(struct device *dev, void *data)
6647{
6648 struct device_node *node = data;
6649
6650 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6651 __func__, dev->of_node, node);
6652 return (dev->of_node && dev->of_node == node);
6653}
6654
6655static int msm_audio_ssr_register(struct device *dev)
6656{
6657 struct device_node *np = dev->of_node;
6658 struct snd_event_clients *ssr_clients = NULL;
6659 struct device_node *node = NULL;
6660 int ret = 0;
6661 int i = 0;
6662
6663 for (i = 0; ; i++) {
6664 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6665 if (!node)
6666 break;
6667 snd_event_mstr_add_client(&ssr_clients,
6668 msm_audio_ssr_compare, node);
6669 }
6670
6671 ret = snd_event_master_register(dev, &bengal_ssr_ops,
6672 ssr_clients, NULL);
6673 if (!ret)
6674 snd_event_notify(dev, SND_EVENT_UP);
6675
6676 return ret;
6677}
6678
6679static int msm_asoc_machine_probe(struct platform_device *pdev)
6680{
6681 struct snd_soc_card *card = NULL;
6682 struct msm_asoc_mach_data *pdata = NULL;
6683 const char *mbhc_audio_jack_type = NULL;
6684 int ret = 0;
6685 uint index = 0;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6686 struct nvmem_cell *cell;
6687 size_t len;
6688 u32 *buf;
6689 u32 adsp_var_idx = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6690
6691 if (!pdev->dev.of_node) {
6692 dev_err(&pdev->dev,
6693 "%s: No platform supplied from device tree\n",
6694 __func__);
6695 return -EINVAL;
6696 }
6697
6698 pdata = devm_kzalloc(&pdev->dev,
6699 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6700 if (!pdata)
6701 return -ENOMEM;
6702
6703 card = populate_snd_card_dailinks(&pdev->dev);
6704 if (!card) {
6705 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6706 ret = -EINVAL;
6707 goto err;
6708 }
6709
6710 card->dev = &pdev->dev;
6711 platform_set_drvdata(pdev, card);
6712 snd_soc_card_set_drvdata(card, pdata);
6713
6714 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6715 if (ret) {
6716 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6717 __func__, ret);
6718 goto err;
6719 }
6720
6721 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6722 if (ret) {
6723 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6724 __func__, ret);
6725 goto err;
6726 }
6727
6728 ret = msm_populate_dai_link_component_of_node(card);
6729 if (ret) {
6730 ret = -EPROBE_DEFER;
6731 goto err;
6732 }
6733
6734 ret = msm_init_aux_dev(pdev, card);
6735 if (ret)
6736 goto err;
6737
6738 ret = devm_snd_soc_register_card(&pdev->dev, card);
6739 if (ret == -EPROBE_DEFER) {
6740 if (codec_reg_done)
6741 ret = -EINVAL;
6742 goto err;
6743 } else if (ret) {
6744 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6745 __func__, ret);
6746 goto err;
6747 }
6748 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6749 __func__, card->name);
6750
6751 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6752 "qcom,hph-en1-gpio", 0);
6753 if (!pdata->hph_en1_gpio_p) {
6754 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6755 __func__, "qcom,hph-en1-gpio",
6756 pdev->dev.of_node->full_name);
6757 }
6758
6759 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6760 "qcom,hph-en0-gpio", 0);
6761 if (!pdata->hph_en0_gpio_p) {
6762 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6763 __func__, "qcom,hph-en0-gpio",
6764 pdev->dev.of_node->full_name);
6765 }
6766
6767 ret = of_property_read_string(pdev->dev.of_node,
6768 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6769 if (ret) {
6770 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6771 __func__, "qcom,mbhc-audio-jack-type",
6772 pdev->dev.of_node->full_name);
6773 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6774 } else {
6775 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6776 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6777 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6778 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6779 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6780 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6781 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6782 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6783 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6784 } else {
6785 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6786 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6787 }
6788 }
6789 /*
6790 * Parse US-Euro gpio info from DT. Report no error if us-euro
6791 * entry is not found in DT file as some targets do not support
6792 * US-Euro detection
6793 */
6794 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6795 "qcom,us-euro-gpios", 0);
6796 if (!pdata->us_euro_gpio_p) {
6797 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6798 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6799 } else {
6800 dev_dbg(&pdev->dev, "%s detected\n",
6801 "qcom,us-euro-gpios");
6802 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6803 }
6804
6805 if (wcd_mbhc_cfg.enable_usbc_analog)
6806 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6807
6808 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6809 "fsa4480-i2c-handle", 0);
6810 if (!pdata->fsa_handle)
6811 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6812 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6813
6814 msm_i2s_auxpcm_init(pdev);
6815 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6816 "qcom,cdc-dmic01-gpios",
6817 0);
6818 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6819 "qcom,cdc-dmic23-gpios",
6820 0);
6821
6822 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
6823 "qcom,pri-mi2s-gpios", 0);
6824 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
6825 "qcom,sec-mi2s-gpios", 0);
6826 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6827 "qcom,tert-mi2s-gpios", 0);
6828 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6829 "qcom,quat-mi2s-gpios", 0);
6830 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
6831 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
6832
6833 ret = msm_audio_ssr_register(&pdev->dev);
6834 if (ret)
6835 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
6836 __func__, ret);
6837
6838 is_initial_boot = true;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6839 /* get adsp variant idx */
6840 cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
6841 if (IS_ERR_OR_NULL(cell)) {
6842 dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
6843 goto ret;
6844 }
6845 buf = nvmem_cell_read(cell, &len);
6846 nvmem_cell_put(cell);
6847 if (IS_ERR_OR_NULL(buf) || len <= 0 || len > sizeof(32)) {
6848 dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
6849 goto ret;
6850 }
6851 memcpy(&adsp_var_idx, buf, len);
6852 kfree(buf);
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]6853 pdata->va_disable = adsp_var_idx;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6854
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6855ret:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6856 return 0;
6857err:
6858 devm_kfree(&pdev->dev, pdata);
6859 return ret;
6860}
6861
6862static int msm_asoc_machine_remove(struct platform_device *pdev)
6863{
6864 struct snd_soc_card *card = platform_get_drvdata(pdev);
6865
6866 snd_event_master_deregister(&pdev->dev);
6867 snd_soc_unregister_card(card);
6868 msm_i2s_auxpcm_deinit();
6869
6870 return 0;
6871}
6872
6873static struct platform_driver bengal_asoc_machine_driver = {
6874 .driver = {
6875 .name = DRV_NAME,
6876 .owner = THIS_MODULE,
6877 .pm = &snd_soc_pm_ops,
6878 .of_match_table = bengal_asoc_machine_of_match,
6879 .suppress_bind_attrs = true,
6880 },
6881 .probe = msm_asoc_machine_probe,
6882 .remove = msm_asoc_machine_remove,
6883};
6884module_platform_driver(bengal_asoc_machine_driver);
6885
6886MODULE_DESCRIPTION("ALSA SoC msm");
6887MODULE_LICENSE("GPL v2");
6888MODULE_ALIAS("platform:" DRV_NAME);
6889MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);