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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 9a3d5ebc7ca7350b60947e649d98fe870005dab9 / . / asoc / sm6150.c
blob: 467fba7d17eeebd0c75da237487df15a992489a1 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]31#include <soc/snd_event.h>
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]39#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]40#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]43#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]44#include "codecs/wcd937x/internal.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]45
46#define DRV_NAME "sm6150-asoc-snd"
47
48#define __CHIPSET__ "SM6150 "
49#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
50
51#define SAMPLING_RATE_8KHZ 8000
52#define SAMPLING_RATE_11P025KHZ 11025
53#define SAMPLING_RATE_16KHZ 16000
54#define SAMPLING_RATE_22P05KHZ 22050
55#define SAMPLING_RATE_32KHZ 32000
56#define SAMPLING_RATE_44P1KHZ 44100
57#define SAMPLING_RATE_48KHZ 48000
58#define SAMPLING_RATE_88P2KHZ 88200
59#define SAMPLING_RATE_96KHZ 96000
60#define SAMPLING_RATE_176P4KHZ 176400
61#define SAMPLING_RATE_192KHZ 192000
62#define SAMPLING_RATE_352P8KHZ 352800
63#define SAMPLING_RATE_384KHZ 384000
64
65#define WCD9XXX_MBHC_DEF_BUTTONS 8
66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define CODEC_EXT_CLK_RATE 9600000
68#define ADSP_STATE_READY_TIMEOUT_MS 3000
69#define DEV_NAME_STR_LEN 32
70
71#define WSA8810_NAME_1 "wsa881x.20170211"
72#define WSA8810_NAME_2 "wsa881x.20170212"
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75#define TDM_CHANNEL_MAX 8
76
77#define ADSP_STATE_READY_TIMEOUT_MS 3000
78#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
79#define MSM_HIFI_ON 1
80
81enum {
82 SLIM_RX_0 = 0,
83 SLIM_RX_1,
84 SLIM_RX_2,
85 SLIM_RX_3,
86 SLIM_RX_4,
87 SLIM_RX_5,
88 SLIM_RX_6,
89 SLIM_RX_7,
90 SLIM_RX_MAX,
91};
92enum {
93 SLIM_TX_0 = 0,
94 SLIM_TX_1,
95 SLIM_TX_2,
96 SLIM_TX_3,
97 SLIM_TX_4,
98 SLIM_TX_5,
99 SLIM_TX_6,
100 SLIM_TX_7,
101 SLIM_TX_8,
102 SLIM_TX_MAX,
103};
104
105enum {
106 PRIM_MI2S = 0,
107 SEC_MI2S,
108 TERT_MI2S,
109 QUAT_MI2S,
110 QUIN_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 PRIM_AUX_PCM = 0,
116 SEC_AUX_PCM,
117 TERT_AUX_PCM,
118 QUAT_AUX_PCM,
119 QUIN_AUX_PCM,
120 AUX_PCM_MAX,
121};
122
123enum {
124 WSA_CDC_DMA_RX_0 = 0,
125 WSA_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_0,
127 RX_CDC_DMA_RX_1,
128 RX_CDC_DMA_RX_2,
129 RX_CDC_DMA_RX_3,
130 RX_CDC_DMA_RX_5,
131 CDC_DMA_RX_MAX,
132};
133
134enum {
135 WSA_CDC_DMA_TX_0 = 0,
136 WSA_CDC_DMA_TX_1,
137 WSA_CDC_DMA_TX_2,
138 TX_CDC_DMA_TX_0,
139 TX_CDC_DMA_TX_3,
140 TX_CDC_DMA_TX_4,
141 CDC_DMA_TX_MAX,
142};
143
144struct mi2s_conf {
145 struct mutex lock;
146 u32 ref_cnt;
147 u32 msm_is_mi2s_master;
148};
149
150static u32 mi2s_ebit_clk[MI2S_MAX] = {
151 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
156};
157
158struct dev_config {
159 u32 sample_rate;
160 u32 bit_format;
161 u32 channels;
162};
163
164enum {
165 DP_RX_IDX = 0,
166 EXT_DISP_RX_IDX_MAX,
167};
168
169struct msm_wsa881x_dev_info {
170 struct device_node *of_node;
171 u32 index;
172};
173
174struct aux_codec_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179enum pinctrl_pin_state {
180 STATE_DISABLE = 0, /* All pins are in sleep state */
181 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
182 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
183};
184
185struct msm_pinctrl_info {
186 struct pinctrl *pinctrl;
187 struct pinctrl_state *mi2s_disable;
188 struct pinctrl_state *tdm_disable;
189 struct pinctrl_state *mi2s_active;
190 struct pinctrl_state *tdm_active;
191 enum pinctrl_pin_state curr_state;
192};
193
194struct msm_asoc_mach_data {
195 struct snd_info_entry *codec_root;
196 struct msm_pinctrl_info pinctrl_info;
197 int usbc_en2_gpio; /* used by gpio driver API */
198 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
199 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
200 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
201 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]204 bool is_afe_config_done;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]205};
206
207struct msm_asoc_wcd93xx_codec {
208 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
209 enum afe_config_type config_type);
210};
211
212static const char *const pin_states[] = {"sleep", "i2s-active",
213 "tdm-active"};
214
215static struct snd_soc_card snd_soc_card_sm6150_msm;
216
217enum {
218 TDM_0 = 0,
219 TDM_1,
220 TDM_2,
221 TDM_3,
222 TDM_4,
223 TDM_5,
224 TDM_6,
225 TDM_7,
226 TDM_PORT_MAX,
227};
228
229enum {
230 TDM_PRI = 0,
231 TDM_SEC,
232 TDM_TERT,
233 TDM_QUAT,
234 TDM_QUIN,
235 TDM_INTERFACE_MAX,
236};
237
238struct tdm_port {
239 u32 mode;
240 u32 channel;
241};
242
243/* TDM default config */
244static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
245 { /* PRI TDM */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
253 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
254 },
255 { /* SEC TDM */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
263 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
264 },
265 { /* TERT TDM */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
274 },
275 { /* QUAT TDM */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
284 },
285 { /* QUIN TDM */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
294 }
295
296};
297
298/* TDM default config */
299static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
300 { /* PRI TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
309 },
310 { /* SEC TDM */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
319 },
320 { /* TERT TDM */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
329 },
330 { /* QUAT TDM */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
339 },
340 { /* QUIN TDM */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
349 }
350};
351
352
353/* Default configuration of slimbus channels */
354static struct dev_config slim_rx_cfg[] = {
355 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
363};
364
365static struct dev_config slim_tx_cfg[] = {
366 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
374 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375};
376
377/* Default configuration of Codec DMA Interface Tx */
378static struct dev_config cdc_dma_rx_cfg[] = {
379 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
386};
387
388/* Default configuration of Codec DMA Interface Rx */
389static struct dev_config cdc_dma_tx_cfg[] = {
390 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
396};
397
398/* Default configuration of external display BE */
399static struct dev_config ext_disp_rx_cfg[] = {
400 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
401};
402
403static struct dev_config usb_rx_cfg = {
404 .sample_rate = SAMPLING_RATE_48KHZ,
405 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
406 .channels = 2,
407};
408
409static struct dev_config usb_tx_cfg = {
410 .sample_rate = SAMPLING_RATE_48KHZ,
411 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
412 .channels = 1,
413};
414
415static struct dev_config proxy_rx_cfg = {
416 .sample_rate = SAMPLING_RATE_48KHZ,
417 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
418 .channels = 2,
419};
420
421/* Default configuration of MI2S channels */
422static struct dev_config mi2s_rx_cfg[] = {
423 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
428};
429
430static struct dev_config mi2s_tx_cfg[] = {
431 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
436};
437
438static struct dev_config aux_pcm_rx_cfg[] = {
439 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
444};
445
446static struct dev_config aux_pcm_tx_cfg[] = {
447 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
452};
453static int msm_vi_feed_tx_ch = 2;
454static const char *const slim_rx_ch_text[] = {"One", "Two"};
455static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
456 "Five", "Six", "Seven",
457 "Eight"};
458static const char *const vi_feed_ch_text[] = {"One", "Two"};
459static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
460 "S32_LE"};
461static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
462 "S24_3LE"};
463static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
464 "KHZ_32", "KHZ_44P1", "KHZ_48",
465 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
466 "KHZ_192", "KHZ_352P8", "KHZ_384"};
467static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
468 "KHZ_44P1", "KHZ_48",
469 "KHZ_88P2", "KHZ_96"};
470static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
471 "Five", "Six", "Seven",
472 "Eight"};
473static char const *ch_text[] = {"Two", "Three", "Four", "Five",
474 "Six", "Seven", "Eight"};
475static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
476 "KHZ_16", "KHZ_22P05",
477 "KHZ_32", "KHZ_44P1", "KHZ_48",
478 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
479 "KHZ_192", "KHZ_352P8", "KHZ_384"};
480static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
481 "KHZ_192", "KHZ_32", "KHZ_44P1",
482 "KHZ_88P2", "KHZ_176P4" };
483static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
484 "Five", "Six", "Seven", "Eight"};
485static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
486static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
487 "KHZ_48", "KHZ_176P4",
488 "KHZ_352P8"};
489static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
490static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
491 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
492 "KHZ_48", "KHZ_96", "KHZ_192"};
493static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
494 "Five", "Six", "Seven",
495 "Eight"};
496static const char *const hifi_text[] = {"Off", "On"};
497static const char *const qos_text[] = {"Disable", "Enable"};
498
499static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
500static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
501 "Five", "Six", "Seven",
502 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]503static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
504 "KHZ_16", "KHZ_22P05",
505 "KHZ_32", "KHZ_44P1", "KHZ_48",
506 "KHZ_88P2", "KHZ_96",
507 "KHZ_176P4", "KHZ_192",
508 "KHZ_352P8", "KHZ_384"};
509
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]510
511static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
537static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
538 ext_disp_sample_rate_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
543static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
544static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
565static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
575static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
577static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
578static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
579static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
605static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
606 cdc_dma_sample_rate_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
608 cdc_dma_sample_rate_text);
609static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
610 cdc_dma_sample_rate_text);
611static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
612 cdc_dma_sample_rate_text);
613static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
614 cdc_dma_sample_rate_text);
615static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
616 cdc_dma_sample_rate_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
618 cdc_dma_sample_rate_text);
619static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
620 cdc_dma_sample_rate_text);
621static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
622 cdc_dma_sample_rate_text);
623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
624 cdc_dma_sample_rate_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
626 cdc_dma_sample_rate_text);
627static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
628 cdc_dma_sample_rate_text);
629static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
630 cdc_dma_sample_rate_text);
631
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]632static int msm_hifi_control;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]633static bool codec_reg_done;
634static struct snd_soc_aux_dev *msm_aux_dev;
635static struct snd_soc_codec_conf *msm_codec_conf;
636static struct msm_asoc_wcd93xx_codec msm_codec_fn;
637
638static int dmic_0_1_gpio_cnt;
639static int dmic_2_3_gpio_cnt;
640
641static void *def_wcd_mbhc_cal(void);
642static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
643 int enable, bool dapm);
644static int msm_wsa881x_init(struct snd_soc_component *component);
645static int msm_aux_codec_init(struct snd_soc_component *component);
646
647/*
648 * Need to report LINEIN
649 * if R/L channel impedance is larger than 5K ohm
650 */
651static struct wcd_mbhc_config wcd_mbhc_cfg = {
652 .read_fw_bin = false,
653 .calibration = NULL,
654 .detect_extn_cable = true,
655 .mono_stero_detection = false,
656 .swap_gnd_mic = NULL,
657 .hs_ext_micbias = true,
658 .key_code[0] = KEY_MEDIA,
659 .key_code[1] = KEY_VOICECOMMAND,
660 .key_code[2] = KEY_VOLUMEUP,
661 .key_code[3] = KEY_VOLUMEDOWN,
662 .key_code[4] = 0,
663 .key_code[5] = 0,
664 .key_code[6] = 0,
665 .key_code[7] = 0,
666 .linein_th = 5000,
667 .moisture_en = true,
668 .mbhc_micbias = MIC_BIAS_2,
669 .anc_micbias = MIC_BIAS_2,
670 .enable_anc_mic_detect = false,
671};
672
673static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
674 {"MIC BIAS1", NULL, "MCLK TX"},
675 {"MIC BIAS2", NULL, "MCLK TX"},
676 {"MIC BIAS3", NULL, "MCLK TX"},
677 {"MIC BIAS4", NULL, "MCLK TX"},
678};
679
680static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
681 {
682 AFE_API_VERSION_I2S_CONFIG,
683 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
684 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
685 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
686 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
687 0,
688 },
689 {
690 AFE_API_VERSION_I2S_CONFIG,
691 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
692 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
693 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
694 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
695 0,
696 },
697 {
698 AFE_API_VERSION_I2S_CONFIG,
699 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
700 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
701 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
702 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
703 0,
704 },
705 {
706 AFE_API_VERSION_I2S_CONFIG,
707 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
708 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
709 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
710 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
711 0,
712 },
713 {
714 AFE_API_VERSION_I2S_CONFIG,
715 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
716 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
717 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
718 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
719 0,
720 }
721
722};
723
724static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
725
726static int slim_get_sample_rate_val(int sample_rate)
727{
728 int sample_rate_val = 0;
729
730 switch (sample_rate) {
731 case SAMPLING_RATE_8KHZ:
732 sample_rate_val = 0;
733 break;
734 case SAMPLING_RATE_16KHZ:
735 sample_rate_val = 1;
736 break;
737 case SAMPLING_RATE_32KHZ:
738 sample_rate_val = 2;
739 break;
740 case SAMPLING_RATE_44P1KHZ:
741 sample_rate_val = 3;
742 break;
743 case SAMPLING_RATE_48KHZ:
744 sample_rate_val = 4;
745 break;
746 case SAMPLING_RATE_88P2KHZ:
747 sample_rate_val = 5;
748 break;
749 case SAMPLING_RATE_96KHZ:
750 sample_rate_val = 6;
751 break;
752 case SAMPLING_RATE_176P4KHZ:
753 sample_rate_val = 7;
754 break;
755 case SAMPLING_RATE_192KHZ:
756 sample_rate_val = 8;
757 break;
758 case SAMPLING_RATE_352P8KHZ:
759 sample_rate_val = 9;
760 break;
761 case SAMPLING_RATE_384KHZ:
762 sample_rate_val = 10;
763 break;
764 default:
765 sample_rate_val = 4;
766 break;
767 }
768 return sample_rate_val;
769}
770
771static int slim_get_sample_rate(int value)
772{
773 int sample_rate = 0;
774
775 switch (value) {
776 case 0:
777 sample_rate = SAMPLING_RATE_8KHZ;
778 break;
779 case 1:
780 sample_rate = SAMPLING_RATE_16KHZ;
781 break;
782 case 2:
783 sample_rate = SAMPLING_RATE_32KHZ;
784 break;
785 case 3:
786 sample_rate = SAMPLING_RATE_44P1KHZ;
787 break;
788 case 4:
789 sample_rate = SAMPLING_RATE_48KHZ;
790 break;
791 case 5:
792 sample_rate = SAMPLING_RATE_88P2KHZ;
793 break;
794 case 6:
795 sample_rate = SAMPLING_RATE_96KHZ;
796 break;
797 case 7:
798 sample_rate = SAMPLING_RATE_176P4KHZ;
799 break;
800 case 8:
801 sample_rate = SAMPLING_RATE_192KHZ;
802 break;
803 case 9:
804 sample_rate = SAMPLING_RATE_352P8KHZ;
805 break;
806 case 10:
807 sample_rate = SAMPLING_RATE_384KHZ;
808 break;
809 default:
810 sample_rate = SAMPLING_RATE_48KHZ;
811 break;
812 }
813 return sample_rate;
814}
815
816static int slim_get_bit_format_val(int bit_format)
817{
818 int val = 0;
819
820 switch (bit_format) {
821 case SNDRV_PCM_FORMAT_S32_LE:
822 val = 3;
823 break;
824 case SNDRV_PCM_FORMAT_S24_3LE:
825 val = 2;
826 break;
827 case SNDRV_PCM_FORMAT_S24_LE:
828 val = 1;
829 break;
830 case SNDRV_PCM_FORMAT_S16_LE:
831 default:
832 val = 0;
833 break;
834 }
835 return val;
836}
837
838static int slim_get_bit_format(int val)
839{
840 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
841
842 switch (val) {
843 case 0:
844 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
845 break;
846 case 1:
847 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
848 break;
849 case 2:
850 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
851 break;
852 case 3:
853 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
854 break;
855 default:
856 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
857 break;
858 }
859 return bit_fmt;
860}
861
862static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
863{
864 int port_id = 0;
865
866 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
867 port_id = SLIM_RX_0;
868 } else if (strnstr(kcontrol->id.name,
869 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
870 port_id = SLIM_RX_2;
871 } else if (strnstr(kcontrol->id.name,
872 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
873 port_id = SLIM_RX_5;
874 } else if (strnstr(kcontrol->id.name,
875 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
876 port_id = SLIM_RX_6;
877 } else if (strnstr(kcontrol->id.name,
878 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
879 port_id = SLIM_TX_0;
880 } else if (strnstr(kcontrol->id.name,
881 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
882 port_id = SLIM_TX_1;
883 } else {
884 pr_err("%s: unsupported channel: %s\n",
885 __func__, kcontrol->id.name);
886 return -EINVAL;
887 }
888
889 return port_id;
890}
891
892static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
893 struct snd_ctl_elem_value *ucontrol)
894{
895 int ch_num = slim_get_port_idx(kcontrol);
896
897 if (ch_num < 0)
898 return ch_num;
899
900 ucontrol->value.enumerated.item[0] =
901 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
902
903 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
904 ch_num, slim_rx_cfg[ch_num].sample_rate,
905 ucontrol->value.enumerated.item[0]);
906
907 return 0;
908}
909
910static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
911 struct snd_ctl_elem_value *ucontrol)
912{
913 int ch_num = slim_get_port_idx(kcontrol);
914
915 if (ch_num < 0)
916 return ch_num;
917
918 slim_rx_cfg[ch_num].sample_rate =
919 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
920
921 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
922 ch_num, slim_rx_cfg[ch_num].sample_rate,
923 ucontrol->value.enumerated.item[0]);
924
925 return 0;
926}
927
928static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int ch_num = slim_get_port_idx(kcontrol);
932
933 if (ch_num < 0)
934 return ch_num;
935
936 ucontrol->value.enumerated.item[0] =
937 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
938
939 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
940 ch_num, slim_tx_cfg[ch_num].sample_rate,
941 ucontrol->value.enumerated.item[0]);
942
943 return 0;
944}
945
946static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
947 struct snd_ctl_elem_value *ucontrol)
948{
949 int sample_rate = 0;
950 int ch_num = slim_get_port_idx(kcontrol);
951
952 if (ch_num < 0)
953 return ch_num;
954
955 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
956 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
957 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
958 __func__, sample_rate);
959 return -EINVAL;
960 }
961 slim_tx_cfg[ch_num].sample_rate = sample_rate;
962
963 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
964 ch_num, slim_tx_cfg[ch_num].sample_rate,
965 ucontrol->value.enumerated.item[0]);
966
967 return 0;
968}
969
970static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
971 struct snd_ctl_elem_value *ucontrol)
972{
973 int ch_num = slim_get_port_idx(kcontrol);
974
975 if (ch_num < 0)
976 return ch_num;
977
978 ucontrol->value.enumerated.item[0] =
979 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
980
981 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
982 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
983 ucontrol->value.enumerated.item[0]);
984
985 return 0;
986}
987
988static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
989 struct snd_ctl_elem_value *ucontrol)
990{
991 int ch_num = slim_get_port_idx(kcontrol);
992
993 if (ch_num < 0)
994 return ch_num;
995
996 slim_rx_cfg[ch_num].bit_format =
997 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
998
999 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1000 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1001 ucontrol->value.enumerated.item[0]);
1002
1003 return 0;
1004}
1005
1006static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1007 struct snd_ctl_elem_value *ucontrol)
1008{
1009 int ch_num = slim_get_port_idx(kcontrol);
1010
1011 if (ch_num < 0)
1012 return ch_num;
1013
1014 ucontrol->value.enumerated.item[0] =
1015 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1016
1017 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1018 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1019 ucontrol->value.enumerated.item[0]);
1020
1021 return 0;
1022}
1023
1024static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1026{
1027 int ch_num = slim_get_port_idx(kcontrol);
1028
1029 if (ch_num < 0)
1030 return ch_num;
1031
1032 slim_tx_cfg[ch_num].bit_format =
1033 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1034
1035 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1036 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1037 ucontrol->value.enumerated.item[0]);
1038
1039 return 0;
1040}
1041
1042static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044{
1045 int ch_num = slim_get_port_idx(kcontrol);
1046
1047 if (ch_num < 0)
1048 return ch_num;
1049
1050 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1051 ch_num, slim_rx_cfg[ch_num].channels);
1052 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1053
1054 return 0;
1055}
1056
1057static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1058 struct snd_ctl_elem_value *ucontrol)
1059{
1060 int ch_num = slim_get_port_idx(kcontrol);
1061
1062 if (ch_num < 0)
1063 return ch_num;
1064
1065 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1066 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1067 ch_num, slim_rx_cfg[ch_num].channels);
1068
1069 return 1;
1070}
1071
1072static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 int ch_num = slim_get_port_idx(kcontrol);
1076
1077 if (ch_num < 0)
1078 return ch_num;
1079
1080 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1081 ch_num, slim_tx_cfg[ch_num].channels);
1082 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1083
1084 return 0;
1085}
1086
1087static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 int ch_num = slim_get_port_idx(kcontrol);
1091
1092 if (ch_num < 0)
1093 return ch_num;
1094
1095 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1096 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1097 ch_num, slim_tx_cfg[ch_num].channels);
1098
1099 return 1;
1100}
1101
1102static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1106 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1107 ucontrol->value.integer.value[0]);
1108 return 0;
1109}
1110
1111static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1112 struct snd_ctl_elem_value *ucontrol)
1113{
1114 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1115
1116 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1117 return 1;
1118}
1119
1120static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1121 struct snd_ctl_elem_value *ucontrol)
1122{
1123 /*
1124 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1125 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1126 * value.
1127 */
1128 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1129 case SAMPLING_RATE_96KHZ:
1130 ucontrol->value.integer.value[0] = 5;
1131 break;
1132 case SAMPLING_RATE_88P2KHZ:
1133 ucontrol->value.integer.value[0] = 4;
1134 break;
1135 case SAMPLING_RATE_48KHZ:
1136 ucontrol->value.integer.value[0] = 3;
1137 break;
1138 case SAMPLING_RATE_44P1KHZ:
1139 ucontrol->value.integer.value[0] = 2;
1140 break;
1141 case SAMPLING_RATE_16KHZ:
1142 ucontrol->value.integer.value[0] = 1;
1143 break;
1144 case SAMPLING_RATE_8KHZ:
1145 default:
1146 ucontrol->value.integer.value[0] = 0;
1147 break;
1148 }
1149 pr_debug("%s: sample rate = %d\n", __func__,
1150 slim_rx_cfg[SLIM_RX_7].sample_rate);
1151
1152 return 0;
1153}
1154
1155static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 switch (ucontrol->value.integer.value[0]) {
1159 case 1:
1160 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1161 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1162 break;
1163 case 2:
1164 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1165 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1166 break;
1167 case 3:
1168 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1169 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1170 break;
1171 case 4:
1172 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1173 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1174 break;
1175 case 5:
1176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1177 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1178 break;
1179 case 0:
1180 default:
1181 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1182 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1183 break;
1184 }
1185 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1186 __func__,
1187 slim_rx_cfg[SLIM_RX_7].sample_rate,
1188 slim_tx_cfg[SLIM_TX_7].sample_rate,
1189 ucontrol->value.enumerated.item[0]);
1190
1191 return 0;
1192}
1193
1194static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1195{
1196 int idx = 0;
1197
1198 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1199 sizeof("WSA_CDC_DMA_RX_0")))
1200 idx = WSA_CDC_DMA_RX_0;
1201 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1202 sizeof("WSA_CDC_DMA_RX_0")))
1203 idx = WSA_CDC_DMA_RX_1;
1204 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1205 sizeof("RX_CDC_DMA_RX_0")))
1206 idx = RX_CDC_DMA_RX_0;
1207 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1208 sizeof("RX_CDC_DMA_RX_1")))
1209 idx = RX_CDC_DMA_RX_1;
1210 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1211 sizeof("RX_CDC_DMA_RX_2")))
1212 idx = RX_CDC_DMA_RX_2;
1213 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1214 sizeof("RX_CDC_DMA_RX_3")))
1215 idx = RX_CDC_DMA_RX_3;
1216 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1217 sizeof("RX_CDC_DMA_RX_5")))
1218 idx = RX_CDC_DMA_RX_5;
1219 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1220 sizeof("WSA_CDC_DMA_TX_0")))
1221 idx = WSA_CDC_DMA_TX_0;
1222 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1223 sizeof("WSA_CDC_DMA_TX_1")))
1224 idx = WSA_CDC_DMA_TX_1;
1225 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1226 sizeof("WSA_CDC_DMA_TX_2")))
1227 idx = WSA_CDC_DMA_TX_2;
1228 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1229 sizeof("TX_CDC_DMA_TX_0")))
1230 idx = TX_CDC_DMA_TX_0;
1231 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1232 sizeof("TX_CDC_DMA_TX_3")))
1233 idx = TX_CDC_DMA_TX_3;
1234 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1235 sizeof("TX_CDC_DMA_TX_4")))
1236 idx = TX_CDC_DMA_TX_4;
1237 else {
1238 pr_err("%s: unsupported channel: %s\n",
1239 __func__, kcontrol->id.name);
1240 return -EINVAL;
1241 }
1242
1243 return idx;
1244}
1245
1246static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248{
1249 int ch_num = cdc_dma_get_port_idx(kcontrol);
1250
1251 if (ch_num < 0)
1252 return ch_num;
1253
1254 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1255 cdc_dma_rx_cfg[ch_num].channels - 1);
1256 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1257 return 0;
1258}
1259
1260static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1261 struct snd_ctl_elem_value *ucontrol)
1262{
1263 int ch_num = cdc_dma_get_port_idx(kcontrol);
1264
1265 if (ch_num < 0)
1266 return ch_num;
1267
1268 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1269
1270 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1271 cdc_dma_rx_cfg[ch_num].channels);
1272 return 1;
1273}
1274
1275static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1276 struct snd_ctl_elem_value *ucontrol)
1277{
1278 int ch_num = cdc_dma_get_port_idx(kcontrol);
1279
1280 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1281 case SNDRV_PCM_FORMAT_S32_LE:
1282 ucontrol->value.integer.value[0] = 3;
1283 break;
1284 case SNDRV_PCM_FORMAT_S24_3LE:
1285 ucontrol->value.integer.value[0] = 2;
1286 break;
1287 case SNDRV_PCM_FORMAT_S24_LE:
1288 ucontrol->value.integer.value[0] = 1;
1289 break;
1290 case SNDRV_PCM_FORMAT_S16_LE:
1291 default:
1292 ucontrol->value.integer.value[0] = 0;
1293 break;
1294 }
1295
1296 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1297 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1298 ucontrol->value.integer.value[0]);
1299 return 0;
1300}
1301
1302static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1303 struct snd_ctl_elem_value *ucontrol)
1304{
1305 int rc = 0;
1306 int ch_num = cdc_dma_get_port_idx(kcontrol);
1307
1308 switch (ucontrol->value.integer.value[0]) {
1309 case 3:
1310 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1311 break;
1312 case 2:
1313 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1314 break;
1315 case 1:
1316 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1317 break;
1318 case 0:
1319 default:
1320 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1321 break;
1322 }
1323 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1324 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1325 ucontrol->value.integer.value[0]);
1326
1327 return rc;
1328}
1329
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1330
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1331static int cdc_dma_get_sample_rate_val(int sample_rate)
1332{
1333 int sample_rate_val = 0;
1334
1335 switch (sample_rate) {
1336 case SAMPLING_RATE_8KHZ:
1337 sample_rate_val = 0;
1338 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1339 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1340 sample_rate_val = 1;
1341 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1342 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1343 sample_rate_val = 2;
1344 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1345 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1346 sample_rate_val = 3;
1347 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1348 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1349 sample_rate_val = 4;
1350 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1351 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1352 sample_rate_val = 5;
1353 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1354 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1355 sample_rate_val = 6;
1356 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1357 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1358 sample_rate_val = 7;
1359 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1360 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1361 sample_rate_val = 8;
1362 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1363 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1364 sample_rate_val = 9;
1365 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1366 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1367 sample_rate_val = 10;
1368 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1369 case SAMPLING_RATE_352P8KHZ:
1370 sample_rate_val = 11;
1371 break;
1372 case SAMPLING_RATE_384KHZ:
1373 sample_rate_val = 12;
1374 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1375 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1376 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1377 break;
1378 }
1379 return sample_rate_val;
1380}
1381
1382static int cdc_dma_get_sample_rate(int value)
1383{
1384 int sample_rate = 0;
1385
1386 switch (value) {
1387 case 0:
1388 sample_rate = SAMPLING_RATE_8KHZ;
1389 break;
1390 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1391 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1392 break;
1393 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1394 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1395 break;
1396 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1397 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1398 break;
1399 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1400 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1401 break;
1402 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1403 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1404 break;
1405 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1406 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1407 break;
1408 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1409 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1410 break;
1411 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1412 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1413 break;
1414 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1415 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1416 break;
1417 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]1418 sample_rate = SAMPLING_RATE_192KHZ;
1419 break;
1420 case 11:
1421 sample_rate = SAMPLING_RATE_352P8KHZ;
1422 break;
1423 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1424 sample_rate = SAMPLING_RATE_384KHZ;
1425 break;
1426 default:
1427 sample_rate = SAMPLING_RATE_48KHZ;
1428 break;
1429 }
1430 return sample_rate;
1431}
1432
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1433static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1434 struct snd_ctl_elem_value *ucontrol)
1435{
1436 int ch_num = cdc_dma_get_port_idx(kcontrol);
1437
1438 if (ch_num < 0)
1439 return ch_num;
1440
1441 ucontrol->value.enumerated.item[0] =
1442 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1443
1444 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1445 cdc_dma_rx_cfg[ch_num].sample_rate);
1446 return 0;
1447}
1448
1449static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1451{
1452 int ch_num = cdc_dma_get_port_idx(kcontrol);
1453
1454 if (ch_num < 0)
1455 return ch_num;
1456
1457 cdc_dma_rx_cfg[ch_num].sample_rate =
1458 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1459
1460
1461 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1462 __func__, ucontrol->value.enumerated.item[0],
1463 cdc_dma_rx_cfg[ch_num].sample_rate);
1464 return 0;
1465}
1466
1467static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1469{
1470 int ch_num = cdc_dma_get_port_idx(kcontrol);
1471
1472 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1473 cdc_dma_tx_cfg[ch_num].channels);
1474 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1475 return 0;
1476}
1477
1478static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1479 struct snd_ctl_elem_value *ucontrol)
1480{
1481 int ch_num = cdc_dma_get_port_idx(kcontrol);
1482
1483 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1484
1485 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1486 cdc_dma_tx_cfg[ch_num].channels);
1487 return 1;
1488}
1489
1490static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1491 struct snd_ctl_elem_value *ucontrol)
1492{
1493 int sample_rate_val;
1494 int ch_num = cdc_dma_get_port_idx(kcontrol);
1495
1496 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1497 case SAMPLING_RATE_384KHZ:
1498 sample_rate_val = 12;
1499 break;
1500 case SAMPLING_RATE_352P8KHZ:
1501 sample_rate_val = 11;
1502 break;
1503 case SAMPLING_RATE_192KHZ:
1504 sample_rate_val = 10;
1505 break;
1506 case SAMPLING_RATE_176P4KHZ:
1507 sample_rate_val = 9;
1508 break;
1509 case SAMPLING_RATE_96KHZ:
1510 sample_rate_val = 8;
1511 break;
1512 case SAMPLING_RATE_88P2KHZ:
1513 sample_rate_val = 7;
1514 break;
1515 case SAMPLING_RATE_48KHZ:
1516 sample_rate_val = 6;
1517 break;
1518 case SAMPLING_RATE_44P1KHZ:
1519 sample_rate_val = 5;
1520 break;
1521 case SAMPLING_RATE_32KHZ:
1522 sample_rate_val = 4;
1523 break;
1524 case SAMPLING_RATE_22P05KHZ:
1525 sample_rate_val = 3;
1526 break;
1527 case SAMPLING_RATE_16KHZ:
1528 sample_rate_val = 2;
1529 break;
1530 case SAMPLING_RATE_11P025KHZ:
1531 sample_rate_val = 1;
1532 break;
1533 case SAMPLING_RATE_8KHZ:
1534 sample_rate_val = 0;
1535 break;
1536 default:
1537 sample_rate_val = 6;
1538 break;
1539 }
1540
1541 ucontrol->value.integer.value[0] = sample_rate_val;
1542 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1543 cdc_dma_tx_cfg[ch_num].sample_rate);
1544 return 0;
1545}
1546
1547static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1548 struct snd_ctl_elem_value *ucontrol)
1549{
1550 int ch_num = cdc_dma_get_port_idx(kcontrol);
1551
1552 switch (ucontrol->value.integer.value[0]) {
1553 case 12:
1554 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1555 break;
1556 case 11:
1557 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1558 break;
1559 case 10:
1560 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1561 break;
1562 case 9:
1563 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1564 break;
1565 case 8:
1566 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1567 break;
1568 case 7:
1569 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1570 break;
1571 case 6:
1572 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1573 break;
1574 case 5:
1575 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1576 break;
1577 case 4:
1578 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1579 break;
1580 case 3:
1581 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1582 break;
1583 case 2:
1584 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1585 break;
1586 case 1:
1587 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1588 break;
1589 case 0:
1590 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1591 break;
1592 default:
1593 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1594 break;
1595 }
1596
1597 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1598 __func__, ucontrol->value.integer.value[0],
1599 cdc_dma_tx_cfg[ch_num].sample_rate);
1600 return 0;
1601}
1602
1603static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1604 struct snd_ctl_elem_value *ucontrol)
1605{
1606 int ch_num = cdc_dma_get_port_idx(kcontrol);
1607
1608 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1609 case SNDRV_PCM_FORMAT_S32_LE:
1610 ucontrol->value.integer.value[0] = 3;
1611 break;
1612 case SNDRV_PCM_FORMAT_S24_3LE:
1613 ucontrol->value.integer.value[0] = 2;
1614 break;
1615 case SNDRV_PCM_FORMAT_S24_LE:
1616 ucontrol->value.integer.value[0] = 1;
1617 break;
1618 case SNDRV_PCM_FORMAT_S16_LE:
1619 default:
1620 ucontrol->value.integer.value[0] = 0;
1621 break;
1622 }
1623
1624 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1625 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1626 ucontrol->value.integer.value[0]);
1627 return 0;
1628}
1629
1630static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1631 struct snd_ctl_elem_value *ucontrol)
1632{
1633 int rc = 0;
1634 int ch_num = cdc_dma_get_port_idx(kcontrol);
1635
1636 switch (ucontrol->value.integer.value[0]) {
1637 case 3:
1638 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1639 break;
1640 case 2:
1641 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1642 break;
1643 case 1:
1644 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1645 break;
1646 case 0:
1647 default:
1648 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1649 break;
1650 }
1651 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1652 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1653 ucontrol->value.integer.value[0]);
1654
1655 return rc;
1656}
1657
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]1658static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1659 struct snd_ctl_elem_value *ucontrol)
1660{
1661 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1662 usb_rx_cfg.channels);
1663 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1664 return 0;
1665}
1666
1667static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1668 struct snd_ctl_elem_value *ucontrol)
1669{
1670 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1671
1672 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1673 return 1;
1674}
1675
1676static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1677 struct snd_ctl_elem_value *ucontrol)
1678{
1679 int sample_rate_val;
1680
1681 switch (usb_rx_cfg.sample_rate) {
1682 case SAMPLING_RATE_384KHZ:
1683 sample_rate_val = 12;
1684 break;
1685 case SAMPLING_RATE_352P8KHZ:
1686 sample_rate_val = 11;
1687 break;
1688 case SAMPLING_RATE_192KHZ:
1689 sample_rate_val = 10;
1690 break;
1691 case SAMPLING_RATE_176P4KHZ:
1692 sample_rate_val = 9;
1693 break;
1694 case SAMPLING_RATE_96KHZ:
1695 sample_rate_val = 8;
1696 break;
1697 case SAMPLING_RATE_88P2KHZ:
1698 sample_rate_val = 7;
1699 break;
1700 case SAMPLING_RATE_48KHZ:
1701 sample_rate_val = 6;
1702 break;
1703 case SAMPLING_RATE_44P1KHZ:
1704 sample_rate_val = 5;
1705 break;
1706 case SAMPLING_RATE_32KHZ:
1707 sample_rate_val = 4;
1708 break;
1709 case SAMPLING_RATE_22P05KHZ:
1710 sample_rate_val = 3;
1711 break;
1712 case SAMPLING_RATE_16KHZ:
1713 sample_rate_val = 2;
1714 break;
1715 case SAMPLING_RATE_11P025KHZ:
1716 sample_rate_val = 1;
1717 break;
1718 case SAMPLING_RATE_8KHZ:
1719 default:
1720 sample_rate_val = 0;
1721 break;
1722 }
1723
1724 ucontrol->value.integer.value[0] = sample_rate_val;
1725 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1726 usb_rx_cfg.sample_rate);
1727 return 0;
1728}
1729
1730static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1731 struct snd_ctl_elem_value *ucontrol)
1732{
1733 switch (ucontrol->value.integer.value[0]) {
1734 case 12:
1735 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1736 break;
1737 case 11:
1738 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1739 break;
1740 case 10:
1741 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1742 break;
1743 case 9:
1744 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1745 break;
1746 case 8:
1747 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1748 break;
1749 case 7:
1750 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1751 break;
1752 case 6:
1753 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1754 break;
1755 case 5:
1756 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1757 break;
1758 case 4:
1759 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1760 break;
1761 case 3:
1762 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1763 break;
1764 case 2:
1765 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1766 break;
1767 case 1:
1768 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1769 break;
1770 case 0:
1771 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1772 break;
1773 default:
1774 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1775 break;
1776 }
1777
1778 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1779 __func__, ucontrol->value.integer.value[0],
1780 usb_rx_cfg.sample_rate);
1781 return 0;
1782}
1783
1784static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1785 struct snd_ctl_elem_value *ucontrol)
1786{
1787 switch (usb_rx_cfg.bit_format) {
1788 case SNDRV_PCM_FORMAT_S32_LE:
1789 ucontrol->value.integer.value[0] = 3;
1790 break;
1791 case SNDRV_PCM_FORMAT_S24_3LE:
1792 ucontrol->value.integer.value[0] = 2;
1793 break;
1794 case SNDRV_PCM_FORMAT_S24_LE:
1795 ucontrol->value.integer.value[0] = 1;
1796 break;
1797 case SNDRV_PCM_FORMAT_S16_LE:
1798 default:
1799 ucontrol->value.integer.value[0] = 0;
1800 break;
1801 }
1802
1803 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1804 __func__, usb_rx_cfg.bit_format,
1805 ucontrol->value.integer.value[0]);
1806 return 0;
1807}
1808
1809static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1810 struct snd_ctl_elem_value *ucontrol)
1811{
1812 int rc = 0;
1813
1814 switch (ucontrol->value.integer.value[0]) {
1815 case 3:
1816 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1817 break;
1818 case 2:
1819 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1820 break;
1821 case 1:
1822 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1823 break;
1824 case 0:
1825 default:
1826 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1827 break;
1828 }
1829 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1830 __func__, usb_rx_cfg.bit_format,
1831 ucontrol->value.integer.value[0]);
1832
1833 return rc;
1834}
1835
1836static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1837 struct snd_ctl_elem_value *ucontrol)
1838{
1839 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1840 usb_tx_cfg.channels);
1841 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1842 return 0;
1843}
1844
1845static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1846 struct snd_ctl_elem_value *ucontrol)
1847{
1848 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1849
1850 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1851 return 1;
1852}
1853
1854static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1855 struct snd_ctl_elem_value *ucontrol)
1856{
1857 int sample_rate_val;
1858
1859 switch (usb_tx_cfg.sample_rate) {
1860 case SAMPLING_RATE_384KHZ:
1861 sample_rate_val = 12;
1862 break;
1863 case SAMPLING_RATE_352P8KHZ:
1864 sample_rate_val = 11;
1865 break;
1866 case SAMPLING_RATE_192KHZ:
1867 sample_rate_val = 10;
1868 break;
1869 case SAMPLING_RATE_176P4KHZ:
1870 sample_rate_val = 9;
1871 break;
1872 case SAMPLING_RATE_96KHZ:
1873 sample_rate_val = 8;
1874 break;
1875 case SAMPLING_RATE_88P2KHZ:
1876 sample_rate_val = 7;
1877 break;
1878 case SAMPLING_RATE_48KHZ:
1879 sample_rate_val = 6;
1880 break;
1881 case SAMPLING_RATE_44P1KHZ:
1882 sample_rate_val = 5;
1883 break;
1884 case SAMPLING_RATE_32KHZ:
1885 sample_rate_val = 4;
1886 break;
1887 case SAMPLING_RATE_22P05KHZ:
1888 sample_rate_val = 3;
1889 break;
1890 case SAMPLING_RATE_16KHZ:
1891 sample_rate_val = 2;
1892 break;
1893 case SAMPLING_RATE_11P025KHZ:
1894 sample_rate_val = 1;
1895 break;
1896 case SAMPLING_RATE_8KHZ:
1897 sample_rate_val = 0;
1898 break;
1899 default:
1900 sample_rate_val = 6;
1901 break;
1902 }
1903
1904 ucontrol->value.integer.value[0] = sample_rate_val;
1905 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1906 usb_tx_cfg.sample_rate);
1907 return 0;
1908}
1909
1910static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1911 struct snd_ctl_elem_value *ucontrol)
1912{
1913 switch (ucontrol->value.integer.value[0]) {
1914 case 12:
1915 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1916 break;
1917 case 11:
1918 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1919 break;
1920 case 10:
1921 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1922 break;
1923 case 9:
1924 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1925 break;
1926 case 8:
1927 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1928 break;
1929 case 7:
1930 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1931 break;
1932 case 6:
1933 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1934 break;
1935 case 5:
1936 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1937 break;
1938 case 4:
1939 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1940 break;
1941 case 3:
1942 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1943 break;
1944 case 2:
1945 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1946 break;
1947 case 1:
1948 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1949 break;
1950 case 0:
1951 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1952 break;
1953 default:
1954 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1955 break;
1956 }
1957
1958 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1959 __func__, ucontrol->value.integer.value[0],
1960 usb_tx_cfg.sample_rate);
1961 return 0;
1962}
1963
1964static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1965 struct snd_ctl_elem_value *ucontrol)
1966{
1967 switch (usb_tx_cfg.bit_format) {
1968 case SNDRV_PCM_FORMAT_S32_LE:
1969 ucontrol->value.integer.value[0] = 3;
1970 break;
1971 case SNDRV_PCM_FORMAT_S24_3LE:
1972 ucontrol->value.integer.value[0] = 2;
1973 break;
1974 case SNDRV_PCM_FORMAT_S24_LE:
1975 ucontrol->value.integer.value[0] = 1;
1976 break;
1977 case SNDRV_PCM_FORMAT_S16_LE:
1978 default:
1979 ucontrol->value.integer.value[0] = 0;
1980 break;
1981 }
1982
1983 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1984 __func__, usb_tx_cfg.bit_format,
1985 ucontrol->value.integer.value[0]);
1986 return 0;
1987}
1988
1989static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1990 struct snd_ctl_elem_value *ucontrol)
1991{
1992 int rc = 0;
1993
1994 switch (ucontrol->value.integer.value[0]) {
1995 case 3:
1996 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1997 break;
1998 case 2:
1999 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2000 break;
2001 case 1:
2002 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2003 break;
2004 case 0:
2005 default:
2006 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2007 break;
2008 }
2009 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2010 __func__, usb_tx_cfg.bit_format,
2011 ucontrol->value.integer.value[0]);
2012
2013 return rc;
2014}
2015
2016static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2017{
2018 int idx;
2019
2020 if (strnstr(kcontrol->id.name, "Display Port RX",
2021 sizeof("Display Port RX"))) {
2022 idx = DP_RX_IDX;
2023 } else {
2024 pr_err("%s: unsupported BE: %s\n",
2025 __func__, kcontrol->id.name);
2026 idx = -EINVAL;
2027 }
2028
2029 return idx;
2030}
2031
2032static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2033 struct snd_ctl_elem_value *ucontrol)
2034{
2035 int idx = ext_disp_get_port_idx(kcontrol);
2036
2037 if (idx < 0)
2038 return idx;
2039
2040 switch (ext_disp_rx_cfg[idx].bit_format) {
2041 case SNDRV_PCM_FORMAT_S24_3LE:
2042 ucontrol->value.integer.value[0] = 2;
2043 break;
2044 case SNDRV_PCM_FORMAT_S24_LE:
2045 ucontrol->value.integer.value[0] = 1;
2046 break;
2047 case SNDRV_PCM_FORMAT_S16_LE:
2048 default:
2049 ucontrol->value.integer.value[0] = 0;
2050 break;
2051 }
2052
2053 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2054 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2055 ucontrol->value.integer.value[0]);
2056 return 0;
2057}
2058
2059static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061{
2062 int idx = ext_disp_get_port_idx(kcontrol);
2063
2064 if (idx < 0)
2065 return idx;
2066
2067 switch (ucontrol->value.integer.value[0]) {
2068 case 2:
2069 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2070 break;
2071 case 1:
2072 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2073 break;
2074 case 0:
2075 default:
2076 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2077 break;
2078 }
2079 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2080 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2081 ucontrol->value.integer.value[0]);
2082
2083 return 0;
2084}
2085
2086static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2087 struct snd_ctl_elem_value *ucontrol)
2088{
2089 int idx = ext_disp_get_port_idx(kcontrol);
2090
2091 if (idx < 0)
2092 return idx;
2093
2094 ucontrol->value.integer.value[0] =
2095 ext_disp_rx_cfg[idx].channels - 2;
2096
2097 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2098 idx, ext_disp_rx_cfg[idx].channels);
2099
2100 return 0;
2101}
2102
2103static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2104 struct snd_ctl_elem_value *ucontrol)
2105{
2106 int idx = ext_disp_get_port_idx(kcontrol);
2107
2108 if (idx < 0)
2109 return idx;
2110
2111 ext_disp_rx_cfg[idx].channels =
2112 ucontrol->value.integer.value[0] + 2;
2113
2114 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2115 idx, ext_disp_rx_cfg[idx].channels);
2116 return 1;
2117}
2118
2119static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2120 struct snd_ctl_elem_value *ucontrol)
2121{
2122 int sample_rate_val;
2123 int idx = ext_disp_get_port_idx(kcontrol);
2124
2125 if (idx < 0)
2126 return idx;
2127
2128 switch (ext_disp_rx_cfg[idx].sample_rate) {
2129 case SAMPLING_RATE_176P4KHZ:
2130 sample_rate_val = 6;
2131 break;
2132
2133 case SAMPLING_RATE_88P2KHZ:
2134 sample_rate_val = 5;
2135 break;
2136
2137 case SAMPLING_RATE_44P1KHZ:
2138 sample_rate_val = 4;
2139 break;
2140
2141 case SAMPLING_RATE_32KHZ:
2142 sample_rate_val = 3;
2143 break;
2144
2145 case SAMPLING_RATE_192KHZ:
2146 sample_rate_val = 2;
2147 break;
2148
2149 case SAMPLING_RATE_96KHZ:
2150 sample_rate_val = 1;
2151 break;
2152
2153 case SAMPLING_RATE_48KHZ:
2154 default:
2155 sample_rate_val = 0;
2156 break;
2157 }
2158
2159 ucontrol->value.integer.value[0] = sample_rate_val;
2160 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2161 idx, ext_disp_rx_cfg[idx].sample_rate);
2162
2163 return 0;
2164}
2165
2166static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2167 struct snd_ctl_elem_value *ucontrol)
2168{
2169 int idx = ext_disp_get_port_idx(kcontrol);
2170
2171 if (idx < 0)
2172 return idx;
2173
2174 switch (ucontrol->value.integer.value[0]) {
2175 case 6:
2176 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2177 break;
2178 case 5:
2179 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2180 break;
2181 case 4:
2182 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2183 break;
2184 case 3:
2185 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2186 break;
2187 case 2:
2188 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2189 break;
2190 case 1:
2191 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2192 break;
2193 case 0:
2194 default:
2195 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2196 break;
2197 }
2198
2199 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2200 __func__, ucontrol->value.integer.value[0], idx,
2201 ext_disp_rx_cfg[idx].sample_rate);
2202 return 0;
2203}
2204
2205static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207{
2208 pr_debug("%s: proxy_rx channels = %d\n",
2209 __func__, proxy_rx_cfg.channels);
2210 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2211
2212 return 0;
2213}
2214
2215static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2216 struct snd_ctl_elem_value *ucontrol)
2217{
2218 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2219 pr_debug("%s: proxy_rx channels = %d\n",
2220 __func__, proxy_rx_cfg.channels);
2221
2222 return 1;
2223}
2224
2225static int tdm_get_sample_rate(int value)
2226{
2227 int sample_rate = 0;
2228
2229 switch (value) {
2230 case 0:
2231 sample_rate = SAMPLING_RATE_8KHZ;
2232 break;
2233 case 1:
2234 sample_rate = SAMPLING_RATE_16KHZ;
2235 break;
2236 case 2:
2237 sample_rate = SAMPLING_RATE_32KHZ;
2238 break;
2239 case 3:
2240 sample_rate = SAMPLING_RATE_48KHZ;
2241 break;
2242 case 4:
2243 sample_rate = SAMPLING_RATE_176P4KHZ;
2244 break;
2245 case 5:
2246 sample_rate = SAMPLING_RATE_352P8KHZ;
2247 break;
2248 default:
2249 sample_rate = SAMPLING_RATE_48KHZ;
2250 break;
2251 }
2252 return sample_rate;
2253}
2254
2255static int aux_pcm_get_sample_rate(int value)
2256{
2257 int sample_rate;
2258
2259 switch (value) {
2260 case 1:
2261 sample_rate = SAMPLING_RATE_16KHZ;
2262 break;
2263 case 0:
2264 default:
2265 sample_rate = SAMPLING_RATE_8KHZ;
2266 break;
2267 }
2268 return sample_rate;
2269}
2270
2271static int tdm_get_sample_rate_val(int sample_rate)
2272{
2273 int sample_rate_val = 0;
2274
2275 switch (sample_rate) {
2276 case SAMPLING_RATE_8KHZ:
2277 sample_rate_val = 0;
2278 break;
2279 case SAMPLING_RATE_16KHZ:
2280 sample_rate_val = 1;
2281 break;
2282 case SAMPLING_RATE_32KHZ:
2283 sample_rate_val = 2;
2284 break;
2285 case SAMPLING_RATE_48KHZ:
2286 sample_rate_val = 3;
2287 break;
2288 case SAMPLING_RATE_176P4KHZ:
2289 sample_rate_val = 4;
2290 break;
2291 case SAMPLING_RATE_352P8KHZ:
2292 sample_rate_val = 5;
2293 break;
2294 default:
2295 sample_rate_val = 3;
2296 break;
2297 }
2298 return sample_rate_val;
2299}
2300
2301static int aux_pcm_get_sample_rate_val(int sample_rate)
2302{
2303 int sample_rate_val;
2304
2305 switch (sample_rate) {
2306 case SAMPLING_RATE_16KHZ:
2307 sample_rate_val = 1;
2308 break;
2309 case SAMPLING_RATE_8KHZ:
2310 default:
2311 sample_rate_val = 0;
2312 break;
2313 }
2314 return sample_rate_val;
2315}
2316
2317static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2318 struct tdm_port *port)
2319{
2320 if (port) {
2321 if (strnstr(kcontrol->id.name, "PRI",
2322 sizeof(kcontrol->id.name))) {
2323 port->mode = TDM_PRI;
2324 } else if (strnstr(kcontrol->id.name, "SEC",
2325 sizeof(kcontrol->id.name))) {
2326 port->mode = TDM_SEC;
2327 } else if (strnstr(kcontrol->id.name, "TERT",
2328 sizeof(kcontrol->id.name))) {
2329 port->mode = TDM_TERT;
2330 } else if (strnstr(kcontrol->id.name, "QUAT",
2331 sizeof(kcontrol->id.name))) {
2332 port->mode = TDM_QUAT;
2333 } else if (strnstr(kcontrol->id.name, "QUIN",
2334 sizeof(kcontrol->id.name))) {
2335 port->mode = TDM_QUIN;
2336 } else {
2337 pr_err("%s: unsupported mode in: %s\n",
2338 __func__, kcontrol->id.name);
2339 return -EINVAL;
2340 }
2341
2342 if (strnstr(kcontrol->id.name, "RX_0",
2343 sizeof(kcontrol->id.name)) ||
2344 strnstr(kcontrol->id.name, "TX_0",
2345 sizeof(kcontrol->id.name))) {
2346 port->channel = TDM_0;
2347 } else if (strnstr(kcontrol->id.name, "RX_1",
2348 sizeof(kcontrol->id.name)) ||
2349 strnstr(kcontrol->id.name, "TX_1",
2350 sizeof(kcontrol->id.name))) {
2351 port->channel = TDM_1;
2352 } else if (strnstr(kcontrol->id.name, "RX_2",
2353 sizeof(kcontrol->id.name)) ||
2354 strnstr(kcontrol->id.name, "TX_2",
2355 sizeof(kcontrol->id.name))) {
2356 port->channel = TDM_2;
2357 } else if (strnstr(kcontrol->id.name, "RX_3",
2358 sizeof(kcontrol->id.name)) ||
2359 strnstr(kcontrol->id.name, "TX_3",
2360 sizeof(kcontrol->id.name))) {
2361 port->channel = TDM_3;
2362 } else if (strnstr(kcontrol->id.name, "RX_4",
2363 sizeof(kcontrol->id.name)) ||
2364 strnstr(kcontrol->id.name, "TX_4",
2365 sizeof(kcontrol->id.name))) {
2366 port->channel = TDM_4;
2367 } else if (strnstr(kcontrol->id.name, "RX_5",
2368 sizeof(kcontrol->id.name)) ||
2369 strnstr(kcontrol->id.name, "TX_5",
2370 sizeof(kcontrol->id.name))) {
2371 port->channel = TDM_5;
2372 } else if (strnstr(kcontrol->id.name, "RX_6",
2373 sizeof(kcontrol->id.name)) ||
2374 strnstr(kcontrol->id.name, "TX_6",
2375 sizeof(kcontrol->id.name))) {
2376 port->channel = TDM_6;
2377 } else if (strnstr(kcontrol->id.name, "RX_7",
2378 sizeof(kcontrol->id.name)) ||
2379 strnstr(kcontrol->id.name, "TX_7",
2380 sizeof(kcontrol->id.name))) {
2381 port->channel = TDM_7;
2382 } else {
2383 pr_err("%s: unsupported channel in: %s\n",
2384 __func__, kcontrol->id.name);
2385 return -EINVAL;
2386 }
2387 } else {
2388 return -EINVAL;
2389 }
2390 return 0;
2391}
2392
2393static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2394 struct snd_ctl_elem_value *ucontrol)
2395{
2396 struct tdm_port port;
2397 int ret = tdm_get_port_idx(kcontrol, &port);
2398
2399 if (ret) {
2400 pr_err("%s: unsupported control: %s\n",
2401 __func__, kcontrol->id.name);
2402 } else {
2403 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2404 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2405
2406 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2407 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2408 ucontrol->value.enumerated.item[0]);
2409 }
2410 return ret;
2411}
2412
2413static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_value *ucontrol)
2415{
2416 struct tdm_port port;
2417 int ret = tdm_get_port_idx(kcontrol, &port);
2418
2419 if (ret) {
2420 pr_err("%s: unsupported control: %s\n",
2421 __func__, kcontrol->id.name);
2422 } else {
2423 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2424 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2425
2426 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2427 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2428 ucontrol->value.enumerated.item[0]);
2429 }
2430 return ret;
2431}
2432
2433static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2434 struct snd_ctl_elem_value *ucontrol)
2435{
2436 struct tdm_port port;
2437 int ret = tdm_get_port_idx(kcontrol, &port);
2438
2439 if (ret) {
2440 pr_err("%s: unsupported control: %s\n",
2441 __func__, kcontrol->id.name);
2442 } else {
2443 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2444 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2445
2446 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2447 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2448 ucontrol->value.enumerated.item[0]);
2449 }
2450 return ret;
2451}
2452
2453static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2454 struct snd_ctl_elem_value *ucontrol)
2455{
2456 struct tdm_port port;
2457 int ret = tdm_get_port_idx(kcontrol, &port);
2458
2459 if (ret) {
2460 pr_err("%s: unsupported control: %s\n",
2461 __func__, kcontrol->id.name);
2462 } else {
2463 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2464 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2465
2466 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2467 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2468 ucontrol->value.enumerated.item[0]);
2469 }
2470 return ret;
2471}
2472
2473static int tdm_get_format(int value)
2474{
2475 int format = 0;
2476
2477 switch (value) {
2478 case 0:
2479 format = SNDRV_PCM_FORMAT_S16_LE;
2480 break;
2481 case 1:
2482 format = SNDRV_PCM_FORMAT_S24_LE;
2483 break;
2484 case 2:
2485 format = SNDRV_PCM_FORMAT_S32_LE;
2486 break;
2487 default:
2488 format = SNDRV_PCM_FORMAT_S16_LE;
2489 break;
2490 }
2491 return format;
2492}
2493
2494static int tdm_get_format_val(int format)
2495{
2496 int value = 0;
2497
2498 switch (format) {
2499 case SNDRV_PCM_FORMAT_S16_LE:
2500 value = 0;
2501 break;
2502 case SNDRV_PCM_FORMAT_S24_LE:
2503 value = 1;
2504 break;
2505 case SNDRV_PCM_FORMAT_S32_LE:
2506 value = 2;
2507 break;
2508 default:
2509 value = 0;
2510 break;
2511 }
2512 return value;
2513}
2514
2515static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2516 struct snd_ctl_elem_value *ucontrol)
2517{
2518 struct tdm_port port;
2519 int ret = tdm_get_port_idx(kcontrol, &port);
2520
2521 if (ret) {
2522 pr_err("%s: unsupported control: %s\n",
2523 __func__, kcontrol->id.name);
2524 } else {
2525 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2526 tdm_rx_cfg[port.mode][port.channel].bit_format);
2527
2528 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2529 tdm_rx_cfg[port.mode][port.channel].bit_format,
2530 ucontrol->value.enumerated.item[0]);
2531 }
2532 return ret;
2533}
2534
2535static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2536 struct snd_ctl_elem_value *ucontrol)
2537{
2538 struct tdm_port port;
2539 int ret = tdm_get_port_idx(kcontrol, &port);
2540
2541 if (ret) {
2542 pr_err("%s: unsupported control: %s\n",
2543 __func__, kcontrol->id.name);
2544 } else {
2545 tdm_rx_cfg[port.mode][port.channel].bit_format =
2546 tdm_get_format(ucontrol->value.enumerated.item[0]);
2547
2548 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2549 tdm_rx_cfg[port.mode][port.channel].bit_format,
2550 ucontrol->value.enumerated.item[0]);
2551 }
2552 return ret;
2553}
2554
2555static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2556 struct snd_ctl_elem_value *ucontrol)
2557{
2558 struct tdm_port port;
2559 int ret = tdm_get_port_idx(kcontrol, &port);
2560
2561 if (ret) {
2562 pr_err("%s: unsupported control: %s\n",
2563 __func__, kcontrol->id.name);
2564 } else {
2565 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2566 tdm_tx_cfg[port.mode][port.channel].bit_format);
2567
2568 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2569 tdm_tx_cfg[port.mode][port.channel].bit_format,
2570 ucontrol->value.enumerated.item[0]);
2571 }
2572 return ret;
2573}
2574
2575static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2576 struct snd_ctl_elem_value *ucontrol)
2577{
2578 struct tdm_port port;
2579 int ret = tdm_get_port_idx(kcontrol, &port);
2580
2581 if (ret) {
2582 pr_err("%s: unsupported control: %s\n",
2583 __func__, kcontrol->id.name);
2584 } else {
2585 tdm_tx_cfg[port.mode][port.channel].bit_format =
2586 tdm_get_format(ucontrol->value.enumerated.item[0]);
2587
2588 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2589 tdm_tx_cfg[port.mode][port.channel].bit_format,
2590 ucontrol->value.enumerated.item[0]);
2591 }
2592 return ret;
2593}
2594
2595static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2596 struct snd_ctl_elem_value *ucontrol)
2597{
2598 struct tdm_port port;
2599 int ret = tdm_get_port_idx(kcontrol, &port);
2600
2601 if (ret) {
2602 pr_err("%s: unsupported control: %s\n",
2603 __func__, kcontrol->id.name);
2604 } else {
2605
2606 ucontrol->value.enumerated.item[0] =
2607 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2608
2609 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2610 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2611 ucontrol->value.enumerated.item[0]);
2612 }
2613 return ret;
2614}
2615
2616static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2617 struct snd_ctl_elem_value *ucontrol)
2618{
2619 struct tdm_port port;
2620 int ret = tdm_get_port_idx(kcontrol, &port);
2621
2622 if (ret) {
2623 pr_err("%s: unsupported control: %s\n",
2624 __func__, kcontrol->id.name);
2625 } else {
2626 tdm_rx_cfg[port.mode][port.channel].channels =
2627 ucontrol->value.enumerated.item[0] + 1;
2628
2629 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2630 tdm_rx_cfg[port.mode][port.channel].channels,
2631 ucontrol->value.enumerated.item[0] + 1);
2632 }
2633 return ret;
2634}
2635
2636static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2637 struct snd_ctl_elem_value *ucontrol)
2638{
2639 struct tdm_port port;
2640 int ret = tdm_get_port_idx(kcontrol, &port);
2641
2642 if (ret) {
2643 pr_err("%s: unsupported control: %s\n",
2644 __func__, kcontrol->id.name);
2645 } else {
2646 ucontrol->value.enumerated.item[0] =
2647 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2648
2649 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2650 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2651 ucontrol->value.enumerated.item[0]);
2652 }
2653 return ret;
2654}
2655
2656static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2657 struct snd_ctl_elem_value *ucontrol)
2658{
2659 struct tdm_port port;
2660 int ret = tdm_get_port_idx(kcontrol, &port);
2661
2662 if (ret) {
2663 pr_err("%s: unsupported control: %s\n",
2664 __func__, kcontrol->id.name);
2665 } else {
2666 tdm_tx_cfg[port.mode][port.channel].channels =
2667 ucontrol->value.enumerated.item[0] + 1;
2668
2669 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2670 tdm_tx_cfg[port.mode][port.channel].channels,
2671 ucontrol->value.enumerated.item[0] + 1);
2672 }
2673 return ret;
2674}
2675
2676static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2677{
2678 int idx;
2679
2680 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2681 sizeof("PRIM_AUX_PCM"))) {
2682 idx = PRIM_AUX_PCM;
2683 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2684 sizeof("SEC_AUX_PCM"))) {
2685 idx = SEC_AUX_PCM;
2686 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2687 sizeof("TERT_AUX_PCM"))) {
2688 idx = TERT_AUX_PCM;
2689 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2690 sizeof("QUAT_AUX_PCM"))) {
2691 idx = QUAT_AUX_PCM;
2692 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2693 sizeof("QUIN_AUX_PCM"))) {
2694 idx = QUIN_AUX_PCM;
2695 } else {
2696 pr_err("%s: unsupported port: %s\n",
2697 __func__, kcontrol->id.name);
2698 idx = -EINVAL;
2699 }
2700
2701 return idx;
2702}
2703
2704static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2705 struct snd_ctl_elem_value *ucontrol)
2706{
2707 int idx = aux_pcm_get_port_idx(kcontrol);
2708
2709 if (idx < 0)
2710 return idx;
2711
2712 aux_pcm_rx_cfg[idx].sample_rate =
2713 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2714
2715 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2716 idx, aux_pcm_rx_cfg[idx].sample_rate,
2717 ucontrol->value.enumerated.item[0]);
2718
2719 return 0;
2720}
2721
2722static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2723 struct snd_ctl_elem_value *ucontrol)
2724{
2725 int idx = aux_pcm_get_port_idx(kcontrol);
2726
2727 if (idx < 0)
2728 return idx;
2729
2730 ucontrol->value.enumerated.item[0] =
2731 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2732
2733 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2734 idx, aux_pcm_rx_cfg[idx].sample_rate,
2735 ucontrol->value.enumerated.item[0]);
2736
2737 return 0;
2738}
2739
2740static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2741 struct snd_ctl_elem_value *ucontrol)
2742{
2743 int idx = aux_pcm_get_port_idx(kcontrol);
2744
2745 if (idx < 0)
2746 return idx;
2747
2748 aux_pcm_tx_cfg[idx].sample_rate =
2749 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2750
2751 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2752 idx, aux_pcm_tx_cfg[idx].sample_rate,
2753 ucontrol->value.enumerated.item[0]);
2754
2755 return 0;
2756}
2757
2758static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2759 struct snd_ctl_elem_value *ucontrol)
2760{
2761 int idx = aux_pcm_get_port_idx(kcontrol);
2762
2763 if (idx < 0)
2764 return idx;
2765
2766 ucontrol->value.enumerated.item[0] =
2767 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2768
2769 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2770 idx, aux_pcm_tx_cfg[idx].sample_rate,
2771 ucontrol->value.enumerated.item[0]);
2772
2773 return 0;
2774}
2775
2776static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2777{
2778 int idx;
2779
2780 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2781 sizeof("PRIM_MI2S_RX"))) {
2782 idx = PRIM_MI2S;
2783 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2784 sizeof("SEC_MI2S_RX"))) {
2785 idx = SEC_MI2S;
2786 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2787 sizeof("TERT_MI2S_RX"))) {
2788 idx = TERT_MI2S;
2789 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2790 sizeof("QUAT_MI2S_RX"))) {
2791 idx = QUAT_MI2S;
2792 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2793 sizeof("QUIN_MI2S_RX"))) {
2794 idx = QUIN_MI2S;
2795 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2796 sizeof("PRIM_MI2S_TX"))) {
2797 idx = PRIM_MI2S;
2798 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2799 sizeof("SEC_MI2S_TX"))) {
2800 idx = SEC_MI2S;
2801 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2802 sizeof("TERT_MI2S_TX"))) {
2803 idx = TERT_MI2S;
2804 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2805 sizeof("QUAT_MI2S_TX"))) {
2806 idx = QUAT_MI2S;
2807 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2808 sizeof("QUIN_MI2S_TX"))) {
2809 idx = QUIN_MI2S;
2810 } else {
2811 pr_err("%s: unsupported channel: %s\n",
2812 __func__, kcontrol->id.name);
2813 idx = -EINVAL;
2814 }
2815
2816 return idx;
2817}
2818
2819static int mi2s_get_sample_rate_val(int sample_rate)
2820{
2821 int sample_rate_val;
2822
2823 switch (sample_rate) {
2824 case SAMPLING_RATE_8KHZ:
2825 sample_rate_val = 0;
2826 break;
2827 case SAMPLING_RATE_11P025KHZ:
2828 sample_rate_val = 1;
2829 break;
2830 case SAMPLING_RATE_16KHZ:
2831 sample_rate_val = 2;
2832 break;
2833 case SAMPLING_RATE_22P05KHZ:
2834 sample_rate_val = 3;
2835 break;
2836 case SAMPLING_RATE_32KHZ:
2837 sample_rate_val = 4;
2838 break;
2839 case SAMPLING_RATE_44P1KHZ:
2840 sample_rate_val = 5;
2841 break;
2842 case SAMPLING_RATE_48KHZ:
2843 sample_rate_val = 6;
2844 break;
2845 case SAMPLING_RATE_96KHZ:
2846 sample_rate_val = 7;
2847 break;
2848 case SAMPLING_RATE_192KHZ:
2849 sample_rate_val = 8;
2850 break;
2851 default:
2852 sample_rate_val = 6;
2853 break;
2854 }
2855 return sample_rate_val;
2856}
2857
2858static int mi2s_get_sample_rate(int value)
2859{
2860 int sample_rate;
2861
2862 switch (value) {
2863 case 0:
2864 sample_rate = SAMPLING_RATE_8KHZ;
2865 break;
2866 case 1:
2867 sample_rate = SAMPLING_RATE_11P025KHZ;
2868 break;
2869 case 2:
2870 sample_rate = SAMPLING_RATE_16KHZ;
2871 break;
2872 case 3:
2873 sample_rate = SAMPLING_RATE_22P05KHZ;
2874 break;
2875 case 4:
2876 sample_rate = SAMPLING_RATE_32KHZ;
2877 break;
2878 case 5:
2879 sample_rate = SAMPLING_RATE_44P1KHZ;
2880 break;
2881 case 6:
2882 sample_rate = SAMPLING_RATE_48KHZ;
2883 break;
2884 case 7:
2885 sample_rate = SAMPLING_RATE_96KHZ;
2886 break;
2887 case 8:
2888 sample_rate = SAMPLING_RATE_192KHZ;
2889 break;
2890 default:
2891 sample_rate = SAMPLING_RATE_48KHZ;
2892 break;
2893 }
2894 return sample_rate;
2895}
2896
2897static int mi2s_auxpcm_get_format(int value)
2898{
2899 int format;
2900
2901 switch (value) {
2902 case 0:
2903 format = SNDRV_PCM_FORMAT_S16_LE;
2904 break;
2905 case 1:
2906 format = SNDRV_PCM_FORMAT_S24_LE;
2907 break;
2908 case 2:
2909 format = SNDRV_PCM_FORMAT_S24_3LE;
2910 break;
2911 case 3:
2912 format = SNDRV_PCM_FORMAT_S32_LE;
2913 break;
2914 default:
2915 format = SNDRV_PCM_FORMAT_S16_LE;
2916 break;
2917 }
2918 return format;
2919}
2920
2921static int mi2s_auxpcm_get_format_value(int format)
2922{
2923 int value;
2924
2925 switch (format) {
2926 case SNDRV_PCM_FORMAT_S16_LE:
2927 value = 0;
2928 break;
2929 case SNDRV_PCM_FORMAT_S24_LE:
2930 value = 1;
2931 break;
2932 case SNDRV_PCM_FORMAT_S24_3LE:
2933 value = 2;
2934 break;
2935 case SNDRV_PCM_FORMAT_S32_LE:
2936 value = 3;
2937 break;
2938 default:
2939 value = 0;
2940 break;
2941 }
2942 return value;
2943}
2944
2945static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2946 struct snd_ctl_elem_value *ucontrol)
2947{
2948 int idx = mi2s_get_port_idx(kcontrol);
2949
2950 if (idx < 0)
2951 return idx;
2952
2953 mi2s_rx_cfg[idx].sample_rate =
2954 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2955
2956 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2957 idx, mi2s_rx_cfg[idx].sample_rate,
2958 ucontrol->value.enumerated.item[0]);
2959
2960 return 0;
2961}
2962
2963static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2964 struct snd_ctl_elem_value *ucontrol)
2965{
2966 int idx = mi2s_get_port_idx(kcontrol);
2967
2968 if (idx < 0)
2969 return idx;
2970
2971 ucontrol->value.enumerated.item[0] =
2972 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2973
2974 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2975 idx, mi2s_rx_cfg[idx].sample_rate,
2976 ucontrol->value.enumerated.item[0]);
2977
2978 return 0;
2979}
2980
2981static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2982 struct snd_ctl_elem_value *ucontrol)
2983{
2984 int idx = mi2s_get_port_idx(kcontrol);
2985
2986 if (idx < 0)
2987 return idx;
2988
2989 mi2s_tx_cfg[idx].sample_rate =
2990 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2991
2992 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2993 idx, mi2s_tx_cfg[idx].sample_rate,
2994 ucontrol->value.enumerated.item[0]);
2995
2996 return 0;
2997}
2998
2999static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3000 struct snd_ctl_elem_value *ucontrol)
3001{
3002 int idx = mi2s_get_port_idx(kcontrol);
3003
3004 if (idx < 0)
3005 return idx;
3006
3007 ucontrol->value.enumerated.item[0] =
3008 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3009
3010 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3011 idx, mi2s_tx_cfg[idx].sample_rate,
3012 ucontrol->value.enumerated.item[0]);
3013
3014 return 0;
3015}
3016
3017static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3018 struct snd_ctl_elem_value *ucontrol)
3019{
3020 int idx = mi2s_get_port_idx(kcontrol);
3021
3022 if (idx < 0)
3023 return idx;
3024
3025 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3026 idx, mi2s_rx_cfg[idx].channels);
3027 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3028
3029 return 0;
3030}
3031
3032static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3033 struct snd_ctl_elem_value *ucontrol)
3034{
3035 int idx = mi2s_get_port_idx(kcontrol);
3036
3037 if (idx < 0)
3038 return idx;
3039
3040 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3041 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3042 idx, mi2s_rx_cfg[idx].channels);
3043
3044 return 1;
3045}
3046
3047static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3048 struct snd_ctl_elem_value *ucontrol)
3049{
3050 int idx = mi2s_get_port_idx(kcontrol);
3051
3052 if (idx < 0)
3053 return idx;
3054
3055 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3056 idx, mi2s_tx_cfg[idx].channels);
3057 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3058
3059 return 0;
3060}
3061
3062static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3063 struct snd_ctl_elem_value *ucontrol)
3064{
3065 int idx = mi2s_get_port_idx(kcontrol);
3066
3067 if (idx < 0)
3068 return idx;
3069
3070 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3071 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3072 idx, mi2s_tx_cfg[idx].channels);
3073
3074 return 1;
3075}
3076
3077static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3078 struct snd_ctl_elem_value *ucontrol)
3079{
3080 int idx = mi2s_get_port_idx(kcontrol);
3081
3082 if (idx < 0)
3083 return idx;
3084
3085 ucontrol->value.enumerated.item[0] =
3086 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3087
3088 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3089 idx, mi2s_rx_cfg[idx].bit_format,
3090 ucontrol->value.enumerated.item[0]);
3091
3092 return 0;
3093}
3094
3095static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3096 struct snd_ctl_elem_value *ucontrol)
3097{
3098 int idx = mi2s_get_port_idx(kcontrol);
3099
3100 if (idx < 0)
3101 return idx;
3102
3103 mi2s_rx_cfg[idx].bit_format =
3104 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3105
3106 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3107 idx, mi2s_rx_cfg[idx].bit_format,
3108 ucontrol->value.enumerated.item[0]);
3109
3110 return 0;
3111}
3112
3113static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3114 struct snd_ctl_elem_value *ucontrol)
3115{
3116 int idx = mi2s_get_port_idx(kcontrol);
3117
3118 if (idx < 0)
3119 return idx;
3120
3121 ucontrol->value.enumerated.item[0] =
3122 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3123
3124 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3125 idx, mi2s_tx_cfg[idx].bit_format,
3126 ucontrol->value.enumerated.item[0]);
3127
3128 return 0;
3129}
3130
3131static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3132 struct snd_ctl_elem_value *ucontrol)
3133{
3134 int idx = mi2s_get_port_idx(kcontrol);
3135
3136 if (idx < 0)
3137 return idx;
3138
3139 mi2s_tx_cfg[idx].bit_format =
3140 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3141
3142 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3143 idx, mi2s_tx_cfg[idx].bit_format,
3144 ucontrol->value.enumerated.item[0]);
3145
3146 return 0;
3147}
3148
3149static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3150 struct snd_ctl_elem_value *ucontrol)
3151{
3152 int idx = aux_pcm_get_port_idx(kcontrol);
3153
3154 if (idx < 0)
3155 return idx;
3156
3157 ucontrol->value.enumerated.item[0] =
3158 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3159
3160 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3161 idx, aux_pcm_rx_cfg[idx].bit_format,
3162 ucontrol->value.enumerated.item[0]);
3163
3164 return 0;
3165}
3166
3167static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3168 struct snd_ctl_elem_value *ucontrol)
3169{
3170 int idx = aux_pcm_get_port_idx(kcontrol);
3171
3172 if (idx < 0)
3173 return idx;
3174
3175 aux_pcm_rx_cfg[idx].bit_format =
3176 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3177
3178 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3179 idx, aux_pcm_rx_cfg[idx].bit_format,
3180 ucontrol->value.enumerated.item[0]);
3181
3182 return 0;
3183}
3184
3185static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3186 struct snd_ctl_elem_value *ucontrol)
3187{
3188 int idx = aux_pcm_get_port_idx(kcontrol);
3189
3190 if (idx < 0)
3191 return idx;
3192
3193 ucontrol->value.enumerated.item[0] =
3194 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3195
3196 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3197 idx, aux_pcm_tx_cfg[idx].bit_format,
3198 ucontrol->value.enumerated.item[0]);
3199
3200 return 0;
3201}
3202
3203static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3204 struct snd_ctl_elem_value *ucontrol)
3205{
3206 int idx = aux_pcm_get_port_idx(kcontrol);
3207
3208 if (idx < 0)
3209 return idx;
3210
3211 aux_pcm_tx_cfg[idx].bit_format =
3212 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3213
3214 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3215 idx, aux_pcm_tx_cfg[idx].bit_format,
3216 ucontrol->value.enumerated.item[0]);
3217
3218 return 0;
3219}
3220
3221static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3222{
3223 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3224 struct snd_soc_card *card = codec->component.card;
3225 struct msm_asoc_mach_data *pdata =
3226 snd_soc_card_get_drvdata(card);
3227
3228 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3229 msm_hifi_control);
3230
3231 if (!pdata || !pdata->hph_en1_gpio_p) {
3232 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3233 return -EINVAL;
3234 }
3235 if (msm_hifi_control == MSM_HIFI_ON) {
3236 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3237 /* 5msec delay needed as per HW requirement */
3238 usleep_range(5000, 5010);
3239 } else {
3240 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3241 }
3242 snd_soc_dapm_sync(dapm);
3243
3244 return 0;
3245}
3246
3247static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3248 struct snd_ctl_elem_value *ucontrol)
3249{
3250 pr_debug("%s: msm_hifi_control = %d\n",
3251 __func__, msm_hifi_control);
3252 ucontrol->value.integer.value[0] = msm_hifi_control;
3253
3254 return 0;
3255}
3256
3257static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3258 struct snd_ctl_elem_value *ucontrol)
3259{
3260 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3261
3262 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3263 __func__, ucontrol->value.integer.value[0]);
3264
3265 msm_hifi_control = ucontrol->value.integer.value[0];
3266 msm_hifi_ctrl(codec);
3267
3268 return 0;
3269}
3270
3271static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3272 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3273 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3274 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3275 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3276 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3277 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3278 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3279 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3280 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3281 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3282 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3283 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3284 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3285 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3286 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3287 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3288 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3289 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3290 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3291 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3292 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3293 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3294 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3295 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3296 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3297 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3298 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3299 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3300 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3301 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3302 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3303 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3304 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3305 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3306 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3307 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3308 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3309 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3310 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3311 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3312 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3313 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3314 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3315 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3316 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3317 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3318 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3319 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3320 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3321 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3323 wsa_cdc_dma_rx_0_sample_rate,
3324 cdc_dma_rx_sample_rate_get,
3325 cdc_dma_rx_sample_rate_put),
3326 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3327 wsa_cdc_dma_rx_1_sample_rate,
3328 cdc_dma_rx_sample_rate_get,
3329 cdc_dma_rx_sample_rate_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3331 rx_cdc_dma_rx_0_sample_rate,
3332 cdc_dma_rx_sample_rate_get,
3333 cdc_dma_rx_sample_rate_put),
3334 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3335 rx_cdc_dma_rx_1_sample_rate,
3336 cdc_dma_rx_sample_rate_get,
3337 cdc_dma_rx_sample_rate_put),
3338 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3339 rx_cdc_dma_rx_2_sample_rate,
3340 cdc_dma_rx_sample_rate_get,
3341 cdc_dma_rx_sample_rate_put),
3342 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3343 rx_cdc_dma_rx_3_sample_rate,
3344 cdc_dma_rx_sample_rate_get,
3345 cdc_dma_rx_sample_rate_put),
3346 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3347 rx_cdc_dma_rx_5_sample_rate,
3348 cdc_dma_rx_sample_rate_get,
3349 cdc_dma_rx_sample_rate_put),
3350 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3351 wsa_cdc_dma_tx_0_sample_rate,
3352 cdc_dma_tx_sample_rate_get,
3353 cdc_dma_tx_sample_rate_put),
3354 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3355 wsa_cdc_dma_tx_1_sample_rate,
3356 cdc_dma_tx_sample_rate_get,
3357 cdc_dma_tx_sample_rate_put),
3358 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3359 wsa_cdc_dma_tx_2_sample_rate,
3360 cdc_dma_tx_sample_rate_get,
3361 cdc_dma_tx_sample_rate_put),
3362 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3363 tx_cdc_dma_tx_0_sample_rate,
3364 cdc_dma_tx_sample_rate_get,
3365 cdc_dma_tx_sample_rate_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3367 tx_cdc_dma_tx_3_sample_rate,
3368 cdc_dma_tx_sample_rate_get,
3369 cdc_dma_tx_sample_rate_put),
3370 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3371 tx_cdc_dma_tx_4_sample_rate,
3372 cdc_dma_tx_sample_rate_get,
3373 cdc_dma_tx_sample_rate_put),
3374};
3375
3376static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3377 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3378 slim_rx_ch_get, slim_rx_ch_put),
3379 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3380 slim_rx_ch_get, slim_rx_ch_put),
3381 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3382 slim_tx_ch_get, slim_tx_ch_put),
3383 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3384 slim_tx_ch_get, slim_tx_ch_put),
3385 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3386 slim_rx_ch_get, slim_rx_ch_put),
3387 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3388 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3389 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3390 slim_rx_bit_format_get, slim_rx_bit_format_put),
3391 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3392 slim_rx_bit_format_get, slim_rx_bit_format_put),
3393 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3394 slim_rx_bit_format_get, slim_rx_bit_format_put),
3395 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3396 slim_tx_bit_format_get, slim_tx_bit_format_put),
3397 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3398 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3399 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3400 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3401 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3402 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3403 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3404 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3405 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3406 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3407};
3408
3409static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3410 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3411 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3412 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3413 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3414 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3415 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3416 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3417 proxy_rx_ch_get, proxy_rx_ch_put),
3418 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3419 usb_audio_rx_format_get, usb_audio_rx_format_put),
3420 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3421 usb_audio_tx_format_get, usb_audio_tx_format_put),
3422 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3423 ext_disp_rx_format_get, ext_disp_rx_format_put),
3424 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3425 usb_audio_rx_sample_rate_get,
3426 usb_audio_rx_sample_rate_put),
3427 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3428 usb_audio_tx_sample_rate_get,
3429 usb_audio_tx_sample_rate_put),
3430 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3431 ext_disp_rx_sample_rate_get,
3432 ext_disp_rx_sample_rate_put),
3433 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3434 tdm_rx_sample_rate_get,
3435 tdm_rx_sample_rate_put),
3436 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3437 tdm_tx_sample_rate_get,
3438 tdm_tx_sample_rate_put),
3439 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3440 tdm_rx_format_get,
3441 tdm_rx_format_put),
3442 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3443 tdm_tx_format_get,
3444 tdm_tx_format_put),
3445 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3446 tdm_rx_ch_get,
3447 tdm_rx_ch_put),
3448 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3449 tdm_tx_ch_get,
3450 tdm_tx_ch_put),
3451 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3452 tdm_rx_sample_rate_get,
3453 tdm_rx_sample_rate_put),
3454 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3455 tdm_tx_sample_rate_get,
3456 tdm_tx_sample_rate_put),
3457 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3458 tdm_rx_format_get,
3459 tdm_rx_format_put),
3460 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3461 tdm_tx_format_get,
3462 tdm_tx_format_put),
3463 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3464 tdm_rx_ch_get,
3465 tdm_rx_ch_put),
3466 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3467 tdm_tx_ch_get,
3468 tdm_tx_ch_put),
3469 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3470 tdm_rx_sample_rate_get,
3471 tdm_rx_sample_rate_put),
3472 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3473 tdm_tx_sample_rate_get,
3474 tdm_tx_sample_rate_put),
3475 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3476 tdm_rx_format_get,
3477 tdm_rx_format_put),
3478 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3479 tdm_tx_format_get,
3480 tdm_tx_format_put),
3481 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3482 tdm_rx_ch_get,
3483 tdm_rx_ch_put),
3484 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3485 tdm_tx_ch_get,
3486 tdm_tx_ch_put),
3487 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3488 tdm_rx_sample_rate_get,
3489 tdm_rx_sample_rate_put),
3490 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3491 tdm_tx_sample_rate_get,
3492 tdm_tx_sample_rate_put),
3493 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3494 tdm_rx_format_get,
3495 tdm_rx_format_put),
3496 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3497 tdm_tx_format_get,
3498 tdm_tx_format_put),
3499 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3500 tdm_rx_ch_get,
3501 tdm_rx_ch_put),
3502 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3503 tdm_tx_ch_get,
3504 tdm_tx_ch_put),
3505 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3506 tdm_rx_sample_rate_get,
3507 tdm_rx_sample_rate_put),
3508 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3509 tdm_tx_sample_rate_get,
3510 tdm_tx_sample_rate_put),
3511 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3512 tdm_rx_format_get,
3513 tdm_rx_format_put),
3514 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3515 tdm_tx_format_get,
3516 tdm_tx_format_put),
3517 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3518 tdm_rx_ch_get,
3519 tdm_rx_ch_put),
3520 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3521 tdm_tx_ch_get,
3522 tdm_tx_ch_put),
3523 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3524 aux_pcm_rx_sample_rate_get,
3525 aux_pcm_rx_sample_rate_put),
3526 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3527 aux_pcm_rx_sample_rate_get,
3528 aux_pcm_rx_sample_rate_put),
3529 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3530 aux_pcm_rx_sample_rate_get,
3531 aux_pcm_rx_sample_rate_put),
3532 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3533 aux_pcm_rx_sample_rate_get,
3534 aux_pcm_rx_sample_rate_put),
3535 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3536 aux_pcm_rx_sample_rate_get,
3537 aux_pcm_rx_sample_rate_put),
3538 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3539 aux_pcm_tx_sample_rate_get,
3540 aux_pcm_tx_sample_rate_put),
3541 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3542 aux_pcm_tx_sample_rate_get,
3543 aux_pcm_tx_sample_rate_put),
3544 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3545 aux_pcm_tx_sample_rate_get,
3546 aux_pcm_tx_sample_rate_put),
3547 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3548 aux_pcm_tx_sample_rate_get,
3549 aux_pcm_tx_sample_rate_put),
3550 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3551 aux_pcm_tx_sample_rate_get,
3552 aux_pcm_tx_sample_rate_put),
3553 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3554 mi2s_rx_sample_rate_get,
3555 mi2s_rx_sample_rate_put),
3556 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3557 mi2s_rx_sample_rate_get,
3558 mi2s_rx_sample_rate_put),
3559 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3560 mi2s_rx_sample_rate_get,
3561 mi2s_rx_sample_rate_put),
3562 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3563 mi2s_rx_sample_rate_get,
3564 mi2s_rx_sample_rate_put),
3565 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3566 mi2s_rx_sample_rate_get,
3567 mi2s_rx_sample_rate_put),
3568 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3569 mi2s_tx_sample_rate_get,
3570 mi2s_tx_sample_rate_put),
3571 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3572 mi2s_tx_sample_rate_get,
3573 mi2s_tx_sample_rate_put),
3574 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3575 mi2s_tx_sample_rate_get,
3576 mi2s_tx_sample_rate_put),
3577 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3578 mi2s_tx_sample_rate_get,
3579 mi2s_tx_sample_rate_put),
3580 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3581 mi2s_tx_sample_rate_get,
3582 mi2s_tx_sample_rate_put),
3583 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3584 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3585 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3586 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3587 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3588 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3589 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3590 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3591 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3592 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3593 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3594 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3595 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3596 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3597 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3598 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3599 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3600 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3601 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3602 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3603 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3604 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3605 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3606 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3607 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3608 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3609 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3610 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3611 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3612 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3613 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3614 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3615 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3616 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3617 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3618 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3619 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3620 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3621 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3622 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3623 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3624 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3625 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3626 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3627 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3628 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3629 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3630 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3631 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3632 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3633 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3634 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3635 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3636 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3637 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3638 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3639 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3640 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3641 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3642 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3643 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3644 msm_hifi_put),
3645 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3646 msm_bt_sample_rate_get,
3647 msm_bt_sample_rate_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +0530[diff] [blame]3648 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3649 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3650};
3651
3652static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3653 int enable, bool dapm)
3654{
3655 int ret = 0;
3656
3657 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3658 ret = tavil_cdc_mclk_enable(codec, enable);
3659 } else {
3660 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3661 __func__);
3662 ret = -EINVAL;
3663 }
3664 return ret;
3665}
3666
3667static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3668 int enable, bool dapm)
3669{
3670 int ret = 0;
3671
3672 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3673 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3674 } else {
3675 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3676 __func__);
3677 ret = -EINVAL;
3678 }
3679
3680 return ret;
3681}
3682
3683static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3684 struct snd_kcontrol *kcontrol, int event)
3685{
3686 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3687
3688 pr_debug("%s: event = %d\n", __func__, event);
3689
3690 switch (event) {
3691 case SND_SOC_DAPM_PRE_PMU:
3692 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3693 case SND_SOC_DAPM_POST_PMD:
3694 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3695 }
3696 return 0;
3697}
3698
3699static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3700 struct snd_kcontrol *kcontrol, int event)
3701{
3702 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3703
3704 pr_debug("%s: event = %d\n", __func__, event);
3705
3706 switch (event) {
3707 case SND_SOC_DAPM_PRE_PMU:
3708 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3709 case SND_SOC_DAPM_POST_PMD:
3710 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3711 }
3712 return 0;
3713}
3714
3715static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3716 struct snd_kcontrol *k, int event)
3717{
3718 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3719 struct snd_soc_card *card = codec->component.card;
3720 struct msm_asoc_mach_data *pdata =
3721 snd_soc_card_get_drvdata(card);
3722
3723 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3724 __func__, msm_hifi_control);
3725
3726 if (!pdata || !pdata->hph_en0_gpio_p) {
3727 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3728 return -EINVAL;
3729 }
3730
3731 if (msm_hifi_control != MSM_HIFI_ON) {
3732 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3733 __func__);
3734 return 0;
3735 }
3736
3737 switch (event) {
3738 case SND_SOC_DAPM_POST_PMU:
3739 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3740 break;
3741 case SND_SOC_DAPM_PRE_PMD:
3742 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3743 break;
3744 }
3745
3746 return 0;
3747}
3748
3749static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3750
3751 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3752 msm_mclk_event,
3753 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3754
3755 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3756 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3757
3758 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3759 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3760 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3761 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3762 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3763 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3764 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3765 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3766
3767 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3768 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3769 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3770 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3771 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3772 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3773};
3774
3775static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3776 struct snd_kcontrol *kcontrol, int event)
3777{
3778 struct msm_asoc_mach_data *pdata = NULL;
3779 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3780 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]3781 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]3782 int *dmic_gpio_cnt;
3783 struct device_node *dmic_gpio;
3784 char *wname;
3785
3786 wname = strpbrk(w->name, "0123");
3787 if (!wname) {
3788 dev_err(codec->dev, "%s: widget not found\n", __func__);
3789 return -EINVAL;
3790 }
3791
3792 ret = kstrtouint(wname, 10, &dmic_idx);
3793 if (ret < 0) {
3794 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3795 __func__);
3796 return -EINVAL;
3797 }
3798
3799 pdata = snd_soc_card_get_drvdata(codec->component.card);
3800
3801 switch (dmic_idx) {
3802 case 0:
3803 case 1:
3804 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3805 dmic_gpio = pdata->dmic01_gpio_p;
3806 break;
3807 case 2:
3808 case 3:
3809 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3810 dmic_gpio = pdata->dmic23_gpio_p;
3811 break;
3812 default:
3813 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3814 __func__);
3815 return -EINVAL;
3816 }
3817
3818 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3819 __func__, event, dmic_idx, *dmic_gpio_cnt);
3820
3821 switch (event) {
3822 case SND_SOC_DAPM_PRE_PMU:
3823 (*dmic_gpio_cnt)++;
3824 if (*dmic_gpio_cnt == 1) {
3825 ret = msm_cdc_pinctrl_select_active_state(
3826 dmic_gpio);
3827 if (ret < 0) {
3828 pr_err("%s: gpio set cannot be activated %sd",
3829 __func__, "dmic_gpio");
3830 return ret;
3831 }
3832 }
3833
3834 break;
3835 case SND_SOC_DAPM_POST_PMD:
3836 (*dmic_gpio_cnt)--;
3837 if (*dmic_gpio_cnt == 0) {
3838 ret = msm_cdc_pinctrl_select_sleep_state(
3839 dmic_gpio);
3840 if (ret < 0) {
3841 pr_err("%s: gpio set cannot be de-activated %sd",
3842 __func__, "dmic_gpio");
3843 return ret;
3844 }
3845 }
3846 break;
3847 default:
3848 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3849 return -EINVAL;
3850 }
3851 return 0;
3852}
3853
3854static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3855 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3856 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3857 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3858 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3859 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3860 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3861 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3862 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3863};
3864
3865static inline int param_is_mask(int p)
3866{
3867 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3868 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3869}
3870
3871static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3872 int n)
3873{
3874 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3875}
3876
3877static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3878 unsigned int bit)
3879{
3880 if (bit >= SNDRV_MASK_MAX)
3881 return;
3882 if (param_is_mask(n)) {
3883 struct snd_mask *m = param_to_mask(p, n);
3884
3885 m->bits[0] = 0;
3886 m->bits[1] = 0;
3887 m->bits[bit >> 5] |= (1 << (bit & 31));
3888 }
3889}
3890
3891static int msm_slim_get_ch_from_beid(int32_t be_id)
3892{
3893 int ch_id = 0;
3894
3895 switch (be_id) {
3896 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3897 ch_id = SLIM_RX_0;
3898 break;
3899 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3900 ch_id = SLIM_RX_1;
3901 break;
3902 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3903 ch_id = SLIM_RX_2;
3904 break;
3905 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3906 ch_id = SLIM_RX_3;
3907 break;
3908 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3909 ch_id = SLIM_RX_4;
3910 break;
3911 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3912 ch_id = SLIM_RX_6;
3913 break;
3914 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3915 ch_id = SLIM_TX_0;
3916 break;
3917 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3918 ch_id = SLIM_TX_3;
3919 break;
3920 default:
3921 ch_id = SLIM_RX_0;
3922 break;
3923 }
3924
3925 return ch_id;
3926}
3927
3928static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3929{
3930 int idx = 0;
3931
3932 switch (be_id) {
3933 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3934 idx = WSA_CDC_DMA_RX_0;
3935 break;
3936 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3937 idx = WSA_CDC_DMA_TX_0;
3938 break;
3939 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3940 idx = WSA_CDC_DMA_RX_1;
3941 break;
3942 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3943 idx = WSA_CDC_DMA_TX_1;
3944 break;
3945 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3946 idx = WSA_CDC_DMA_TX_2;
3947 break;
3948 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3949 idx = RX_CDC_DMA_RX_0;
3950 break;
3951 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3952 idx = RX_CDC_DMA_RX_1;
3953 break;
3954 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3955 idx = RX_CDC_DMA_RX_2;
3956 break;
3957 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3958 idx = RX_CDC_DMA_RX_3;
3959 break;
3960 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3961 idx = RX_CDC_DMA_RX_5;
3962 break;
3963 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3964 idx = TX_CDC_DMA_TX_0;
3965 break;
3966 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3967 idx = TX_CDC_DMA_TX_3;
3968 break;
3969 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3970 idx = TX_CDC_DMA_TX_4;
3971 break;
3972 default:
3973 idx = RX_CDC_DMA_RX_0;
3974 break;
3975 }
3976
3977 return idx;
3978}
3979
3980static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3981{
3982 int idx = -EINVAL;
3983
3984 switch (be_id) {
3985 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3986 idx = DP_RX_IDX;
3987 break;
3988 default:
3989 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3990 idx = -EINVAL;
3991 break;
3992 }
3993
3994 return idx;
3995}
3996
3997static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3998 struct snd_pcm_hw_params *params)
3999{
4000 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4001 struct snd_interval *rate = hw_param_interval(params,
4002 SNDRV_PCM_HW_PARAM_RATE);
4003 struct snd_interval *channels = hw_param_interval(params,
4004 SNDRV_PCM_HW_PARAM_CHANNELS);
4005 int rc = 0;
4006 int idx;
4007 void *config = NULL;
4008 struct snd_soc_codec *codec = NULL;
4009
4010 pr_debug("%s: format = %d, rate = %d\n",
4011 __func__, params_format(params), params_rate(params));
4012
4013 switch (dai_link->id) {
4014 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4015 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4016 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4017 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4018 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4019 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4020 idx = msm_slim_get_ch_from_beid(dai_link->id);
4021 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4022 slim_rx_cfg[idx].bit_format);
4023 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4024 channels->min = channels->max = slim_rx_cfg[idx].channels;
4025 break;
4026
4027 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4028 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4029 idx = msm_slim_get_ch_from_beid(dai_link->id);
4030 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4031 slim_tx_cfg[idx].bit_format);
4032 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4033 channels->min = channels->max = slim_tx_cfg[idx].channels;
4034 break;
4035
4036 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4037 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4038 slim_tx_cfg[1].bit_format);
4039 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4040 channels->min = channels->max = slim_tx_cfg[1].channels;
4041 break;
4042
4043 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4044 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4045 SNDRV_PCM_FORMAT_S32_LE);
4046 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4047 channels->min = channels->max = msm_vi_feed_tx_ch;
4048 break;
4049
4050 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4051 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4052 slim_rx_cfg[5].bit_format);
4053 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4054 channels->min = channels->max = slim_rx_cfg[5].channels;
4055 break;
4056
4057 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4058 codec = rtd->codec;
4059 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4060 channels->min = channels->max = 1;
4061
4062 config = msm_codec_fn.get_afe_config_fn(codec,
4063 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4064 if (config) {
4065 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4066 config, SLIMBUS_5_TX);
4067 if (rc)
4068 pr_err("%s: Failed to set slimbus slave port config %d\n",
4069 __func__, rc);
4070 }
4071 break;
4072
4073 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4074 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4075 slim_rx_cfg[SLIM_RX_7].bit_format);
4076 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4077 channels->min = channels->max =
4078 slim_rx_cfg[SLIM_RX_7].channels;
4079 break;
4080
4081 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4082 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4083 channels->min = channels->max =
4084 slim_tx_cfg[SLIM_TX_7].channels;
4085 break;
4086
4087 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4088 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4089 channels->min = channels->max =
4090 slim_tx_cfg[SLIM_TX_8].channels;
4091 break;
4092
4093 case MSM_BACKEND_DAI_USB_RX:
4094 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4095 usb_rx_cfg.bit_format);
4096 rate->min = rate->max = usb_rx_cfg.sample_rate;
4097 channels->min = channels->max = usb_rx_cfg.channels;
4098 break;
4099
4100 case MSM_BACKEND_DAI_USB_TX:
4101 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4102 usb_tx_cfg.bit_format);
4103 rate->min = rate->max = usb_tx_cfg.sample_rate;
4104 channels->min = channels->max = usb_tx_cfg.channels;
4105 break;
4106
4107 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4108 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4109 if (idx < 0) {
4110 pr_err("%s: Incorrect ext disp idx %d\n",
4111 __func__, idx);
4112 rc = idx;
4113 goto done;
4114 }
4115
4116 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4117 ext_disp_rx_cfg[idx].bit_format);
4118 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4119 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4120 break;
4121
4122 case MSM_BACKEND_DAI_AFE_PCM_RX:
4123 channels->min = channels->max = proxy_rx_cfg.channels;
4124 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4125 break;
4126
4127 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4128 channels->min = channels->max =
4129 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4130 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4131 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4132 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4133 break;
4134
4135 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4136 channels->min = channels->max =
4137 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4138 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4139 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4140 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4141 break;
4142
4143 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4144 channels->min = channels->max =
4145 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4146 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4147 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4148 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4149 break;
4150
4151 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4152 channels->min = channels->max =
4153 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4154 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4155 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4156 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4157 break;
4158
4159 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4160 channels->min = channels->max =
4161 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4162 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4163 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4164 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4165 break;
4166
4167 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4168 channels->min = channels->max =
4169 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4170 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4171 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4172 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4173 break;
4174
4175 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4176 channels->min = channels->max =
4177 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4178 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4179 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4180 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4181 break;
4182
4183 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4184 channels->min = channels->max =
4185 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4186 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4187 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4188 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4189 break;
4190
4191 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4192 channels->min = channels->max =
4193 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4194 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4195 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4196 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4197 break;
4198
4199 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4200 channels->min = channels->max =
4201 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4202 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4203 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4204 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4205 break;
4206
4207
4208 case MSM_BACKEND_DAI_AUXPCM_RX:
4209 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4210 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4211 rate->min = rate->max =
4212 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4213 channels->min = channels->max =
4214 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4215 break;
4216
4217 case MSM_BACKEND_DAI_AUXPCM_TX:
4218 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4219 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4220 rate->min = rate->max =
4221 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4222 channels->min = channels->max =
4223 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4224 break;
4225
4226 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4227 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4228 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4229 rate->min = rate->max =
4230 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4231 channels->min = channels->max =
4232 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4233 break;
4234
4235 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4238 rate->min = rate->max =
4239 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4240 channels->min = channels->max =
4241 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4242 break;
4243
4244 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4245 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4246 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4247 rate->min = rate->max =
4248 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4249 channels->min = channels->max =
4250 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4251 break;
4252
4253 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4254 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4255 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4256 rate->min = rate->max =
4257 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4258 channels->min = channels->max =
4259 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4260 break;
4261
4262 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4263 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4264 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4265 rate->min = rate->max =
4266 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4267 channels->min = channels->max =
4268 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4269 break;
4270
4271 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4272 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4273 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4274 rate->min = rate->max =
4275 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4276 channels->min = channels->max =
4277 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4278 break;
4279
4280 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4281 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4282 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4283 rate->min = rate->max =
4284 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4285 channels->min = channels->max =
4286 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4287 break;
4288
4289 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4291 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4292 rate->min = rate->max =
4293 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4294 channels->min = channels->max =
4295 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4296 break;
4297
4298 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4299 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4300 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4301 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4302 channels->min = channels->max =
4303 mi2s_rx_cfg[PRIM_MI2S].channels;
4304 break;
4305
4306 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4307 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4308 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4309 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4310 channels->min = channels->max =
4311 mi2s_tx_cfg[PRIM_MI2S].channels;
4312 break;
4313
4314 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4315 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4316 mi2s_rx_cfg[SEC_MI2S].bit_format);
4317 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4318 channels->min = channels->max =
4319 mi2s_rx_cfg[SEC_MI2S].channels;
4320 break;
4321
4322 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4323 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4324 mi2s_tx_cfg[SEC_MI2S].bit_format);
4325 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4326 channels->min = channels->max =
4327 mi2s_tx_cfg[SEC_MI2S].channels;
4328 break;
4329
4330 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4332 mi2s_rx_cfg[TERT_MI2S].bit_format);
4333 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4334 channels->min = channels->max =
4335 mi2s_rx_cfg[TERT_MI2S].channels;
4336 break;
4337
4338 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4339 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4340 mi2s_tx_cfg[TERT_MI2S].bit_format);
4341 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4342 channels->min = channels->max =
4343 mi2s_tx_cfg[TERT_MI2S].channels;
4344 break;
4345
4346 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4347 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4348 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4349 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4350 channels->min = channels->max =
4351 mi2s_rx_cfg[QUAT_MI2S].channels;
4352 break;
4353
4354 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4355 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4356 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4357 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4358 channels->min = channels->max =
4359 mi2s_tx_cfg[QUAT_MI2S].channels;
4360 break;
4361
4362 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4363 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4364 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4365 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4366 channels->min = channels->max =
4367 mi2s_rx_cfg[QUIN_MI2S].channels;
4368 break;
4369
4370 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4371 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4372 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4373 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4374 channels->min = channels->max =
4375 mi2s_tx_cfg[QUIN_MI2S].channels;
4376 break;
4377
4378 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4379 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4380 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4381 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4382 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4383 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4385 cdc_dma_rx_cfg[idx].bit_format);
4386 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4387 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4388 break;
4389
4390 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4391 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4392 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]4393 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4394 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4395 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4397 cdc_dma_tx_cfg[idx].bit_format);
4398 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4399 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4400 break;
4401
4402 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4404 SNDRV_PCM_FORMAT_S32_LE);
4405 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4406 channels->min = channels->max = msm_vi_feed_tx_ch;
4407 break;
4408
4409 default:
4410 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4411 break;
4412 }
4413
4414done:
4415 return rc;
4416}
4417
4418static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4419{
4420 int value = 0;
4421 bool ret = 0;
4422 struct snd_soc_card *card = codec->component.card;
4423 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4424 struct pinctrl_state *en2_pinctrl_active;
4425 struct pinctrl_state *en2_pinctrl_sleep;
4426
4427 if (!pdata->usbc_en2_gpio_p) {
4428 if (active) {
4429 /* if active and usbc_en2_gpio undefined, get pin */
4430 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4431 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4432 dev_err(card->dev,
4433 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4434 __func__,
4435 PTR_ERR(pdata->usbc_en2_gpio_p));
4436 pdata->usbc_en2_gpio_p = NULL;
4437 return false;
4438 }
4439 } else {
4440 /* if not active and usbc_en2_gpio undefined, return */
4441 return false;
4442 }
4443 }
4444
4445 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4446 "qcom,usbc-analog-en2-gpio", 0);
4447 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4448 dev_err(card->dev, "%s, property %s not in node %s",
4449 __func__, "qcom,usbc-analog-en2-gpio",
4450 card->dev->of_node->full_name);
4451 return false;
4452 }
4453
4454 en2_pinctrl_active = pinctrl_lookup_state(
4455 pdata->usbc_en2_gpio_p, "aud_active");
4456 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4457 dev_err(card->dev,
4458 "%s: Cannot get aud_active pinctrl state:%ld\n",
4459 __func__, PTR_ERR(en2_pinctrl_active));
4460 ret = false;
4461 goto err_lookup_state;
4462 }
4463
4464 en2_pinctrl_sleep = pinctrl_lookup_state(
4465 pdata->usbc_en2_gpio_p, "aud_sleep");
4466 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4467 dev_err(card->dev,
4468 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4469 __func__, PTR_ERR(en2_pinctrl_sleep));
4470 ret = false;
4471 goto err_lookup_state;
4472 }
4473
4474 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4475 if (active) {
4476 dev_dbg(codec->dev, "%s: enter\n", __func__);
4477 if (pdata->usbc_en2_gpio_p) {
4478 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4479 if (value)
4480 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4481 en2_pinctrl_sleep);
4482 else
4483 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4484 en2_pinctrl_active);
4485 } else if (pdata->usbc_en2_gpio >= 0) {
4486 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4487 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4488 }
4489 pr_debug("%s: swap select switch %d to %d\n", __func__,
4490 value, !value);
4491 ret = true;
4492 } else {
4493 /* if not active, release usbc_en2_gpio_p pin */
4494 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4495 en2_pinctrl_sleep);
4496 }
4497
4498err_lookup_state:
4499 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4500 pdata->usbc_en2_gpio_p = NULL;
4501 return ret;
4502}
4503
4504static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4505{
4506 int value = 0;
4507 bool ret = false;
4508 struct snd_soc_card *card;
4509 struct msm_asoc_mach_data *pdata;
4510
4511 if (!codec) {
4512 pr_err("%s codec is NULL\n", __func__);
4513 return false;
4514 }
4515 card = codec->component.card;
4516 pdata = snd_soc_card_get_drvdata(card);
4517
4518 if (!pdata)
4519 return false;
4520
4521 if (wcd_mbhc_cfg.enable_usbc_analog)
4522 return msm_usbc_swap_gnd_mic(codec, active);
4523
4524 /* if usbc is not defined, swap using us_euro_gpio_p */
4525 if (pdata->us_euro_gpio_p) {
4526 value = msm_cdc_pinctrl_get_state(
4527 pdata->us_euro_gpio_p);
4528 if (value)
4529 msm_cdc_pinctrl_select_sleep_state(
4530 pdata->us_euro_gpio_p);
4531 else
4532 msm_cdc_pinctrl_select_active_state(
4533 pdata->us_euro_gpio_p);
4534 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4535 __func__, value, !value);
4536 ret = true;
4537 }
4538 return ret;
4539}
4540
4541static int msm_afe_set_config(struct snd_soc_codec *codec)
4542{
4543 int ret = 0;
4544 void *config_data = NULL;
4545
4546 if (!msm_codec_fn.get_afe_config_fn) {
4547 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4548 __func__);
4549 return -EINVAL;
4550 }
4551
4552 config_data = msm_codec_fn.get_afe_config_fn(codec,
4553 AFE_CDC_REGISTERS_CONFIG);
4554 if (config_data) {
4555 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4556 if (ret) {
4557 dev_err(codec->dev,
4558 "%s: Failed to set codec registers config %d\n",
4559 __func__, ret);
4560 return ret;
4561 }
4562 }
4563
4564 config_data = msm_codec_fn.get_afe_config_fn(codec,
4565 AFE_CDC_REGISTER_PAGE_CONFIG);
4566 if (config_data) {
4567 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4568 0);
4569 if (ret)
4570 dev_err(codec->dev,
4571 "%s: Failed to set cdc register page config\n",
4572 __func__);
4573 }
4574
4575 config_data = msm_codec_fn.get_afe_config_fn(codec,
4576 AFE_SLIMBUS_SLAVE_CONFIG);
4577 if (config_data) {
4578 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4579 if (ret) {
4580 dev_err(codec->dev,
4581 "%s: Failed to set slimbus slave config %d\n",
4582 __func__, ret);
4583 return ret;
4584 }
4585 }
4586
4587 return 0;
4588}
4589
4590static void msm_afe_clear_config(void)
4591{
4592 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4593 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4594}
4595
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4596static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4597{
4598 int ret = 0;
4599 void *config_data;
4600 struct snd_soc_codec *codec = rtd->codec;
4601 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4602 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4603 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4604 struct snd_soc_component *aux_comp;
4605 struct snd_card *card;
4606 struct snd_info_entry *entry;
4607 struct msm_asoc_mach_data *pdata =
4608 snd_soc_card_get_drvdata(rtd->card);
4609
4610 /*
4611 * Codec SLIMBUS configuration
4612 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4613 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4614 * TX14, TX15, TX16
4615 */
4616 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4617 150, 151};
4618 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4619 134, 135, 136, 137, 138, 139,
4620 140, 141, 142, 143};
4621
4622 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4623
4624 rtd->pmdown_time = 0;
4625
4626 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4627 ARRAY_SIZE(msm_tavil_snd_controls));
4628 if (ret < 0) {
4629 pr_err("%s: add_codec_controls failed, err %d\n",
4630 __func__, ret);
4631 return ret;
4632 }
4633
4634 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4635 ARRAY_SIZE(msm_common_snd_controls));
4636 if (ret < 0) {
4637 pr_err("%s: add_codec_controls failed, err %d\n",
4638 __func__, ret);
4639 return ret;
4640 }
4641
4642 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4643 ARRAY_SIZE(msm_dapm_widgets_tavil));
4644
4645 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4646 ARRAY_SIZE(wcd_audio_paths_tavil));
4647
4648 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4649 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4650 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4651 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4652 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4653 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4654 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4655 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4656 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4657 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4658 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4659 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4660 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4661 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4662 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4663 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4664 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4665 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4666 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4667 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4668 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4669 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4670 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4671 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4672 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4673 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4674 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4675
4676 snd_soc_dapm_sync(dapm);
4677
4678 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4679 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4680
4681 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4682
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]4683 ret = msm_afe_set_config(codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4684 if (ret) {
4685 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4686 goto err;
4687 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]4688 pdata->is_afe_config_done = true;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4689
4690 config_data = msm_codec_fn.get_afe_config_fn(codec,
4691 AFE_AANC_VERSION);
4692 if (config_data) {
4693 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4694 if (ret) {
4695 pr_err("%s: Failed to set aanc version %d\n",
4696 __func__, ret);
4697 goto err;
4698 }
4699 }
4700
4701 /*
4702 * Send speaker configuration only for WSA8810.
4703 * Default configuration is for WSA8815.
4704 */
4705 pr_debug("%s: Number of aux devices: %d\n",
4706 __func__, rtd->card->num_aux_devs);
4707 if (rtd->card->num_aux_devs &&
4708 !list_empty(&rtd->card->aux_comp_list)) {
4709 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4710 struct snd_soc_component, card_aux_list);
4711 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4712 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4713 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4714 tavil_set_spkr_gain_offset(rtd->codec,
4715 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4716 }
4717 }
4718
4719 card = rtd->card->snd_card;
4720 entry = snd_info_create_subdir(card->module, "codecs",
4721 card->proc_root);
4722 if (!entry) {
4723 pr_debug("%s: Cannot create codecs module entry\n",
4724 __func__);
4725 ret = 0;
4726 goto err;
4727 }
4728 pdata->codec_root = entry;
4729 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4730
4731 codec_reg_done = true;
4732 return 0;
4733err:
4734 return ret;
4735}
4736
4737static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4738{
4739 int ret = 0;
4740 struct snd_soc_codec *codec = rtd->codec;
4741 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4742 struct snd_card *card;
4743 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4744 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4745 struct msm_asoc_mach_data *pdata =
4746 snd_soc_card_get_drvdata(rtd->card);
4747
4748 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4749 ARRAY_SIZE(msm_int_snd_controls));
4750 if (ret < 0) {
4751 pr_err("%s: add_codec_controls failed: %d\n",
4752 __func__, ret);
4753 return ret;
4754 }
4755 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4756 ARRAY_SIZE(msm_common_snd_controls));
4757 if (ret < 0) {
4758 pr_err("%s: add common snd controls failed: %d\n",
4759 __func__, ret);
4760 return ret;
4761 }
4762
4763 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4764 ARRAY_SIZE(msm_int_dapm_widgets));
4765
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4766 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4767 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4768 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4770
4771 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4772 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4773 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4774 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4775
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4776 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4777 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4778 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4779 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4780
4781 snd_soc_dapm_sync(dapm);
4782
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]4783 /*
4784 * Send speaker configuration only for WSA8810.
4785 * Default configuration is for WSA8815.
4786 */
4787 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4788 __func__, rtd->card->num_aux_devs);
4789 if (rtd->card->num_aux_devs &&
4790 !list_empty(&rtd->card->component_dev_list)) {
4791 aux_comp = list_first_entry(
4792 &rtd->card->component_dev_list,
4793 struct snd_soc_component,
4794 card_aux_list);
4795 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4796 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4797 wsa_macro_set_spkr_mode(rtd->codec,
4798 WSA_MACRO_SPKR_MODE_1);
4799 wsa_macro_set_spkr_gain_offset(rtd->codec,
4800 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4801 }
4802 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4803 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]4804 if (!pdata->codec_root) {
4805 entry = snd_info_create_subdir(card->module, "codecs",
4806 card->proc_root);
4807 if (!entry) {
4808 pr_debug("%s: Cannot create codecs module entry\n",
4809 __func__);
4810 ret = 0;
4811 goto err;
4812 }
4813 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4814 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]4815 bolero_info_create_codec_entry(pdata->codec_root, codec);
4816 codec_reg_done = true;
4817 return 0;
4818err:
4819 return ret;
4820}
4821
4822static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4823{
4824 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4825 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4826 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4827
4828 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4829 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4830}
4831
4832static void *def_wcd_mbhc_cal(void)
4833{
4834 void *wcd_mbhc_cal;
4835 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4836 u16 *btn_high;
4837
4838 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4839 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4840 if (!wcd_mbhc_cal)
4841 return NULL;
4842
4843#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4844 S(v_hs_max, 1600);
4845#undef S
4846#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4847 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4848#undef S
4849
4850 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4851 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4852 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4853
4854 btn_high[0] = 75;
4855 btn_high[1] = 150;
4856 btn_high[2] = 237;
4857 btn_high[3] = 500;
4858 btn_high[4] = 500;
4859 btn_high[5] = 500;
4860 btn_high[6] = 500;
4861 btn_high[7] = 500;
4862
4863 return wcd_mbhc_cal;
4864}
4865
4866static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4867 struct snd_pcm_hw_params *params)
4868{
4869 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4870 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4871 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4872 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4873
4874 int ret = 0;
4875 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4876 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4877 u32 user_set_tx_ch = 0;
4878 u32 rx_ch_count;
4879
4880 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4881 ret = snd_soc_dai_get_channel_map(codec_dai,
4882 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4883 if (ret < 0) {
4884 pr_err("%s: failed to get codec chan map, err:%d\n",
4885 __func__, ret);
4886 goto err;
4887 }
4888 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
4889 pr_debug("%s: rx_5_ch=%d\n", __func__,
4890 slim_rx_cfg[5].channels);
4891 rx_ch_count = slim_rx_cfg[5].channels;
4892 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
4893 pr_debug("%s: rx_2_ch=%d\n", __func__,
4894 slim_rx_cfg[2].channels);
4895 rx_ch_count = slim_rx_cfg[2].channels;
4896 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
4897 pr_debug("%s: rx_6_ch=%d\n", __func__,
4898 slim_rx_cfg[6].channels);
4899 rx_ch_count = slim_rx_cfg[6].channels;
4900 } else {
4901 pr_debug("%s: rx_0_ch=%d\n", __func__,
4902 slim_rx_cfg[0].channels);
4903 rx_ch_count = slim_rx_cfg[0].channels;
4904 }
4905 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4906 rx_ch_count, rx_ch);
4907 if (ret < 0) {
4908 pr_err("%s: failed to set cpu chan map, err:%d\n",
4909 __func__, ret);
4910 goto err;
4911 }
4912 } else {
4913
4914 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
4915 codec_dai->name, codec_dai->id, user_set_tx_ch);
4916 ret = snd_soc_dai_get_channel_map(codec_dai,
4917 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4918 if (ret < 0) {
4919 pr_err("%s: failed to get tx codec chan map, err:%d\n",
4920 __func__, ret);
4921 goto err;
4922 }
4923 /* For <codec>_tx1 case */
4924 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
4925 user_set_tx_ch = slim_tx_cfg[0].channels;
4926 /* For <codec>_tx3 case */
4927 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
4928 user_set_tx_ch = slim_tx_cfg[1].channels;
4929 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
4930 user_set_tx_ch = msm_vi_feed_tx_ch;
4931 else
4932 user_set_tx_ch = tx_ch_cnt;
4933
4934 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
4935 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
4936 tx_ch_cnt, dai_link->id);
4937
4938 ret = snd_soc_dai_set_channel_map(cpu_dai,
4939 user_set_tx_ch, tx_ch, 0, 0);
4940 if (ret < 0)
4941 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
4942 __func__, ret);
4943 }
4944
4945err:
4946 return ret;
4947}
4948
4949
4950static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4951 struct snd_pcm_hw_params *params)
4952{
4953 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4954 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4955 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4956 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4957
4958 int ret = 0;
4959 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4960 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4961 u32 user_set_tx_ch = 0;
4962 u32 user_set_rx_ch = 0;
4963 u32 ch_id;
4964
4965 ret = snd_soc_dai_get_channel_map(codec_dai,
4966 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4967 &rx_ch_cdc_dma);
4968 if (ret < 0) {
4969 pr_err("%s: failed to get codec chan map, err:%d\n",
4970 __func__, ret);
4971 goto err;
4972 }
4973
4974 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4975 switch (dai_link->id) {
4976 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4977 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4978 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4979 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4980 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4981 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4982 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4983 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4984 {
4985 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4986 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4987 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4988 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4989 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4990 user_set_rx_ch, &rx_ch_cdc_dma);
4991 if (ret < 0) {
4992 pr_err("%s: failed to set cpu chan map, err:%d\n",
4993 __func__, ret);
4994 goto err;
4995 }
4996
4997 }
4998 break;
4999 }
5000 } else {
5001 switch (dai_link->id) {
5002 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5003 {
5004 user_set_tx_ch = msm_vi_feed_tx_ch;
5005 }
5006 break;
5007 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5008 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5009 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5010 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5011 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5012 {
5013 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5014 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5015 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5016 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5017 }
5018 break;
5019 }
5020
5021 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5022 &tx_ch_cdc_dma, 0, 0);
5023 if (ret < 0) {
5024 pr_err("%s: failed to set cpu chan map, err:%d\n",
5025 __func__, ret);
5026 goto err;
5027 }
5028 }
5029
5030err:
5031 return ret;
5032}
5033
5034static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5035 struct snd_pcm_hw_params *params)
5036{
5037 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5038 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5039 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5040 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5041 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5042 unsigned int num_tx_ch = 0;
5043 unsigned int num_rx_ch = 0;
5044 int ret = 0;
5045
5046 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5047 num_rx_ch = params_channels(params);
5048 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5049 codec_dai->name, codec_dai->id, num_rx_ch);
5050 ret = snd_soc_dai_get_channel_map(codec_dai,
5051 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5052 if (ret < 0) {
5053 pr_err("%s: failed to get codec chan map, err:%d\n",
5054 __func__, ret);
5055 goto err;
5056 }
5057 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5058 num_rx_ch, rx_ch);
5059 if (ret < 0) {
5060 pr_err("%s: failed to set cpu chan map, err:%d\n",
5061 __func__, ret);
5062 goto err;
5063 }
5064 } else {
5065 num_tx_ch = params_channels(params);
5066 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5067 codec_dai->name, codec_dai->id, num_tx_ch);
5068 ret = snd_soc_dai_get_channel_map(codec_dai,
5069 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5070 if (ret < 0) {
5071 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5072 __func__, ret);
5073 goto err;
5074 }
5075 ret = snd_soc_dai_set_channel_map(cpu_dai,
5076 num_tx_ch, tx_ch, 0, 0);
5077 if (ret < 0) {
5078 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5079 __func__, ret);
5080 goto err;
5081 }
5082 }
5083
5084err:
5085 return ret;
5086}
5087
5088static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5089 struct snd_pcm_hw_params *params)
5090{
5091 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5092 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5093 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5094 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5095 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5096 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5097 int ret;
5098
5099 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5100 codec_dai->name, codec_dai->id);
5101 ret = snd_soc_dai_get_channel_map(codec_dai,
5102 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5103 if (ret) {
5104 dev_err(rtd->dev,
5105 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5106 __func__, ret);
5107 goto err;
5108 }
5109
5110 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5111 __func__, tx_ch_cnt, dai_link->id);
5112
5113 ret = snd_soc_dai_set_channel_map(cpu_dai,
5114 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5115 if (ret)
5116 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5117 __func__, ret);
5118
5119err:
5120 return ret;
5121}
5122
5123static int msm_get_port_id(int be_id)
5124{
5125 int afe_port_id;
5126
5127 switch (be_id) {
5128 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5129 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5130 break;
5131 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5132 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5133 break;
5134 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5135 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5136 break;
5137 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5138 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5139 break;
5140 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5141 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5142 break;
5143 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5144 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5145 break;
5146 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5147 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5148 break;
5149 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5150 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5151 break;
5152 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5153 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5154 break;
5155 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5156 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5157 break;
5158 default:
5159 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5160 afe_port_id = -EINVAL;
5161 }
5162
5163 return afe_port_id;
5164}
5165
5166static u32 get_mi2s_bits_per_sample(u32 bit_format)
5167{
5168 u32 bit_per_sample;
5169
5170 switch (bit_format) {
5171 case SNDRV_PCM_FORMAT_S32_LE:
5172 case SNDRV_PCM_FORMAT_S24_3LE:
5173 case SNDRV_PCM_FORMAT_S24_LE:
5174 bit_per_sample = 32;
5175 break;
5176 case SNDRV_PCM_FORMAT_S16_LE:
5177 default:
5178 bit_per_sample = 16;
5179 break;
5180 }
5181
5182 return bit_per_sample;
5183}
5184
5185static void update_mi2s_clk_val(int dai_id, int stream)
5186{
5187 u32 bit_per_sample;
5188
5189 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5190 bit_per_sample =
5191 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5192 mi2s_clk[dai_id].clk_freq_in_hz =
5193 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5194 } else {
5195 bit_per_sample =
5196 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5197 mi2s_clk[dai_id].clk_freq_in_hz =
5198 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5199 }
5200}
5201
5202static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5203{
5204 int ret = 0;
5205 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5206 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5207 int port_id = 0;
5208 int index = cpu_dai->id;
5209
5210 port_id = msm_get_port_id(rtd->dai_link->id);
5211 if (port_id < 0) {
5212 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5213 ret = port_id;
5214 goto err;
5215 }
5216
5217 if (enable) {
5218 update_mi2s_clk_val(index, substream->stream);
5219 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5220 mi2s_clk[index].clk_freq_in_hz);
5221 }
5222
5223 mi2s_clk[index].enable = enable;
5224 ret = afe_set_lpass_clock_v2(port_id,
5225 &mi2s_clk[index]);
5226 if (ret < 0) {
5227 dev_err(rtd->card->dev,
5228 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5229 __func__, port_id, ret);
5230 goto err;
5231 }
5232
5233err:
5234 return ret;
5235}
5236
5237static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5238 enum pinctrl_pin_state new_state)
5239{
5240 int ret = 0;
5241 int curr_state = 0;
5242
5243 if (pinctrl_info == NULL) {
5244 pr_err("%s: pinctrl_info is NULL\n", __func__);
5245 ret = -EINVAL;
5246 goto err;
5247 }
5248
5249 if (pinctrl_info->pinctrl == NULL) {
5250 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5251 ret = -EINVAL;
5252 goto err;
5253 }
5254
5255 curr_state = pinctrl_info->curr_state;
5256 pinctrl_info->curr_state = new_state;
5257 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5258 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5259
5260 if (curr_state == pinctrl_info->curr_state) {
5261 pr_debug("%s: Already in same state\n", __func__);
5262 goto err;
5263 }
5264
5265 if (curr_state != STATE_DISABLE &&
5266 pinctrl_info->curr_state != STATE_DISABLE) {
5267 pr_debug("%s: state already active cannot switch\n", __func__);
5268 ret = -EIO;
5269 goto err;
5270 }
5271
5272 switch (pinctrl_info->curr_state) {
5273 case STATE_MI2S_ACTIVE:
5274 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5275 pinctrl_info->mi2s_active);
5276 if (ret) {
5277 pr_err("%s: MI2S state select failed with %d\n",
5278 __func__, ret);
5279 ret = -EIO;
5280 goto err;
5281 }
5282 break;
5283 case STATE_TDM_ACTIVE:
5284 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5285 pinctrl_info->tdm_active);
5286 if (ret) {
5287 pr_err("%s: TDM state select failed with %d\n",
5288 __func__, ret);
5289 ret = -EIO;
5290 goto err;
5291 }
5292 break;
5293 case STATE_DISABLE:
5294 if (curr_state == STATE_MI2S_ACTIVE) {
5295 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5296 pinctrl_info->mi2s_disable);
5297 } else {
5298 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5299 pinctrl_info->tdm_disable);
5300 }
5301 if (ret) {
5302 pr_err("%s: state disable failed with %d\n",
5303 __func__, ret);
5304 ret = -EIO;
5305 goto err;
5306 }
5307 break;
5308 default:
5309 pr_err("%s: TLMM pin state is invalid\n", __func__);
5310 return -EINVAL;
5311 }
5312
5313err:
5314 return ret;
5315}
5316
5317static int msm_get_pinctrl(struct platform_device *pdev)
5318{
5319 struct snd_soc_card *card = platform_get_drvdata(pdev);
5320 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5321 struct msm_pinctrl_info *pinctrl_info = NULL;
5322 struct pinctrl *pinctrl;
5323 int ret = 0;
5324
5325 pinctrl_info = &pdata->pinctrl_info;
5326
5327 if (pinctrl_info == NULL) {
5328 pr_err("%s: pinctrl_info is NULL\n", __func__);
5329 return -EINVAL;
5330 }
5331
5332 pinctrl = devm_pinctrl_get(&pdev->dev);
5333 if (IS_ERR_OR_NULL(pinctrl)) {
5334 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5335 return -EINVAL;
5336 }
5337 pinctrl_info->pinctrl = pinctrl;
5338
5339 /* get all the states handles from Device Tree */
5340 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5341 "quat-mi2s-sleep");
5342 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5343 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5344 goto err;
5345 }
5346 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5347 "quat-mi2s-active");
5348 if (IS_ERR(pinctrl_info->mi2s_active)) {
5349 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5350 goto err;
5351 }
5352 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5353 "quat-tdm-sleep");
5354 if (IS_ERR(pinctrl_info->tdm_disable)) {
5355 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5356 goto err;
5357 }
5358 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5359 "quat-tdm-active");
5360 if (IS_ERR(pinctrl_info->tdm_active)) {
5361 pr_err("%s: could not get tdm_active pinstate\n",
5362 __func__);
5363 goto err;
5364 }
5365 /* Reset the TLMM pins to a default state */
5366 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5367 pinctrl_info->mi2s_disable);
5368 if (ret != 0) {
5369 pr_err("%s: Disable TLMM pins failed with %d\n",
5370 __func__, ret);
5371 ret = -EIO;
5372 goto err;
5373 }
5374 pinctrl_info->curr_state = STATE_DISABLE;
5375
5376 return 0;
5377
5378err:
5379 devm_pinctrl_put(pinctrl);
5380 pinctrl_info->pinctrl = NULL;
5381 return -EINVAL;
5382}
5383
5384static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5385 struct snd_pcm_hw_params *params)
5386{
5387 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5388 struct snd_interval *rate = hw_param_interval(params,
5389 SNDRV_PCM_HW_PARAM_RATE);
5390 struct snd_interval *channels = hw_param_interval(params,
5391 SNDRV_PCM_HW_PARAM_CHANNELS);
5392
5393 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5394 channels->min = channels->max =
5395 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5396 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5397 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5398 rate->min = rate->max =
5399 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5400 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5401 channels->min = channels->max =
5402 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5403 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5404 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5405 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5406 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5407 channels->min = channels->max =
5408 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5409 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5410 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5411 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5412 } else {
5413 pr_err("%s: dai id 0x%x not supported\n",
5414 __func__, cpu_dai->id);
5415 return -EINVAL;
5416 }
5417
5418 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5419 __func__, cpu_dai->id, channels->max, rate->max,
5420 params_format(params));
5421
5422 return 0;
5423}
5424
5425static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5426 struct snd_pcm_hw_params *params)
5427{
5428 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5429 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5430 int ret = 0;
5431 int slot_width = 32;
5432 int channels, slots;
5433 unsigned int slot_mask, rate, clk_freq;
5434 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5435
5436 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5437
5438 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5439 switch (cpu_dai->id) {
5440 case AFE_PORT_ID_PRIMARY_TDM_RX:
5441 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5442 break;
5443 case AFE_PORT_ID_SECONDARY_TDM_RX:
5444 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5445 break;
5446 case AFE_PORT_ID_TERTIARY_TDM_RX:
5447 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5448 break;
5449 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5450 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5451 break;
5452 case AFE_PORT_ID_QUINARY_TDM_RX:
5453 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5454 break;
5455 case AFE_PORT_ID_PRIMARY_TDM_TX:
5456 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5457 break;
5458 case AFE_PORT_ID_SECONDARY_TDM_TX:
5459 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5460 break;
5461 case AFE_PORT_ID_TERTIARY_TDM_TX:
5462 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5463 break;
5464 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5465 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5466 break;
5467 case AFE_PORT_ID_QUINARY_TDM_TX:
5468 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5469 break;
5470
5471 default:
5472 pr_err("%s: dai id 0x%x not supported\n",
5473 __func__, cpu_dai->id);
5474 return -EINVAL;
5475 }
5476
5477 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5478 /*2 slot config - bits 0 and 1 set for the first two slots */
5479 slot_mask = 0x0000FFFF >> (16-slots);
5480 channels = slots;
5481
5482 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5483 __func__, slot_width, slots);
5484
5485 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5486 slots, slot_width);
5487 if (ret < 0) {
5488 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5489 __func__, ret);
5490 goto end;
5491 }
5492
5493 ret = snd_soc_dai_set_channel_map(cpu_dai,
5494 0, NULL, channels, slot_offset);
5495 if (ret < 0) {
5496 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5497 __func__, ret);
5498 goto end;
5499 }
5500 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5501 /*2 slot config - bits 0 and 1 set for the first two slots */
5502 slot_mask = 0x0000FFFF >> (16-slots);
5503 channels = slots;
5504
5505 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5506 __func__, slot_width, slots);
5507
5508 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5509 slots, slot_width);
5510 if (ret < 0) {
5511 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5512 __func__, ret);
5513 goto end;
5514 }
5515
5516 ret = snd_soc_dai_set_channel_map(cpu_dai,
5517 channels, slot_offset, 0, NULL);
5518 if (ret < 0) {
5519 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5520 __func__, ret);
5521 goto end;
5522 }
5523 } else {
5524 ret = -EINVAL;
5525 pr_err("%s: invalid use case, err:%d\n",
5526 __func__, ret);
5527 goto end;
5528 }
5529
5530 rate = params_rate(params);
5531 clk_freq = rate * slot_width * slots;
5532 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5533 if (ret < 0)
5534 pr_err("%s: failed to set tdm clk, err:%d\n",
5535 __func__, ret);
5536
5537end:
5538 return ret;
5539}
5540
5541static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5542{
5543 int ret = 0;
5544 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5545 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5546 struct snd_soc_card *card = rtd->card;
5547 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5548 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5549
5550 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5551 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5552 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5553 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5554 if (ret)
5555 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5556 __func__, ret);
5557 }
5558
5559 return ret;
5560}
5561
5562static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5563{
5564 int ret = 0;
5565 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5566 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5567 struct snd_soc_card *card = rtd->card;
5568 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5569 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5570
5571 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5572 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5573 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5574 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5575 if (ret)
5576 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5577 __func__, ret);
5578 }
5579}
5580
5581static struct snd_soc_ops sm6150_tdm_be_ops = {
5582 .hw_params = sm6150_tdm_snd_hw_params,
5583 .startup = sm6150_tdm_snd_startup,
5584 .shutdown = sm6150_tdm_snd_shutdown
5585};
5586
5587static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5588{
5589 cpumask_t mask;
5590
5591 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5592 pm_qos_remove_request(&substream->latency_pm_qos_req);
5593
5594 cpumask_clear(&mask);
5595 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5596 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5597 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5598
5599 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5600
5601 pm_qos_add_request(&substream->latency_pm_qos_req,
5602 PM_QOS_CPU_DMA_LATENCY,
5603 MSM_LL_QOS_VALUE);
5604 return 0;
5605}
5606
5607static struct snd_soc_ops msm_fe_qos_ops = {
5608 .prepare = msm_fe_qos_prepare,
5609};
5610
5611static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5612{
5613 int ret = 0;
5614 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5615 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5616 int index = cpu_dai->id;
5617 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5618 struct snd_soc_card *card = rtd->card;
5619 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5620 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5621 int ret_pinctrl = 0;
5622
5623 dev_dbg(rtd->card->dev,
5624 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5625 __func__, substream->name, substream->stream,
5626 cpu_dai->name, cpu_dai->id);
5627
5628 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5629 ret = -EINVAL;
5630 dev_err(rtd->card->dev,
5631 "%s: CPU DAI id (%d) out of range\n",
5632 __func__, cpu_dai->id);
5633 goto err;
5634 }
5635 /*
5636 * Mutex protection in case the same MI2S
5637 * interface using for both TX and RX so
5638 * that the same clock won't be enable twice.
5639 */
5640 mutex_lock(&mi2s_intf_conf[index].lock);
5641 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5642 /* Check if msm needs to provide the clock to the interface */
5643 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5644 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5645 fmt = SND_SOC_DAIFMT_CBM_CFM;
5646 }
5647 ret = msm_mi2s_set_sclk(substream, true);
5648 if (ret < 0) {
5649 dev_err(rtd->card->dev,
5650 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5651 __func__, ret);
5652 goto clean_up;
5653 }
5654
5655 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5656 if (ret < 0) {
5657 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5658 __func__, index, ret);
5659 goto clk_off;
5660 }
5661 if (index == QUAT_MI2S) {
5662 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5663 STATE_MI2S_ACTIVE);
5664 if (ret_pinctrl)
5665 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5666 __func__, ret_pinctrl);
5667 }
5668 }
5669clk_off:
5670 if (ret < 0)
5671 msm_mi2s_set_sclk(substream, false);
5672clean_up:
5673 if (ret < 0)
5674 mi2s_intf_conf[index].ref_cnt--;
5675 mutex_unlock(&mi2s_intf_conf[index].lock);
5676err:
5677 return ret;
5678}
5679
5680static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5681{
5682 int ret;
5683 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5684 int index = rtd->cpu_dai->id;
5685 struct snd_soc_card *card = rtd->card;
5686 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5687 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5688 int ret_pinctrl = 0;
5689
5690 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5691 substream->name, substream->stream);
5692 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5693 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5694 return;
5695 }
5696
5697 mutex_lock(&mi2s_intf_conf[index].lock);
5698 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5699 ret = msm_mi2s_set_sclk(substream, false);
5700 if (ret < 0)
5701 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5702 __func__, index, ret);
5703 if (index == QUAT_MI2S) {
5704 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5705 STATE_DISABLE);
5706 if (ret_pinctrl)
5707 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5708 __func__, ret_pinctrl);
5709 }
5710 }
5711 mutex_unlock(&mi2s_intf_conf[index].lock);
5712}
5713
5714static struct snd_soc_ops msm_mi2s_be_ops = {
5715 .startup = msm_mi2s_snd_startup,
5716 .shutdown = msm_mi2s_snd_shutdown,
5717};
5718
5719static struct snd_soc_ops msm_cdc_dma_be_ops = {
5720 .hw_params = msm_snd_cdc_dma_hw_params,
5721};
5722
5723static struct snd_soc_ops msm_be_ops = {
5724 .hw_params = msm_snd_hw_params,
5725};
5726
5727static struct snd_soc_ops msm_slimbus_2_be_ops = {
5728 .hw_params = msm_slimbus_2_hw_params,
5729};
5730
5731static struct snd_soc_ops msm_wcn_ops = {
5732 .hw_params = msm_wcn_hw_params,
5733};
5734
5735
5736/* Digital audio interface glue - connects codec <---> CPU */
5737static struct snd_soc_dai_link msm_common_dai_links[] = {
5738 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5739 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5740 .name = MSM_DAILINK_NAME(Media1),
5741 .stream_name = "MultiMedia1",
5742 .cpu_dai_name = "MultiMedia1",
5743 .platform_name = "msm-pcm-dsp.0",
5744 .dynamic = 1,
5745 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5746 .dpcm_playback = 1,
5747 .dpcm_capture = 1,
5748 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5749 SND_SOC_DPCM_TRIGGER_POST},
5750 .codec_dai_name = "snd-soc-dummy-dai",
5751 .codec_name = "snd-soc-dummy",
5752 .ignore_suspend = 1,
5753 /* this dainlink has playback support */
5754 .ignore_pmdown_time = 1,
5755 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5756 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5757 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5758 .name = MSM_DAILINK_NAME(Media2),
5759 .stream_name = "MultiMedia2",
5760 .cpu_dai_name = "MultiMedia2",
5761 .platform_name = "msm-pcm-dsp.0",
5762 .dynamic = 1,
5763 .dpcm_playback = 1,
5764 .dpcm_capture = 1,
5765 .codec_dai_name = "snd-soc-dummy-dai",
5766 .codec_name = "snd-soc-dummy",
5767 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5768 SND_SOC_DPCM_TRIGGER_POST},
5769 .ignore_suspend = 1,
5770 /* this dainlink has playback support */
5771 .ignore_pmdown_time = 1,
5772 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5773 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5774 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5775 .name = "VoiceMMode1",
5776 .stream_name = "VoiceMMode1",
5777 .cpu_dai_name = "VoiceMMode1",
5778 .platform_name = "msm-pcm-voice",
5779 .dynamic = 1,
5780 .dpcm_playback = 1,
5781 .dpcm_capture = 1,
5782 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5783 SND_SOC_DPCM_TRIGGER_POST},
5784 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5785 .ignore_suspend = 1,
5786 .ignore_pmdown_time = 1,
5787 .codec_dai_name = "snd-soc-dummy-dai",
5788 .codec_name = "snd-soc-dummy",
5789 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5790 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5791 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5792 .name = "MSM VoIP",
5793 .stream_name = "VoIP",
5794 .cpu_dai_name = "VoIP",
5795 .platform_name = "msm-voip-dsp",
5796 .dynamic = 1,
5797 .dpcm_playback = 1,
5798 .dpcm_capture = 1,
5799 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5800 SND_SOC_DPCM_TRIGGER_POST},
5801 .codec_dai_name = "snd-soc-dummy-dai",
5802 .codec_name = "snd-soc-dummy",
5803 .ignore_suspend = 1,
5804 /* this dainlink has playback support */
5805 .ignore_pmdown_time = 1,
5806 .id = MSM_FRONTEND_DAI_VOIP,
5807 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5808 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5809 .name = MSM_DAILINK_NAME(ULL),
5810 .stream_name = "MultiMedia3",
5811 .cpu_dai_name = "MultiMedia3",
5812 .platform_name = "msm-pcm-dsp.2",
5813 .dynamic = 1,
5814 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5815 .dpcm_playback = 1,
5816 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5817 SND_SOC_DPCM_TRIGGER_POST},
5818 .codec_dai_name = "snd-soc-dummy-dai",
5819 .codec_name = "snd-soc-dummy",
5820 .ignore_suspend = 1,
5821 /* this dainlink has playback support */
5822 .ignore_pmdown_time = 1,
5823 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5824 },
5825 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5826 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5827 .name = "SLIMBUS_0 Hostless",
5828 .stream_name = "SLIMBUS_0 Hostless",
5829 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5830 .platform_name = "msm-pcm-hostless",
5831 .dynamic = 1,
5832 .dpcm_playback = 1,
5833 .dpcm_capture = 1,
5834 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5835 SND_SOC_DPCM_TRIGGER_POST},
5836 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5837 .ignore_suspend = 1,
5838 /* this dailink has playback support */
5839 .ignore_pmdown_time = 1,
5840 .codec_dai_name = "snd-soc-dummy-dai",
5841 .codec_name = "snd-soc-dummy",
5842 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5843 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5844 .name = "MSM AFE-PCM RX",
5845 .stream_name = "AFE-PROXY RX",
5846 .cpu_dai_name = "msm-dai-q6-dev.241",
5847 .codec_name = "msm-stub-codec.1",
5848 .codec_dai_name = "msm-stub-rx",
5849 .platform_name = "msm-pcm-afe",
5850 .dpcm_playback = 1,
5851 .ignore_suspend = 1,
5852 /* this dainlink has playback support */
5853 .ignore_pmdown_time = 1,
5854 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5855 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5856 .name = "MSM AFE-PCM TX",
5857 .stream_name = "AFE-PROXY TX",
5858 .cpu_dai_name = "msm-dai-q6-dev.240",
5859 .codec_name = "msm-stub-codec.1",
5860 .codec_dai_name = "msm-stub-tx",
5861 .platform_name = "msm-pcm-afe",
5862 .dpcm_capture = 1,
5863 .ignore_suspend = 1,
5864 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5865 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5866 .name = MSM_DAILINK_NAME(Compress1),
5867 .stream_name = "Compress1",
5868 .cpu_dai_name = "MultiMedia4",
5869 .platform_name = "msm-compress-dsp",
5870 .dynamic = 1,
5871 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5872 .dpcm_playback = 1,
5873 .dpcm_capture = 1,
5874 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5875 SND_SOC_DPCM_TRIGGER_POST},
5876 .codec_dai_name = "snd-soc-dummy-dai",
5877 .codec_name = "snd-soc-dummy",
5878 .ignore_suspend = 1,
5879 .ignore_pmdown_time = 1,
5880 /* this dainlink has playback support */
5881 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5882 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5883 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5884 .name = "AUXPCM Hostless",
5885 .stream_name = "AUXPCM Hostless",
5886 .cpu_dai_name = "AUXPCM_HOSTLESS",
5887 .platform_name = "msm-pcm-hostless",
5888 .dynamic = 1,
5889 .dpcm_playback = 1,
5890 .dpcm_capture = 1,
5891 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5892 SND_SOC_DPCM_TRIGGER_POST},
5893 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5894 .ignore_suspend = 1,
5895 /* this dainlink has playback support */
5896 .ignore_pmdown_time = 1,
5897 .codec_dai_name = "snd-soc-dummy-dai",
5898 .codec_name = "snd-soc-dummy",
5899 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5900 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5901 .name = "SLIMBUS_1 Hostless",
5902 .stream_name = "SLIMBUS_1 Hostless",
5903 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
5904 .platform_name = "msm-pcm-hostless",
5905 .dynamic = 1,
5906 .dpcm_playback = 1,
5907 .dpcm_capture = 1,
5908 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5909 SND_SOC_DPCM_TRIGGER_POST},
5910 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5911 .ignore_suspend = 1,
5912 /* this dailink has playback support */
5913 .ignore_pmdown_time = 1,
5914 .codec_dai_name = "snd-soc-dummy-dai",
5915 .codec_name = "snd-soc-dummy",
5916 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5917 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5918 .name = "SLIMBUS_3 Hostless",
5919 .stream_name = "SLIMBUS_3 Hostless",
5920 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
5921 .platform_name = "msm-pcm-hostless",
5922 .dynamic = 1,
5923 .dpcm_playback = 1,
5924 .dpcm_capture = 1,
5925 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5926 SND_SOC_DPCM_TRIGGER_POST},
5927 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5928 .ignore_suspend = 1,
5929 /* this dailink has playback support */
5930 .ignore_pmdown_time = 1,
5931 .codec_dai_name = "snd-soc-dummy-dai",
5932 .codec_name = "snd-soc-dummy",
5933 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5934 {/* hw:x,12 */
5935 .name = "SLIMBUS_7 Hostless",
5936 .stream_name = "SLIMBUS_7 Hostless",
5937 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5938 .platform_name = "msm-pcm-hostless",
5939 .dynamic = 1,
5940 .dpcm_playback = 1,
5941 .dpcm_capture = 1,
5942 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5943 SND_SOC_DPCM_TRIGGER_POST},
5944 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5945 .ignore_suspend = 1,
5946 /* this dailink has playback support */
5947 .ignore_pmdown_time = 1,
5948 .codec_dai_name = "snd-soc-dummy-dai",
5949 .codec_name = "snd-soc-dummy",
5950 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5951 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5952 .name = MSM_DAILINK_NAME(LowLatency),
5953 .stream_name = "MultiMedia5",
5954 .cpu_dai_name = "MultiMedia5",
5955 .platform_name = "msm-pcm-dsp.1",
5956 .dynamic = 1,
5957 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5958 .dpcm_playback = 1,
5959 .dpcm_capture = 1,
5960 .codec_dai_name = "snd-soc-dummy-dai",
5961 .codec_name = "snd-soc-dummy",
5962 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5963 SND_SOC_DPCM_TRIGGER_POST},
5964 .ignore_suspend = 1,
5965 /* this dainlink has playback support */
5966 .ignore_pmdown_time = 1,
5967 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5968 .ops = &msm_fe_qos_ops,
5969 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5970 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5971 .name = "Listen 1 Audio Service",
5972 .stream_name = "Listen 1 Audio Service",
5973 .cpu_dai_name = "LSM1",
5974 .platform_name = "msm-lsm-client",
5975 .dynamic = 1,
5976 .dpcm_capture = 1,
5977 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5978 SND_SOC_DPCM_TRIGGER_POST },
5979 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5980 .ignore_suspend = 1,
5981 .codec_dai_name = "snd-soc-dummy-dai",
5982 .codec_name = "snd-soc-dummy",
5983 .id = MSM_FRONTEND_DAI_LSM1,
5984 },
5985 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]5986 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]5987 .name = MSM_DAILINK_NAME(Compress2),
5988 .stream_name = "Compress2",
5989 .cpu_dai_name = "MultiMedia7",
5990 .platform_name = "msm-compress-dsp",
5991 .dynamic = 1,
5992 .dpcm_playback = 1,
5993 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5994 SND_SOC_DPCM_TRIGGER_POST},
5995 .codec_dai_name = "snd-soc-dummy-dai",
5996 .codec_name = "snd-soc-dummy",
5997 .ignore_suspend = 1,
5998 .ignore_pmdown_time = 1,
5999 /* this dainlink has playback support */
6000 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6001 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6002 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6003 .name = MSM_DAILINK_NAME(MultiMedia10),
6004 .stream_name = "MultiMedia10",
6005 .cpu_dai_name = "MultiMedia10",
6006 .platform_name = "msm-pcm-dsp.1",
6007 .dynamic = 1,
6008 .dpcm_playback = 1,
6009 .dpcm_capture = 1,
6010 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6011 SND_SOC_DPCM_TRIGGER_POST},
6012 .codec_dai_name = "snd-soc-dummy-dai",
6013 .codec_name = "snd-soc-dummy",
6014 .ignore_suspend = 1,
6015 .ignore_pmdown_time = 1,
6016 /* this dainlink has playback support */
6017 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6018 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6019 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6020 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6021 .stream_name = "MM_NOIRQ",
6022 .cpu_dai_name = "MultiMedia8",
6023 .platform_name = "msm-pcm-dsp-noirq",
6024 .dynamic = 1,
6025 .dpcm_playback = 1,
6026 .dpcm_capture = 1,
6027 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6028 SND_SOC_DPCM_TRIGGER_POST},
6029 .codec_dai_name = "snd-soc-dummy-dai",
6030 .codec_name = "snd-soc-dummy",
6031 .ignore_suspend = 1,
6032 .ignore_pmdown_time = 1,
6033 /* this dainlink has playback support */
6034 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6035 .ops = &msm_fe_qos_ops,
6036 },
6037 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6038 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6039 .name = "HDMI_RX_HOSTLESS",
6040 .stream_name = "HDMI_RX_HOSTLESS",
6041 .cpu_dai_name = "HDMI_HOSTLESS",
6042 .platform_name = "msm-pcm-hostless",
6043 .dynamic = 1,
6044 .dpcm_playback = 1,
6045 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6046 SND_SOC_DPCM_TRIGGER_POST},
6047 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6048 .ignore_suspend = 1,
6049 .ignore_pmdown_time = 1,
6050 .codec_dai_name = "snd-soc-dummy-dai",
6051 .codec_name = "snd-soc-dummy",
6052 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6053 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6054 .name = "VoiceMMode2",
6055 .stream_name = "VoiceMMode2",
6056 .cpu_dai_name = "VoiceMMode2",
6057 .platform_name = "msm-pcm-voice",
6058 .dynamic = 1,
6059 .dpcm_playback = 1,
6060 .dpcm_capture = 1,
6061 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6062 SND_SOC_DPCM_TRIGGER_POST},
6063 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6064 .ignore_suspend = 1,
6065 .ignore_pmdown_time = 1,
6066 .codec_dai_name = "snd-soc-dummy-dai",
6067 .codec_name = "snd-soc-dummy",
6068 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6069 },
6070 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6071 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6072 .name = "Listen 2 Audio Service",
6073 .stream_name = "Listen 2 Audio Service",
6074 .cpu_dai_name = "LSM2",
6075 .platform_name = "msm-lsm-client",
6076 .dynamic = 1,
6077 .dpcm_capture = 1,
6078 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6079 SND_SOC_DPCM_TRIGGER_POST },
6080 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6081 .ignore_suspend = 1,
6082 .codec_dai_name = "snd-soc-dummy-dai",
6083 .codec_name = "snd-soc-dummy",
6084 .id = MSM_FRONTEND_DAI_LSM2,
6085 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6086 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6087 .name = "Listen 3 Audio Service",
6088 .stream_name = "Listen 3 Audio Service",
6089 .cpu_dai_name = "LSM3",
6090 .platform_name = "msm-lsm-client",
6091 .dynamic = 1,
6092 .dpcm_capture = 1,
6093 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6094 SND_SOC_DPCM_TRIGGER_POST },
6095 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6096 .ignore_suspend = 1,
6097 .codec_dai_name = "snd-soc-dummy-dai",
6098 .codec_name = "snd-soc-dummy",
6099 .id = MSM_FRONTEND_DAI_LSM3,
6100 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6101 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6102 .name = "Listen 4 Audio Service",
6103 .stream_name = "Listen 4 Audio Service",
6104 .cpu_dai_name = "LSM4",
6105 .platform_name = "msm-lsm-client",
6106 .dynamic = 1,
6107 .dpcm_capture = 1,
6108 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6109 SND_SOC_DPCM_TRIGGER_POST },
6110 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6111 .ignore_suspend = 1,
6112 .codec_dai_name = "snd-soc-dummy-dai",
6113 .codec_name = "snd-soc-dummy",
6114 .id = MSM_FRONTEND_DAI_LSM4,
6115 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6116 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6117 .name = "Listen 5 Audio Service",
6118 .stream_name = "Listen 5 Audio Service",
6119 .cpu_dai_name = "LSM5",
6120 .platform_name = "msm-lsm-client",
6121 .dynamic = 1,
6122 .dpcm_capture = 1,
6123 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6124 SND_SOC_DPCM_TRIGGER_POST },
6125 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6126 .ignore_suspend = 1,
6127 .codec_dai_name = "snd-soc-dummy-dai",
6128 .codec_name = "snd-soc-dummy",
6129 .id = MSM_FRONTEND_DAI_LSM5,
6130 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6131 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6132 .name = "Listen 6 Audio Service",
6133 .stream_name = "Listen 6 Audio Service",
6134 .cpu_dai_name = "LSM6",
6135 .platform_name = "msm-lsm-client",
6136 .dynamic = 1,
6137 .dpcm_capture = 1,
6138 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6139 SND_SOC_DPCM_TRIGGER_POST },
6140 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6141 .ignore_suspend = 1,
6142 .codec_dai_name = "snd-soc-dummy-dai",
6143 .codec_name = "snd-soc-dummy",
6144 .id = MSM_FRONTEND_DAI_LSM6,
6145 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6146 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6147 .name = "Listen 7 Audio Service",
6148 .stream_name = "Listen 7 Audio Service",
6149 .cpu_dai_name = "LSM7",
6150 .platform_name = "msm-lsm-client",
6151 .dynamic = 1,
6152 .dpcm_capture = 1,
6153 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6154 SND_SOC_DPCM_TRIGGER_POST },
6155 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6156 .ignore_suspend = 1,
6157 .codec_dai_name = "snd-soc-dummy-dai",
6158 .codec_name = "snd-soc-dummy",
6159 .id = MSM_FRONTEND_DAI_LSM7,
6160 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6161 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6162 .name = "Listen 8 Audio Service",
6163 .stream_name = "Listen 8 Audio Service",
6164 .cpu_dai_name = "LSM8",
6165 .platform_name = "msm-lsm-client",
6166 .dynamic = 1,
6167 .dpcm_capture = 1,
6168 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6169 SND_SOC_DPCM_TRIGGER_POST },
6170 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6171 .ignore_suspend = 1,
6172 .codec_dai_name = "snd-soc-dummy-dai",
6173 .codec_name = "snd-soc-dummy",
6174 .id = MSM_FRONTEND_DAI_LSM8,
6175 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6176 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6177 .name = MSM_DAILINK_NAME(Media9),
6178 .stream_name = "MultiMedia9",
6179 .cpu_dai_name = "MultiMedia9",
6180 .platform_name = "msm-pcm-dsp.0",
6181 .dynamic = 1,
6182 .dpcm_playback = 1,
6183 .dpcm_capture = 1,
6184 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6185 SND_SOC_DPCM_TRIGGER_POST},
6186 .codec_dai_name = "snd-soc-dummy-dai",
6187 .codec_name = "snd-soc-dummy",
6188 .ignore_suspend = 1,
6189 /* this dainlink has playback support */
6190 .ignore_pmdown_time = 1,
6191 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6192 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6193 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6194 .name = MSM_DAILINK_NAME(Compress4),
6195 .stream_name = "Compress4",
6196 .cpu_dai_name = "MultiMedia11",
6197 .platform_name = "msm-compress-dsp",
6198 .dynamic = 1,
6199 .dpcm_playback = 1,
6200 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6201 SND_SOC_DPCM_TRIGGER_POST},
6202 .codec_dai_name = "snd-soc-dummy-dai",
6203 .codec_name = "snd-soc-dummy",
6204 .ignore_suspend = 1,
6205 .ignore_pmdown_time = 1,
6206 /* this dainlink has playback support */
6207 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6208 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6209 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6210 .name = MSM_DAILINK_NAME(Compress5),
6211 .stream_name = "Compress5",
6212 .cpu_dai_name = "MultiMedia12",
6213 .platform_name = "msm-compress-dsp",
6214 .dynamic = 1,
6215 .dpcm_playback = 1,
6216 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6217 SND_SOC_DPCM_TRIGGER_POST},
6218 .codec_dai_name = "snd-soc-dummy-dai",
6219 .codec_name = "snd-soc-dummy",
6220 .ignore_suspend = 1,
6221 .ignore_pmdown_time = 1,
6222 /* this dainlink has playback support */
6223 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6224 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6225 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6226 .name = MSM_DAILINK_NAME(Compress6),
6227 .stream_name = "Compress6",
6228 .cpu_dai_name = "MultiMedia13",
6229 .platform_name = "msm-compress-dsp",
6230 .dynamic = 1,
6231 .dpcm_playback = 1,
6232 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6233 SND_SOC_DPCM_TRIGGER_POST},
6234 .codec_dai_name = "snd-soc-dummy-dai",
6235 .codec_name = "snd-soc-dummy",
6236 .ignore_suspend = 1,
6237 .ignore_pmdown_time = 1,
6238 /* this dainlink has playback support */
6239 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6240 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6241 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6242 .name = MSM_DAILINK_NAME(Compress7),
6243 .stream_name = "Compress7",
6244 .cpu_dai_name = "MultiMedia14",
6245 .platform_name = "msm-compress-dsp",
6246 .dynamic = 1,
6247 .dpcm_playback = 1,
6248 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6249 SND_SOC_DPCM_TRIGGER_POST},
6250 .codec_dai_name = "snd-soc-dummy-dai",
6251 .codec_name = "snd-soc-dummy",
6252 .ignore_suspend = 1,
6253 .ignore_pmdown_time = 1,
6254 /* this dainlink has playback support */
6255 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6256 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6257 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6258 .name = MSM_DAILINK_NAME(Compress8),
6259 .stream_name = "Compress8",
6260 .cpu_dai_name = "MultiMedia15",
6261 .platform_name = "msm-compress-dsp",
6262 .dynamic = 1,
6263 .dpcm_playback = 1,
6264 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6265 SND_SOC_DPCM_TRIGGER_POST},
6266 .codec_dai_name = "snd-soc-dummy-dai",
6267 .codec_name = "snd-soc-dummy",
6268 .ignore_suspend = 1,
6269 .ignore_pmdown_time = 1,
6270 /* this dainlink has playback support */
6271 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6272 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6273 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6274 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6275 .stream_name = "MM_NOIRQ_2",
6276 .cpu_dai_name = "MultiMedia16",
6277 .platform_name = "msm-pcm-dsp-noirq",
6278 .dynamic = 1,
6279 .dpcm_playback = 1,
6280 .dpcm_capture = 1,
6281 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6282 SND_SOC_DPCM_TRIGGER_POST},
6283 .codec_dai_name = "snd-soc-dummy-dai",
6284 .codec_name = "snd-soc-dummy",
6285 .ignore_suspend = 1,
6286 .ignore_pmdown_time = 1,
6287 /* this dainlink has playback support */
6288 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6289 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6290 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6291 .name = "SLIMBUS_8 Hostless",
6292 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6293 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6294 .platform_name = "msm-pcm-hostless",
6295 .dynamic = 1,
6296 .dpcm_capture = 1,
6297 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6298 SND_SOC_DPCM_TRIGGER_POST},
6299 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6300 .ignore_suspend = 1,
6301 .codec_dai_name = "snd-soc-dummy-dai",
6302 .codec_name = "snd-soc-dummy",
6303 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6304 {/* hw:x,35 */
6305 .name = "CDC_DMA Hostless",
6306 .stream_name = "CDC_DMA Hostless",
6307 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6308 .platform_name = "msm-pcm-hostless",
6309 .dynamic = 1,
6310 .dpcm_playback = 1,
6311 .dpcm_capture = 1,
6312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6313 SND_SOC_DPCM_TRIGGER_POST},
6314 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6315 .ignore_suspend = 1,
6316 /* this dailink has playback support */
6317 .ignore_pmdown_time = 1,
6318 .codec_dai_name = "snd-soc-dummy-dai",
6319 .codec_name = "snd-soc-dummy",
6320 },
6321 {/* hw:x,36 */
6322 .name = "TX3_CDC_DMA Hostless",
6323 .stream_name = "TX3_CDC_DMA Hostless",
6324 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6325 .platform_name = "msm-pcm-hostless",
6326 .dynamic = 1,
6327 .dpcm_capture = 1,
6328 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6329 SND_SOC_DPCM_TRIGGER_POST},
6330 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6331 .ignore_suspend = 1,
6332 .codec_dai_name = "snd-soc-dummy-dai",
6333 .codec_name = "snd-soc-dummy",
6334 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6335};
6336
6337
6338static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6339 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6340 .name = LPASS_BE_SLIMBUS_4_TX,
6341 .stream_name = "Slimbus4 Capture",
6342 .cpu_dai_name = "msm-dai-q6-dev.16393",
6343 .platform_name = "msm-pcm-hostless",
6344 .codec_name = "tavil_codec",
6345 .codec_dai_name = "tavil_vifeedback",
6346 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6347 .be_hw_params_fixup = msm_be_hw_params_fixup,
6348 .ops = &msm_be_ops,
6349 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6350 .ignore_suspend = 1,
6351 },
6352 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6353 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6354 .name = "SLIMBUS_2 Hostless Playback",
6355 .stream_name = "SLIMBUS_2 Hostless Playback",
6356 .cpu_dai_name = "msm-dai-q6-dev.16388",
6357 .platform_name = "msm-pcm-hostless",
6358 .codec_name = "tavil_codec",
6359 .codec_dai_name = "tavil_rx2",
6360 .ignore_suspend = 1,
6361 .ignore_pmdown_time = 1,
6362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6363 .ops = &msm_slimbus_2_be_ops,
6364 },
6365 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6366 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6367 .name = "SLIMBUS_2 Hostless Capture",
6368 .stream_name = "SLIMBUS_2 Hostless Capture",
6369 .cpu_dai_name = "msm-dai-q6-dev.16389",
6370 .platform_name = "msm-pcm-hostless",
6371 .codec_name = "tavil_codec",
6372 .codec_dai_name = "tavil_tx2",
6373 .ignore_suspend = 1,
6374 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6375 .ops = &msm_slimbus_2_be_ops,
6376 },
6377};
6378
6379static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +0530[diff] [blame]6380 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]6381 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6382 .stream_name = "WSA CDC DMA0 Capture",
6383 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6384 .platform_name = "msm-pcm-hostless",
6385 .codec_name = "bolero_codec",
6386 .codec_dai_name = "wsa_macro_vifeedback",
6387 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6388 .be_hw_params_fixup = msm_be_hw_params_fixup,
6389 .ignore_suspend = 1,
6390 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6391 .ops = &msm_cdc_dma_be_ops,
6392 },
6393};
6394
6395static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6396 {
6397 .name = MSM_DAILINK_NAME(ASM Loopback),
6398 .stream_name = "MultiMedia6",
6399 .cpu_dai_name = "MultiMedia6",
6400 .platform_name = "msm-pcm-loopback",
6401 .dynamic = 1,
6402 .dpcm_playback = 1,
6403 .dpcm_capture = 1,
6404 .codec_dai_name = "snd-soc-dummy-dai",
6405 .codec_name = "snd-soc-dummy",
6406 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6407 SND_SOC_DPCM_TRIGGER_POST},
6408 .ignore_suspend = 1,
6409 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6410 .ignore_pmdown_time = 1,
6411 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6412 },
6413 {
6414 .name = "USB Audio Hostless",
6415 .stream_name = "USB Audio Hostless",
6416 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6417 .platform_name = "msm-pcm-hostless",
6418 .dynamic = 1,
6419 .dpcm_playback = 1,
6420 .dpcm_capture = 1,
6421 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6422 SND_SOC_DPCM_TRIGGER_POST},
6423 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6424 .ignore_suspend = 1,
6425 .ignore_pmdown_time = 1,
6426 .codec_dai_name = "snd-soc-dummy-dai",
6427 .codec_name = "snd-soc-dummy",
6428 },
6429};
6430
6431static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6432 /* Backend AFE DAI Links */
6433 {
6434 .name = LPASS_BE_AFE_PCM_RX,
6435 .stream_name = "AFE Playback",
6436 .cpu_dai_name = "msm-dai-q6-dev.224",
6437 .platform_name = "msm-pcm-routing",
6438 .codec_name = "msm-stub-codec.1",
6439 .codec_dai_name = "msm-stub-rx",
6440 .no_pcm = 1,
6441 .dpcm_playback = 1,
6442 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6443 .be_hw_params_fixup = msm_be_hw_params_fixup,
6444 /* this dainlink has playback support */
6445 .ignore_pmdown_time = 1,
6446 .ignore_suspend = 1,
6447 },
6448 {
6449 .name = LPASS_BE_AFE_PCM_TX,
6450 .stream_name = "AFE Capture",
6451 .cpu_dai_name = "msm-dai-q6-dev.225",
6452 .platform_name = "msm-pcm-routing",
6453 .codec_name = "msm-stub-codec.1",
6454 .codec_dai_name = "msm-stub-tx",
6455 .no_pcm = 1,
6456 .dpcm_capture = 1,
6457 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6458 .be_hw_params_fixup = msm_be_hw_params_fixup,
6459 .ignore_suspend = 1,
6460 },
6461 /* Incall Record Uplink BACK END DAI Link */
6462 {
6463 .name = LPASS_BE_INCALL_RECORD_TX,
6464 .stream_name = "Voice Uplink Capture",
6465 .cpu_dai_name = "msm-dai-q6-dev.32772",
6466 .platform_name = "msm-pcm-routing",
6467 .codec_name = "msm-stub-codec.1",
6468 .codec_dai_name = "msm-stub-tx",
6469 .no_pcm = 1,
6470 .dpcm_capture = 1,
6471 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6472 .be_hw_params_fixup = msm_be_hw_params_fixup,
6473 .ignore_suspend = 1,
6474 },
6475 /* Incall Record Downlink BACK END DAI Link */
6476 {
6477 .name = LPASS_BE_INCALL_RECORD_RX,
6478 .stream_name = "Voice Downlink Capture",
6479 .cpu_dai_name = "msm-dai-q6-dev.32771",
6480 .platform_name = "msm-pcm-routing",
6481 .codec_name = "msm-stub-codec.1",
6482 .codec_dai_name = "msm-stub-tx",
6483 .no_pcm = 1,
6484 .dpcm_capture = 1,
6485 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6486 .be_hw_params_fixup = msm_be_hw_params_fixup,
6487 .ignore_suspend = 1,
6488 },
6489 /* Incall Music BACK END DAI Link */
6490 {
6491 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6492 .stream_name = "Voice Farend Playback",
6493 .cpu_dai_name = "msm-dai-q6-dev.32773",
6494 .platform_name = "msm-pcm-routing",
6495 .codec_name = "msm-stub-codec.1",
6496 .codec_dai_name = "msm-stub-rx",
6497 .no_pcm = 1,
6498 .dpcm_playback = 1,
6499 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6500 .be_hw_params_fixup = msm_be_hw_params_fixup,
6501 .ignore_suspend = 1,
6502 .ignore_pmdown_time = 1,
6503 },
6504 /* Incall Music 2 BACK END DAI Link */
6505 {
6506 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6507 .stream_name = "Voice2 Farend Playback",
6508 .cpu_dai_name = "msm-dai-q6-dev.32770",
6509 .platform_name = "msm-pcm-routing",
6510 .codec_name = "msm-stub-codec.1",
6511 .codec_dai_name = "msm-stub-rx",
6512 .no_pcm = 1,
6513 .dpcm_playback = 1,
6514 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6515 .be_hw_params_fixup = msm_be_hw_params_fixup,
6516 .ignore_suspend = 1,
6517 .ignore_pmdown_time = 1,
6518 },
6519 {
6520 .name = LPASS_BE_USB_AUDIO_RX,
6521 .stream_name = "USB Audio Playback",
6522 .cpu_dai_name = "msm-dai-q6-dev.28672",
6523 .platform_name = "msm-pcm-routing",
6524 .codec_name = "msm-stub-codec.1",
6525 .codec_dai_name = "msm-stub-rx",
6526 .no_pcm = 1,
6527 .dpcm_playback = 1,
6528 .id = MSM_BACKEND_DAI_USB_RX,
6529 .be_hw_params_fixup = msm_be_hw_params_fixup,
6530 .ignore_pmdown_time = 1,
6531 .ignore_suspend = 1,
6532 },
6533 {
6534 .name = LPASS_BE_USB_AUDIO_TX,
6535 .stream_name = "USB Audio Capture",
6536 .cpu_dai_name = "msm-dai-q6-dev.28673",
6537 .platform_name = "msm-pcm-routing",
6538 .codec_name = "msm-stub-codec.1",
6539 .codec_dai_name = "msm-stub-tx",
6540 .no_pcm = 1,
6541 .dpcm_capture = 1,
6542 .id = MSM_BACKEND_DAI_USB_TX,
6543 .be_hw_params_fixup = msm_be_hw_params_fixup,
6544 .ignore_suspend = 1,
6545 },
6546 {
6547 .name = LPASS_BE_PRI_TDM_RX_0,
6548 .stream_name = "Primary TDM0 Playback",
6549 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6550 .platform_name = "msm-pcm-routing",
6551 .codec_name = "msm-stub-codec.1",
6552 .codec_dai_name = "msm-stub-rx",
6553 .no_pcm = 1,
6554 .dpcm_playback = 1,
6555 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6556 .be_hw_params_fixup = msm_be_hw_params_fixup,
6557 .ops = &sm6150_tdm_be_ops,
6558 .ignore_suspend = 1,
6559 .ignore_pmdown_time = 1,
6560 },
6561 {
6562 .name = LPASS_BE_PRI_TDM_TX_0,
6563 .stream_name = "Primary TDM0 Capture",
6564 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6565 .platform_name = "msm-pcm-routing",
6566 .codec_name = "msm-stub-codec.1",
6567 .codec_dai_name = "msm-stub-tx",
6568 .no_pcm = 1,
6569 .dpcm_capture = 1,
6570 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6571 .be_hw_params_fixup = msm_be_hw_params_fixup,
6572 .ops = &sm6150_tdm_be_ops,
6573 .ignore_suspend = 1,
6574 },
6575 {
6576 .name = LPASS_BE_SEC_TDM_RX_0,
6577 .stream_name = "Secondary TDM0 Playback",
6578 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6579 .platform_name = "msm-pcm-routing",
6580 .codec_name = "msm-stub-codec.1",
6581 .codec_dai_name = "msm-stub-rx",
6582 .no_pcm = 1,
6583 .dpcm_playback = 1,
6584 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6585 .be_hw_params_fixup = msm_be_hw_params_fixup,
6586 .ops = &sm6150_tdm_be_ops,
6587 .ignore_suspend = 1,
6588 .ignore_pmdown_time = 1,
6589 },
6590 {
6591 .name = LPASS_BE_SEC_TDM_TX_0,
6592 .stream_name = "Secondary TDM0 Capture",
6593 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6594 .platform_name = "msm-pcm-routing",
6595 .codec_name = "msm-stub-codec.1",
6596 .codec_dai_name = "msm-stub-tx",
6597 .no_pcm = 1,
6598 .dpcm_capture = 1,
6599 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6600 .be_hw_params_fixup = msm_be_hw_params_fixup,
6601 .ops = &sm6150_tdm_be_ops,
6602 .ignore_suspend = 1,
6603 },
6604 {
6605 .name = LPASS_BE_TERT_TDM_RX_0,
6606 .stream_name = "Tertiary TDM0 Playback",
6607 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6608 .platform_name = "msm-pcm-routing",
6609 .codec_name = "msm-stub-codec.1",
6610 .codec_dai_name = "msm-stub-rx",
6611 .no_pcm = 1,
6612 .dpcm_playback = 1,
6613 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6614 .be_hw_params_fixup = msm_be_hw_params_fixup,
6615 .ops = &sm6150_tdm_be_ops,
6616 .ignore_suspend = 1,
6617 .ignore_pmdown_time = 1,
6618 },
6619 {
6620 .name = LPASS_BE_TERT_TDM_TX_0,
6621 .stream_name = "Tertiary TDM0 Capture",
6622 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6623 .platform_name = "msm-pcm-routing",
6624 .codec_name = "msm-stub-codec.1",
6625 .codec_dai_name = "msm-stub-tx",
6626 .no_pcm = 1,
6627 .dpcm_capture = 1,
6628 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6629 .be_hw_params_fixup = msm_be_hw_params_fixup,
6630 .ops = &sm6150_tdm_be_ops,
6631 .ignore_suspend = 1,
6632 },
6633 {
6634 .name = LPASS_BE_QUAT_TDM_RX_0,
6635 .stream_name = "Quaternary TDM0 Playback",
6636 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6637 .platform_name = "msm-pcm-routing",
6638 .codec_name = "msm-stub-codec.1",
6639 .codec_dai_name = "msm-stub-rx",
6640 .no_pcm = 1,
6641 .dpcm_playback = 1,
6642 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6643 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6644 .ops = &sm6150_tdm_be_ops,
6645 .ignore_suspend = 1,
6646 .ignore_pmdown_time = 1,
6647 },
6648 {
6649 .name = LPASS_BE_QUAT_TDM_TX_0,
6650 .stream_name = "Quaternary TDM0 Capture",
6651 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6652 .platform_name = "msm-pcm-routing",
6653 .codec_name = "msm-stub-codec.1",
6654 .codec_dai_name = "msm-stub-tx",
6655 .no_pcm = 1,
6656 .dpcm_capture = 1,
6657 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6658 .be_hw_params_fixup = msm_be_hw_params_fixup,
6659 .ops = &sm6150_tdm_be_ops,
6660 .ignore_suspend = 1,
6661 },
6662};
6663
6664static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6665 {
6666 .name = LPASS_BE_SLIMBUS_0_RX,
6667 .stream_name = "Slimbus Playback",
6668 .cpu_dai_name = "msm-dai-q6-dev.16384",
6669 .platform_name = "msm-pcm-routing",
6670 .codec_name = "tavil_codec",
6671 .codec_dai_name = "tavil_rx1",
6672 .no_pcm = 1,
6673 .dpcm_playback = 1,
6674 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6675 .init = &msm_audrx_tavil_init,
6676 .be_hw_params_fixup = msm_be_hw_params_fixup,
6677 /* this dainlink has playback support */
6678 .ignore_pmdown_time = 1,
6679 .ignore_suspend = 1,
6680 .ops = &msm_be_ops,
6681 },
6682 {
6683 .name = LPASS_BE_SLIMBUS_0_TX,
6684 .stream_name = "Slimbus Capture",
6685 .cpu_dai_name = "msm-dai-q6-dev.16385",
6686 .platform_name = "msm-pcm-routing",
6687 .codec_name = "tavil_codec",
6688 .codec_dai_name = "tavil_tx1",
6689 .no_pcm = 1,
6690 .dpcm_capture = 1,
6691 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6692 .be_hw_params_fixup = msm_be_hw_params_fixup,
6693 .ignore_suspend = 1,
6694 .ops = &msm_be_ops,
6695 },
6696 {
6697 .name = LPASS_BE_SLIMBUS_1_RX,
6698 .stream_name = "Slimbus1 Playback",
6699 .cpu_dai_name = "msm-dai-q6-dev.16386",
6700 .platform_name = "msm-pcm-routing",
6701 .codec_name = "tavil_codec",
6702 .codec_dai_name = "tavil_rx1",
6703 .no_pcm = 1,
6704 .dpcm_playback = 1,
6705 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6706 .be_hw_params_fixup = msm_be_hw_params_fixup,
6707 .ops = &msm_be_ops,
6708 /* dai link has playback support */
6709 .ignore_pmdown_time = 1,
6710 .ignore_suspend = 1,
6711 },
6712 {
6713 .name = LPASS_BE_SLIMBUS_1_TX,
6714 .stream_name = "Slimbus1 Capture",
6715 .cpu_dai_name = "msm-dai-q6-dev.16387",
6716 .platform_name = "msm-pcm-routing",
6717 .codec_name = "tavil_codec",
6718 .codec_dai_name = "tavil_tx3",
6719 .no_pcm = 1,
6720 .dpcm_capture = 1,
6721 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6722 .be_hw_params_fixup = msm_be_hw_params_fixup,
6723 .ops = &msm_be_ops,
6724 .ignore_suspend = 1,
6725 },
6726 {
6727 .name = LPASS_BE_SLIMBUS_2_RX,
6728 .stream_name = "Slimbus2 Playback",
6729 .cpu_dai_name = "msm-dai-q6-dev.16388",
6730 .platform_name = "msm-pcm-routing",
6731 .codec_name = "tavil_codec",
6732 .codec_dai_name = "tavil_rx2",
6733 .no_pcm = 1,
6734 .dpcm_playback = 1,
6735 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6736 .be_hw_params_fixup = msm_be_hw_params_fixup,
6737 .ops = &msm_be_ops,
6738 .ignore_pmdown_time = 1,
6739 .ignore_suspend = 1,
6740 },
6741 {
6742 .name = LPASS_BE_SLIMBUS_3_RX,
6743 .stream_name = "Slimbus3 Playback",
6744 .cpu_dai_name = "msm-dai-q6-dev.16390",
6745 .platform_name = "msm-pcm-routing",
6746 .codec_name = "tavil_codec",
6747 .codec_dai_name = "tavil_rx1",
6748 .no_pcm = 1,
6749 .dpcm_playback = 1,
6750 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6751 .be_hw_params_fixup = msm_be_hw_params_fixup,
6752 .ops = &msm_be_ops,
6753 /* dai link has playback support */
6754 .ignore_pmdown_time = 1,
6755 .ignore_suspend = 1,
6756 },
6757 {
6758 .name = LPASS_BE_SLIMBUS_3_TX,
6759 .stream_name = "Slimbus3 Capture",
6760 .cpu_dai_name = "msm-dai-q6-dev.16391",
6761 .platform_name = "msm-pcm-routing",
6762 .codec_name = "tavil_codec",
6763 .codec_dai_name = "tavil_tx1",
6764 .no_pcm = 1,
6765 .dpcm_capture = 1,
6766 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6767 .be_hw_params_fixup = msm_be_hw_params_fixup,
6768 .ops = &msm_be_ops,
6769 .ignore_suspend = 1,
6770 },
6771 {
6772 .name = LPASS_BE_SLIMBUS_4_RX,
6773 .stream_name = "Slimbus4 Playback",
6774 .cpu_dai_name = "msm-dai-q6-dev.16392",
6775 .platform_name = "msm-pcm-routing",
6776 .codec_name = "tavil_codec",
6777 .codec_dai_name = "tavil_rx1",
6778 .no_pcm = 1,
6779 .dpcm_playback = 1,
6780 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6781 .be_hw_params_fixup = msm_be_hw_params_fixup,
6782 .ops = &msm_be_ops,
6783 /* dai link has playback support */
6784 .ignore_pmdown_time = 1,
6785 .ignore_suspend = 1,
6786 },
6787 {
6788 .name = LPASS_BE_SLIMBUS_5_RX,
6789 .stream_name = "Slimbus5 Playback",
6790 .cpu_dai_name = "msm-dai-q6-dev.16394",
6791 .platform_name = "msm-pcm-routing",
6792 .codec_name = "tavil_codec",
6793 .codec_dai_name = "tavil_rx3",
6794 .no_pcm = 1,
6795 .dpcm_playback = 1,
6796 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6797 .be_hw_params_fixup = msm_be_hw_params_fixup,
6798 .ops = &msm_be_ops,
6799 /* dai link has playback support */
6800 .ignore_pmdown_time = 1,
6801 .ignore_suspend = 1,
6802 },
6803 /* MAD BE */
6804 {
6805 .name = LPASS_BE_SLIMBUS_5_TX,
6806 .stream_name = "Slimbus5 Capture",
6807 .cpu_dai_name = "msm-dai-q6-dev.16395",
6808 .platform_name = "msm-pcm-routing",
6809 .codec_name = "tavil_codec",
6810 .codec_dai_name = "tavil_mad1",
6811 .no_pcm = 1,
6812 .dpcm_capture = 1,
6813 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6814 .be_hw_params_fixup = msm_be_hw_params_fixup,
6815 .ops = &msm_be_ops,
6816 .ignore_suspend = 1,
6817 },
6818 {
6819 .name = LPASS_BE_SLIMBUS_6_RX,
6820 .stream_name = "Slimbus6 Playback",
6821 .cpu_dai_name = "msm-dai-q6-dev.16396",
6822 .platform_name = "msm-pcm-routing",
6823 .codec_name = "tavil_codec",
6824 .codec_dai_name = "tavil_rx4",
6825 .no_pcm = 1,
6826 .dpcm_playback = 1,
6827 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6828 .be_hw_params_fixup = msm_be_hw_params_fixup,
6829 .ops = &msm_be_ops,
6830 /* dai link has playback support */
6831 .ignore_pmdown_time = 1,
6832 .ignore_suspend = 1,
6833 },
6834 /* Slimbus VI Recording */
6835 {
6836 .name = LPASS_BE_SLIMBUS_TX_VI,
6837 .stream_name = "Slimbus4 Capture",
6838 .cpu_dai_name = "msm-dai-q6-dev.16393",
6839 .platform_name = "msm-pcm-routing",
6840 .codec_name = "tavil_codec",
6841 .codec_dai_name = "tavil_vifeedback",
6842 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6843 .be_hw_params_fixup = msm_be_hw_params_fixup,
6844 .ops = &msm_be_ops,
6845 .ignore_suspend = 1,
6846 .no_pcm = 1,
6847 .dpcm_capture = 1,
6848 },
6849};
6850
6851static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6852 {
6853 .name = LPASS_BE_SLIMBUS_7_RX,
6854 .stream_name = "Slimbus7 Playback",
6855 .cpu_dai_name = "msm-dai-q6-dev.16398",
6856 .platform_name = "msm-pcm-routing",
6857 .codec_name = "btfmslim_slave",
6858 /* BT codec driver determines capabilities based on
6859 * dai name, bt codecdai name should always contains
6860 * supported usecase information
6861 */
6862 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6863 .no_pcm = 1,
6864 .dpcm_playback = 1,
6865 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6866 .be_hw_params_fixup = msm_be_hw_params_fixup,
6867 .ops = &msm_wcn_ops,
6868 /* dai link has playback support */
6869 .ignore_pmdown_time = 1,
6870 .ignore_suspend = 1,
6871 },
6872 {
6873 .name = LPASS_BE_SLIMBUS_7_TX,
6874 .stream_name = "Slimbus7 Capture",
6875 .cpu_dai_name = "msm-dai-q6-dev.16399",
6876 .platform_name = "msm-pcm-routing",
6877 .codec_name = "btfmslim_slave",
6878 .codec_dai_name = "btfm_bt_sco_slim_tx",
6879 .no_pcm = 1,
6880 .dpcm_capture = 1,
6881 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6882 .be_hw_params_fixup = msm_be_hw_params_fixup,
6883 .ops = &msm_wcn_ops,
6884 .ignore_suspend = 1,
6885 },
6886 {
6887 .name = LPASS_BE_SLIMBUS_8_TX,
6888 .stream_name = "Slimbus8 Capture",
6889 .cpu_dai_name = "msm-dai-q6-dev.16401",
6890 .platform_name = "msm-pcm-routing",
6891 .codec_name = "btfmslim_slave",
6892 .codec_dai_name = "btfm_fm_slim_tx",
6893 .no_pcm = 1,
6894 .dpcm_capture = 1,
6895 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6896 .be_hw_params_fixup = msm_be_hw_params_fixup,
6897 .init = &msm_wcn_init,
6898 .ops = &msm_wcn_ops,
6899 .ignore_suspend = 1,
6900 },
6901};
6902
6903static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6904 /* DISP PORT BACK END DAI Link */
6905 {
6906 .name = LPASS_BE_DISPLAY_PORT,
6907 .stream_name = "Display Port Playback",
6908 .cpu_dai_name = "msm-dai-q6-dp.24608",
6909 .platform_name = "msm-pcm-routing",
6910 .codec_name = "msm-ext-disp-audio-codec-rx",
6911 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6912 .no_pcm = 1,
6913 .dpcm_playback = 1,
6914 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6915 .be_hw_params_fixup = msm_be_hw_params_fixup,
6916 .ignore_pmdown_time = 1,
6917 .ignore_suspend = 1,
6918 },
6919};
6920
6921static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6922 {
6923 .name = LPASS_BE_PRI_MI2S_RX,
6924 .stream_name = "Primary MI2S Playback",
6925 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6926 .platform_name = "msm-pcm-routing",
6927 .codec_name = "msm-stub-codec.1",
6928 .codec_dai_name = "msm-stub-rx",
6929 .no_pcm = 1,
6930 .dpcm_playback = 1,
6931 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6932 .be_hw_params_fixup = msm_be_hw_params_fixup,
6933 .ops = &msm_mi2s_be_ops,
6934 .ignore_suspend = 1,
6935 .ignore_pmdown_time = 1,
6936 },
6937 {
6938 .name = LPASS_BE_PRI_MI2S_TX,
6939 .stream_name = "Primary MI2S Capture",
6940 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6941 .platform_name = "msm-pcm-routing",
6942 .codec_name = "msm-stub-codec.1",
6943 .codec_dai_name = "msm-stub-tx",
6944 .no_pcm = 1,
6945 .dpcm_capture = 1,
6946 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6947 .be_hw_params_fixup = msm_be_hw_params_fixup,
6948 .ops = &msm_mi2s_be_ops,
6949 .ignore_suspend = 1,
6950 },
6951 {
6952 .name = LPASS_BE_SEC_MI2S_RX,
6953 .stream_name = "Secondary MI2S Playback",
6954 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6955 .platform_name = "msm-pcm-routing",
6956 .codec_name = "msm-stub-codec.1",
6957 .codec_dai_name = "msm-stub-rx",
6958 .no_pcm = 1,
6959 .dpcm_playback = 1,
6960 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6961 .be_hw_params_fixup = msm_be_hw_params_fixup,
6962 .ops = &msm_mi2s_be_ops,
6963 .ignore_suspend = 1,
6964 .ignore_pmdown_time = 1,
6965 },
6966 {
6967 .name = LPASS_BE_SEC_MI2S_TX,
6968 .stream_name = "Secondary MI2S Capture",
6969 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6970 .platform_name = "msm-pcm-routing",
6971 .codec_name = "msm-stub-codec.1",
6972 .codec_dai_name = "msm-stub-tx",
6973 .no_pcm = 1,
6974 .dpcm_capture = 1,
6975 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6976 .be_hw_params_fixup = msm_be_hw_params_fixup,
6977 .ops = &msm_mi2s_be_ops,
6978 .ignore_suspend = 1,
6979 },
6980 {
6981 .name = LPASS_BE_TERT_MI2S_RX,
6982 .stream_name = "Tertiary MI2S Playback",
6983 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6984 .platform_name = "msm-pcm-routing",
6985 .codec_name = "msm-stub-codec.1",
6986 .codec_dai_name = "msm-stub-rx",
6987 .no_pcm = 1,
6988 .dpcm_playback = 1,
6989 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6990 .be_hw_params_fixup = msm_be_hw_params_fixup,
6991 .ops = &msm_mi2s_be_ops,
6992 .ignore_suspend = 1,
6993 .ignore_pmdown_time = 1,
6994 },
6995 {
6996 .name = LPASS_BE_TERT_MI2S_TX,
6997 .stream_name = "Tertiary MI2S Capture",
6998 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6999 .platform_name = "msm-pcm-routing",
7000 .codec_name = "msm-stub-codec.1",
7001 .codec_dai_name = "msm-stub-tx",
7002 .no_pcm = 1,
7003 .dpcm_capture = 1,
7004 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7005 .be_hw_params_fixup = msm_be_hw_params_fixup,
7006 .ops = &msm_mi2s_be_ops,
7007 .ignore_suspend = 1,
7008 },
7009 {
7010 .name = LPASS_BE_QUAT_MI2S_RX,
7011 .stream_name = "Quaternary MI2S Playback",
7012 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7013 .platform_name = "msm-pcm-routing",
7014 .codec_name = "msm-stub-codec.1",
7015 .codec_dai_name = "msm-stub-rx",
7016 .no_pcm = 1,
7017 .dpcm_playback = 1,
7018 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7019 .be_hw_params_fixup = msm_be_hw_params_fixup,
7020 .ops = &msm_mi2s_be_ops,
7021 .ignore_suspend = 1,
7022 .ignore_pmdown_time = 1,
7023 },
7024 {
7025 .name = LPASS_BE_QUAT_MI2S_TX,
7026 .stream_name = "Quaternary MI2S Capture",
7027 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7028 .platform_name = "msm-pcm-routing",
7029 .codec_name = "msm-stub-codec.1",
7030 .codec_dai_name = "msm-stub-tx",
7031 .no_pcm = 1,
7032 .dpcm_capture = 1,
7033 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7034 .be_hw_params_fixup = msm_be_hw_params_fixup,
7035 .ops = &msm_mi2s_be_ops,
7036 .ignore_suspend = 1,
7037 },
7038 {
7039 .name = LPASS_BE_QUIN_MI2S_RX,
7040 .stream_name = "Quinary MI2S Playback",
7041 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7042 .platform_name = "msm-pcm-routing",
7043 .codec_name = "msm-stub-codec.1",
7044 .codec_dai_name = "msm-stub-rx",
7045 .no_pcm = 1,
7046 .dpcm_playback = 1,
7047 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7048 .be_hw_params_fixup = msm_be_hw_params_fixup,
7049 .ops = &msm_mi2s_be_ops,
7050 .ignore_suspend = 1,
7051 .ignore_pmdown_time = 1,
7052 },
7053 {
7054 .name = LPASS_BE_QUIN_MI2S_TX,
7055 .stream_name = "Quinary MI2S Capture",
7056 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7057 .platform_name = "msm-pcm-routing",
7058 .codec_name = "msm-stub-codec.1",
7059 .codec_dai_name = "msm-stub-tx",
7060 .no_pcm = 1,
7061 .dpcm_capture = 1,
7062 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7063 .be_hw_params_fixup = msm_be_hw_params_fixup,
7064 .ops = &msm_mi2s_be_ops,
7065 .ignore_suspend = 1,
7066 },
7067
7068};
7069
7070static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7071 /* Primary AUX PCM Backend DAI Links */
7072 {
7073 .name = LPASS_BE_AUXPCM_RX,
7074 .stream_name = "AUX PCM Playback",
7075 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7076 .platform_name = "msm-pcm-routing",
7077 .codec_name = "msm-stub-codec.1",
7078 .codec_dai_name = "msm-stub-rx",
7079 .no_pcm = 1,
7080 .dpcm_playback = 1,
7081 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7082 .be_hw_params_fixup = msm_be_hw_params_fixup,
7083 .ignore_pmdown_time = 1,
7084 .ignore_suspend = 1,
7085 },
7086 {
7087 .name = LPASS_BE_AUXPCM_TX,
7088 .stream_name = "AUX PCM Capture",
7089 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7090 .platform_name = "msm-pcm-routing",
7091 .codec_name = "msm-stub-codec.1",
7092 .codec_dai_name = "msm-stub-tx",
7093 .no_pcm = 1,
7094 .dpcm_capture = 1,
7095 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7096 .be_hw_params_fixup = msm_be_hw_params_fixup,
7097 .ignore_suspend = 1,
7098 },
7099 /* Secondary AUX PCM Backend DAI Links */
7100 {
7101 .name = LPASS_BE_SEC_AUXPCM_RX,
7102 .stream_name = "Sec AUX PCM Playback",
7103 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7104 .platform_name = "msm-pcm-routing",
7105 .codec_name = "msm-stub-codec.1",
7106 .codec_dai_name = "msm-stub-rx",
7107 .no_pcm = 1,
7108 .dpcm_playback = 1,
7109 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7110 .be_hw_params_fixup = msm_be_hw_params_fixup,
7111 .ignore_pmdown_time = 1,
7112 .ignore_suspend = 1,
7113 },
7114 {
7115 .name = LPASS_BE_SEC_AUXPCM_TX,
7116 .stream_name = "Sec AUX PCM Capture",
7117 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7118 .platform_name = "msm-pcm-routing",
7119 .codec_name = "msm-stub-codec.1",
7120 .codec_dai_name = "msm-stub-tx",
7121 .no_pcm = 1,
7122 .dpcm_capture = 1,
7123 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7124 .be_hw_params_fixup = msm_be_hw_params_fixup,
7125 .ignore_suspend = 1,
7126 },
7127 /* Tertiary AUX PCM Backend DAI Links */
7128 {
7129 .name = LPASS_BE_TERT_AUXPCM_RX,
7130 .stream_name = "Tert AUX PCM Playback",
7131 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7132 .platform_name = "msm-pcm-routing",
7133 .codec_name = "msm-stub-codec.1",
7134 .codec_dai_name = "msm-stub-rx",
7135 .no_pcm = 1,
7136 .dpcm_playback = 1,
7137 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7138 .be_hw_params_fixup = msm_be_hw_params_fixup,
7139 .ignore_suspend = 1,
7140 },
7141 {
7142 .name = LPASS_BE_TERT_AUXPCM_TX,
7143 .stream_name = "Tert AUX PCM Capture",
7144 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7145 .platform_name = "msm-pcm-routing",
7146 .codec_name = "msm-stub-codec.1",
7147 .codec_dai_name = "msm-stub-tx",
7148 .no_pcm = 1,
7149 .dpcm_capture = 1,
7150 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7151 .be_hw_params_fixup = msm_be_hw_params_fixup,
7152 .ignore_suspend = 1,
7153 },
7154 /* Quaternary AUX PCM Backend DAI Links */
7155 {
7156 .name = LPASS_BE_QUAT_AUXPCM_RX,
7157 .stream_name = "Quat AUX PCM Playback",
7158 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7159 .platform_name = "msm-pcm-routing",
7160 .codec_name = "msm-stub-codec.1",
7161 .codec_dai_name = "msm-stub-rx",
7162 .no_pcm = 1,
7163 .dpcm_playback = 1,
7164 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7165 .be_hw_params_fixup = msm_be_hw_params_fixup,
7166 .ignore_pmdown_time = 1,
7167 .ignore_suspend = 1,
7168 },
7169 {
7170 .name = LPASS_BE_QUAT_AUXPCM_TX,
7171 .stream_name = "Quat AUX PCM Capture",
7172 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7173 .platform_name = "msm-pcm-routing",
7174 .codec_name = "msm-stub-codec.1",
7175 .codec_dai_name = "msm-stub-tx",
7176 .no_pcm = 1,
7177 .dpcm_capture = 1,
7178 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7179 .be_hw_params_fixup = msm_be_hw_params_fixup,
7180 .ignore_suspend = 1,
7181 },
7182 /* Quinary AUX PCM Backend DAI Links */
7183 {
7184 .name = LPASS_BE_QUIN_AUXPCM_RX,
7185 .stream_name = "Quin AUX PCM Playback",
7186 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7187 .platform_name = "msm-pcm-routing",
7188 .codec_name = "msm-stub-codec.1",
7189 .codec_dai_name = "msm-stub-rx",
7190 .no_pcm = 1,
7191 .dpcm_playback = 1,
7192 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7193 .be_hw_params_fixup = msm_be_hw_params_fixup,
7194 .ignore_pmdown_time = 1,
7195 .ignore_suspend = 1,
7196 },
7197 {
7198 .name = LPASS_BE_QUIN_AUXPCM_TX,
7199 .stream_name = "Quin AUX PCM Capture",
7200 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7201 .platform_name = "msm-pcm-routing",
7202 .codec_name = "msm-stub-codec.1",
7203 .codec_dai_name = "msm-stub-tx",
7204 .no_pcm = 1,
7205 .dpcm_capture = 1,
7206 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7207 .be_hw_params_fixup = msm_be_hw_params_fixup,
7208 .ignore_suspend = 1,
7209 },
7210};
7211
7212static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7213 /* WSA CDC DMA Backend DAI Links */
7214 {
7215 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7216 .stream_name = "WSA CDC DMA0 Playback",
7217 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7218 .platform_name = "msm-pcm-routing",
7219 .codec_name = "bolero_codec",
7220 .codec_dai_name = "wsa_macro_rx1",
7221 .no_pcm = 1,
7222 .dpcm_playback = 1,
7223 .init = &msm_int_audrx_init,
7224 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7225 .be_hw_params_fixup = msm_be_hw_params_fixup,
7226 .ignore_pmdown_time = 1,
7227 .ignore_suspend = 1,
7228 .ops = &msm_cdc_dma_be_ops,
7229 },
7230 {
7231 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7232 .stream_name = "WSA CDC DMA1 Playback",
7233 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7234 .platform_name = "msm-pcm-routing",
7235 .codec_name = "bolero_codec",
7236 .codec_dai_name = "wsa_macro_rx_mix",
7237 .no_pcm = 1,
7238 .dpcm_playback = 1,
7239 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7240 .be_hw_params_fixup = msm_be_hw_params_fixup,
7241 .ignore_pmdown_time = 1,
7242 .ignore_suspend = 1,
7243 .ops = &msm_cdc_dma_be_ops,
7244 },
7245 {
7246 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7247 .stream_name = "WSA CDC DMA1 Capture",
7248 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7249 .platform_name = "msm-pcm-routing",
7250 .codec_name = "bolero_codec",
7251 .codec_dai_name = "wsa_macro_echo",
7252 .no_pcm = 1,
7253 .dpcm_capture = 1,
7254 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7255 .be_hw_params_fixup = msm_be_hw_params_fixup,
7256 .ignore_suspend = 1,
7257 .ops = &msm_cdc_dma_be_ops,
7258 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7259};
7260
7261static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7262 /* RX CDC DMA Backend DAI Links */
7263 {
7264 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7265 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7266 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7267 .platform_name = "msm-pcm-routing",
7268 .codec_name = "bolero_codec",
7269 .codec_dai_name = "rx_macro_rx1",
7270 .no_pcm = 1,
7271 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7272 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7273 .be_hw_params_fixup = msm_be_hw_params_fixup,
7274 .ignore_pmdown_time = 1,
7275 .ignore_suspend = 1,
7276 .ops = &msm_cdc_dma_be_ops,
7277 },
7278 {
7279 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7280 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7281 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7282 .platform_name = "msm-pcm-routing",
7283 .codec_name = "bolero_codec",
7284 .codec_dai_name = "rx_macro_rx2",
7285 .no_pcm = 1,
7286 .dpcm_playback = 1,
7287 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7288 .be_hw_params_fixup = msm_be_hw_params_fixup,
7289 .ignore_pmdown_time = 1,
7290 .ignore_suspend = 1,
7291 .ops = &msm_cdc_dma_be_ops,
7292 },
7293 {
7294 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7295 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7296 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7297 .platform_name = "msm-pcm-routing",
7298 .codec_name = "bolero_codec",
7299 .codec_dai_name = "rx_macro_rx3",
7300 .no_pcm = 1,
7301 .dpcm_playback = 1,
7302 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7303 .be_hw_params_fixup = msm_be_hw_params_fixup,
7304 .ignore_pmdown_time = 1,
7305 .ignore_suspend = 1,
7306 .ops = &msm_cdc_dma_be_ops,
7307 },
7308 {
7309 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7310 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7311 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7312 .platform_name = "msm-pcm-routing",
7313 .codec_name = "bolero_codec",
7314 .codec_dai_name = "rx_macro_rx4",
7315 .no_pcm = 1,
7316 .dpcm_playback = 1,
7317 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7318 .be_hw_params_fixup = msm_be_hw_params_fixup,
7319 .ignore_pmdown_time = 1,
7320 .ignore_suspend = 1,
7321 .ops = &msm_cdc_dma_be_ops,
7322 },
7323 /* TX CDC DMA Backend DAI Links */
7324 {
7325 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7326 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7327 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7328 .platform_name = "msm-pcm-routing",
7329 .codec_name = "bolero_codec",
7330 .codec_dai_name = "tx_macro_tx1",
7331 .no_pcm = 1,
7332 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7333 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7334 .be_hw_params_fixup = msm_be_hw_params_fixup,
7335 .ignore_suspend = 1,
7336 .ops = &msm_cdc_dma_be_ops,
7337 },
7338 {
7339 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7340 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +0530[diff] [blame]7341 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7342 .platform_name = "msm-pcm-routing",
7343 .codec_name = "bolero_codec",
7344 .codec_dai_name = "tx_macro_tx2",
7345 .no_pcm = 1,
7346 .dpcm_capture = 1,
7347 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7348 .be_hw_params_fixup = msm_be_hw_params_fixup,
7349 .ignore_suspend = 1,
7350 .ops = &msm_cdc_dma_be_ops,
7351 },
7352};
7353
7354static struct snd_soc_dai_link msm_sm6150_dai_links[
7355 ARRAY_SIZE(msm_common_dai_links) +
7356 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7357 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7358 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7359 ARRAY_SIZE(msm_common_be_dai_links) +
7360 ARRAY_SIZE(msm_tavil_be_dai_links) +
7361 ARRAY_SIZE(msm_wcn_be_dai_links) +
7362 ARRAY_SIZE(ext_disp_be_dai_link) +
7363 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7364 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7365 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7366 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7367
7368static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7369{
7370 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7371 struct snd_soc_pcm_runtime *rtd;
7372 int ret = 0;
7373 void *mbhc_calibration;
7374
7375 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7376 if (!rtd) {
7377 dev_err(card->dev,
7378 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7379 __func__, be_dl_name);
7380 ret = -EINVAL;
7381 goto err_pcm_runtime;
7382 }
7383
7384 mbhc_calibration = def_wcd_mbhc_cal();
7385 if (!mbhc_calibration) {
7386 ret = -ENOMEM;
7387 goto err_mbhc_cal;
7388 }
7389 wcd_mbhc_cfg.calibration = mbhc_calibration;
7390 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7391 if (ret) {
7392 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7393 __func__, ret);
7394 goto err_hs_detect;
7395 }
7396 return 0;
7397
7398err_hs_detect:
7399 kfree(mbhc_calibration);
7400err_mbhc_cal:
7401err_pcm_runtime:
7402 return ret;
7403}
7404
7405
7406static int msm_populate_dai_link_component_of_node(
7407 struct snd_soc_card *card)
7408{
7409 int i, index, ret = 0;
7410 struct device *cdev = card->dev;
7411 struct snd_soc_dai_link *dai_link = card->dai_link;
7412 struct device_node *np;
7413
7414 if (!cdev) {
7415 pr_err("%s: Sound card device memory NULL\n", __func__);
7416 return -ENODEV;
7417 }
7418
7419 for (i = 0; i < card->num_links; i++) {
7420 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7421 continue;
7422
7423 /* populate platform_of_node for snd card dai links */
7424 if (dai_link[i].platform_name &&
7425 !dai_link[i].platform_of_node) {
7426 index = of_property_match_string(cdev->of_node,
7427 "asoc-platform-names",
7428 dai_link[i].platform_name);
7429 if (index < 0) {
7430 pr_err("%s: No match found for platform name: %s\n",
7431 __func__, dai_link[i].platform_name);
7432 ret = index;
7433 goto err;
7434 }
7435 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7436 index);
7437 if (!np) {
7438 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7439 __func__, dai_link[i].platform_name,
7440 index);
7441 ret = -ENODEV;
7442 goto err;
7443 }
7444 dai_link[i].platform_of_node = np;
7445 dai_link[i].platform_name = NULL;
7446 }
7447
7448 /* populate cpu_of_node for snd card dai links */
7449 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7450 index = of_property_match_string(cdev->of_node,
7451 "asoc-cpu-names",
7452 dai_link[i].cpu_dai_name);
7453 if (index >= 0) {
7454 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7455 index);
7456 if (!np) {
7457 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7458 __func__,
7459 dai_link[i].cpu_dai_name);
7460 ret = -ENODEV;
7461 goto err;
7462 }
7463 dai_link[i].cpu_of_node = np;
7464 dai_link[i].cpu_dai_name = NULL;
7465 }
7466 }
7467
7468 /* populate codec_of_node for snd card dai links */
7469 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7470 index = of_property_match_string(cdev->of_node,
7471 "asoc-codec-names",
7472 dai_link[i].codec_name);
7473 if (index < 0)
7474 continue;
7475 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7476 index);
7477 if (!np) {
7478 pr_err("%s: retrieving phandle for codec %s failed\n",
7479 __func__, dai_link[i].codec_name);
7480 ret = -ENODEV;
7481 goto err;
7482 }
7483 dai_link[i].codec_of_node = np;
7484 dai_link[i].codec_name = NULL;
7485 }
7486 }
7487
7488err:
7489 return ret;
7490}
7491
7492static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7493{
7494 int ret = 0;
7495 struct snd_soc_codec *codec = rtd->codec;
7496
7497 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7498 ARRAY_SIZE(msm_tavil_snd_controls));
7499 if (ret < 0) {
7500 dev_err(codec->dev,
7501 "%s: add_codec_controls failed, err = %d\n",
7502 __func__, ret);
7503 return ret;
7504 }
7505
7506 return 0;
7507}
7508
7509static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7510 struct snd_pcm_hw_params *params)
7511{
7512 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7513 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7514
7515 int ret = 0;
7516 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7517 151};
7518 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7519 134, 135, 136, 137, 138, 139,
7520 140, 141, 142, 143};
7521
7522 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7523 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7524 slim_rx_cfg[SLIM_RX_0].channels,
7525 rx_ch);
7526 if (ret < 0)
7527 pr_err("%s: RX failed to set cpu chan map error %d\n",
7528 __func__, ret);
7529 } else {
7530 ret = snd_soc_dai_set_channel_map(cpu_dai,
7531 slim_tx_cfg[SLIM_TX_0].channels,
7532 tx_ch, 0, 0);
7533 if (ret < 0)
7534 pr_err("%s: TX failed to set cpu chan map error %d\n",
7535 __func__, ret);
7536 }
7537
7538 return ret;
7539}
7540
7541static struct snd_soc_ops msm_stub_be_ops = {
7542 .hw_params = msm_snd_stub_hw_params,
7543};
7544
7545static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7546
7547 /* FrontEnd DAI Links */
7548 {
7549 .name = "MSMSTUB Media1",
7550 .stream_name = "MultiMedia1",
7551 .cpu_dai_name = "MultiMedia1",
7552 .platform_name = "msm-pcm-dsp.0",
7553 .dynamic = 1,
7554 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7555 .dpcm_playback = 1,
7556 .dpcm_capture = 1,
7557 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7558 SND_SOC_DPCM_TRIGGER_POST},
7559 .codec_dai_name = "snd-soc-dummy-dai",
7560 .codec_name = "snd-soc-dummy",
7561 .ignore_suspend = 1,
7562 /* this dainlink has playback support */
7563 .ignore_pmdown_time = 1,
7564 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7565 },
7566};
7567
7568static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7569
7570 /* Backend DAI Links */
7571 {
7572 .name = LPASS_BE_SLIMBUS_0_RX,
7573 .stream_name = "Slimbus Playback",
7574 .cpu_dai_name = "msm-dai-q6-dev.16384",
7575 .platform_name = "msm-pcm-routing",
7576 .codec_name = "msm-stub-codec.1",
7577 .codec_dai_name = "msm-stub-rx",
7578 .no_pcm = 1,
7579 .dpcm_playback = 1,
7580 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7581 .init = &msm_audrx_stub_init,
7582 .be_hw_params_fixup = msm_be_hw_params_fixup,
7583 .ignore_pmdown_time = 1, /* dai link has playback support */
7584 .ignore_suspend = 1,
7585 .ops = &msm_stub_be_ops,
7586 },
7587 {
7588 .name = LPASS_BE_SLIMBUS_0_TX,
7589 .stream_name = "Slimbus Capture",
7590 .cpu_dai_name = "msm-dai-q6-dev.16385",
7591 .platform_name = "msm-pcm-routing",
7592 .codec_name = "msm-stub-codec.1",
7593 .codec_dai_name = "msm-stub-tx",
7594 .no_pcm = 1,
7595 .dpcm_capture = 1,
7596 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7597 .be_hw_params_fixup = msm_be_hw_params_fixup,
7598 .ignore_suspend = 1,
7599 .ops = &msm_stub_be_ops,
7600 },
7601};
7602
7603static struct snd_soc_dai_link msm_stub_dai_links[
7604 ARRAY_SIZE(msm_stub_fe_dai_links) +
7605 ARRAY_SIZE(msm_stub_be_dai_links)];
7606
7607struct snd_soc_card snd_soc_card_stub_msm = {
7608 .name = "sm6150-stub-snd-card",
7609};
7610
7611static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7612 { .compatible = "qcom,sm6150-asoc-snd",
7613 .data = "codec"},
7614 { .compatible = "qcom,sm6150-asoc-snd-stub",
7615 .data = "stub_codec"},
7616 {},
7617};
7618
7619static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7620{
7621 struct snd_soc_card *card = NULL;
7622 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7623 int total_links = 0, rc = 0;
7624 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7625 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7626 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7627 const struct of_device_id *match;
7628
7629 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7630 if (!match) {
7631 dev_err(dev, "%s: No DT match found for sound card\n",
7632 __func__);
7633 return NULL;
7634 }
7635
7636 if (!strcmp(match->data, "codec")) {
7637 card = &snd_soc_card_sm6150_msm;
7638 memcpy(msm_sm6150_dai_links + total_links,
7639 msm_common_dai_links,
7640 sizeof(msm_common_dai_links));
7641
7642 total_links += ARRAY_SIZE(msm_common_dai_links);
7643
7644 memcpy(msm_sm6150_dai_links + total_links,
7645 msm_common_misc_fe_dai_links,
7646 sizeof(msm_common_misc_fe_dai_links));
7647
7648 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7649
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7650 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7651 &tavil_codec);
7652 if (rc) {
7653 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7654 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7655 } else {
7656 if (tavil_codec) {
7657 card->late_probe =
7658 msm_snd_card_tavil_late_probe;
7659 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7660 msm_tavil_fe_dai_links,
7661 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7662 total_links +=
7663 ARRAY_SIZE(msm_tavil_fe_dai_links);
7664 }
7665 }
7666
7667 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7668 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7669 msm_bolero_fe_dai_links,
7670 sizeof(msm_bolero_fe_dai_links));
7671 total_links +=
7672 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7673 }
7674
7675 memcpy(msm_sm6150_dai_links + total_links,
7676 msm_common_be_dai_links,
7677 sizeof(msm_common_be_dai_links));
7678
7679 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7680
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7681 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7682 memcpy(msm_sm6150_dai_links + total_links,
7683 msm_tavil_be_dai_links,
7684 sizeof(msm_tavil_be_dai_links));
7685 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7686 } else {
7687 memcpy(msm_sm6150_dai_links + total_links,
7688 msm_wsa_cdc_dma_be_dai_links,
7689 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7690 total_links +=
7691 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7692
7693 memcpy(msm_sm6150_dai_links + total_links,
7694 msm_rx_tx_cdc_dma_be_dai_links,
7695 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7696 total_links +=
7697 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7698 }
7699
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7700 rc = of_property_read_u32(dev->of_node,
7701 "qcom,ext-disp-audio-rx",
7702 &ext_disp_audio_intf);
7703 if (rc) {
7704 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7705 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7706 } else {
7707 if (auxpcm_audio_intf) {
7708 memcpy(msm_sm6150_dai_links + total_links,
7709 ext_disp_be_dai_link,
7710 sizeof(ext_disp_be_dai_link));
7711 total_links +=
7712 ARRAY_SIZE(ext_disp_be_dai_link);
7713 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7714 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7715
7716 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7717 &mi2s_audio_intf);
7718 if (rc) {
7719 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7720 __func__);
7721 } else {
7722 if (mi2s_audio_intf) {
7723 memcpy(msm_sm6150_dai_links + total_links,
7724 msm_mi2s_be_dai_links,
7725 sizeof(msm_mi2s_be_dai_links));
7726 total_links +=
7727 ARRAY_SIZE(msm_mi2s_be_dai_links);
7728 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7729 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7730
7731
7732 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7733 &wcn_btfm_intf);
7734 if (rc) {
7735 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7736 __func__);
7737 } else {
7738 if (wcn_btfm_intf) {
7739 memcpy(msm_sm6150_dai_links + total_links,
7740 msm_wcn_be_dai_links,
7741 sizeof(msm_wcn_be_dai_links));
7742 total_links +=
7743 ARRAY_SIZE(msm_wcn_be_dai_links);
7744 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7745 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7746
7747 rc = of_property_read_u32(dev->of_node,
7748 "qcom,auxpcm-audio-intf",
7749 &auxpcm_audio_intf);
7750 if (rc) {
7751 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7752 __func__);
7753 } else {
7754 if (auxpcm_audio_intf) {
7755 memcpy(msm_sm6150_dai_links + total_links,
7756 msm_auxpcm_be_dai_links,
7757 sizeof(msm_auxpcm_be_dai_links));
7758 total_links +=
7759 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7760 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7761 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7762
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7763 dailink = msm_sm6150_dai_links;
7764 } else if (!strcmp(match->data, "stub_codec")) {
7765 card = &snd_soc_card_stub_msm;
7766
7767 memcpy(msm_stub_dai_links + total_links,
7768 msm_stub_fe_dai_links,
7769 sizeof(msm_stub_fe_dai_links));
7770 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7771
7772 memcpy(msm_stub_dai_links + total_links,
7773 msm_stub_be_dai_links,
7774 sizeof(msm_stub_be_dai_links));
7775 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7776
7777 dailink = msm_stub_dai_links;
7778 }
7779
7780 if (card) {
7781 card->dai_link = dailink;
7782 card->num_links = total_links;
7783 }
7784
7785 return card;
7786}
7787
7788static int msm_wsa881x_init(struct snd_soc_component *component)
7789{
7790 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7791 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7792 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7793 SPKR_L_BOOST, SPKR_L_VI};
7794 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7795 SPKR_R_BOOST, SPKR_R_VI};
7796 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7797 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7798 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7799 struct msm_asoc_mach_data *pdata;
7800 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7801 struct snd_card *card = component->card->snd_card;
7802 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7803 int ret = 0;
7804
7805 if (!codec) {
7806 pr_err("%s codec is NULL\n", __func__);
7807 return -EINVAL;
7808 }
7809
7810 dapm = snd_soc_codec_get_dapm(codec);
7811
7812 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7813 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7814 __func__, codec->component.name);
7815 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7816 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7817 &ch_rate[0], &spkleft_port_types[0]);
7818 if (dapm->component) {
7819 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7820 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7821 }
7822 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7823 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7824 __func__, codec->component.name);
7825 wsa881x_set_channel_map(codec, &spkright_ports[0],
7826 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7827 &ch_rate[0], &spkright_port_types[0]);
7828 if (dapm->component) {
7829 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7830 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7831 }
7832 } else {
7833 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7834 codec->component.name);
7835 ret = -EINVAL;
7836 goto err;
7837 }
7838 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7839 if (!pdata->codec_root) {
7840 entry = snd_info_create_subdir(card->module, "codecs",
7841 card->proc_root);
7842 if (!entry) {
7843 pr_err("%s: Cannot create codecs module entry\n",
7844 __func__);
7845 ret = 0;
7846 goto err;
7847 }
7848 pdata->codec_root = entry;
7849 }
7850 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7851 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7852err:
7853 return ret;
7854}
7855
7856static int msm_aux_codec_init(struct snd_soc_component *component)
7857{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7858 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7859 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7860 int ret = 0;
7861 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7862 struct snd_info_entry *entry;
7863 struct snd_card *card = component->card->snd_card;
7864 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]7865
7866 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7867 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7868 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7869 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7870 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7871 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7872 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7873 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7874 snd_soc_dapm_sync(dapm);
7875
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +0530[diff] [blame]7876 pdata = snd_soc_card_get_drvdata(component->card);
7877 if (!pdata->codec_root) {
7878 entry = snd_info_create_subdir(card->module, "codecs",
7879 card->proc_root);
7880 if (!entry) {
7881 pr_err("%s: Cannot create codecs module entry\n",
7882 __func__);
7883 ret = 0;
7884 goto codec_root_err;
7885 }
7886 pdata->codec_root = entry;
7887 }
7888 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
7889codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +0530[diff] [blame]7890 mbhc_calibration = def_wcd_mbhc_cal();
7891 if (!mbhc_calibration) {
7892 return -ENOMEM;
7893 }
7894 wcd_mbhc_cfg.calibration = mbhc_calibration;
7895 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
7896
7897 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]7898}
7899
7900static int msm_init_aux_dev(struct platform_device *pdev,
7901 struct snd_soc_card *card)
7902{
7903 struct device_node *wsa_of_node;
7904 struct device_node *aux_codec_of_node;
7905 u32 wsa_max_devs;
7906 u32 wsa_dev_cnt;
7907 u32 codec_aux_dev_cnt = 0;
7908 int i;
7909 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7910 struct aux_codec_dev_info *aux_cdc_dev_info;
7911 const char *auxdev_name_prefix[1];
7912 char *dev_name_str = NULL;
7913 int found = 0;
7914 int codecs_found = 0;
7915 int ret = 0;
7916
7917 /* Get maximum WSA device count for this platform */
7918 ret = of_property_read_u32(pdev->dev.of_node,
7919 "qcom,wsa-max-devs", &wsa_max_devs);
7920 if (ret) {
7921 dev_info(&pdev->dev,
7922 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7923 __func__, pdev->dev.of_node->full_name, ret);
7924 wsa_max_devs = 0;
7925 goto codec_aux_dev;
7926 }
7927 if (wsa_max_devs == 0) {
7928 dev_warn(&pdev->dev,
7929 "%s: Max WSA devices is 0 for this target?\n",
7930 __func__);
7931 goto codec_aux_dev;
7932 }
7933
7934 /* Get count of WSA device phandles for this platform */
7935 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7936 "qcom,wsa-devs", NULL);
7937 if (wsa_dev_cnt == -ENOENT) {
7938 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7939 __func__);
7940 goto err;
7941 } else if (wsa_dev_cnt <= 0) {
7942 dev_err(&pdev->dev,
7943 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7944 __func__, wsa_dev_cnt);
7945 ret = -EINVAL;
7946 goto err;
7947 }
7948
7949 /*
7950 * Expect total phandles count to be NOT less than maximum possible
7951 * WSA count. However, if it is less, then assign same value to
7952 * max count as well.
7953 */
7954 if (wsa_dev_cnt < wsa_max_devs) {
7955 dev_dbg(&pdev->dev,
7956 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7957 __func__, wsa_max_devs, wsa_dev_cnt);
7958 wsa_max_devs = wsa_dev_cnt;
7959 }
7960
7961 /* Make sure prefix string passed for each WSA device */
7962 ret = of_property_count_strings(pdev->dev.of_node,
7963 "qcom,wsa-aux-dev-prefix");
7964 if (ret != wsa_dev_cnt) {
7965 dev_err(&pdev->dev,
7966 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7967 __func__, wsa_dev_cnt, ret);
7968 ret = -EINVAL;
7969 goto err;
7970 }
7971
7972 /*
7973 * Alloc mem to store phandle and index info of WSA device, if already
7974 * registered with ALSA core
7975 */
7976 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7977 sizeof(struct msm_wsa881x_dev_info),
7978 GFP_KERNEL);
7979 if (!wsa881x_dev_info) {
7980 ret = -ENOMEM;
7981 goto err;
7982 }
7983
7984 /*
7985 * search and check whether all WSA devices are already
7986 * registered with ALSA core or not. If found a node, store
7987 * the node and the index in a local array of struct for later
7988 * use.
7989 */
7990 for (i = 0; i < wsa_dev_cnt; i++) {
7991 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7992 "qcom,wsa-devs", i);
7993 if (unlikely(!wsa_of_node)) {
7994 /* we should not be here */
7995 dev_err(&pdev->dev,
7996 "%s: wsa dev node is not present\n",
7997 __func__);
7998 ret = -EINVAL;
7999 goto err;
8000 }
8001 if (soc_find_component(wsa_of_node, NULL)) {
8002 /* WSA device registered with ALSA core */
8003 wsa881x_dev_info[found].of_node = wsa_of_node;
8004 wsa881x_dev_info[found].index = i;
8005 found++;
8006 if (found == wsa_max_devs)
8007 break;
8008 }
8009 }
8010
8011 if (found < wsa_max_devs) {
8012 dev_dbg(&pdev->dev,
8013 "%s: failed to find %d components. Found only %d\n",
8014 __func__, wsa_max_devs, found);
8015 return -EPROBE_DEFER;
8016 }
8017 dev_info(&pdev->dev,
8018 "%s: found %d wsa881x devices registered with ALSA core\n",
8019 __func__, found);
8020
8021codec_aux_dev:
8022 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8023 /* Get count of aux codec device phandles for this platform */
8024 codec_aux_dev_cnt = of_count_phandle_with_args(
8025 pdev->dev.of_node,
8026 "qcom,codec-aux-devs", NULL);
8027 if (codec_aux_dev_cnt == -ENOENT) {
8028 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8029 __func__);
8030 goto err;
8031 } else if (codec_aux_dev_cnt <= 0) {
8032 dev_err(&pdev->dev,
8033 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8034 __func__, codec_aux_dev_cnt);
8035 ret = -EINVAL;
8036 goto err;
8037 }
8038
8039 /*
8040 * Alloc mem to store phandle and index info of aux codec
8041 * if already registered with ALSA core
8042 */
8043 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8044 sizeof(struct aux_codec_dev_info),
8045 GFP_KERNEL);
8046 if (!aux_cdc_dev_info) {
8047 ret = -ENOMEM;
8048 goto err;
8049 }
8050
8051 /*
8052 * search and check whether all aux codecs are already
8053 * registered with ALSA core or not. If found a node, store
8054 * the node and the index in a local array of struct for later
8055 * use.
8056 */
8057 for (i = 0; i < codec_aux_dev_cnt; i++) {
8058 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8059 "qcom,codec-aux-devs", i);
8060 if (unlikely(!aux_codec_of_node)) {
8061 /* we should not be here */
8062 dev_err(&pdev->dev,
8063 "%s: aux codec dev node is not present\n",
8064 __func__);
8065 ret = -EINVAL;
8066 goto err;
8067 }
8068 if (soc_find_component(aux_codec_of_node, NULL)) {
8069 /* AUX codec registered with ALSA core */
8070 aux_cdc_dev_info[codecs_found].of_node =
8071 aux_codec_of_node;
8072 aux_cdc_dev_info[codecs_found].index = i;
8073 codecs_found++;
8074 }
8075 }
8076
8077 if (codecs_found < codec_aux_dev_cnt) {
8078 dev_dbg(&pdev->dev,
8079 "%s: failed to find %d components. Found only %d\n",
8080 __func__, codec_aux_dev_cnt, codecs_found);
8081 return -EPROBE_DEFER;
8082 }
8083 dev_info(&pdev->dev,
8084 "%s: found %d AUX codecs registered with ALSA core\n",
8085 __func__, codecs_found);
8086
8087 }
8088
8089 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8090 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8091
8092 /* Alloc array of AUX devs struct */
8093 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8094 sizeof(struct snd_soc_aux_dev),
8095 GFP_KERNEL);
8096 if (!msm_aux_dev) {
8097 ret = -ENOMEM;
8098 goto err;
8099 }
8100
8101 /* Alloc array of codec conf struct */
8102 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8103 sizeof(struct snd_soc_codec_conf),
8104 GFP_KERNEL);
8105 if (!msm_codec_conf) {
8106 ret = -ENOMEM;
8107 goto err;
8108 }
8109
8110 for (i = 0; i < wsa_max_devs; i++) {
8111 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8112 GFP_KERNEL);
8113 if (!dev_name_str) {
8114 ret = -ENOMEM;
8115 goto err;
8116 }
8117
8118 ret = of_property_read_string_index(pdev->dev.of_node,
8119 "qcom,wsa-aux-dev-prefix",
8120 wsa881x_dev_info[i].index,
8121 auxdev_name_prefix);
8122 if (ret) {
8123 dev_err(&pdev->dev,
8124 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8125 __func__, ret);
8126 ret = -EINVAL;
8127 goto err;
8128 }
8129
8130 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8131 msm_aux_dev[i].name = dev_name_str;
8132 msm_aux_dev[i].codec_name = NULL;
8133 msm_aux_dev[i].codec_of_node =
8134 wsa881x_dev_info[i].of_node;
8135 msm_aux_dev[i].init = msm_wsa881x_init;
8136 msm_codec_conf[i].dev_name = NULL;
8137 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8138 msm_codec_conf[i].of_node =
8139 wsa881x_dev_info[i].of_node;
8140 }
8141
8142 for (i = 0; i < codec_aux_dev_cnt; i++) {
8143 msm_aux_dev[wsa_max_devs + i].name = NULL;
8144 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8145 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8146 aux_cdc_dev_info[i].of_node;
8147 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8148 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8149 msm_codec_conf[wsa_max_devs + i].name_prefix =
8150 NULL;
8151 msm_codec_conf[wsa_max_devs + i].of_node =
8152 aux_cdc_dev_info[i].of_node;
8153 }
8154
8155 card->codec_conf = msm_codec_conf;
8156 card->aux_dev = msm_aux_dev;
8157err:
8158 return ret;
8159}
8160
8161static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8162{
8163 int count;
8164 u32 mi2s_master_slave[MI2S_MAX];
8165 int ret;
8166
8167 for (count = 0; count < MI2S_MAX; count++) {
8168 mutex_init(&mi2s_intf_conf[count].lock);
8169 mi2s_intf_conf[count].ref_cnt = 0;
8170 }
8171
8172 ret = of_property_read_u32_array(pdev->dev.of_node,
8173 "qcom,msm-mi2s-master",
8174 mi2s_master_slave, MI2S_MAX);
8175 if (ret) {
8176 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8177 __func__);
8178 } else {
8179 for (count = 0; count < MI2S_MAX; count++) {
8180 mi2s_intf_conf[count].msm_is_mi2s_master =
8181 mi2s_master_slave[count];
8182 }
8183 }
8184}
8185
8186static void msm_i2s_auxpcm_deinit(void)
8187{
8188 int count;
8189
8190 for (count = 0; count < MI2S_MAX; count++) {
8191 mutex_destroy(&mi2s_intf_conf[count].lock);
8192 mi2s_intf_conf[count].ref_cnt = 0;
8193 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8194 }
8195}
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]8196
8197static int sm6150_ssr_enable(struct device *dev, void *data)
8198{
8199 struct platform_device *pdev = to_platform_device(dev);
8200 struct snd_soc_card *card = platform_get_drvdata(pdev);
8201 struct msm_asoc_mach_data *pdata;
8202 int ret = 0;
8203
8204 if (!card) {
8205 dev_err(dev, "%s: card is NULL\n", __func__);
8206 ret = -EINVAL;
8207 goto err;
8208 }
8209
8210 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8211 pdata = snd_soc_card_get_drvdata(card);
8212 if (!pdata->is_afe_config_done) {
8213 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
8214 struct snd_soc_pcm_runtime *rtd;
8215
8216 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
8217 if (!rtd) {
8218 dev_err(dev,
8219 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
8220 __func__, be_dl_name);
8221 ret = -EINVAL;
8222 goto err;
8223 }
8224 ret = msm_afe_set_config(rtd->codec);
8225 if (ret)
8226 dev_err(dev, "%s: Failed to set AFE config. err %d\n",
8227 __func__, ret);
8228 else
8229 pdata->is_afe_config_done = true;
8230 }
8231 }
8232 snd_soc_card_change_online_state(card, 1);
8233 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
8234
8235err:
8236 return ret;
8237}
8238
8239static void sm6150_ssr_disable(struct device *dev, void *data)
8240{
8241 struct platform_device *pdev = to_platform_device(dev);
8242 struct snd_soc_card *card = platform_get_drvdata(pdev);
8243 struct msm_asoc_mach_data *pdata;
8244
8245 if (!card) {
8246 dev_err(dev, "%s: card is NULL\n", __func__);
8247 return;
8248 }
8249
8250 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
8251 snd_soc_card_change_online_state(card, 0);
8252
8253 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8254 pdata = snd_soc_card_get_drvdata(card);
8255 msm_afe_clear_config();
8256 pdata->is_afe_config_done = false;
8257 }
8258}
8259
8260static const struct snd_event_ops sm6150_ssr_ops = {
8261 .enable = sm6150_ssr_enable,
8262 .disable = sm6150_ssr_disable,
8263};
8264
8265static int msm_audio_ssr_compare(struct device *dev, void *data)
8266{
8267 struct device_node *node = data;
8268
8269 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
8270 __func__, dev->of_node, node);
8271 return (dev->of_node && dev->of_node == node);
8272}
8273
8274static int msm_audio_ssr_register(struct device *dev)
8275{
8276 struct device_node *np = dev->of_node;
8277 struct snd_event_clients *ssr_clients = NULL;
8278 struct device_node *node;
8279 int ret;
8280 int i;
8281
8282 for (i = 0; ; i++) {
8283 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
8284 if (!node)
8285 break;
8286 snd_event_mstr_add_client(&ssr_clients,
8287 msm_audio_ssr_compare, node);
8288 }
8289
8290 ret = snd_event_master_register(dev, &sm6150_ssr_ops,
8291 ssr_clients, NULL);
8292 if (!ret)
8293 snd_event_notify(dev, SND_EVENT_UP);
8294
8295 return ret;
8296}
8297
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8298static int msm_asoc_machine_probe(struct platform_device *pdev)
8299{
8300 struct snd_soc_card *card;
8301 struct msm_asoc_mach_data *pdata;
8302 const char *mbhc_audio_jack_type = NULL;
8303 int ret;
8304
8305 if (!pdev->dev.of_node) {
8306 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8307 return -EINVAL;
8308 }
8309
8310 pdata = devm_kzalloc(&pdev->dev,
8311 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8312 if (!pdata)
8313 return -ENOMEM;
8314
8315 card = populate_snd_card_dailinks(&pdev->dev);
8316 if (!card) {
8317 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8318 ret = -EINVAL;
8319 goto err;
8320 }
8321 card->dev = &pdev->dev;
8322 platform_set_drvdata(pdev, card);
8323 snd_soc_card_set_drvdata(card, pdata);
8324
8325 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8326 if (ret) {
8327 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8328 ret);
8329 goto err;
8330 }
8331
8332 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8333 if (ret) {
8334 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8335 ret);
8336 goto err;
8337 }
8338
8339 ret = msm_populate_dai_link_component_of_node(card);
8340 if (ret) {
8341 ret = -EPROBE_DEFER;
8342 goto err;
8343 }
8344
8345 ret = msm_init_aux_dev(pdev, card);
8346 if (ret)
8347 goto err;
8348
8349 ret = devm_snd_soc_register_card(&pdev->dev, card);
8350 if (ret == -EPROBE_DEFER) {
8351 if (codec_reg_done)
8352 ret = -EINVAL;
8353 goto err;
8354 } else if (ret) {
8355 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8356 ret);
8357 goto err;
8358 }
8359 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8360
8361 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8362 "qcom,hph-en1-gpio", 0);
8363 if (!pdata->hph_en1_gpio_p) {
8364 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8365 "qcom,hph-en1-gpio",
8366 pdev->dev.of_node->full_name);
8367 }
8368
8369 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8370 "qcom,hph-en0-gpio", 0);
8371 if (!pdata->hph_en0_gpio_p) {
8372 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8373 "qcom,hph-en0-gpio",
8374 pdev->dev.of_node->full_name);
8375 }
8376
8377 ret = of_property_read_string(pdev->dev.of_node,
8378 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8379 if (ret) {
8380 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8381 "qcom,mbhc-audio-jack-type",
8382 pdev->dev.of_node->full_name);
8383 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8384 } else {
8385 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8386 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8387 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8388 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8389 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8390 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8391 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8392 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8393 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8394 } else {
8395 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8396 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8397 }
8398 }
8399 /*
8400 * Parse US-Euro gpio info from DT. Report no error if us-euro
8401 * entry is not found in DT file as some targets do not support
8402 * US-Euro detection
8403 */
8404 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8405 "qcom,us-euro-gpios", 0);
8406 if (!pdata->us_euro_gpio_p) {
8407 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8408 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8409 } else {
8410 dev_dbg(&pdev->dev, "%s detected\n",
8411 "qcom,us-euro-gpios");
8412 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8413 }
8414 /* Parse pinctrl info from devicetree */
8415 ret = msm_get_pinctrl(pdev);
8416 if (!ret) {
8417 pr_debug("%s: pinctrl parsing successful\n", __func__);
8418 } else {
8419 dev_dbg(&pdev->dev,
8420 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8421 __func__, ret);
8422 ret = 0;
8423 }
8424
8425 msm_i2s_auxpcm_init(pdev);
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]8426 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8427 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8428 "qcom,cdc-dmic01-gpios",
8429 0);
8430 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8431 "qcom,cdc-dmic23-gpios",
8432 0);
8433 }
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]8434
8435 ret = msm_audio_ssr_register(&pdev->dev);
8436 if (ret)
8437 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
8438 __func__, ret);
8439
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8440err:
8441 return ret;
8442}
8443
8444static int msm_asoc_machine_remove(struct platform_device *pdev)
8445{
Vaishnavi Kommaraju9a3d5eb2018-09-19 18:16:39 +0530[diff] [blame^]8446 snd_event_master_deregister(&pdev->dev);
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8447 msm_i2s_auxpcm_deinit();
8448
8449 return 0;
8450}
8451
8452static struct platform_driver sm6150_asoc_machine_driver = {
8453 .driver = {
8454 .name = DRV_NAME,
8455 .owner = THIS_MODULE,
8456 .pm = &snd_soc_pm_ops,
8457 .of_match_table = sm6150_asoc_machine_of_match,
8458 },
8459 .probe = msm_asoc_machine_probe,
8460 .remove = msm_asoc_machine_remove,
8461};
8462module_platform_driver(sm6150_asoc_machine_driver);
8463
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530[diff] [blame]8464MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530[diff] [blame]8465MODULE_LICENSE("GPL v2");
8466MODULE_ALIAS("platform:" DRV_NAME);
8467MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);