blob: f62c39ec0fc54e9a30a31e1fa51bbd86d1257748 [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +053039#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053040#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +053043#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +053044#include "codecs/wcd937x/internal.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053045
46#define DRV_NAME "sm6150-asoc-snd"
47
48#define __CHIPSET__ "SM6150 "
49#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
50
51#define SAMPLING_RATE_8KHZ 8000
52#define SAMPLING_RATE_11P025KHZ 11025
53#define SAMPLING_RATE_16KHZ 16000
54#define SAMPLING_RATE_22P05KHZ 22050
55#define SAMPLING_RATE_32KHZ 32000
56#define SAMPLING_RATE_44P1KHZ 44100
57#define SAMPLING_RATE_48KHZ 48000
58#define SAMPLING_RATE_88P2KHZ 88200
59#define SAMPLING_RATE_96KHZ 96000
60#define SAMPLING_RATE_176P4KHZ 176400
61#define SAMPLING_RATE_192KHZ 192000
62#define SAMPLING_RATE_352P8KHZ 352800
63#define SAMPLING_RATE_384KHZ 384000
64
65#define WCD9XXX_MBHC_DEF_BUTTONS 8
66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define CODEC_EXT_CLK_RATE 9600000
68#define ADSP_STATE_READY_TIMEOUT_MS 3000
69#define DEV_NAME_STR_LEN 32
70
71#define WSA8810_NAME_1 "wsa881x.20170211"
72#define WSA8810_NAME_2 "wsa881x.20170212"
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75#define TDM_CHANNEL_MAX 8
76
77#define ADSP_STATE_READY_TIMEOUT_MS 3000
78#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
79#define MSM_HIFI_ON 1
80
81enum {
82 SLIM_RX_0 = 0,
83 SLIM_RX_1,
84 SLIM_RX_2,
85 SLIM_RX_3,
86 SLIM_RX_4,
87 SLIM_RX_5,
88 SLIM_RX_6,
89 SLIM_RX_7,
90 SLIM_RX_MAX,
91};
92enum {
93 SLIM_TX_0 = 0,
94 SLIM_TX_1,
95 SLIM_TX_2,
96 SLIM_TX_3,
97 SLIM_TX_4,
98 SLIM_TX_5,
99 SLIM_TX_6,
100 SLIM_TX_7,
101 SLIM_TX_8,
102 SLIM_TX_MAX,
103};
104
105enum {
106 PRIM_MI2S = 0,
107 SEC_MI2S,
108 TERT_MI2S,
109 QUAT_MI2S,
110 QUIN_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 PRIM_AUX_PCM = 0,
116 SEC_AUX_PCM,
117 TERT_AUX_PCM,
118 QUAT_AUX_PCM,
119 QUIN_AUX_PCM,
120 AUX_PCM_MAX,
121};
122
123enum {
124 WSA_CDC_DMA_RX_0 = 0,
125 WSA_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_0,
127 RX_CDC_DMA_RX_1,
128 RX_CDC_DMA_RX_2,
129 RX_CDC_DMA_RX_3,
130 RX_CDC_DMA_RX_5,
131 CDC_DMA_RX_MAX,
132};
133
134enum {
135 WSA_CDC_DMA_TX_0 = 0,
136 WSA_CDC_DMA_TX_1,
137 WSA_CDC_DMA_TX_2,
138 TX_CDC_DMA_TX_0,
139 TX_CDC_DMA_TX_3,
140 TX_CDC_DMA_TX_4,
141 CDC_DMA_TX_MAX,
142};
143
144struct mi2s_conf {
145 struct mutex lock;
146 u32 ref_cnt;
147 u32 msm_is_mi2s_master;
148};
149
150static u32 mi2s_ebit_clk[MI2S_MAX] = {
151 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
156};
157
158struct dev_config {
159 u32 sample_rate;
160 u32 bit_format;
161 u32 channels;
162};
163
164enum {
165 DP_RX_IDX = 0,
166 EXT_DISP_RX_IDX_MAX,
167};
168
169struct msm_wsa881x_dev_info {
170 struct device_node *of_node;
171 u32 index;
172};
173
174struct aux_codec_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179enum pinctrl_pin_state {
180 STATE_DISABLE = 0, /* All pins are in sleep state */
181 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
182 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
183};
184
185struct msm_pinctrl_info {
186 struct pinctrl *pinctrl;
187 struct pinctrl_state *mi2s_disable;
188 struct pinctrl_state *tdm_disable;
189 struct pinctrl_state *mi2s_active;
190 struct pinctrl_state *tdm_active;
191 enum pinctrl_pin_state curr_state;
192};
193
194struct msm_asoc_mach_data {
195 struct snd_info_entry *codec_root;
196 struct msm_pinctrl_info pinctrl_info;
197 int usbc_en2_gpio; /* used by gpio driver API */
198 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
199 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
200 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
201 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
204};
205
206struct msm_asoc_wcd93xx_codec {
207 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
208 enum afe_config_type config_type);
209};
210
211static const char *const pin_states[] = {"sleep", "i2s-active",
212 "tdm-active"};
213
214static struct snd_soc_card snd_soc_card_sm6150_msm;
215
216enum {
217 TDM_0 = 0,
218 TDM_1,
219 TDM_2,
220 TDM_3,
221 TDM_4,
222 TDM_5,
223 TDM_6,
224 TDM_7,
225 TDM_PORT_MAX,
226};
227
228enum {
229 TDM_PRI = 0,
230 TDM_SEC,
231 TDM_TERT,
232 TDM_QUAT,
233 TDM_QUIN,
234 TDM_INTERFACE_MAX,
235};
236
237struct tdm_port {
238 u32 mode;
239 u32 channel;
240};
241
242/* TDM default config */
243static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
244 { /* PRI TDM */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
253 },
254 { /* SEC TDM */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
263 },
264 { /* TERT TDM */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
273 },
274 { /* QUAT TDM */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
283 },
284 { /* QUIN TDM */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
293 }
294
295};
296
297/* TDM default config */
298static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
299 { /* PRI TDM */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
308 },
309 { /* SEC TDM */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
318 },
319 { /* TERT TDM */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
328 },
329 { /* QUAT TDM */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
338 },
339 { /* QUIN TDM */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
348 }
349};
350
351
352/* Default configuration of slimbus channels */
353static struct dev_config slim_rx_cfg[] = {
354 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362};
363
364static struct dev_config slim_tx_cfg[] = {
365 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374};
375
376/* Default configuration of Codec DMA Interface Tx */
377static struct dev_config cdc_dma_rx_cfg[] = {
378 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385};
386
387/* Default configuration of Codec DMA Interface Rx */
388static struct dev_config cdc_dma_tx_cfg[] = {
389 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395};
396
397/* Default configuration of external display BE */
398static struct dev_config ext_disp_rx_cfg[] = {
399 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
400};
401
402static struct dev_config usb_rx_cfg = {
403 .sample_rate = SAMPLING_RATE_48KHZ,
404 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
405 .channels = 2,
406};
407
408static struct dev_config usb_tx_cfg = {
409 .sample_rate = SAMPLING_RATE_48KHZ,
410 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
411 .channels = 1,
412};
413
414static struct dev_config proxy_rx_cfg = {
415 .sample_rate = SAMPLING_RATE_48KHZ,
416 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
417 .channels = 2,
418};
419
420/* Default configuration of MI2S channels */
421static struct dev_config mi2s_rx_cfg[] = {
422 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427};
428
429static struct dev_config mi2s_tx_cfg[] = {
430 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435};
436
437static struct dev_config aux_pcm_rx_cfg[] = {
438 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443};
444
445static struct dev_config aux_pcm_tx_cfg[] = {
446 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451};
452static int msm_vi_feed_tx_ch = 2;
453static const char *const slim_rx_ch_text[] = {"One", "Two"};
454static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
455 "Five", "Six", "Seven",
456 "Eight"};
457static const char *const vi_feed_ch_text[] = {"One", "Two"};
458static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
459 "S32_LE"};
460static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
461 "S24_3LE"};
462static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
463 "KHZ_32", "KHZ_44P1", "KHZ_48",
464 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
465 "KHZ_192", "KHZ_352P8", "KHZ_384"};
466static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
467 "KHZ_44P1", "KHZ_48",
468 "KHZ_88P2", "KHZ_96"};
469static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
470 "Five", "Six", "Seven",
471 "Eight"};
472static char const *ch_text[] = {"Two", "Three", "Four", "Five",
473 "Six", "Seven", "Eight"};
474static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
475 "KHZ_16", "KHZ_22P05",
476 "KHZ_32", "KHZ_44P1", "KHZ_48",
477 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
478 "KHZ_192", "KHZ_352P8", "KHZ_384"};
479static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
480 "KHZ_192", "KHZ_32", "KHZ_44P1",
481 "KHZ_88P2", "KHZ_176P4" };
482static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
483 "Five", "Six", "Seven", "Eight"};
484static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
485static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
486 "KHZ_48", "KHZ_176P4",
487 "KHZ_352P8"};
488static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
489static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
490 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
491 "KHZ_48", "KHZ_96", "KHZ_192"};
492static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
493 "Five", "Six", "Seven",
494 "Eight"};
495static const char *const hifi_text[] = {"Off", "On"};
496static const char *const qos_text[] = {"Disable", "Enable"};
497
498static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
499static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
500 "Five", "Six", "Seven",
501 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530502static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
503 "KHZ_16", "KHZ_22P05",
504 "KHZ_32", "KHZ_44P1", "KHZ_48",
505 "KHZ_88P2", "KHZ_96",
506 "KHZ_176P4", "KHZ_192",
507 "KHZ_352P8", "KHZ_384"};
508
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530509
510static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
537 ext_disp_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
542static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
543static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
575static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
577static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
578static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
579static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
619 cdc_dma_sample_rate_text);
620static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
621 cdc_dma_sample_rate_text);
622static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
623 cdc_dma_sample_rate_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
625 cdc_dma_sample_rate_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
627 cdc_dma_sample_rate_text);
628static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
629 cdc_dma_sample_rate_text);
630
631static struct platform_device *spdev;
632
633static int msm_hifi_control;
634static bool is_initial_boot;
635static bool codec_reg_done;
636static struct snd_soc_aux_dev *msm_aux_dev;
637static struct snd_soc_codec_conf *msm_codec_conf;
638static struct msm_asoc_wcd93xx_codec msm_codec_fn;
639
640static int dmic_0_1_gpio_cnt;
641static int dmic_2_3_gpio_cnt;
642
643static void *def_wcd_mbhc_cal(void);
644static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
645 int enable, bool dapm);
646static int msm_wsa881x_init(struct snd_soc_component *component);
647static int msm_aux_codec_init(struct snd_soc_component *component);
648
649/*
650 * Need to report LINEIN
651 * if R/L channel impedance is larger than 5K ohm
652 */
653static struct wcd_mbhc_config wcd_mbhc_cfg = {
654 .read_fw_bin = false,
655 .calibration = NULL,
656 .detect_extn_cable = true,
657 .mono_stero_detection = false,
658 .swap_gnd_mic = NULL,
659 .hs_ext_micbias = true,
660 .key_code[0] = KEY_MEDIA,
661 .key_code[1] = KEY_VOICECOMMAND,
662 .key_code[2] = KEY_VOLUMEUP,
663 .key_code[3] = KEY_VOLUMEDOWN,
664 .key_code[4] = 0,
665 .key_code[5] = 0,
666 .key_code[6] = 0,
667 .key_code[7] = 0,
668 .linein_th = 5000,
669 .moisture_en = true,
670 .mbhc_micbias = MIC_BIAS_2,
671 .anc_micbias = MIC_BIAS_2,
672 .enable_anc_mic_detect = false,
673};
674
675static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
676 {"MIC BIAS1", NULL, "MCLK TX"},
677 {"MIC BIAS2", NULL, "MCLK TX"},
678 {"MIC BIAS3", NULL, "MCLK TX"},
679 {"MIC BIAS4", NULL, "MCLK TX"},
680};
681
682static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
683 {
684 AFE_API_VERSION_I2S_CONFIG,
685 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
686 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
687 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
688 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
689 0,
690 },
691 {
692 AFE_API_VERSION_I2S_CONFIG,
693 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
694 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
695 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
696 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
697 0,
698 },
699 {
700 AFE_API_VERSION_I2S_CONFIG,
701 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
702 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
703 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
704 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
705 0,
706 },
707 {
708 AFE_API_VERSION_I2S_CONFIG,
709 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
710 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
711 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
712 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
713 0,
714 },
715 {
716 AFE_API_VERSION_I2S_CONFIG,
717 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
718 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
719 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
720 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
721 0,
722 }
723
724};
725
726static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
727
728static int slim_get_sample_rate_val(int sample_rate)
729{
730 int sample_rate_val = 0;
731
732 switch (sample_rate) {
733 case SAMPLING_RATE_8KHZ:
734 sample_rate_val = 0;
735 break;
736 case SAMPLING_RATE_16KHZ:
737 sample_rate_val = 1;
738 break;
739 case SAMPLING_RATE_32KHZ:
740 sample_rate_val = 2;
741 break;
742 case SAMPLING_RATE_44P1KHZ:
743 sample_rate_val = 3;
744 break;
745 case SAMPLING_RATE_48KHZ:
746 sample_rate_val = 4;
747 break;
748 case SAMPLING_RATE_88P2KHZ:
749 sample_rate_val = 5;
750 break;
751 case SAMPLING_RATE_96KHZ:
752 sample_rate_val = 6;
753 break;
754 case SAMPLING_RATE_176P4KHZ:
755 sample_rate_val = 7;
756 break;
757 case SAMPLING_RATE_192KHZ:
758 sample_rate_val = 8;
759 break;
760 case SAMPLING_RATE_352P8KHZ:
761 sample_rate_val = 9;
762 break;
763 case SAMPLING_RATE_384KHZ:
764 sample_rate_val = 10;
765 break;
766 default:
767 sample_rate_val = 4;
768 break;
769 }
770 return sample_rate_val;
771}
772
773static int slim_get_sample_rate(int value)
774{
775 int sample_rate = 0;
776
777 switch (value) {
778 case 0:
779 sample_rate = SAMPLING_RATE_8KHZ;
780 break;
781 case 1:
782 sample_rate = SAMPLING_RATE_16KHZ;
783 break;
784 case 2:
785 sample_rate = SAMPLING_RATE_32KHZ;
786 break;
787 case 3:
788 sample_rate = SAMPLING_RATE_44P1KHZ;
789 break;
790 case 4:
791 sample_rate = SAMPLING_RATE_48KHZ;
792 break;
793 case 5:
794 sample_rate = SAMPLING_RATE_88P2KHZ;
795 break;
796 case 6:
797 sample_rate = SAMPLING_RATE_96KHZ;
798 break;
799 case 7:
800 sample_rate = SAMPLING_RATE_176P4KHZ;
801 break;
802 case 8:
803 sample_rate = SAMPLING_RATE_192KHZ;
804 break;
805 case 9:
806 sample_rate = SAMPLING_RATE_352P8KHZ;
807 break;
808 case 10:
809 sample_rate = SAMPLING_RATE_384KHZ;
810 break;
811 default:
812 sample_rate = SAMPLING_RATE_48KHZ;
813 break;
814 }
815 return sample_rate;
816}
817
818static int slim_get_bit_format_val(int bit_format)
819{
820 int val = 0;
821
822 switch (bit_format) {
823 case SNDRV_PCM_FORMAT_S32_LE:
824 val = 3;
825 break;
826 case SNDRV_PCM_FORMAT_S24_3LE:
827 val = 2;
828 break;
829 case SNDRV_PCM_FORMAT_S24_LE:
830 val = 1;
831 break;
832 case SNDRV_PCM_FORMAT_S16_LE:
833 default:
834 val = 0;
835 break;
836 }
837 return val;
838}
839
840static int slim_get_bit_format(int val)
841{
842 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
843
844 switch (val) {
845 case 0:
846 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
847 break;
848 case 1:
849 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
850 break;
851 case 2:
852 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
853 break;
854 case 3:
855 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
856 break;
857 default:
858 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
859 break;
860 }
861 return bit_fmt;
862}
863
864static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
865{
866 int port_id = 0;
867
868 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
869 port_id = SLIM_RX_0;
870 } else if (strnstr(kcontrol->id.name,
871 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
872 port_id = SLIM_RX_2;
873 } else if (strnstr(kcontrol->id.name,
874 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
875 port_id = SLIM_RX_5;
876 } else if (strnstr(kcontrol->id.name,
877 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
878 port_id = SLIM_RX_6;
879 } else if (strnstr(kcontrol->id.name,
880 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
881 port_id = SLIM_TX_0;
882 } else if (strnstr(kcontrol->id.name,
883 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
884 port_id = SLIM_TX_1;
885 } else {
886 pr_err("%s: unsupported channel: %s\n",
887 __func__, kcontrol->id.name);
888 return -EINVAL;
889 }
890
891 return port_id;
892}
893
894static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
895 struct snd_ctl_elem_value *ucontrol)
896{
897 int ch_num = slim_get_port_idx(kcontrol);
898
899 if (ch_num < 0)
900 return ch_num;
901
902 ucontrol->value.enumerated.item[0] =
903 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
904
905 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
906 ch_num, slim_rx_cfg[ch_num].sample_rate,
907 ucontrol->value.enumerated.item[0]);
908
909 return 0;
910}
911
912static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
913 struct snd_ctl_elem_value *ucontrol)
914{
915 int ch_num = slim_get_port_idx(kcontrol);
916
917 if (ch_num < 0)
918 return ch_num;
919
920 slim_rx_cfg[ch_num].sample_rate =
921 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
922
923 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
924 ch_num, slim_rx_cfg[ch_num].sample_rate,
925 ucontrol->value.enumerated.item[0]);
926
927 return 0;
928}
929
930static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
931 struct snd_ctl_elem_value *ucontrol)
932{
933 int ch_num = slim_get_port_idx(kcontrol);
934
935 if (ch_num < 0)
936 return ch_num;
937
938 ucontrol->value.enumerated.item[0] =
939 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
940
941 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
942 ch_num, slim_tx_cfg[ch_num].sample_rate,
943 ucontrol->value.enumerated.item[0]);
944
945 return 0;
946}
947
948static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
949 struct snd_ctl_elem_value *ucontrol)
950{
951 int sample_rate = 0;
952 int ch_num = slim_get_port_idx(kcontrol);
953
954 if (ch_num < 0)
955 return ch_num;
956
957 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
958 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
959 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
960 __func__, sample_rate);
961 return -EINVAL;
962 }
963 slim_tx_cfg[ch_num].sample_rate = sample_rate;
964
965 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
966 ch_num, slim_tx_cfg[ch_num].sample_rate,
967 ucontrol->value.enumerated.item[0]);
968
969 return 0;
970}
971
972static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
973 struct snd_ctl_elem_value *ucontrol)
974{
975 int ch_num = slim_get_port_idx(kcontrol);
976
977 if (ch_num < 0)
978 return ch_num;
979
980 ucontrol->value.enumerated.item[0] =
981 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
982
983 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
984 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
985 ucontrol->value.enumerated.item[0]);
986
987 return 0;
988}
989
990static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 int ch_num = slim_get_port_idx(kcontrol);
994
995 if (ch_num < 0)
996 return ch_num;
997
998 slim_rx_cfg[ch_num].bit_format =
999 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1000
1001 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1002 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1003 ucontrol->value.enumerated.item[0]);
1004
1005 return 0;
1006}
1007
1008static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1009 struct snd_ctl_elem_value *ucontrol)
1010{
1011 int ch_num = slim_get_port_idx(kcontrol);
1012
1013 if (ch_num < 0)
1014 return ch_num;
1015
1016 ucontrol->value.enumerated.item[0] =
1017 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1018
1019 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1020 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1021 ucontrol->value.enumerated.item[0]);
1022
1023 return 0;
1024}
1025
1026static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 int ch_num = slim_get_port_idx(kcontrol);
1030
1031 if (ch_num < 0)
1032 return ch_num;
1033
1034 slim_tx_cfg[ch_num].bit_format =
1035 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1036
1037 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1038 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1039 ucontrol->value.enumerated.item[0]);
1040
1041 return 0;
1042}
1043
1044static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1045 struct snd_ctl_elem_value *ucontrol)
1046{
1047 int ch_num = slim_get_port_idx(kcontrol);
1048
1049 if (ch_num < 0)
1050 return ch_num;
1051
1052 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1053 ch_num, slim_rx_cfg[ch_num].channels);
1054 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1055
1056 return 0;
1057}
1058
1059static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1060 struct snd_ctl_elem_value *ucontrol)
1061{
1062 int ch_num = slim_get_port_idx(kcontrol);
1063
1064 if (ch_num < 0)
1065 return ch_num;
1066
1067 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1068 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1069 ch_num, slim_rx_cfg[ch_num].channels);
1070
1071 return 1;
1072}
1073
1074static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1075 struct snd_ctl_elem_value *ucontrol)
1076{
1077 int ch_num = slim_get_port_idx(kcontrol);
1078
1079 if (ch_num < 0)
1080 return ch_num;
1081
1082 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1083 ch_num, slim_tx_cfg[ch_num].channels);
1084 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1085
1086 return 0;
1087}
1088
1089static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1090 struct snd_ctl_elem_value *ucontrol)
1091{
1092 int ch_num = slim_get_port_idx(kcontrol);
1093
1094 if (ch_num < 0)
1095 return ch_num;
1096
1097 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1098 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1099 ch_num, slim_tx_cfg[ch_num].channels);
1100
1101 return 1;
1102}
1103
1104static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_value *ucontrol)
1106{
1107 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1108 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1109 ucontrol->value.integer.value[0]);
1110 return 0;
1111}
1112
1113static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115{
1116 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1117
1118 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1119 return 1;
1120}
1121
1122static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1123 struct snd_ctl_elem_value *ucontrol)
1124{
1125 /*
1126 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1127 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1128 * value.
1129 */
1130 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1131 case SAMPLING_RATE_96KHZ:
1132 ucontrol->value.integer.value[0] = 5;
1133 break;
1134 case SAMPLING_RATE_88P2KHZ:
1135 ucontrol->value.integer.value[0] = 4;
1136 break;
1137 case SAMPLING_RATE_48KHZ:
1138 ucontrol->value.integer.value[0] = 3;
1139 break;
1140 case SAMPLING_RATE_44P1KHZ:
1141 ucontrol->value.integer.value[0] = 2;
1142 break;
1143 case SAMPLING_RATE_16KHZ:
1144 ucontrol->value.integer.value[0] = 1;
1145 break;
1146 case SAMPLING_RATE_8KHZ:
1147 default:
1148 ucontrol->value.integer.value[0] = 0;
1149 break;
1150 }
1151 pr_debug("%s: sample rate = %d\n", __func__,
1152 slim_rx_cfg[SLIM_RX_7].sample_rate);
1153
1154 return 0;
1155}
1156
1157static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1158 struct snd_ctl_elem_value *ucontrol)
1159{
1160 switch (ucontrol->value.integer.value[0]) {
1161 case 1:
1162 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1163 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1164 break;
1165 case 2:
1166 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1167 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1168 break;
1169 case 3:
1170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1171 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1172 break;
1173 case 4:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1176 break;
1177 case 5:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1180 break;
1181 case 0:
1182 default:
1183 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1184 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1185 break;
1186 }
1187 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1188 __func__,
1189 slim_rx_cfg[SLIM_RX_7].sample_rate,
1190 slim_tx_cfg[SLIM_TX_7].sample_rate,
1191 ucontrol->value.enumerated.item[0]);
1192
1193 return 0;
1194}
1195
1196static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1197{
1198 int idx = 0;
1199
1200 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1201 sizeof("WSA_CDC_DMA_RX_0")))
1202 idx = WSA_CDC_DMA_RX_0;
1203 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1204 sizeof("WSA_CDC_DMA_RX_0")))
1205 idx = WSA_CDC_DMA_RX_1;
1206 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1207 sizeof("RX_CDC_DMA_RX_0")))
1208 idx = RX_CDC_DMA_RX_0;
1209 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1210 sizeof("RX_CDC_DMA_RX_1")))
1211 idx = RX_CDC_DMA_RX_1;
1212 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1213 sizeof("RX_CDC_DMA_RX_2")))
1214 idx = RX_CDC_DMA_RX_2;
1215 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1216 sizeof("RX_CDC_DMA_RX_3")))
1217 idx = RX_CDC_DMA_RX_3;
1218 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1219 sizeof("RX_CDC_DMA_RX_5")))
1220 idx = RX_CDC_DMA_RX_5;
1221 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1222 sizeof("WSA_CDC_DMA_TX_0")))
1223 idx = WSA_CDC_DMA_TX_0;
1224 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1225 sizeof("WSA_CDC_DMA_TX_1")))
1226 idx = WSA_CDC_DMA_TX_1;
1227 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1228 sizeof("WSA_CDC_DMA_TX_2")))
1229 idx = WSA_CDC_DMA_TX_2;
1230 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1231 sizeof("TX_CDC_DMA_TX_0")))
1232 idx = TX_CDC_DMA_TX_0;
1233 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1234 sizeof("TX_CDC_DMA_TX_3")))
1235 idx = TX_CDC_DMA_TX_3;
1236 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1237 sizeof("TX_CDC_DMA_TX_4")))
1238 idx = TX_CDC_DMA_TX_4;
1239 else {
1240 pr_err("%s: unsupported channel: %s\n",
1241 __func__, kcontrol->id.name);
1242 return -EINVAL;
1243 }
1244
1245 return idx;
1246}
1247
1248static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1249 struct snd_ctl_elem_value *ucontrol)
1250{
1251 int ch_num = cdc_dma_get_port_idx(kcontrol);
1252
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301253 if (ch_num < 0) {
1254 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301255 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301256 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301257
1258 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1259 cdc_dma_rx_cfg[ch_num].channels - 1);
1260 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1261 return 0;
1262}
1263
1264static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1265 struct snd_ctl_elem_value *ucontrol)
1266{
1267 int ch_num = cdc_dma_get_port_idx(kcontrol);
1268
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301269 if (ch_num < 0) {
1270 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301271 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301272 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301273
1274 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1275
1276 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1277 cdc_dma_rx_cfg[ch_num].channels);
1278 return 1;
1279}
1280
1281static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_value *ucontrol)
1283{
1284 int ch_num = cdc_dma_get_port_idx(kcontrol);
1285
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301286 if (ch_num < 0) {
1287 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1288 return ch_num;
1289 }
1290
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301291 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1292 case SNDRV_PCM_FORMAT_S32_LE:
1293 ucontrol->value.integer.value[0] = 3;
1294 break;
1295 case SNDRV_PCM_FORMAT_S24_3LE:
1296 ucontrol->value.integer.value[0] = 2;
1297 break;
1298 case SNDRV_PCM_FORMAT_S24_LE:
1299 ucontrol->value.integer.value[0] = 1;
1300 break;
1301 case SNDRV_PCM_FORMAT_S16_LE:
1302 default:
1303 ucontrol->value.integer.value[0] = 0;
1304 break;
1305 }
1306
1307 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1308 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1309 ucontrol->value.integer.value[0]);
1310 return 0;
1311}
1312
1313static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1314 struct snd_ctl_elem_value *ucontrol)
1315{
1316 int rc = 0;
1317 int ch_num = cdc_dma_get_port_idx(kcontrol);
1318
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301319 if (ch_num < 0) {
1320 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1321 return ch_num;
1322 }
1323
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301324 switch (ucontrol->value.integer.value[0]) {
1325 case 3:
1326 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1327 break;
1328 case 2:
1329 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1330 break;
1331 case 1:
1332 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1333 break;
1334 case 0:
1335 default:
1336 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1337 break;
1338 }
1339 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1340 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1341 ucontrol->value.integer.value[0]);
1342
1343 return rc;
1344}
1345
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301346
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301347static int cdc_dma_get_sample_rate_val(int sample_rate)
1348{
1349 int sample_rate_val = 0;
1350
1351 switch (sample_rate) {
1352 case SAMPLING_RATE_8KHZ:
1353 sample_rate_val = 0;
1354 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301355 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301356 sample_rate_val = 1;
1357 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301358 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301359 sample_rate_val = 2;
1360 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301361 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301362 sample_rate_val = 3;
1363 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301364 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301365 sample_rate_val = 4;
1366 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301367 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301368 sample_rate_val = 5;
1369 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301370 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301371 sample_rate_val = 6;
1372 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301373 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301374 sample_rate_val = 7;
1375 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301376 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301377 sample_rate_val = 8;
1378 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301379 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301380 sample_rate_val = 9;
1381 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301382 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301383 sample_rate_val = 10;
1384 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301385 case SAMPLING_RATE_352P8KHZ:
1386 sample_rate_val = 11;
1387 break;
1388 case SAMPLING_RATE_384KHZ:
1389 sample_rate_val = 12;
1390 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301391 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301392 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301393 break;
1394 }
1395 return sample_rate_val;
1396}
1397
1398static int cdc_dma_get_sample_rate(int value)
1399{
1400 int sample_rate = 0;
1401
1402 switch (value) {
1403 case 0:
1404 sample_rate = SAMPLING_RATE_8KHZ;
1405 break;
1406 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301407 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301408 break;
1409 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301410 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301411 break;
1412 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301413 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301414 break;
1415 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301416 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301417 break;
1418 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301419 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301420 break;
1421 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301422 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301423 break;
1424 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301425 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301426 break;
1427 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301428 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301429 break;
1430 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301431 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301432 break;
1433 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301434 sample_rate = SAMPLING_RATE_192KHZ;
1435 break;
1436 case 11:
1437 sample_rate = SAMPLING_RATE_352P8KHZ;
1438 break;
1439 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301440 sample_rate = SAMPLING_RATE_384KHZ;
1441 break;
1442 default:
1443 sample_rate = SAMPLING_RATE_48KHZ;
1444 break;
1445 }
1446 return sample_rate;
1447}
1448
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301449static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1450 struct snd_ctl_elem_value *ucontrol)
1451{
1452 int ch_num = cdc_dma_get_port_idx(kcontrol);
1453
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301454 if (ch_num < 0) {
1455 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301456 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301457 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301458
1459 ucontrol->value.enumerated.item[0] =
1460 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1461
1462 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1463 cdc_dma_rx_cfg[ch_num].sample_rate);
1464 return 0;
1465}
1466
1467static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1468 struct snd_ctl_elem_value *ucontrol)
1469{
1470 int ch_num = cdc_dma_get_port_idx(kcontrol);
1471
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301472 if (ch_num < 0) {
1473 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301474 return ch_num;
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301475 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301476
1477 cdc_dma_rx_cfg[ch_num].sample_rate =
1478 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1479
1480
1481 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1482 __func__, ucontrol->value.enumerated.item[0],
1483 cdc_dma_rx_cfg[ch_num].sample_rate);
1484 return 0;
1485}
1486
1487static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1488 struct snd_ctl_elem_value *ucontrol)
1489{
1490 int ch_num = cdc_dma_get_port_idx(kcontrol);
1491
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301492 if (ch_num < 0) {
1493 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1494 return ch_num;
1495 }
1496
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301497 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1498 cdc_dma_tx_cfg[ch_num].channels);
1499 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1500 return 0;
1501}
1502
1503static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1504 struct snd_ctl_elem_value *ucontrol)
1505{
1506 int ch_num = cdc_dma_get_port_idx(kcontrol);
1507
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301508 if (ch_num < 0) {
1509 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1510 return ch_num;
1511 }
1512
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301513 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1514
1515 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1516 cdc_dma_tx_cfg[ch_num].channels);
1517 return 1;
1518}
1519
1520static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1521 struct snd_ctl_elem_value *ucontrol)
1522{
1523 int sample_rate_val;
1524 int ch_num = cdc_dma_get_port_idx(kcontrol);
1525
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301526 if (ch_num < 0) {
1527 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1528 return ch_num;
1529 }
1530
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301531 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1532 case SAMPLING_RATE_384KHZ:
1533 sample_rate_val = 12;
1534 break;
1535 case SAMPLING_RATE_352P8KHZ:
1536 sample_rate_val = 11;
1537 break;
1538 case SAMPLING_RATE_192KHZ:
1539 sample_rate_val = 10;
1540 break;
1541 case SAMPLING_RATE_176P4KHZ:
1542 sample_rate_val = 9;
1543 break;
1544 case SAMPLING_RATE_96KHZ:
1545 sample_rate_val = 8;
1546 break;
1547 case SAMPLING_RATE_88P2KHZ:
1548 sample_rate_val = 7;
1549 break;
1550 case SAMPLING_RATE_48KHZ:
1551 sample_rate_val = 6;
1552 break;
1553 case SAMPLING_RATE_44P1KHZ:
1554 sample_rate_val = 5;
1555 break;
1556 case SAMPLING_RATE_32KHZ:
1557 sample_rate_val = 4;
1558 break;
1559 case SAMPLING_RATE_22P05KHZ:
1560 sample_rate_val = 3;
1561 break;
1562 case SAMPLING_RATE_16KHZ:
1563 sample_rate_val = 2;
1564 break;
1565 case SAMPLING_RATE_11P025KHZ:
1566 sample_rate_val = 1;
1567 break;
1568 case SAMPLING_RATE_8KHZ:
1569 sample_rate_val = 0;
1570 break;
1571 default:
1572 sample_rate_val = 6;
1573 break;
1574 }
1575
1576 ucontrol->value.integer.value[0] = sample_rate_val;
1577 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1578 cdc_dma_tx_cfg[ch_num].sample_rate);
1579 return 0;
1580}
1581
1582static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1583 struct snd_ctl_elem_value *ucontrol)
1584{
1585 int ch_num = cdc_dma_get_port_idx(kcontrol);
1586
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301587 if (ch_num < 0) {
1588 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1589 return ch_num;
1590 }
1591
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301592 switch (ucontrol->value.integer.value[0]) {
1593 case 12:
1594 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1595 break;
1596 case 11:
1597 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1598 break;
1599 case 10:
1600 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1601 break;
1602 case 9:
1603 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1604 break;
1605 case 8:
1606 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1607 break;
1608 case 7:
1609 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1610 break;
1611 case 6:
1612 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1613 break;
1614 case 5:
1615 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1616 break;
1617 case 4:
1618 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1619 break;
1620 case 3:
1621 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1622 break;
1623 case 2:
1624 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1625 break;
1626 case 1:
1627 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1628 break;
1629 case 0:
1630 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1631 break;
1632 default:
1633 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1634 break;
1635 }
1636
1637 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1638 __func__, ucontrol->value.integer.value[0],
1639 cdc_dma_tx_cfg[ch_num].sample_rate);
1640 return 0;
1641}
1642
1643static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1644 struct snd_ctl_elem_value *ucontrol)
1645{
1646 int ch_num = cdc_dma_get_port_idx(kcontrol);
1647
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301648 if (ch_num < 0) {
1649 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1650 return ch_num;
1651 }
1652
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301653 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1654 case SNDRV_PCM_FORMAT_S32_LE:
1655 ucontrol->value.integer.value[0] = 3;
1656 break;
1657 case SNDRV_PCM_FORMAT_S24_3LE:
1658 ucontrol->value.integer.value[0] = 2;
1659 break;
1660 case SNDRV_PCM_FORMAT_S24_LE:
1661 ucontrol->value.integer.value[0] = 1;
1662 break;
1663 case SNDRV_PCM_FORMAT_S16_LE:
1664 default:
1665 ucontrol->value.integer.value[0] = 0;
1666 break;
1667 }
1668
1669 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1670 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1671 ucontrol->value.integer.value[0]);
1672 return 0;
1673}
1674
1675static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1676 struct snd_ctl_elem_value *ucontrol)
1677{
1678 int rc = 0;
1679 int ch_num = cdc_dma_get_port_idx(kcontrol);
1680
Tanya Dixitd85e6f32018-09-14 16:06:20 +05301681 if (ch_num < 0) {
1682 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
1683 return ch_num;
1684 }
1685
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301686 switch (ucontrol->value.integer.value[0]) {
1687 case 3:
1688 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1689 break;
1690 case 2:
1691 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1692 break;
1693 case 1:
1694 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1695 break;
1696 case 0:
1697 default:
1698 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1699 break;
1700 }
1701 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1702 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1703 ucontrol->value.integer.value[0]);
1704
1705 return rc;
1706}
1707
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301708static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1709 struct snd_ctl_elem_value *ucontrol)
1710{
1711 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1712 usb_rx_cfg.channels);
1713 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1714 return 0;
1715}
1716
1717static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1718 struct snd_ctl_elem_value *ucontrol)
1719{
1720 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1721
1722 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1723 return 1;
1724}
1725
1726static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1727 struct snd_ctl_elem_value *ucontrol)
1728{
1729 int sample_rate_val;
1730
1731 switch (usb_rx_cfg.sample_rate) {
1732 case SAMPLING_RATE_384KHZ:
1733 sample_rate_val = 12;
1734 break;
1735 case SAMPLING_RATE_352P8KHZ:
1736 sample_rate_val = 11;
1737 break;
1738 case SAMPLING_RATE_192KHZ:
1739 sample_rate_val = 10;
1740 break;
1741 case SAMPLING_RATE_176P4KHZ:
1742 sample_rate_val = 9;
1743 break;
1744 case SAMPLING_RATE_96KHZ:
1745 sample_rate_val = 8;
1746 break;
1747 case SAMPLING_RATE_88P2KHZ:
1748 sample_rate_val = 7;
1749 break;
1750 case SAMPLING_RATE_48KHZ:
1751 sample_rate_val = 6;
1752 break;
1753 case SAMPLING_RATE_44P1KHZ:
1754 sample_rate_val = 5;
1755 break;
1756 case SAMPLING_RATE_32KHZ:
1757 sample_rate_val = 4;
1758 break;
1759 case SAMPLING_RATE_22P05KHZ:
1760 sample_rate_val = 3;
1761 break;
1762 case SAMPLING_RATE_16KHZ:
1763 sample_rate_val = 2;
1764 break;
1765 case SAMPLING_RATE_11P025KHZ:
1766 sample_rate_val = 1;
1767 break;
1768 case SAMPLING_RATE_8KHZ:
1769 default:
1770 sample_rate_val = 0;
1771 break;
1772 }
1773
1774 ucontrol->value.integer.value[0] = sample_rate_val;
1775 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1776 usb_rx_cfg.sample_rate);
1777 return 0;
1778}
1779
1780static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1781 struct snd_ctl_elem_value *ucontrol)
1782{
1783 switch (ucontrol->value.integer.value[0]) {
1784 case 12:
1785 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1786 break;
1787 case 11:
1788 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1789 break;
1790 case 10:
1791 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1792 break;
1793 case 9:
1794 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1795 break;
1796 case 8:
1797 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1798 break;
1799 case 7:
1800 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1801 break;
1802 case 6:
1803 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1804 break;
1805 case 5:
1806 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1807 break;
1808 case 4:
1809 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1810 break;
1811 case 3:
1812 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1813 break;
1814 case 2:
1815 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1816 break;
1817 case 1:
1818 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1819 break;
1820 case 0:
1821 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1822 break;
1823 default:
1824 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1825 break;
1826 }
1827
1828 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1829 __func__, ucontrol->value.integer.value[0],
1830 usb_rx_cfg.sample_rate);
1831 return 0;
1832}
1833
1834static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1835 struct snd_ctl_elem_value *ucontrol)
1836{
1837 switch (usb_rx_cfg.bit_format) {
1838 case SNDRV_PCM_FORMAT_S32_LE:
1839 ucontrol->value.integer.value[0] = 3;
1840 break;
1841 case SNDRV_PCM_FORMAT_S24_3LE:
1842 ucontrol->value.integer.value[0] = 2;
1843 break;
1844 case SNDRV_PCM_FORMAT_S24_LE:
1845 ucontrol->value.integer.value[0] = 1;
1846 break;
1847 case SNDRV_PCM_FORMAT_S16_LE:
1848 default:
1849 ucontrol->value.integer.value[0] = 0;
1850 break;
1851 }
1852
1853 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1854 __func__, usb_rx_cfg.bit_format,
1855 ucontrol->value.integer.value[0]);
1856 return 0;
1857}
1858
1859static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1860 struct snd_ctl_elem_value *ucontrol)
1861{
1862 int rc = 0;
1863
1864 switch (ucontrol->value.integer.value[0]) {
1865 case 3:
1866 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1867 break;
1868 case 2:
1869 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1870 break;
1871 case 1:
1872 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1873 break;
1874 case 0:
1875 default:
1876 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1877 break;
1878 }
1879 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1880 __func__, usb_rx_cfg.bit_format,
1881 ucontrol->value.integer.value[0]);
1882
1883 return rc;
1884}
1885
1886static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1887 struct snd_ctl_elem_value *ucontrol)
1888{
1889 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1890 usb_tx_cfg.channels);
1891 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1892 return 0;
1893}
1894
1895static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1896 struct snd_ctl_elem_value *ucontrol)
1897{
1898 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1899
1900 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1901 return 1;
1902}
1903
1904static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1905 struct snd_ctl_elem_value *ucontrol)
1906{
1907 int sample_rate_val;
1908
1909 switch (usb_tx_cfg.sample_rate) {
1910 case SAMPLING_RATE_384KHZ:
1911 sample_rate_val = 12;
1912 break;
1913 case SAMPLING_RATE_352P8KHZ:
1914 sample_rate_val = 11;
1915 break;
1916 case SAMPLING_RATE_192KHZ:
1917 sample_rate_val = 10;
1918 break;
1919 case SAMPLING_RATE_176P4KHZ:
1920 sample_rate_val = 9;
1921 break;
1922 case SAMPLING_RATE_96KHZ:
1923 sample_rate_val = 8;
1924 break;
1925 case SAMPLING_RATE_88P2KHZ:
1926 sample_rate_val = 7;
1927 break;
1928 case SAMPLING_RATE_48KHZ:
1929 sample_rate_val = 6;
1930 break;
1931 case SAMPLING_RATE_44P1KHZ:
1932 sample_rate_val = 5;
1933 break;
1934 case SAMPLING_RATE_32KHZ:
1935 sample_rate_val = 4;
1936 break;
1937 case SAMPLING_RATE_22P05KHZ:
1938 sample_rate_val = 3;
1939 break;
1940 case SAMPLING_RATE_16KHZ:
1941 sample_rate_val = 2;
1942 break;
1943 case SAMPLING_RATE_11P025KHZ:
1944 sample_rate_val = 1;
1945 break;
1946 case SAMPLING_RATE_8KHZ:
1947 sample_rate_val = 0;
1948 break;
1949 default:
1950 sample_rate_val = 6;
1951 break;
1952 }
1953
1954 ucontrol->value.integer.value[0] = sample_rate_val;
1955 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1956 usb_tx_cfg.sample_rate);
1957 return 0;
1958}
1959
1960static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1961 struct snd_ctl_elem_value *ucontrol)
1962{
1963 switch (ucontrol->value.integer.value[0]) {
1964 case 12:
1965 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1966 break;
1967 case 11:
1968 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1969 break;
1970 case 10:
1971 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1972 break;
1973 case 9:
1974 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1975 break;
1976 case 8:
1977 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1978 break;
1979 case 7:
1980 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1981 break;
1982 case 6:
1983 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1984 break;
1985 case 5:
1986 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1987 break;
1988 case 4:
1989 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1990 break;
1991 case 3:
1992 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1993 break;
1994 case 2:
1995 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1996 break;
1997 case 1:
1998 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1999 break;
2000 case 0:
2001 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
2002 break;
2003 default:
2004 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
2005 break;
2006 }
2007
2008 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
2009 __func__, ucontrol->value.integer.value[0],
2010 usb_tx_cfg.sample_rate);
2011 return 0;
2012}
2013
2014static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
2016{
2017 switch (usb_tx_cfg.bit_format) {
2018 case SNDRV_PCM_FORMAT_S32_LE:
2019 ucontrol->value.integer.value[0] = 3;
2020 break;
2021 case SNDRV_PCM_FORMAT_S24_3LE:
2022 ucontrol->value.integer.value[0] = 2;
2023 break;
2024 case SNDRV_PCM_FORMAT_S24_LE:
2025 ucontrol->value.integer.value[0] = 1;
2026 break;
2027 case SNDRV_PCM_FORMAT_S16_LE:
2028 default:
2029 ucontrol->value.integer.value[0] = 0;
2030 break;
2031 }
2032
2033 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2034 __func__, usb_tx_cfg.bit_format,
2035 ucontrol->value.integer.value[0]);
2036 return 0;
2037}
2038
2039static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
2040 struct snd_ctl_elem_value *ucontrol)
2041{
2042 int rc = 0;
2043
2044 switch (ucontrol->value.integer.value[0]) {
2045 case 3:
2046 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
2047 break;
2048 case 2:
2049 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2050 break;
2051 case 1:
2052 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2053 break;
2054 case 0:
2055 default:
2056 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2057 break;
2058 }
2059 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2060 __func__, usb_tx_cfg.bit_format,
2061 ucontrol->value.integer.value[0]);
2062
2063 return rc;
2064}
2065
2066static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2067{
2068 int idx;
2069
2070 if (strnstr(kcontrol->id.name, "Display Port RX",
2071 sizeof("Display Port RX"))) {
2072 idx = DP_RX_IDX;
2073 } else {
2074 pr_err("%s: unsupported BE: %s\n",
2075 __func__, kcontrol->id.name);
2076 idx = -EINVAL;
2077 }
2078
2079 return idx;
2080}
2081
2082static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2083 struct snd_ctl_elem_value *ucontrol)
2084{
2085 int idx = ext_disp_get_port_idx(kcontrol);
2086
2087 if (idx < 0)
2088 return idx;
2089
2090 switch (ext_disp_rx_cfg[idx].bit_format) {
2091 case SNDRV_PCM_FORMAT_S24_3LE:
2092 ucontrol->value.integer.value[0] = 2;
2093 break;
2094 case SNDRV_PCM_FORMAT_S24_LE:
2095 ucontrol->value.integer.value[0] = 1;
2096 break;
2097 case SNDRV_PCM_FORMAT_S16_LE:
2098 default:
2099 ucontrol->value.integer.value[0] = 0;
2100 break;
2101 }
2102
2103 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2104 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2105 ucontrol->value.integer.value[0]);
2106 return 0;
2107}
2108
2109static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2110 struct snd_ctl_elem_value *ucontrol)
2111{
2112 int idx = ext_disp_get_port_idx(kcontrol);
2113
2114 if (idx < 0)
2115 return idx;
2116
2117 switch (ucontrol->value.integer.value[0]) {
2118 case 2:
2119 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2120 break;
2121 case 1:
2122 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2123 break;
2124 case 0:
2125 default:
2126 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2127 break;
2128 }
2129 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2130 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2131 ucontrol->value.integer.value[0]);
2132
2133 return 0;
2134}
2135
2136static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2137 struct snd_ctl_elem_value *ucontrol)
2138{
2139 int idx = ext_disp_get_port_idx(kcontrol);
2140
2141 if (idx < 0)
2142 return idx;
2143
2144 ucontrol->value.integer.value[0] =
2145 ext_disp_rx_cfg[idx].channels - 2;
2146
2147 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2148 idx, ext_disp_rx_cfg[idx].channels);
2149
2150 return 0;
2151}
2152
2153static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2154 struct snd_ctl_elem_value *ucontrol)
2155{
2156 int idx = ext_disp_get_port_idx(kcontrol);
2157
2158 if (idx < 0)
2159 return idx;
2160
2161 ext_disp_rx_cfg[idx].channels =
2162 ucontrol->value.integer.value[0] + 2;
2163
2164 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2165 idx, ext_disp_rx_cfg[idx].channels);
2166 return 1;
2167}
2168
2169static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2170 struct snd_ctl_elem_value *ucontrol)
2171{
2172 int sample_rate_val;
2173 int idx = ext_disp_get_port_idx(kcontrol);
2174
2175 if (idx < 0)
2176 return idx;
2177
2178 switch (ext_disp_rx_cfg[idx].sample_rate) {
2179 case SAMPLING_RATE_176P4KHZ:
2180 sample_rate_val = 6;
2181 break;
2182
2183 case SAMPLING_RATE_88P2KHZ:
2184 sample_rate_val = 5;
2185 break;
2186
2187 case SAMPLING_RATE_44P1KHZ:
2188 sample_rate_val = 4;
2189 break;
2190
2191 case SAMPLING_RATE_32KHZ:
2192 sample_rate_val = 3;
2193 break;
2194
2195 case SAMPLING_RATE_192KHZ:
2196 sample_rate_val = 2;
2197 break;
2198
2199 case SAMPLING_RATE_96KHZ:
2200 sample_rate_val = 1;
2201 break;
2202
2203 case SAMPLING_RATE_48KHZ:
2204 default:
2205 sample_rate_val = 0;
2206 break;
2207 }
2208
2209 ucontrol->value.integer.value[0] = sample_rate_val;
2210 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2211 idx, ext_disp_rx_cfg[idx].sample_rate);
2212
2213 return 0;
2214}
2215
2216static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218{
2219 int idx = ext_disp_get_port_idx(kcontrol);
2220
2221 if (idx < 0)
2222 return idx;
2223
2224 switch (ucontrol->value.integer.value[0]) {
2225 case 6:
2226 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2227 break;
2228 case 5:
2229 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2230 break;
2231 case 4:
2232 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2233 break;
2234 case 3:
2235 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2236 break;
2237 case 2:
2238 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2239 break;
2240 case 1:
2241 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2242 break;
2243 case 0:
2244 default:
2245 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2246 break;
2247 }
2248
2249 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2250 __func__, ucontrol->value.integer.value[0], idx,
2251 ext_disp_rx_cfg[idx].sample_rate);
2252 return 0;
2253}
2254
2255static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2256 struct snd_ctl_elem_value *ucontrol)
2257{
2258 pr_debug("%s: proxy_rx channels = %d\n",
2259 __func__, proxy_rx_cfg.channels);
2260 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2261
2262 return 0;
2263}
2264
2265static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2266 struct snd_ctl_elem_value *ucontrol)
2267{
2268 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2269 pr_debug("%s: proxy_rx channels = %d\n",
2270 __func__, proxy_rx_cfg.channels);
2271
2272 return 1;
2273}
2274
2275static int tdm_get_sample_rate(int value)
2276{
2277 int sample_rate = 0;
2278
2279 switch (value) {
2280 case 0:
2281 sample_rate = SAMPLING_RATE_8KHZ;
2282 break;
2283 case 1:
2284 sample_rate = SAMPLING_RATE_16KHZ;
2285 break;
2286 case 2:
2287 sample_rate = SAMPLING_RATE_32KHZ;
2288 break;
2289 case 3:
2290 sample_rate = SAMPLING_RATE_48KHZ;
2291 break;
2292 case 4:
2293 sample_rate = SAMPLING_RATE_176P4KHZ;
2294 break;
2295 case 5:
2296 sample_rate = SAMPLING_RATE_352P8KHZ;
2297 break;
2298 default:
2299 sample_rate = SAMPLING_RATE_48KHZ;
2300 break;
2301 }
2302 return sample_rate;
2303}
2304
2305static int aux_pcm_get_sample_rate(int value)
2306{
2307 int sample_rate;
2308
2309 switch (value) {
2310 case 1:
2311 sample_rate = SAMPLING_RATE_16KHZ;
2312 break;
2313 case 0:
2314 default:
2315 sample_rate = SAMPLING_RATE_8KHZ;
2316 break;
2317 }
2318 return sample_rate;
2319}
2320
2321static int tdm_get_sample_rate_val(int sample_rate)
2322{
2323 int sample_rate_val = 0;
2324
2325 switch (sample_rate) {
2326 case SAMPLING_RATE_8KHZ:
2327 sample_rate_val = 0;
2328 break;
2329 case SAMPLING_RATE_16KHZ:
2330 sample_rate_val = 1;
2331 break;
2332 case SAMPLING_RATE_32KHZ:
2333 sample_rate_val = 2;
2334 break;
2335 case SAMPLING_RATE_48KHZ:
2336 sample_rate_val = 3;
2337 break;
2338 case SAMPLING_RATE_176P4KHZ:
2339 sample_rate_val = 4;
2340 break;
2341 case SAMPLING_RATE_352P8KHZ:
2342 sample_rate_val = 5;
2343 break;
2344 default:
2345 sample_rate_val = 3;
2346 break;
2347 }
2348 return sample_rate_val;
2349}
2350
2351static int aux_pcm_get_sample_rate_val(int sample_rate)
2352{
2353 int sample_rate_val;
2354
2355 switch (sample_rate) {
2356 case SAMPLING_RATE_16KHZ:
2357 sample_rate_val = 1;
2358 break;
2359 case SAMPLING_RATE_8KHZ:
2360 default:
2361 sample_rate_val = 0;
2362 break;
2363 }
2364 return sample_rate_val;
2365}
2366
2367static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2368 struct tdm_port *port)
2369{
2370 if (port) {
2371 if (strnstr(kcontrol->id.name, "PRI",
2372 sizeof(kcontrol->id.name))) {
2373 port->mode = TDM_PRI;
2374 } else if (strnstr(kcontrol->id.name, "SEC",
2375 sizeof(kcontrol->id.name))) {
2376 port->mode = TDM_SEC;
2377 } else if (strnstr(kcontrol->id.name, "TERT",
2378 sizeof(kcontrol->id.name))) {
2379 port->mode = TDM_TERT;
2380 } else if (strnstr(kcontrol->id.name, "QUAT",
2381 sizeof(kcontrol->id.name))) {
2382 port->mode = TDM_QUAT;
2383 } else if (strnstr(kcontrol->id.name, "QUIN",
2384 sizeof(kcontrol->id.name))) {
2385 port->mode = TDM_QUIN;
2386 } else {
2387 pr_err("%s: unsupported mode in: %s\n",
2388 __func__, kcontrol->id.name);
2389 return -EINVAL;
2390 }
2391
2392 if (strnstr(kcontrol->id.name, "RX_0",
2393 sizeof(kcontrol->id.name)) ||
2394 strnstr(kcontrol->id.name, "TX_0",
2395 sizeof(kcontrol->id.name))) {
2396 port->channel = TDM_0;
2397 } else if (strnstr(kcontrol->id.name, "RX_1",
2398 sizeof(kcontrol->id.name)) ||
2399 strnstr(kcontrol->id.name, "TX_1",
2400 sizeof(kcontrol->id.name))) {
2401 port->channel = TDM_1;
2402 } else if (strnstr(kcontrol->id.name, "RX_2",
2403 sizeof(kcontrol->id.name)) ||
2404 strnstr(kcontrol->id.name, "TX_2",
2405 sizeof(kcontrol->id.name))) {
2406 port->channel = TDM_2;
2407 } else if (strnstr(kcontrol->id.name, "RX_3",
2408 sizeof(kcontrol->id.name)) ||
2409 strnstr(kcontrol->id.name, "TX_3",
2410 sizeof(kcontrol->id.name))) {
2411 port->channel = TDM_3;
2412 } else if (strnstr(kcontrol->id.name, "RX_4",
2413 sizeof(kcontrol->id.name)) ||
2414 strnstr(kcontrol->id.name, "TX_4",
2415 sizeof(kcontrol->id.name))) {
2416 port->channel = TDM_4;
2417 } else if (strnstr(kcontrol->id.name, "RX_5",
2418 sizeof(kcontrol->id.name)) ||
2419 strnstr(kcontrol->id.name, "TX_5",
2420 sizeof(kcontrol->id.name))) {
2421 port->channel = TDM_5;
2422 } else if (strnstr(kcontrol->id.name, "RX_6",
2423 sizeof(kcontrol->id.name)) ||
2424 strnstr(kcontrol->id.name, "TX_6",
2425 sizeof(kcontrol->id.name))) {
2426 port->channel = TDM_6;
2427 } else if (strnstr(kcontrol->id.name, "RX_7",
2428 sizeof(kcontrol->id.name)) ||
2429 strnstr(kcontrol->id.name, "TX_7",
2430 sizeof(kcontrol->id.name))) {
2431 port->channel = TDM_7;
2432 } else {
2433 pr_err("%s: unsupported channel in: %s\n",
2434 __func__, kcontrol->id.name);
2435 return -EINVAL;
2436 }
2437 } else {
2438 return -EINVAL;
2439 }
2440 return 0;
2441}
2442
2443static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2444 struct snd_ctl_elem_value *ucontrol)
2445{
2446 struct tdm_port port;
2447 int ret = tdm_get_port_idx(kcontrol, &port);
2448
2449 if (ret) {
2450 pr_err("%s: unsupported control: %s\n",
2451 __func__, kcontrol->id.name);
2452 } else {
2453 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2454 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2455
2456 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2457 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2458 ucontrol->value.enumerated.item[0]);
2459 }
2460 return ret;
2461}
2462
2463static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2464 struct snd_ctl_elem_value *ucontrol)
2465{
2466 struct tdm_port port;
2467 int ret = tdm_get_port_idx(kcontrol, &port);
2468
2469 if (ret) {
2470 pr_err("%s: unsupported control: %s\n",
2471 __func__, kcontrol->id.name);
2472 } else {
2473 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2474 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2475
2476 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2477 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2478 ucontrol->value.enumerated.item[0]);
2479 }
2480 return ret;
2481}
2482
2483static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2484 struct snd_ctl_elem_value *ucontrol)
2485{
2486 struct tdm_port port;
2487 int ret = tdm_get_port_idx(kcontrol, &port);
2488
2489 if (ret) {
2490 pr_err("%s: unsupported control: %s\n",
2491 __func__, kcontrol->id.name);
2492 } else {
2493 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2494 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2495
2496 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2497 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2498 ucontrol->value.enumerated.item[0]);
2499 }
2500 return ret;
2501}
2502
2503static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2504 struct snd_ctl_elem_value *ucontrol)
2505{
2506 struct tdm_port port;
2507 int ret = tdm_get_port_idx(kcontrol, &port);
2508
2509 if (ret) {
2510 pr_err("%s: unsupported control: %s\n",
2511 __func__, kcontrol->id.name);
2512 } else {
2513 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2514 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2515
2516 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2517 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2518 ucontrol->value.enumerated.item[0]);
2519 }
2520 return ret;
2521}
2522
2523static int tdm_get_format(int value)
2524{
2525 int format = 0;
2526
2527 switch (value) {
2528 case 0:
2529 format = SNDRV_PCM_FORMAT_S16_LE;
2530 break;
2531 case 1:
2532 format = SNDRV_PCM_FORMAT_S24_LE;
2533 break;
2534 case 2:
2535 format = SNDRV_PCM_FORMAT_S32_LE;
2536 break;
2537 default:
2538 format = SNDRV_PCM_FORMAT_S16_LE;
2539 break;
2540 }
2541 return format;
2542}
2543
2544static int tdm_get_format_val(int format)
2545{
2546 int value = 0;
2547
2548 switch (format) {
2549 case SNDRV_PCM_FORMAT_S16_LE:
2550 value = 0;
2551 break;
2552 case SNDRV_PCM_FORMAT_S24_LE:
2553 value = 1;
2554 break;
2555 case SNDRV_PCM_FORMAT_S32_LE:
2556 value = 2;
2557 break;
2558 default:
2559 value = 0;
2560 break;
2561 }
2562 return value;
2563}
2564
2565static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2566 struct snd_ctl_elem_value *ucontrol)
2567{
2568 struct tdm_port port;
2569 int ret = tdm_get_port_idx(kcontrol, &port);
2570
2571 if (ret) {
2572 pr_err("%s: unsupported control: %s\n",
2573 __func__, kcontrol->id.name);
2574 } else {
2575 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2576 tdm_rx_cfg[port.mode][port.channel].bit_format);
2577
2578 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2579 tdm_rx_cfg[port.mode][port.channel].bit_format,
2580 ucontrol->value.enumerated.item[0]);
2581 }
2582 return ret;
2583}
2584
2585static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2586 struct snd_ctl_elem_value *ucontrol)
2587{
2588 struct tdm_port port;
2589 int ret = tdm_get_port_idx(kcontrol, &port);
2590
2591 if (ret) {
2592 pr_err("%s: unsupported control: %s\n",
2593 __func__, kcontrol->id.name);
2594 } else {
2595 tdm_rx_cfg[port.mode][port.channel].bit_format =
2596 tdm_get_format(ucontrol->value.enumerated.item[0]);
2597
2598 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2599 tdm_rx_cfg[port.mode][port.channel].bit_format,
2600 ucontrol->value.enumerated.item[0]);
2601 }
2602 return ret;
2603}
2604
2605static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2606 struct snd_ctl_elem_value *ucontrol)
2607{
2608 struct tdm_port port;
2609 int ret = tdm_get_port_idx(kcontrol, &port);
2610
2611 if (ret) {
2612 pr_err("%s: unsupported control: %s\n",
2613 __func__, kcontrol->id.name);
2614 } else {
2615 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2616 tdm_tx_cfg[port.mode][port.channel].bit_format);
2617
2618 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2619 tdm_tx_cfg[port.mode][port.channel].bit_format,
2620 ucontrol->value.enumerated.item[0]);
2621 }
2622 return ret;
2623}
2624
2625static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2626 struct snd_ctl_elem_value *ucontrol)
2627{
2628 struct tdm_port port;
2629 int ret = tdm_get_port_idx(kcontrol, &port);
2630
2631 if (ret) {
2632 pr_err("%s: unsupported control: %s\n",
2633 __func__, kcontrol->id.name);
2634 } else {
2635 tdm_tx_cfg[port.mode][port.channel].bit_format =
2636 tdm_get_format(ucontrol->value.enumerated.item[0]);
2637
2638 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2639 tdm_tx_cfg[port.mode][port.channel].bit_format,
2640 ucontrol->value.enumerated.item[0]);
2641 }
2642 return ret;
2643}
2644
2645static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2646 struct snd_ctl_elem_value *ucontrol)
2647{
2648 struct tdm_port port;
2649 int ret = tdm_get_port_idx(kcontrol, &port);
2650
2651 if (ret) {
2652 pr_err("%s: unsupported control: %s\n",
2653 __func__, kcontrol->id.name);
2654 } else {
2655
2656 ucontrol->value.enumerated.item[0] =
2657 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2658
2659 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2660 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2661 ucontrol->value.enumerated.item[0]);
2662 }
2663 return ret;
2664}
2665
2666static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2667 struct snd_ctl_elem_value *ucontrol)
2668{
2669 struct tdm_port port;
2670 int ret = tdm_get_port_idx(kcontrol, &port);
2671
2672 if (ret) {
2673 pr_err("%s: unsupported control: %s\n",
2674 __func__, kcontrol->id.name);
2675 } else {
2676 tdm_rx_cfg[port.mode][port.channel].channels =
2677 ucontrol->value.enumerated.item[0] + 1;
2678
2679 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2680 tdm_rx_cfg[port.mode][port.channel].channels,
2681 ucontrol->value.enumerated.item[0] + 1);
2682 }
2683 return ret;
2684}
2685
2686static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2687 struct snd_ctl_elem_value *ucontrol)
2688{
2689 struct tdm_port port;
2690 int ret = tdm_get_port_idx(kcontrol, &port);
2691
2692 if (ret) {
2693 pr_err("%s: unsupported control: %s\n",
2694 __func__, kcontrol->id.name);
2695 } else {
2696 ucontrol->value.enumerated.item[0] =
2697 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2698
2699 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2700 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2701 ucontrol->value.enumerated.item[0]);
2702 }
2703 return ret;
2704}
2705
2706static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2707 struct snd_ctl_elem_value *ucontrol)
2708{
2709 struct tdm_port port;
2710 int ret = tdm_get_port_idx(kcontrol, &port);
2711
2712 if (ret) {
2713 pr_err("%s: unsupported control: %s\n",
2714 __func__, kcontrol->id.name);
2715 } else {
2716 tdm_tx_cfg[port.mode][port.channel].channels =
2717 ucontrol->value.enumerated.item[0] + 1;
2718
2719 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2720 tdm_tx_cfg[port.mode][port.channel].channels,
2721 ucontrol->value.enumerated.item[0] + 1);
2722 }
2723 return ret;
2724}
2725
2726static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2727{
2728 int idx;
2729
2730 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2731 sizeof("PRIM_AUX_PCM"))) {
2732 idx = PRIM_AUX_PCM;
2733 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2734 sizeof("SEC_AUX_PCM"))) {
2735 idx = SEC_AUX_PCM;
2736 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2737 sizeof("TERT_AUX_PCM"))) {
2738 idx = TERT_AUX_PCM;
2739 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2740 sizeof("QUAT_AUX_PCM"))) {
2741 idx = QUAT_AUX_PCM;
2742 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2743 sizeof("QUIN_AUX_PCM"))) {
2744 idx = QUIN_AUX_PCM;
2745 } else {
2746 pr_err("%s: unsupported port: %s\n",
2747 __func__, kcontrol->id.name);
2748 idx = -EINVAL;
2749 }
2750
2751 return idx;
2752}
2753
2754static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2755 struct snd_ctl_elem_value *ucontrol)
2756{
2757 int idx = aux_pcm_get_port_idx(kcontrol);
2758
2759 if (idx < 0)
2760 return idx;
2761
2762 aux_pcm_rx_cfg[idx].sample_rate =
2763 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2764
2765 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2766 idx, aux_pcm_rx_cfg[idx].sample_rate,
2767 ucontrol->value.enumerated.item[0]);
2768
2769 return 0;
2770}
2771
2772static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2773 struct snd_ctl_elem_value *ucontrol)
2774{
2775 int idx = aux_pcm_get_port_idx(kcontrol);
2776
2777 if (idx < 0)
2778 return idx;
2779
2780 ucontrol->value.enumerated.item[0] =
2781 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2782
2783 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2784 idx, aux_pcm_rx_cfg[idx].sample_rate,
2785 ucontrol->value.enumerated.item[0]);
2786
2787 return 0;
2788}
2789
2790static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2791 struct snd_ctl_elem_value *ucontrol)
2792{
2793 int idx = aux_pcm_get_port_idx(kcontrol);
2794
2795 if (idx < 0)
2796 return idx;
2797
2798 aux_pcm_tx_cfg[idx].sample_rate =
2799 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2800
2801 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2802 idx, aux_pcm_tx_cfg[idx].sample_rate,
2803 ucontrol->value.enumerated.item[0]);
2804
2805 return 0;
2806}
2807
2808static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2809 struct snd_ctl_elem_value *ucontrol)
2810{
2811 int idx = aux_pcm_get_port_idx(kcontrol);
2812
2813 if (idx < 0)
2814 return idx;
2815
2816 ucontrol->value.enumerated.item[0] =
2817 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2818
2819 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2820 idx, aux_pcm_tx_cfg[idx].sample_rate,
2821 ucontrol->value.enumerated.item[0]);
2822
2823 return 0;
2824}
2825
2826static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2827{
2828 int idx;
2829
2830 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2831 sizeof("PRIM_MI2S_RX"))) {
2832 idx = PRIM_MI2S;
2833 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2834 sizeof("SEC_MI2S_RX"))) {
2835 idx = SEC_MI2S;
2836 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2837 sizeof("TERT_MI2S_RX"))) {
2838 idx = TERT_MI2S;
2839 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2840 sizeof("QUAT_MI2S_RX"))) {
2841 idx = QUAT_MI2S;
2842 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2843 sizeof("QUIN_MI2S_RX"))) {
2844 idx = QUIN_MI2S;
2845 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2846 sizeof("PRIM_MI2S_TX"))) {
2847 idx = PRIM_MI2S;
2848 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2849 sizeof("SEC_MI2S_TX"))) {
2850 idx = SEC_MI2S;
2851 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2852 sizeof("TERT_MI2S_TX"))) {
2853 idx = TERT_MI2S;
2854 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2855 sizeof("QUAT_MI2S_TX"))) {
2856 idx = QUAT_MI2S;
2857 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2858 sizeof("QUIN_MI2S_TX"))) {
2859 idx = QUIN_MI2S;
2860 } else {
2861 pr_err("%s: unsupported channel: %s\n",
2862 __func__, kcontrol->id.name);
2863 idx = -EINVAL;
2864 }
2865
2866 return idx;
2867}
2868
2869static int mi2s_get_sample_rate_val(int sample_rate)
2870{
2871 int sample_rate_val;
2872
2873 switch (sample_rate) {
2874 case SAMPLING_RATE_8KHZ:
2875 sample_rate_val = 0;
2876 break;
2877 case SAMPLING_RATE_11P025KHZ:
2878 sample_rate_val = 1;
2879 break;
2880 case SAMPLING_RATE_16KHZ:
2881 sample_rate_val = 2;
2882 break;
2883 case SAMPLING_RATE_22P05KHZ:
2884 sample_rate_val = 3;
2885 break;
2886 case SAMPLING_RATE_32KHZ:
2887 sample_rate_val = 4;
2888 break;
2889 case SAMPLING_RATE_44P1KHZ:
2890 sample_rate_val = 5;
2891 break;
2892 case SAMPLING_RATE_48KHZ:
2893 sample_rate_val = 6;
2894 break;
2895 case SAMPLING_RATE_96KHZ:
2896 sample_rate_val = 7;
2897 break;
2898 case SAMPLING_RATE_192KHZ:
2899 sample_rate_val = 8;
2900 break;
2901 default:
2902 sample_rate_val = 6;
2903 break;
2904 }
2905 return sample_rate_val;
2906}
2907
2908static int mi2s_get_sample_rate(int value)
2909{
2910 int sample_rate;
2911
2912 switch (value) {
2913 case 0:
2914 sample_rate = SAMPLING_RATE_8KHZ;
2915 break;
2916 case 1:
2917 sample_rate = SAMPLING_RATE_11P025KHZ;
2918 break;
2919 case 2:
2920 sample_rate = SAMPLING_RATE_16KHZ;
2921 break;
2922 case 3:
2923 sample_rate = SAMPLING_RATE_22P05KHZ;
2924 break;
2925 case 4:
2926 sample_rate = SAMPLING_RATE_32KHZ;
2927 break;
2928 case 5:
2929 sample_rate = SAMPLING_RATE_44P1KHZ;
2930 break;
2931 case 6:
2932 sample_rate = SAMPLING_RATE_48KHZ;
2933 break;
2934 case 7:
2935 sample_rate = SAMPLING_RATE_96KHZ;
2936 break;
2937 case 8:
2938 sample_rate = SAMPLING_RATE_192KHZ;
2939 break;
2940 default:
2941 sample_rate = SAMPLING_RATE_48KHZ;
2942 break;
2943 }
2944 return sample_rate;
2945}
2946
2947static int mi2s_auxpcm_get_format(int value)
2948{
2949 int format;
2950
2951 switch (value) {
2952 case 0:
2953 format = SNDRV_PCM_FORMAT_S16_LE;
2954 break;
2955 case 1:
2956 format = SNDRV_PCM_FORMAT_S24_LE;
2957 break;
2958 case 2:
2959 format = SNDRV_PCM_FORMAT_S24_3LE;
2960 break;
2961 case 3:
2962 format = SNDRV_PCM_FORMAT_S32_LE;
2963 break;
2964 default:
2965 format = SNDRV_PCM_FORMAT_S16_LE;
2966 break;
2967 }
2968 return format;
2969}
2970
2971static int mi2s_auxpcm_get_format_value(int format)
2972{
2973 int value;
2974
2975 switch (format) {
2976 case SNDRV_PCM_FORMAT_S16_LE:
2977 value = 0;
2978 break;
2979 case SNDRV_PCM_FORMAT_S24_LE:
2980 value = 1;
2981 break;
2982 case SNDRV_PCM_FORMAT_S24_3LE:
2983 value = 2;
2984 break;
2985 case SNDRV_PCM_FORMAT_S32_LE:
2986 value = 3;
2987 break;
2988 default:
2989 value = 0;
2990 break;
2991 }
2992 return value;
2993}
2994
2995static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2996 struct snd_ctl_elem_value *ucontrol)
2997{
2998 int idx = mi2s_get_port_idx(kcontrol);
2999
3000 if (idx < 0)
3001 return idx;
3002
3003 mi2s_rx_cfg[idx].sample_rate =
3004 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3005
3006 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3007 idx, mi2s_rx_cfg[idx].sample_rate,
3008 ucontrol->value.enumerated.item[0]);
3009
3010 return 0;
3011}
3012
3013static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
3014 struct snd_ctl_elem_value *ucontrol)
3015{
3016 int idx = mi2s_get_port_idx(kcontrol);
3017
3018 if (idx < 0)
3019 return idx;
3020
3021 ucontrol->value.enumerated.item[0] =
3022 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
3023
3024 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
3025 idx, mi2s_rx_cfg[idx].sample_rate,
3026 ucontrol->value.enumerated.item[0]);
3027
3028 return 0;
3029}
3030
3031static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
3032 struct snd_ctl_elem_value *ucontrol)
3033{
3034 int idx = mi2s_get_port_idx(kcontrol);
3035
3036 if (idx < 0)
3037 return idx;
3038
3039 mi2s_tx_cfg[idx].sample_rate =
3040 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
3041
3042 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3043 idx, mi2s_tx_cfg[idx].sample_rate,
3044 ucontrol->value.enumerated.item[0]);
3045
3046 return 0;
3047}
3048
3049static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3050 struct snd_ctl_elem_value *ucontrol)
3051{
3052 int idx = mi2s_get_port_idx(kcontrol);
3053
3054 if (idx < 0)
3055 return idx;
3056
3057 ucontrol->value.enumerated.item[0] =
3058 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3059
3060 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3061 idx, mi2s_tx_cfg[idx].sample_rate,
3062 ucontrol->value.enumerated.item[0]);
3063
3064 return 0;
3065}
3066
3067static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3068 struct snd_ctl_elem_value *ucontrol)
3069{
3070 int idx = mi2s_get_port_idx(kcontrol);
3071
3072 if (idx < 0)
3073 return idx;
3074
3075 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3076 idx, mi2s_rx_cfg[idx].channels);
3077 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3078
3079 return 0;
3080}
3081
3082static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3083 struct snd_ctl_elem_value *ucontrol)
3084{
3085 int idx = mi2s_get_port_idx(kcontrol);
3086
3087 if (idx < 0)
3088 return idx;
3089
3090 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3091 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3092 idx, mi2s_rx_cfg[idx].channels);
3093
3094 return 1;
3095}
3096
3097static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3098 struct snd_ctl_elem_value *ucontrol)
3099{
3100 int idx = mi2s_get_port_idx(kcontrol);
3101
3102 if (idx < 0)
3103 return idx;
3104
3105 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3106 idx, mi2s_tx_cfg[idx].channels);
3107 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3108
3109 return 0;
3110}
3111
3112static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3113 struct snd_ctl_elem_value *ucontrol)
3114{
3115 int idx = mi2s_get_port_idx(kcontrol);
3116
3117 if (idx < 0)
3118 return idx;
3119
3120 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3121 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3122 idx, mi2s_tx_cfg[idx].channels);
3123
3124 return 1;
3125}
3126
3127static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3128 struct snd_ctl_elem_value *ucontrol)
3129{
3130 int idx = mi2s_get_port_idx(kcontrol);
3131
3132 if (idx < 0)
3133 return idx;
3134
3135 ucontrol->value.enumerated.item[0] =
3136 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3137
3138 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3139 idx, mi2s_rx_cfg[idx].bit_format,
3140 ucontrol->value.enumerated.item[0]);
3141
3142 return 0;
3143}
3144
3145static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3146 struct snd_ctl_elem_value *ucontrol)
3147{
3148 int idx = mi2s_get_port_idx(kcontrol);
3149
3150 if (idx < 0)
3151 return idx;
3152
3153 mi2s_rx_cfg[idx].bit_format =
3154 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3155
3156 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3157 idx, mi2s_rx_cfg[idx].bit_format,
3158 ucontrol->value.enumerated.item[0]);
3159
3160 return 0;
3161}
3162
3163static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3164 struct snd_ctl_elem_value *ucontrol)
3165{
3166 int idx = mi2s_get_port_idx(kcontrol);
3167
3168 if (idx < 0)
3169 return idx;
3170
3171 ucontrol->value.enumerated.item[0] =
3172 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3173
3174 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3175 idx, mi2s_tx_cfg[idx].bit_format,
3176 ucontrol->value.enumerated.item[0]);
3177
3178 return 0;
3179}
3180
3181static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3182 struct snd_ctl_elem_value *ucontrol)
3183{
3184 int idx = mi2s_get_port_idx(kcontrol);
3185
3186 if (idx < 0)
3187 return idx;
3188
3189 mi2s_tx_cfg[idx].bit_format =
3190 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3191
3192 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3193 idx, mi2s_tx_cfg[idx].bit_format,
3194 ucontrol->value.enumerated.item[0]);
3195
3196 return 0;
3197}
3198
3199static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3200 struct snd_ctl_elem_value *ucontrol)
3201{
3202 int idx = aux_pcm_get_port_idx(kcontrol);
3203
3204 if (idx < 0)
3205 return idx;
3206
3207 ucontrol->value.enumerated.item[0] =
3208 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3209
3210 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3211 idx, aux_pcm_rx_cfg[idx].bit_format,
3212 ucontrol->value.enumerated.item[0]);
3213
3214 return 0;
3215}
3216
3217static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3218 struct snd_ctl_elem_value *ucontrol)
3219{
3220 int idx = aux_pcm_get_port_idx(kcontrol);
3221
3222 if (idx < 0)
3223 return idx;
3224
3225 aux_pcm_rx_cfg[idx].bit_format =
3226 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3227
3228 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3229 idx, aux_pcm_rx_cfg[idx].bit_format,
3230 ucontrol->value.enumerated.item[0]);
3231
3232 return 0;
3233}
3234
3235static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3236 struct snd_ctl_elem_value *ucontrol)
3237{
3238 int idx = aux_pcm_get_port_idx(kcontrol);
3239
3240 if (idx < 0)
3241 return idx;
3242
3243 ucontrol->value.enumerated.item[0] =
3244 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3245
3246 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3247 idx, aux_pcm_tx_cfg[idx].bit_format,
3248 ucontrol->value.enumerated.item[0]);
3249
3250 return 0;
3251}
3252
3253static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3254 struct snd_ctl_elem_value *ucontrol)
3255{
3256 int idx = aux_pcm_get_port_idx(kcontrol);
3257
3258 if (idx < 0)
3259 return idx;
3260
3261 aux_pcm_tx_cfg[idx].bit_format =
3262 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3263
3264 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3265 idx, aux_pcm_tx_cfg[idx].bit_format,
3266 ucontrol->value.enumerated.item[0]);
3267
3268 return 0;
3269}
3270
3271static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3272{
3273 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3274 struct snd_soc_card *card = codec->component.card;
3275 struct msm_asoc_mach_data *pdata =
3276 snd_soc_card_get_drvdata(card);
3277
3278 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3279 msm_hifi_control);
3280
3281 if (!pdata || !pdata->hph_en1_gpio_p) {
3282 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3283 return -EINVAL;
3284 }
3285 if (msm_hifi_control == MSM_HIFI_ON) {
3286 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3287 /* 5msec delay needed as per HW requirement */
3288 usleep_range(5000, 5010);
3289 } else {
3290 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3291 }
3292 snd_soc_dapm_sync(dapm);
3293
3294 return 0;
3295}
3296
3297static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3298 struct snd_ctl_elem_value *ucontrol)
3299{
3300 pr_debug("%s: msm_hifi_control = %d\n",
3301 __func__, msm_hifi_control);
3302 ucontrol->value.integer.value[0] = msm_hifi_control;
3303
3304 return 0;
3305}
3306
3307static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3308 struct snd_ctl_elem_value *ucontrol)
3309{
3310 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3311
3312 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3313 __func__, ucontrol->value.integer.value[0]);
3314
3315 msm_hifi_control = ucontrol->value.integer.value[0];
3316 msm_hifi_ctrl(codec);
3317
3318 return 0;
3319}
3320
3321static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3322 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3323 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3324 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3325 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3326 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3327 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3328 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3329 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3330 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3331 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3332 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3333 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3334 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3335 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3336 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3337 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3338 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3339 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3340 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3341 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3342 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3343 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3344 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3345 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3346 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3347 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3348 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3349 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3350 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3351 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3352 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3353 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3354 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3355 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3356 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3357 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3358 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3359 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3360 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3361 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3362 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3363 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3364 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3365 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3366 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3367 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3368 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3369 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3370 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3371 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3372 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3373 wsa_cdc_dma_rx_0_sample_rate,
3374 cdc_dma_rx_sample_rate_get,
3375 cdc_dma_rx_sample_rate_put),
3376 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3377 wsa_cdc_dma_rx_1_sample_rate,
3378 cdc_dma_rx_sample_rate_get,
3379 cdc_dma_rx_sample_rate_put),
3380 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3381 rx_cdc_dma_rx_0_sample_rate,
3382 cdc_dma_rx_sample_rate_get,
3383 cdc_dma_rx_sample_rate_put),
3384 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3385 rx_cdc_dma_rx_1_sample_rate,
3386 cdc_dma_rx_sample_rate_get,
3387 cdc_dma_rx_sample_rate_put),
3388 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3389 rx_cdc_dma_rx_2_sample_rate,
3390 cdc_dma_rx_sample_rate_get,
3391 cdc_dma_rx_sample_rate_put),
3392 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3393 rx_cdc_dma_rx_3_sample_rate,
3394 cdc_dma_rx_sample_rate_get,
3395 cdc_dma_rx_sample_rate_put),
3396 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3397 rx_cdc_dma_rx_5_sample_rate,
3398 cdc_dma_rx_sample_rate_get,
3399 cdc_dma_rx_sample_rate_put),
3400 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3401 wsa_cdc_dma_tx_0_sample_rate,
3402 cdc_dma_tx_sample_rate_get,
3403 cdc_dma_tx_sample_rate_put),
3404 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3405 wsa_cdc_dma_tx_1_sample_rate,
3406 cdc_dma_tx_sample_rate_get,
3407 cdc_dma_tx_sample_rate_put),
3408 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3409 wsa_cdc_dma_tx_2_sample_rate,
3410 cdc_dma_tx_sample_rate_get,
3411 cdc_dma_tx_sample_rate_put),
3412 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3413 tx_cdc_dma_tx_0_sample_rate,
3414 cdc_dma_tx_sample_rate_get,
3415 cdc_dma_tx_sample_rate_put),
3416 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3417 tx_cdc_dma_tx_3_sample_rate,
3418 cdc_dma_tx_sample_rate_get,
3419 cdc_dma_tx_sample_rate_put),
3420 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3421 tx_cdc_dma_tx_4_sample_rate,
3422 cdc_dma_tx_sample_rate_get,
3423 cdc_dma_tx_sample_rate_put),
3424};
3425
3426static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3427 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3428 slim_rx_ch_get, slim_rx_ch_put),
3429 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3430 slim_rx_ch_get, slim_rx_ch_put),
3431 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3432 slim_tx_ch_get, slim_tx_ch_put),
3433 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3434 slim_tx_ch_get, slim_tx_ch_put),
3435 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3436 slim_rx_ch_get, slim_rx_ch_put),
3437 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3438 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303439 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3440 slim_rx_bit_format_get, slim_rx_bit_format_put),
3441 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3442 slim_rx_bit_format_get, slim_rx_bit_format_put),
3443 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3444 slim_rx_bit_format_get, slim_rx_bit_format_put),
3445 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3446 slim_tx_bit_format_get, slim_tx_bit_format_put),
3447 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3448 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3449 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3450 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3451 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3452 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3453 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3454 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3455 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3456 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3457};
3458
3459static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3460 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3461 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3462 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3463 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3464 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3465 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3466 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3467 proxy_rx_ch_get, proxy_rx_ch_put),
3468 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3469 usb_audio_rx_format_get, usb_audio_rx_format_put),
3470 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3471 usb_audio_tx_format_get, usb_audio_tx_format_put),
3472 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3473 ext_disp_rx_format_get, ext_disp_rx_format_put),
3474 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3475 usb_audio_rx_sample_rate_get,
3476 usb_audio_rx_sample_rate_put),
3477 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3478 usb_audio_tx_sample_rate_get,
3479 usb_audio_tx_sample_rate_put),
3480 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3481 ext_disp_rx_sample_rate_get,
3482 ext_disp_rx_sample_rate_put),
3483 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3484 tdm_rx_sample_rate_get,
3485 tdm_rx_sample_rate_put),
3486 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3487 tdm_tx_sample_rate_get,
3488 tdm_tx_sample_rate_put),
3489 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3490 tdm_rx_format_get,
3491 tdm_rx_format_put),
3492 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3493 tdm_tx_format_get,
3494 tdm_tx_format_put),
3495 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3496 tdm_rx_ch_get,
3497 tdm_rx_ch_put),
3498 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3499 tdm_tx_ch_get,
3500 tdm_tx_ch_put),
3501 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3502 tdm_rx_sample_rate_get,
3503 tdm_rx_sample_rate_put),
3504 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3505 tdm_tx_sample_rate_get,
3506 tdm_tx_sample_rate_put),
3507 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3508 tdm_rx_format_get,
3509 tdm_rx_format_put),
3510 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3511 tdm_tx_format_get,
3512 tdm_tx_format_put),
3513 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3514 tdm_rx_ch_get,
3515 tdm_rx_ch_put),
3516 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3517 tdm_tx_ch_get,
3518 tdm_tx_ch_put),
3519 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3520 tdm_rx_sample_rate_get,
3521 tdm_rx_sample_rate_put),
3522 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3523 tdm_tx_sample_rate_get,
3524 tdm_tx_sample_rate_put),
3525 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3526 tdm_rx_format_get,
3527 tdm_rx_format_put),
3528 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3529 tdm_tx_format_get,
3530 tdm_tx_format_put),
3531 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3532 tdm_rx_ch_get,
3533 tdm_rx_ch_put),
3534 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3535 tdm_tx_ch_get,
3536 tdm_tx_ch_put),
3537 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3538 tdm_rx_sample_rate_get,
3539 tdm_rx_sample_rate_put),
3540 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3541 tdm_tx_sample_rate_get,
3542 tdm_tx_sample_rate_put),
3543 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3544 tdm_rx_format_get,
3545 tdm_rx_format_put),
3546 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3547 tdm_tx_format_get,
3548 tdm_tx_format_put),
3549 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3550 tdm_rx_ch_get,
3551 tdm_rx_ch_put),
3552 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3553 tdm_tx_ch_get,
3554 tdm_tx_ch_put),
3555 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3556 tdm_rx_sample_rate_get,
3557 tdm_rx_sample_rate_put),
3558 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3559 tdm_tx_sample_rate_get,
3560 tdm_tx_sample_rate_put),
3561 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3562 tdm_rx_format_get,
3563 tdm_rx_format_put),
3564 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3565 tdm_tx_format_get,
3566 tdm_tx_format_put),
3567 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3568 tdm_rx_ch_get,
3569 tdm_rx_ch_put),
3570 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3571 tdm_tx_ch_get,
3572 tdm_tx_ch_put),
3573 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3574 aux_pcm_rx_sample_rate_get,
3575 aux_pcm_rx_sample_rate_put),
3576 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3577 aux_pcm_rx_sample_rate_get,
3578 aux_pcm_rx_sample_rate_put),
3579 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3580 aux_pcm_rx_sample_rate_get,
3581 aux_pcm_rx_sample_rate_put),
3582 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3583 aux_pcm_rx_sample_rate_get,
3584 aux_pcm_rx_sample_rate_put),
3585 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3586 aux_pcm_rx_sample_rate_get,
3587 aux_pcm_rx_sample_rate_put),
3588 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3589 aux_pcm_tx_sample_rate_get,
3590 aux_pcm_tx_sample_rate_put),
3591 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3592 aux_pcm_tx_sample_rate_get,
3593 aux_pcm_tx_sample_rate_put),
3594 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3595 aux_pcm_tx_sample_rate_get,
3596 aux_pcm_tx_sample_rate_put),
3597 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3598 aux_pcm_tx_sample_rate_get,
3599 aux_pcm_tx_sample_rate_put),
3600 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3601 aux_pcm_tx_sample_rate_get,
3602 aux_pcm_tx_sample_rate_put),
3603 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3604 mi2s_rx_sample_rate_get,
3605 mi2s_rx_sample_rate_put),
3606 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3607 mi2s_rx_sample_rate_get,
3608 mi2s_rx_sample_rate_put),
3609 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3610 mi2s_rx_sample_rate_get,
3611 mi2s_rx_sample_rate_put),
3612 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3613 mi2s_rx_sample_rate_get,
3614 mi2s_rx_sample_rate_put),
3615 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3616 mi2s_rx_sample_rate_get,
3617 mi2s_rx_sample_rate_put),
3618 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3619 mi2s_tx_sample_rate_get,
3620 mi2s_tx_sample_rate_put),
3621 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3622 mi2s_tx_sample_rate_get,
3623 mi2s_tx_sample_rate_put),
3624 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3625 mi2s_tx_sample_rate_get,
3626 mi2s_tx_sample_rate_put),
3627 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3628 mi2s_tx_sample_rate_get,
3629 mi2s_tx_sample_rate_put),
3630 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3631 mi2s_tx_sample_rate_get,
3632 mi2s_tx_sample_rate_put),
3633 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3634 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3635 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3636 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3637 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3638 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3639 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3640 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3641 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3642 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3643 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3644 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3645 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3646 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3647 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3648 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3649 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3650 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3651 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3652 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3653 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3654 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3655 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3656 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3657 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3658 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3659 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3660 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3661 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3662 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3663 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3664 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3665 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3666 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3667 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3668 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3669 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3670 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3671 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3672 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3673 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3674 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3675 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3676 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3677 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3678 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3679 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3680 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3681 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3682 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3683 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3684 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3685 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3686 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3687 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3688 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3689 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3690 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3691 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3692 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3693 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3694 msm_hifi_put),
3695 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3696 msm_bt_sample_rate_get,
3697 msm_bt_sample_rate_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +05303698 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3699 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303700};
3701
3702static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3703 int enable, bool dapm)
3704{
3705 int ret = 0;
3706
3707 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3708 ret = tavil_cdc_mclk_enable(codec, enable);
3709 } else {
3710 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3711 __func__);
3712 ret = -EINVAL;
3713 }
3714 return ret;
3715}
3716
3717static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3718 int enable, bool dapm)
3719{
3720 int ret = 0;
3721
3722 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3723 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3724 } else {
3725 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3726 __func__);
3727 ret = -EINVAL;
3728 }
3729
3730 return ret;
3731}
3732
3733static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3734 struct snd_kcontrol *kcontrol, int event)
3735{
3736 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3737
3738 pr_debug("%s: event = %d\n", __func__, event);
3739
3740 switch (event) {
3741 case SND_SOC_DAPM_PRE_PMU:
3742 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3743 case SND_SOC_DAPM_POST_PMD:
3744 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3745 }
3746 return 0;
3747}
3748
3749static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3750 struct snd_kcontrol *kcontrol, int event)
3751{
3752 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3753
3754 pr_debug("%s: event = %d\n", __func__, event);
3755
3756 switch (event) {
3757 case SND_SOC_DAPM_PRE_PMU:
3758 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3759 case SND_SOC_DAPM_POST_PMD:
3760 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3761 }
3762 return 0;
3763}
3764
3765static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3766 struct snd_kcontrol *k, int event)
3767{
3768 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3769 struct snd_soc_card *card = codec->component.card;
3770 struct msm_asoc_mach_data *pdata =
3771 snd_soc_card_get_drvdata(card);
3772
3773 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3774 __func__, msm_hifi_control);
3775
3776 if (!pdata || !pdata->hph_en0_gpio_p) {
3777 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3778 return -EINVAL;
3779 }
3780
3781 if (msm_hifi_control != MSM_HIFI_ON) {
3782 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3783 __func__);
3784 return 0;
3785 }
3786
3787 switch (event) {
3788 case SND_SOC_DAPM_POST_PMU:
3789 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3790 break;
3791 case SND_SOC_DAPM_PRE_PMD:
3792 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3793 break;
3794 }
3795
3796 return 0;
3797}
3798
3799static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3800
3801 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3802 msm_mclk_event,
3803 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3804
3805 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3806 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3807
3808 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3809 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3810 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3811 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3812 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3813 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3814 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3815 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3816
3817 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3818 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3819 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3820 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3821 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3822 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3823};
3824
3825static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3826 struct snd_kcontrol *kcontrol, int event)
3827{
3828 struct msm_asoc_mach_data *pdata = NULL;
3829 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3830 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05303831 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303832 int *dmic_gpio_cnt;
3833 struct device_node *dmic_gpio;
3834 char *wname;
3835
3836 wname = strpbrk(w->name, "0123");
3837 if (!wname) {
3838 dev_err(codec->dev, "%s: widget not found\n", __func__);
3839 return -EINVAL;
3840 }
3841
3842 ret = kstrtouint(wname, 10, &dmic_idx);
3843 if (ret < 0) {
3844 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3845 __func__);
3846 return -EINVAL;
3847 }
3848
3849 pdata = snd_soc_card_get_drvdata(codec->component.card);
3850
3851 switch (dmic_idx) {
3852 case 0:
3853 case 1:
3854 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3855 dmic_gpio = pdata->dmic01_gpio_p;
3856 break;
3857 case 2:
3858 case 3:
3859 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3860 dmic_gpio = pdata->dmic23_gpio_p;
3861 break;
3862 default:
3863 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3864 __func__);
3865 return -EINVAL;
3866 }
3867
3868 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3869 __func__, event, dmic_idx, *dmic_gpio_cnt);
3870
3871 switch (event) {
3872 case SND_SOC_DAPM_PRE_PMU:
3873 (*dmic_gpio_cnt)++;
3874 if (*dmic_gpio_cnt == 1) {
3875 ret = msm_cdc_pinctrl_select_active_state(
3876 dmic_gpio);
3877 if (ret < 0) {
3878 pr_err("%s: gpio set cannot be activated %sd",
3879 __func__, "dmic_gpio");
3880 return ret;
3881 }
3882 }
3883
3884 break;
3885 case SND_SOC_DAPM_POST_PMD:
3886 (*dmic_gpio_cnt)--;
3887 if (*dmic_gpio_cnt == 0) {
3888 ret = msm_cdc_pinctrl_select_sleep_state(
3889 dmic_gpio);
3890 if (ret < 0) {
3891 pr_err("%s: gpio set cannot be de-activated %sd",
3892 __func__, "dmic_gpio");
3893 return ret;
3894 }
3895 }
3896 break;
3897 default:
3898 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3899 return -EINVAL;
3900 }
3901 return 0;
3902}
3903
3904static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3905 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3906 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3907 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3908 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3909 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3910 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3911 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3912 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3913};
3914
3915static inline int param_is_mask(int p)
3916{
3917 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3918 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3919}
3920
3921static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3922 int n)
3923{
3924 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3925}
3926
3927static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3928 unsigned int bit)
3929{
3930 if (bit >= SNDRV_MASK_MAX)
3931 return;
3932 if (param_is_mask(n)) {
3933 struct snd_mask *m = param_to_mask(p, n);
3934
3935 m->bits[0] = 0;
3936 m->bits[1] = 0;
3937 m->bits[bit >> 5] |= (1 << (bit & 31));
3938 }
3939}
3940
3941static int msm_slim_get_ch_from_beid(int32_t be_id)
3942{
3943 int ch_id = 0;
3944
3945 switch (be_id) {
3946 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3947 ch_id = SLIM_RX_0;
3948 break;
3949 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3950 ch_id = SLIM_RX_1;
3951 break;
3952 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3953 ch_id = SLIM_RX_2;
3954 break;
3955 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3956 ch_id = SLIM_RX_3;
3957 break;
3958 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3959 ch_id = SLIM_RX_4;
3960 break;
3961 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3962 ch_id = SLIM_RX_6;
3963 break;
3964 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3965 ch_id = SLIM_TX_0;
3966 break;
3967 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3968 ch_id = SLIM_TX_3;
3969 break;
3970 default:
3971 ch_id = SLIM_RX_0;
3972 break;
3973 }
3974
3975 return ch_id;
3976}
3977
3978static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3979{
3980 int idx = 0;
3981
3982 switch (be_id) {
3983 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3984 idx = WSA_CDC_DMA_RX_0;
3985 break;
3986 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3987 idx = WSA_CDC_DMA_TX_0;
3988 break;
3989 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3990 idx = WSA_CDC_DMA_RX_1;
3991 break;
3992 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3993 idx = WSA_CDC_DMA_TX_1;
3994 break;
3995 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3996 idx = WSA_CDC_DMA_TX_2;
3997 break;
3998 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3999 idx = RX_CDC_DMA_RX_0;
4000 break;
4001 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4002 idx = RX_CDC_DMA_RX_1;
4003 break;
4004 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4005 idx = RX_CDC_DMA_RX_2;
4006 break;
4007 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4008 idx = RX_CDC_DMA_RX_3;
4009 break;
4010 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4011 idx = RX_CDC_DMA_RX_5;
4012 break;
4013 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4014 idx = TX_CDC_DMA_TX_0;
4015 break;
4016 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4017 idx = TX_CDC_DMA_TX_3;
4018 break;
4019 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
4020 idx = TX_CDC_DMA_TX_4;
4021 break;
4022 default:
4023 idx = RX_CDC_DMA_RX_0;
4024 break;
4025 }
4026
4027 return idx;
4028}
4029
4030static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
4031{
4032 int idx = -EINVAL;
4033
4034 switch (be_id) {
4035 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4036 idx = DP_RX_IDX;
4037 break;
4038 default:
4039 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
4040 idx = -EINVAL;
4041 break;
4042 }
4043
4044 return idx;
4045}
4046
4047static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4048 struct snd_pcm_hw_params *params)
4049{
4050 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4051 struct snd_interval *rate = hw_param_interval(params,
4052 SNDRV_PCM_HW_PARAM_RATE);
4053 struct snd_interval *channels = hw_param_interval(params,
4054 SNDRV_PCM_HW_PARAM_CHANNELS);
4055 int rc = 0;
4056 int idx;
4057 void *config = NULL;
4058 struct snd_soc_codec *codec = NULL;
4059
4060 pr_debug("%s: format = %d, rate = %d\n",
4061 __func__, params_format(params), params_rate(params));
4062
4063 switch (dai_link->id) {
4064 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4065 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4066 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4067 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4068 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4069 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4070 idx = msm_slim_get_ch_from_beid(dai_link->id);
4071 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4072 slim_rx_cfg[idx].bit_format);
4073 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4074 channels->min = channels->max = slim_rx_cfg[idx].channels;
4075 break;
4076
4077 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4078 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4079 idx = msm_slim_get_ch_from_beid(dai_link->id);
4080 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4081 slim_tx_cfg[idx].bit_format);
4082 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4083 channels->min = channels->max = slim_tx_cfg[idx].channels;
4084 break;
4085
4086 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4087 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4088 slim_tx_cfg[1].bit_format);
4089 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4090 channels->min = channels->max = slim_tx_cfg[1].channels;
4091 break;
4092
4093 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4094 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4095 SNDRV_PCM_FORMAT_S32_LE);
4096 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4097 channels->min = channels->max = msm_vi_feed_tx_ch;
4098 break;
4099
4100 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4101 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4102 slim_rx_cfg[5].bit_format);
4103 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4104 channels->min = channels->max = slim_rx_cfg[5].channels;
4105 break;
4106
4107 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4108 codec = rtd->codec;
4109 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4110 channels->min = channels->max = 1;
4111
4112 config = msm_codec_fn.get_afe_config_fn(codec,
4113 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4114 if (config) {
4115 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4116 config, SLIMBUS_5_TX);
4117 if (rc)
4118 pr_err("%s: Failed to set slimbus slave port config %d\n",
4119 __func__, rc);
4120 }
4121 break;
4122
4123 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4124 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4125 slim_rx_cfg[SLIM_RX_7].bit_format);
4126 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4127 channels->min = channels->max =
4128 slim_rx_cfg[SLIM_RX_7].channels;
4129 break;
4130
4131 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4132 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4133 channels->min = channels->max =
4134 slim_tx_cfg[SLIM_TX_7].channels;
4135 break;
4136
4137 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4138 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4139 channels->min = channels->max =
4140 slim_tx_cfg[SLIM_TX_8].channels;
4141 break;
4142
4143 case MSM_BACKEND_DAI_USB_RX:
4144 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4145 usb_rx_cfg.bit_format);
4146 rate->min = rate->max = usb_rx_cfg.sample_rate;
4147 channels->min = channels->max = usb_rx_cfg.channels;
4148 break;
4149
4150 case MSM_BACKEND_DAI_USB_TX:
4151 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4152 usb_tx_cfg.bit_format);
4153 rate->min = rate->max = usb_tx_cfg.sample_rate;
4154 channels->min = channels->max = usb_tx_cfg.channels;
4155 break;
4156
4157 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4158 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4159 if (idx < 0) {
4160 pr_err("%s: Incorrect ext disp idx %d\n",
4161 __func__, idx);
4162 rc = idx;
4163 goto done;
4164 }
4165
4166 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4167 ext_disp_rx_cfg[idx].bit_format);
4168 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4169 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4170 break;
4171
4172 case MSM_BACKEND_DAI_AFE_PCM_RX:
4173 channels->min = channels->max = proxy_rx_cfg.channels;
4174 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4175 break;
4176
4177 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4178 channels->min = channels->max =
4179 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4180 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4181 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4182 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4183 break;
4184
4185 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4186 channels->min = channels->max =
4187 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4188 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4189 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4190 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4191 break;
4192
4193 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4194 channels->min = channels->max =
4195 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4196 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4197 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4198 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4199 break;
4200
4201 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4202 channels->min = channels->max =
4203 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4204 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4205 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4206 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4207 break;
4208
4209 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4210 channels->min = channels->max =
4211 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4212 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4213 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4214 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4215 break;
4216
4217 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4218 channels->min = channels->max =
4219 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4220 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4221 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4222 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4223 break;
4224
4225 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4226 channels->min = channels->max =
4227 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4228 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4229 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4230 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4231 break;
4232
4233 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4234 channels->min = channels->max =
4235 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4236 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4237 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4238 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4239 break;
4240
4241 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4242 channels->min = channels->max =
4243 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4244 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4245 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4246 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4247 break;
4248
4249 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4250 channels->min = channels->max =
4251 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4252 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4253 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4254 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4255 break;
4256
4257
4258 case MSM_BACKEND_DAI_AUXPCM_RX:
4259 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4260 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4261 rate->min = rate->max =
4262 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4263 channels->min = channels->max =
4264 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4265 break;
4266
4267 case MSM_BACKEND_DAI_AUXPCM_TX:
4268 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4269 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4270 rate->min = rate->max =
4271 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4272 channels->min = channels->max =
4273 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4274 break;
4275
4276 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4277 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4278 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4279 rate->min = rate->max =
4280 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4281 channels->min = channels->max =
4282 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4283 break;
4284
4285 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4286 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4287 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4288 rate->min = rate->max =
4289 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4290 channels->min = channels->max =
4291 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4292 break;
4293
4294 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4295 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4296 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4297 rate->min = rate->max =
4298 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4299 channels->min = channels->max =
4300 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4301 break;
4302
4303 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4304 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4305 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4306 rate->min = rate->max =
4307 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4308 channels->min = channels->max =
4309 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4310 break;
4311
4312 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4313 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4314 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4315 rate->min = rate->max =
4316 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4317 channels->min = channels->max =
4318 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4319 break;
4320
4321 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4322 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4323 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4324 rate->min = rate->max =
4325 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4326 channels->min = channels->max =
4327 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4328 break;
4329
4330 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4332 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4333 rate->min = rate->max =
4334 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4335 channels->min = channels->max =
4336 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4337 break;
4338
4339 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4341 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4342 rate->min = rate->max =
4343 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4344 channels->min = channels->max =
4345 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4346 break;
4347
4348 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4350 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4351 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4352 channels->min = channels->max =
4353 mi2s_rx_cfg[PRIM_MI2S].channels;
4354 break;
4355
4356 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4357 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4358 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4359 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4360 channels->min = channels->max =
4361 mi2s_tx_cfg[PRIM_MI2S].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 mi2s_rx_cfg[SEC_MI2S].bit_format);
4367 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4368 channels->min = channels->max =
4369 mi2s_rx_cfg[SEC_MI2S].channels;
4370 break;
4371
4372 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4373 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4374 mi2s_tx_cfg[SEC_MI2S].bit_format);
4375 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4376 channels->min = channels->max =
4377 mi2s_tx_cfg[SEC_MI2S].channels;
4378 break;
4379
4380 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4381 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4382 mi2s_rx_cfg[TERT_MI2S].bit_format);
4383 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4384 channels->min = channels->max =
4385 mi2s_rx_cfg[TERT_MI2S].channels;
4386 break;
4387
4388 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4389 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4390 mi2s_tx_cfg[TERT_MI2S].bit_format);
4391 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4392 channels->min = channels->max =
4393 mi2s_tx_cfg[TERT_MI2S].channels;
4394 break;
4395
4396 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4397 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4398 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4399 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4400 channels->min = channels->max =
4401 mi2s_rx_cfg[QUAT_MI2S].channels;
4402 break;
4403
4404 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4405 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4406 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4407 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4408 channels->min = channels->max =
4409 mi2s_tx_cfg[QUAT_MI2S].channels;
4410 break;
4411
4412 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4413 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4414 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4415 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4416 channels->min = channels->max =
4417 mi2s_rx_cfg[QUIN_MI2S].channels;
4418 break;
4419
4420 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4421 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4422 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4423 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4424 channels->min = channels->max =
4425 mi2s_tx_cfg[QUIN_MI2S].channels;
4426 break;
4427
4428 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4429 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4430 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4431 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4432 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4433 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4434 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4435 cdc_dma_rx_cfg[idx].bit_format);
4436 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4437 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4438 break;
4439
4440 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4441 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4442 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05304443 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4444 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304445 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4446 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4447 cdc_dma_tx_cfg[idx].bit_format);
4448 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4449 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4450 break;
4451
4452 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4453 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4454 SNDRV_PCM_FORMAT_S32_LE);
4455 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4456 channels->min = channels->max = msm_vi_feed_tx_ch;
4457 break;
4458
4459 default:
4460 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4461 break;
4462 }
4463
4464done:
4465 return rc;
4466}
4467
4468static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4469{
4470 int value = 0;
4471 bool ret = 0;
4472 struct snd_soc_card *card = codec->component.card;
4473 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4474 struct pinctrl_state *en2_pinctrl_active;
4475 struct pinctrl_state *en2_pinctrl_sleep;
4476
4477 if (!pdata->usbc_en2_gpio_p) {
4478 if (active) {
4479 /* if active and usbc_en2_gpio undefined, get pin */
4480 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4481 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4482 dev_err(card->dev,
4483 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4484 __func__,
4485 PTR_ERR(pdata->usbc_en2_gpio_p));
4486 pdata->usbc_en2_gpio_p = NULL;
4487 return false;
4488 }
4489 } else {
4490 /* if not active and usbc_en2_gpio undefined, return */
4491 return false;
4492 }
4493 }
4494
4495 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4496 "qcom,usbc-analog-en2-gpio", 0);
4497 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4498 dev_err(card->dev, "%s, property %s not in node %s",
4499 __func__, "qcom,usbc-analog-en2-gpio",
4500 card->dev->of_node->full_name);
4501 return false;
4502 }
4503
4504 en2_pinctrl_active = pinctrl_lookup_state(
4505 pdata->usbc_en2_gpio_p, "aud_active");
4506 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4507 dev_err(card->dev,
4508 "%s: Cannot get aud_active pinctrl state:%ld\n",
4509 __func__, PTR_ERR(en2_pinctrl_active));
4510 ret = false;
4511 goto err_lookup_state;
4512 }
4513
4514 en2_pinctrl_sleep = pinctrl_lookup_state(
4515 pdata->usbc_en2_gpio_p, "aud_sleep");
4516 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4517 dev_err(card->dev,
4518 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4519 __func__, PTR_ERR(en2_pinctrl_sleep));
4520 ret = false;
4521 goto err_lookup_state;
4522 }
4523
4524 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4525 if (active) {
4526 dev_dbg(codec->dev, "%s: enter\n", __func__);
4527 if (pdata->usbc_en2_gpio_p) {
4528 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4529 if (value)
4530 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4531 en2_pinctrl_sleep);
4532 else
4533 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4534 en2_pinctrl_active);
4535 } else if (pdata->usbc_en2_gpio >= 0) {
4536 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4537 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4538 }
4539 pr_debug("%s: swap select switch %d to %d\n", __func__,
4540 value, !value);
4541 ret = true;
4542 } else {
4543 /* if not active, release usbc_en2_gpio_p pin */
4544 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4545 en2_pinctrl_sleep);
4546 }
4547
4548err_lookup_state:
4549 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4550 pdata->usbc_en2_gpio_p = NULL;
4551 return ret;
4552}
4553
4554static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4555{
4556 int value = 0;
4557 bool ret = false;
4558 struct snd_soc_card *card;
4559 struct msm_asoc_mach_data *pdata;
4560
4561 if (!codec) {
4562 pr_err("%s codec is NULL\n", __func__);
4563 return false;
4564 }
4565 card = codec->component.card;
4566 pdata = snd_soc_card_get_drvdata(card);
4567
4568 if (!pdata)
4569 return false;
4570
4571 if (wcd_mbhc_cfg.enable_usbc_analog)
4572 return msm_usbc_swap_gnd_mic(codec, active);
4573
4574 /* if usbc is not defined, swap using us_euro_gpio_p */
4575 if (pdata->us_euro_gpio_p) {
4576 value = msm_cdc_pinctrl_get_state(
4577 pdata->us_euro_gpio_p);
4578 if (value)
4579 msm_cdc_pinctrl_select_sleep_state(
4580 pdata->us_euro_gpio_p);
4581 else
4582 msm_cdc_pinctrl_select_active_state(
4583 pdata->us_euro_gpio_p);
4584 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4585 __func__, value, !value);
4586 ret = true;
4587 }
4588 return ret;
4589}
4590
4591static int msm_afe_set_config(struct snd_soc_codec *codec)
4592{
4593 int ret = 0;
4594 void *config_data = NULL;
4595
4596 if (!msm_codec_fn.get_afe_config_fn) {
4597 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4598 __func__);
4599 return -EINVAL;
4600 }
4601
4602 config_data = msm_codec_fn.get_afe_config_fn(codec,
4603 AFE_CDC_REGISTERS_CONFIG);
4604 if (config_data) {
4605 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4606 if (ret) {
4607 dev_err(codec->dev,
4608 "%s: Failed to set codec registers config %d\n",
4609 __func__, ret);
4610 return ret;
4611 }
4612 }
4613
4614 config_data = msm_codec_fn.get_afe_config_fn(codec,
4615 AFE_CDC_REGISTER_PAGE_CONFIG);
4616 if (config_data) {
4617 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4618 0);
4619 if (ret)
4620 dev_err(codec->dev,
4621 "%s: Failed to set cdc register page config\n",
4622 __func__);
4623 }
4624
4625 config_data = msm_codec_fn.get_afe_config_fn(codec,
4626 AFE_SLIMBUS_SLAVE_CONFIG);
4627 if (config_data) {
4628 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4629 if (ret) {
4630 dev_err(codec->dev,
4631 "%s: Failed to set slimbus slave config %d\n",
4632 __func__, ret);
4633 return ret;
4634 }
4635 }
4636
4637 return 0;
4638}
4639
4640static void msm_afe_clear_config(void)
4641{
4642 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4643 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4644}
4645
4646static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4647 struct snd_card *card)
4648{
4649 int ret = 0;
4650 unsigned long timeout;
4651 int adsp_ready = 0;
4652 bool snd_card_online = 0;
4653
4654 timeout = jiffies +
4655 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4656
4657 do {
4658 if (!snd_card_online) {
4659 snd_card_online = snd_card_is_online_state(card);
4660 pr_debug("%s: Sound card is %s\n", __func__,
4661 snd_card_online ? "Online" : "Offline");
4662 }
4663 if (!adsp_ready) {
4664 adsp_ready = q6core_is_adsp_ready();
4665 pr_debug("%s: ADSP Audio is %s\n", __func__,
4666 adsp_ready ? "ready" : "not ready");
4667 }
4668 if (snd_card_online && adsp_ready)
4669 break;
4670
4671 /*
4672 * Sound card/ADSP will be coming up after subsystem restart and
4673 * it might not be fully up when the control reaches
4674 * here. So, wait for 50msec before checking ADSP state
4675 */
4676 msleep(50);
4677 } while (time_after(timeout, jiffies));
4678
4679 if (!snd_card_online || !adsp_ready) {
4680 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4681 __func__,
4682 snd_card_online ? "Online" : "Offline",
4683 adsp_ready ? "ready" : "not ready");
4684 ret = -ETIMEDOUT;
4685 goto err;
4686 }
4687
4688 ret = msm_afe_set_config(codec);
4689 if (ret)
4690 pr_err("%s: Failed to set AFE config. err %d\n",
4691 __func__, ret);
4692
4693 return 0;
4694
4695err:
4696 return ret;
4697}
4698
4699static int sm6150_notifier_service_cb(struct notifier_block *this,
4700 unsigned long opcode, void *ptr)
4701{
4702 int ret;
4703 struct snd_soc_card *card = NULL;
4704 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4705 struct snd_soc_pcm_runtime *rtd;
4706 struct snd_soc_codec *codec;
4707
4708 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4709
4710 switch (opcode) {
4711 case AUDIO_NOTIFIER_SERVICE_DOWN:
4712 /*
4713 * Use flag to ignore initial boot notifications
4714 * On initial boot msm_adsp_power_up_config is
4715 * called on init. There is no need to clear
4716 * and set the config again on initial boot.
4717 */
4718 if (is_initial_boot)
4719 break;
4720 msm_afe_clear_config();
4721 break;
4722 case AUDIO_NOTIFIER_SERVICE_UP:
4723 if (is_initial_boot) {
4724 is_initial_boot = false;
4725 break;
4726 }
4727 if (!spdev)
4728 return -EINVAL;
4729
4730 card = platform_get_drvdata(spdev);
4731 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4732 if (!rtd) {
4733 dev_err(card->dev,
4734 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4735 __func__, be_dl_name);
4736 ret = -EINVAL;
4737 goto err;
4738 }
4739 codec = rtd->codec;
4740
4741 ret = msm_adsp_power_up_config(codec, card->snd_card);
4742 if (ret < 0) {
4743 dev_err(card->dev,
4744 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4745 __func__, ret);
4746 goto err;
4747 }
4748 break;
4749 default:
4750 break;
4751 }
4752err:
4753 return NOTIFY_OK;
4754}
4755
4756static struct notifier_block service_nb = {
4757 .notifier_call = sm6150_notifier_service_cb,
4758 .priority = -INT_MAX,
4759};
4760
4761static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4762{
4763 int ret = 0;
4764 void *config_data;
4765 struct snd_soc_codec *codec = rtd->codec;
4766 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4767 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4768 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4769 struct snd_soc_component *aux_comp;
4770 struct snd_card *card;
4771 struct snd_info_entry *entry;
4772 struct msm_asoc_mach_data *pdata =
4773 snd_soc_card_get_drvdata(rtd->card);
4774
4775 /*
4776 * Codec SLIMBUS configuration
4777 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4778 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4779 * TX14, TX15, TX16
4780 */
4781 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4782 150, 151};
4783 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4784 134, 135, 136, 137, 138, 139,
4785 140, 141, 142, 143};
4786
4787 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4788
4789 rtd->pmdown_time = 0;
4790
4791 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4792 ARRAY_SIZE(msm_tavil_snd_controls));
4793 if (ret < 0) {
4794 pr_err("%s: add_codec_controls failed, err %d\n",
4795 __func__, ret);
4796 return ret;
4797 }
4798
4799 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4800 ARRAY_SIZE(msm_common_snd_controls));
4801 if (ret < 0) {
4802 pr_err("%s: add_codec_controls failed, err %d\n",
4803 __func__, ret);
4804 return ret;
4805 }
4806
4807 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4808 ARRAY_SIZE(msm_dapm_widgets_tavil));
4809
4810 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4811 ARRAY_SIZE(wcd_audio_paths_tavil));
4812
4813 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4814 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4815 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4816 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4817 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4818 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4819 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4820 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4821 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4822 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4823 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4824 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4825 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4826 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4827 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4828 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4829 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4830 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4831 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4832 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4833 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4834 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4835 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4836 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4837 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4838 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4839 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4840
4841 snd_soc_dapm_sync(dapm);
4842
4843 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4844 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4845
4846 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4847
4848 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4849 if (ret) {
4850 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4851 goto err;
4852 }
4853
4854 config_data = msm_codec_fn.get_afe_config_fn(codec,
4855 AFE_AANC_VERSION);
4856 if (config_data) {
4857 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4858 if (ret) {
4859 pr_err("%s: Failed to set aanc version %d\n",
4860 __func__, ret);
4861 goto err;
4862 }
4863 }
4864
4865 /*
4866 * Send speaker configuration only for WSA8810.
4867 * Default configuration is for WSA8815.
4868 */
4869 pr_debug("%s: Number of aux devices: %d\n",
4870 __func__, rtd->card->num_aux_devs);
4871 if (rtd->card->num_aux_devs &&
4872 !list_empty(&rtd->card->aux_comp_list)) {
4873 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4874 struct snd_soc_component, card_aux_list);
4875 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4876 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4877 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4878 tavil_set_spkr_gain_offset(rtd->codec,
4879 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4880 }
4881 }
4882
4883 card = rtd->card->snd_card;
4884 entry = snd_info_create_subdir(card->module, "codecs",
4885 card->proc_root);
4886 if (!entry) {
4887 pr_debug("%s: Cannot create codecs module entry\n",
4888 __func__);
4889 ret = 0;
4890 goto err;
4891 }
4892 pdata->codec_root = entry;
4893 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4894
4895 codec_reg_done = true;
4896 return 0;
4897err:
4898 return ret;
4899}
4900
4901static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4902{
4903 int ret = 0;
4904 struct snd_soc_codec *codec = rtd->codec;
4905 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4906 struct snd_card *card;
4907 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304908 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304909 struct msm_asoc_mach_data *pdata =
4910 snd_soc_card_get_drvdata(rtd->card);
4911
4912 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4913 ARRAY_SIZE(msm_int_snd_controls));
4914 if (ret < 0) {
4915 pr_err("%s: add_codec_controls failed: %d\n",
4916 __func__, ret);
4917 return ret;
4918 }
4919 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4920 ARRAY_SIZE(msm_common_snd_controls));
4921 if (ret < 0) {
4922 pr_err("%s: add common snd controls failed: %d\n",
4923 __func__, ret);
4924 return ret;
4925 }
4926
4927 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4928 ARRAY_SIZE(msm_int_dapm_widgets));
4929
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304930 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304931 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4932 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4933 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304934
4935 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4936 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4937 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4938 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4939
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304940 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4941 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4942 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4943 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304944
4945 snd_soc_dapm_sync(dapm);
4946
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304947 /*
4948 * Send speaker configuration only for WSA8810.
4949 * Default configuration is for WSA8815.
4950 */
4951 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4952 __func__, rtd->card->num_aux_devs);
4953 if (rtd->card->num_aux_devs &&
4954 !list_empty(&rtd->card->component_dev_list)) {
4955 aux_comp = list_first_entry(
4956 &rtd->card->component_dev_list,
4957 struct snd_soc_component,
4958 card_aux_list);
4959 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4960 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4961 wsa_macro_set_spkr_mode(rtd->codec,
4962 WSA_MACRO_SPKR_MODE_1);
4963 wsa_macro_set_spkr_gain_offset(rtd->codec,
4964 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4965 }
4966 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304967 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05304968 if (!pdata->codec_root) {
4969 entry = snd_info_create_subdir(card->module, "codecs",
4970 card->proc_root);
4971 if (!entry) {
4972 pr_debug("%s: Cannot create codecs module entry\n",
4973 __func__);
4974 ret = 0;
4975 goto err;
4976 }
4977 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304978 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304979 bolero_info_create_codec_entry(pdata->codec_root, codec);
4980 codec_reg_done = true;
4981 return 0;
4982err:
4983 return ret;
4984}
4985
4986static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4987{
4988 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4989 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4990 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4991
4992 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4993 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4994}
4995
4996static void *def_wcd_mbhc_cal(void)
4997{
4998 void *wcd_mbhc_cal;
4999 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5000 u16 *btn_high;
5001
5002 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5003 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5004 if (!wcd_mbhc_cal)
5005 return NULL;
5006
5007#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
5008 S(v_hs_max, 1600);
5009#undef S
5010#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
5011 S(num_btn, WCD_MBHC_DEF_BUTTONS);
5012#undef S
5013
5014 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5015 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5016 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5017
5018 btn_high[0] = 75;
5019 btn_high[1] = 150;
5020 btn_high[2] = 237;
5021 btn_high[3] = 500;
5022 btn_high[4] = 500;
5023 btn_high[5] = 500;
5024 btn_high[6] = 500;
5025 btn_high[7] = 500;
5026
5027 return wcd_mbhc_cal;
5028}
5029
5030static int msm_snd_hw_params(struct snd_pcm_substream *substream,
5031 struct snd_pcm_hw_params *params)
5032{
5033 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5034 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5035 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5036 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5037
5038 int ret = 0;
5039 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5040 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5041 u32 user_set_tx_ch = 0;
5042 u32 rx_ch_count;
5043
5044 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5045 ret = snd_soc_dai_get_channel_map(codec_dai,
5046 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5047 if (ret < 0) {
5048 pr_err("%s: failed to get codec chan map, err:%d\n",
5049 __func__, ret);
5050 goto err;
5051 }
5052 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5053 pr_debug("%s: rx_5_ch=%d\n", __func__,
5054 slim_rx_cfg[5].channels);
5055 rx_ch_count = slim_rx_cfg[5].channels;
5056 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5057 pr_debug("%s: rx_2_ch=%d\n", __func__,
5058 slim_rx_cfg[2].channels);
5059 rx_ch_count = slim_rx_cfg[2].channels;
5060 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5061 pr_debug("%s: rx_6_ch=%d\n", __func__,
5062 slim_rx_cfg[6].channels);
5063 rx_ch_count = slim_rx_cfg[6].channels;
5064 } else {
5065 pr_debug("%s: rx_0_ch=%d\n", __func__,
5066 slim_rx_cfg[0].channels);
5067 rx_ch_count = slim_rx_cfg[0].channels;
5068 }
5069 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5070 rx_ch_count, rx_ch);
5071 if (ret < 0) {
5072 pr_err("%s: failed to set cpu chan map, err:%d\n",
5073 __func__, ret);
5074 goto err;
5075 }
5076 } else {
5077
5078 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5079 codec_dai->name, codec_dai->id, user_set_tx_ch);
5080 ret = snd_soc_dai_get_channel_map(codec_dai,
5081 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5082 if (ret < 0) {
5083 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5084 __func__, ret);
5085 goto err;
5086 }
5087 /* For <codec>_tx1 case */
5088 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5089 user_set_tx_ch = slim_tx_cfg[0].channels;
5090 /* For <codec>_tx3 case */
5091 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5092 user_set_tx_ch = slim_tx_cfg[1].channels;
5093 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5094 user_set_tx_ch = msm_vi_feed_tx_ch;
5095 else
5096 user_set_tx_ch = tx_ch_cnt;
5097
5098 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5099 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5100 tx_ch_cnt, dai_link->id);
5101
5102 ret = snd_soc_dai_set_channel_map(cpu_dai,
5103 user_set_tx_ch, tx_ch, 0, 0);
5104 if (ret < 0)
5105 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5106 __func__, ret);
5107 }
5108
5109err:
5110 return ret;
5111}
5112
5113
5114static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5115 struct snd_pcm_hw_params *params)
5116{
5117 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5118 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5119 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5120 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5121
5122 int ret = 0;
5123 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5124 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5125 u32 user_set_tx_ch = 0;
5126 u32 user_set_rx_ch = 0;
5127 u32 ch_id;
5128
5129 ret = snd_soc_dai_get_channel_map(codec_dai,
5130 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5131 &rx_ch_cdc_dma);
5132 if (ret < 0) {
5133 pr_err("%s: failed to get codec chan map, err:%d\n",
5134 __func__, ret);
5135 goto err;
5136 }
5137
5138 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5139 switch (dai_link->id) {
5140 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5141 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5142 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5143 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5144 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5145 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5146 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5147 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5148 {
5149 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5150 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5151 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5152 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5153 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5154 user_set_rx_ch, &rx_ch_cdc_dma);
5155 if (ret < 0) {
5156 pr_err("%s: failed to set cpu chan map, err:%d\n",
5157 __func__, ret);
5158 goto err;
5159 }
5160
5161 }
5162 break;
5163 }
5164 } else {
5165 switch (dai_link->id) {
5166 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5167 {
5168 user_set_tx_ch = msm_vi_feed_tx_ch;
5169 }
5170 break;
5171 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5172 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5173 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305174 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5175 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305176 {
5177 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5178 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5179 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5180 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5181 }
5182 break;
5183 }
5184
5185 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5186 &tx_ch_cdc_dma, 0, 0);
5187 if (ret < 0) {
5188 pr_err("%s: failed to set cpu chan map, err:%d\n",
5189 __func__, ret);
5190 goto err;
5191 }
5192 }
5193
5194err:
5195 return ret;
5196}
5197
5198static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5199 struct snd_pcm_hw_params *params)
5200{
5201 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5202 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5203 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5204 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5205 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5206 unsigned int num_tx_ch = 0;
5207 unsigned int num_rx_ch = 0;
5208 int ret = 0;
5209
5210 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5211 num_rx_ch = params_channels(params);
5212 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5213 codec_dai->name, codec_dai->id, num_rx_ch);
5214 ret = snd_soc_dai_get_channel_map(codec_dai,
5215 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5216 if (ret < 0) {
5217 pr_err("%s: failed to get codec chan map, err:%d\n",
5218 __func__, ret);
5219 goto err;
5220 }
5221 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5222 num_rx_ch, rx_ch);
5223 if (ret < 0) {
5224 pr_err("%s: failed to set cpu chan map, err:%d\n",
5225 __func__, ret);
5226 goto err;
5227 }
5228 } else {
5229 num_tx_ch = params_channels(params);
5230 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5231 codec_dai->name, codec_dai->id, num_tx_ch);
5232 ret = snd_soc_dai_get_channel_map(codec_dai,
5233 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5234 if (ret < 0) {
5235 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5236 __func__, ret);
5237 goto err;
5238 }
5239 ret = snd_soc_dai_set_channel_map(cpu_dai,
5240 num_tx_ch, tx_ch, 0, 0);
5241 if (ret < 0) {
5242 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5243 __func__, ret);
5244 goto err;
5245 }
5246 }
5247
5248err:
5249 return ret;
5250}
5251
5252static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5253 struct snd_pcm_hw_params *params)
5254{
5255 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5256 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5257 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5258 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5259 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5260 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5261 int ret;
5262
5263 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5264 codec_dai->name, codec_dai->id);
5265 ret = snd_soc_dai_get_channel_map(codec_dai,
5266 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5267 if (ret) {
5268 dev_err(rtd->dev,
5269 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5270 __func__, ret);
5271 goto err;
5272 }
5273
5274 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5275 __func__, tx_ch_cnt, dai_link->id);
5276
5277 ret = snd_soc_dai_set_channel_map(cpu_dai,
5278 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5279 if (ret)
5280 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5281 __func__, ret);
5282
5283err:
5284 return ret;
5285}
5286
5287static int msm_get_port_id(int be_id)
5288{
5289 int afe_port_id;
5290
5291 switch (be_id) {
5292 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5293 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5294 break;
5295 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5296 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5297 break;
5298 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5299 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5300 break;
5301 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5302 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5303 break;
5304 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5305 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5306 break;
5307 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5308 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5309 break;
5310 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5311 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5312 break;
5313 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5314 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5315 break;
5316 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5317 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5318 break;
5319 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5320 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5321 break;
5322 default:
5323 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5324 afe_port_id = -EINVAL;
5325 }
5326
5327 return afe_port_id;
5328}
5329
5330static u32 get_mi2s_bits_per_sample(u32 bit_format)
5331{
5332 u32 bit_per_sample;
5333
5334 switch (bit_format) {
5335 case SNDRV_PCM_FORMAT_S32_LE:
5336 case SNDRV_PCM_FORMAT_S24_3LE:
5337 case SNDRV_PCM_FORMAT_S24_LE:
5338 bit_per_sample = 32;
5339 break;
5340 case SNDRV_PCM_FORMAT_S16_LE:
5341 default:
5342 bit_per_sample = 16;
5343 break;
5344 }
5345
5346 return bit_per_sample;
5347}
5348
5349static void update_mi2s_clk_val(int dai_id, int stream)
5350{
5351 u32 bit_per_sample;
5352
5353 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5354 bit_per_sample =
5355 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5356 mi2s_clk[dai_id].clk_freq_in_hz =
5357 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5358 } else {
5359 bit_per_sample =
5360 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5361 mi2s_clk[dai_id].clk_freq_in_hz =
5362 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5363 }
5364}
5365
5366static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5367{
5368 int ret = 0;
5369 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5370 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5371 int port_id = 0;
5372 int index = cpu_dai->id;
5373
5374 port_id = msm_get_port_id(rtd->dai_link->id);
5375 if (port_id < 0) {
5376 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5377 ret = port_id;
5378 goto err;
5379 }
5380
5381 if (enable) {
5382 update_mi2s_clk_val(index, substream->stream);
5383 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5384 mi2s_clk[index].clk_freq_in_hz);
5385 }
5386
5387 mi2s_clk[index].enable = enable;
5388 ret = afe_set_lpass_clock_v2(port_id,
5389 &mi2s_clk[index]);
5390 if (ret < 0) {
5391 dev_err(rtd->card->dev,
5392 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5393 __func__, port_id, ret);
5394 goto err;
5395 }
5396
5397err:
5398 return ret;
5399}
5400
5401static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5402 enum pinctrl_pin_state new_state)
5403{
5404 int ret = 0;
5405 int curr_state = 0;
5406
5407 if (pinctrl_info == NULL) {
5408 pr_err("%s: pinctrl_info is NULL\n", __func__);
5409 ret = -EINVAL;
5410 goto err;
5411 }
5412
5413 if (pinctrl_info->pinctrl == NULL) {
5414 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5415 ret = -EINVAL;
5416 goto err;
5417 }
5418
5419 curr_state = pinctrl_info->curr_state;
5420 pinctrl_info->curr_state = new_state;
5421 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5422 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5423
5424 if (curr_state == pinctrl_info->curr_state) {
5425 pr_debug("%s: Already in same state\n", __func__);
5426 goto err;
5427 }
5428
5429 if (curr_state != STATE_DISABLE &&
5430 pinctrl_info->curr_state != STATE_DISABLE) {
5431 pr_debug("%s: state already active cannot switch\n", __func__);
5432 ret = -EIO;
5433 goto err;
5434 }
5435
5436 switch (pinctrl_info->curr_state) {
5437 case STATE_MI2S_ACTIVE:
5438 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5439 pinctrl_info->mi2s_active);
5440 if (ret) {
5441 pr_err("%s: MI2S state select failed with %d\n",
5442 __func__, ret);
5443 ret = -EIO;
5444 goto err;
5445 }
5446 break;
5447 case STATE_TDM_ACTIVE:
5448 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5449 pinctrl_info->tdm_active);
5450 if (ret) {
5451 pr_err("%s: TDM state select failed with %d\n",
5452 __func__, ret);
5453 ret = -EIO;
5454 goto err;
5455 }
5456 break;
5457 case STATE_DISABLE:
5458 if (curr_state == STATE_MI2S_ACTIVE) {
5459 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5460 pinctrl_info->mi2s_disable);
5461 } else {
5462 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5463 pinctrl_info->tdm_disable);
5464 }
5465 if (ret) {
5466 pr_err("%s: state disable failed with %d\n",
5467 __func__, ret);
5468 ret = -EIO;
5469 goto err;
5470 }
5471 break;
5472 default:
5473 pr_err("%s: TLMM pin state is invalid\n", __func__);
5474 return -EINVAL;
5475 }
5476
5477err:
5478 return ret;
5479}
5480
5481static int msm_get_pinctrl(struct platform_device *pdev)
5482{
5483 struct snd_soc_card *card = platform_get_drvdata(pdev);
5484 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5485 struct msm_pinctrl_info *pinctrl_info = NULL;
5486 struct pinctrl *pinctrl;
5487 int ret = 0;
5488
5489 pinctrl_info = &pdata->pinctrl_info;
5490
5491 if (pinctrl_info == NULL) {
5492 pr_err("%s: pinctrl_info is NULL\n", __func__);
5493 return -EINVAL;
5494 }
5495
5496 pinctrl = devm_pinctrl_get(&pdev->dev);
5497 if (IS_ERR_OR_NULL(pinctrl)) {
5498 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5499 return -EINVAL;
5500 }
5501 pinctrl_info->pinctrl = pinctrl;
5502
5503 /* get all the states handles from Device Tree */
5504 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5505 "quat-mi2s-sleep");
5506 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5507 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5508 goto err;
5509 }
5510 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5511 "quat-mi2s-active");
5512 if (IS_ERR(pinctrl_info->mi2s_active)) {
5513 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5514 goto err;
5515 }
5516 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5517 "quat-tdm-sleep");
5518 if (IS_ERR(pinctrl_info->tdm_disable)) {
5519 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5520 goto err;
5521 }
5522 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5523 "quat-tdm-active");
5524 if (IS_ERR(pinctrl_info->tdm_active)) {
5525 pr_err("%s: could not get tdm_active pinstate\n",
5526 __func__);
5527 goto err;
5528 }
5529 /* Reset the TLMM pins to a default state */
5530 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5531 pinctrl_info->mi2s_disable);
5532 if (ret != 0) {
5533 pr_err("%s: Disable TLMM pins failed with %d\n",
5534 __func__, ret);
5535 ret = -EIO;
5536 goto err;
5537 }
5538 pinctrl_info->curr_state = STATE_DISABLE;
5539
5540 return 0;
5541
5542err:
5543 devm_pinctrl_put(pinctrl);
5544 pinctrl_info->pinctrl = NULL;
5545 return -EINVAL;
5546}
5547
5548static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5549 struct snd_pcm_hw_params *params)
5550{
5551 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5552 struct snd_interval *rate = hw_param_interval(params,
5553 SNDRV_PCM_HW_PARAM_RATE);
5554 struct snd_interval *channels = hw_param_interval(params,
5555 SNDRV_PCM_HW_PARAM_CHANNELS);
5556
5557 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5558 channels->min = channels->max =
5559 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5560 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5561 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5562 rate->min = rate->max =
5563 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5564 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5565 channels->min = channels->max =
5566 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5567 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5568 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5569 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5570 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5571 channels->min = channels->max =
5572 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5573 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5574 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5575 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5576 } else {
5577 pr_err("%s: dai id 0x%x not supported\n",
5578 __func__, cpu_dai->id);
5579 return -EINVAL;
5580 }
5581
5582 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5583 __func__, cpu_dai->id, channels->max, rate->max,
5584 params_format(params));
5585
5586 return 0;
5587}
5588
5589static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5590 struct snd_pcm_hw_params *params)
5591{
5592 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5593 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5594 int ret = 0;
5595 int slot_width = 32;
5596 int channels, slots;
5597 unsigned int slot_mask, rate, clk_freq;
5598 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5599
5600 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5601
5602 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5603 switch (cpu_dai->id) {
5604 case AFE_PORT_ID_PRIMARY_TDM_RX:
5605 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5606 break;
5607 case AFE_PORT_ID_SECONDARY_TDM_RX:
5608 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5609 break;
5610 case AFE_PORT_ID_TERTIARY_TDM_RX:
5611 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5612 break;
5613 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5614 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5615 break;
5616 case AFE_PORT_ID_QUINARY_TDM_RX:
5617 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5618 break;
5619 case AFE_PORT_ID_PRIMARY_TDM_TX:
5620 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5621 break;
5622 case AFE_PORT_ID_SECONDARY_TDM_TX:
5623 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5624 break;
5625 case AFE_PORT_ID_TERTIARY_TDM_TX:
5626 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5627 break;
5628 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5629 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5630 break;
5631 case AFE_PORT_ID_QUINARY_TDM_TX:
5632 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5633 break;
5634
5635 default:
5636 pr_err("%s: dai id 0x%x not supported\n",
5637 __func__, cpu_dai->id);
5638 return -EINVAL;
5639 }
5640
5641 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5642 /*2 slot config - bits 0 and 1 set for the first two slots */
5643 slot_mask = 0x0000FFFF >> (16-slots);
5644 channels = slots;
5645
5646 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5647 __func__, slot_width, slots);
5648
5649 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5650 slots, slot_width);
5651 if (ret < 0) {
5652 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5653 __func__, ret);
5654 goto end;
5655 }
5656
5657 ret = snd_soc_dai_set_channel_map(cpu_dai,
5658 0, NULL, channels, slot_offset);
5659 if (ret < 0) {
5660 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5661 __func__, ret);
5662 goto end;
5663 }
5664 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5665 /*2 slot config - bits 0 and 1 set for the first two slots */
5666 slot_mask = 0x0000FFFF >> (16-slots);
5667 channels = slots;
5668
5669 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5670 __func__, slot_width, slots);
5671
5672 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5673 slots, slot_width);
5674 if (ret < 0) {
5675 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5676 __func__, ret);
5677 goto end;
5678 }
5679
5680 ret = snd_soc_dai_set_channel_map(cpu_dai,
5681 channels, slot_offset, 0, NULL);
5682 if (ret < 0) {
5683 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5684 __func__, ret);
5685 goto end;
5686 }
5687 } else {
5688 ret = -EINVAL;
5689 pr_err("%s: invalid use case, err:%d\n",
5690 __func__, ret);
5691 goto end;
5692 }
5693
5694 rate = params_rate(params);
5695 clk_freq = rate * slot_width * slots;
5696 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5697 if (ret < 0)
5698 pr_err("%s: failed to set tdm clk, err:%d\n",
5699 __func__, ret);
5700
5701end:
5702 return ret;
5703}
5704
5705static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5706{
5707 int ret = 0;
5708 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5709 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5710 struct snd_soc_card *card = rtd->card;
5711 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5712 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5713
5714 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5715 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5716 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5717 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5718 if (ret)
5719 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5720 __func__, ret);
5721 }
5722
5723 return ret;
5724}
5725
5726static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5727{
5728 int ret = 0;
5729 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5730 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5731 struct snd_soc_card *card = rtd->card;
5732 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5733 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5734
5735 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5736 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5737 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5738 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5739 if (ret)
5740 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5741 __func__, ret);
5742 }
5743}
5744
5745static struct snd_soc_ops sm6150_tdm_be_ops = {
5746 .hw_params = sm6150_tdm_snd_hw_params,
5747 .startup = sm6150_tdm_snd_startup,
5748 .shutdown = sm6150_tdm_snd_shutdown
5749};
5750
5751static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5752{
5753 cpumask_t mask;
5754
5755 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5756 pm_qos_remove_request(&substream->latency_pm_qos_req);
5757
5758 cpumask_clear(&mask);
5759 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5760 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5761 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5762
5763 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5764
5765 pm_qos_add_request(&substream->latency_pm_qos_req,
5766 PM_QOS_CPU_DMA_LATENCY,
5767 MSM_LL_QOS_VALUE);
5768 return 0;
5769}
5770
5771static struct snd_soc_ops msm_fe_qos_ops = {
5772 .prepare = msm_fe_qos_prepare,
5773};
5774
5775static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5776{
5777 int ret = 0;
5778 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5779 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5780 int index = cpu_dai->id;
5781 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5782 struct snd_soc_card *card = rtd->card;
5783 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5784 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5785 int ret_pinctrl = 0;
5786
5787 dev_dbg(rtd->card->dev,
5788 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5789 __func__, substream->name, substream->stream,
5790 cpu_dai->name, cpu_dai->id);
5791
5792 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5793 ret = -EINVAL;
5794 dev_err(rtd->card->dev,
5795 "%s: CPU DAI id (%d) out of range\n",
5796 __func__, cpu_dai->id);
5797 goto err;
5798 }
5799 /*
5800 * Mutex protection in case the same MI2S
5801 * interface using for both TX and RX so
5802 * that the same clock won't be enable twice.
5803 */
5804 mutex_lock(&mi2s_intf_conf[index].lock);
5805 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5806 /* Check if msm needs to provide the clock to the interface */
5807 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5808 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5809 fmt = SND_SOC_DAIFMT_CBM_CFM;
5810 }
5811 ret = msm_mi2s_set_sclk(substream, true);
5812 if (ret < 0) {
5813 dev_err(rtd->card->dev,
5814 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5815 __func__, ret);
5816 goto clean_up;
5817 }
5818
5819 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5820 if (ret < 0) {
5821 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5822 __func__, index, ret);
5823 goto clk_off;
5824 }
5825 if (index == QUAT_MI2S) {
5826 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5827 STATE_MI2S_ACTIVE);
5828 if (ret_pinctrl)
5829 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5830 __func__, ret_pinctrl);
5831 }
5832 }
5833clk_off:
5834 if (ret < 0)
5835 msm_mi2s_set_sclk(substream, false);
5836clean_up:
5837 if (ret < 0)
5838 mi2s_intf_conf[index].ref_cnt--;
5839 mutex_unlock(&mi2s_intf_conf[index].lock);
5840err:
5841 return ret;
5842}
5843
5844static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5845{
5846 int ret;
5847 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5848 int index = rtd->cpu_dai->id;
5849 struct snd_soc_card *card = rtd->card;
5850 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5851 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5852 int ret_pinctrl = 0;
5853
5854 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5855 substream->name, substream->stream);
5856 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5857 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5858 return;
5859 }
5860
5861 mutex_lock(&mi2s_intf_conf[index].lock);
5862 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5863 ret = msm_mi2s_set_sclk(substream, false);
5864 if (ret < 0)
5865 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5866 __func__, index, ret);
5867 if (index == QUAT_MI2S) {
5868 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5869 STATE_DISABLE);
5870 if (ret_pinctrl)
5871 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5872 __func__, ret_pinctrl);
5873 }
5874 }
5875 mutex_unlock(&mi2s_intf_conf[index].lock);
5876}
5877
5878static struct snd_soc_ops msm_mi2s_be_ops = {
5879 .startup = msm_mi2s_snd_startup,
5880 .shutdown = msm_mi2s_snd_shutdown,
5881};
5882
5883static struct snd_soc_ops msm_cdc_dma_be_ops = {
5884 .hw_params = msm_snd_cdc_dma_hw_params,
5885};
5886
5887static struct snd_soc_ops msm_be_ops = {
5888 .hw_params = msm_snd_hw_params,
5889};
5890
5891static struct snd_soc_ops msm_slimbus_2_be_ops = {
5892 .hw_params = msm_slimbus_2_hw_params,
5893};
5894
5895static struct snd_soc_ops msm_wcn_ops = {
5896 .hw_params = msm_wcn_hw_params,
5897};
5898
5899
5900/* Digital audio interface glue - connects codec <---> CPU */
5901static struct snd_soc_dai_link msm_common_dai_links[] = {
5902 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305903 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305904 .name = MSM_DAILINK_NAME(Media1),
5905 .stream_name = "MultiMedia1",
5906 .cpu_dai_name = "MultiMedia1",
5907 .platform_name = "msm-pcm-dsp.0",
5908 .dynamic = 1,
5909 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5910 .dpcm_playback = 1,
5911 .dpcm_capture = 1,
5912 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5913 SND_SOC_DPCM_TRIGGER_POST},
5914 .codec_dai_name = "snd-soc-dummy-dai",
5915 .codec_name = "snd-soc-dummy",
5916 .ignore_suspend = 1,
5917 /* this dainlink has playback support */
5918 .ignore_pmdown_time = 1,
5919 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5920 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305921 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305922 .name = MSM_DAILINK_NAME(Media2),
5923 .stream_name = "MultiMedia2",
5924 .cpu_dai_name = "MultiMedia2",
5925 .platform_name = "msm-pcm-dsp.0",
5926 .dynamic = 1,
5927 .dpcm_playback = 1,
5928 .dpcm_capture = 1,
5929 .codec_dai_name = "snd-soc-dummy-dai",
5930 .codec_name = "snd-soc-dummy",
5931 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5932 SND_SOC_DPCM_TRIGGER_POST},
5933 .ignore_suspend = 1,
5934 /* this dainlink has playback support */
5935 .ignore_pmdown_time = 1,
5936 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5937 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305938 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305939 .name = "VoiceMMode1",
5940 .stream_name = "VoiceMMode1",
5941 .cpu_dai_name = "VoiceMMode1",
5942 .platform_name = "msm-pcm-voice",
5943 .dynamic = 1,
5944 .dpcm_playback = 1,
5945 .dpcm_capture = 1,
5946 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5947 SND_SOC_DPCM_TRIGGER_POST},
5948 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5949 .ignore_suspend = 1,
5950 .ignore_pmdown_time = 1,
5951 .codec_dai_name = "snd-soc-dummy-dai",
5952 .codec_name = "snd-soc-dummy",
5953 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5954 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305955 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305956 .name = "MSM VoIP",
5957 .stream_name = "VoIP",
5958 .cpu_dai_name = "VoIP",
5959 .platform_name = "msm-voip-dsp",
5960 .dynamic = 1,
5961 .dpcm_playback = 1,
5962 .dpcm_capture = 1,
5963 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5964 SND_SOC_DPCM_TRIGGER_POST},
5965 .codec_dai_name = "snd-soc-dummy-dai",
5966 .codec_name = "snd-soc-dummy",
5967 .ignore_suspend = 1,
5968 /* this dainlink has playback support */
5969 .ignore_pmdown_time = 1,
5970 .id = MSM_FRONTEND_DAI_VOIP,
5971 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305972 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305973 .name = MSM_DAILINK_NAME(ULL),
5974 .stream_name = "MultiMedia3",
5975 .cpu_dai_name = "MultiMedia3",
5976 .platform_name = "msm-pcm-dsp.2",
5977 .dynamic = 1,
5978 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5979 .dpcm_playback = 1,
5980 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5981 SND_SOC_DPCM_TRIGGER_POST},
5982 .codec_dai_name = "snd-soc-dummy-dai",
5983 .codec_name = "snd-soc-dummy",
5984 .ignore_suspend = 1,
5985 /* this dainlink has playback support */
5986 .ignore_pmdown_time = 1,
5987 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5988 },
5989 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305990 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305991 .name = "SLIMBUS_0 Hostless",
5992 .stream_name = "SLIMBUS_0 Hostless",
5993 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5994 .platform_name = "msm-pcm-hostless",
5995 .dynamic = 1,
5996 .dpcm_playback = 1,
5997 .dpcm_capture = 1,
5998 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5999 SND_SOC_DPCM_TRIGGER_POST},
6000 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6001 .ignore_suspend = 1,
6002 /* this dailink has playback support */
6003 .ignore_pmdown_time = 1,
6004 .codec_dai_name = "snd-soc-dummy-dai",
6005 .codec_name = "snd-soc-dummy",
6006 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306007 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306008 .name = "MSM AFE-PCM RX",
6009 .stream_name = "AFE-PROXY RX",
6010 .cpu_dai_name = "msm-dai-q6-dev.241",
6011 .codec_name = "msm-stub-codec.1",
6012 .codec_dai_name = "msm-stub-rx",
6013 .platform_name = "msm-pcm-afe",
6014 .dpcm_playback = 1,
6015 .ignore_suspend = 1,
6016 /* this dainlink has playback support */
6017 .ignore_pmdown_time = 1,
6018 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306019 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306020 .name = "MSM AFE-PCM TX",
6021 .stream_name = "AFE-PROXY TX",
6022 .cpu_dai_name = "msm-dai-q6-dev.240",
6023 .codec_name = "msm-stub-codec.1",
6024 .codec_dai_name = "msm-stub-tx",
6025 .platform_name = "msm-pcm-afe",
6026 .dpcm_capture = 1,
6027 .ignore_suspend = 1,
6028 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306029 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306030 .name = MSM_DAILINK_NAME(Compress1),
6031 .stream_name = "Compress1",
6032 .cpu_dai_name = "MultiMedia4",
6033 .platform_name = "msm-compress-dsp",
6034 .dynamic = 1,
6035 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
6036 .dpcm_playback = 1,
6037 .dpcm_capture = 1,
6038 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6039 SND_SOC_DPCM_TRIGGER_POST},
6040 .codec_dai_name = "snd-soc-dummy-dai",
6041 .codec_name = "snd-soc-dummy",
6042 .ignore_suspend = 1,
6043 .ignore_pmdown_time = 1,
6044 /* this dainlink has playback support */
6045 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
6046 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306047 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306048 .name = "AUXPCM Hostless",
6049 .stream_name = "AUXPCM Hostless",
6050 .cpu_dai_name = "AUXPCM_HOSTLESS",
6051 .platform_name = "msm-pcm-hostless",
6052 .dynamic = 1,
6053 .dpcm_playback = 1,
6054 .dpcm_capture = 1,
6055 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6056 SND_SOC_DPCM_TRIGGER_POST},
6057 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6058 .ignore_suspend = 1,
6059 /* this dainlink has playback support */
6060 .ignore_pmdown_time = 1,
6061 .codec_dai_name = "snd-soc-dummy-dai",
6062 .codec_name = "snd-soc-dummy",
6063 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306064 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306065 .name = "SLIMBUS_1 Hostless",
6066 .stream_name = "SLIMBUS_1 Hostless",
6067 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6068 .platform_name = "msm-pcm-hostless",
6069 .dynamic = 1,
6070 .dpcm_playback = 1,
6071 .dpcm_capture = 1,
6072 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6073 SND_SOC_DPCM_TRIGGER_POST},
6074 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6075 .ignore_suspend = 1,
6076 /* this dailink has playback support */
6077 .ignore_pmdown_time = 1,
6078 .codec_dai_name = "snd-soc-dummy-dai",
6079 .codec_name = "snd-soc-dummy",
6080 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306081 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306082 .name = "SLIMBUS_3 Hostless",
6083 .stream_name = "SLIMBUS_3 Hostless",
6084 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6085 .platform_name = "msm-pcm-hostless",
6086 .dynamic = 1,
6087 .dpcm_playback = 1,
6088 .dpcm_capture = 1,
6089 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6090 SND_SOC_DPCM_TRIGGER_POST},
6091 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6092 .ignore_suspend = 1,
6093 /* this dailink has playback support */
6094 .ignore_pmdown_time = 1,
6095 .codec_dai_name = "snd-soc-dummy-dai",
6096 .codec_name = "snd-soc-dummy",
6097 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306098 {/* hw:x,12 */
6099 .name = "SLIMBUS_7 Hostless",
6100 .stream_name = "SLIMBUS_7 Hostless",
6101 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306102 .platform_name = "msm-pcm-hostless",
6103 .dynamic = 1,
6104 .dpcm_playback = 1,
6105 .dpcm_capture = 1,
6106 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6107 SND_SOC_DPCM_TRIGGER_POST},
6108 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6109 .ignore_suspend = 1,
6110 /* this dailink has playback support */
6111 .ignore_pmdown_time = 1,
6112 .codec_dai_name = "snd-soc-dummy-dai",
6113 .codec_name = "snd-soc-dummy",
6114 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306115 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306116 .name = MSM_DAILINK_NAME(LowLatency),
6117 .stream_name = "MultiMedia5",
6118 .cpu_dai_name = "MultiMedia5",
6119 .platform_name = "msm-pcm-dsp.1",
6120 .dynamic = 1,
6121 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6122 .dpcm_playback = 1,
6123 .dpcm_capture = 1,
6124 .codec_dai_name = "snd-soc-dummy-dai",
6125 .codec_name = "snd-soc-dummy",
6126 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6127 SND_SOC_DPCM_TRIGGER_POST},
6128 .ignore_suspend = 1,
6129 /* this dainlink has playback support */
6130 .ignore_pmdown_time = 1,
6131 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6132 .ops = &msm_fe_qos_ops,
6133 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306134 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306135 .name = "Listen 1 Audio Service",
6136 .stream_name = "Listen 1 Audio Service",
6137 .cpu_dai_name = "LSM1",
6138 .platform_name = "msm-lsm-client",
6139 .dynamic = 1,
6140 .dpcm_capture = 1,
6141 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6142 SND_SOC_DPCM_TRIGGER_POST },
6143 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6144 .ignore_suspend = 1,
6145 .codec_dai_name = "snd-soc-dummy-dai",
6146 .codec_name = "snd-soc-dummy",
6147 .id = MSM_FRONTEND_DAI_LSM1,
6148 },
6149 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306150 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306151 .name = MSM_DAILINK_NAME(Compress2),
6152 .stream_name = "Compress2",
6153 .cpu_dai_name = "MultiMedia7",
6154 .platform_name = "msm-compress-dsp",
6155 .dynamic = 1,
6156 .dpcm_playback = 1,
6157 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6158 SND_SOC_DPCM_TRIGGER_POST},
6159 .codec_dai_name = "snd-soc-dummy-dai",
6160 .codec_name = "snd-soc-dummy",
6161 .ignore_suspend = 1,
6162 .ignore_pmdown_time = 1,
6163 /* this dainlink has playback support */
6164 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6165 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306166 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306167 .name = MSM_DAILINK_NAME(MultiMedia10),
6168 .stream_name = "MultiMedia10",
6169 .cpu_dai_name = "MultiMedia10",
6170 .platform_name = "msm-pcm-dsp.1",
6171 .dynamic = 1,
6172 .dpcm_playback = 1,
6173 .dpcm_capture = 1,
6174 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6175 SND_SOC_DPCM_TRIGGER_POST},
6176 .codec_dai_name = "snd-soc-dummy-dai",
6177 .codec_name = "snd-soc-dummy",
6178 .ignore_suspend = 1,
6179 .ignore_pmdown_time = 1,
6180 /* this dainlink has playback support */
6181 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6182 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306183 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306184 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6185 .stream_name = "MM_NOIRQ",
6186 .cpu_dai_name = "MultiMedia8",
6187 .platform_name = "msm-pcm-dsp-noirq",
6188 .dynamic = 1,
6189 .dpcm_playback = 1,
6190 .dpcm_capture = 1,
6191 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6192 SND_SOC_DPCM_TRIGGER_POST},
6193 .codec_dai_name = "snd-soc-dummy-dai",
6194 .codec_name = "snd-soc-dummy",
6195 .ignore_suspend = 1,
6196 .ignore_pmdown_time = 1,
6197 /* this dainlink has playback support */
6198 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6199 .ops = &msm_fe_qos_ops,
6200 },
6201 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306202 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306203 .name = "HDMI_RX_HOSTLESS",
6204 .stream_name = "HDMI_RX_HOSTLESS",
6205 .cpu_dai_name = "HDMI_HOSTLESS",
6206 .platform_name = "msm-pcm-hostless",
6207 .dynamic = 1,
6208 .dpcm_playback = 1,
6209 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6210 SND_SOC_DPCM_TRIGGER_POST},
6211 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6212 .ignore_suspend = 1,
6213 .ignore_pmdown_time = 1,
6214 .codec_dai_name = "snd-soc-dummy-dai",
6215 .codec_name = "snd-soc-dummy",
6216 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306217 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306218 .name = "VoiceMMode2",
6219 .stream_name = "VoiceMMode2",
6220 .cpu_dai_name = "VoiceMMode2",
6221 .platform_name = "msm-pcm-voice",
6222 .dynamic = 1,
6223 .dpcm_playback = 1,
6224 .dpcm_capture = 1,
6225 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6226 SND_SOC_DPCM_TRIGGER_POST},
6227 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6228 .ignore_suspend = 1,
6229 .ignore_pmdown_time = 1,
6230 .codec_dai_name = "snd-soc-dummy-dai",
6231 .codec_name = "snd-soc-dummy",
6232 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6233 },
6234 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306235 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306236 .name = "Listen 2 Audio Service",
6237 .stream_name = "Listen 2 Audio Service",
6238 .cpu_dai_name = "LSM2",
6239 .platform_name = "msm-lsm-client",
6240 .dynamic = 1,
6241 .dpcm_capture = 1,
6242 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6243 SND_SOC_DPCM_TRIGGER_POST },
6244 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6245 .ignore_suspend = 1,
6246 .codec_dai_name = "snd-soc-dummy-dai",
6247 .codec_name = "snd-soc-dummy",
6248 .id = MSM_FRONTEND_DAI_LSM2,
6249 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306250 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306251 .name = "Listen 3 Audio Service",
6252 .stream_name = "Listen 3 Audio Service",
6253 .cpu_dai_name = "LSM3",
6254 .platform_name = "msm-lsm-client",
6255 .dynamic = 1,
6256 .dpcm_capture = 1,
6257 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6258 SND_SOC_DPCM_TRIGGER_POST },
6259 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6260 .ignore_suspend = 1,
6261 .codec_dai_name = "snd-soc-dummy-dai",
6262 .codec_name = "snd-soc-dummy",
6263 .id = MSM_FRONTEND_DAI_LSM3,
6264 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306265 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306266 .name = "Listen 4 Audio Service",
6267 .stream_name = "Listen 4 Audio Service",
6268 .cpu_dai_name = "LSM4",
6269 .platform_name = "msm-lsm-client",
6270 .dynamic = 1,
6271 .dpcm_capture = 1,
6272 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6273 SND_SOC_DPCM_TRIGGER_POST },
6274 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6275 .ignore_suspend = 1,
6276 .codec_dai_name = "snd-soc-dummy-dai",
6277 .codec_name = "snd-soc-dummy",
6278 .id = MSM_FRONTEND_DAI_LSM4,
6279 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306280 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306281 .name = "Listen 5 Audio Service",
6282 .stream_name = "Listen 5 Audio Service",
6283 .cpu_dai_name = "LSM5",
6284 .platform_name = "msm-lsm-client",
6285 .dynamic = 1,
6286 .dpcm_capture = 1,
6287 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6288 SND_SOC_DPCM_TRIGGER_POST },
6289 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6290 .ignore_suspend = 1,
6291 .codec_dai_name = "snd-soc-dummy-dai",
6292 .codec_name = "snd-soc-dummy",
6293 .id = MSM_FRONTEND_DAI_LSM5,
6294 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306295 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306296 .name = "Listen 6 Audio Service",
6297 .stream_name = "Listen 6 Audio Service",
6298 .cpu_dai_name = "LSM6",
6299 .platform_name = "msm-lsm-client",
6300 .dynamic = 1,
6301 .dpcm_capture = 1,
6302 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6303 SND_SOC_DPCM_TRIGGER_POST },
6304 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6305 .ignore_suspend = 1,
6306 .codec_dai_name = "snd-soc-dummy-dai",
6307 .codec_name = "snd-soc-dummy",
6308 .id = MSM_FRONTEND_DAI_LSM6,
6309 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306310 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306311 .name = "Listen 7 Audio Service",
6312 .stream_name = "Listen 7 Audio Service",
6313 .cpu_dai_name = "LSM7",
6314 .platform_name = "msm-lsm-client",
6315 .dynamic = 1,
6316 .dpcm_capture = 1,
6317 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6318 SND_SOC_DPCM_TRIGGER_POST },
6319 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6320 .ignore_suspend = 1,
6321 .codec_dai_name = "snd-soc-dummy-dai",
6322 .codec_name = "snd-soc-dummy",
6323 .id = MSM_FRONTEND_DAI_LSM7,
6324 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306325 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306326 .name = "Listen 8 Audio Service",
6327 .stream_name = "Listen 8 Audio Service",
6328 .cpu_dai_name = "LSM8",
6329 .platform_name = "msm-lsm-client",
6330 .dynamic = 1,
6331 .dpcm_capture = 1,
6332 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6333 SND_SOC_DPCM_TRIGGER_POST },
6334 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6335 .ignore_suspend = 1,
6336 .codec_dai_name = "snd-soc-dummy-dai",
6337 .codec_name = "snd-soc-dummy",
6338 .id = MSM_FRONTEND_DAI_LSM8,
6339 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306340 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306341 .name = MSM_DAILINK_NAME(Media9),
6342 .stream_name = "MultiMedia9",
6343 .cpu_dai_name = "MultiMedia9",
6344 .platform_name = "msm-pcm-dsp.0",
6345 .dynamic = 1,
6346 .dpcm_playback = 1,
6347 .dpcm_capture = 1,
6348 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6349 SND_SOC_DPCM_TRIGGER_POST},
6350 .codec_dai_name = "snd-soc-dummy-dai",
6351 .codec_name = "snd-soc-dummy",
6352 .ignore_suspend = 1,
6353 /* this dainlink has playback support */
6354 .ignore_pmdown_time = 1,
6355 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6356 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306357 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306358 .name = MSM_DAILINK_NAME(Compress4),
6359 .stream_name = "Compress4",
6360 .cpu_dai_name = "MultiMedia11",
6361 .platform_name = "msm-compress-dsp",
6362 .dynamic = 1,
6363 .dpcm_playback = 1,
6364 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6365 SND_SOC_DPCM_TRIGGER_POST},
6366 .codec_dai_name = "snd-soc-dummy-dai",
6367 .codec_name = "snd-soc-dummy",
6368 .ignore_suspend = 1,
6369 .ignore_pmdown_time = 1,
6370 /* this dainlink has playback support */
6371 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6372 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306373 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306374 .name = MSM_DAILINK_NAME(Compress5),
6375 .stream_name = "Compress5",
6376 .cpu_dai_name = "MultiMedia12",
6377 .platform_name = "msm-compress-dsp",
6378 .dynamic = 1,
6379 .dpcm_playback = 1,
6380 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6381 SND_SOC_DPCM_TRIGGER_POST},
6382 .codec_dai_name = "snd-soc-dummy-dai",
6383 .codec_name = "snd-soc-dummy",
6384 .ignore_suspend = 1,
6385 .ignore_pmdown_time = 1,
6386 /* this dainlink has playback support */
6387 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6388 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306389 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306390 .name = MSM_DAILINK_NAME(Compress6),
6391 .stream_name = "Compress6",
6392 .cpu_dai_name = "MultiMedia13",
6393 .platform_name = "msm-compress-dsp",
6394 .dynamic = 1,
6395 .dpcm_playback = 1,
6396 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6397 SND_SOC_DPCM_TRIGGER_POST},
6398 .codec_dai_name = "snd-soc-dummy-dai",
6399 .codec_name = "snd-soc-dummy",
6400 .ignore_suspend = 1,
6401 .ignore_pmdown_time = 1,
6402 /* this dainlink has playback support */
6403 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6404 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306405 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306406 .name = MSM_DAILINK_NAME(Compress7),
6407 .stream_name = "Compress7",
6408 .cpu_dai_name = "MultiMedia14",
6409 .platform_name = "msm-compress-dsp",
6410 .dynamic = 1,
6411 .dpcm_playback = 1,
6412 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6413 SND_SOC_DPCM_TRIGGER_POST},
6414 .codec_dai_name = "snd-soc-dummy-dai",
6415 .codec_name = "snd-soc-dummy",
6416 .ignore_suspend = 1,
6417 .ignore_pmdown_time = 1,
6418 /* this dainlink has playback support */
6419 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6420 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306421 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306422 .name = MSM_DAILINK_NAME(Compress8),
6423 .stream_name = "Compress8",
6424 .cpu_dai_name = "MultiMedia15",
6425 .platform_name = "msm-compress-dsp",
6426 .dynamic = 1,
6427 .dpcm_playback = 1,
6428 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6429 SND_SOC_DPCM_TRIGGER_POST},
6430 .codec_dai_name = "snd-soc-dummy-dai",
6431 .codec_name = "snd-soc-dummy",
6432 .ignore_suspend = 1,
6433 .ignore_pmdown_time = 1,
6434 /* this dainlink has playback support */
6435 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6436 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306437 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306438 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6439 .stream_name = "MM_NOIRQ_2",
6440 .cpu_dai_name = "MultiMedia16",
6441 .platform_name = "msm-pcm-dsp-noirq",
6442 .dynamic = 1,
6443 .dpcm_playback = 1,
6444 .dpcm_capture = 1,
6445 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6446 SND_SOC_DPCM_TRIGGER_POST},
6447 .codec_dai_name = "snd-soc-dummy-dai",
6448 .codec_name = "snd-soc-dummy",
6449 .ignore_suspend = 1,
6450 .ignore_pmdown_time = 1,
6451 /* this dainlink has playback support */
6452 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6453 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306454 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306455 .name = "SLIMBUS_8 Hostless",
6456 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6457 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6458 .platform_name = "msm-pcm-hostless",
6459 .dynamic = 1,
6460 .dpcm_capture = 1,
6461 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6462 SND_SOC_DPCM_TRIGGER_POST},
6463 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6464 .ignore_suspend = 1,
6465 .codec_dai_name = "snd-soc-dummy-dai",
6466 .codec_name = "snd-soc-dummy",
6467 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306468 {/* hw:x,35 */
6469 .name = "CDC_DMA Hostless",
6470 .stream_name = "CDC_DMA Hostless",
6471 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6472 .platform_name = "msm-pcm-hostless",
6473 .dynamic = 1,
6474 .dpcm_playback = 1,
6475 .dpcm_capture = 1,
6476 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6477 SND_SOC_DPCM_TRIGGER_POST},
6478 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6479 .ignore_suspend = 1,
6480 /* this dailink has playback support */
6481 .ignore_pmdown_time = 1,
6482 .codec_dai_name = "snd-soc-dummy-dai",
6483 .codec_name = "snd-soc-dummy",
6484 },
6485 {/* hw:x,36 */
6486 .name = "TX3_CDC_DMA Hostless",
6487 .stream_name = "TX3_CDC_DMA Hostless",
6488 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6489 .platform_name = "msm-pcm-hostless",
6490 .dynamic = 1,
6491 .dpcm_capture = 1,
6492 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6493 SND_SOC_DPCM_TRIGGER_POST},
6494 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6495 .ignore_suspend = 1,
6496 .codec_dai_name = "snd-soc-dummy-dai",
6497 .codec_name = "snd-soc-dummy",
6498 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306499};
6500
6501
6502static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306503 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306504 .name = LPASS_BE_SLIMBUS_4_TX,
6505 .stream_name = "Slimbus4 Capture",
6506 .cpu_dai_name = "msm-dai-q6-dev.16393",
6507 .platform_name = "msm-pcm-hostless",
6508 .codec_name = "tavil_codec",
6509 .codec_dai_name = "tavil_vifeedback",
6510 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6511 .be_hw_params_fixup = msm_be_hw_params_fixup,
6512 .ops = &msm_be_ops,
6513 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6514 .ignore_suspend = 1,
6515 },
6516 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306517 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306518 .name = "SLIMBUS_2 Hostless Playback",
6519 .stream_name = "SLIMBUS_2 Hostless Playback",
6520 .cpu_dai_name = "msm-dai-q6-dev.16388",
6521 .platform_name = "msm-pcm-hostless",
6522 .codec_name = "tavil_codec",
6523 .codec_dai_name = "tavil_rx2",
6524 .ignore_suspend = 1,
6525 .ignore_pmdown_time = 1,
6526 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6527 .ops = &msm_slimbus_2_be_ops,
6528 },
6529 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306530 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306531 .name = "SLIMBUS_2 Hostless Capture",
6532 .stream_name = "SLIMBUS_2 Hostless Capture",
6533 .cpu_dai_name = "msm-dai-q6-dev.16389",
6534 .platform_name = "msm-pcm-hostless",
6535 .codec_name = "tavil_codec",
6536 .codec_dai_name = "tavil_tx2",
6537 .ignore_suspend = 1,
6538 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6539 .ops = &msm_slimbus_2_be_ops,
6540 },
6541};
6542
6543static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306544 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306545 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6546 .stream_name = "WSA CDC DMA0 Capture",
6547 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6548 .platform_name = "msm-pcm-hostless",
6549 .codec_name = "bolero_codec",
6550 .codec_dai_name = "wsa_macro_vifeedback",
6551 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6552 .be_hw_params_fixup = msm_be_hw_params_fixup,
6553 .ignore_suspend = 1,
6554 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6555 .ops = &msm_cdc_dma_be_ops,
6556 },
6557};
6558
6559static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6560 {
6561 .name = MSM_DAILINK_NAME(ASM Loopback),
6562 .stream_name = "MultiMedia6",
6563 .cpu_dai_name = "MultiMedia6",
6564 .platform_name = "msm-pcm-loopback",
6565 .dynamic = 1,
6566 .dpcm_playback = 1,
6567 .dpcm_capture = 1,
6568 .codec_dai_name = "snd-soc-dummy-dai",
6569 .codec_name = "snd-soc-dummy",
6570 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6571 SND_SOC_DPCM_TRIGGER_POST},
6572 .ignore_suspend = 1,
6573 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6574 .ignore_pmdown_time = 1,
6575 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6576 },
6577 {
6578 .name = "USB Audio Hostless",
6579 .stream_name = "USB Audio Hostless",
6580 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6581 .platform_name = "msm-pcm-hostless",
6582 .dynamic = 1,
6583 .dpcm_playback = 1,
6584 .dpcm_capture = 1,
6585 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6586 SND_SOC_DPCM_TRIGGER_POST},
6587 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6588 .ignore_suspend = 1,
6589 .ignore_pmdown_time = 1,
6590 .codec_dai_name = "snd-soc-dummy-dai",
6591 .codec_name = "snd-soc-dummy",
6592 },
6593};
6594
6595static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6596 /* Backend AFE DAI Links */
6597 {
6598 .name = LPASS_BE_AFE_PCM_RX,
6599 .stream_name = "AFE Playback",
6600 .cpu_dai_name = "msm-dai-q6-dev.224",
6601 .platform_name = "msm-pcm-routing",
6602 .codec_name = "msm-stub-codec.1",
6603 .codec_dai_name = "msm-stub-rx",
6604 .no_pcm = 1,
6605 .dpcm_playback = 1,
6606 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6607 .be_hw_params_fixup = msm_be_hw_params_fixup,
6608 /* this dainlink has playback support */
6609 .ignore_pmdown_time = 1,
6610 .ignore_suspend = 1,
6611 },
6612 {
6613 .name = LPASS_BE_AFE_PCM_TX,
6614 .stream_name = "AFE Capture",
6615 .cpu_dai_name = "msm-dai-q6-dev.225",
6616 .platform_name = "msm-pcm-routing",
6617 .codec_name = "msm-stub-codec.1",
6618 .codec_dai_name = "msm-stub-tx",
6619 .no_pcm = 1,
6620 .dpcm_capture = 1,
6621 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6622 .be_hw_params_fixup = msm_be_hw_params_fixup,
6623 .ignore_suspend = 1,
6624 },
6625 /* Incall Record Uplink BACK END DAI Link */
6626 {
6627 .name = LPASS_BE_INCALL_RECORD_TX,
6628 .stream_name = "Voice Uplink Capture",
6629 .cpu_dai_name = "msm-dai-q6-dev.32772",
6630 .platform_name = "msm-pcm-routing",
6631 .codec_name = "msm-stub-codec.1",
6632 .codec_dai_name = "msm-stub-tx",
6633 .no_pcm = 1,
6634 .dpcm_capture = 1,
6635 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6636 .be_hw_params_fixup = msm_be_hw_params_fixup,
6637 .ignore_suspend = 1,
6638 },
6639 /* Incall Record Downlink BACK END DAI Link */
6640 {
6641 .name = LPASS_BE_INCALL_RECORD_RX,
6642 .stream_name = "Voice Downlink Capture",
6643 .cpu_dai_name = "msm-dai-q6-dev.32771",
6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "msm-stub-codec.1",
6646 .codec_dai_name = "msm-stub-tx",
6647 .no_pcm = 1,
6648 .dpcm_capture = 1,
6649 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .ignore_suspend = 1,
6652 },
6653 /* Incall Music BACK END DAI Link */
6654 {
6655 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6656 .stream_name = "Voice Farend Playback",
6657 .cpu_dai_name = "msm-dai-q6-dev.32773",
6658 .platform_name = "msm-pcm-routing",
6659 .codec_name = "msm-stub-codec.1",
6660 .codec_dai_name = "msm-stub-rx",
6661 .no_pcm = 1,
6662 .dpcm_playback = 1,
6663 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
6665 .ignore_suspend = 1,
6666 .ignore_pmdown_time = 1,
6667 },
6668 /* Incall Music 2 BACK END DAI Link */
6669 {
6670 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6671 .stream_name = "Voice2 Farend Playback",
6672 .cpu_dai_name = "msm-dai-q6-dev.32770",
6673 .platform_name = "msm-pcm-routing",
6674 .codec_name = "msm-stub-codec.1",
6675 .codec_dai_name = "msm-stub-rx",
6676 .no_pcm = 1,
6677 .dpcm_playback = 1,
6678 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6679 .be_hw_params_fixup = msm_be_hw_params_fixup,
6680 .ignore_suspend = 1,
6681 .ignore_pmdown_time = 1,
6682 },
6683 {
6684 .name = LPASS_BE_USB_AUDIO_RX,
6685 .stream_name = "USB Audio Playback",
6686 .cpu_dai_name = "msm-dai-q6-dev.28672",
6687 .platform_name = "msm-pcm-routing",
6688 .codec_name = "msm-stub-codec.1",
6689 .codec_dai_name = "msm-stub-rx",
6690 .no_pcm = 1,
6691 .dpcm_playback = 1,
6692 .id = MSM_BACKEND_DAI_USB_RX,
6693 .be_hw_params_fixup = msm_be_hw_params_fixup,
6694 .ignore_pmdown_time = 1,
6695 .ignore_suspend = 1,
6696 },
6697 {
6698 .name = LPASS_BE_USB_AUDIO_TX,
6699 .stream_name = "USB Audio Capture",
6700 .cpu_dai_name = "msm-dai-q6-dev.28673",
6701 .platform_name = "msm-pcm-routing",
6702 .codec_name = "msm-stub-codec.1",
6703 .codec_dai_name = "msm-stub-tx",
6704 .no_pcm = 1,
6705 .dpcm_capture = 1,
6706 .id = MSM_BACKEND_DAI_USB_TX,
6707 .be_hw_params_fixup = msm_be_hw_params_fixup,
6708 .ignore_suspend = 1,
6709 },
6710 {
6711 .name = LPASS_BE_PRI_TDM_RX_0,
6712 .stream_name = "Primary TDM0 Playback",
6713 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6714 .platform_name = "msm-pcm-routing",
6715 .codec_name = "msm-stub-codec.1",
6716 .codec_dai_name = "msm-stub-rx",
6717 .no_pcm = 1,
6718 .dpcm_playback = 1,
6719 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6720 .be_hw_params_fixup = msm_be_hw_params_fixup,
6721 .ops = &sm6150_tdm_be_ops,
6722 .ignore_suspend = 1,
6723 .ignore_pmdown_time = 1,
6724 },
6725 {
6726 .name = LPASS_BE_PRI_TDM_TX_0,
6727 .stream_name = "Primary TDM0 Capture",
6728 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6729 .platform_name = "msm-pcm-routing",
6730 .codec_name = "msm-stub-codec.1",
6731 .codec_dai_name = "msm-stub-tx",
6732 .no_pcm = 1,
6733 .dpcm_capture = 1,
6734 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6735 .be_hw_params_fixup = msm_be_hw_params_fixup,
6736 .ops = &sm6150_tdm_be_ops,
6737 .ignore_suspend = 1,
6738 },
6739 {
6740 .name = LPASS_BE_SEC_TDM_RX_0,
6741 .stream_name = "Secondary TDM0 Playback",
6742 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6743 .platform_name = "msm-pcm-routing",
6744 .codec_name = "msm-stub-codec.1",
6745 .codec_dai_name = "msm-stub-rx",
6746 .no_pcm = 1,
6747 .dpcm_playback = 1,
6748 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6749 .be_hw_params_fixup = msm_be_hw_params_fixup,
6750 .ops = &sm6150_tdm_be_ops,
6751 .ignore_suspend = 1,
6752 .ignore_pmdown_time = 1,
6753 },
6754 {
6755 .name = LPASS_BE_SEC_TDM_TX_0,
6756 .stream_name = "Secondary TDM0 Capture",
6757 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6758 .platform_name = "msm-pcm-routing",
6759 .codec_name = "msm-stub-codec.1",
6760 .codec_dai_name = "msm-stub-tx",
6761 .no_pcm = 1,
6762 .dpcm_capture = 1,
6763 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6764 .be_hw_params_fixup = msm_be_hw_params_fixup,
6765 .ops = &sm6150_tdm_be_ops,
6766 .ignore_suspend = 1,
6767 },
6768 {
6769 .name = LPASS_BE_TERT_TDM_RX_0,
6770 .stream_name = "Tertiary TDM0 Playback",
6771 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6772 .platform_name = "msm-pcm-routing",
6773 .codec_name = "msm-stub-codec.1",
6774 .codec_dai_name = "msm-stub-rx",
6775 .no_pcm = 1,
6776 .dpcm_playback = 1,
6777 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6778 .be_hw_params_fixup = msm_be_hw_params_fixup,
6779 .ops = &sm6150_tdm_be_ops,
6780 .ignore_suspend = 1,
6781 .ignore_pmdown_time = 1,
6782 },
6783 {
6784 .name = LPASS_BE_TERT_TDM_TX_0,
6785 .stream_name = "Tertiary TDM0 Capture",
6786 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6787 .platform_name = "msm-pcm-routing",
6788 .codec_name = "msm-stub-codec.1",
6789 .codec_dai_name = "msm-stub-tx",
6790 .no_pcm = 1,
6791 .dpcm_capture = 1,
6792 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6793 .be_hw_params_fixup = msm_be_hw_params_fixup,
6794 .ops = &sm6150_tdm_be_ops,
6795 .ignore_suspend = 1,
6796 },
6797 {
6798 .name = LPASS_BE_QUAT_TDM_RX_0,
6799 .stream_name = "Quaternary TDM0 Playback",
6800 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6801 .platform_name = "msm-pcm-routing",
6802 .codec_name = "msm-stub-codec.1",
6803 .codec_dai_name = "msm-stub-rx",
6804 .no_pcm = 1,
6805 .dpcm_playback = 1,
6806 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6807 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6808 .ops = &sm6150_tdm_be_ops,
6809 .ignore_suspend = 1,
6810 .ignore_pmdown_time = 1,
6811 },
6812 {
6813 .name = LPASS_BE_QUAT_TDM_TX_0,
6814 .stream_name = "Quaternary TDM0 Capture",
6815 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6816 .platform_name = "msm-pcm-routing",
6817 .codec_name = "msm-stub-codec.1",
6818 .codec_dai_name = "msm-stub-tx",
6819 .no_pcm = 1,
6820 .dpcm_capture = 1,
6821 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6822 .be_hw_params_fixup = msm_be_hw_params_fixup,
6823 .ops = &sm6150_tdm_be_ops,
6824 .ignore_suspend = 1,
6825 },
6826};
6827
6828static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6829 {
6830 .name = LPASS_BE_SLIMBUS_0_RX,
6831 .stream_name = "Slimbus Playback",
6832 .cpu_dai_name = "msm-dai-q6-dev.16384",
6833 .platform_name = "msm-pcm-routing",
6834 .codec_name = "tavil_codec",
6835 .codec_dai_name = "tavil_rx1",
6836 .no_pcm = 1,
6837 .dpcm_playback = 1,
6838 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6839 .init = &msm_audrx_tavil_init,
6840 .be_hw_params_fixup = msm_be_hw_params_fixup,
6841 /* this dainlink has playback support */
6842 .ignore_pmdown_time = 1,
6843 .ignore_suspend = 1,
6844 .ops = &msm_be_ops,
6845 },
6846 {
6847 .name = LPASS_BE_SLIMBUS_0_TX,
6848 .stream_name = "Slimbus Capture",
6849 .cpu_dai_name = "msm-dai-q6-dev.16385",
6850 .platform_name = "msm-pcm-routing",
6851 .codec_name = "tavil_codec",
6852 .codec_dai_name = "tavil_tx1",
6853 .no_pcm = 1,
6854 .dpcm_capture = 1,
6855 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6856 .be_hw_params_fixup = msm_be_hw_params_fixup,
6857 .ignore_suspend = 1,
6858 .ops = &msm_be_ops,
6859 },
6860 {
6861 .name = LPASS_BE_SLIMBUS_1_RX,
6862 .stream_name = "Slimbus1 Playback",
6863 .cpu_dai_name = "msm-dai-q6-dev.16386",
6864 .platform_name = "msm-pcm-routing",
6865 .codec_name = "tavil_codec",
6866 .codec_dai_name = "tavil_rx1",
6867 .no_pcm = 1,
6868 .dpcm_playback = 1,
6869 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6870 .be_hw_params_fixup = msm_be_hw_params_fixup,
6871 .ops = &msm_be_ops,
6872 /* dai link has playback support */
6873 .ignore_pmdown_time = 1,
6874 .ignore_suspend = 1,
6875 },
6876 {
6877 .name = LPASS_BE_SLIMBUS_1_TX,
6878 .stream_name = "Slimbus1 Capture",
6879 .cpu_dai_name = "msm-dai-q6-dev.16387",
6880 .platform_name = "msm-pcm-routing",
6881 .codec_name = "tavil_codec",
6882 .codec_dai_name = "tavil_tx3",
6883 .no_pcm = 1,
6884 .dpcm_capture = 1,
6885 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6886 .be_hw_params_fixup = msm_be_hw_params_fixup,
6887 .ops = &msm_be_ops,
6888 .ignore_suspend = 1,
6889 },
6890 {
6891 .name = LPASS_BE_SLIMBUS_2_RX,
6892 .stream_name = "Slimbus2 Playback",
6893 .cpu_dai_name = "msm-dai-q6-dev.16388",
6894 .platform_name = "msm-pcm-routing",
6895 .codec_name = "tavil_codec",
6896 .codec_dai_name = "tavil_rx2",
6897 .no_pcm = 1,
6898 .dpcm_playback = 1,
6899 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6900 .be_hw_params_fixup = msm_be_hw_params_fixup,
6901 .ops = &msm_be_ops,
6902 .ignore_pmdown_time = 1,
6903 .ignore_suspend = 1,
6904 },
6905 {
6906 .name = LPASS_BE_SLIMBUS_3_RX,
6907 .stream_name = "Slimbus3 Playback",
6908 .cpu_dai_name = "msm-dai-q6-dev.16390",
6909 .platform_name = "msm-pcm-routing",
6910 .codec_name = "tavil_codec",
6911 .codec_dai_name = "tavil_rx1",
6912 .no_pcm = 1,
6913 .dpcm_playback = 1,
6914 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6915 .be_hw_params_fixup = msm_be_hw_params_fixup,
6916 .ops = &msm_be_ops,
6917 /* dai link has playback support */
6918 .ignore_pmdown_time = 1,
6919 .ignore_suspend = 1,
6920 },
6921 {
6922 .name = LPASS_BE_SLIMBUS_3_TX,
6923 .stream_name = "Slimbus3 Capture",
6924 .cpu_dai_name = "msm-dai-q6-dev.16391",
6925 .platform_name = "msm-pcm-routing",
6926 .codec_name = "tavil_codec",
6927 .codec_dai_name = "tavil_tx1",
6928 .no_pcm = 1,
6929 .dpcm_capture = 1,
6930 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6931 .be_hw_params_fixup = msm_be_hw_params_fixup,
6932 .ops = &msm_be_ops,
6933 .ignore_suspend = 1,
6934 },
6935 {
6936 .name = LPASS_BE_SLIMBUS_4_RX,
6937 .stream_name = "Slimbus4 Playback",
6938 .cpu_dai_name = "msm-dai-q6-dev.16392",
6939 .platform_name = "msm-pcm-routing",
6940 .codec_name = "tavil_codec",
6941 .codec_dai_name = "tavil_rx1",
6942 .no_pcm = 1,
6943 .dpcm_playback = 1,
6944 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6945 .be_hw_params_fixup = msm_be_hw_params_fixup,
6946 .ops = &msm_be_ops,
6947 /* dai link has playback support */
6948 .ignore_pmdown_time = 1,
6949 .ignore_suspend = 1,
6950 },
6951 {
6952 .name = LPASS_BE_SLIMBUS_5_RX,
6953 .stream_name = "Slimbus5 Playback",
6954 .cpu_dai_name = "msm-dai-q6-dev.16394",
6955 .platform_name = "msm-pcm-routing",
6956 .codec_name = "tavil_codec",
6957 .codec_dai_name = "tavil_rx3",
6958 .no_pcm = 1,
6959 .dpcm_playback = 1,
6960 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6961 .be_hw_params_fixup = msm_be_hw_params_fixup,
6962 .ops = &msm_be_ops,
6963 /* dai link has playback support */
6964 .ignore_pmdown_time = 1,
6965 .ignore_suspend = 1,
6966 },
6967 /* MAD BE */
6968 {
6969 .name = LPASS_BE_SLIMBUS_5_TX,
6970 .stream_name = "Slimbus5 Capture",
6971 .cpu_dai_name = "msm-dai-q6-dev.16395",
6972 .platform_name = "msm-pcm-routing",
6973 .codec_name = "tavil_codec",
6974 .codec_dai_name = "tavil_mad1",
6975 .no_pcm = 1,
6976 .dpcm_capture = 1,
6977 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6978 .be_hw_params_fixup = msm_be_hw_params_fixup,
6979 .ops = &msm_be_ops,
6980 .ignore_suspend = 1,
6981 },
6982 {
6983 .name = LPASS_BE_SLIMBUS_6_RX,
6984 .stream_name = "Slimbus6 Playback",
6985 .cpu_dai_name = "msm-dai-q6-dev.16396",
6986 .platform_name = "msm-pcm-routing",
6987 .codec_name = "tavil_codec",
6988 .codec_dai_name = "tavil_rx4",
6989 .no_pcm = 1,
6990 .dpcm_playback = 1,
6991 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6992 .be_hw_params_fixup = msm_be_hw_params_fixup,
6993 .ops = &msm_be_ops,
6994 /* dai link has playback support */
6995 .ignore_pmdown_time = 1,
6996 .ignore_suspend = 1,
6997 },
6998 /* Slimbus VI Recording */
6999 {
7000 .name = LPASS_BE_SLIMBUS_TX_VI,
7001 .stream_name = "Slimbus4 Capture",
7002 .cpu_dai_name = "msm-dai-q6-dev.16393",
7003 .platform_name = "msm-pcm-routing",
7004 .codec_name = "tavil_codec",
7005 .codec_dai_name = "tavil_vifeedback",
7006 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
7007 .be_hw_params_fixup = msm_be_hw_params_fixup,
7008 .ops = &msm_be_ops,
7009 .ignore_suspend = 1,
7010 .no_pcm = 1,
7011 .dpcm_capture = 1,
7012 },
7013};
7014
7015static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
7016 {
7017 .name = LPASS_BE_SLIMBUS_7_RX,
7018 .stream_name = "Slimbus7 Playback",
7019 .cpu_dai_name = "msm-dai-q6-dev.16398",
7020 .platform_name = "msm-pcm-routing",
7021 .codec_name = "btfmslim_slave",
7022 /* BT codec driver determines capabilities based on
7023 * dai name, bt codecdai name should always contains
7024 * supported usecase information
7025 */
7026 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
7027 .no_pcm = 1,
7028 .dpcm_playback = 1,
7029 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
7030 .be_hw_params_fixup = msm_be_hw_params_fixup,
7031 .ops = &msm_wcn_ops,
7032 /* dai link has playback support */
7033 .ignore_pmdown_time = 1,
7034 .ignore_suspend = 1,
7035 },
7036 {
7037 .name = LPASS_BE_SLIMBUS_7_TX,
7038 .stream_name = "Slimbus7 Capture",
7039 .cpu_dai_name = "msm-dai-q6-dev.16399",
7040 .platform_name = "msm-pcm-routing",
7041 .codec_name = "btfmslim_slave",
7042 .codec_dai_name = "btfm_bt_sco_slim_tx",
7043 .no_pcm = 1,
7044 .dpcm_capture = 1,
7045 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
7046 .be_hw_params_fixup = msm_be_hw_params_fixup,
7047 .ops = &msm_wcn_ops,
7048 .ignore_suspend = 1,
7049 },
7050 {
7051 .name = LPASS_BE_SLIMBUS_8_TX,
7052 .stream_name = "Slimbus8 Capture",
7053 .cpu_dai_name = "msm-dai-q6-dev.16401",
7054 .platform_name = "msm-pcm-routing",
7055 .codec_name = "btfmslim_slave",
7056 .codec_dai_name = "btfm_fm_slim_tx",
7057 .no_pcm = 1,
7058 .dpcm_capture = 1,
7059 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7060 .be_hw_params_fixup = msm_be_hw_params_fixup,
7061 .init = &msm_wcn_init,
7062 .ops = &msm_wcn_ops,
7063 .ignore_suspend = 1,
7064 },
7065};
7066
7067static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7068 /* DISP PORT BACK END DAI Link */
7069 {
7070 .name = LPASS_BE_DISPLAY_PORT,
7071 .stream_name = "Display Port Playback",
7072 .cpu_dai_name = "msm-dai-q6-dp.24608",
7073 .platform_name = "msm-pcm-routing",
7074 .codec_name = "msm-ext-disp-audio-codec-rx",
7075 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7076 .no_pcm = 1,
7077 .dpcm_playback = 1,
7078 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7079 .be_hw_params_fixup = msm_be_hw_params_fixup,
7080 .ignore_pmdown_time = 1,
7081 .ignore_suspend = 1,
7082 },
7083};
7084
7085static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7086 {
7087 .name = LPASS_BE_PRI_MI2S_RX,
7088 .stream_name = "Primary MI2S Playback",
7089 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7090 .platform_name = "msm-pcm-routing",
7091 .codec_name = "msm-stub-codec.1",
7092 .codec_dai_name = "msm-stub-rx",
7093 .no_pcm = 1,
7094 .dpcm_playback = 1,
7095 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7096 .be_hw_params_fixup = msm_be_hw_params_fixup,
7097 .ops = &msm_mi2s_be_ops,
7098 .ignore_suspend = 1,
7099 .ignore_pmdown_time = 1,
7100 },
7101 {
7102 .name = LPASS_BE_PRI_MI2S_TX,
7103 .stream_name = "Primary MI2S Capture",
7104 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7105 .platform_name = "msm-pcm-routing",
7106 .codec_name = "msm-stub-codec.1",
7107 .codec_dai_name = "msm-stub-tx",
7108 .no_pcm = 1,
7109 .dpcm_capture = 1,
7110 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7111 .be_hw_params_fixup = msm_be_hw_params_fixup,
7112 .ops = &msm_mi2s_be_ops,
7113 .ignore_suspend = 1,
7114 },
7115 {
7116 .name = LPASS_BE_SEC_MI2S_RX,
7117 .stream_name = "Secondary MI2S Playback",
7118 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7119 .platform_name = "msm-pcm-routing",
7120 .codec_name = "msm-stub-codec.1",
7121 .codec_dai_name = "msm-stub-rx",
7122 .no_pcm = 1,
7123 .dpcm_playback = 1,
7124 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7125 .be_hw_params_fixup = msm_be_hw_params_fixup,
7126 .ops = &msm_mi2s_be_ops,
7127 .ignore_suspend = 1,
7128 .ignore_pmdown_time = 1,
7129 },
7130 {
7131 .name = LPASS_BE_SEC_MI2S_TX,
7132 .stream_name = "Secondary MI2S Capture",
7133 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7134 .platform_name = "msm-pcm-routing",
7135 .codec_name = "msm-stub-codec.1",
7136 .codec_dai_name = "msm-stub-tx",
7137 .no_pcm = 1,
7138 .dpcm_capture = 1,
7139 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7140 .be_hw_params_fixup = msm_be_hw_params_fixup,
7141 .ops = &msm_mi2s_be_ops,
7142 .ignore_suspend = 1,
7143 },
7144 {
7145 .name = LPASS_BE_TERT_MI2S_RX,
7146 .stream_name = "Tertiary MI2S Playback",
7147 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7148 .platform_name = "msm-pcm-routing",
7149 .codec_name = "msm-stub-codec.1",
7150 .codec_dai_name = "msm-stub-rx",
7151 .no_pcm = 1,
7152 .dpcm_playback = 1,
7153 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7154 .be_hw_params_fixup = msm_be_hw_params_fixup,
7155 .ops = &msm_mi2s_be_ops,
7156 .ignore_suspend = 1,
7157 .ignore_pmdown_time = 1,
7158 },
7159 {
7160 .name = LPASS_BE_TERT_MI2S_TX,
7161 .stream_name = "Tertiary MI2S Capture",
7162 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7163 .platform_name = "msm-pcm-routing",
7164 .codec_name = "msm-stub-codec.1",
7165 .codec_dai_name = "msm-stub-tx",
7166 .no_pcm = 1,
7167 .dpcm_capture = 1,
7168 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7169 .be_hw_params_fixup = msm_be_hw_params_fixup,
7170 .ops = &msm_mi2s_be_ops,
7171 .ignore_suspend = 1,
7172 },
7173 {
7174 .name = LPASS_BE_QUAT_MI2S_RX,
7175 .stream_name = "Quaternary MI2S Playback",
7176 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7177 .platform_name = "msm-pcm-routing",
7178 .codec_name = "msm-stub-codec.1",
7179 .codec_dai_name = "msm-stub-rx",
7180 .no_pcm = 1,
7181 .dpcm_playback = 1,
7182 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7183 .be_hw_params_fixup = msm_be_hw_params_fixup,
7184 .ops = &msm_mi2s_be_ops,
7185 .ignore_suspend = 1,
7186 .ignore_pmdown_time = 1,
7187 },
7188 {
7189 .name = LPASS_BE_QUAT_MI2S_TX,
7190 .stream_name = "Quaternary MI2S Capture",
7191 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7192 .platform_name = "msm-pcm-routing",
7193 .codec_name = "msm-stub-codec.1",
7194 .codec_dai_name = "msm-stub-tx",
7195 .no_pcm = 1,
7196 .dpcm_capture = 1,
7197 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7198 .be_hw_params_fixup = msm_be_hw_params_fixup,
7199 .ops = &msm_mi2s_be_ops,
7200 .ignore_suspend = 1,
7201 },
7202 {
7203 .name = LPASS_BE_QUIN_MI2S_RX,
7204 .stream_name = "Quinary MI2S Playback",
7205 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7206 .platform_name = "msm-pcm-routing",
7207 .codec_name = "msm-stub-codec.1",
7208 .codec_dai_name = "msm-stub-rx",
7209 .no_pcm = 1,
7210 .dpcm_playback = 1,
7211 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7212 .be_hw_params_fixup = msm_be_hw_params_fixup,
7213 .ops = &msm_mi2s_be_ops,
7214 .ignore_suspend = 1,
7215 .ignore_pmdown_time = 1,
7216 },
7217 {
7218 .name = LPASS_BE_QUIN_MI2S_TX,
7219 .stream_name = "Quinary MI2S Capture",
7220 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7221 .platform_name = "msm-pcm-routing",
7222 .codec_name = "msm-stub-codec.1",
7223 .codec_dai_name = "msm-stub-tx",
7224 .no_pcm = 1,
7225 .dpcm_capture = 1,
7226 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7227 .be_hw_params_fixup = msm_be_hw_params_fixup,
7228 .ops = &msm_mi2s_be_ops,
7229 .ignore_suspend = 1,
7230 },
7231
7232};
7233
7234static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7235 /* Primary AUX PCM Backend DAI Links */
7236 {
7237 .name = LPASS_BE_AUXPCM_RX,
7238 .stream_name = "AUX PCM Playback",
7239 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7240 .platform_name = "msm-pcm-routing",
7241 .codec_name = "msm-stub-codec.1",
7242 .codec_dai_name = "msm-stub-rx",
7243 .no_pcm = 1,
7244 .dpcm_playback = 1,
7245 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7246 .be_hw_params_fixup = msm_be_hw_params_fixup,
7247 .ignore_pmdown_time = 1,
7248 .ignore_suspend = 1,
7249 },
7250 {
7251 .name = LPASS_BE_AUXPCM_TX,
7252 .stream_name = "AUX PCM Capture",
7253 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7254 .platform_name = "msm-pcm-routing",
7255 .codec_name = "msm-stub-codec.1",
7256 .codec_dai_name = "msm-stub-tx",
7257 .no_pcm = 1,
7258 .dpcm_capture = 1,
7259 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7260 .be_hw_params_fixup = msm_be_hw_params_fixup,
7261 .ignore_suspend = 1,
7262 },
7263 /* Secondary AUX PCM Backend DAI Links */
7264 {
7265 .name = LPASS_BE_SEC_AUXPCM_RX,
7266 .stream_name = "Sec AUX PCM Playback",
7267 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7268 .platform_name = "msm-pcm-routing",
7269 .codec_name = "msm-stub-codec.1",
7270 .codec_dai_name = "msm-stub-rx",
7271 .no_pcm = 1,
7272 .dpcm_playback = 1,
7273 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7274 .be_hw_params_fixup = msm_be_hw_params_fixup,
7275 .ignore_pmdown_time = 1,
7276 .ignore_suspend = 1,
7277 },
7278 {
7279 .name = LPASS_BE_SEC_AUXPCM_TX,
7280 .stream_name = "Sec AUX PCM Capture",
7281 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7282 .platform_name = "msm-pcm-routing",
7283 .codec_name = "msm-stub-codec.1",
7284 .codec_dai_name = "msm-stub-tx",
7285 .no_pcm = 1,
7286 .dpcm_capture = 1,
7287 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7288 .be_hw_params_fixup = msm_be_hw_params_fixup,
7289 .ignore_suspend = 1,
7290 },
7291 /* Tertiary AUX PCM Backend DAI Links */
7292 {
7293 .name = LPASS_BE_TERT_AUXPCM_RX,
7294 .stream_name = "Tert AUX PCM Playback",
7295 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7296 .platform_name = "msm-pcm-routing",
7297 .codec_name = "msm-stub-codec.1",
7298 .codec_dai_name = "msm-stub-rx",
7299 .no_pcm = 1,
7300 .dpcm_playback = 1,
7301 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7302 .be_hw_params_fixup = msm_be_hw_params_fixup,
7303 .ignore_suspend = 1,
7304 },
7305 {
7306 .name = LPASS_BE_TERT_AUXPCM_TX,
7307 .stream_name = "Tert AUX PCM Capture",
7308 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7309 .platform_name = "msm-pcm-routing",
7310 .codec_name = "msm-stub-codec.1",
7311 .codec_dai_name = "msm-stub-tx",
7312 .no_pcm = 1,
7313 .dpcm_capture = 1,
7314 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7315 .be_hw_params_fixup = msm_be_hw_params_fixup,
7316 .ignore_suspend = 1,
7317 },
7318 /* Quaternary AUX PCM Backend DAI Links */
7319 {
7320 .name = LPASS_BE_QUAT_AUXPCM_RX,
7321 .stream_name = "Quat AUX PCM Playback",
7322 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7323 .platform_name = "msm-pcm-routing",
7324 .codec_name = "msm-stub-codec.1",
7325 .codec_dai_name = "msm-stub-rx",
7326 .no_pcm = 1,
7327 .dpcm_playback = 1,
7328 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7329 .be_hw_params_fixup = msm_be_hw_params_fixup,
7330 .ignore_pmdown_time = 1,
7331 .ignore_suspend = 1,
7332 },
7333 {
7334 .name = LPASS_BE_QUAT_AUXPCM_TX,
7335 .stream_name = "Quat AUX PCM Capture",
7336 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7337 .platform_name = "msm-pcm-routing",
7338 .codec_name = "msm-stub-codec.1",
7339 .codec_dai_name = "msm-stub-tx",
7340 .no_pcm = 1,
7341 .dpcm_capture = 1,
7342 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7343 .be_hw_params_fixup = msm_be_hw_params_fixup,
7344 .ignore_suspend = 1,
7345 },
7346 /* Quinary AUX PCM Backend DAI Links */
7347 {
7348 .name = LPASS_BE_QUIN_AUXPCM_RX,
7349 .stream_name = "Quin AUX PCM Playback",
7350 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7351 .platform_name = "msm-pcm-routing",
7352 .codec_name = "msm-stub-codec.1",
7353 .codec_dai_name = "msm-stub-rx",
7354 .no_pcm = 1,
7355 .dpcm_playback = 1,
7356 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7357 .be_hw_params_fixup = msm_be_hw_params_fixup,
7358 .ignore_pmdown_time = 1,
7359 .ignore_suspend = 1,
7360 },
7361 {
7362 .name = LPASS_BE_QUIN_AUXPCM_TX,
7363 .stream_name = "Quin AUX PCM Capture",
7364 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7365 .platform_name = "msm-pcm-routing",
7366 .codec_name = "msm-stub-codec.1",
7367 .codec_dai_name = "msm-stub-tx",
7368 .no_pcm = 1,
7369 .dpcm_capture = 1,
7370 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7371 .be_hw_params_fixup = msm_be_hw_params_fixup,
7372 .ignore_suspend = 1,
7373 },
7374};
7375
7376static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7377 /* WSA CDC DMA Backend DAI Links */
7378 {
7379 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7380 .stream_name = "WSA CDC DMA0 Playback",
7381 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7382 .platform_name = "msm-pcm-routing",
7383 .codec_name = "bolero_codec",
7384 .codec_dai_name = "wsa_macro_rx1",
7385 .no_pcm = 1,
7386 .dpcm_playback = 1,
7387 .init = &msm_int_audrx_init,
7388 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7389 .be_hw_params_fixup = msm_be_hw_params_fixup,
7390 .ignore_pmdown_time = 1,
7391 .ignore_suspend = 1,
7392 .ops = &msm_cdc_dma_be_ops,
7393 },
7394 {
7395 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7396 .stream_name = "WSA CDC DMA1 Playback",
7397 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7398 .platform_name = "msm-pcm-routing",
7399 .codec_name = "bolero_codec",
7400 .codec_dai_name = "wsa_macro_rx_mix",
7401 .no_pcm = 1,
7402 .dpcm_playback = 1,
7403 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7404 .be_hw_params_fixup = msm_be_hw_params_fixup,
7405 .ignore_pmdown_time = 1,
7406 .ignore_suspend = 1,
7407 .ops = &msm_cdc_dma_be_ops,
7408 },
7409 {
7410 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7411 .stream_name = "WSA CDC DMA1 Capture",
7412 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7413 .platform_name = "msm-pcm-routing",
7414 .codec_name = "bolero_codec",
7415 .codec_dai_name = "wsa_macro_echo",
7416 .no_pcm = 1,
7417 .dpcm_capture = 1,
7418 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7419 .be_hw_params_fixup = msm_be_hw_params_fixup,
7420 .ignore_suspend = 1,
7421 .ops = &msm_cdc_dma_be_ops,
7422 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307423};
7424
7425static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7426 /* RX CDC DMA Backend DAI Links */
7427 {
7428 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7429 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307430 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307431 .platform_name = "msm-pcm-routing",
7432 .codec_name = "bolero_codec",
7433 .codec_dai_name = "rx_macro_rx1",
7434 .no_pcm = 1,
7435 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307436 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7437 .be_hw_params_fixup = msm_be_hw_params_fixup,
7438 .ignore_pmdown_time = 1,
7439 .ignore_suspend = 1,
7440 .ops = &msm_cdc_dma_be_ops,
7441 },
7442 {
7443 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7444 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307445 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307446 .platform_name = "msm-pcm-routing",
7447 .codec_name = "bolero_codec",
7448 .codec_dai_name = "rx_macro_rx2",
7449 .no_pcm = 1,
7450 .dpcm_playback = 1,
7451 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7452 .be_hw_params_fixup = msm_be_hw_params_fixup,
7453 .ignore_pmdown_time = 1,
7454 .ignore_suspend = 1,
7455 .ops = &msm_cdc_dma_be_ops,
7456 },
7457 {
7458 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7459 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307460 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307461 .platform_name = "msm-pcm-routing",
7462 .codec_name = "bolero_codec",
7463 .codec_dai_name = "rx_macro_rx3",
7464 .no_pcm = 1,
7465 .dpcm_playback = 1,
7466 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7467 .be_hw_params_fixup = msm_be_hw_params_fixup,
7468 .ignore_pmdown_time = 1,
7469 .ignore_suspend = 1,
7470 .ops = &msm_cdc_dma_be_ops,
7471 },
7472 {
7473 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7474 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307475 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307476 .platform_name = "msm-pcm-routing",
7477 .codec_name = "bolero_codec",
7478 .codec_dai_name = "rx_macro_rx4",
7479 .no_pcm = 1,
7480 .dpcm_playback = 1,
7481 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7482 .be_hw_params_fixup = msm_be_hw_params_fixup,
7483 .ignore_pmdown_time = 1,
7484 .ignore_suspend = 1,
7485 .ops = &msm_cdc_dma_be_ops,
7486 },
7487 /* TX CDC DMA Backend DAI Links */
7488 {
7489 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7490 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307491 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307492 .platform_name = "msm-pcm-routing",
7493 .codec_name = "bolero_codec",
7494 .codec_dai_name = "tx_macro_tx1",
7495 .no_pcm = 1,
7496 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307497 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7498 .be_hw_params_fixup = msm_be_hw_params_fixup,
7499 .ignore_suspend = 1,
7500 .ops = &msm_cdc_dma_be_ops,
7501 },
7502 {
7503 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7504 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307505 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307506 .platform_name = "msm-pcm-routing",
7507 .codec_name = "bolero_codec",
7508 .codec_dai_name = "tx_macro_tx2",
7509 .no_pcm = 1,
7510 .dpcm_capture = 1,
7511 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7512 .be_hw_params_fixup = msm_be_hw_params_fixup,
7513 .ignore_suspend = 1,
7514 .ops = &msm_cdc_dma_be_ops,
7515 },
7516};
7517
7518static struct snd_soc_dai_link msm_sm6150_dai_links[
7519 ARRAY_SIZE(msm_common_dai_links) +
7520 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7521 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7522 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7523 ARRAY_SIZE(msm_common_be_dai_links) +
7524 ARRAY_SIZE(msm_tavil_be_dai_links) +
7525 ARRAY_SIZE(msm_wcn_be_dai_links) +
7526 ARRAY_SIZE(ext_disp_be_dai_link) +
7527 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7528 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7529 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7530 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7531
7532static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7533{
7534 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7535 struct snd_soc_pcm_runtime *rtd;
7536 int ret = 0;
7537 void *mbhc_calibration;
7538
7539 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7540 if (!rtd) {
7541 dev_err(card->dev,
7542 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7543 __func__, be_dl_name);
7544 ret = -EINVAL;
7545 goto err_pcm_runtime;
7546 }
7547
7548 mbhc_calibration = def_wcd_mbhc_cal();
7549 if (!mbhc_calibration) {
7550 ret = -ENOMEM;
7551 goto err_mbhc_cal;
7552 }
7553 wcd_mbhc_cfg.calibration = mbhc_calibration;
7554 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7555 if (ret) {
7556 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7557 __func__, ret);
7558 goto err_hs_detect;
7559 }
7560 return 0;
7561
7562err_hs_detect:
7563 kfree(mbhc_calibration);
7564err_mbhc_cal:
7565err_pcm_runtime:
7566 return ret;
7567}
7568
7569
7570static int msm_populate_dai_link_component_of_node(
7571 struct snd_soc_card *card)
7572{
7573 int i, index, ret = 0;
7574 struct device *cdev = card->dev;
7575 struct snd_soc_dai_link *dai_link = card->dai_link;
7576 struct device_node *np;
7577
7578 if (!cdev) {
7579 pr_err("%s: Sound card device memory NULL\n", __func__);
7580 return -ENODEV;
7581 }
7582
7583 for (i = 0; i < card->num_links; i++) {
7584 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7585 continue;
7586
7587 /* populate platform_of_node for snd card dai links */
7588 if (dai_link[i].platform_name &&
7589 !dai_link[i].platform_of_node) {
7590 index = of_property_match_string(cdev->of_node,
7591 "asoc-platform-names",
7592 dai_link[i].platform_name);
7593 if (index < 0) {
7594 pr_err("%s: No match found for platform name: %s\n",
7595 __func__, dai_link[i].platform_name);
7596 ret = index;
7597 goto err;
7598 }
7599 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7600 index);
7601 if (!np) {
7602 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7603 __func__, dai_link[i].platform_name,
7604 index);
7605 ret = -ENODEV;
7606 goto err;
7607 }
7608 dai_link[i].platform_of_node = np;
7609 dai_link[i].platform_name = NULL;
7610 }
7611
7612 /* populate cpu_of_node for snd card dai links */
7613 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7614 index = of_property_match_string(cdev->of_node,
7615 "asoc-cpu-names",
7616 dai_link[i].cpu_dai_name);
7617 if (index >= 0) {
7618 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7619 index);
7620 if (!np) {
7621 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7622 __func__,
7623 dai_link[i].cpu_dai_name);
7624 ret = -ENODEV;
7625 goto err;
7626 }
7627 dai_link[i].cpu_of_node = np;
7628 dai_link[i].cpu_dai_name = NULL;
7629 }
7630 }
7631
7632 /* populate codec_of_node for snd card dai links */
7633 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7634 index = of_property_match_string(cdev->of_node,
7635 "asoc-codec-names",
7636 dai_link[i].codec_name);
7637 if (index < 0)
7638 continue;
7639 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7640 index);
7641 if (!np) {
7642 pr_err("%s: retrieving phandle for codec %s failed\n",
7643 __func__, dai_link[i].codec_name);
7644 ret = -ENODEV;
7645 goto err;
7646 }
7647 dai_link[i].codec_of_node = np;
7648 dai_link[i].codec_name = NULL;
7649 }
7650 }
7651
7652err:
7653 return ret;
7654}
7655
7656static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7657{
7658 int ret = 0;
7659 struct snd_soc_codec *codec = rtd->codec;
7660
7661 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7662 ARRAY_SIZE(msm_tavil_snd_controls));
7663 if (ret < 0) {
7664 dev_err(codec->dev,
7665 "%s: add_codec_controls failed, err = %d\n",
7666 __func__, ret);
7667 return ret;
7668 }
7669
7670 return 0;
7671}
7672
7673static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7674 struct snd_pcm_hw_params *params)
7675{
7676 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7677 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7678
7679 int ret = 0;
7680 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7681 151};
7682 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7683 134, 135, 136, 137, 138, 139,
7684 140, 141, 142, 143};
7685
7686 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7687 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7688 slim_rx_cfg[SLIM_RX_0].channels,
7689 rx_ch);
7690 if (ret < 0)
7691 pr_err("%s: RX failed to set cpu chan map error %d\n",
7692 __func__, ret);
7693 } else {
7694 ret = snd_soc_dai_set_channel_map(cpu_dai,
7695 slim_tx_cfg[SLIM_TX_0].channels,
7696 tx_ch, 0, 0);
7697 if (ret < 0)
7698 pr_err("%s: TX failed to set cpu chan map error %d\n",
7699 __func__, ret);
7700 }
7701
7702 return ret;
7703}
7704
7705static struct snd_soc_ops msm_stub_be_ops = {
7706 .hw_params = msm_snd_stub_hw_params,
7707};
7708
7709static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7710
7711 /* FrontEnd DAI Links */
7712 {
7713 .name = "MSMSTUB Media1",
7714 .stream_name = "MultiMedia1",
7715 .cpu_dai_name = "MultiMedia1",
7716 .platform_name = "msm-pcm-dsp.0",
7717 .dynamic = 1,
7718 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7719 .dpcm_playback = 1,
7720 .dpcm_capture = 1,
7721 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7722 SND_SOC_DPCM_TRIGGER_POST},
7723 .codec_dai_name = "snd-soc-dummy-dai",
7724 .codec_name = "snd-soc-dummy",
7725 .ignore_suspend = 1,
7726 /* this dainlink has playback support */
7727 .ignore_pmdown_time = 1,
7728 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7729 },
7730};
7731
7732static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7733
7734 /* Backend DAI Links */
7735 {
7736 .name = LPASS_BE_SLIMBUS_0_RX,
7737 .stream_name = "Slimbus Playback",
7738 .cpu_dai_name = "msm-dai-q6-dev.16384",
7739 .platform_name = "msm-pcm-routing",
7740 .codec_name = "msm-stub-codec.1",
7741 .codec_dai_name = "msm-stub-rx",
7742 .no_pcm = 1,
7743 .dpcm_playback = 1,
7744 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7745 .init = &msm_audrx_stub_init,
7746 .be_hw_params_fixup = msm_be_hw_params_fixup,
7747 .ignore_pmdown_time = 1, /* dai link has playback support */
7748 .ignore_suspend = 1,
7749 .ops = &msm_stub_be_ops,
7750 },
7751 {
7752 .name = LPASS_BE_SLIMBUS_0_TX,
7753 .stream_name = "Slimbus Capture",
7754 .cpu_dai_name = "msm-dai-q6-dev.16385",
7755 .platform_name = "msm-pcm-routing",
7756 .codec_name = "msm-stub-codec.1",
7757 .codec_dai_name = "msm-stub-tx",
7758 .no_pcm = 1,
7759 .dpcm_capture = 1,
7760 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7761 .be_hw_params_fixup = msm_be_hw_params_fixup,
7762 .ignore_suspend = 1,
7763 .ops = &msm_stub_be_ops,
7764 },
7765};
7766
7767static struct snd_soc_dai_link msm_stub_dai_links[
7768 ARRAY_SIZE(msm_stub_fe_dai_links) +
7769 ARRAY_SIZE(msm_stub_be_dai_links)];
7770
7771struct snd_soc_card snd_soc_card_stub_msm = {
7772 .name = "sm6150-stub-snd-card",
7773};
7774
7775static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7776 { .compatible = "qcom,sm6150-asoc-snd",
7777 .data = "codec"},
7778 { .compatible = "qcom,sm6150-asoc-snd-stub",
7779 .data = "stub_codec"},
7780 {},
7781};
7782
7783static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7784{
7785 struct snd_soc_card *card = NULL;
7786 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307787 int total_links = 0, rc = 0;
7788 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7789 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7790 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307791 const struct of_device_id *match;
7792
7793 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7794 if (!match) {
7795 dev_err(dev, "%s: No DT match found for sound card\n",
7796 __func__);
7797 return NULL;
7798 }
7799
7800 if (!strcmp(match->data, "codec")) {
7801 card = &snd_soc_card_sm6150_msm;
7802 memcpy(msm_sm6150_dai_links + total_links,
7803 msm_common_dai_links,
7804 sizeof(msm_common_dai_links));
7805
7806 total_links += ARRAY_SIZE(msm_common_dai_links);
7807
7808 memcpy(msm_sm6150_dai_links + total_links,
7809 msm_common_misc_fe_dai_links,
7810 sizeof(msm_common_misc_fe_dai_links));
7811
7812 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7813
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307814 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7815 &tavil_codec);
7816 if (rc) {
7817 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307818 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307819 } else {
7820 if (tavil_codec) {
7821 card->late_probe =
7822 msm_snd_card_tavil_late_probe;
7823 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307824 msm_tavil_fe_dai_links,
7825 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307826 total_links +=
7827 ARRAY_SIZE(msm_tavil_fe_dai_links);
7828 }
7829 }
7830
7831 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307832 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307833 msm_bolero_fe_dai_links,
7834 sizeof(msm_bolero_fe_dai_links));
7835 total_links +=
7836 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307837 }
7838
7839 memcpy(msm_sm6150_dai_links + total_links,
7840 msm_common_be_dai_links,
7841 sizeof(msm_common_be_dai_links));
7842
7843 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7844
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307845 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307846 memcpy(msm_sm6150_dai_links + total_links,
7847 msm_tavil_be_dai_links,
7848 sizeof(msm_tavil_be_dai_links));
7849 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7850 } else {
7851 memcpy(msm_sm6150_dai_links + total_links,
7852 msm_wsa_cdc_dma_be_dai_links,
7853 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307854 total_links +=
7855 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307856
7857 memcpy(msm_sm6150_dai_links + total_links,
7858 msm_rx_tx_cdc_dma_be_dai_links,
7859 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7860 total_links +=
7861 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7862 }
7863
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307864 rc = of_property_read_u32(dev->of_node,
7865 "qcom,ext-disp-audio-rx",
7866 &ext_disp_audio_intf);
7867 if (rc) {
7868 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307869 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307870 } else {
7871 if (auxpcm_audio_intf) {
7872 memcpy(msm_sm6150_dai_links + total_links,
7873 ext_disp_be_dai_link,
7874 sizeof(ext_disp_be_dai_link));
7875 total_links +=
7876 ARRAY_SIZE(ext_disp_be_dai_link);
7877 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307878 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307879
7880 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7881 &mi2s_audio_intf);
7882 if (rc) {
7883 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7884 __func__);
7885 } else {
7886 if (mi2s_audio_intf) {
7887 memcpy(msm_sm6150_dai_links + total_links,
7888 msm_mi2s_be_dai_links,
7889 sizeof(msm_mi2s_be_dai_links));
7890 total_links +=
7891 ARRAY_SIZE(msm_mi2s_be_dai_links);
7892 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307893 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307894
7895
7896 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7897 &wcn_btfm_intf);
7898 if (rc) {
7899 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7900 __func__);
7901 } else {
7902 if (wcn_btfm_intf) {
7903 memcpy(msm_sm6150_dai_links + total_links,
7904 msm_wcn_be_dai_links,
7905 sizeof(msm_wcn_be_dai_links));
7906 total_links +=
7907 ARRAY_SIZE(msm_wcn_be_dai_links);
7908 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307909 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307910
7911 rc = of_property_read_u32(dev->of_node,
7912 "qcom,auxpcm-audio-intf",
7913 &auxpcm_audio_intf);
7914 if (rc) {
7915 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7916 __func__);
7917 } else {
7918 if (auxpcm_audio_intf) {
7919 memcpy(msm_sm6150_dai_links + total_links,
7920 msm_auxpcm_be_dai_links,
7921 sizeof(msm_auxpcm_be_dai_links));
7922 total_links +=
7923 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7924 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307925 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307926
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307927 dailink = msm_sm6150_dai_links;
7928 } else if (!strcmp(match->data, "stub_codec")) {
7929 card = &snd_soc_card_stub_msm;
7930
7931 memcpy(msm_stub_dai_links + total_links,
7932 msm_stub_fe_dai_links,
7933 sizeof(msm_stub_fe_dai_links));
7934 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7935
7936 memcpy(msm_stub_dai_links + total_links,
7937 msm_stub_be_dai_links,
7938 sizeof(msm_stub_be_dai_links));
7939 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7940
7941 dailink = msm_stub_dai_links;
7942 }
7943
7944 if (card) {
7945 card->dai_link = dailink;
7946 card->num_links = total_links;
7947 }
7948
7949 return card;
7950}
7951
7952static int msm_wsa881x_init(struct snd_soc_component *component)
7953{
7954 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7955 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7956 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7957 SPKR_L_BOOST, SPKR_L_VI};
7958 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7959 SPKR_R_BOOST, SPKR_R_VI};
7960 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7961 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7962 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7963 struct msm_asoc_mach_data *pdata;
7964 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307965 struct snd_card *card = component->card->snd_card;
7966 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307967 int ret = 0;
7968
7969 if (!codec) {
7970 pr_err("%s codec is NULL\n", __func__);
7971 return -EINVAL;
7972 }
7973
7974 dapm = snd_soc_codec_get_dapm(codec);
7975
7976 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7977 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7978 __func__, codec->component.name);
7979 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7980 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7981 &ch_rate[0], &spkleft_port_types[0]);
7982 if (dapm->component) {
7983 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7984 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7985 }
7986 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7987 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7988 __func__, codec->component.name);
7989 wsa881x_set_channel_map(codec, &spkright_ports[0],
7990 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7991 &ch_rate[0], &spkright_port_types[0]);
7992 if (dapm->component) {
7993 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7994 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7995 }
7996 } else {
7997 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7998 codec->component.name);
7999 ret = -EINVAL;
8000 goto err;
8001 }
8002 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05308003 if (!pdata->codec_root) {
8004 entry = snd_info_create_subdir(card->module, "codecs",
8005 card->proc_root);
8006 if (!entry) {
8007 pr_err("%s: Cannot create codecs module entry\n",
8008 __func__);
8009 ret = 0;
8010 goto err;
8011 }
8012 pdata->codec_root = entry;
8013 }
8014 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
8015 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308016err:
8017 return ret;
8018}
8019
8020static int msm_aux_codec_init(struct snd_soc_component *component)
8021{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308022 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
8023 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +05308024 int ret = 0;
8025 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05308026 struct snd_info_entry *entry;
8027 struct snd_card *card = component->card->snd_card;
8028 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308029
8030 snd_soc_dapm_ignore_suspend(dapm, "EAR");
8031 snd_soc_dapm_ignore_suspend(dapm, "AUX");
8032 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
8033 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
8034 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
8035 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
8036 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
8037 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
8038 snd_soc_dapm_sync(dapm);
8039
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05308040 pdata = snd_soc_card_get_drvdata(component->card);
8041 if (!pdata->codec_root) {
8042 entry = snd_info_create_subdir(card->module, "codecs",
8043 card->proc_root);
8044 if (!entry) {
8045 pr_err("%s: Cannot create codecs module entry\n",
8046 __func__);
8047 ret = 0;
8048 goto codec_root_err;
8049 }
8050 pdata->codec_root = entry;
8051 }
8052 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8053codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +05308054 mbhc_calibration = def_wcd_mbhc_cal();
8055 if (!mbhc_calibration) {
8056 return -ENOMEM;
8057 }
8058 wcd_mbhc_cfg.calibration = mbhc_calibration;
8059 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8060
8061 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308062}
8063
8064static int msm_init_aux_dev(struct platform_device *pdev,
8065 struct snd_soc_card *card)
8066{
8067 struct device_node *wsa_of_node;
8068 struct device_node *aux_codec_of_node;
8069 u32 wsa_max_devs;
8070 u32 wsa_dev_cnt;
8071 u32 codec_aux_dev_cnt = 0;
8072 int i;
8073 struct msm_wsa881x_dev_info *wsa881x_dev_info;
8074 struct aux_codec_dev_info *aux_cdc_dev_info;
8075 const char *auxdev_name_prefix[1];
8076 char *dev_name_str = NULL;
8077 int found = 0;
8078 int codecs_found = 0;
8079 int ret = 0;
8080
8081 /* Get maximum WSA device count for this platform */
8082 ret = of_property_read_u32(pdev->dev.of_node,
8083 "qcom,wsa-max-devs", &wsa_max_devs);
8084 if (ret) {
8085 dev_info(&pdev->dev,
8086 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8087 __func__, pdev->dev.of_node->full_name, ret);
8088 wsa_max_devs = 0;
8089 goto codec_aux_dev;
8090 }
8091 if (wsa_max_devs == 0) {
8092 dev_warn(&pdev->dev,
8093 "%s: Max WSA devices is 0 for this target?\n",
8094 __func__);
8095 goto codec_aux_dev;
8096 }
8097
8098 /* Get count of WSA device phandles for this platform */
8099 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8100 "qcom,wsa-devs", NULL);
8101 if (wsa_dev_cnt == -ENOENT) {
8102 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8103 __func__);
8104 goto err;
8105 } else if (wsa_dev_cnt <= 0) {
8106 dev_err(&pdev->dev,
8107 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8108 __func__, wsa_dev_cnt);
8109 ret = -EINVAL;
8110 goto err;
8111 }
8112
8113 /*
8114 * Expect total phandles count to be NOT less than maximum possible
8115 * WSA count. However, if it is less, then assign same value to
8116 * max count as well.
8117 */
8118 if (wsa_dev_cnt < wsa_max_devs) {
8119 dev_dbg(&pdev->dev,
8120 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8121 __func__, wsa_max_devs, wsa_dev_cnt);
8122 wsa_max_devs = wsa_dev_cnt;
8123 }
8124
8125 /* Make sure prefix string passed for each WSA device */
8126 ret = of_property_count_strings(pdev->dev.of_node,
8127 "qcom,wsa-aux-dev-prefix");
8128 if (ret != wsa_dev_cnt) {
8129 dev_err(&pdev->dev,
8130 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8131 __func__, wsa_dev_cnt, ret);
8132 ret = -EINVAL;
8133 goto err;
8134 }
8135
8136 /*
8137 * Alloc mem to store phandle and index info of WSA device, if already
8138 * registered with ALSA core
8139 */
8140 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8141 sizeof(struct msm_wsa881x_dev_info),
8142 GFP_KERNEL);
8143 if (!wsa881x_dev_info) {
8144 ret = -ENOMEM;
8145 goto err;
8146 }
8147
8148 /*
8149 * search and check whether all WSA devices are already
8150 * registered with ALSA core or not. If found a node, store
8151 * the node and the index in a local array of struct for later
8152 * use.
8153 */
8154 for (i = 0; i < wsa_dev_cnt; i++) {
8155 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8156 "qcom,wsa-devs", i);
8157 if (unlikely(!wsa_of_node)) {
8158 /* we should not be here */
8159 dev_err(&pdev->dev,
8160 "%s: wsa dev node is not present\n",
8161 __func__);
8162 ret = -EINVAL;
8163 goto err;
8164 }
8165 if (soc_find_component(wsa_of_node, NULL)) {
8166 /* WSA device registered with ALSA core */
8167 wsa881x_dev_info[found].of_node = wsa_of_node;
8168 wsa881x_dev_info[found].index = i;
8169 found++;
8170 if (found == wsa_max_devs)
8171 break;
8172 }
8173 }
8174
8175 if (found < wsa_max_devs) {
8176 dev_dbg(&pdev->dev,
8177 "%s: failed to find %d components. Found only %d\n",
8178 __func__, wsa_max_devs, found);
8179 return -EPROBE_DEFER;
8180 }
8181 dev_info(&pdev->dev,
8182 "%s: found %d wsa881x devices registered with ALSA core\n",
8183 __func__, found);
8184
8185codec_aux_dev:
8186 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8187 /* Get count of aux codec device phandles for this platform */
8188 codec_aux_dev_cnt = of_count_phandle_with_args(
8189 pdev->dev.of_node,
8190 "qcom,codec-aux-devs", NULL);
8191 if (codec_aux_dev_cnt == -ENOENT) {
8192 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8193 __func__);
8194 goto err;
8195 } else if (codec_aux_dev_cnt <= 0) {
8196 dev_err(&pdev->dev,
8197 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8198 __func__, codec_aux_dev_cnt);
8199 ret = -EINVAL;
8200 goto err;
8201 }
8202
8203 /*
8204 * Alloc mem to store phandle and index info of aux codec
8205 * if already registered with ALSA core
8206 */
8207 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8208 sizeof(struct aux_codec_dev_info),
8209 GFP_KERNEL);
8210 if (!aux_cdc_dev_info) {
8211 ret = -ENOMEM;
8212 goto err;
8213 }
8214
8215 /*
8216 * search and check whether all aux codecs are already
8217 * registered with ALSA core or not. If found a node, store
8218 * the node and the index in a local array of struct for later
8219 * use.
8220 */
8221 for (i = 0; i < codec_aux_dev_cnt; i++) {
8222 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8223 "qcom,codec-aux-devs", i);
8224 if (unlikely(!aux_codec_of_node)) {
8225 /* we should not be here */
8226 dev_err(&pdev->dev,
8227 "%s: aux codec dev node is not present\n",
8228 __func__);
8229 ret = -EINVAL;
8230 goto err;
8231 }
8232 if (soc_find_component(aux_codec_of_node, NULL)) {
8233 /* AUX codec registered with ALSA core */
8234 aux_cdc_dev_info[codecs_found].of_node =
8235 aux_codec_of_node;
8236 aux_cdc_dev_info[codecs_found].index = i;
8237 codecs_found++;
8238 }
8239 }
8240
8241 if (codecs_found < codec_aux_dev_cnt) {
8242 dev_dbg(&pdev->dev,
8243 "%s: failed to find %d components. Found only %d\n",
8244 __func__, codec_aux_dev_cnt, codecs_found);
8245 return -EPROBE_DEFER;
8246 }
8247 dev_info(&pdev->dev,
8248 "%s: found %d AUX codecs registered with ALSA core\n",
8249 __func__, codecs_found);
8250
8251 }
8252
8253 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8254 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8255
8256 /* Alloc array of AUX devs struct */
8257 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8258 sizeof(struct snd_soc_aux_dev),
8259 GFP_KERNEL);
8260 if (!msm_aux_dev) {
8261 ret = -ENOMEM;
8262 goto err;
8263 }
8264
8265 /* Alloc array of codec conf struct */
8266 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8267 sizeof(struct snd_soc_codec_conf),
8268 GFP_KERNEL);
8269 if (!msm_codec_conf) {
8270 ret = -ENOMEM;
8271 goto err;
8272 }
8273
8274 for (i = 0; i < wsa_max_devs; i++) {
8275 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8276 GFP_KERNEL);
8277 if (!dev_name_str) {
8278 ret = -ENOMEM;
8279 goto err;
8280 }
8281
8282 ret = of_property_read_string_index(pdev->dev.of_node,
8283 "qcom,wsa-aux-dev-prefix",
8284 wsa881x_dev_info[i].index,
8285 auxdev_name_prefix);
8286 if (ret) {
8287 dev_err(&pdev->dev,
8288 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8289 __func__, ret);
8290 ret = -EINVAL;
8291 goto err;
8292 }
8293
8294 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8295 msm_aux_dev[i].name = dev_name_str;
8296 msm_aux_dev[i].codec_name = NULL;
8297 msm_aux_dev[i].codec_of_node =
8298 wsa881x_dev_info[i].of_node;
8299 msm_aux_dev[i].init = msm_wsa881x_init;
8300 msm_codec_conf[i].dev_name = NULL;
8301 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8302 msm_codec_conf[i].of_node =
8303 wsa881x_dev_info[i].of_node;
8304 }
8305
8306 for (i = 0; i < codec_aux_dev_cnt; i++) {
8307 msm_aux_dev[wsa_max_devs + i].name = NULL;
8308 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8309 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8310 aux_cdc_dev_info[i].of_node;
8311 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8312 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8313 msm_codec_conf[wsa_max_devs + i].name_prefix =
8314 NULL;
8315 msm_codec_conf[wsa_max_devs + i].of_node =
8316 aux_cdc_dev_info[i].of_node;
8317 }
8318
8319 card->codec_conf = msm_codec_conf;
8320 card->aux_dev = msm_aux_dev;
8321err:
8322 return ret;
8323}
8324
8325static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8326{
8327 int count;
8328 u32 mi2s_master_slave[MI2S_MAX];
8329 int ret;
8330
8331 for (count = 0; count < MI2S_MAX; count++) {
8332 mutex_init(&mi2s_intf_conf[count].lock);
8333 mi2s_intf_conf[count].ref_cnt = 0;
8334 }
8335
8336 ret = of_property_read_u32_array(pdev->dev.of_node,
8337 "qcom,msm-mi2s-master",
8338 mi2s_master_slave, MI2S_MAX);
8339 if (ret) {
8340 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8341 __func__);
8342 } else {
8343 for (count = 0; count < MI2S_MAX; count++) {
8344 mi2s_intf_conf[count].msm_is_mi2s_master =
8345 mi2s_master_slave[count];
8346 }
8347 }
8348}
8349
8350static void msm_i2s_auxpcm_deinit(void)
8351{
8352 int count;
8353
8354 for (count = 0; count < MI2S_MAX; count++) {
8355 mutex_destroy(&mi2s_intf_conf[count].lock);
8356 mi2s_intf_conf[count].ref_cnt = 0;
8357 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8358 }
8359}
8360static int msm_asoc_machine_probe(struct platform_device *pdev)
8361{
8362 struct snd_soc_card *card;
8363 struct msm_asoc_mach_data *pdata;
8364 const char *mbhc_audio_jack_type = NULL;
8365 int ret;
8366
8367 if (!pdev->dev.of_node) {
8368 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8369 return -EINVAL;
8370 }
8371
8372 pdata = devm_kzalloc(&pdev->dev,
8373 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8374 if (!pdata)
8375 return -ENOMEM;
8376
8377 card = populate_snd_card_dailinks(&pdev->dev);
8378 if (!card) {
8379 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8380 ret = -EINVAL;
8381 goto err;
8382 }
8383 card->dev = &pdev->dev;
8384 platform_set_drvdata(pdev, card);
8385 snd_soc_card_set_drvdata(card, pdata);
8386
8387 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8388 if (ret) {
8389 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8390 ret);
8391 goto err;
8392 }
8393
8394 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8395 if (ret) {
8396 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8397 ret);
8398 goto err;
8399 }
8400
8401 ret = msm_populate_dai_link_component_of_node(card);
8402 if (ret) {
8403 ret = -EPROBE_DEFER;
8404 goto err;
8405 }
8406
8407 ret = msm_init_aux_dev(pdev, card);
8408 if (ret)
8409 goto err;
8410
8411 ret = devm_snd_soc_register_card(&pdev->dev, card);
8412 if (ret == -EPROBE_DEFER) {
8413 if (codec_reg_done)
8414 ret = -EINVAL;
8415 goto err;
8416 } else if (ret) {
8417 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8418 ret);
8419 goto err;
8420 }
8421 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8422 spdev = pdev;
8423
8424 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8425 "qcom,hph-en1-gpio", 0);
8426 if (!pdata->hph_en1_gpio_p) {
8427 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8428 "qcom,hph-en1-gpio",
8429 pdev->dev.of_node->full_name);
8430 }
8431
8432 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8433 "qcom,hph-en0-gpio", 0);
8434 if (!pdata->hph_en0_gpio_p) {
8435 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8436 "qcom,hph-en0-gpio",
8437 pdev->dev.of_node->full_name);
8438 }
8439
8440 ret = of_property_read_string(pdev->dev.of_node,
8441 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8442 if (ret) {
8443 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8444 "qcom,mbhc-audio-jack-type",
8445 pdev->dev.of_node->full_name);
8446 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8447 } else {
8448 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8449 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8450 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8451 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8452 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8453 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8454 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8455 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8456 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8457 } else {
8458 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8459 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8460 }
8461 }
8462 /*
8463 * Parse US-Euro gpio info from DT. Report no error if us-euro
8464 * entry is not found in DT file as some targets do not support
8465 * US-Euro detection
8466 */
8467 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8468 "qcom,us-euro-gpios", 0);
8469 if (!pdata->us_euro_gpio_p) {
8470 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8471 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8472 } else {
8473 dev_dbg(&pdev->dev, "%s detected\n",
8474 "qcom,us-euro-gpios");
8475 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8476 }
8477 /* Parse pinctrl info from devicetree */
8478 ret = msm_get_pinctrl(pdev);
8479 if (!ret) {
8480 pr_debug("%s: pinctrl parsing successful\n", __func__);
8481 } else {
8482 dev_dbg(&pdev->dev,
8483 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8484 __func__, ret);
8485 ret = 0;
8486 }
8487
8488 msm_i2s_auxpcm_init(pdev);
8489 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8490 is_initial_boot = true;
8491 ret = audio_notifier_register("sm6150",
8492 AUDIO_NOTIFIER_ADSP_DOMAIN,
8493 &service_nb);
8494 if (ret < 0)
8495 pr_err("%s: Audio notifier register failed ret = %d\n",
8496 __func__, ret);
8497 } else {
8498 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8499 "qcom,cdc-dmic01-gpios",
8500 0);
8501 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8502 "qcom,cdc-dmic23-gpios",
8503 0);
8504 }
8505err:
8506 return ret;
8507}
8508
8509static int msm_asoc_machine_remove(struct platform_device *pdev)
8510{
8511 audio_notifier_deregister("sm6150");
8512 msm_i2s_auxpcm_deinit();
8513
8514 return 0;
8515}
8516
8517static struct platform_driver sm6150_asoc_machine_driver = {
8518 .driver = {
8519 .name = DRV_NAME,
8520 .owner = THIS_MODULE,
8521 .pm = &snd_soc_pm_ops,
8522 .of_match_table = sm6150_asoc_machine_of_match,
8523 },
8524 .probe = msm_asoc_machine_probe,
8525 .remove = msm_asoc_machine_remove,
8526};
8527module_platform_driver(sm6150_asoc_machine_driver);
8528
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308529MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308530MODULE_LICENSE("GPL v2");
8531MODULE_ALIAS("platform:" DRV_NAME);
8532MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);