Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
Houston Hoffman | ebc6814 | 2016-01-18 15:38:27 -0800 | [diff] [blame] | 2 | * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _HIF_H_ |
| 29 | #define _HIF_H_ |
| 30 | |
| 31 | #ifdef __cplusplus |
| 32 | extern "C" { |
| 33 | #endif /* __cplusplus */ |
| 34 | |
| 35 | /* Header files */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 36 | #include <qdf_status.h> |
| 37 | #include "qdf_nbuf.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 38 | #include "ol_if_athvar.h" |
| 39 | #include <linux/platform_device.h> |
| 40 | #ifdef HIF_PCI |
| 41 | #include <linux/pci.h> |
| 42 | #endif /* HIF_PCI */ |
Mohit Khanna | 440c529 | 2016-05-12 11:05:06 -0700 | [diff] [blame] | 43 | #ifdef HIF_USB |
| 44 | #include <linux/usb.h> |
| 45 | #endif /* HIF_USB */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 46 | #define ENABLE_MBOX_DUMMY_SPACE_FEATURE 1 |
| 47 | |
| 48 | typedef struct htc_callbacks HTC_CALLBACKS; |
| 49 | typedef void __iomem *A_target_id_t; |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 50 | typedef void *hif_handle_t; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 51 | |
| 52 | #define HIF_TYPE_AR6002 2 |
| 53 | #define HIF_TYPE_AR6003 3 |
| 54 | #define HIF_TYPE_AR6004 5 |
| 55 | #define HIF_TYPE_AR9888 6 |
| 56 | #define HIF_TYPE_AR6320 7 |
| 57 | #define HIF_TYPE_AR6320V2 8 |
| 58 | /* For attaching Peregrine 2.0 board host_reg_tbl only */ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 59 | #define HIF_TYPE_AR9888V2 9 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 60 | #define HIF_TYPE_ADRASTEA 10 |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 61 | #define HIF_TYPE_AR900B 11 |
| 62 | #define HIF_TYPE_QCA9984 12 |
| 63 | #define HIF_TYPE_IPQ4019 13 |
| 64 | #define HIF_TYPE_QCA9888 14 |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 65 | #define HIF_TYPE_QCA8074 15 |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 66 | |
Govind Singh | 051a8c4 | 2016-05-10 12:23:41 +0530 | [diff] [blame] | 67 | /* TARGET definition needs to be abstracted in fw common |
| 68 | * header files, below is the placeholder till WIN codebase |
| 69 | * moved to latest copy of fw common header files. |
| 70 | */ |
| 71 | #ifdef CONFIG_WIN |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 72 | #if ENABLE_10_4_FW_HDR |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 73 | #define TARGET_TYPE_UNKNOWN 0 |
| 74 | #define TARGET_TYPE_AR6001 1 |
| 75 | #define TARGET_TYPE_AR6002 2 |
| 76 | #define TARGET_TYPE_AR6003 3 |
| 77 | #define TARGET_TYPE_AR6004 5 |
| 78 | #define TARGET_TYPE_AR6006 6 |
| 79 | #define TARGET_TYPE_AR9888 7 |
| 80 | #define TARGET_TYPE_AR6320 8 |
| 81 | #define TARGET_TYPE_AR900B 9 |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 82 | #define TARGET_TYPE_QCA9984 10 |
| 83 | #define TARGET_TYPE_IPQ4019 11 |
| 84 | #define TARGET_TYPE_QCA9888 12 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 85 | /* For attach Peregrine 2.0 board target_reg_tbl only */ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 86 | #define TARGET_TYPE_AR9888V2 13 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 87 | /* For attach Rome1.0 target_reg_tbl only*/ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 88 | #define TARGET_TYPE_AR6320V1 14 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 89 | /* For Rome2.0/2.1 target_reg_tbl ID*/ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 90 | #define TARGET_TYPE_AR6320V2 15 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 91 | /* For Rome3.0 target_reg_tbl ID*/ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 92 | #define TARGET_TYPE_AR6320V3 16 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 93 | /* For Tufello1.0 target_reg_tbl ID*/ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 94 | #define TARGET_TYPE_QCA9377V1 17 |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 95 | #endif /* ENABLE_10_4_FW_HDR */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 96 | /* For Adrastea target */ |
Houston Hoffman | c3c6bc1 | 2016-05-06 17:08:39 -0700 | [diff] [blame] | 97 | #define TARGET_TYPE_ADRASTEA 19 |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 98 | #endif /* CONFIG_WIN */ |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 99 | #ifndef TARGET_TYPE_QCA8074 |
| 100 | #define TARGET_TYPE_QCA8074 20 |
| 101 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 102 | |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame^] | 103 | /* enum hif_ic_irq - enum defining integrated chip irq numbers |
| 104 | * defining irq nubers that can be used by external modules like datapath |
| 105 | */ |
| 106 | enum hif_ic_irq { |
| 107 | host2wbm_desc_feed = 18, |
| 108 | host2reo_re_injection, |
| 109 | host2reo_command, |
| 110 | host2rxdma_monitor_ring3, |
| 111 | host2rxdma_monitor_ring2, |
| 112 | host2rxdma_monitor_ring1, |
| 113 | reo2ost_exception, |
| 114 | wbm2host_rx_release, |
| 115 | reo2host_status, |
| 116 | reo2host_destination_ring4, |
| 117 | reo2host_destination_ring3, |
| 118 | reo2host_destination_ring2, |
| 119 | reo2host_destination_ring1, |
| 120 | rxdma2host_monitor_destination_mac3, |
| 121 | rxdma2host_monitor_destination_mac2, |
| 122 | rxdma2host_monitor_destination_mac1, |
| 123 | ppdu_end_interrupts_mac3, |
| 124 | ppdu_end_interrupts_mac2, |
| 125 | ppdu_end_interrupts_mac1, |
| 126 | rxdma2host_monitor_status_ring_mac3, |
| 127 | rxdma2host_monitor_status_ring_mac2, |
| 128 | rxdma2host_monitor_status_ring_mac1, |
| 129 | host2rxdma_host_buf_ring_mac3, |
| 130 | host2rxdma_host_buf_ring_mac2, |
| 131 | host2rxdma_host_buf_ring_mac1, |
| 132 | rxdma2host_destination_ring_mac3, |
| 133 | rxdma2host_destination_ring_mac2, |
| 134 | rxdma2host_destination_ring_mac1, |
| 135 | host2tcl_input_ring4, |
| 136 | host2tcl_input_ring3, |
| 137 | host2tcl_input_ring2, |
| 138 | host2tcl_input_ring1, |
| 139 | wbm2host_tx_completions_ring3, |
| 140 | wbm2host_tx_completions_ring2, |
| 141 | wbm2host_tx_completions_ring1, |
| 142 | tcl2host_status_ring, |
| 143 | }; |
| 144 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 145 | struct CE_state; |
Sanjay Devnani | 9ce1577 | 2015-11-12 14:08:57 -0800 | [diff] [blame] | 146 | #define CE_COUNT_MAX 12 |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame^] | 147 | #define HIF_MAX_GRP_IRQ 16 |
| 148 | #define HIF_MAX_GROUP 8 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 149 | |
Prakash Manjunathappa | 82b8996 | 2016-05-05 18:54:23 -0700 | [diff] [blame] | 150 | #ifdef CONFIG_SLUB_DEBUG_ON |
| 151 | #define QCA_NAPI_BUDGET 64 |
| 152 | #define QCA_NAPI_DEF_SCALE 2 |
| 153 | #else /* PERF build */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 154 | #define QCA_NAPI_BUDGET 64 |
| 155 | #define QCA_NAPI_DEF_SCALE 16 |
Prakash Manjunathappa | 82b8996 | 2016-05-05 18:54:23 -0700 | [diff] [blame] | 156 | #endif /* SLUB_DEBUG_ON */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 157 | #define HIF_NAPI_MAX_RECEIVES (QCA_NAPI_BUDGET * QCA_NAPI_DEF_SCALE) |
| 158 | |
| 159 | /* NOTE: "napi->scale" can be changed, |
| 160 | but this does not change the number of buckets */ |
| 161 | #define QCA_NAPI_NUM_BUCKETS (QCA_NAPI_BUDGET / QCA_NAPI_DEF_SCALE) |
| 162 | struct qca_napi_stat { |
| 163 | uint32_t napi_schedules; |
| 164 | uint32_t napi_polls; |
| 165 | uint32_t napi_completes; |
| 166 | uint32_t napi_workdone; |
| 167 | uint32_t napi_budget_uses[QCA_NAPI_NUM_BUCKETS]; |
| 168 | }; |
| 169 | |
| 170 | /** |
| 171 | * per NAPI instance data structure |
| 172 | * This data structure holds stuff per NAPI instance. |
| 173 | * Note that, in the current implementation, though scale is |
| 174 | * an instance variable, it is set to the same value for all |
| 175 | * instances. |
| 176 | */ |
| 177 | struct qca_napi_info { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 178 | struct net_device netdev; /* dummy net_dev */ |
Venkateswara Swamy Bandaru | 1633436 | 2016-08-23 15:38:10 +0530 | [diff] [blame] | 179 | void *hif_ctx; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 180 | struct napi_struct napi; /* one NAPI Instance per CE in phase I */ |
| 181 | uint8_t scale; /* currently same on all instances */ |
| 182 | uint8_t id; |
Orhan K AKYILDIZ | 7ce54e7 | 2016-05-16 12:36:32 -0700 | [diff] [blame] | 183 | int irq; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 184 | struct qca_napi_stat stats[NR_CPUS]; |
| 185 | }; |
| 186 | |
| 187 | /** |
Orhan K AKYILDIZ | 7ce54e7 | 2016-05-16 12:36:32 -0700 | [diff] [blame] | 188 | * struct qca_napi_cpu - an entry of the napi cpu table |
| 189 | * @core_id: physical core id of the core |
| 190 | * @cluster_id: cluster this core belongs to |
| 191 | * @core_mask: mask to match all core of this cluster |
| 192 | * @thread_mask: mask for this core within the cluster |
| 193 | * @max_freq: maximum clock this core can be clocked at |
| 194 | * same for all cpus of the same core. |
| 195 | * @efficiency: a coefficient to mark relative efficiency |
| 196 | * same for all cpus of the same core. |
| 197 | * @napis: bitmap of napi instances on this core |
| 198 | * cluster_nxt: chain to link cores within the same cluster |
| 199 | * |
| 200 | * This structure represents a single entry in the napi cpu |
| 201 | * table. The table is part of struct qca_napi_data. |
| 202 | * This table is initialized by the init function, called while |
| 203 | * the first napi instance is being created, updated by hotplug |
| 204 | * notifier and when cpu affinity decisions are made (by throughput |
| 205 | * detection), and deleted when the last napi instance is removed. |
| 206 | */ |
| 207 | enum qca_napi_tput_state { |
| 208 | QCA_NAPI_TPUT_UNINITIALIZED, |
| 209 | QCA_NAPI_TPUT_LO, |
| 210 | QCA_NAPI_TPUT_HI |
| 211 | }; |
| 212 | enum qca_napi_cpu_state { |
| 213 | QCA_NAPI_CPU_UNINITIALIZED, |
| 214 | QCA_NAPI_CPU_DOWN, |
| 215 | QCA_NAPI_CPU_UP }; |
| 216 | struct qca_napi_cpu { |
| 217 | enum qca_napi_cpu_state state; |
| 218 | int core_id; |
| 219 | int cluster_id; |
| 220 | cpumask_t core_mask; |
| 221 | cpumask_t thread_mask; |
| 222 | unsigned int max_freq; |
| 223 | unsigned long efficiency; |
| 224 | uint32_t napis; |
| 225 | int cluster_nxt; /* index, not pointer */ |
| 226 | }; |
| 227 | |
| 228 | /** |
| 229 | * NAPI data-structure common to all NAPI instances. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 230 | * |
| 231 | * A variable of this type will be stored in hif module context. |
| 232 | */ |
| 233 | |
| 234 | struct qca_napi_data { |
Orhan K AKYILDIZ | 7ce54e7 | 2016-05-16 12:36:32 -0700 | [diff] [blame] | 235 | spinlock_t lock; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 236 | uint32_t state; |
| 237 | uint32_t ce_map; /* bitmap of created/registered NAPI |
| 238 | instances, indexed by pipe_id, |
| 239 | not used by clients (clients use an |
| 240 | id returned by create) */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 241 | struct qca_napi_info napis[CE_COUNT_MAX]; |
Orhan K AKYILDIZ | 7ce54e7 | 2016-05-16 12:36:32 -0700 | [diff] [blame] | 242 | struct qca_napi_cpu napi_cpu[NR_CPUS]; |
| 243 | int lilcl_head, bigcl_head; |
| 244 | enum qca_napi_tput_state napi_mode; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 245 | }; |
| 246 | |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 247 | /** |
Komal Seelam | a5911d3 | 2016-02-24 19:21:59 +0530 | [diff] [blame] | 248 | * struct hif_config_info - Place Holder for hif confiruation |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 249 | * @enable_self_recovery: Self Recovery |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 250 | * |
Komal Seelam | a5911d3 | 2016-02-24 19:21:59 +0530 | [diff] [blame] | 251 | * Structure for holding hif ini parameters. |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 252 | */ |
| 253 | struct hif_config_info { |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 254 | bool enable_self_recovery; |
Houston Hoffman | b21a053 | 2016-03-14 21:12:12 -0700 | [diff] [blame] | 255 | #ifdef FEATURE_RUNTIME_PM |
| 256 | bool enable_runtime_pm; |
| 257 | u_int32_t runtime_pm_delay; |
| 258 | #endif |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 259 | }; |
| 260 | |
| 261 | /** |
| 262 | * struct hif_target_info - Target Information |
| 263 | * @target_version: Target Version |
| 264 | * @target_type: Target Type |
| 265 | * @target_revision: Target Revision |
| 266 | * @soc_version: SOC Version |
| 267 | * |
| 268 | * Structure to hold target information. |
| 269 | */ |
| 270 | struct hif_target_info { |
| 271 | uint32_t target_version; |
| 272 | uint32_t target_type; |
| 273 | uint32_t target_revision; |
| 274 | uint32_t soc_version; |
| 275 | }; |
| 276 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 277 | struct hif_opaque_softc { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 278 | }; |
| 279 | |
| 280 | typedef enum { |
| 281 | HIF_DEVICE_POWER_UP, /* HIF layer should power up interface |
| 282 | * and/or module */ |
| 283 | HIF_DEVICE_POWER_DOWN, /* HIF layer should initiate bus-specific |
| 284 | * measures to minimize power */ |
| 285 | HIF_DEVICE_POWER_CUT /* HIF layer should initiate bus-specific |
| 286 | * AND/OR platform-specific measures |
| 287 | * to completely power-off the module and |
| 288 | * associated hardware (i.e. cut power |
| 289 | * supplies) */ |
| 290 | } HIF_DEVICE_POWER_CHANGE_TYPE; |
| 291 | |
| 292 | /** |
| 293 | * enum hif_enable_type: what triggered the enabling of hif |
| 294 | * |
| 295 | * @HIF_ENABLE_TYPE_PROBE: probe triggered enable |
| 296 | * @HIF_ENABLE_TYPE_REINIT: reinit triggered enable |
| 297 | */ |
| 298 | enum hif_enable_type { |
| 299 | HIF_ENABLE_TYPE_PROBE, |
| 300 | HIF_ENABLE_TYPE_REINIT, |
| 301 | HIF_ENABLE_TYPE_MAX |
| 302 | }; |
| 303 | |
| 304 | /** |
| 305 | * enum hif_disable_type: what triggered the disabling of hif |
| 306 | * |
| 307 | * @HIF_DISABLE_TYPE_PROBE_ERROR: probe error triggered disable |
| 308 | * @HIF_DISABLE_TYPE_REINIT_ERROR: reinit error triggered |
| 309 | * disable |
| 310 | * @HIF_DISABLE_TYPE_REMOVE: remove triggered disable |
| 311 | * @HIF_DISABLE_TYPE_SHUTDOWN: shutdown triggered disable |
| 312 | */ |
| 313 | enum hif_disable_type { |
| 314 | HIF_DISABLE_TYPE_PROBE_ERROR, |
| 315 | HIF_DISABLE_TYPE_REINIT_ERROR, |
| 316 | HIF_DISABLE_TYPE_REMOVE, |
| 317 | HIF_DISABLE_TYPE_SHUTDOWN, |
| 318 | HIF_DISABLE_TYPE_MAX |
| 319 | }; |
Govind Singh | 4cc8213 | 2016-05-12 20:02:01 +0530 | [diff] [blame] | 320 | /** |
| 321 | * enum hif_device_config_opcode: configure mode |
| 322 | * |
| 323 | * @HIF_DEVICE_POWER_STATE: device power state |
| 324 | * @HIF_DEVICE_GET_MBOX_BLOCK_SIZE: get mbox block size |
| 325 | * @HIF_DEVICE_GET_MBOX_ADDR: get mbox block address |
| 326 | * @HIF_DEVICE_GET_PENDING_EVENTS_FUNC: get pending events functions |
| 327 | * @HIF_DEVICE_GET_IRQ_PROC_MODE: get irq proc mode |
| 328 | * @HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC: receive event function |
| 329 | * @HIF_DEVICE_POWER_STATE_CHANGE: change power state |
| 330 | * @HIF_DEVICE_GET_IRQ_YIELD_PARAMS: get yield params |
| 331 | * @HIF_CONFIGURE_QUERY_SCATTER_REQUEST_SUPPORT: configure scatter request |
| 332 | * @HIF_DEVICE_GET_OS_DEVICE: get OS device |
| 333 | * @HIF_DEVICE_DEBUG_BUS_STATE: debug bus state |
| 334 | * @HIF_BMI_DONE: bmi done |
| 335 | * @HIF_DEVICE_SET_TARGET_TYPE: set target type |
| 336 | * @HIF_DEVICE_SET_HTC_CONTEXT: set htc context |
| 337 | * @HIF_DEVICE_GET_HTC_CONTEXT: get htc context |
| 338 | */ |
| 339 | enum hif_device_config_opcode { |
| 340 | HIF_DEVICE_POWER_STATE = 0, |
| 341 | HIF_DEVICE_GET_MBOX_BLOCK_SIZE, |
| 342 | HIF_DEVICE_GET_MBOX_ADDR, |
| 343 | HIF_DEVICE_GET_PENDING_EVENTS_FUNC, |
| 344 | HIF_DEVICE_GET_IRQ_PROC_MODE, |
| 345 | HIF_DEVICE_GET_RECV_EVENT_MASK_UNMASK_FUNC, |
| 346 | HIF_DEVICE_POWER_STATE_CHANGE, |
| 347 | HIF_DEVICE_GET_IRQ_YIELD_PARAMS, |
| 348 | HIF_CONFIGURE_QUERY_SCATTER_REQUEST_SUPPORT, |
| 349 | HIF_DEVICE_GET_OS_DEVICE, |
| 350 | HIF_DEVICE_DEBUG_BUS_STATE, |
| 351 | HIF_BMI_DONE, |
| 352 | HIF_DEVICE_SET_TARGET_TYPE, |
| 353 | HIF_DEVICE_SET_HTC_CONTEXT, |
| 354 | HIF_DEVICE_GET_HTC_CONTEXT, |
| 355 | }; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 356 | |
| 357 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 358 | typedef struct _HID_ACCESS_LOG { |
| 359 | uint32_t seqnum; |
| 360 | bool is_write; |
| 361 | void *addr; |
| 362 | uint32_t value; |
| 363 | } HIF_ACCESS_LOG; |
| 364 | #endif |
| 365 | |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 366 | void hif_reg_write(struct hif_opaque_softc *hif_ctx, uint32_t offset, |
| 367 | uint32_t value); |
| 368 | uint32_t hif_reg_read(struct hif_opaque_softc *hif_ctx, uint32_t offset); |
| 369 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 370 | #define HIF_MAX_DEVICES 1 |
| 371 | |
| 372 | struct htc_callbacks { |
| 373 | void *context; /* context to pass to the dsrhandler |
| 374 | * note : rwCompletionHandler is provided |
| 375 | * the context passed to hif_read_write */ |
Govind Singh | 4cc8213 | 2016-05-12 20:02:01 +0530 | [diff] [blame] | 376 | QDF_STATUS(*rwCompletionHandler)(void *rwContext, QDF_STATUS status); |
| 377 | QDF_STATUS(*dsrHandler)(void *context); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 378 | }; |
| 379 | |
Komal Seelam | 7508012 | 2016-03-02 15:18:25 +0530 | [diff] [blame] | 380 | /** |
| 381 | * struct hif_driver_state_callbacks - Callbacks for HIF to query Driver state |
| 382 | * @context: Private data context |
| 383 | * @set_recovery_in_progress: To Set Driver state for recovery in progress |
| 384 | * @is_recovery_in_progress: Query if driver state is recovery in progress |
| 385 | * @is_load_unload_in_progress: Query if driver state Load/Unload in Progress |
| 386 | * @is_driver_unloading: Query if driver is unloading. |
| 387 | * |
| 388 | * This Structure provides callback pointer for HIF to query hdd for driver |
| 389 | * states. |
| 390 | */ |
| 391 | struct hif_driver_state_callbacks { |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 392 | void *context; |
| 393 | void (*set_recovery_in_progress)(void *context, uint8_t val); |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 394 | bool (*is_recovery_in_progress)(void *context); |
| 395 | bool (*is_load_unload_in_progress)(void *context); |
| 396 | bool (*is_driver_unloading)(void *context); |
| 397 | }; |
| 398 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 399 | /* This API detaches the HTC layer from the HIF device */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 400 | void hif_detach_htc(struct hif_opaque_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 401 | |
| 402 | /****************************************************************/ |
| 403 | /* BMI and Diag window abstraction */ |
| 404 | /****************************************************************/ |
| 405 | |
| 406 | #define HIF_BMI_EXCHANGE_NO_TIMEOUT ((uint32_t)(0)) |
| 407 | |
| 408 | #define DIAG_TRANSFER_LIMIT 2048U /* maximum number of bytes that can be |
| 409 | * handled atomically by |
| 410 | * DiagRead/DiagWrite */ |
| 411 | |
| 412 | /* |
| 413 | * API to handle HIF-specific BMI message exchanges, this API is synchronous |
| 414 | * and only allowed to be called from a context that can block (sleep) */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 415 | QDF_STATUS hif_exchange_bmi_msg(struct hif_opaque_softc *scn, |
| 416 | qdf_dma_addr_t cmd, qdf_dma_addr_t rsp, |
Komal Seelam | 2a5fa63 | 2016-02-15 10:33:44 +0530 | [diff] [blame] | 417 | uint8_t *pSendMessage, uint32_t Length, |
| 418 | uint8_t *pResponseMessage, |
| 419 | uint32_t *pResponseLength, uint32_t TimeoutMS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 420 | |
| 421 | /* |
| 422 | * APIs to handle HIF specific diagnostic read accesses. These APIs are |
| 423 | * synchronous and only allowed to be called from a context that |
| 424 | * can block (sleep). They are not high performance APIs. |
| 425 | * |
| 426 | * hif_diag_read_access reads a 4 Byte aligned/length value from a |
| 427 | * Target register or memory word. |
| 428 | * |
| 429 | * hif_diag_read_mem reads an arbitrary length of arbitrarily aligned memory. |
| 430 | */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 431 | QDF_STATUS hif_diag_read_access(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 432 | uint32_t *data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 433 | QDF_STATUS hif_diag_read_mem(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 434 | uint8_t *data, int nbytes); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 435 | void hif_dump_target_memory(struct hif_opaque_softc *scn, void *ramdump_base, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 436 | uint32_t address, uint32_t size); |
| 437 | /* |
| 438 | * APIs to handle HIF specific diagnostic write accesses. These APIs are |
| 439 | * synchronous and only allowed to be called from a context that |
| 440 | * can block (sleep). |
| 441 | * They are not high performance APIs. |
| 442 | * |
| 443 | * hif_diag_write_access writes a 4 Byte aligned/length value to a |
| 444 | * Target register or memory word. |
| 445 | * |
| 446 | * hif_diag_write_mem writes an arbitrary length of arbitrarily aligned memory. |
| 447 | */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 448 | QDF_STATUS hif_diag_write_access(struct hif_opaque_softc *scn, uint32_t address, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 449 | uint32_t data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 450 | QDF_STATUS hif_diag_write_mem(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 451 | uint8_t *data, int nbytes); |
| 452 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 453 | typedef void (*fastpath_msg_handler)(void *, qdf_nbuf_t *, uint32_t); |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame^] | 454 | typedef uint32_t (*ext_intr_handler)(void *, uint32_t); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 455 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 456 | /* |
| 457 | * Set the FASTPATH_mode_on flag in sc, for use by data path |
| 458 | */ |
| 459 | #ifdef WLAN_FEATURE_FASTPATH |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 460 | void hif_enable_fastpath(struct hif_opaque_softc *hif_ctx); |
| 461 | bool hif_is_fastpath_mode_enabled(struct hif_opaque_softc *hif_ctx); |
Mohit Khanna | 440c529 | 2016-05-12 11:05:06 -0700 | [diff] [blame] | 462 | void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int ret); |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 463 | int hif_ce_fastpath_cb_register(struct hif_opaque_softc *hif_ctx, |
| 464 | fastpath_msg_handler handler, void *context); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 465 | #else |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 466 | static inline int hif_ce_fastpath_cb_register(struct hif_opaque_softc *hif_ctx, |
| 467 | fastpath_msg_handler handler, |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 468 | void *context) |
| 469 | { |
| 470 | return QDF_STATUS_E_FAILURE; |
| 471 | } |
Mohit Khanna | 440c529 | 2016-05-12 11:05:06 -0700 | [diff] [blame] | 472 | static inline void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int ret) |
| 473 | { |
| 474 | return NULL; |
| 475 | } |
| 476 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 477 | #endif |
| 478 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 479 | /* |
| 480 | * Enable/disable CDC max performance workaround |
| 481 | * For max-performace set this to 0 |
| 482 | * To allow SoC to enter sleep set this to 1 |
| 483 | */ |
| 484 | #define CONFIG_DISABLE_CDC_MAX_PERF_WAR 0 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 485 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 486 | void hif_ipa_get_ce_resource(struct hif_opaque_softc *scn, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 487 | qdf_dma_addr_t *ce_sr_base_paddr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 488 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 489 | qdf_dma_addr_t *ce_reg_paddr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 490 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 491 | /** |
| 492 | * @brief List of callbacks - filled in by HTC. |
| 493 | */ |
| 494 | struct hif_msg_callbacks { |
| 495 | void *Context; |
| 496 | /**< context meaningful to HTC */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 497 | QDF_STATUS (*txCompletionHandler)(void *Context, qdf_nbuf_t wbuf, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 498 | uint32_t transferID, |
| 499 | uint32_t toeplitz_hash_result); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 500 | QDF_STATUS (*rxCompletionHandler)(void *Context, qdf_nbuf_t wbuf, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 501 | uint8_t pipeID); |
| 502 | void (*txResourceAvailHandler)(void *context, uint8_t pipe); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 503 | void (*fwEventHandler)(void *context, QDF_STATUS status); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 504 | }; |
| 505 | |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 506 | enum hif_target_status { |
| 507 | TARGET_STATUS_CONNECTED = 0, /* target connected */ |
| 508 | TARGET_STATUS_RESET, /* target got reset */ |
| 509 | TARGET_STATUS_EJECT, /* target got ejected */ |
| 510 | TARGET_STATUS_SUSPEND /*target got suspend */ |
| 511 | }; |
| 512 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 513 | #define HIF_DATA_ATTR_SET_TX_CLASSIFY(attr, v) \ |
| 514 | (attr |= (v & 0x01) << 5) |
| 515 | #define HIF_DATA_ATTR_SET_ENCAPSULATION_TYPE(attr, v) \ |
| 516 | (attr |= (v & 0x03) << 6) |
| 517 | #define HIF_DATA_ATTR_SET_ADDR_X_SEARCH_DISABLE(attr, v) \ |
| 518 | (attr |= (v & 0x01) << 13) |
| 519 | #define HIF_DATA_ATTR_SET_ADDR_Y_SEARCH_DISABLE(attr, v) \ |
| 520 | (attr |= (v & 0x01) << 14) |
| 521 | #define HIF_DATA_ATTR_SET_TOEPLITZ_HASH_ENABLE(attr, v) \ |
| 522 | (attr |= (v & 0x01) << 15) |
| 523 | #define HIF_DATA_ATTR_SET_PACKET_OR_RESULT_OFFSET(attr, v) \ |
| 524 | (attr |= (v & 0x0FFF) << 16) |
| 525 | #define HIF_DATA_ATTR_SET_ENABLE_11H(attr, v) \ |
| 526 | (attr |= (v & 0x01) << 30) |
| 527 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 528 | struct hif_ul_pipe_info { |
| 529 | unsigned int nentries; |
| 530 | unsigned int nentries_mask; |
| 531 | unsigned int sw_index; |
| 532 | unsigned int write_index; /* cached copy */ |
| 533 | unsigned int hw_index; /* cached copy */ |
| 534 | void *base_addr_owner_space; /* Host address space */ |
| 535 | qdf_dma_addr_t base_addr_CE_space; /* CE address space */ |
| 536 | }; |
| 537 | |
| 538 | struct hif_dl_pipe_info { |
| 539 | unsigned int nentries; |
| 540 | unsigned int nentries_mask; |
| 541 | unsigned int sw_index; |
| 542 | unsigned int write_index; /* cached copy */ |
| 543 | unsigned int hw_index; /* cached copy */ |
| 544 | void *base_addr_owner_space; /* Host address space */ |
| 545 | qdf_dma_addr_t base_addr_CE_space; /* CE address space */ |
| 546 | }; |
| 547 | |
| 548 | struct hif_pipe_addl_info { |
| 549 | uint32_t pci_mem; |
| 550 | uint32_t ctrl_addr; |
| 551 | struct hif_ul_pipe_info ul_pipe; |
| 552 | struct hif_dl_pipe_info dl_pipe; |
| 553 | }; |
| 554 | |
Houston Hoffman | f303f91 | 2016-03-14 21:11:42 -0700 | [diff] [blame] | 555 | struct hif_bus_id; |
| 556 | typedef struct hif_bus_id hif_bus_id; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 557 | |
Govind Singh | 4cc8213 | 2016-05-12 20:02:01 +0530 | [diff] [blame] | 558 | void hif_claim_device(struct hif_opaque_softc *hif_ctx); |
| 559 | QDF_STATUS hif_get_config_item(struct hif_opaque_softc *hif_ctx, |
| 560 | int opcode, void *config, uint32_t config_len); |
| 561 | void hif_set_mailbox_swap(struct hif_opaque_softc *hif_ctx); |
| 562 | void hif_mask_interrupt_call(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 563 | void hif_post_init(struct hif_opaque_softc *scn, void *hHTC, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 564 | struct hif_msg_callbacks *callbacks); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 565 | QDF_STATUS hif_start(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 566 | void hif_stop(struct hif_opaque_softc *scn); |
| 567 | void hif_flush_surprise_remove(struct hif_opaque_softc *scn); |
| 568 | void hif_dump(struct hif_opaque_softc *scn, uint8_t CmdId, bool start); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 569 | void hif_trigger_dump(struct hif_opaque_softc *hif_ctx, |
| 570 | uint8_t cmd_id, bool start); |
| 571 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 572 | QDF_STATUS hif_send_head(struct hif_opaque_softc *scn, uint8_t PipeID, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 573 | uint32_t transferID, uint32_t nbytes, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 574 | qdf_nbuf_t wbuf, uint32_t data_attr); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 575 | void hif_send_complete_check(struct hif_opaque_softc *scn, uint8_t PipeID, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 576 | int force); |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 577 | void hif_shut_down_device(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 578 | void hif_get_default_pipe(struct hif_opaque_softc *scn, uint8_t *ULPipe, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 579 | uint8_t *DLPipe); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 580 | int hif_map_service_to_pipe(struct hif_opaque_softc *scn, uint16_t svc_id, |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 581 | uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled, |
| 582 | int *dl_is_polled); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 583 | uint16_t |
| 584 | hif_get_free_queue_number(struct hif_opaque_softc *scn, uint8_t PipeID); |
| 585 | void *hif_get_targetdef(struct hif_opaque_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 586 | uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 587 | void hif_set_target_sleep(struct hif_opaque_softc *scn, bool sleep_ok, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 588 | bool wait_for_it); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 589 | int hif_check_fw_reg(struct hif_opaque_softc *scn); |
Yuanyuan Liu | a5f0a39 | 2016-05-09 11:39:48 -0700 | [diff] [blame] | 590 | #ifndef HIF_PCI |
Yuanyuan Liu | 4e3feeb | 2016-04-20 10:41:15 -0700 | [diff] [blame] | 591 | static inline int hif_check_soc_status(struct hif_opaque_softc *scn) |
| 592 | { |
| 593 | return 0; |
| 594 | } |
| 595 | #else |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 596 | int hif_check_soc_status(struct hif_opaque_softc *scn); |
Yuanyuan Liu | 4e3feeb | 2016-04-20 10:41:15 -0700 | [diff] [blame] | 597 | #endif |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 598 | void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision, |
| 599 | const char **target_name); |
| 600 | void hif_disable_isr(struct hif_opaque_softc *scn); |
| 601 | void hif_reset_soc(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 602 | void hif_save_htc_htt_config_endpoint(struct hif_opaque_softc *hif_ctx, |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 603 | int htc_htt_tx_endpoint); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 604 | struct hif_opaque_softc *hif_open(qdf_device_t qdf_ctx, uint32_t mode, |
| 605 | enum qdf_bus_type bus_type, |
Komal Seelam | 7508012 | 2016-03-02 15:18:25 +0530 | [diff] [blame] | 606 | struct hif_driver_state_callbacks *cbk); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 607 | void hif_close(struct hif_opaque_softc *hif_ctx); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 608 | QDF_STATUS hif_enable(struct hif_opaque_softc *hif_ctx, struct device *dev, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 609 | void *bdev, const hif_bus_id *bid, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 610 | enum qdf_bus_type bus_type, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 611 | enum hif_enable_type type); |
| 612 | void hif_disable(struct hif_opaque_softc *hif_ctx, enum hif_disable_type type); |
Nirav Shah | b70bd73 | 2016-05-25 14:31:51 +0530 | [diff] [blame] | 613 | void hif_display_stats(struct hif_opaque_softc *hif_ctx); |
| 614 | void hif_clear_stats(struct hif_opaque_softc *hif_ctx); |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 615 | #ifdef FEATURE_RUNTIME_PM |
| 616 | struct hif_pm_runtime_lock; |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 617 | int hif_pm_runtime_get(struct hif_opaque_softc *hif_ctx); |
| 618 | void hif_pm_runtime_get_noresume(struct hif_opaque_softc *hif_ctx); |
| 619 | int hif_pm_runtime_put(struct hif_opaque_softc *hif_ctx); |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 620 | struct hif_pm_runtime_lock *hif_runtime_lock_init(const char *name); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 621 | void hif_runtime_lock_deinit(struct hif_opaque_softc *hif_ctx, |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 622 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 623 | int hif_pm_runtime_prevent_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 624 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 625 | int hif_pm_runtime_allow_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 626 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 627 | int hif_pm_runtime_prevent_suspend_timeout(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 628 | struct hif_pm_runtime_lock *lock, unsigned int delay); |
| 629 | #else |
| 630 | struct hif_pm_runtime_lock { |
| 631 | const char *name; |
| 632 | }; |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 633 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 634 | static inline void hif_pm_runtime_get_noresume(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 635 | {} |
| 636 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 637 | static inline int hif_pm_runtime_get(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 638 | { return 0; } |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 639 | static inline int hif_pm_runtime_put(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 640 | { return 0; } |
| 641 | static inline struct hif_pm_runtime_lock *hif_runtime_lock_init( |
| 642 | const char *name) |
| 643 | { return NULL; } |
Komal Seelam | f860068 | 2016-02-02 18:17:13 +0530 | [diff] [blame] | 644 | static inline void |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 645 | hif_runtime_lock_deinit(struct hif_opaque_softc *hif_ctx, |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 646 | struct hif_pm_runtime_lock *lock) {} |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 647 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 648 | static inline int hif_pm_runtime_prevent_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 649 | struct hif_pm_runtime_lock *lock) |
| 650 | { return 0; } |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 651 | static inline int hif_pm_runtime_allow_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 652 | struct hif_pm_runtime_lock *lock) |
| 653 | { return 0; } |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 654 | static inline int |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 655 | hif_pm_runtime_prevent_suspend_timeout(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 656 | struct hif_pm_runtime_lock *lock, unsigned int delay) |
| 657 | { return 0; } |
| 658 | #endif |
| 659 | |
Houston Hoffman | fb7d612 | 2016-03-14 21:11:46 -0700 | [diff] [blame] | 660 | void hif_enable_power_management(struct hif_opaque_softc *hif_ctx, |
| 661 | bool is_packet_log_enabled); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 662 | void hif_disable_power_management(struct hif_opaque_softc *hif_ctx); |
Houston Hoffman | 78467a8 | 2016-01-05 20:08:56 -0800 | [diff] [blame] | 663 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 664 | void hif_vote_link_down(struct hif_opaque_softc *); |
| 665 | void hif_vote_link_up(struct hif_opaque_softc *); |
| 666 | bool hif_can_suspend_link(struct hif_opaque_softc *); |
Houston Hoffman | 78467a8 | 2016-01-05 20:08:56 -0800 | [diff] [blame] | 667 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 668 | int hif_bus_resume(struct hif_opaque_softc *); |
| 669 | int hif_bus_suspend(struct hif_opaque_softc *); |
Houston Hoffman | 7fdff0c | 2016-08-29 12:31:58 -0700 | [diff] [blame] | 670 | int hif_bus_resume_noirq(struct hif_opaque_softc *); |
| 671 | int hif_bus_suspend_noirq(struct hif_opaque_softc *); |
Houston Hoffman | 692cc05 | 2015-11-10 18:42:47 -0800 | [diff] [blame] | 672 | |
| 673 | #ifdef FEATURE_RUNTIME_PM |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 674 | int hif_pre_runtime_suspend(struct hif_opaque_softc *hif_ctx); |
| 675 | void hif_pre_runtime_resume(struct hif_opaque_softc *hif_ctx); |
| 676 | int hif_runtime_suspend(struct hif_opaque_softc *hif_ctx); |
| 677 | int hif_runtime_resume(struct hif_opaque_softc *hif_ctx); |
| 678 | void hif_process_runtime_suspend_success(struct hif_opaque_softc *); |
| 679 | void hif_process_runtime_suspend_failure(struct hif_opaque_softc *); |
| 680 | void hif_process_runtime_resume_success(struct hif_opaque_softc *); |
Houston Hoffman | 692cc05 | 2015-11-10 18:42:47 -0800 | [diff] [blame] | 681 | #endif |
| 682 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 683 | int hif_dump_registers(struct hif_opaque_softc *scn); |
| 684 | int ol_copy_ramdump(struct hif_opaque_softc *scn); |
| 685 | void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx); |
| 686 | void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision, |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 687 | const char **target_name); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 688 | void hif_lro_flush_cb_register(struct hif_opaque_softc *scn, |
Komal Seelam | c92a0cf | 2016-02-22 20:43:52 +0530 | [diff] [blame] | 689 | void (handler)(void *), void *data); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 690 | void hif_lro_flush_cb_deregister(struct hif_opaque_softc *scn); |
Houston Hoffman | 2635259 | 2016-03-14 21:11:43 -0700 | [diff] [blame] | 691 | bool hif_needs_bmi(struct hif_opaque_softc *scn); |
Houston Hoffman | 60a1eeb | 2016-03-14 21:11:44 -0700 | [diff] [blame] | 692 | enum qdf_bus_type hif_get_bus_type(struct hif_opaque_softc *hif_hdl); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 693 | struct hif_target_info *hif_get_target_info_handle(struct hif_opaque_softc * |
| 694 | scn); |
| 695 | struct hif_config_info *hif_get_ini_handle(struct hif_opaque_softc *scn); |
| 696 | struct ramdump_info *hif_get_ramdump_ctx(struct hif_opaque_softc *hif_ctx); |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 697 | enum hif_target_status hif_get_target_status(struct hif_opaque_softc *hif_ctx); |
| 698 | void hif_set_target_status(struct hif_opaque_softc *hif_ctx, enum |
| 699 | hif_target_status); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 700 | void hif_init_ini_config(struct hif_opaque_softc *hif_ctx, |
| 701 | struct hif_config_info *cfg); |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 702 | void hif_update_tx_ring(struct hif_opaque_softc *osc, u_int32_t num_htt_cmpls); |
| 703 | qdf_nbuf_t hif_batch_send(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, |
| 704 | uint32_t transfer_id, u_int32_t len, uint32_t sendhead); |
| 705 | int hif_send_single(struct hif_opaque_softc *osc, qdf_nbuf_t msdu, uint32_t |
| 706 | transfer_id, u_int32_t len); |
Nirav Shah | da0881a | 2016-05-16 10:45:16 +0530 | [diff] [blame] | 707 | int hif_send_fast(struct hif_opaque_softc *osc, qdf_nbuf_t nbuf, |
| 708 | uint32_t transfer_id, uint32_t download_len); |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 709 | void hif_pkt_dl_len_set(void *hif_sc, unsigned int pkt_download_len); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 710 | void hif_ce_war_disable(void); |
| 711 | void hif_ce_war_enable(void); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 712 | void hif_disable_interrupt(struct hif_opaque_softc *osc, uint32_t pipe_num); |
| 713 | #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT |
| 714 | struct hif_pipe_addl_info *hif_get_addl_pipe_info(struct hif_opaque_softc *osc, |
| 715 | struct hif_pipe_addl_info *hif_info, uint32_t pipe_number); |
| 716 | uint32_t hif_set_nss_wifiol_mode(struct hif_opaque_softc *osc, |
| 717 | uint32_t pipe_num); |
| 718 | int32_t hif_get_nss_wifiol_bypass_nw_process(struct hif_opaque_softc *osc); |
Mohit Khanna | 440c529 | 2016-05-12 11:05:06 -0700 | [diff] [blame] | 719 | #endif /* QCA_NSS_WIFI_OFFLOAD_SUPPORT */ |
| 720 | |
| 721 | void hif_set_bundle_mode(struct hif_opaque_softc *scn, bool enabled, |
| 722 | int rx_bundle_cnt); |
| 723 | int hif_bus_reset_resume(struct hif_opaque_softc *scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 724 | |
Rajeev Kumar | 5bac30f | 2016-07-14 17:31:29 -0700 | [diff] [blame] | 725 | #ifdef WLAN_SUSPEND_RESUME_TEST |
| 726 | typedef void (*hdd_fake_resume_callback)(uint32_t val); |
| 727 | void hif_fake_apps_suspend(hdd_fake_resume_callback callback); |
| 728 | #endif |
| 729 | |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame^] | 730 | uint32_t hif_register_ext_group_int_handler(struct hif_opaque_softc *hif_ctx, |
| 731 | uint32_t numirq, uint32_t irq[], ext_intr_handler handler, |
| 732 | void *context); |
| 733 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 734 | #ifdef __cplusplus |
| 735 | } |
| 736 | #endif |
Mohit Khanna | 440c529 | 2016-05-12 11:05:06 -0700 | [diff] [blame] | 737 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 738 | #endif /* _HIF_H_ */ |