Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
yeshwanth sriram guntuka | 78ee68f | 2016-10-25 11:57:58 +0530 | [diff] [blame] | 2 | * Copyright (c) 2013-2017 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 27 | #include "targcfg.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 28 | #include "qdf_lock.h" |
| 29 | #include "qdf_status.h" |
| 30 | #include "qdf_status.h" |
| 31 | #include <qdf_atomic.h> /* qdf_atomic_read */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 32 | #include <targaddrs.h> |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 33 | #include "hif_io32.h" |
| 34 | #include <hif.h> |
| 35 | #include "regtable.h" |
| 36 | #define ATH_MODULE_NAME hif |
| 37 | #include <a_debug.h> |
| 38 | #include "hif_main.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 39 | #include "ce_api.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 40 | #include "qdf_trace.h" |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 41 | #include "pld_common.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 42 | #include "hif_debug.h" |
| 43 | #include "ce_internal.h" |
| 44 | #include "ce_reg.h" |
| 45 | #include "ce_assignment.h" |
| 46 | #include "ce_tasklet.h" |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 47 | #ifndef CONFIG_WIN |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 48 | #include "qwlan_version.h" |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 49 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 50 | |
| 51 | #define CE_POLL_TIMEOUT 10 /* ms */ |
| 52 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 53 | #define AGC_DUMP 1 |
| 54 | #define CHANINFO_DUMP 2 |
| 55 | #define BB_WATCHDOG_DUMP 3 |
| 56 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 57 | #define PCIE_ACCESS_DUMP 4 |
| 58 | #endif |
| 59 | #include "mp_dev.h" |
| 60 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 61 | #if (defined(QCA_WIFI_QCA8074) || defined(QCA_WIFI_QCA6290)) && \ |
| 62 | !defined(QCA_WIFI_SUPPORT_SRNG) |
| 63 | #define QCA_WIFI_SUPPORT_SRNG |
| 64 | #endif |
| 65 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 66 | /* Forward references */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 67 | QDF_STATUS hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 68 | |
| 69 | /* |
| 70 | * Fix EV118783, poll to check whether a BMI response comes |
| 71 | * other than waiting for the interruption which may be lost. |
| 72 | */ |
| 73 | /* #define BMI_RSP_POLLING */ |
| 74 | #define BMI_RSP_TO_MILLISEC 1000 |
| 75 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 76 | #ifdef CONFIG_BYPASS_QMI |
| 77 | #define BYPASS_QMI 1 |
| 78 | #else |
| 79 | #define BYPASS_QMI 0 |
| 80 | #endif |
| 81 | |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 82 | #ifdef CONFIG_WIN |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 83 | #if ENABLE_10_4_FW_HDR |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 84 | #define WDI_IPA_SERVICE_GROUP 5 |
| 85 | #define WDI_IPA_TX_SVC MAKE_SERVICE_ID(WDI_IPA_SERVICE_GROUP, 0) |
| 86 | #define HTT_DATA2_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 1) |
| 87 | #define HTT_DATA3_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 2) |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 88 | #endif /* ENABLE_10_4_FW_HDR */ |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 89 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 90 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 91 | QDF_STATUS hif_post_recv_buffers(struct hif_softc *scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 92 | static void hif_config_rri_on_ddr(struct hif_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 93 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 94 | /** |
| 95 | * hif_target_access_log_dump() - dump access log |
| 96 | * |
| 97 | * dump access log |
| 98 | * |
| 99 | * Return: n/a |
| 100 | */ |
| 101 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 102 | static void hif_target_access_log_dump(void) |
| 103 | { |
| 104 | hif_target_dump_access_log(); |
| 105 | } |
| 106 | #endif |
| 107 | |
| 108 | |
| 109 | void hif_trigger_dump(struct hif_opaque_softc *hif_ctx, |
| 110 | uint8_t cmd_id, bool start) |
| 111 | { |
| 112 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 113 | |
| 114 | switch (cmd_id) { |
| 115 | case AGC_DUMP: |
| 116 | if (start) |
| 117 | priv_start_agc(scn); |
| 118 | else |
| 119 | priv_dump_agc(scn); |
| 120 | break; |
| 121 | case CHANINFO_DUMP: |
| 122 | if (start) |
| 123 | priv_start_cap_chaninfo(scn); |
| 124 | else |
| 125 | priv_dump_chaninfo(scn); |
| 126 | break; |
| 127 | case BB_WATCHDOG_DUMP: |
| 128 | priv_dump_bbwatchdog(scn); |
| 129 | break; |
| 130 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 131 | case PCIE_ACCESS_DUMP: |
| 132 | hif_target_access_log_dump(); |
| 133 | break; |
| 134 | #endif |
| 135 | default: |
| 136 | HIF_ERROR("%s: Invalid htc dump command", __func__); |
| 137 | break; |
| 138 | } |
| 139 | } |
| 140 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 141 | static void ce_poll_timeout(void *arg) |
| 142 | { |
| 143 | struct CE_state *CE_state = (struct CE_state *)arg; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 144 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 145 | if (CE_state->timer_inited) { |
| 146 | ce_per_engine_service(CE_state->scn, CE_state->id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 147 | qdf_timer_mod(&CE_state->poll_timer, CE_POLL_TIMEOUT); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 148 | } |
| 149 | } |
| 150 | |
| 151 | static unsigned int roundup_pwr2(unsigned int n) |
| 152 | { |
| 153 | int i; |
| 154 | unsigned int test_pwr2; |
| 155 | |
| 156 | if (!(n & (n - 1))) |
| 157 | return n; /* already a power of 2 */ |
| 158 | |
| 159 | test_pwr2 = 4; |
| 160 | for (i = 0; i < 29; i++) { |
| 161 | if (test_pwr2 > n) |
| 162 | return test_pwr2; |
| 163 | test_pwr2 = test_pwr2 << 1; |
| 164 | } |
| 165 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 166 | QDF_ASSERT(0); /* n too large */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 167 | return 0; |
| 168 | } |
| 169 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 170 | #define ADRASTEA_SRC_WR_INDEX_OFFSET 0x3C |
| 171 | #define ADRASTEA_DST_WR_INDEX_OFFSET 0x40 |
| 172 | |
| 173 | static struct shadow_reg_cfg target_shadow_reg_cfg_map[] = { |
| 174 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 175 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 176 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 177 | { 5, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 178 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 179 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 180 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 181 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 182 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 183 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 184 | { 9, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 185 | { 10, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 186 | { 11, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 187 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 188 | }; |
| 189 | |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 190 | static struct shadow_reg_cfg target_shadow_reg_cfg_epping[] = { |
| 191 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 192 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 193 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 194 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 195 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 196 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 197 | { 5, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 198 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 199 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 200 | }; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 201 | |
| 202 | /* CE_PCI TABLE */ |
| 203 | /* |
| 204 | * NOTE: the table below is out of date, though still a useful reference. |
| 205 | * Refer to target_service_to_ce_map and hif_map_service_to_pipe for the actual |
| 206 | * mapping of HTC services to HIF pipes. |
| 207 | */ |
| 208 | /* |
| 209 | * This authoritative table defines Copy Engine configuration and the mapping |
| 210 | * of services/endpoints to CEs. A subset of this information is passed to |
| 211 | * the Target during startup as a prerequisite to entering BMI phase. |
| 212 | * See: |
| 213 | * target_service_to_ce_map - Target-side mapping |
| 214 | * hif_map_service_to_pipe - Host-side mapping |
| 215 | * target_ce_config - Target-side configuration |
| 216 | * host_ce_config - Host-side configuration |
| 217 | ============================================================================ |
| 218 | Purpose | Service / Endpoint | CE | Dire | Xfer | Xfer |
| 219 | | | | ctio | Size | Frequency |
| 220 | | | | n | | |
| 221 | ============================================================================ |
| 222 | tx | HTT_DATA (downlink) | CE 0 | h->t | medium - | very frequent |
| 223 | descriptor | | | | O(100B) | and regular |
| 224 | download | | | | | |
| 225 | ---------------------------------------------------------------------------- |
| 226 | rx | HTT_DATA (uplink) | CE 1 | t->h | small - | frequent and |
| 227 | indication | | | | O(10B) | regular |
| 228 | upload | | | | | |
| 229 | ---------------------------------------------------------------------------- |
| 230 | MSDU | DATA_BK (uplink) | CE 2 | t->h | large - | rare |
| 231 | upload | | | | O(1000B) | (frequent |
| 232 | e.g. noise | | | | | during IP1.0 |
| 233 | packets | | | | | testing) |
| 234 | ---------------------------------------------------------------------------- |
| 235 | MSDU | DATA_BK (downlink) | CE 3 | h->t | large - | very rare |
| 236 | download | | | | O(1000B) | (frequent |
| 237 | e.g. | | | | | during IP1.0 |
| 238 | misdirecte | | | | | testing) |
| 239 | d EAPOL | | | | | |
| 240 | packets | | | | | |
| 241 | ---------------------------------------------------------------------------- |
| 242 | n/a | DATA_BE, DATA_VI | CE 2 | t->h | | never(?) |
| 243 | | DATA_VO (uplink) | | | | |
| 244 | ---------------------------------------------------------------------------- |
| 245 | n/a | DATA_BE, DATA_VI | CE 3 | h->t | | never(?) |
| 246 | | DATA_VO (downlink) | | | | |
| 247 | ---------------------------------------------------------------------------- |
| 248 | WMI events | WMI_CONTROL (uplink) | CE 4 | t->h | medium - | infrequent |
| 249 | | | | | O(100B) | |
| 250 | ---------------------------------------------------------------------------- |
| 251 | WMI | WMI_CONTROL | CE 5 | h->t | medium - | infrequent |
| 252 | messages | (downlink) | | | O(100B) | |
| 253 | | | | | | |
| 254 | ---------------------------------------------------------------------------- |
| 255 | n/a | HTC_CTRL_RSVD, | CE 1 | t->h | | never(?) |
| 256 | | HTC_RAW_STREAMS | | | | |
| 257 | | (uplink) | | | | |
| 258 | ---------------------------------------------------------------------------- |
| 259 | n/a | HTC_CTRL_RSVD, | CE 0 | h->t | | never(?) |
| 260 | | HTC_RAW_STREAMS | | | | |
| 261 | | (downlink) | | | | |
| 262 | ---------------------------------------------------------------------------- |
| 263 | diag | none (raw CE) | CE 7 | t<>h | 4 | Diag Window |
| 264 | | | | | | infrequent |
| 265 | ============================================================================ |
| 266 | */ |
| 267 | |
| 268 | /* |
| 269 | * Map from service/endpoint to Copy Engine. |
| 270 | * This table is derived from the CE_PCI TABLE, above. |
| 271 | * It is passed to the Target at startup for use by firmware. |
| 272 | */ |
| 273 | static struct service_to_pipe target_service_to_ce_map_wlan[] = { |
| 274 | { |
| 275 | WMI_DATA_VO_SVC, |
| 276 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 277 | 3, |
| 278 | }, |
| 279 | { |
| 280 | WMI_DATA_VO_SVC, |
| 281 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 282 | 2, |
| 283 | }, |
| 284 | { |
| 285 | WMI_DATA_BK_SVC, |
| 286 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 287 | 3, |
| 288 | }, |
| 289 | { |
| 290 | WMI_DATA_BK_SVC, |
| 291 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 292 | 2, |
| 293 | }, |
| 294 | { |
| 295 | WMI_DATA_BE_SVC, |
| 296 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 297 | 3, |
| 298 | }, |
| 299 | { |
| 300 | WMI_DATA_BE_SVC, |
| 301 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 302 | 2, |
| 303 | }, |
| 304 | { |
| 305 | WMI_DATA_VI_SVC, |
| 306 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 307 | 3, |
| 308 | }, |
| 309 | { |
| 310 | WMI_DATA_VI_SVC, |
| 311 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 312 | 2, |
| 313 | }, |
| 314 | { |
| 315 | WMI_CONTROL_SVC, |
| 316 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 317 | 3, |
| 318 | }, |
| 319 | { |
| 320 | WMI_CONTROL_SVC, |
| 321 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 322 | 2, |
| 323 | }, |
| 324 | { |
Kiran Venkatappa | e17e3b6 | 2017-02-10 16:31:49 +0530 | [diff] [blame] | 325 | WMI_CONTROL_SVC_WMAC1, |
| 326 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 327 | 7, |
| 328 | }, |
| 329 | { |
| 330 | WMI_CONTROL_SVC_WMAC1, |
| 331 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 332 | 2, |
| 333 | }, |
| 334 | { |
| 335 | WMI_CONTROL_SVC_WMAC2, |
| 336 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 337 | 9, |
| 338 | }, |
| 339 | { |
| 340 | WMI_CONTROL_SVC_WMAC2, |
| 341 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 342 | 2, |
| 343 | }, |
| 344 | { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 345 | HTC_CTRL_RSVD_SVC, |
| 346 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 347 | 0, /* could be moved to 3 (share with WMI) */ |
| 348 | }, |
| 349 | { |
| 350 | HTC_CTRL_RSVD_SVC, |
| 351 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 352 | 2, |
| 353 | }, |
| 354 | { |
| 355 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 356 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 357 | 0, |
| 358 | }, |
| 359 | { |
| 360 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 361 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 362 | 2, |
| 363 | }, |
| 364 | { |
| 365 | HTT_DATA_MSG_SVC, |
| 366 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 367 | 4, |
| 368 | }, |
| 369 | { |
| 370 | HTT_DATA_MSG_SVC, |
| 371 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 372 | 1, |
| 373 | }, |
| 374 | { |
| 375 | WDI_IPA_TX_SVC, |
| 376 | PIPEDIR_OUT, /* in = DL = target -> host */ |
| 377 | 5, |
| 378 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 379 | #if defined(QCA_WIFI_3_0_ADRASTEA) |
| 380 | { |
| 381 | HTT_DATA2_MSG_SVC, |
| 382 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 383 | 9, |
| 384 | }, |
| 385 | { |
| 386 | HTT_DATA3_MSG_SVC, |
| 387 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 388 | 10, |
| 389 | }, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 390 | { |
| 391 | PACKET_LOG_SVC, |
| 392 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 393 | 11, |
| 394 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 395 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 396 | /* (Additions here) */ |
| 397 | |
| 398 | { /* Must be last */ |
| 399 | 0, |
| 400 | 0, |
| 401 | 0, |
| 402 | }, |
| 403 | }; |
| 404 | |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 405 | /* PIPEDIR_OUT = HOST to Target */ |
| 406 | /* PIPEDIR_IN = TARGET to HOST */ |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 407 | static struct service_to_pipe target_service_to_ce_map_qca8074[] = { |
| 408 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 409 | { WMI_DATA_VO_SVC, PIPEDIR_IN, 2, }, |
| 410 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 411 | { WMI_DATA_BK_SVC, PIPEDIR_IN, 2, }, |
| 412 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 413 | { WMI_DATA_BE_SVC, PIPEDIR_IN, 2, }, |
| 414 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 415 | { WMI_DATA_VI_SVC, PIPEDIR_IN, 2, }, |
| 416 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 417 | { WMI_CONTROL_SVC, PIPEDIR_IN, 2, }, |
| 418 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_OUT, 7}, |
| 419 | { WMI_CONTROL_SVC_WMAC1, PIPEDIR_IN, 2}, |
| 420 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 421 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 1, }, |
| 422 | { HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0}, |
| 423 | { HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 1 }, |
| 424 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 425 | { HTT_DATA_MSG_SVC, PIPEDIR_IN, 1, }, |
Balamurugan Mahalingam | dcb5226 | 2017-08-16 19:16:45 +0530 | [diff] [blame] | 426 | { PACKET_LOG_SVC, PIPEDIR_IN, 5, }, |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 427 | /* (Additions here) */ |
| 428 | { 0, 0, 0, }, |
| 429 | }; |
| 430 | |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 431 | static struct service_to_pipe target_service_to_ce_map_qca6290[] = { |
| 432 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 433 | { WMI_DATA_VO_SVC, PIPEDIR_IN , 2, }, |
| 434 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 435 | { WMI_DATA_BK_SVC, PIPEDIR_IN , 2, }, |
| 436 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 437 | { WMI_DATA_BE_SVC, PIPEDIR_IN , 2, }, |
| 438 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 439 | { WMI_DATA_VI_SVC, PIPEDIR_IN , 2, }, |
| 440 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 441 | { WMI_CONTROL_SVC, PIPEDIR_IN , 2, }, |
| 442 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 443 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN , 2, }, |
| 444 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 445 | { HTT_DATA_MSG_SVC, PIPEDIR_IN , 1, }, |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 446 | /* (Additions here) */ |
| 447 | { 0, 0, 0, }, |
| 448 | }; |
| 449 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 450 | static struct service_to_pipe target_service_to_ce_map_ar900b[] = { |
| 451 | { |
| 452 | WMI_DATA_VO_SVC, |
| 453 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 454 | 3, |
| 455 | }, |
| 456 | { |
| 457 | WMI_DATA_VO_SVC, |
| 458 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 459 | 2, |
| 460 | }, |
| 461 | { |
| 462 | WMI_DATA_BK_SVC, |
| 463 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 464 | 3, |
| 465 | }, |
| 466 | { |
| 467 | WMI_DATA_BK_SVC, |
| 468 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 469 | 2, |
| 470 | }, |
| 471 | { |
| 472 | WMI_DATA_BE_SVC, |
| 473 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 474 | 3, |
| 475 | }, |
| 476 | { |
| 477 | WMI_DATA_BE_SVC, |
| 478 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 479 | 2, |
| 480 | }, |
| 481 | { |
| 482 | WMI_DATA_VI_SVC, |
| 483 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 484 | 3, |
| 485 | }, |
| 486 | { |
| 487 | WMI_DATA_VI_SVC, |
| 488 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 489 | 2, |
| 490 | }, |
| 491 | { |
| 492 | WMI_CONTROL_SVC, |
| 493 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 494 | 3, |
| 495 | }, |
| 496 | { |
| 497 | WMI_CONTROL_SVC, |
| 498 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 499 | 2, |
| 500 | }, |
| 501 | { |
| 502 | HTC_CTRL_RSVD_SVC, |
| 503 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 504 | 0, /* could be moved to 3 (share with WMI) */ |
| 505 | }, |
| 506 | { |
| 507 | HTC_CTRL_RSVD_SVC, |
| 508 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 509 | 1, |
| 510 | }, |
| 511 | { |
| 512 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 513 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 514 | 0, |
| 515 | }, |
| 516 | { |
| 517 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 518 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 519 | 1, |
| 520 | }, |
| 521 | { |
| 522 | HTT_DATA_MSG_SVC, |
| 523 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 524 | 4, |
| 525 | }, |
| 526 | #if WLAN_FEATURE_FASTPATH |
| 527 | { |
| 528 | HTT_DATA_MSG_SVC, |
| 529 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 530 | 5, |
| 531 | }, |
| 532 | #else /* WLAN_FEATURE_FASTPATH */ |
| 533 | { |
| 534 | HTT_DATA_MSG_SVC, |
| 535 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 536 | 1, |
| 537 | }, |
| 538 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 539 | |
| 540 | /* (Additions here) */ |
| 541 | |
| 542 | { /* Must be last */ |
| 543 | 0, |
| 544 | 0, |
| 545 | 0, |
| 546 | }, |
| 547 | }; |
| 548 | |
| 549 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 550 | static struct shadow_reg_cfg *target_shadow_reg_cfg = target_shadow_reg_cfg_map; |
| 551 | static int shadow_cfg_sz = sizeof(target_shadow_reg_cfg_map); |
| 552 | |
| 553 | static struct service_to_pipe target_service_to_ce_map_wlan_epping[] = { |
| 554 | {WMI_DATA_VO_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 555 | {WMI_DATA_VO_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 556 | {WMI_DATA_BK_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 557 | {WMI_DATA_BK_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 558 | {WMI_DATA_BE_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 559 | {WMI_DATA_BE_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 560 | {WMI_DATA_VI_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 561 | {WMI_DATA_VI_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 562 | {WMI_CONTROL_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 563 | {WMI_CONTROL_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 564 | {HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 565 | {HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 566 | {HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 567 | {HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 568 | {HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 569 | {HTT_DATA_MSG_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 570 | {0, 0, 0,}, /* Must be last */ |
| 571 | }; |
| 572 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 573 | static void hif_select_service_to_pipe_map(struct hif_softc *scn, |
| 574 | struct service_to_pipe **tgt_svc_map_to_use, |
| 575 | uint32_t *sz_tgt_svc_map_to_use) |
| 576 | { |
| 577 | uint32_t mode = hif_get_conparam(scn); |
| 578 | struct hif_target_info *tgt_info = &scn->target_info; |
| 579 | |
| 580 | if (QDF_IS_EPPING_ENABLED(mode)) { |
| 581 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan_epping; |
| 582 | *sz_tgt_svc_map_to_use = |
| 583 | sizeof(target_service_to_ce_map_wlan_epping); |
| 584 | } else { |
| 585 | switch (tgt_info->target_type) { |
| 586 | default: |
| 587 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan; |
| 588 | *sz_tgt_svc_map_to_use = |
| 589 | sizeof(target_service_to_ce_map_wlan); |
| 590 | break; |
| 591 | case TARGET_TYPE_AR900B: |
| 592 | case TARGET_TYPE_QCA9984: |
| 593 | case TARGET_TYPE_IPQ4019: |
| 594 | case TARGET_TYPE_QCA9888: |
| 595 | case TARGET_TYPE_AR9888: |
| 596 | case TARGET_TYPE_AR9888V2: |
| 597 | *tgt_svc_map_to_use = target_service_to_ce_map_ar900b; |
| 598 | *sz_tgt_svc_map_to_use = |
| 599 | sizeof(target_service_to_ce_map_ar900b); |
| 600 | break; |
| 601 | case TARGET_TYPE_QCA6290: |
| 602 | *tgt_svc_map_to_use = target_service_to_ce_map_qca6290; |
| 603 | *sz_tgt_svc_map_to_use = |
| 604 | sizeof(target_service_to_ce_map_qca6290); |
| 605 | break; |
Balamurugan Mahalingam | 20802b2 | 2017-05-02 19:11:38 +0530 | [diff] [blame] | 606 | case TARGET_TYPE_QCA8074: |
| 607 | *tgt_svc_map_to_use = target_service_to_ce_map_qca8074; |
| 608 | *sz_tgt_svc_map_to_use = |
| 609 | sizeof(target_service_to_ce_map_qca8074); |
| 610 | break; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 611 | } |
| 612 | } |
| 613 | } |
| 614 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 615 | /** |
| 616 | * ce_mark_datapath() - marks the ce_state->htt_rx_data accordingly |
| 617 | * @ce_state : pointer to the state context of the CE |
| 618 | * |
| 619 | * Description: |
| 620 | * Sets htt_rx_data attribute of the state structure if the |
| 621 | * CE serves one of the HTT DATA services. |
| 622 | * |
| 623 | * Return: |
| 624 | * false (attribute set to false) |
| 625 | * true (attribute set to true); |
| 626 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 627 | static bool ce_mark_datapath(struct CE_state *ce_state) |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 628 | { |
| 629 | struct service_to_pipe *svc_map; |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 630 | uint32_t map_sz, map_len; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 631 | int i; |
| 632 | bool rc = false; |
| 633 | |
| 634 | if (ce_state != NULL) { |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 635 | hif_select_service_to_pipe_map(ce_state->scn, &svc_map, |
| 636 | &map_sz); |
Houston Hoffman | 55fcf5a | 2016-09-27 23:21:51 -0700 | [diff] [blame] | 637 | |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 638 | map_len = map_sz / sizeof(struct service_to_pipe); |
| 639 | for (i = 0; i < map_len; i++) { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 640 | if ((svc_map[i].pipenum == ce_state->id) && |
| 641 | ((svc_map[i].service_id == HTT_DATA_MSG_SVC) || |
| 642 | (svc_map[i].service_id == HTT_DATA2_MSG_SVC) || |
| 643 | (svc_map[i].service_id == HTT_DATA3_MSG_SVC))) { |
| 644 | /* HTT CEs are unidirectional */ |
| 645 | if (svc_map[i].pipedir == PIPEDIR_IN) |
| 646 | ce_state->htt_rx_data = true; |
| 647 | else |
| 648 | ce_state->htt_tx_data = true; |
| 649 | rc = true; |
| 650 | } |
| 651 | } |
| 652 | } |
| 653 | return rc; |
| 654 | } |
| 655 | |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 656 | /** |
| 657 | * ce_ring_test_initial_indexes() - tests the initial ce ring indexes |
| 658 | * @ce_id: ce in question |
| 659 | * @ring: ring state being examined |
| 660 | * @type: "src_ring" or "dest_ring" string for identifying the ring |
| 661 | * |
| 662 | * Warns on non-zero index values. |
| 663 | * Causes a kernel panic if the ring is not empty durring initialization. |
| 664 | */ |
| 665 | static void ce_ring_test_initial_indexes(int ce_id, struct CE_ring_state *ring, |
| 666 | char *type) |
| 667 | { |
| 668 | if (ring->write_index != 0 || ring->sw_index != 0) |
| 669 | HIF_ERROR("ce %d, %s, initial sw_index = %d, initial write_index =%d", |
| 670 | ce_id, type, ring->sw_index, ring->write_index); |
| 671 | if (ring->write_index != ring->sw_index) |
| 672 | QDF_BUG(0); |
| 673 | } |
| 674 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 675 | /** |
| 676 | * ce_srng_based() - Does this target use srng |
| 677 | * @ce_state : pointer to the state context of the CE |
| 678 | * |
| 679 | * Description: |
| 680 | * returns true if the target is SRNG based |
| 681 | * |
| 682 | * Return: |
| 683 | * false (attribute set to false) |
| 684 | * true (attribute set to true); |
| 685 | */ |
| 686 | bool ce_srng_based(struct hif_softc *scn) |
| 687 | { |
| 688 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 689 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
| 690 | |
| 691 | switch (tgt_info->target_type) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 692 | case TARGET_TYPE_QCA8074: |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 693 | case TARGET_TYPE_QCA6290: |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 694 | return true; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 695 | default: |
| 696 | return false; |
| 697 | } |
| 698 | return false; |
| 699 | } |
| 700 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 701 | #ifdef QCA_WIFI_SUPPORT_SRNG |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 702 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 703 | { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 704 | if (ce_srng_based(scn)) |
| 705 | return ce_services_srng(); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 706 | |
| 707 | return ce_services_legacy(); |
| 708 | } |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 709 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 710 | |
Venkata Sharath Chandra Manchala | 837d323 | 2017-01-18 15:11:56 -0800 | [diff] [blame] | 711 | #else /* QCA_LITHIUM */ |
| 712 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
| 713 | { |
| 714 | return ce_services_legacy(); |
| 715 | } |
| 716 | #endif /* QCA_LITHIUM */ |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 717 | |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 718 | static void hif_prepare_hal_shadow_register_cfg(struct hif_softc *scn, |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 719 | struct pld_shadow_reg_v2_cfg **shadow_config, |
| 720 | int *num_shadow_registers_configured) { |
| 721 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 722 | |
| 723 | return hif_state->ce_services->ce_prepare_shadow_register_v2_cfg( |
| 724 | scn, shadow_config, num_shadow_registers_configured); |
| 725 | } |
| 726 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 727 | static inline uint32_t ce_get_desc_size(struct hif_softc *scn, |
| 728 | uint8_t ring_type) |
| 729 | { |
| 730 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 731 | |
| 732 | return hif_state->ce_services->ce_get_desc_size(ring_type); |
| 733 | } |
| 734 | |
| 735 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 736 | static struct CE_ring_state *ce_alloc_ring_state(struct CE_state *CE_state, |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 737 | uint8_t ring_type, uint32_t nentries) |
| 738 | { |
| 739 | uint32_t ce_nbytes; |
| 740 | char *ptr; |
| 741 | qdf_dma_addr_t base_addr; |
| 742 | struct CE_ring_state *ce_ring; |
| 743 | uint32_t desc_size; |
| 744 | struct hif_softc *scn = CE_state->scn; |
| 745 | |
| 746 | ce_nbytes = sizeof(struct CE_ring_state) |
| 747 | + (nentries * sizeof(void *)); |
| 748 | ptr = qdf_mem_malloc(ce_nbytes); |
| 749 | if (!ptr) |
| 750 | return NULL; |
| 751 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 752 | ce_ring = (struct CE_ring_state *)ptr; |
| 753 | ptr += sizeof(struct CE_ring_state); |
| 754 | ce_ring->nentries = nentries; |
| 755 | ce_ring->nentries_mask = nentries - 1; |
| 756 | |
| 757 | ce_ring->low_water_mark_nentries = 0; |
| 758 | ce_ring->high_water_mark_nentries = nentries; |
| 759 | ce_ring->per_transfer_context = (void **)ptr; |
| 760 | |
| 761 | desc_size = ce_get_desc_size(scn, ring_type); |
| 762 | |
| 763 | /* Legacy platforms that do not support cache |
| 764 | * coherent DMA are unsupported |
| 765 | */ |
| 766 | ce_ring->base_addr_owner_space_unaligned = |
| 767 | qdf_mem_alloc_consistent(scn->qdf_dev, |
| 768 | scn->qdf_dev->dev, |
| 769 | (nentries * |
| 770 | desc_size + |
| 771 | CE_DESC_RING_ALIGN), |
| 772 | &base_addr); |
| 773 | if (ce_ring->base_addr_owner_space_unaligned |
| 774 | == NULL) { |
| 775 | HIF_ERROR("%s: ring has no DMA mem", |
| 776 | __func__); |
| 777 | qdf_mem_free(ptr); |
| 778 | return NULL; |
| 779 | } |
| 780 | ce_ring->base_addr_CE_space_unaligned = base_addr; |
| 781 | |
| 782 | /* Correctly initialize memory to 0 to |
| 783 | * prevent garbage data crashing system |
| 784 | * when download firmware |
| 785 | */ |
| 786 | qdf_mem_zero(ce_ring->base_addr_owner_space_unaligned, |
| 787 | nentries * desc_size + |
| 788 | CE_DESC_RING_ALIGN); |
| 789 | |
| 790 | if (ce_ring->base_addr_CE_space_unaligned & (CE_DESC_RING_ALIGN - 1)) { |
| 791 | |
| 792 | ce_ring->base_addr_CE_space = |
| 793 | (ce_ring->base_addr_CE_space_unaligned + |
| 794 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1); |
| 795 | |
| 796 | ce_ring->base_addr_owner_space = (void *) |
| 797 | (((size_t) ce_ring->base_addr_owner_space_unaligned + |
| 798 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1)); |
| 799 | } else { |
| 800 | ce_ring->base_addr_CE_space = |
| 801 | ce_ring->base_addr_CE_space_unaligned; |
| 802 | ce_ring->base_addr_owner_space = |
| 803 | ce_ring->base_addr_owner_space_unaligned; |
| 804 | } |
| 805 | |
| 806 | return ce_ring; |
| 807 | } |
| 808 | |
| 809 | static void ce_ring_setup(struct hif_softc *scn, uint8_t ring_type, |
| 810 | uint32_t ce_id, struct CE_ring_state *ring, |
| 811 | struct CE_attr *attr) |
| 812 | { |
| 813 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 814 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 815 | hif_state->ce_services->ce_ring_setup(scn, ring_type, ce_id, |
| 816 | ring, attr); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 817 | } |
| 818 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 819 | int hif_ce_bus_early_suspend(struct hif_softc *scn) |
| 820 | { |
| 821 | uint8_t ul_pipe, dl_pipe; |
| 822 | int ce_id, status, ul_is_polled, dl_is_polled; |
| 823 | struct CE_state *ce_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 824 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 825 | status = hif_map_service_to_pipe(&scn->osc, WMI_CONTROL_SVC, |
| 826 | &ul_pipe, &dl_pipe, |
| 827 | &ul_is_polled, &dl_is_polled); |
| 828 | if (status) { |
| 829 | HIF_ERROR("%s: pipe_mapping failure", __func__); |
| 830 | return status; |
| 831 | } |
| 832 | |
| 833 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 834 | if (ce_id == ul_pipe) |
| 835 | continue; |
| 836 | if (ce_id == dl_pipe) |
| 837 | continue; |
| 838 | |
| 839 | ce_state = scn->ce_id_to_state[ce_id]; |
| 840 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 841 | if (ce_state->state == CE_RUNNING) |
| 842 | ce_state->state = CE_PAUSED; |
| 843 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 844 | } |
| 845 | |
| 846 | return status; |
| 847 | } |
| 848 | |
| 849 | int hif_ce_bus_late_resume(struct hif_softc *scn) |
| 850 | { |
| 851 | int ce_id; |
| 852 | struct CE_state *ce_state; |
| 853 | int write_index; |
| 854 | bool index_updated; |
| 855 | |
| 856 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 857 | ce_state = scn->ce_id_to_state[ce_id]; |
| 858 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 859 | if (ce_state->state == CE_PENDING) { |
| 860 | write_index = ce_state->src_ring->write_index; |
| 861 | CE_SRC_RING_WRITE_IDX_SET(scn, ce_state->ctrl_addr, |
| 862 | write_index); |
| 863 | ce_state->state = CE_RUNNING; |
| 864 | index_updated = true; |
| 865 | } else { |
| 866 | index_updated = false; |
| 867 | } |
| 868 | |
| 869 | if (ce_state->state == CE_PAUSED) |
| 870 | ce_state->state = CE_RUNNING; |
| 871 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 872 | |
| 873 | if (index_updated) |
| 874 | hif_record_ce_desc_event(scn, ce_id, |
| 875 | RESUME_WRITE_INDEX_UPDATE, |
| 876 | NULL, NULL, write_index); |
| 877 | } |
| 878 | |
| 879 | return 0; |
| 880 | } |
| 881 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 882 | /** |
| 883 | * ce_oom_recovery() - try to recover rx ce from oom condition |
| 884 | * @context: CE_state of the CE with oom rx ring |
| 885 | * |
| 886 | * the executing work Will continue to be rescheduled untill |
| 887 | * at least 1 descriptor is successfully posted to the rx ring. |
| 888 | * |
| 889 | * return: none |
| 890 | */ |
| 891 | static void ce_oom_recovery(void *context) |
| 892 | { |
| 893 | struct CE_state *ce_state = context; |
| 894 | struct hif_softc *scn = ce_state->scn; |
| 895 | struct HIF_CE_state *ce_softc = HIF_GET_CE_STATE(scn); |
| 896 | struct HIF_CE_pipe_info *pipe_info = |
| 897 | &ce_softc->pipe_info[ce_state->id]; |
| 898 | |
| 899 | hif_post_recv_buffers_for_pipe(pipe_info); |
| 900 | } |
| 901 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 902 | /* |
| 903 | * Initialize a Copy Engine based on caller-supplied attributes. |
| 904 | * This may be called once to initialize both source and destination |
| 905 | * rings or it may be called twice for separate source and destination |
| 906 | * initialization. It may be that only one side or the other is |
| 907 | * initialized by software/firmware. |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 908 | * |
| 909 | * This should be called durring the initialization sequence before |
| 910 | * interupts are enabled, so we don't have to worry about thread safety. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 911 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 912 | struct CE_handle *ce_init(struct hif_softc *scn, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 913 | unsigned int CE_id, struct CE_attr *attr) |
| 914 | { |
| 915 | struct CE_state *CE_state; |
| 916 | uint32_t ctrl_addr; |
| 917 | unsigned int nentries; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 918 | bool malloc_CE_state = false; |
| 919 | bool malloc_src_ring = false; |
| 920 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 921 | QDF_ASSERT(CE_id < scn->ce_count); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 922 | ctrl_addr = CE_BASE_ADDRESS(CE_id); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 923 | CE_state = scn->ce_id_to_state[CE_id]; |
| 924 | |
| 925 | if (!CE_state) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 926 | CE_state = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 927 | (struct CE_state *)qdf_mem_malloc(sizeof(*CE_state)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 928 | if (!CE_state) { |
| 929 | HIF_ERROR("%s: CE_state has no mem", __func__); |
| 930 | return NULL; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 931 | } |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 932 | malloc_CE_state = true; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 933 | qdf_spinlock_create(&CE_state->ce_index_lock); |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 934 | |
| 935 | CE_state->id = CE_id; |
| 936 | CE_state->ctrl_addr = ctrl_addr; |
| 937 | CE_state->state = CE_RUNNING; |
| 938 | CE_state->attr_flags = attr->flags; |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 939 | qdf_spinlock_create(&CE_state->lro_unloading_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 940 | } |
| 941 | CE_state->scn = scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 942 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 943 | qdf_atomic_init(&CE_state->rx_pending); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 944 | if (attr == NULL) { |
| 945 | /* Already initialized; caller wants the handle */ |
| 946 | return (struct CE_handle *)CE_state; |
| 947 | } |
| 948 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 949 | if (CE_state->src_sz_max) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 950 | QDF_ASSERT(CE_state->src_sz_max == attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 951 | else |
| 952 | CE_state->src_sz_max = attr->src_sz_max; |
| 953 | |
Houston Hoffman | 68e837e | 2015-12-04 12:57:24 -0800 | [diff] [blame] | 954 | ce_init_ce_desc_event_log(CE_id, |
| 955 | attr->src_nentries + attr->dest_nentries); |
| 956 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 957 | /* source ring setup */ |
| 958 | nentries = attr->src_nentries; |
| 959 | if (nentries) { |
| 960 | struct CE_ring_state *src_ring; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 961 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 962 | nentries = roundup_pwr2(nentries); |
| 963 | if (CE_state->src_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 964 | QDF_ASSERT(CE_state->src_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 965 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 966 | src_ring = CE_state->src_ring = |
| 967 | ce_alloc_ring_state(CE_state, |
| 968 | CE_RING_SRC, |
| 969 | nentries); |
| 970 | if (!src_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 971 | /* cannot allocate src ring. If the |
| 972 | * CE_state is allocated locally free |
| 973 | * CE_State and return error. |
| 974 | */ |
| 975 | HIF_ERROR("%s: src ring has no mem", __func__); |
| 976 | if (malloc_CE_state) { |
| 977 | /* allocated CE_state locally */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 978 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 979 | malloc_CE_state = false; |
| 980 | } |
| 981 | return NULL; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 982 | } |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 983 | /* we can allocate src ring. Mark that the src ring is |
| 984 | * allocated locally |
| 985 | */ |
| 986 | malloc_src_ring = true; |
| 987 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 988 | /* |
| 989 | * Also allocate a shadow src ring in |
| 990 | * regular mem to use for faster access. |
| 991 | */ |
| 992 | src_ring->shadow_base_unaligned = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 993 | qdf_mem_malloc(nentries * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 994 | sizeof(struct CE_src_desc) + |
| 995 | CE_DESC_RING_ALIGN); |
| 996 | if (src_ring->shadow_base_unaligned == NULL) { |
| 997 | HIF_ERROR("%s: src ring no shadow_base mem", |
| 998 | __func__); |
| 999 | goto error_no_dma_mem; |
| 1000 | } |
| 1001 | src_ring->shadow_base = (struct CE_src_desc *) |
| 1002 | (((size_t) src_ring->shadow_base_unaligned + |
| 1003 | CE_DESC_RING_ALIGN - 1) & |
| 1004 | ~(CE_DESC_RING_ALIGN - 1)); |
| 1005 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1006 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1007 | goto error_target_access; |
Houston Hoffman | f789c66 | 2016-04-12 15:39:04 -0700 | [diff] [blame] | 1008 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1009 | ce_ring_setup(scn, CE_RING_SRC, CE_id, src_ring, attr); |
| 1010 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1011 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1012 | goto error_target_access; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1013 | ce_ring_test_initial_indexes(CE_id, src_ring, |
| 1014 | "src_ring"); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1015 | } |
| 1016 | } |
| 1017 | |
| 1018 | /* destination ring setup */ |
| 1019 | nentries = attr->dest_nentries; |
| 1020 | if (nentries) { |
| 1021 | struct CE_ring_state *dest_ring; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1022 | |
| 1023 | nentries = roundup_pwr2(nentries); |
| 1024 | if (CE_state->dest_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1025 | QDF_ASSERT(CE_state->dest_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1026 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1027 | dest_ring = CE_state->dest_ring = |
| 1028 | ce_alloc_ring_state(CE_state, |
| 1029 | CE_RING_DEST, |
| 1030 | nentries); |
| 1031 | if (!dest_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1032 | /* cannot allocate dst ring. If the CE_state |
| 1033 | * or src ring is allocated locally free |
| 1034 | * CE_State and src ring and return error. |
| 1035 | */ |
| 1036 | HIF_ERROR("%s: dest ring has no mem", |
| 1037 | __func__); |
Poddar, Siddarth | 55d6da0 | 2017-03-31 18:42:54 +0530 | [diff] [blame] | 1038 | goto error_no_dma_mem; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1039 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1040 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1041 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1042 | goto error_target_access; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1043 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1044 | ce_ring_setup(scn, CE_RING_DEST, CE_id, |
| 1045 | dest_ring, attr); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1046 | |
| 1047 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1048 | goto error_target_access; |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 1049 | |
| 1050 | ce_ring_test_initial_indexes(CE_id, dest_ring, |
| 1051 | "dest_ring"); |
| 1052 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1053 | /* For srng based target, init status ring here */ |
| 1054 | if (ce_srng_based(CE_state->scn)) { |
| 1055 | CE_state->status_ring = |
| 1056 | ce_alloc_ring_state(CE_state, |
| 1057 | CE_RING_STATUS, |
| 1058 | nentries); |
| 1059 | if (CE_state->status_ring == NULL) { |
| 1060 | /*Allocation failed. Cleanup*/ |
| 1061 | qdf_mem_free(CE_state->dest_ring); |
| 1062 | if (malloc_src_ring) { |
| 1063 | qdf_mem_free |
| 1064 | (CE_state->src_ring); |
| 1065 | CE_state->src_ring = NULL; |
| 1066 | malloc_src_ring = false; |
| 1067 | } |
| 1068 | if (malloc_CE_state) { |
| 1069 | /* allocated CE_state locally */ |
| 1070 | scn->ce_id_to_state[CE_id] = |
| 1071 | NULL; |
| 1072 | qdf_mem_free(CE_state); |
| 1073 | malloc_CE_state = false; |
| 1074 | } |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1075 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1076 | return NULL; |
| 1077 | } |
| 1078 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1079 | goto error_target_access; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1080 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1081 | ce_ring_setup(scn, CE_RING_STATUS, CE_id, |
| 1082 | CE_state->status_ring, attr); |
| 1083 | |
| 1084 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1085 | goto error_target_access; |
| 1086 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1087 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1088 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1089 | /* epping */ |
| 1090 | /* poll timer */ |
| 1091 | if ((CE_state->attr_flags & CE_ATTR_ENABLE_POLL)) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1092 | qdf_timer_init(scn->qdf_dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1093 | &CE_state->poll_timer, |
| 1094 | ce_poll_timeout, |
| 1095 | CE_state, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1096 | QDF_TIMER_TYPE_SW); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1097 | CE_state->timer_inited = true; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1098 | qdf_timer_mod(&CE_state->poll_timer, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1099 | CE_POLL_TIMEOUT); |
| 1100 | } |
| 1101 | } |
| 1102 | } |
| 1103 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1104 | if (!ce_srng_based(scn)) { |
| 1105 | /* Enable CE error interrupts */ |
| 1106 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1107 | goto error_target_access; |
| 1108 | CE_ERROR_INTR_ENABLE(scn, ctrl_addr); |
| 1109 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1110 | goto error_target_access; |
| 1111 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1112 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1113 | qdf_create_work(scn->qdf_dev, &CE_state->oom_allocation_work, |
| 1114 | ce_oom_recovery, CE_state); |
| 1115 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1116 | /* update the htt_data attribute */ |
| 1117 | ce_mark_datapath(CE_state); |
Houston Hoffman | b01db18 | 2017-03-13 14:38:09 -0700 | [diff] [blame] | 1118 | scn->ce_id_to_state[CE_id] = CE_state; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1119 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1120 | return (struct CE_handle *)CE_state; |
| 1121 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1122 | error_target_access: |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1123 | error_no_dma_mem: |
| 1124 | ce_fini((struct CE_handle *)CE_state); |
| 1125 | return NULL; |
| 1126 | } |
| 1127 | |
| 1128 | #ifdef WLAN_FEATURE_FASTPATH |
| 1129 | /** |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1130 | * hif_enable_fastpath() Update that we have enabled fastpath mode |
| 1131 | * @hif_ctx: HIF context |
| 1132 | * |
| 1133 | * For use in data path |
| 1134 | * |
| 1135 | * Retrun: void |
| 1136 | */ |
| 1137 | void hif_enable_fastpath(struct hif_opaque_softc *hif_ctx) |
| 1138 | { |
| 1139 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1140 | |
Houston Hoffman | d63cd74 | 2016-12-05 11:59:56 -0800 | [diff] [blame] | 1141 | if (ce_srng_based(scn)) { |
| 1142 | HIF_INFO("%s, srng rings do not support fastpath", __func__); |
| 1143 | return; |
| 1144 | } |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1145 | HIF_DBG("%s, Enabling fastpath mode", __func__); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1146 | scn->fastpath_mode_on = true; |
| 1147 | } |
| 1148 | |
| 1149 | /** |
| 1150 | * hif_is_fastpath_mode_enabled - API to query if fasthpath mode is enabled |
| 1151 | * @hif_ctx: HIF Context |
| 1152 | * |
| 1153 | * For use in data path to skip HTC |
| 1154 | * |
| 1155 | * Return: bool |
| 1156 | */ |
| 1157 | bool hif_is_fastpath_mode_enabled(struct hif_opaque_softc *hif_ctx) |
| 1158 | { |
| 1159 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1160 | |
| 1161 | return scn->fastpath_mode_on; |
| 1162 | } |
| 1163 | |
| 1164 | /** |
| 1165 | * hif_get_ce_handle - API to get CE handle for FastPath mode |
| 1166 | * @hif_ctx: HIF Context |
| 1167 | * @id: CopyEngine Id |
| 1168 | * |
| 1169 | * API to return CE handle for fastpath mode |
| 1170 | * |
| 1171 | * Return: void |
| 1172 | */ |
| 1173 | void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int id) |
| 1174 | { |
| 1175 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1176 | |
| 1177 | return scn->ce_id_to_state[id]; |
| 1178 | } |
| 1179 | |
| 1180 | /** |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1181 | * ce_h2t_tx_ce_cleanup() Place holder function for H2T CE cleanup. |
| 1182 | * No processing is required inside this function. |
| 1183 | * @ce_hdl: Cope engine handle |
| 1184 | * Using an assert, this function makes sure that, |
| 1185 | * the TX CE has been processed completely. |
Houston Hoffman | 9a831ef | 2015-09-03 14:42:40 -0700 | [diff] [blame] | 1186 | * |
| 1187 | * This is called while dismantling CE structures. No other thread |
| 1188 | * should be using these structures while dismantling is occuring |
| 1189 | * therfore no locking is needed. |
| 1190 | * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1191 | * Return: none |
| 1192 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1193 | void ce_h2t_tx_ce_cleanup(struct CE_handle *ce_hdl) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1194 | { |
| 1195 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1196 | struct CE_ring_state *src_ring = ce_state->src_ring; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1197 | struct hif_softc *sc = ce_state->scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1198 | uint32_t sw_index, write_index; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1199 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1200 | if (hif_is_nss_wifi_enabled(sc)) |
| 1201 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1202 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1203 | if (sc->fastpath_mode_on && ce_state->htt_tx_data) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1204 | HIF_DBG("%s %d Fastpath mode ON, Cleaning up HTT Tx CE", |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1205 | __func__, __LINE__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1206 | sw_index = src_ring->sw_index; |
| 1207 | write_index = src_ring->sw_index; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1208 | |
| 1209 | /* At this point Tx CE should be clean */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1210 | qdf_assert_always(sw_index == write_index); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1211 | } |
| 1212 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1213 | |
| 1214 | /** |
| 1215 | * ce_t2h_msg_ce_cleanup() - Cleanup buffers on the t2h datapath msg queue. |
| 1216 | * @ce_hdl: Handle to CE |
| 1217 | * |
| 1218 | * These buffers are never allocated on the fly, but |
| 1219 | * are allocated only once during HIF start and freed |
| 1220 | * only once during HIF stop. |
| 1221 | * NOTE: |
| 1222 | * The assumption here is there is no in-flight DMA in progress |
| 1223 | * currently, so that buffers can be freed up safely. |
| 1224 | * |
| 1225 | * Return: NONE |
| 1226 | */ |
| 1227 | void ce_t2h_msg_ce_cleanup(struct CE_handle *ce_hdl) |
| 1228 | { |
| 1229 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1230 | struct CE_ring_state *dst_ring = ce_state->dest_ring; |
| 1231 | qdf_nbuf_t nbuf; |
| 1232 | int i; |
| 1233 | |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1234 | if (ce_state->scn->fastpath_mode_on == false) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1235 | return; |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1236 | |
| 1237 | if (!ce_state->htt_rx_data) |
| 1238 | return; |
| 1239 | |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1240 | /* |
| 1241 | * when fastpath_mode is on and for datapath CEs. Unlike other CE's, |
| 1242 | * this CE is completely full: does not leave one blank space, to |
| 1243 | * distinguish between empty queue & full queue. So free all the |
| 1244 | * entries. |
| 1245 | */ |
| 1246 | for (i = 0; i < dst_ring->nentries; i++) { |
| 1247 | nbuf = dst_ring->per_transfer_context[i]; |
| 1248 | |
| 1249 | /* |
| 1250 | * The reasons for doing this check are: |
| 1251 | * 1) Protect against calling cleanup before allocating buffers |
| 1252 | * 2) In a corner case, FASTPATH_mode_on may be set, but we |
| 1253 | * could have a partially filled ring, because of a memory |
| 1254 | * allocation failure in the middle of allocating ring. |
| 1255 | * This check accounts for that case, checking |
| 1256 | * fastpath_mode_on flag or started flag would not have |
| 1257 | * covered that case. This is not in performance path, |
| 1258 | * so OK to do this. |
| 1259 | */ |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1260 | if (nbuf) { |
| 1261 | qdf_nbuf_unmap_single(ce_state->scn->qdf_dev, nbuf, |
| 1262 | QDF_DMA_FROM_DEVICE); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1263 | qdf_nbuf_free(nbuf); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1264 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1265 | } |
| 1266 | } |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1267 | |
| 1268 | /** |
| 1269 | * hif_update_fastpath_recv_bufs_cnt() - Increments the Rx buf count by 1 |
| 1270 | * @scn: HIF handle |
| 1271 | * |
| 1272 | * Datapath Rx CEs are special case, where we reuse all the message buffers. |
| 1273 | * Hence we have to post all the entries in the pipe, even, in the beginning |
| 1274 | * unlike for other CE pipes where one less than dest_nentries are filled in |
| 1275 | * the beginning. |
| 1276 | * |
| 1277 | * Return: None |
| 1278 | */ |
| 1279 | static void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
| 1280 | { |
| 1281 | int pipe_num; |
| 1282 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1283 | |
| 1284 | if (scn->fastpath_mode_on == false) |
| 1285 | return; |
| 1286 | |
| 1287 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1288 | struct HIF_CE_pipe_info *pipe_info = |
| 1289 | &hif_state->pipe_info[pipe_num]; |
| 1290 | struct CE_state *ce_state = |
| 1291 | scn->ce_id_to_state[pipe_info->pipe_num]; |
| 1292 | |
| 1293 | if (ce_state->htt_rx_data) |
| 1294 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 1295 | } |
| 1296 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1297 | #else |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1298 | static inline void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1299 | { |
| 1300 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1301 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1302 | static inline bool ce_is_fastpath_enabled(struct hif_softc *scn) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1303 | { |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1304 | return false; |
| 1305 | } |
| 1306 | |
| 1307 | static inline bool ce_is_fastpath_handler_registered(struct CE_state *ce_state) |
| 1308 | { |
| 1309 | return false; |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1310 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1311 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 1312 | |
| 1313 | void ce_fini(struct CE_handle *copyeng) |
| 1314 | { |
| 1315 | struct CE_state *CE_state = (struct CE_state *)copyeng; |
| 1316 | unsigned int CE_id = CE_state->id; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1317 | struct hif_softc *scn = CE_state->scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1318 | |
| 1319 | CE_state->state = CE_UNUSED; |
| 1320 | scn->ce_id_to_state[CE_id] = NULL; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1321 | |
| 1322 | qdf_spinlock_destroy(&CE_state->lro_unloading_lock); |
| 1323 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame] | 1324 | qdf_lro_deinit(CE_state->lro_data); |
| 1325 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1326 | if (CE_state->src_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1327 | /* Cleanup the datapath Tx ring */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1328 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1329 | |
| 1330 | if (CE_state->src_ring->shadow_base_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1331 | qdf_mem_free(CE_state->src_ring->shadow_base_unaligned); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1332 | if (CE_state->src_ring->base_addr_owner_space_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1333 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1334 | scn->qdf_dev->dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1335 | (CE_state->src_ring->nentries * |
| 1336 | sizeof(struct CE_src_desc) + |
| 1337 | CE_DESC_RING_ALIGN), |
| 1338 | CE_state->src_ring-> |
| 1339 | base_addr_owner_space_unaligned, |
| 1340 | CE_state->src_ring-> |
| 1341 | base_addr_CE_space, 0); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1342 | qdf_mem_free(CE_state->src_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1343 | } |
| 1344 | if (CE_state->dest_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1345 | /* Cleanup the datapath Rx ring */ |
| 1346 | ce_t2h_msg_ce_cleanup(copyeng); |
| 1347 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1348 | if (CE_state->dest_ring->base_addr_owner_space_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1349 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1350 | scn->qdf_dev->dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1351 | (CE_state->dest_ring->nentries * |
| 1352 | sizeof(struct CE_dest_desc) + |
| 1353 | CE_DESC_RING_ALIGN), |
| 1354 | CE_state->dest_ring-> |
| 1355 | base_addr_owner_space_unaligned, |
| 1356 | CE_state->dest_ring-> |
| 1357 | base_addr_CE_space, 0); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1358 | qdf_mem_free(CE_state->dest_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1359 | |
| 1360 | /* epping */ |
| 1361 | if (CE_state->timer_inited) { |
| 1362 | CE_state->timer_inited = false; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1363 | qdf_timer_free(&CE_state->poll_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1364 | } |
| 1365 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1366 | if ((ce_srng_based(CE_state->scn)) && (CE_state->status_ring)) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1367 | /* Cleanup the datapath Tx ring */ |
| 1368 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1369 | |
| 1370 | if (CE_state->status_ring->shadow_base_unaligned) |
| 1371 | qdf_mem_free( |
| 1372 | CE_state->status_ring->shadow_base_unaligned); |
| 1373 | |
| 1374 | if (CE_state->status_ring->base_addr_owner_space_unaligned) |
| 1375 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1376 | scn->qdf_dev->dev, |
| 1377 | (CE_state->status_ring->nentries * |
| 1378 | sizeof(struct CE_src_desc) + |
| 1379 | CE_DESC_RING_ALIGN), |
| 1380 | CE_state->status_ring-> |
| 1381 | base_addr_owner_space_unaligned, |
| 1382 | CE_state->status_ring-> |
| 1383 | base_addr_CE_space, 0); |
| 1384 | qdf_mem_free(CE_state->status_ring); |
| 1385 | } |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1386 | |
| 1387 | qdf_spinlock_destroy(&CE_state->ce_index_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1388 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1389 | } |
| 1390 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1391 | void hif_detach_htc(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1392 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1393 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1394 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1395 | qdf_mem_zero(&hif_state->msg_callbacks_pending, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1396 | sizeof(hif_state->msg_callbacks_pending)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1397 | qdf_mem_zero(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1398 | sizeof(hif_state->msg_callbacks_current)); |
| 1399 | } |
| 1400 | |
| 1401 | /* Send the first nbytes bytes of the buffer */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1402 | QDF_STATUS |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1403 | hif_send_head(struct hif_opaque_softc *hif_ctx, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1404 | uint8_t pipe, unsigned int transfer_id, unsigned int nbytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1405 | qdf_nbuf_t nbuf, unsigned int data_attr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1406 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1407 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1408 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1409 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 1410 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 1411 | int bytes = nbytes, nfrags = 0; |
| 1412 | struct ce_sendlist sendlist; |
| 1413 | int status, i = 0; |
| 1414 | unsigned int mux_id = 0; |
| 1415 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1416 | QDF_ASSERT(nbytes <= qdf_nbuf_len(nbuf)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1417 | |
| 1418 | transfer_id = |
| 1419 | (mux_id & MUX_ID_MASK) | |
| 1420 | (transfer_id & TRANSACTION_ID_MASK); |
| 1421 | data_attr &= DESC_DATA_FLAG_MASK; |
| 1422 | /* |
| 1423 | * The common case involves sending multiple fragments within a |
| 1424 | * single download (the tx descriptor and the tx frame header). |
| 1425 | * So, optimize for the case of multiple fragments by not even |
| 1426 | * checking whether it's necessary to use a sendlist. |
| 1427 | * The overhead of using a sendlist for a single buffer download |
| 1428 | * is not a big deal, since it happens rarely (for WMI messages). |
| 1429 | */ |
| 1430 | ce_sendlist_init(&sendlist); |
| 1431 | do { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1432 | qdf_dma_addr_t frag_paddr; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1433 | int frag_bytes; |
| 1434 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1435 | frag_paddr = qdf_nbuf_get_frag_paddr(nbuf, nfrags); |
| 1436 | frag_bytes = qdf_nbuf_get_frag_len(nbuf, nfrags); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1437 | /* |
| 1438 | * Clear the packet offset for all but the first CE desc. |
| 1439 | */ |
| 1440 | if (i++ > 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1441 | data_attr &= ~QDF_CE_TX_PKT_OFFSET_BIT_M; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1442 | |
| 1443 | status = ce_sendlist_buf_add(&sendlist, frag_paddr, |
| 1444 | frag_bytes > |
| 1445 | bytes ? bytes : frag_bytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1446 | qdf_nbuf_get_frag_is_wordstream |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1447 | (nbuf, |
| 1448 | nfrags) ? 0 : |
| 1449 | CE_SEND_FLAG_SWAP_DISABLE, |
| 1450 | data_attr); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1451 | if (status != QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1452 | HIF_ERROR("%s: error, frag_num %d larger than limit", |
| 1453 | __func__, nfrags); |
| 1454 | return status; |
| 1455 | } |
| 1456 | bytes -= frag_bytes; |
| 1457 | nfrags++; |
| 1458 | } while (bytes > 0); |
| 1459 | |
| 1460 | /* Make sure we have resources to handle this request */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1461 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1462 | if (pipe_info->num_sends_allowed < nfrags) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1463 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1464 | ce_pkt_error_count_incr(hif_state, HIF_PIPE_NO_RESOURCE); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1465 | return QDF_STATUS_E_RESOURCES; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1466 | } |
| 1467 | pipe_info->num_sends_allowed -= nfrags; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1468 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1469 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1470 | if (qdf_unlikely(ce_hdl == NULL)) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1471 | HIF_ERROR("%s: error CE handle is null", __func__); |
| 1472 | return A_ERROR; |
| 1473 | } |
| 1474 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1475 | QDF_NBUF_UPDATE_TX_PKT_COUNT(nbuf, QDF_NBUF_TX_PKT_HIF); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1476 | DPTRACE(qdf_dp_trace(nbuf, QDF_DP_TRACE_HIF_PACKET_PTR_RECORD, |
Nandha Kishore Easwaran | e43583f | 2017-05-15 21:01:13 +0530 | [diff] [blame] | 1477 | QDF_TRACE_DEFAULT_PDEV_ID, qdf_nbuf_data_addr(nbuf), |
| 1478 | sizeof(qdf_nbuf_data(nbuf)), QDF_TX)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1479 | status = ce_sendlist_send(ce_hdl, nbuf, &sendlist, transfer_id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1480 | QDF_ASSERT(status == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1481 | |
| 1482 | return status; |
| 1483 | } |
| 1484 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1485 | void hif_send_complete_check(struct hif_opaque_softc *hif_ctx, uint8_t pipe, |
| 1486 | int force) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1487 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1488 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 1489 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1490 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1491 | if (!force) { |
| 1492 | int resources; |
| 1493 | /* |
| 1494 | * Decide whether to actually poll for completions, or just |
| 1495 | * wait for a later chance. If there seem to be plenty of |
| 1496 | * resources left, then just wait, since checking involves |
| 1497 | * reading a CE register, which is a relatively expensive |
| 1498 | * operation. |
| 1499 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1500 | resources = hif_get_free_queue_number(hif_ctx, pipe); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1501 | /* |
| 1502 | * If at least 50% of the total resources are still available, |
| 1503 | * don't bother checking again yet. |
| 1504 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1505 | if (resources > (hif_state->host_ce_config[pipe].src_nentries >> |
| 1506 | 1)) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1507 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1508 | } |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 1509 | #if ATH_11AC_TXCOMPACT |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1510 | ce_per_engine_servicereap(scn, pipe); |
| 1511 | #else |
| 1512 | ce_per_engine_service(scn, pipe); |
| 1513 | #endif |
| 1514 | } |
| 1515 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1516 | uint16_t |
| 1517 | hif_get_free_queue_number(struct hif_opaque_softc *hif_ctx, uint8_t pipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1518 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1519 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1520 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 1521 | uint16_t rv; |
| 1522 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1523 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1524 | rv = pipe_info->num_sends_allowed; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1525 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1526 | return rv; |
| 1527 | } |
| 1528 | |
| 1529 | /* Called by lower (CE) layer when a send to Target completes. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1530 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1531 | hif_pci_ce_send_done(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1532 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1533 | unsigned int nbytes, unsigned int transfer_id, |
| 1534 | unsigned int sw_index, unsigned int hw_index, |
| 1535 | unsigned int toeplitz_hash_result) |
| 1536 | { |
| 1537 | struct HIF_CE_pipe_info *pipe_info = |
| 1538 | (struct HIF_CE_pipe_info *)ce_context; |
| 1539 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1540 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1541 | unsigned int sw_idx = sw_index, hw_idx = hw_index; |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1542 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1543 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1544 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1545 | do { |
| 1546 | /* |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1547 | * The upper layer callback will be triggered |
| 1548 | * when last fragment is complteted. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1549 | */ |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1550 | if (transfer_context != CE_SENDLIST_ITEM_CTXT) { |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1551 | if (scn->target_status == TARGET_STATUS_RESET) { |
| 1552 | |
| 1553 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 1554 | transfer_context, |
| 1555 | QDF_DMA_TO_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1556 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1557 | } else |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 1558 | msg_callbacks->txCompletionHandler( |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1559 | msg_callbacks->Context, |
| 1560 | transfer_context, transfer_id, |
| 1561 | toeplitz_hash_result); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1562 | } |
| 1563 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1564 | qdf_spin_lock(&pipe_info->completion_freeq_lock); |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1565 | pipe_info->num_sends_allowed++; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1566 | qdf_spin_unlock(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1567 | } while (ce_completed_send_next(copyeng, |
| 1568 | &ce_context, &transfer_context, |
| 1569 | &CE_data, &nbytes, &transfer_id, |
| 1570 | &sw_idx, &hw_idx, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1571 | &toeplitz_hash_result) == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1572 | } |
| 1573 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1574 | /** |
| 1575 | * hif_ce_do_recv(): send message from copy engine to upper layers |
| 1576 | * @msg_callbacks: structure containing callback and callback context |
| 1577 | * @netbuff: skb containing message |
| 1578 | * @nbytes: number of bytes in the message |
| 1579 | * @pipe_info: used for the pipe_number info |
| 1580 | * |
| 1581 | * Checks the packet length, configures the lenght in the netbuff, |
| 1582 | * and calls the upper layer callback. |
| 1583 | * |
| 1584 | * return: None |
| 1585 | */ |
| 1586 | static inline void hif_ce_do_recv(struct hif_msg_callbacks *msg_callbacks, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1587 | qdf_nbuf_t netbuf, int nbytes, |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1588 | struct HIF_CE_pipe_info *pipe_info) { |
| 1589 | if (nbytes <= pipe_info->buf_sz) { |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1590 | qdf_nbuf_set_pktlen(netbuf, nbytes); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1591 | msg_callbacks-> |
| 1592 | rxCompletionHandler(msg_callbacks->Context, |
| 1593 | netbuf, pipe_info->pipe_num); |
| 1594 | } else { |
Jeff Johnson | b945021 | 2017-09-18 10:12:38 -0700 | [diff] [blame] | 1595 | HIF_ERROR("%s: Invalid Rx msg buf:%pK nbytes:%d", |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1596 | __func__, netbuf, nbytes); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1597 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1598 | qdf_nbuf_free(netbuf); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1599 | } |
| 1600 | } |
| 1601 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1602 | /* Called by lower (CE) layer when data is received from the Target. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1603 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1604 | hif_pci_ce_recv_data(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1605 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1606 | unsigned int nbytes, unsigned int transfer_id, |
| 1607 | unsigned int flags) |
| 1608 | { |
| 1609 | struct HIF_CE_pipe_info *pipe_info = |
| 1610 | (struct HIF_CE_pipe_info *)ce_context; |
| 1611 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 1612 | struct CE_state *ce_state = (struct CE_state *) copyeng; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1613 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | e02e12d | 2016-03-14 21:11:36 -0700 | [diff] [blame] | 1614 | #ifdef HIF_PCI |
| 1615 | struct hif_pci_softc *hif_pci_sc = HIF_GET_PCI_SOFTC(hif_state); |
| 1616 | #endif |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1617 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1618 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1619 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1620 | do { |
Houston Hoffman | e02e12d | 2016-03-14 21:11:36 -0700 | [diff] [blame] | 1621 | #ifdef HIF_PCI |
| 1622 | hif_pm_runtime_mark_last_busy(hif_pci_sc->dev); |
| 1623 | #endif |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1624 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 1625 | (qdf_nbuf_t) transfer_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1626 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1627 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1628 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 1629 | hif_post_recv_buffers_for_pipe(pipe_info); |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 1630 | if (scn->target_status == TARGET_STATUS_RESET) |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1631 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 1632 | else |
| 1633 | hif_ce_do_recv(msg_callbacks, transfer_context, |
Houston Hoffman | 9c0f80a | 2015-09-28 18:36:36 -0700 | [diff] [blame] | 1634 | nbytes, pipe_info); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1635 | |
| 1636 | /* Set up force_break flag if num of receices reaches |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1637 | * MAX_NUM_OF_RECEIVES |
| 1638 | */ |
Houston Hoffman | 5bf441a | 2015-09-02 11:52:10 -0700 | [diff] [blame] | 1639 | ce_state->receive_count++; |
Houston Hoffman | 0565272 | 2016-04-29 16:58:59 -0700 | [diff] [blame] | 1640 | if (qdf_unlikely(hif_ce_service_should_yield(scn, ce_state))) { |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 1641 | ce_state->force_break = 1; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1642 | break; |
| 1643 | } |
| 1644 | } while (ce_completed_recv_next(copyeng, &ce_context, &transfer_context, |
| 1645 | &CE_data, &nbytes, &transfer_id, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1646 | &flags) == QDF_STATUS_SUCCESS); |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 1647 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1648 | } |
| 1649 | |
| 1650 | /* TBDXXX: Set CE High Watermark; invoke txResourceAvailHandler in response */ |
| 1651 | |
| 1652 | void |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1653 | hif_post_init(struct hif_opaque_softc *hif_ctx, void *unused, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1654 | struct hif_msg_callbacks *callbacks) |
| 1655 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1656 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1657 | |
| 1658 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 1659 | spin_lock_init(&pcie_access_log_lock); |
| 1660 | #endif |
| 1661 | /* Save callbacks for later installation */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1662 | qdf_mem_copy(&hif_state->msg_callbacks_pending, callbacks, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1663 | sizeof(hif_state->msg_callbacks_pending)); |
| 1664 | |
| 1665 | } |
| 1666 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1667 | static int hif_completion_thread_startup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1668 | { |
| 1669 | struct CE_handle *ce_diag = hif_state->ce_diag; |
| 1670 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1671 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1672 | struct hif_msg_callbacks *hif_msg_callbacks = |
| 1673 | &hif_state->msg_callbacks_current; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1674 | |
| 1675 | /* daemonize("hif_compl_thread"); */ |
| 1676 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1677 | if (scn->ce_count == 0) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 1678 | HIF_ERROR("%s: Invalid ce_count", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1679 | return -EINVAL; |
| 1680 | } |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1681 | |
| 1682 | if (!hif_msg_callbacks || |
| 1683 | !hif_msg_callbacks->rxCompletionHandler || |
| 1684 | !hif_msg_callbacks->txCompletionHandler) { |
| 1685 | HIF_ERROR("%s: no completion handler registered", __func__); |
| 1686 | return -EFAULT; |
| 1687 | } |
| 1688 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1689 | A_TARGET_ACCESS_LIKELY(scn); |
| 1690 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1691 | struct CE_attr attr; |
| 1692 | struct HIF_CE_pipe_info *pipe_info; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1693 | |
| 1694 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1695 | if (pipe_info->ce_hdl == ce_diag) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1696 | continue; /* Handle Diagnostic CE specially */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 1697 | attr = hif_state->host_ce_config[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1698 | if (attr.src_nentries) { |
| 1699 | /* pipe used to send to target */ |
Jeff Johnson | b945021 | 2017-09-18 10:12:38 -0700 | [diff] [blame] | 1700 | HIF_DBG("%s: pipe_num:%d pipe_info:0x%pK", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1701 | __func__, pipe_num, pipe_info); |
| 1702 | ce_send_cb_register(pipe_info->ce_hdl, |
| 1703 | hif_pci_ce_send_done, pipe_info, |
| 1704 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1705 | pipe_info->num_sends_allowed = attr.src_nentries - 1; |
| 1706 | } |
| 1707 | if (attr.dest_nentries) { |
| 1708 | /* pipe used to receive from target */ |
| 1709 | ce_recv_cb_register(pipe_info->ce_hdl, |
| 1710 | hif_pci_ce_recv_data, pipe_info, |
| 1711 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1712 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 1713 | |
| 1714 | if (attr.src_nentries) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1715 | qdf_spinlock_create(&pipe_info->completion_freeq_lock); |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1716 | |
| 1717 | qdf_mem_copy(&pipe_info->pipe_callbacks, hif_msg_callbacks, |
| 1718 | sizeof(pipe_info->pipe_callbacks)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1719 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 1720 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1721 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 1722 | return 0; |
| 1723 | } |
| 1724 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1725 | /* |
| 1726 | * Install pending msg callbacks. |
| 1727 | * |
| 1728 | * TBDXXX: This hack is needed because upper layers install msg callbacks |
| 1729 | * for use with HTC before BMI is done; yet this HIF implementation |
| 1730 | * needs to continue to use BMI msg callbacks. Really, upper layers |
| 1731 | * should not register HTC callbacks until AFTER BMI phase. |
| 1732 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1733 | static void hif_msg_callbacks_install(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1734 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1735 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1736 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1737 | qdf_mem_copy(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1738 | &hif_state->msg_callbacks_pending, |
| 1739 | sizeof(hif_state->msg_callbacks_pending)); |
| 1740 | } |
| 1741 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1742 | void hif_get_default_pipe(struct hif_opaque_softc *hif_hdl, uint8_t *ULPipe, |
| 1743 | uint8_t *DLPipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1744 | { |
| 1745 | int ul_is_polled, dl_is_polled; |
| 1746 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1747 | (void)hif_map_service_to_pipe(hif_hdl, HTC_CTRL_RSVD_SVC, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1748 | ULPipe, DLPipe, &ul_is_polled, &dl_is_polled); |
| 1749 | } |
| 1750 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1751 | /** |
| 1752 | * hif_dump_pipe_debug_count() - Log error count |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1753 | * @scn: hif_softc pointer. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1754 | * |
| 1755 | * Output the pipe error counts of each pipe to log file |
| 1756 | * |
| 1757 | * Return: N/A |
| 1758 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1759 | void hif_dump_pipe_debug_count(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1760 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1761 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1762 | int pipe_num; |
| 1763 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1764 | if (hif_state == NULL) { |
| 1765 | HIF_ERROR("%s hif_state is NULL", __func__); |
| 1766 | return; |
| 1767 | } |
| 1768 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1769 | struct HIF_CE_pipe_info *pipe_info; |
| 1770 | |
| 1771 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 1772 | |
| 1773 | if (pipe_info->nbuf_alloc_err_count > 0 || |
| 1774 | pipe_info->nbuf_dma_err_count > 0 || |
| 1775 | pipe_info->nbuf_ce_enqueue_err_count) |
| 1776 | HIF_ERROR( |
| 1777 | "%s: pipe_id = %d, recv_bufs_needed = %d, nbuf_alloc_err_count = %u, nbuf_dma_err_count = %u, nbuf_ce_enqueue_err_count = %u", |
| 1778 | __func__, pipe_info->pipe_num, |
| 1779 | atomic_read(&pipe_info->recv_bufs_needed), |
| 1780 | pipe_info->nbuf_alloc_err_count, |
| 1781 | pipe_info->nbuf_dma_err_count, |
| 1782 | pipe_info->nbuf_ce_enqueue_err_count); |
| 1783 | } |
| 1784 | } |
| 1785 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1786 | static void hif_post_recv_buffers_failure(struct HIF_CE_pipe_info *pipe_info, |
| 1787 | void *nbuf, uint32_t *error_cnt, |
| 1788 | enum hif_ce_event_type failure_type, |
| 1789 | const char *failure_type_string) |
| 1790 | { |
| 1791 | int bufs_needed_tmp = atomic_inc_return(&pipe_info->recv_bufs_needed); |
| 1792 | struct CE_state *CE_state = (struct CE_state *)pipe_info->ce_hdl; |
| 1793 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
| 1794 | int ce_id = CE_state->id; |
| 1795 | uint32_t error_cnt_tmp; |
| 1796 | |
| 1797 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
| 1798 | error_cnt_tmp = ++(*error_cnt); |
| 1799 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Himanshu Agarwal | 38cea4a | 2017-03-30 19:02:52 +0530 | [diff] [blame] | 1800 | HIF_DBG("%s: pipe_num %d, needed %d, err_cnt = %u, fail_type = %s", |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1801 | __func__, pipe_info->pipe_num, bufs_needed_tmp, error_cnt_tmp, |
| 1802 | failure_type_string); |
| 1803 | hif_record_ce_desc_event(scn, ce_id, failure_type, |
| 1804 | NULL, nbuf, bufs_needed_tmp); |
| 1805 | /* if we fail to allocate the last buffer for an rx pipe, |
| 1806 | * there is no trigger to refill the ce and we will |
| 1807 | * eventually crash |
| 1808 | */ |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 1809 | if (bufs_needed_tmp == CE_state->dest_ring->nentries - 1) |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1810 | qdf_sched_work(scn->qdf_dev, &CE_state->oom_allocation_work); |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 1811 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1812 | } |
| 1813 | |
| 1814 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1815 | |
| 1816 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1817 | QDF_STATUS hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1818 | { |
| 1819 | struct CE_handle *ce_hdl; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1820 | qdf_size_t buf_sz; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1821 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1822 | QDF_STATUS status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1823 | uint32_t bufs_posted = 0; |
| 1824 | |
| 1825 | buf_sz = pipe_info->buf_sz; |
| 1826 | if (buf_sz == 0) { |
| 1827 | /* Unused Copy Engine */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1828 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1829 | } |
| 1830 | |
| 1831 | ce_hdl = pipe_info->ce_hdl; |
| 1832 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1833 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1834 | while (atomic_read(&pipe_info->recv_bufs_needed) > 0) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1835 | qdf_dma_addr_t CE_data; /* CE space buffer address */ |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1836 | qdf_nbuf_t nbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1837 | |
| 1838 | atomic_dec(&pipe_info->recv_bufs_needed); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1839 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1840 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1841 | nbuf = qdf_nbuf_alloc(scn->qdf_dev, buf_sz, 0, 4, false); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1842 | if (!nbuf) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1843 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1844 | &pipe_info->nbuf_alloc_err_count, |
| 1845 | HIF_RX_NBUF_ALLOC_FAILURE, |
| 1846 | "HIF_RX_NBUF_ALLOC_FAILURE"); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1847 | return QDF_STATUS_E_NOMEM; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1848 | } |
| 1849 | |
| 1850 | /* |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1851 | * qdf_nbuf_peek_header(nbuf, &data, &unused); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1852 | * CE_data = dma_map_single(dev, data, buf_sz, ); |
| 1853 | * DMA_FROM_DEVICE); |
| 1854 | */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1855 | status = qdf_nbuf_map_single(scn->qdf_dev, nbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1856 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1857 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1858 | if (qdf_unlikely(status != QDF_STATUS_SUCCESS)) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1859 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1860 | &pipe_info->nbuf_dma_err_count, |
| 1861 | HIF_RX_NBUF_MAP_FAILURE, |
| 1862 | "HIF_RX_NBUF_MAP_FAILURE"); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1863 | qdf_nbuf_free(nbuf); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1864 | return status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1865 | } |
| 1866 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1867 | CE_data = qdf_nbuf_get_frag_paddr(nbuf, 0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1868 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1869 | qdf_mem_dma_sync_single_for_device(scn->qdf_dev, CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1870 | buf_sz, DMA_FROM_DEVICE); |
| 1871 | status = ce_recv_buf_enqueue(ce_hdl, (void *)nbuf, CE_data); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1872 | if (qdf_unlikely(status != QDF_STATUS_SUCCESS)) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1873 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1874 | &pipe_info->nbuf_ce_enqueue_err_count, |
| 1875 | HIF_RX_NBUF_ENQUEUE_FAILURE, |
| 1876 | "HIF_RX_NBUF_ENQUEUE_FAILURE"); |
| 1877 | |
Govind Singh | 4fcafd4 | 2016-08-08 12:37:31 +0530 | [diff] [blame] | 1878 | qdf_nbuf_unmap_single(scn->qdf_dev, nbuf, |
| 1879 | QDF_DMA_FROM_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1880 | qdf_nbuf_free(nbuf); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1881 | return status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1882 | } |
| 1883 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1884 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1885 | bufs_posted++; |
| 1886 | } |
| 1887 | pipe_info->nbuf_alloc_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1888 | (pipe_info->nbuf_alloc_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1889 | pipe_info->nbuf_alloc_err_count - bufs_posted : 0; |
| 1890 | pipe_info->nbuf_dma_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1891 | (pipe_info->nbuf_dma_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1892 | pipe_info->nbuf_dma_err_count - bufs_posted : 0; |
| 1893 | pipe_info->nbuf_ce_enqueue_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1894 | (pipe_info->nbuf_ce_enqueue_err_count > bufs_posted) ? |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1895 | pipe_info->nbuf_ce_enqueue_err_count - bufs_posted : 0; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1896 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1897 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1898 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1899 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1900 | } |
| 1901 | |
| 1902 | /* |
| 1903 | * Try to post all desired receive buffers for all pipes. |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 1904 | * Returns 0 for non fastpath rx copy engine as |
| 1905 | * oom_allocation_work will be scheduled to recover any |
| 1906 | * failures, non-zero if unable to completely replenish |
| 1907 | * receive buffers for fastpath rx Copy engine. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1908 | */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1909 | QDF_STATUS hif_post_recv_buffers(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1910 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1911 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1912 | int pipe_num; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1913 | struct CE_state *ce_state; |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1914 | QDF_STATUS qdf_status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1915 | |
| 1916 | A_TARGET_ACCESS_LIKELY(scn); |
| 1917 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1918 | struct HIF_CE_pipe_info *pipe_info; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1919 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1920 | ce_state = scn->ce_id_to_state[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1921 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1922 | |
| 1923 | if (hif_is_nss_wifi_enabled(scn) && |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1924 | ce_state && (ce_state->htt_rx_data)) |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1925 | continue; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1926 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1927 | qdf_status = hif_post_recv_buffers_for_pipe(pipe_info); |
| 1928 | if (!QDF_IS_STATUS_SUCCESS(qdf_status) && |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 1929 | ce_state->htt_rx_data && |
| 1930 | scn->fastpath_mode_on) { |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1931 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 1932 | return qdf_status; |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 1933 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1934 | } |
| 1935 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1936 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 1937 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1938 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1939 | } |
| 1940 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1941 | QDF_STATUS hif_start(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1942 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1943 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1944 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1945 | QDF_STATUS qdf_status = QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1946 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1947 | hif_update_fastpath_recv_bufs_cnt(scn); |
| 1948 | |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1949 | hif_msg_callbacks_install(scn); |
| 1950 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1951 | if (hif_completion_thread_startup(hif_state)) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1952 | return QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1953 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1954 | /* enable buffer cleanup */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1955 | hif_state->started = true; |
| 1956 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1957 | /* Post buffers once to start things off. */ |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1958 | qdf_status = hif_post_recv_buffers(scn); |
| 1959 | if (!QDF_IS_STATUS_SUCCESS(qdf_status)) { |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1960 | /* cleanup is done in hif_ce_disable */ |
| 1961 | HIF_ERROR("%s:failed to post buffers", __func__); |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1962 | return qdf_status; |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1963 | } |
| 1964 | |
Nachiket Kukade | e5738b5 | 2017-09-07 17:16:12 +0530 | [diff] [blame^] | 1965 | return qdf_status; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1966 | } |
| 1967 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1968 | static void hif_recv_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1969 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1970 | struct hif_softc *scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1971 | struct CE_handle *ce_hdl; |
| 1972 | uint32_t buf_sz; |
| 1973 | struct HIF_CE_state *hif_state; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1974 | qdf_nbuf_t netbuf; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1975 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1976 | void *per_CE_context; |
| 1977 | |
| 1978 | buf_sz = pipe_info->buf_sz; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1979 | /* Unused Copy Engine */ |
| 1980 | if (buf_sz == 0) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1981 | return; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1982 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1983 | |
| 1984 | hif_state = pipe_info->HIF_CE_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1985 | if (!hif_state->started) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1986 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1987 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1988 | scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1989 | ce_hdl = pipe_info->ce_hdl; |
| 1990 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1991 | if (scn->qdf_dev == NULL) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1992 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1993 | while (ce_revoke_recv_next |
| 1994 | (ce_hdl, &per_CE_context, (void **)&netbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1995 | &CE_data) == QDF_STATUS_SUCCESS) { |
Govind Singh | caa850e | 2017-04-20 16:41:36 +0530 | [diff] [blame] | 1996 | if (netbuf) { |
| 1997 | qdf_nbuf_unmap_single(scn->qdf_dev, netbuf, |
| 1998 | QDF_DMA_FROM_DEVICE); |
| 1999 | qdf_nbuf_free(netbuf); |
| 2000 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2001 | } |
| 2002 | } |
| 2003 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2004 | static void hif_send_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2005 | { |
| 2006 | struct CE_handle *ce_hdl; |
| 2007 | struct HIF_CE_state *hif_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2008 | struct hif_softc *scn; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 2009 | qdf_nbuf_t netbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2010 | void *per_CE_context; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2011 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2012 | unsigned int nbytes; |
| 2013 | unsigned int id; |
| 2014 | uint32_t buf_sz; |
| 2015 | uint32_t toeplitz_hash_result; |
| 2016 | |
| 2017 | buf_sz = pipe_info->buf_sz; |
| 2018 | if (buf_sz == 0) { |
| 2019 | /* Unused Copy Engine */ |
| 2020 | return; |
| 2021 | } |
| 2022 | |
| 2023 | hif_state = pipe_info->HIF_CE_state; |
| 2024 | if (!hif_state->started) { |
| 2025 | return; |
| 2026 | } |
| 2027 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2028 | scn = HIF_GET_SOFTC(hif_state); |
| 2029 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2030 | ce_hdl = pipe_info->ce_hdl; |
| 2031 | |
| 2032 | while (ce_cancel_send_next |
| 2033 | (ce_hdl, &per_CE_context, |
| 2034 | (void **)&netbuf, &CE_data, &nbytes, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2035 | &id, &toeplitz_hash_result) == QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2036 | if (netbuf != CE_SENDLIST_ITEM_CTXT) { |
| 2037 | /* |
| 2038 | * Packets enqueued by htt_h2t_ver_req_msg() and |
| 2039 | * htt_h2t_rx_ring_cfg_msg_ll() have already been |
| 2040 | * freed in htt_htc_misc_pkt_pool_free() in |
| 2041 | * wlantl_close(), so do not free them here again |
Houston Hoffman | 29573d9 | 2015-10-20 17:49:44 -0700 | [diff] [blame] | 2042 | * by checking whether it's the endpoint |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2043 | * which they are queued in. |
| 2044 | */ |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2045 | if (id == scn->htc_htt_tx_endpoint) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2046 | return; |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2047 | /* Indicate the completion to higher |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2048 | * layer to free the buffer |
| 2049 | */ |
| 2050 | if (pipe_info->pipe_callbacks.txCompletionHandler) |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2051 | pipe_info->pipe_callbacks. |
| 2052 | txCompletionHandler(pipe_info-> |
| 2053 | pipe_callbacks.Context, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2054 | netbuf, id, toeplitz_hash_result); |
| 2055 | } |
| 2056 | } |
| 2057 | } |
| 2058 | |
| 2059 | /* |
| 2060 | * Cleanup residual buffers for device shutdown: |
| 2061 | * buffers that were enqueued for receive |
| 2062 | * buffers that were to be sent |
| 2063 | * Note: Buffers that had completed but which were |
| 2064 | * not yet processed are on a completion queue. They |
| 2065 | * are handled when the completion thread shuts down. |
| 2066 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2067 | static void hif_buffer_cleanup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2068 | { |
| 2069 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2070 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2071 | struct CE_state *ce_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2072 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2073 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2074 | struct HIF_CE_pipe_info *pipe_info; |
| 2075 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2076 | ce_state = scn->ce_id_to_state[pipe_num]; |
| 2077 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 2078 | ((ce_state->htt_tx_data) || |
| 2079 | (ce_state->htt_rx_data))) { |
| 2080 | continue; |
| 2081 | } |
| 2082 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2083 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2084 | hif_recv_buffer_cleanup_on_pipe(pipe_info); |
| 2085 | hif_send_buffer_cleanup_on_pipe(pipe_info); |
| 2086 | } |
| 2087 | } |
| 2088 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2089 | void hif_flush_surprise_remove(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2090 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2091 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2092 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2093 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2094 | hif_buffer_cleanup(hif_state); |
| 2095 | } |
| 2096 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2097 | static void hif_destroy_oom_work(struct hif_softc *scn) |
| 2098 | { |
| 2099 | struct CE_state *ce_state; |
| 2100 | int ce_id; |
| 2101 | |
| 2102 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 2103 | ce_state = scn->ce_id_to_state[ce_id]; |
| 2104 | if (ce_state) |
| 2105 | qdf_destroy_work(scn->qdf_dev, |
| 2106 | &ce_state->oom_allocation_work); |
| 2107 | } |
| 2108 | } |
| 2109 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2110 | void hif_ce_stop(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2111 | { |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2112 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2113 | int pipe_num; |
| 2114 | |
Houston Hoffman | a69581e | 2016-11-14 18:03:19 -0800 | [diff] [blame] | 2115 | /* |
| 2116 | * before cleaning up any memory, ensure irq & |
| 2117 | * bottom half contexts will not be re-entered |
| 2118 | */ |
Houston Hoffman | 7622cd3 | 2017-04-06 14:17:49 -0700 | [diff] [blame] | 2119 | hif_disable_isr(&scn->osc); |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2120 | hif_destroy_oom_work(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2121 | scn->hif_init_done = false; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2122 | |
| 2123 | /* |
| 2124 | * At this point, asynchronous threads are stopped, |
| 2125 | * The Target should not DMA nor interrupt, Host code may |
| 2126 | * not initiate anything more. So we just need to clean |
| 2127 | * up Host-side state. |
| 2128 | */ |
| 2129 | |
| 2130 | if (scn->athdiag_procfs_inited) { |
| 2131 | athdiag_procfs_remove(); |
| 2132 | scn->athdiag_procfs_inited = false; |
| 2133 | } |
| 2134 | |
| 2135 | hif_buffer_cleanup(hif_state); |
| 2136 | |
| 2137 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2138 | struct HIF_CE_pipe_info *pipe_info; |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2139 | struct CE_attr attr; |
| 2140 | struct CE_handle *ce_diag = hif_state->ce_diag; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2141 | |
| 2142 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2143 | if (pipe_info->ce_hdl) { |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2144 | if (pipe_info->ce_hdl != ce_diag) { |
| 2145 | attr = hif_state->host_ce_config[pipe_num]; |
| 2146 | if (attr.src_nentries) |
| 2147 | qdf_spinlock_destroy(&pipe_info-> |
| 2148 | completion_freeq_lock); |
| 2149 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2150 | ce_fini(pipe_info->ce_hdl); |
| 2151 | pipe_info->ce_hdl = NULL; |
| 2152 | pipe_info->buf_sz = 0; |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2153 | qdf_spinlock_destroy(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2154 | } |
| 2155 | } |
| 2156 | |
| 2157 | if (hif_state->sleep_timer_init) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2158 | qdf_timer_stop(&hif_state->sleep_timer); |
| 2159 | qdf_timer_free(&hif_state->sleep_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2160 | hif_state->sleep_timer_init = false; |
| 2161 | } |
| 2162 | |
| 2163 | hif_state->started = false; |
| 2164 | } |
| 2165 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2166 | |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2167 | /** |
| 2168 | * hif_get_target_ce_config() - get copy engine configuration |
| 2169 | * @target_ce_config_ret: basic copy engine configuration |
| 2170 | * @target_ce_config_sz_ret: size of the basic configuration in bytes |
| 2171 | * @target_service_to_ce_map_ret: service mapping for the copy engines |
| 2172 | * @target_service_to_ce_map_sz_ret: size of the mapping in bytes |
| 2173 | * @target_shadow_reg_cfg_ret: shadow register configuration |
| 2174 | * @shadow_cfg_sz_ret: size of the shadow register configuration in bytes |
| 2175 | * |
| 2176 | * providing accessor to these values outside of this file. |
| 2177 | * currently these are stored in static pointers to const sections. |
| 2178 | * there are multiple configurations that are selected from at compile time. |
| 2179 | * Runtime selection would need to consider mode, target type and bus type. |
| 2180 | * |
| 2181 | * Return: return by parameter. |
| 2182 | */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2183 | void hif_get_target_ce_config(struct hif_softc *scn, |
| 2184 | struct CE_pipe_config **target_ce_config_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2185 | uint32_t *target_ce_config_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2186 | struct service_to_pipe **target_service_to_ce_map_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2187 | uint32_t *target_service_to_ce_map_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2188 | struct shadow_reg_cfg **target_shadow_reg_cfg_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2189 | uint32_t *shadow_cfg_sz_ret) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2190 | { |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2191 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2192 | |
| 2193 | *target_ce_config_ret = hif_state->target_ce_config; |
| 2194 | *target_ce_config_sz_ret = hif_state->target_ce_config_sz; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2195 | |
| 2196 | hif_select_service_to_pipe_map(scn, target_service_to_ce_map_ret, |
| 2197 | target_service_to_ce_map_sz_ret); |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2198 | |
| 2199 | if (target_shadow_reg_cfg_ret) |
| 2200 | *target_shadow_reg_cfg_ret = target_shadow_reg_cfg; |
| 2201 | |
| 2202 | if (shadow_cfg_sz_ret) |
| 2203 | *shadow_cfg_sz_ret = shadow_cfg_sz; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2204 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2205 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2206 | #ifdef CONFIG_SHADOW_V2 |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 2207 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2208 | { |
| 2209 | int i; |
| 2210 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 2211 | "%s: num_config %d\n", __func__, cfg->num_shadow_reg_v2_cfg); |
| 2212 | |
| 2213 | for (i = 0; i < cfg->num_shadow_reg_v2_cfg; i++) { |
| 2214 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO, |
| 2215 | "%s: i %d, val %x\n", __func__, i, |
| 2216 | cfg->shadow_reg_v2_cfg[i].addr); |
| 2217 | } |
| 2218 | } |
| 2219 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2220 | #else |
| 2221 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
| 2222 | { |
| 2223 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 2224 | "%s: CONFIG_SHADOW_V2 not defined\n", __func__); |
| 2225 | } |
| 2226 | #endif |
| 2227 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2228 | /** |
| 2229 | * hif_wlan_enable(): call the platform driver to enable wlan |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2230 | * @scn: HIF Context |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2231 | * |
| 2232 | * This function passes the con_mode and CE configuration to |
| 2233 | * platform driver to enable wlan. |
| 2234 | * |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2235 | * Return: linux error code |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2236 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2237 | int hif_wlan_enable(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2238 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2239 | struct pld_wlan_enable_cfg cfg; |
| 2240 | enum pld_driver_mode mode; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2241 | uint32_t con_mode = hif_get_conparam(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2242 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2243 | hif_get_target_ce_config(scn, |
| 2244 | (struct CE_pipe_config **)&cfg.ce_tgt_cfg, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2245 | &cfg.num_ce_tgt_cfg, |
| 2246 | (struct service_to_pipe **)&cfg.ce_svc_cfg, |
| 2247 | &cfg.num_ce_svc_pipe_cfg, |
| 2248 | (struct shadow_reg_cfg **)&cfg.shadow_reg_cfg, |
| 2249 | &cfg.num_shadow_reg_cfg); |
| 2250 | |
| 2251 | /* translate from structure size to array size */ |
| 2252 | cfg.num_ce_tgt_cfg /= sizeof(struct CE_pipe_config); |
| 2253 | cfg.num_ce_svc_pipe_cfg /= sizeof(struct service_to_pipe); |
| 2254 | cfg.num_shadow_reg_cfg /= sizeof(struct shadow_reg_cfg); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2255 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2256 | hif_prepare_hal_shadow_register_cfg(scn, &cfg.shadow_reg_v2_cfg, |
| 2257 | &cfg.num_shadow_reg_v2_cfg); |
| 2258 | |
| 2259 | hif_print_hal_shadow_register_cfg(&cfg); |
| 2260 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2261 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2262 | mode = PLD_FTM; |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2263 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2264 | mode = PLD_EPPING; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 2265 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2266 | mode = PLD_MISSION; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 2267 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2268 | if (BYPASS_QMI) |
| 2269 | return 0; |
| 2270 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2271 | return pld_wlan_enable(scn->qdf_dev->dev, &cfg, |
| 2272 | mode, QWLAN_VERSIONSTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2273 | } |
| 2274 | |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2275 | #define CE_EPPING_USES_IRQ true |
| 2276 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2277 | /** |
| 2278 | * hif_ce_prepare_config() - load the correct static tables. |
| 2279 | * @scn: hif context |
| 2280 | * |
| 2281 | * Epping uses different static attribute tables than mission mode. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2282 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2283 | void hif_ce_prepare_config(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2284 | { |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2285 | uint32_t mode = hif_get_conparam(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2286 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 2287 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2288 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2289 | |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 2290 | hif_state->ce_services = ce_services_attach(scn); |
| 2291 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 2292 | scn->ce_count = HOST_CE_COUNT; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2293 | /* if epping is enabled we need to use the epping configuration. */ |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2294 | if (QDF_IS_EPPING_ENABLED(mode)) { |
| 2295 | if (CE_EPPING_USES_IRQ) |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2296 | hif_state->host_ce_config = host_ce_config_wlan_epping_irq; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2297 | else |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2298 | hif_state->host_ce_config = host_ce_config_wlan_epping_poll; |
| 2299 | hif_state->target_ce_config = target_ce_config_wlan_epping; |
| 2300 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan_epping); |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 2301 | target_shadow_reg_cfg = target_shadow_reg_cfg_epping; |
| 2302 | shadow_cfg_sz = sizeof(target_shadow_reg_cfg_epping); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2303 | } |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2304 | |
| 2305 | switch (tgt_info->target_type) { |
| 2306 | default: |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2307 | hif_state->host_ce_config = host_ce_config_wlan; |
| 2308 | hif_state->target_ce_config = target_ce_config_wlan; |
| 2309 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2310 | break; |
| 2311 | case TARGET_TYPE_AR900B: |
| 2312 | case TARGET_TYPE_QCA9984: |
| 2313 | case TARGET_TYPE_IPQ4019: |
| 2314 | case TARGET_TYPE_QCA9888: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 2315 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_NO_PKTLOG_CFG)) { |
| 2316 | hif_state->host_ce_config = |
| 2317 | host_lowdesc_ce_cfg_wlan_ar900b_nopktlog; |
| 2318 | } else if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 2319 | hif_state->host_ce_config = |
| 2320 | host_lowdesc_ce_cfg_wlan_ar900b; |
| 2321 | } else { |
| 2322 | hif_state->host_ce_config = host_ce_config_wlan_ar900b; |
| 2323 | } |
| 2324 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2325 | hif_state->target_ce_config = target_ce_config_wlan_ar900b; |
| 2326 | hif_state->target_ce_config_sz = |
| 2327 | sizeof(target_ce_config_wlan_ar900b); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2328 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2329 | break; |
| 2330 | |
| 2331 | case TARGET_TYPE_AR9888: |
| 2332 | case TARGET_TYPE_AR9888V2: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 2333 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 2334 | hif_state->host_ce_config = host_lowdesc_ce_cfg_wlan_ar9888; |
| 2335 | } else { |
| 2336 | hif_state->host_ce_config = host_ce_config_wlan_ar9888; |
| 2337 | } |
| 2338 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2339 | hif_state->target_ce_config = target_ce_config_wlan_ar9888; |
| 2340 | hif_state->target_ce_config_sz = |
| 2341 | sizeof(target_ce_config_wlan_ar9888); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2342 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2343 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2344 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2345 | case TARGET_TYPE_QCA8074: |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 2346 | if (scn->bus_type == QDF_BUS_TYPE_PCI) { |
| 2347 | hif_state->host_ce_config = |
| 2348 | host_ce_config_wlan_qca8074_pci; |
| 2349 | hif_state->target_ce_config = |
| 2350 | target_ce_config_wlan_qca8074_pci; |
| 2351 | hif_state->target_ce_config_sz = |
| 2352 | sizeof(target_ce_config_wlan_qca8074_pci); |
| 2353 | } else { |
| 2354 | hif_state->host_ce_config = host_ce_config_wlan_qca8074; |
| 2355 | hif_state->target_ce_config = |
| 2356 | target_ce_config_wlan_qca8074; |
| 2357 | hif_state->target_ce_config_sz = |
| 2358 | sizeof(target_ce_config_wlan_qca8074); |
| 2359 | } |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2360 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2361 | case TARGET_TYPE_QCA6290: |
| 2362 | hif_state->host_ce_config = host_ce_config_wlan_qca6290; |
| 2363 | hif_state->target_ce_config = target_ce_config_wlan_qca6290; |
| 2364 | hif_state->target_ce_config_sz = |
| 2365 | sizeof(target_ce_config_wlan_qca6290); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2366 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 2367 | scn->ce_count = QCA_6290_CE_COUNT; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2368 | break; |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2369 | } |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2370 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2371 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2372 | /** |
| 2373 | * hif_ce_open() - do ce specific allocations |
| 2374 | * @hif_sc: pointer to hif context |
| 2375 | * |
| 2376 | * return: 0 for success or QDF_STATUS_E_NOMEM |
| 2377 | */ |
| 2378 | QDF_STATUS hif_ce_open(struct hif_softc *hif_sc) |
| 2379 | { |
| 2380 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2381 | |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 2382 | qdf_spinlock_create(&hif_state->irq_reg_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2383 | qdf_spinlock_create(&hif_state->keep_awake_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2384 | return QDF_STATUS_SUCCESS; |
| 2385 | } |
| 2386 | |
| 2387 | /** |
| 2388 | * hif_ce_close() - do ce specific free |
| 2389 | * @hif_sc: pointer to hif context |
| 2390 | */ |
| 2391 | void hif_ce_close(struct hif_softc *hif_sc) |
| 2392 | { |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 2393 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
| 2394 | |
| 2395 | qdf_spinlock_destroy(&hif_state->irq_reg_lock); |
Poddar, Siddarth | 725e9f5 | 2017-07-19 15:18:28 +0530 | [diff] [blame] | 2396 | qdf_spinlock_destroy(&hif_state->keep_awake_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2397 | } |
| 2398 | |
| 2399 | /** |
| 2400 | * hif_unconfig_ce() - ensure resources from hif_config_ce are freed |
| 2401 | * @hif_sc: hif context |
| 2402 | * |
| 2403 | * uses state variables to support cleaning up when hif_config_ce fails. |
| 2404 | */ |
| 2405 | void hif_unconfig_ce(struct hif_softc *hif_sc) |
| 2406 | { |
| 2407 | int pipe_num; |
| 2408 | struct HIF_CE_pipe_info *pipe_info; |
| 2409 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
| 2410 | |
| 2411 | for (pipe_num = 0; pipe_num < hif_sc->ce_count; pipe_num++) { |
| 2412 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2413 | if (pipe_info->ce_hdl) { |
| 2414 | ce_unregister_irq(hif_state, (1 << pipe_num)); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2415 | ce_fini(pipe_info->ce_hdl); |
| 2416 | pipe_info->ce_hdl = NULL; |
| 2417 | pipe_info->buf_sz = 0; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 2418 | qdf_spinlock_destroy(&pipe_info->recv_bufs_needed_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2419 | } |
| 2420 | } |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2421 | if (hif_sc->athdiag_procfs_inited) { |
| 2422 | athdiag_procfs_remove(); |
| 2423 | hif_sc->athdiag_procfs_inited = false; |
| 2424 | } |
| 2425 | } |
| 2426 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2427 | #ifdef CONFIG_BYPASS_QMI |
| 2428 | #define FW_SHARED_MEM (2 * 1024 * 1024) |
| 2429 | |
| 2430 | /** |
| 2431 | * hif_post_static_buf_to_target() - post static buffer to WLAN FW |
| 2432 | * @scn: pointer to HIF structure |
| 2433 | * |
| 2434 | * WLAN FW needs 2MB memory from DDR when QMI is disabled. |
| 2435 | * |
| 2436 | * Return: void |
| 2437 | */ |
| 2438 | static void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 2439 | { |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2440 | void *target_va; |
| 2441 | phys_addr_t target_pa; |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2442 | |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2443 | target_va = qdf_mem_alloc_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 2444 | FW_SHARED_MEM, &target_pa); |
| 2445 | if (NULL == target_va) { |
| 2446 | HIF_TRACE("Memory allocation failed could not post target buf"); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2447 | return; |
| 2448 | } |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2449 | hif_write32_mb(scn->mem + BYPASS_QMI_TEMP_REGISTER, target_pa); |
| 2450 | HIF_TRACE("target va %pK target pa %pa", target_va, &target_pa); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2451 | } |
| 2452 | #else |
| 2453 | static inline void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 2454 | { |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2455 | } |
| 2456 | #endif |
| 2457 | |
Houston Hoffman | 579c02f | 2017-08-02 01:57:38 -0700 | [diff] [blame] | 2458 | static int hif_srng_sleep_state_adjust(struct hif_softc *scn, bool sleep_ok, |
| 2459 | bool wait_for_it) |
| 2460 | { |
| 2461 | /* todo */ |
| 2462 | return 0; |
| 2463 | } |
| 2464 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2465 | /** |
| 2466 | * hif_config_ce() - configure copy engines |
| 2467 | * @scn: hif context |
| 2468 | * |
| 2469 | * Prepares fw, copy engine hardware and host sw according |
| 2470 | * to the attributes selected by hif_ce_prepare_config. |
| 2471 | * |
| 2472 | * also calls athdiag_procfs_init |
| 2473 | * |
| 2474 | * return: 0 for success nonzero for failure. |
| 2475 | */ |
| 2476 | int hif_config_ce(struct hif_softc *scn) |
| 2477 | { |
| 2478 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2479 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 2480 | struct HIF_CE_pipe_info *pipe_info; |
| 2481 | int pipe_num; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2482 | struct CE_state *ce_state; |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2483 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 2484 | int i; |
| 2485 | #endif |
| 2486 | QDF_STATUS rv = QDF_STATUS_SUCCESS; |
| 2487 | |
| 2488 | scn->notice_send = true; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2489 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2490 | hif_post_static_buf_to_target(scn); |
| 2491 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2492 | hif_state->fw_indicator_address = FW_INDICATOR_ADDRESS; |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2493 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2494 | hif_config_rri_on_ddr(scn); |
| 2495 | |
Houston Hoffman | 579c02f | 2017-08-02 01:57:38 -0700 | [diff] [blame] | 2496 | if (ce_srng_based(scn)) |
| 2497 | scn->bus_ops.hif_target_sleep_state_adjust = |
| 2498 | &hif_srng_sleep_state_adjust; |
| 2499 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2500 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2501 | struct CE_attr *attr; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2502 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2503 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2504 | pipe_info->pipe_num = pipe_num; |
| 2505 | pipe_info->HIF_CE_state = hif_state; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2506 | attr = &hif_state->host_ce_config[pipe_num]; |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 2507 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2508 | pipe_info->ce_hdl = ce_init(scn, pipe_num, attr); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2509 | ce_state = scn->ce_id_to_state[pipe_num]; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 2510 | qdf_spinlock_create(&pipe_info->recv_bufs_needed_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2511 | QDF_ASSERT(pipe_info->ce_hdl != NULL); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2512 | if (pipe_info->ce_hdl == NULL) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2513 | rv = QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2514 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2515 | goto err; |
| 2516 | } |
| 2517 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame] | 2518 | ce_state->lro_data = qdf_lro_init(); |
| 2519 | |
Kiran Venkatappa | e17e3b6 | 2017-02-10 16:31:49 +0530 | [diff] [blame] | 2520 | if (attr->flags & CE_ATTR_DIAG) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2521 | /* Reserve the ultimate CE for |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2522 | * Diagnostic Window support |
| 2523 | */ |
Houston Hoffman | c1d9a41 | 2016-03-30 21:07:57 -0700 | [diff] [blame] | 2524 | hif_state->ce_diag = pipe_info->ce_hdl; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2525 | continue; |
| 2526 | } |
| 2527 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2528 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 2529 | (ce_state->htt_rx_data)) |
| 2530 | continue; |
| 2531 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2532 | pipe_info->buf_sz = (qdf_size_t) (attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2533 | if (attr->dest_nentries > 0) { |
| 2534 | atomic_set(&pipe_info->recv_bufs_needed, |
| 2535 | init_buffer_count(attr->dest_nentries - 1)); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2536 | /*SRNG based CE has one entry less */ |
| 2537 | if (ce_srng_based(scn)) |
| 2538 | atomic_dec(&pipe_info->recv_bufs_needed); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2539 | } else { |
| 2540 | atomic_set(&pipe_info->recv_bufs_needed, 0); |
| 2541 | } |
| 2542 | ce_tasklet_init(hif_state, (1 << pipe_num)); |
| 2543 | ce_register_irq(hif_state, (1 << pipe_num)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2544 | } |
| 2545 | |
| 2546 | if (athdiag_procfs_init(scn) != 0) { |
| 2547 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2548 | goto err; |
| 2549 | } |
| 2550 | scn->athdiag_procfs_inited = true; |
| 2551 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2552 | HIF_DBG("%s: ce_init done", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2553 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2554 | init_tasklet_workers(hif_hdl); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2555 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2556 | HIF_DBG("%s: X, ret = %d", __func__, rv); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2557 | |
| 2558 | #ifdef ADRASTEA_SHADOW_REGISTERS |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2559 | HIF_DBG("%s, Using Shadow Registers instead of CE Registers", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2560 | for (i = 0; i < NUM_SHADOW_REGISTERS; i++) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2561 | HIF_DBG("%s Shadow Register%d is mapped to address %x", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2562 | __func__, i, |
| 2563 | (A_TARGET_READ(scn, (SHADOW_ADDRESS(i))) << 2)); |
| 2564 | } |
| 2565 | #endif |
| 2566 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2567 | return rv != QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2568 | |
| 2569 | err: |
| 2570 | /* Failure, so clean up */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2571 | hif_unconfig_ce(scn); |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2572 | HIF_TRACE("%s: X, ret = %d", __func__, rv); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2573 | return QDF_STATUS_SUCCESS != QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2574 | } |
| 2575 | |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2576 | #ifdef WLAN_FEATURE_FASTPATH |
| 2577 | /** |
| 2578 | * hif_ce_fastpath_cb_register() - Register callback for fastpath msg handler |
| 2579 | * @handler: Callback funtcion |
| 2580 | * @context: handle for callback function |
| 2581 | * |
| 2582 | * Return: QDF_STATUS_SUCCESS on success or QDF_STATUS_E_FAILURE |
| 2583 | */ |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 2584 | int hif_ce_fastpath_cb_register(struct hif_opaque_softc *hif_ctx, |
| 2585 | fastpath_msg_handler handler, |
| 2586 | void *context) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2587 | { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2588 | struct CE_state *ce_state; |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 2589 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2590 | int i; |
| 2591 | |
Himanshu Agarwal | 2a92459 | 2016-06-30 18:04:14 +0530 | [diff] [blame] | 2592 | if (!scn) { |
| 2593 | HIF_ERROR("%s: scn is NULL", __func__); |
| 2594 | QDF_ASSERT(0); |
| 2595 | return QDF_STATUS_E_FAILURE; |
| 2596 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2597 | |
| 2598 | if (!scn->fastpath_mode_on) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2599 | HIF_WARN("%s: Fastpath mode disabled", __func__); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2600 | return QDF_STATUS_E_FAILURE; |
| 2601 | } |
| 2602 | |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 2603 | for (i = 0; i < scn->ce_count; i++) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2604 | ce_state = scn->ce_id_to_state[i]; |
| 2605 | if (ce_state->htt_rx_data) { |
| 2606 | ce_state->fastpath_handler = handler; |
| 2607 | ce_state->context = context; |
| 2608 | } |
| 2609 | } |
| 2610 | |
| 2611 | return QDF_STATUS_SUCCESS; |
| 2612 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2613 | #endif |
| 2614 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2615 | #ifdef IPA_OFFLOAD |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 2616 | /** |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2617 | * hif_ce_ipa_get_ce_resource() - get uc resource on hif |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 2618 | * @scn: bus context |
| 2619 | * @ce_sr_base_paddr: copyengine source ring base physical address |
| 2620 | * @ce_sr_ring_size: copyengine source ring size |
| 2621 | * @ce_reg_paddr: copyengine register physical address |
| 2622 | * |
| 2623 | * IPA micro controller data path offload feature enabled, |
| 2624 | * HIF should release copy engine related resource information to IPA UC |
| 2625 | * IPA UC will access hardware resource with released information |
| 2626 | * |
| 2627 | * Return: None |
| 2628 | */ |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2629 | void hif_ce_ipa_get_ce_resource(struct hif_softc *scn, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2630 | qdf_dma_addr_t *ce_sr_base_paddr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2631 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2632 | qdf_dma_addr_t *ce_reg_paddr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2633 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2634 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2635 | struct HIF_CE_pipe_info *pipe_info = |
| 2636 | &(hif_state->pipe_info[HIF_PCI_IPA_UC_ASSIGNED_CE]); |
| 2637 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 2638 | |
| 2639 | ce_ipa_get_resource(ce_hdl, ce_sr_base_paddr, ce_sr_ring_size, |
| 2640 | ce_reg_paddr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2641 | } |
| 2642 | #endif /* IPA_OFFLOAD */ |
| 2643 | |
| 2644 | |
| 2645 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 2646 | |
| 2647 | /* |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2648 | * Current shadow register config |
| 2649 | * |
| 2650 | * ----------------------------------------------------------- |
| 2651 | * Shadow Register | CE | src/dst write index |
| 2652 | * ----------------------------------------------------------- |
| 2653 | * 0 | 0 | src |
| 2654 | * 1 No Config - Doesn't point to anything |
| 2655 | * 2 No Config - Doesn't point to anything |
| 2656 | * 3 | 3 | src |
| 2657 | * 4 | 4 | src |
| 2658 | * 5 | 5 | src |
| 2659 | * 6 No Config - Doesn't point to anything |
| 2660 | * 7 | 7 | src |
| 2661 | * 8 No Config - Doesn't point to anything |
| 2662 | * 9 No Config - Doesn't point to anything |
| 2663 | * 10 No Config - Doesn't point to anything |
| 2664 | * 11 No Config - Doesn't point to anything |
| 2665 | * ----------------------------------------------------------- |
| 2666 | * 12 No Config - Doesn't point to anything |
| 2667 | * 13 | 1 | dst |
| 2668 | * 14 | 2 | dst |
| 2669 | * 15 No Config - Doesn't point to anything |
| 2670 | * 16 No Config - Doesn't point to anything |
| 2671 | * 17 No Config - Doesn't point to anything |
| 2672 | * 18 No Config - Doesn't point to anything |
| 2673 | * 19 | 7 | dst |
| 2674 | * 20 | 8 | dst |
| 2675 | * 21 No Config - Doesn't point to anything |
| 2676 | * 22 No Config - Doesn't point to anything |
| 2677 | * 23 No Config - Doesn't point to anything |
| 2678 | * ----------------------------------------------------------- |
| 2679 | * |
| 2680 | * |
| 2681 | * ToDo - Move shadow register config to following in the future |
| 2682 | * This helps free up a block of shadow registers towards the end. |
| 2683 | * Can be used for other purposes |
| 2684 | * |
| 2685 | * ----------------------------------------------------------- |
| 2686 | * Shadow Register | CE | src/dst write index |
| 2687 | * ----------------------------------------------------------- |
| 2688 | * 0 | 0 | src |
| 2689 | * 1 | 3 | src |
| 2690 | * 2 | 4 | src |
| 2691 | * 3 | 5 | src |
| 2692 | * 4 | 7 | src |
| 2693 | * ----------------------------------------------------------- |
| 2694 | * 5 | 1 | dst |
| 2695 | * 6 | 2 | dst |
| 2696 | * 7 | 7 | dst |
| 2697 | * 8 | 8 | dst |
| 2698 | * ----------------------------------------------------------- |
| 2699 | * 9 No Config - Doesn't point to anything |
| 2700 | * 12 No Config - Doesn't point to anything |
| 2701 | * 13 No Config - Doesn't point to anything |
| 2702 | * 14 No Config - Doesn't point to anything |
| 2703 | * 15 No Config - Doesn't point to anything |
| 2704 | * 16 No Config - Doesn't point to anything |
| 2705 | * 17 No Config - Doesn't point to anything |
| 2706 | * 18 No Config - Doesn't point to anything |
| 2707 | * 19 No Config - Doesn't point to anything |
| 2708 | * 20 No Config - Doesn't point to anything |
| 2709 | * 21 No Config - Doesn't point to anything |
| 2710 | * 22 No Config - Doesn't point to anything |
| 2711 | * 23 No Config - Doesn't point to anything |
| 2712 | * ----------------------------------------------------------- |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2713 | */ |
| 2714 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2715 | u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2716 | { |
| 2717 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2718 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2719 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2720 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2721 | case 0: |
| 2722 | addr = SHADOW_VALUE0; |
| 2723 | break; |
| 2724 | case 3: |
| 2725 | addr = SHADOW_VALUE3; |
| 2726 | break; |
| 2727 | case 4: |
| 2728 | addr = SHADOW_VALUE4; |
| 2729 | break; |
| 2730 | case 5: |
| 2731 | addr = SHADOW_VALUE5; |
| 2732 | break; |
| 2733 | case 7: |
| 2734 | addr = SHADOW_VALUE7; |
| 2735 | break; |
| 2736 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2737 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2738 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2739 | } |
| 2740 | return addr; |
| 2741 | |
| 2742 | } |
| 2743 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2744 | u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2745 | { |
| 2746 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2747 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2748 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2749 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2750 | case 1: |
| 2751 | addr = SHADOW_VALUE13; |
| 2752 | break; |
| 2753 | case 2: |
| 2754 | addr = SHADOW_VALUE14; |
| 2755 | break; |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 2756 | case 5: |
| 2757 | addr = SHADOW_VALUE17; |
| 2758 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2759 | case 7: |
| 2760 | addr = SHADOW_VALUE19; |
| 2761 | break; |
| 2762 | case 8: |
| 2763 | addr = SHADOW_VALUE20; |
| 2764 | break; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2765 | case 9: |
| 2766 | addr = SHADOW_VALUE21; |
| 2767 | break; |
| 2768 | case 10: |
| 2769 | addr = SHADOW_VALUE22; |
| 2770 | break; |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 2771 | case 11: |
| 2772 | addr = SHADOW_VALUE23; |
| 2773 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2774 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2775 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2776 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2777 | } |
| 2778 | |
| 2779 | return addr; |
| 2780 | |
| 2781 | } |
| 2782 | #endif |
| 2783 | |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 2784 | #if defined(FEATURE_LRO) |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 2785 | void *hif_ce_get_lro_ctx(struct hif_opaque_softc *hif_hdl, int ctx_id) |
| 2786 | { |
| 2787 | struct CE_state *ce_state; |
| 2788 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
| 2789 | |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 2790 | ce_state = scn->ce_id_to_state[ctx_id]; |
| 2791 | |
| 2792 | return ce_state->lro_data; |
| 2793 | } |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 2794 | #endif |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2795 | |
| 2796 | /** |
| 2797 | * hif_map_service_to_pipe() - returns the ce ids pertaining to |
| 2798 | * this service |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2799 | * @scn: hif_softc pointer. |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2800 | * @svc_id: Service ID for which the mapping is needed. |
| 2801 | * @ul_pipe: address of the container in which ul pipe is returned. |
| 2802 | * @dl_pipe: address of the container in which dl pipe is returned. |
| 2803 | * @ul_is_polled: address of the container in which a bool |
| 2804 | * indicating if the UL CE for this service |
| 2805 | * is polled is returned. |
| 2806 | * @dl_is_polled: address of the container in which a bool |
| 2807 | * indicating if the DL CE for this service |
| 2808 | * is polled is returned. |
| 2809 | * |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2810 | * Return: Indicates whether the service has been found in the table. |
| 2811 | * Upon return, ul_is_polled is updated only if ul_pipe is updated. |
| 2812 | * There will be warning logs if either leg has not been updated |
| 2813 | * because it missed the entry in the table (but this is not an err). |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2814 | */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2815 | int hif_map_service_to_pipe(struct hif_opaque_softc *hif_hdl, uint16_t svc_id, |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2816 | uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled, |
| 2817 | int *dl_is_polled) |
| 2818 | { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2819 | int status = QDF_STATUS_E_INVAL; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2820 | unsigned int i; |
| 2821 | struct service_to_pipe element; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2822 | struct service_to_pipe *tgt_svc_map_to_use; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2823 | uint32_t sz_tgt_svc_map_to_use; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2824 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2825 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2826 | bool dl_updated = false; |
| 2827 | bool ul_updated = false; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2828 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2829 | hif_select_service_to_pipe_map(scn, &tgt_svc_map_to_use, |
| 2830 | &sz_tgt_svc_map_to_use); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2831 | |
| 2832 | *dl_is_polled = 0; /* polling for received messages not supported */ |
| 2833 | |
| 2834 | for (i = 0; i < (sz_tgt_svc_map_to_use/sizeof(element)); i++) { |
| 2835 | |
| 2836 | memcpy(&element, &tgt_svc_map_to_use[i], sizeof(element)); |
| 2837 | if (element.service_id == svc_id) { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2838 | if (element.pipedir == PIPEDIR_OUT) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2839 | *ul_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2840 | *ul_is_polled = |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2841 | (hif_state->host_ce_config[*ul_pipe].flags & |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2842 | CE_ATTR_DISABLE_INTR) != 0; |
| 2843 | ul_updated = true; |
| 2844 | } else if (element.pipedir == PIPEDIR_IN) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2845 | *dl_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2846 | dl_updated = true; |
| 2847 | } |
| 2848 | status = QDF_STATUS_SUCCESS; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2849 | } |
| 2850 | } |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2851 | if (ul_updated == false) |
Poddar, Siddarth | f53a9b0 | 2017-03-14 20:30:17 +0530 | [diff] [blame] | 2852 | HIF_INFO("%s: ul pipe is NOT updated for service %d", |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2853 | __func__, svc_id); |
| 2854 | if (dl_updated == false) |
Poddar, Siddarth | f53a9b0 | 2017-03-14 20:30:17 +0530 | [diff] [blame] | 2855 | HIF_INFO("%s: dl pipe is NOT updated for service %d", |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2856 | __func__, svc_id); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2857 | |
| 2858 | return status; |
| 2859 | } |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2860 | |
| 2861 | #ifdef SHADOW_REG_DEBUG |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2862 | inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2863 | uint32_t CE_ctrl_addr) |
| 2864 | { |
| 2865 | uint32_t read_from_hw, srri_from_ddr = 0; |
| 2866 | |
| 2867 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_SRRI_ADDRESS); |
| 2868 | |
| 2869 | srri_from_ddr = SRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 2870 | |
| 2871 | if (read_from_hw != srri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2872 | HIF_ERROR("%s: error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
| 2873 | __func__, srri_from_ddr, read_from_hw, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2874 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2875 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2876 | } |
| 2877 | return srri_from_ddr; |
| 2878 | } |
| 2879 | |
| 2880 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2881 | inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2882 | uint32_t CE_ctrl_addr) |
| 2883 | { |
| 2884 | uint32_t read_from_hw, drri_from_ddr = 0; |
| 2885 | |
| 2886 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_DRRI_ADDRESS); |
| 2887 | |
| 2888 | drri_from_ddr = DRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 2889 | |
| 2890 | if (read_from_hw != drri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2891 | HIF_ERROR("error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2892 | drri_from_ddr, read_from_hw, |
| 2893 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2894 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2895 | } |
| 2896 | return drri_from_ddr; |
| 2897 | } |
| 2898 | |
| 2899 | #endif |
| 2900 | |
Houston Hoffman | 3d0cda8 | 2015-12-03 13:25:05 -0800 | [diff] [blame] | 2901 | #ifdef ADRASTEA_RRI_ON_DDR |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2902 | /** |
| 2903 | * hif_get_src_ring_read_index(): Called to get the SRRI |
| 2904 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2905 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2906 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2907 | * |
| 2908 | * This function returns the SRRI to the caller. For CEs that |
| 2909 | * dont have interrupts enabled, we look at the DDR based SRRI |
| 2910 | * |
| 2911 | * Return: SRRI |
| 2912 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2913 | inline unsigned int hif_get_src_ring_read_index(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2914 | uint32_t CE_ctrl_addr) |
| 2915 | { |
| 2916 | struct CE_attr attr; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2917 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2918 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2919 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2920 | if (attr.flags & CE_ATTR_DISABLE_INTR) |
| 2921 | return CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2922 | else |
| 2923 | return A_TARGET_READ(scn, |
| 2924 | (CE_ctrl_addr) + CURRENT_SRRI_ADDRESS); |
| 2925 | } |
| 2926 | |
| 2927 | /** |
| 2928 | * hif_get_dst_ring_read_index(): Called to get the DRRI |
| 2929 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2930 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2931 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2932 | * |
| 2933 | * This function returns the DRRI to the caller. For CEs that |
| 2934 | * dont have interrupts enabled, we look at the DDR based DRRI |
| 2935 | * |
| 2936 | * Return: DRRI |
| 2937 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2938 | inline unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2939 | uint32_t CE_ctrl_addr) |
| 2940 | { |
| 2941 | struct CE_attr attr; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2942 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2943 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2944 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2945 | |
| 2946 | if (attr.flags & CE_ATTR_DISABLE_INTR) |
| 2947 | return CE_DEST_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2948 | else |
| 2949 | return A_TARGET_READ(scn, |
| 2950 | (CE_ctrl_addr) + CURRENT_DRRI_ADDRESS); |
| 2951 | } |
| 2952 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2953 | /** |
| 2954 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2955 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2956 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2957 | * |
| 2958 | * This function allocates non cached memory on ddr and sends |
| 2959 | * the physical address of this memory to the CE hardware. The |
| 2960 | * hardware updates the RRI on this particular location. |
| 2961 | * |
| 2962 | * Return: None |
| 2963 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2964 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2965 | { |
| 2966 | unsigned int i; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2967 | qdf_dma_addr_t paddr_rri_on_ddr; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2968 | uint32_t high_paddr, low_paddr; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2969 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2970 | scn->vaddr_rri_on_ddr = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2971 | (uint32_t *)qdf_mem_alloc_consistent(scn->qdf_dev, |
| 2972 | scn->qdf_dev->dev, (CE_COUNT*sizeof(uint32_t)), |
| 2973 | &paddr_rri_on_ddr); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2974 | |
Arunk Khandavalli | e14e8e9 | 2017-04-03 21:40:26 +0530 | [diff] [blame] | 2975 | scn->paddr_rri_on_ddr = paddr_rri_on_ddr; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2976 | low_paddr = BITS0_TO_31(paddr_rri_on_ddr); |
| 2977 | high_paddr = BITS32_TO_35(paddr_rri_on_ddr); |
| 2978 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2979 | HIF_DBG("%s using srri and drri from DDR", __func__); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2980 | |
| 2981 | WRITE_CE_DDR_ADDRESS_FOR_RRI_LOW(scn, low_paddr); |
| 2982 | WRITE_CE_DDR_ADDRESS_FOR_RRI_HIGH(scn, high_paddr); |
| 2983 | |
| 2984 | for (i = 0; i < CE_COUNT; i++) |
| 2985 | CE_IDX_UPD_EN_SET(scn, CE_BASE_ADDRESS(i)); |
| 2986 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2987 | qdf_mem_zero(scn->vaddr_rri_on_ddr, CE_COUNT*sizeof(uint32_t)); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2988 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2989 | } |
| 2990 | #else |
| 2991 | |
| 2992 | /** |
| 2993 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2994 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2995 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2996 | * |
| 2997 | * This is a dummy implementation for platforms that don't |
| 2998 | * support this functionality. |
| 2999 | * |
| 3000 | * Return: None |
| 3001 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3002 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3003 | { |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 3004 | } |
| 3005 | #endif |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3006 | |
| 3007 | /** |
| 3008 | * hif_dump_ce_registers() - dump ce registers |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 3009 | * @scn: hif_opaque_softc pointer. |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3010 | * |
| 3011 | * Output the copy engine registers |
| 3012 | * |
| 3013 | * Return: 0 for success or error code |
| 3014 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3015 | int hif_dump_ce_registers(struct hif_softc *scn) |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3016 | { |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 3017 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3018 | uint32_t ce_reg_address = CE0_BASE_ADDRESS; |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3019 | uint32_t ce_reg_values[CE_USEFUL_SIZE >> 2]; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3020 | uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2; |
| 3021 | uint16_t i; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3022 | QDF_STATUS status; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3023 | |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 3024 | for (i = 0; i < scn->ce_count; i++, ce_reg_address += CE_OFFSET) { |
| 3025 | if (scn->ce_id_to_state[i] == NULL) { |
| 3026 | HIF_DBG("CE%d not used.", i); |
| 3027 | continue; |
| 3028 | } |
| 3029 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 3030 | status = hif_diag_read_mem(hif_hdl, ce_reg_address, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3031 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3032 | ce_reg_word_size * sizeof(uint32_t)); |
| 3033 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3034 | if (status != QDF_STATUS_SUCCESS) { |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 3035 | HIF_ERROR("Dumping CE register failed!"); |
| 3036 | return -EACCES; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3037 | } |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3038 | HIF_ERROR("CE%d=>\n", i); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 3039 | qdf_trace_hex_dump(QDF_MODULE_ID_HIF, QDF_TRACE_LEVEL_DEBUG, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 3040 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3041 | ce_reg_word_size * sizeof(uint32_t)); |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 3042 | qdf_print("ADDR:[0x%08X], SR_WR_INDEX:%d\n", (ce_reg_address |
| 3043 | + SR_WR_INDEX_ADDRESS), |
| 3044 | ce_reg_values[SR_WR_INDEX_ADDRESS/4]); |
| 3045 | qdf_print("ADDR:[0x%08X], CURRENT_SRRI:%d\n", (ce_reg_address |
| 3046 | + CURRENT_SRRI_ADDRESS), |
| 3047 | ce_reg_values[CURRENT_SRRI_ADDRESS/4]); |
| 3048 | qdf_print("ADDR:[0x%08X], DST_WR_INDEX:%d\n", (ce_reg_address |
| 3049 | + DST_WR_INDEX_ADDRESS), |
| 3050 | ce_reg_values[DST_WR_INDEX_ADDRESS/4]); |
| 3051 | qdf_print("ADDR:[0x%08X], CURRENT_DRRI:%d\n", (ce_reg_address |
| 3052 | + CURRENT_DRRI_ADDRESS), |
| 3053 | ce_reg_values[CURRENT_DRRI_ADDRESS/4]); |
| 3054 | qdf_print("---\n"); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3055 | } |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3056 | return 0; |
| 3057 | } |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3058 | #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT |
| 3059 | struct hif_pipe_addl_info *hif_get_addl_pipe_info(struct hif_opaque_softc *osc, |
| 3060 | struct hif_pipe_addl_info *hif_info, uint32_t pipe) |
| 3061 | { |
| 3062 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3063 | struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn); |
| 3064 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(osc); |
| 3065 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 3066 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 3067 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 3068 | struct CE_ring_state *src_ring = ce_state->src_ring; |
| 3069 | struct CE_ring_state *dest_ring = ce_state->dest_ring; |
| 3070 | |
| 3071 | if (src_ring) { |
| 3072 | hif_info->ul_pipe.nentries = src_ring->nentries; |
| 3073 | hif_info->ul_pipe.nentries_mask = src_ring->nentries_mask; |
| 3074 | hif_info->ul_pipe.sw_index = src_ring->sw_index; |
| 3075 | hif_info->ul_pipe.write_index = src_ring->write_index; |
| 3076 | hif_info->ul_pipe.hw_index = src_ring->hw_index; |
| 3077 | hif_info->ul_pipe.base_addr_CE_space = |
| 3078 | src_ring->base_addr_CE_space; |
| 3079 | hif_info->ul_pipe.base_addr_owner_space = |
| 3080 | src_ring->base_addr_owner_space; |
| 3081 | } |
| 3082 | |
| 3083 | |
| 3084 | if (dest_ring) { |
| 3085 | hif_info->dl_pipe.nentries = dest_ring->nentries; |
| 3086 | hif_info->dl_pipe.nentries_mask = dest_ring->nentries_mask; |
| 3087 | hif_info->dl_pipe.sw_index = dest_ring->sw_index; |
| 3088 | hif_info->dl_pipe.write_index = dest_ring->write_index; |
| 3089 | hif_info->dl_pipe.hw_index = dest_ring->hw_index; |
| 3090 | hif_info->dl_pipe.base_addr_CE_space = |
| 3091 | dest_ring->base_addr_CE_space; |
| 3092 | hif_info->dl_pipe.base_addr_owner_space = |
| 3093 | dest_ring->base_addr_owner_space; |
| 3094 | } |
| 3095 | |
| 3096 | hif_info->pci_mem = pci_resource_start(sc->pdev, 0); |
| 3097 | hif_info->ctrl_addr = ce_state->ctrl_addr; |
| 3098 | |
| 3099 | return hif_info; |
| 3100 | } |
| 3101 | |
| 3102 | uint32_t hif_set_nss_wifiol_mode(struct hif_opaque_softc *osc, uint32_t mode) |
| 3103 | { |
| 3104 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3105 | |
| 3106 | scn->nss_wifi_ol_mode = mode; |
| 3107 | return 0; |
| 3108 | } |
| 3109 | |
| 3110 | #endif |
| 3111 | |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 3112 | void hif_set_attribute(struct hif_opaque_softc *osc, uint8_t hif_attrib) |
| 3113 | { |
| 3114 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3115 | scn->hif_attribute = hif_attrib; |
| 3116 | } |
| 3117 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3118 | void hif_disable_interrupt(struct hif_opaque_softc *osc, uint32_t pipe_num) |
| 3119 | { |
| 3120 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3121 | struct CE_state *CE_state = scn->ce_id_to_state[pipe_num]; |
| 3122 | uint32_t ctrl_addr = CE_state->ctrl_addr; |
| 3123 | |
| 3124 | Q_TARGET_ACCESS_BEGIN(scn); |
| 3125 | CE_COPY_COMPLETE_INTR_DISABLE(scn, ctrl_addr); |
| 3126 | Q_TARGET_ACCESS_END(scn); |
| 3127 | } |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3128 | |
| 3129 | /** |
| 3130 | * hif_fw_event_handler() - hif fw event handler |
| 3131 | * @hif_state: pointer to hif ce state structure |
| 3132 | * |
| 3133 | * Process fw events and raise HTC callback to process fw events. |
| 3134 | * |
| 3135 | * Return: none |
| 3136 | */ |
| 3137 | static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state) |
| 3138 | { |
| 3139 | struct hif_msg_callbacks *msg_callbacks = |
| 3140 | &hif_state->msg_callbacks_current; |
| 3141 | |
| 3142 | if (!msg_callbacks->fwEventHandler) |
| 3143 | return; |
| 3144 | |
| 3145 | msg_callbacks->fwEventHandler(msg_callbacks->Context, |
| 3146 | QDF_STATUS_E_FAILURE); |
| 3147 | } |
| 3148 | |
| 3149 | #ifndef QCA_WIFI_3_0 |
| 3150 | /** |
| 3151 | * hif_fw_interrupt_handler() - FW interrupt handler |
| 3152 | * @irq: irq number |
| 3153 | * @arg: the user pointer |
| 3154 | * |
| 3155 | * Called from the PCI interrupt handler when a |
| 3156 | * firmware-generated interrupt to the Host. |
| 3157 | * |
| 3158 | * Return: status of handled irq |
| 3159 | */ |
| 3160 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 3161 | { |
| 3162 | struct hif_softc *scn = arg; |
| 3163 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 3164 | uint32_t fw_indicator_address, fw_indicator; |
| 3165 | |
| 3166 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 3167 | return ATH_ISR_NOSCHED; |
| 3168 | |
| 3169 | fw_indicator_address = hif_state->fw_indicator_address; |
| 3170 | /* For sudden unplug this will return ~0 */ |
| 3171 | fw_indicator = A_TARGET_READ(scn, fw_indicator_address); |
| 3172 | |
| 3173 | if ((fw_indicator != ~0) && (fw_indicator & FW_IND_EVENT_PENDING)) { |
| 3174 | /* ACK: clear Target-side pending event */ |
| 3175 | A_TARGET_WRITE(scn, fw_indicator_address, |
| 3176 | fw_indicator & ~FW_IND_EVENT_PENDING); |
| 3177 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 3178 | return ATH_ISR_SCHED; |
| 3179 | |
| 3180 | if (hif_state->started) { |
| 3181 | hif_fw_event_handler(hif_state); |
| 3182 | } else { |
| 3183 | /* |
| 3184 | * Probable Target failure before we're prepared |
| 3185 | * to handle it. Generally unexpected. |
| 3186 | */ |
| 3187 | AR_DEBUG_PRINTF(ATH_DEBUG_ERR, |
| 3188 | ("%s: Early firmware event indicated\n", |
| 3189 | __func__)); |
| 3190 | } |
| 3191 | } else { |
| 3192 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 3193 | return ATH_ISR_SCHED; |
| 3194 | } |
| 3195 | |
| 3196 | return ATH_ISR_SCHED; |
| 3197 | } |
| 3198 | #else |
| 3199 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 3200 | { |
| 3201 | return ATH_ISR_SCHED; |
| 3202 | } |
| 3203 | #endif /* #ifdef QCA_WIFI_3_0 */ |
| 3204 | |
| 3205 | |
| 3206 | /** |
| 3207 | * hif_wlan_disable(): call the platform driver to disable wlan |
| 3208 | * @scn: HIF Context |
| 3209 | * |
| 3210 | * This function passes the con_mode to platform driver to disable |
| 3211 | * wlan. |
| 3212 | * |
| 3213 | * Return: void |
| 3214 | */ |
| 3215 | void hif_wlan_disable(struct hif_softc *scn) |
| 3216 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3217 | enum pld_driver_mode mode; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3218 | uint32_t con_mode = hif_get_conparam(scn); |
| 3219 | |
| 3220 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3221 | mode = PLD_FTM; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3222 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3223 | mode = PLD_EPPING; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3224 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3225 | mode = PLD_MISSION; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3226 | |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3227 | pld_wlan_disable(scn->qdf_dev->dev, mode); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3228 | } |
Dustin Brown | 6bdbda5 | 2016-09-27 15:52:30 -0700 | [diff] [blame] | 3229 | |
Dustin Brown | 6834d32 | 2017-03-20 15:02:48 -0700 | [diff] [blame] | 3230 | int hif_get_wake_ce_id(struct hif_softc *scn, uint8_t *ce_id) |
| 3231 | { |
| 3232 | QDF_STATUS status; |
| 3233 | uint8_t ul_pipe, dl_pipe; |
| 3234 | int ul_is_polled, dl_is_polled; |
| 3235 | |
| 3236 | /* DL pipe for HTC_CTRL_RSVD_SVC should map to the wake CE */ |
| 3237 | status = hif_map_service_to_pipe(GET_HIF_OPAQUE_HDL(scn), |
| 3238 | HTC_CTRL_RSVD_SVC, |
| 3239 | &ul_pipe, &dl_pipe, |
| 3240 | &ul_is_polled, &dl_is_polled); |
| 3241 | if (status) { |
| 3242 | HIF_ERROR("%s: failed to map pipe: %d", __func__, status); |
| 3243 | return qdf_status_to_os_return(status); |
| 3244 | } |
| 3245 | |
| 3246 | *ce_id = dl_pipe; |
| 3247 | |
| 3248 | return 0; |
| 3249 | } |