blob: 732d8c8436336216c3d4f13e9df4beb068af60ec [file] [log] [blame]
Krunal Soni4274f362016-12-14 19:55:25 -08001/*
Amar Singhalef59eee2018-01-02 12:46:35 -08002 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08003 *
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08004 * Permission to use, copy, modify, and/or distribute this software for
5 * any purpose with or without fee is hereby granted, provided that the
6 * above copyright notice and this permission notice appear in all
7 * copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16 * PERFORMANCE OF THIS SOFTWARE.
17 */
18
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080019#ifndef WMA_H
20#define WMA_H
21
22#include "a_types.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053023#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080024#include "osapi_linux.h"
25#include "htc_packet.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053026#include "i_qdf_event.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080027#include "wmi_services.h"
28#include "wmi_unified.h"
29#include "wmi_version.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053030#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080031#include "cfg_api.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053032#include "qdf_status.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080033#include "cds_sched.h"
Varun Reddy Yeturuba1942a2017-06-20 15:32:19 -070034#include "cds_config.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080035#include "sir_mac_prot_def.h"
36#include "wma_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080037#include <linux/workqueue.h>
38#include "utils_api.h"
39#include "lim_types.h"
40#include "wmi_unified_api.h"
Dhanashri Atre12a08392016-02-17 13:10:34 -080041#include "cdp_txrx_cmn.h"
Govind Singh8c46db92016-05-10 14:17:16 +053042#include "dbglog.h"
Leo Chang96464902016-10-28 11:10:54 -070043#include "cds_ieee80211_common.h"
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +053044#include "wlan_objmgr_psoc_obj.h"
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -080045#include <cdp_txrx_handle.h>
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -070046#include <wlan_policy_mgr_api.h>
Tushnim Bhattacharyya9e81b4c2017-02-15 17:11:14 -080047
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080048/* Platform specific configuration for max. no. of fragments */
49#define QCA_OL_11AC_TX_MAX_FRAGS 2
50
51/* Private */
52
Rajeev Kumardaf1c612016-04-05 02:56:41 -070053#define WMA_READY_EVENTID_TIMEOUT 6000
54#define WMA_SERVICE_READY_EXT_TIMEOUT 6000
Sandeep Puligilla4a58f7f2017-05-16 16:36:56 -070055#define NAN_CLUSTER_ID_BYTES 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080056
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080057#define WMA_CRASH_INJECT_TIMEOUT 5000
58
Govind Singhefc5ccd2016-04-25 11:11:55 +053059/* MAC ID to PDEV ID mapping is as given below
60 * MAC_ID PDEV_ID
61 * 0 1
62 * 1 2
63 * SOC Level WMI_PDEV_ID_SOC
64 */
65#define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1))
66#define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1))
67
Naveen Rawatb0c5b6b2017-11-27 17:37:40 -080068#define WMA_MAX_SUPPORTED_BSS SIR_MAX_SUPPORTED_BSS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080069
Vignesh Viswanathan56f26252017-08-31 15:26:01 +053070#define WMA_MAX_MGMT_MPDU_LEN 2000
71
Kapil Gupta10800b92017-05-31 19:14:47 +053072#define MAX_PRINT_FAILURE_CNT 50
73
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080074#define WMA_INVALID_VDEV_ID 0xFF
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080075
Dustin Brownef8448d2018-07-09 10:51:13 -070076/* Deprecated logging macros, to be removed. Please do not use in new code */
Nirav Shah790d9432018-07-12 19:42:48 +053077#define WMA_LOGD(params ...) \
78 QDF_TRACE_DEBUG_NO_FL(QDF_MODULE_ID_WMA, params)
79#define WMA_LOGI(params ...) \
80 QDF_TRACE_INFO_NO_FL(QDF_MODULE_ID_WMA, params)
81#define WMA_LOGW(params ...) \
82 QDF_TRACE_WARN_NO_FL(QDF_MODULE_ID_WMA, params)
83#define WMA_LOGE(params ...) \
84 QDF_TRACE_ERROR_NO_FL(QDF_MODULE_ID_WMA, params)
85#define WMA_LOGP(params ...) \
86 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080087
Dustin Brownef8448d2018-07-09 10:51:13 -070088#define wma_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_WMA, params)
89#define wma_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_WMA, params)
90#define wma_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_WMA, params)
91#define wma_info(params...) QDF_TRACE_INFO(QDF_MODULE_ID_WMA, params)
92#define wma_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_WMA, params)
Amar Singhaldc5ae4d2018-10-02 14:29:37 -070093#define wma_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_WMA, params)
Dustin Brownef8448d2018-07-09 10:51:13 -070094
Nirav Shah790d9432018-07-12 19:42:48 +053095#define wma_nofl_alert(params...) \
96 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
97#define wma_nofl_err(params...) \
98 QDF_TRACE_ERROR_NO_FL(QDF_MODULE_ID_WMA, params)
99#define wma_nofl_warn(params...) \
100 QDF_TRACE_WARN_NO_FL(QDF_MODULE_ID_WMA, params)
101#define wma_nofl_info(params...) \
102 QDF_TRACE_INFO_NO_FL(QDF_MODULE_ID_WMA, params)
103#define wma_nofl_debug(params...) \
104 QDF_TRACE_DEBUG_NO_FL(QDF_MODULE_ID_WMA, params)
105
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800106#define WMA_DEBUG_ALWAYS
107
108#ifdef WMA_DEBUG_ALWAYS
Nirav Shah790d9432018-07-12 19:42:48 +0530109#define WMA_LOGA(params ...) \
110 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800111#else
Nirav Shah790d9432018-07-12 19:42:48 +0530112#define WMA_LOGA(params ...)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800113#endif
114
Govind Singhd76a5b02016-03-08 15:12:14 +0530115#define WMA_WILDCARD_PDEV_ID 0x0
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800116
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800117#define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */
118
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800119#define WMA_SCAN_NPROBES_DEFAULT (2)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800120
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800121#define WMA_BCAST_MAC_ADDR (0xFF)
122#define WMA_MCAST_IPV4_MAC_ADDR (0x01)
123#define WMA_MCAST_IPV6_MAC_ADDR (0x33)
Sreelakshmi Konamkie1cd51f2016-08-19 16:58:24 +0530124#define WMA_ICMP_PROTOCOL (0x01)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800125
Himanshu Agarwal82de9042016-07-20 18:11:03 +0530126#define WMA_IS_EAPOL_GET_MIN_LEN 14
127#define WMA_EAPOL_SUBTYPE_GET_MIN_LEN 21
128#define WMA_EAPOL_INFO_GET_MIN_LEN 23
129#define WMA_IS_DHCP_GET_MIN_LEN 38
130#define WMA_DHCP_SUBTYPE_GET_MIN_LEN 0x11D
131#define WMA_DHCP_INFO_GET_MIN_LEN 50
132#define WMA_IS_ARP_GET_MIN_LEN 14
133#define WMA_ARP_SUBTYPE_GET_MIN_LEN 22
134#define WMA_IPV4_PROTO_GET_MIN_LEN 24
135#define WMA_IPV4_PKT_INFO_GET_MIN_LEN 42
136#define WMA_ICMP_SUBTYPE_GET_MIN_LEN 35
137#define WMA_IPV6_PROTO_GET_MIN_LEN 21
138#define WMA_IPV6_PKT_INFO_GET_MIN_LEN 62
139#define WMA_ICMPV6_SUBTYPE_GET_MIN_LEN 55
Jiachao Wu712d4fd2017-08-23 16:52:34 +0800140
141/* Beacon tx rate */
142#define WMA_BEACON_TX_RATE_1_M 10
143#define WMA_BEACON_TX_RATE_2_M 20
144#define WMA_BEACON_TX_RATE_5_5_M 55
145#define WMA_BEACON_TX_RATE_11_M 110
146#define WMA_BEACON_TX_RATE_6_M 60
147#define WMA_BEACON_TX_RATE_9_M 90
148#define WMA_BEACON_TX_RATE_12_M 120
149#define WMA_BEACON_TX_RATE_18_M 180
150#define WMA_BEACON_TX_RATE_24_M 240
151#define WMA_BEACON_TX_RATE_36_M 360
152#define WMA_BEACON_TX_RATE_48_M 480
153#define WMA_BEACON_TX_RATE_54_M 540
154
Himanshu Agarwaldd356df2016-07-20 19:04:39 +0530155/**
156 * ds_mode: distribution system mode
157 * @IEEE80211_NO_DS: NO DS at either side
158 * @IEEE80211_TO_DS: DS at receiver side
159 * @IEEE80211_FROM_DS: DS at sender side
160 * @IEEE80211_DS_TO_DS: DS at both sender and revceiver side
161 */
162enum ds_mode {
163 IEEE80211_NO_DS,
164 IEEE80211_TO_DS,
165 IEEE80211_FROM_DS,
166 IEEE80211_DS_TO_DS
167};
168
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800169/* Roaming default values
170 * All time and period values are in milliseconds.
171 * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT.
172 */
173
174#define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4)
175#define WMA_NOISE_FLOOR_DBM_DEFAULT (-96)
176#define WMA_ROAM_RSSI_DIFF_DEFAULT (5)
177#define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100)
178#define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110)
179#define WMA_ROAM_MIN_REST_TIME_DEFAULT (50)
180#define WMA_ROAM_MAX_REST_TIME_DEFAULT (500)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800181
182#define WMA_INVALID_KEY_IDX 0xff
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800183
184#define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1)
185#define WMA_MIN_RF_CHAINS (1)
Abhishek Singh9100cc82017-04-17 11:03:55 +0530186#define WMA_MAX_NSS (2)
187
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800188
189#ifdef FEATURE_WLAN_EXTSCAN
190#define WMA_MAX_EXTSCAN_MSG_SIZE 1536
191#define WMA_EXTSCAN_REST_TIME 100
192#define WMA_EXTSCAN_MAX_SCAN_TIME 50000
193#define WMA_EXTSCAN_BURST_DURATION 150
194#endif
195
gaoleze5108942017-03-31 16:56:42 +0800196#define WMA_CHAN_START_RESP 0
197#define WMA_CHAN_END_RESP 1
198
Krunal Sonieb692e32018-08-21 14:54:11 -0700199#define WMA_BCN_BUF_MAX_SIZE 512
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800200#define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc)))
201#define WMA_MAX_NOA_DESCRIPTORS 4
202
203#define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1)
204
205#define WMA_WOW_PTRN_MASK_VALID 0xFF
206#define WMA_NUM_BITS_IN_BYTE 8
207
208#define WMA_AP_WOW_DEFAULT_PTRN_MAX 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800209
210#define WMA_BSS_STATUS_STARTED 0x1
211#define WMA_BSS_STATUS_STOPPED 0x2
212
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800213#define WMA_TARGET_REQ_TYPE_VDEV_START 0x1
214#define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2
215#define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3
216
217#define WMA_PEER_ASSOC_CNF_START 0x01
Sandeep Puligillaafa52892016-10-26 19:03:16 -0700218#define WMA_PEER_ASSOC_TIMEOUT (6000) /* 6 seconds */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800219
Sandeep Puligilla19ddda22016-01-05 12:18:02 -0800220#define WMA_DELETE_STA_RSP_START 0x02
221#define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */
222
223#define WMA_DEL_P2P_SELF_STA_RSP_START 0x03
Sandeep Puligillabbee8172017-04-07 19:26:33 -0700224#define WMA_SET_LINK_PEER_RSP 0x04
Abhishek Singhe8be9a62017-05-30 12:13:29 +0530225#define WMA_DELETE_PEER_RSP 0x05
Tushnim Bhattacharyya86294892017-10-25 16:29:11 -0700226
227#define WMA_PDEV_SET_HW_MODE_RESP 0x06
Abhishek Singhd93a0b22018-10-30 17:04:56 +0530228#define WMA_PDEV_MAC_CFG_RESP 0x07
Tushnim Bhattacharyya86294892017-10-25 16:29:11 -0700229
Rajeev Kumar9f2dd472018-09-14 16:12:42 -0700230#ifdef CONFIG_SLUB_DEBUG_ON
231#define SLUB_DEBUG_FACTOR (2)
232#else
233#define SLUB_DEBUG_FACTOR (1)
234#endif
235
236/* FW response timeout values in milli seconds */
237#define WMA_VDEV_START_REQUEST_TIMEOUT (6000) * (SLUB_DEBUG_FACTOR)
238#define WMA_VDEV_STOP_REQUEST_TIMEOUT (6000) * (SLUB_DEBUG_FACTOR)
239#define WMA_VDEV_HW_MODE_REQUEST_TIMEOUT (6000) * (SLUB_DEBUG_FACTOR)
240#define WMA_VDEV_PLCY_MGR_CMD_TIMEOUT (6000) * (SLUB_DEBUG_FACTOR)
Abhishek Singhd93a0b22018-10-30 17:04:56 +0530241#define WMA_VDEV_DUAL_MAC_CFG_TIMEOUT (5000) * (SLUB_DEBUG_FACTOR)
242
Dustin Brownd0a76562017-10-13 14:48:37 -0700243#define WMA_VDEV_SET_KEY_WAKELOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800244
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530245#define WMA_TGT_INVALID_SNR (0)
246
Naveen Rawatf440a132017-05-05 12:27:39 -0700247#define WMA_TGT_IS_VALID_SNR(x) ((x) >= 0 && (x) < WMA_TGT_MAX_SNR)
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530248#define WMA_TGT_IS_INVALID_SNR(x) (!WMA_TGT_IS_VALID_SNR(x))
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800249
250#define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */
251#define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */
252#define WMA_MAX_NUM_ARGS 8
253
254#define WMA_SMPS_MASK_LOWER_16BITS 0xFF
255#define WMA_SMPS_MASK_UPPER_3BITS 0x7
256#define WMA_SMPS_PARAM_VALUE_S 29
257
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800258/*
259 * Setting the Tx Comp Timeout to 1 secs.
260 * TODO: Need to Revist the Timing
261 */
262#define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000
263#define WMA_TX_FRAME_BUFFER_NO_FREE 0
264#define WMA_TX_FRAME_BUFFER_FREE 1
265
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800266/* Default InActivity Time is 200 ms */
267#define POWERSAVE_DEFAULT_INACTIVITY_TIME 200
268
Mukul Sharmaed92f2f2017-04-20 00:06:28 +0530269/* Default WOW InActivity Time is 50 ms */
270#define WOW_POWERSAVE_DEFAULT_INACTIVITY_TIME 50
271
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800272/* Default Listen Interval */
273#define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1
274
275/*
276 * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID
277 * instead of assigning it to the last valid wmi
278 * cmd+1 to avoid updating this when a command is
279 * added/deleted.
280 */
281#define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1)
282
283#define WMA_NLO_FREQ_THRESH 1000 /* in MHz */
284#define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */
285#define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */
286
287/* Default rssi threshold defined in CFG80211 */
288#define WMA_RSSI_THOLD_DEFAULT -300
289
Dustin Brownd0a76562017-10-13 14:48:37 -0700290#define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
291#define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
292#define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
293#define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
yeshwanth sriram guntuka37c09822017-01-24 18:30:15 +0530294#define WMA_ROAM_HO_WAKE_LOCK_DURATION (500) /* in msec */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800295#ifdef FEATURE_WLAN_AUTO_SHUTDOWN
Dustin Brownd0a76562017-10-13 14:48:37 -0700296#define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800297#endif
Dustin Brownd0a76562017-10-13 14:48:37 -0700298#define WMA_BMISS_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
299#define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_MAX
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800300
301#define WMA_TXMIC_LEN 8
302#define WMA_RXMIC_LEN 8
psimha8696f772018-04-03 17:38:38 -0700303#define WMA_IV_KEY_LEN 16
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800304
305/*
306 * Length = (2 octets for Index and CTWin/Opp PS) and
307 * (13 octets for each NOA Descriptors)
308 */
309
310#define WMA_P2P_NOA_IE_OPP_PS_SET (0x80)
311#define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F)
312
313#define WMA_P2P_IE_ID 0xdd
314#define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a }
315#define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */
316#define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */
317
Jeff Johnsonc97816c2018-05-12 17:13:23 -0700318/* P2P Sub element definitions (according to table 5 of Wifi's P2P spec) */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800319#define WMA_P2P_SUB_ELEMENT_STATUS 0
320#define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1
321#define WMA_P2P_SUB_ELEMENT_CAPABILITY 2
322#define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3
323#define WMA_P2P_SUB_ELEMENT_GO_INTENT 4
324#define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5
325#define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6
326#define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7
327#define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8
328#define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9
329#define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10
330#define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11
331#define WMA_P2P_SUB_ELEMENT_NOA 12
332#define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13
333#define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14
334#define WMA_P2P_SUB_ELEMENT_GROUP_ID 15
335#define WMA_P2P_SUB_ELEMENT_INTERFACE 16
336#define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17
337#define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18
338#define WMA_P2P_SUB_ELEMENT_VENDOR 221
339
340/* Macros for handling unaligned memory accesses */
341#define P2PIE_PUT_LE16(a, val) \
342 do { \
Krunal Sonibd7e8932018-10-03 11:14:51 -0700343 (a)[1] = ((uint16_t) (val)) >> 8; \
344 (a)[0] = ((uint16_t) (val)) & 0xff; \
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800345 } while (0)
346
347#define P2PIE_PUT_LE32(a, val) \
348 do { \
Krunal Sonibd7e8932018-10-03 11:14:51 -0700349 (a)[3] = (uint8_t) ((((uint32_t) (val)) >> 24) & 0xff); \
350 (a)[2] = (uint8_t) ((((uint32_t) (val)) >> 16) & 0xff); \
351 (a)[1] = (uint8_t) ((((uint32_t) (val)) >> 8) & 0xff); \
352 (a)[0] = (uint8_t) (((uint32_t) (val)) & 0xff); \
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800353 } while (0)
354
355
356#define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1
357
358#define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1
359#define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800360
361#define WMA_VHT_PPS_PAID_MATCH 1
362#define WMA_VHT_PPS_GID_MATCH 2
363#define WMA_VHT_PPS_DELIM_CRC_FAIL 3
364
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800365#define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +0530366#define TWO_THIRD (2/3)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800367
368/**
Nitesh Shah5b7bae02016-09-28 18:58:33 +0530369 * WMA hardware mode list bit-mask definitions.
370 * Bits 4:0, 31:29 are unused.
371 *
372 * The below definitions are added corresponding to WMI DBS HW mode
373 * list to make it independent of firmware changes for WMI definitions.
374 * Currently these definitions have dependency with BIT positions of
375 * the existing WMI macros. Thus, if the BIT positions are changed for
376 * WMI macros, then these macros' BIT definitions are also need to be
377 * changed.
378 */
379#define WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS (28)
380#define WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS (24)
381#define WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS (20)
382#define WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS (16)
383#define WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS (12)
384#define WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS (8)
385#define WMA_HW_MODE_DBS_MODE_BITPOS (7)
386#define WMA_HW_MODE_AGILE_DFS_MODE_BITPOS (6)
387#define WMA_HW_MODE_SBS_MODE_BITPOS (5)
388
389#define WMA_HW_MODE_MAC0_TX_STREAMS_MASK \
390 (0xf << WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
391#define WMA_HW_MODE_MAC0_RX_STREAMS_MASK \
392 (0xf << WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
393#define WMA_HW_MODE_MAC1_TX_STREAMS_MASK \
394 (0xf << WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
395#define WMA_HW_MODE_MAC1_RX_STREAMS_MASK \
396 (0xf << WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
397#define WMA_HW_MODE_MAC0_BANDWIDTH_MASK \
398 (0xf << WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
399#define WMA_HW_MODE_MAC1_BANDWIDTH_MASK \
400 (0xf << WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
401#define WMA_HW_MODE_DBS_MODE_MASK \
402 (0x1 << WMA_HW_MODE_DBS_MODE_BITPOS)
403#define WMA_HW_MODE_AGILE_DFS_MODE_MASK \
404 (0x1 << WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
405#define WMA_HW_MODE_SBS_MODE_MASK \
406 (0x1 << WMA_HW_MODE_SBS_MODE_BITPOS)
407
408#define WMA_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \
409 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value)
410#define WMA_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \
411 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value)
412#define WMA_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \
413 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value)
414#define WMA_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \
415 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value)
416#define WMA_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value) \
417 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value)
418#define WMA_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value) \
419 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value)
420#define WMA_HW_MODE_DBS_MODE_SET(hw_mode, value) \
421 WMI_SET_BITS(hw_mode, WMA_HW_MODE_DBS_MODE_BITPOS, 1, value)
422#define WMA_HW_MODE_AGILE_DFS_SET(hw_mode, value) \
423 WMI_SET_BITS(hw_mode, WMA_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value)
424#define WMA_HW_MODE_SBS_MODE_SET(hw_mode, value) \
425 WMI_SET_BITS(hw_mode, WMA_HW_MODE_SBS_MODE_BITPOS, 1, value)
426
427#define WMA_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode) \
428 ((hw_mode & WMA_HW_MODE_MAC0_TX_STREAMS_MASK) >> \
429 WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
430#define WMA_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode) \
431 ((hw_mode & WMA_HW_MODE_MAC0_RX_STREAMS_MASK) >> \
432 WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
433#define WMA_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode) \
434 ((hw_mode & WMA_HW_MODE_MAC1_TX_STREAMS_MASK) >> \
435 WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
436#define WMA_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode) \
437 ((hw_mode & WMA_HW_MODE_MAC1_RX_STREAMS_MASK) >> \
438 WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
439#define WMA_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode) \
440 ((hw_mode & WMA_HW_MODE_MAC0_BANDWIDTH_MASK) >> \
441 WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
442#define WMA_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode) \
443 ((hw_mode & WMA_HW_MODE_MAC1_BANDWIDTH_MASK) >> \
444 WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
445#define WMA_HW_MODE_DBS_MODE_GET(hw_mode) \
446 ((hw_mode & WMA_HW_MODE_DBS_MODE_MASK) >> \
447 WMA_HW_MODE_DBS_MODE_BITPOS)
448#define WMA_HW_MODE_AGILE_DFS_GET(hw_mode) \
449 ((hw_mode & WMA_HW_MODE_AGILE_DFS_MODE_MASK) >> \
450 WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
451#define WMA_HW_MODE_SBS_MODE_GET(hw_mode) \
452 ((hw_mode & WMA_HW_MODE_SBS_MODE_MASK) >> \
453 WMA_HW_MODE_SBS_MODE_BITPOS)
454
Sridhar Selvaraj87309212017-06-28 17:41:50 +0530455/*
456 * PROBE_REQ_TX_DELAY
457 * param to specify probe request Tx delay for scans triggered on this VDEV
458 */
459#define PROBE_REQ_TX_DELAY 10
460
461/* PROBE_REQ_TX_TIME_GAP
462 * param to specify the time gap between each set of probe request transmission.
463 * The number of probe requests in each set depends on the ssid_list and,
464 * bssid_list in the scan request. This parameter will get applied only,
465 * for the scans triggered on this VDEV.
466 */
467#define PROBE_REQ_TX_TIME_GAP 20
Nitesh Shah0f3fce52016-10-13 22:01:41 +0530468
Rajeev Kumar8e3e2832015-11-06 16:02:54 -0800469typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo);
470
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +0530471typedef void (*tp_wma_packetdump_cb)(qdf_nbuf_t netbuf,
472 uint8_t status, uint8_t vdev_id, uint8_t type);
473
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800474/**
Govind Singhd76a5b02016-03-08 15:12:14 +0530475 * enum wma_rx_exec_ctx - wma rx execution context
476 * @WMA_RX_WORK_CTX: work queue context execution
477 * @WMA_RX_TASKLET_CTX: tasklet context execution
478 * @WMA_RX_SERIALIZER_CTX: MC thread context execution
479 *
480 */
481enum wma_rx_exec_ctx {
482 WMA_RX_WORK_CTX,
483 WMA_RX_TASKLET_CTX,
484 WMA_RX_SERIALIZER_CTX
485};
Krunal Soni2e48d012016-05-02 16:55:26 -0700486
487/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800488 * struct beacon_info - structure to store beacon template
489 * @buf: skb ptr
490 * @len: length
491 * @dma_mapped: is it dma mapped or not
492 * @tim_ie_offset: TIM IE offset
493 * @dtim_count: DTIM count
494 * @seq_no: sequence no
495 * @noa_sub_ie: NOA sub IE
496 * @noa_sub_ie_len: NOA sub IE length
497 * @noa_ie: NOA IE
498 * @p2p_ie_offset: p2p IE offset
499 * @lock: lock
500 */
501struct beacon_info {
Nirav Shahcbc6d722016-03-01 16:24:53 +0530502 qdf_nbuf_t buf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800503 uint32_t len;
504 uint8_t dma_mapped;
505 uint32_t tim_ie_offset;
506 uint8_t dtim_count;
507 uint16_t seq_no;
508 uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)];
509 uint16_t noa_sub_ie_len;
510 uint8_t *noa_ie;
511 uint16_t p2p_ie_offset;
Anurag Chouhana37b5b72016-02-21 14:53:42 +0530512 qdf_spinlock_t lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800513};
514
515/**
516 * struct beacon_tim_ie - structure to store TIM IE of beacon
517 * @tim_ie: tim ie
518 * @tim_len: tim ie length
519 * @dtim_count: dtim count
520 * @dtim_period: dtim period
521 * @tim_bitctl: tim bit control
522 * @tim_bitmap: tim bitmap
523 */
524struct beacon_tim_ie {
525 uint8_t tim_ie;
526 uint8_t tim_len;
527 uint8_t dtim_count;
528 uint8_t dtim_period;
529 uint8_t tim_bitctl;
530 uint8_t tim_bitmap[1];
531} __ATTRIB_PACK;
532
533/**
534 * struct pps - packet power save parameter
535 * @paid_match_enable: paid match enable
536 * @gid_match_enable: gid match enable
537 * @tim_clear: time clear
538 * @dtim_clear: dtim clear
539 * @eof_delim: eof delim
540 * @mac_match: mac match
541 * @delim_fail: delim fail
542 * @nsts_zero: nsts zero
543 * @rssi_chk: RSSI check
544 * @ebt_5g: ebt 5GHz
545 */
546struct pps {
547 bool paid_match_enable;
548 bool gid_match_enable;
549 bool tim_clear;
550 bool dtim_clear;
551 bool eof_delim;
552 bool mac_match;
553 bool delim_fail;
554 bool nsts_zero;
555 bool rssi_chk;
556 bool ebt_5g;
557};
558
559/**
560 * struct qpower_params - qpower related parameters
561 * @max_ps_poll_cnt: max ps poll count
562 * @max_tx_before_wake: max tx before wake
563 * @spec_ps_poll_wake_interval: ps poll wake interval
564 * @max_spec_nodata_ps_poll: no data ps poll
565 */
566struct qpower_params {
567 uint32_t max_ps_poll_cnt;
568 uint32_t max_tx_before_wake;
569 uint32_t spec_ps_poll_wake_interval;
570 uint32_t max_spec_nodata_ps_poll;
571};
572
573
574/**
575 * struct gtx_config_t - GTX config
576 * @gtxRTMask: for HT and VHT rate masks
577 * @gtxUsrcfg: host request for GTX mask
578 * @gtxPERThreshold: PER Threshold (default: 10%)
579 * @gtxPERMargin: PER margin (default: 2%)
580 * @gtxTPCstep: TCP step (default: 1)
581 * @gtxTPCMin: TCP min (default: 5)
582 * @gtxBWMask: BW mask (20/40/80/160 Mhz)
583 */
584typedef struct {
585 uint32_t gtxRTMask[2];
586 uint32_t gtxUsrcfg;
587 uint32_t gtxPERThreshold;
588 uint32_t gtxPERMargin;
589 uint32_t gtxTPCstep;
590 uint32_t gtxTPCMin;
591 uint32_t gtxBWMask;
592} gtx_config_t;
593
594/**
595 * struct pdev_cli_config_t - store pdev parameters
596 * @ani_enable: ANI is enabled/disable on target
597 * @ani_poll_len: store ANI polling period
598 * @ani_listen_len: store ANI listening period
599 * @ani_ofdm_level: store ANI OFDM immunity level
600 * @ani_cck_level: store ANI CCK immunity level
601 * @cwmenable: Dynamic bw is enable/disable in fw
602 * @txchainmask: tx chain mask
603 * @rxchainmask: rx chain mask
604 * @txpow2g: tx power limit for 2GHz
605 * @txpow5g: tx power limit for 5GHz
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800606 *
607 * This structure stores pdev parameters.
608 * Some of these parameters are set in fw and some
609 * parameters are only maintained in host.
610 */
611typedef struct {
612 uint32_t ani_enable;
613 uint32_t ani_poll_len;
614 uint32_t ani_listen_len;
615 uint32_t ani_ofdm_level;
616 uint32_t ani_cck_level;
617 uint32_t cwmenable;
618 uint32_t cts_cbw;
619 uint32_t txchainmask;
620 uint32_t rxchainmask;
621 uint32_t txpow2g;
622 uint32_t txpow5g;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800623} pdev_cli_config_t;
624
625/**
626 * struct vdev_cli_config_t - store vdev parameters
627 * @nss: nss width
628 * @ldpc: is ldpc is enable/disable
629 * @tx_stbc: TX STBC is enable/disable
630 * @rx_stbc: RX STBC is enable/disable
631 * @shortgi: short gi is enable/disable
632 * @rtscts_en: RTS/CTS is enable/disable
633 * @chwidth: channel width
634 * @tx_rate: tx rate
635 * @ampdu: ampdu size
636 * @amsdu: amsdu size
637 * @erx_adjust: enable/disable early rx enable
638 * @erx_bmiss_num: target bmiss number per sample
639 * @erx_bmiss_cycle: sample cycle
640 * @erx_slop_step: slop_step value
641 * @erx_init_slop: init slop
642 * @erx_adj_pause: pause adjust enable/disable
643 * @erx_dri_sample: enable/disable drift sample
644 * @pps_params: packet power save parameters
645 * @qpower_params: qpower parameters
646 * @gtx_info: GTX offload info
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700647 * @dcm: DCM enable/disable
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700648 * @range_ext: HE range extension enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800649 *
650 * This structure stores vdev parameters.
651 * Some of these parameters are set in fw and some
652 * parameters are only maintained in host.
653 */
654typedef struct {
655 uint32_t nss;
656 uint32_t ldpc;
657 uint32_t tx_stbc;
658 uint32_t rx_stbc;
659 uint32_t shortgi;
660 uint32_t rtscts_en;
661 uint32_t chwidth;
662 uint32_t tx_rate;
663 uint32_t ampdu;
664 uint32_t amsdu;
665 uint32_t erx_adjust;
666 uint32_t erx_bmiss_num;
667 uint32_t erx_bmiss_cycle;
668 uint32_t erx_slop_step;
669 uint32_t erx_init_slop;
670 uint32_t erx_adj_pause;
671 uint32_t erx_dri_sample;
672 struct pps pps_params;
673 struct qpower_params qpower_params;
674 gtx_config_t gtx_info;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700675#ifdef WLAN_FEATURE_11AX
676 uint8_t dcm;
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700677 uint8_t range_ext;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700678#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800679} vdev_cli_config_t;
680
681/**
Mukul Sharma5ff3c582016-09-12 15:23:35 +0530682 * struct wma_version_info - Store wmi version info
683 * @major: wmi major version
684 * @minor: wmi minor version
685 * @revision: wmi revision number
686 */
687struct wma_version_info {
688 u_int32_t major;
689 u_int32_t minor;
690 u_int32_t revision;
691};
692
693/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800694 * struct wma_wow - store wow patterns
695 * @magic_ptrn_enable: magic pattern enable/disable
696 * @wow_enable: wow enable/disable
697 * @wow_enable_cmd_sent: is wow enable command sent to fw
698 * @deauth_enable: is deauth wakeup enable/disable
699 * @disassoc_enable: is disassoc wakeup enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800700 * @gtk_pdev_enable: is GTK based wakeup enable/disable
701 * @gtk_err_enable: is GTK error wakeup enable/disable
702 * @lphb_cache: lphb cache
703 *
704 * This structure stores wow patterns and
705 * wow related parameters in host.
706 */
707struct wma_wow {
708 bool magic_ptrn_enable;
709 bool wow_enable;
710 bool wow_enable_cmd_sent;
711 bool deauth_enable;
712 bool disassoc_enable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800713 bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800714};
715
716#ifdef WLAN_FEATURE_11W
717#define CMAC_IPN_LEN (6)
718#define WMA_IGTK_KEY_INDEX_4 (4)
719#define WMA_IGTK_KEY_INDEX_5 (5)
720
721/**
722 * struct wma_igtk_ipn_t - GTK IPN info
723 * @ipn: IPN info
724 */
725typedef struct {
726 uint8_t ipn[CMAC_IPN_LEN];
727} wma_igtk_ipn_t;
728
729/**
730 * struct wma_igtk_key_t - GTK key
731 * @key_length: key length
732 * @key: key
733 * @key_id: key id
Himanshu Agarwalfc5d6602018-04-06 17:39:37 +0530734 * @key_cipher: key type
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800735 */
736typedef struct {
737 uint16_t key_length;
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530738 uint8_t key[CSR_AES_GMAC_256_KEY_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800739
740 /* IPN is maintained per iGTK keyID
741 * 0th index for iGTK keyID = 4;
742 * 1st index for iGTK KeyID = 5
743 */
744 wma_igtk_ipn_t key_id[2];
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530745 uint32_t key_cipher;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800746} wma_igtk_key_t;
747#endif
748
749/**
750 * struct vdev_restart_params_t - vdev restart parameters
751 * @vdev_id: vdev id
752 * @ssid: ssid
753 * @flags: flags
754 * @requestor_id: requestor id
755 * @chan: channel
756 * @hidden_ssid_restart_in_progress: hidden ssid restart flag
757 * @ssidHidden: is ssid hidden or not
758 */
759typedef struct {
760 A_UINT32 vdev_id;
761 wmi_ssid ssid;
762 A_UINT32 flags;
763 A_UINT32 requestor_id;
764 A_UINT32 disable_hw_ack;
765 wmi_channel chan;
Abhishek Singha063f1c2018-09-19 11:37:51 +0530766#ifndef CONFIG_VDEV_SM
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530767 qdf_atomic_t hidden_ssid_restart_in_progress;
Abhishek Singha063f1c2018-09-19 11:37:51 +0530768#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800769 uint8_t ssidHidden;
770} vdev_restart_params_t;
771
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +0530772struct roam_synch_frame_ind {
773 uint32_t bcn_probe_rsp_len;
774 uint8_t *bcn_probe_rsp;
775 uint8_t is_beacon;
776 uint32_t reassoc_req_len;
777 uint8_t *reassoc_req;
778 uint32_t reassoc_rsp_len;
779 uint8_t *reassoc_rsp;
780};
781
782
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800783/**
784 * struct wma_txrx_node - txrx node
Rajeev Kumar Sirasanagandla17fa3082018-09-05 21:30:53 +0530785 * @vdev: pointer to vdev object
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800786 * @addr: mac address
787 * @bssid: bssid
788 * @handle: wma handle
789 * @beacon: beacon info
790 * @vdev_restart_params: vdev restart parameters
791 * @config: per vdev config parameters
792 * @scan_info: scan info
793 * @type: type
794 * @sub_type: sub type
795 * @nlo_match_evt_received: is nlo match event received or not
796 * @pno_in_progress: is pno in progress or not
797 * @plm_in_progress: is plm in progress or not
798 * @ptrn_match_enable: is pattern match is enable or not
799 * @num_wow_default_patterns: number of default wow patterns configured for vdev
800 * @num_wow_user_patterns: number of user wow patterns configured for vdev
801 * @conn_state: connection state
802 * @beaconInterval: beacon interval
803 * @llbCoexist: 11b coexist
804 * @shortSlotTimeSupported: is short slot time supported or not
805 * @dtimPeriod: DTIM period
806 * @chanmode: channel mode
807 * @vht_capable: VHT capablity flag
808 * @ht_capable: HT capablity flag
809 * @mhz: channel frequency in KHz
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700810 * @chan_width: channel bandwidth
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800811 * @vdev_up: is vdev up or not
812 * @tsfadjust: TSF adjust
813 * @addBssStaContext: add bss context
814 * @aid: association id
815 * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled
816 * @key: GTK key
817 * @uapsd_cached_val: uapsd cached value
818 * @stats_rsp: stats response
819 * @fw_stats_set: fw stats value
820 * @del_staself_req: delete sta self request
821 * @bss_status: bss status
822 * @rate_flags: rate flags
823 * @nss: nss value
824 * @is_channel_switch: is channel switch
825 * @pause_bitmap: pause bitmap
826 * @tx_power: tx power in dbm
827 * @max_tx_power: max tx power in dbm
828 * @nwType: network type (802.11a/b/g/n/ac)
829 * @staKeyParams: sta key parameters
830 * @ps_enabled: is powersave enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800831 * @peer_count: peer count
832 * @roam_synch_in_progress: flag is in progress or not
833 * @plink_status_req: link status request
834 * @psnr_req: snr request
835 * @delay_before_vdev_stop: delay
836 * @tx_streams: number of tx streams can be used by the vdev
837 * @rx_streams: number of rx streams can be used by the vdev
838 * @chain_mask: chain mask can be used by the vdev
839 * @mac_id: the mac on which vdev is on
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530840 * @wep_default_key_idx: wep default index for group key
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +0530841 * @arp_offload_req: cached arp offload request
842 * @ns_offload_req: cached ns offload request
Dustin Brown9d797d62017-01-11 16:39:12 -0800843 * @wow_stats: stat counters for WoW related events
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +0530844 * @rcpi_req: rcpi request
Jeff Johnson0c7b0902018-07-22 20:52:17 -0700845 * @in_bmps: Whether bmps for this interface has been enabled
Dustin Brownec2c92e2017-07-26 11:13:49 -0700846 * @vdev_start_wakelock: wakelock to protect vdev start op with firmware
847 * @vdev_stop_wakelock: wakelock to protect vdev stop op with firmware
Rajeev Kumar155a3e42017-10-10 15:31:17 -0700848 * @vdev_set_key_wakelock: wakelock to protect vdev set key op with firmware
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +0530849 * @channel: channel
Rajeev Kumar Sirasanagandla4f20b672018-03-12 13:52:50 +0530850 * @roam_scan_stats_req: cached roam scan stats request
Jeff Johnson0c7b0902018-07-22 20:52:17 -0700851 *
852 * It stores parameters per vdev in wma.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800853 */
854struct wma_txrx_node {
Rajeev Kumar Sirasanagandla17fa3082018-09-05 21:30:53 +0530855 struct wlan_objmgr_vdev *vdev;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800856 uint8_t addr[IEEE80211_ADDR_LEN];
857 uint8_t bssid[IEEE80211_ADDR_LEN];
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -0800858 struct cdp_vdev *handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800859 struct beacon_info *beacon;
860 vdev_restart_params_t vdev_restart_params;
861 vdev_cli_config_t config;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800862 uint32_t type;
863 uint32_t sub_type;
Srinivas Girigowda515a9ef2015-12-11 11:00:48 -0800864#ifdef FEATURE_WLAN_ESE
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800865 bool plm_in_progress;
866#endif
867 bool ptrn_match_enable;
868 uint8_t num_wow_default_patterns;
869 uint8_t num_wow_user_patterns;
870 bool conn_state;
871 tSirMacBeaconInterval beaconInterval;
872 uint8_t llbCoexist;
873 uint8_t shortSlotTimeSupported;
874 uint8_t dtimPeriod;
Tushnim Bhattacharyya89710e32018-05-04 13:35:59 -0700875 WMI_HOST_WLAN_PHY_MODE chanmode;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800876 uint8_t vht_capable;
877 uint8_t ht_capable;
878 A_UINT32 mhz;
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700879 enum phy_ch_width chan_width;
Selvaraj, Sridhar171e2252016-06-22 22:33:26 +0530880 bool vdev_active;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800881 uint64_t tsfadjust;
882 void *addBssStaContext;
883 uint8_t aid;
884 uint8_t rmfEnabled;
885#ifdef WLAN_FEATURE_11W
886 wma_igtk_key_t key;
Himanshu Agarwalfc5d6602018-04-06 17:39:37 +0530887 uint32_t ucast_key_cipher;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800888#endif /* WLAN_FEATURE_11W */
889 uint32_t uapsd_cached_val;
890 tAniGetPEStatsRsp *stats_rsp;
891 uint8_t fw_stats_set;
892 void *del_staself_req;
Abhishek Singh0d74f9e2017-09-26 14:02:42 +0530893 bool is_del_sta_defered;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530894 qdf_atomic_t bss_status;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800895 uint8_t rate_flags;
896 uint8_t nss;
Abhishek Singha063f1c2018-09-19 11:37:51 +0530897#ifndef CONFIG_VDEV_SM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800898 bool is_channel_switch;
Abhishek Singha063f1c2018-09-19 11:37:51 +0530899#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800900 uint16_t pause_bitmap;
Amar Singhala297bfa2015-10-15 15:07:29 -0700901 int8_t tx_power;
902 int8_t max_tx_power;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800903 uint32_t nwType;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800904 void *staKeyParams;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800905 uint32_t peer_count;
906 bool roam_synch_in_progress;
907 void *plink_status_req;
908 void *psnr_req;
909 uint8_t delay_before_vdev_stop;
910#ifdef FEATURE_WLAN_EXTSCAN
911 bool extscan_in_progress;
912#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800913 uint32_t tx_streams;
914 uint32_t rx_streams;
915 uint32_t chain_mask;
916 uint32_t mac_id;
Varun Reddy Yeturu30bc42c2016-02-04 10:07:30 -0800917 bool roaming_in_progress;
Varun Reddy Yeturu5ab47462016-05-08 18:08:11 -0700918 int32_t roam_synch_delay;
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -0700919 uint8_t nss_2g;
920 uint8_t nss_5g;
Peng Xu8fdaa492016-06-22 10:20:47 -0700921 bool p2p_lo_in_progress;
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530922 uint8_t wep_default_key_idx;
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +0530923 tSirHostOffloadReq arp_offload_req;
924 tSirHostOffloadReq ns_offload_req;
Naveen Rawat3ff5cff2018-01-29 14:31:16 -0800925#ifndef QCA_SUPPORT_CP_STATS
Dustin Brown9d797d62017-01-11 16:39:12 -0800926 struct sir_vdev_wow_stats wow_stats;
Naveen Rawat3ff5cff2018-01-29 14:31:16 -0800927#endif
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +0530928 struct sme_rcpi_req *rcpi_req;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -0800929#ifdef WLAN_FEATURE_11AX
930 bool he_capable;
931 uint32_t he_ops;
932#endif
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +0530933 bool in_bmps;
Kiran Kumar Lokeref9dc7912017-06-28 18:10:58 -0700934 struct beacon_filter_param beacon_filter;
935 bool beacon_filter_enabled;
Dustin Brownec2c92e2017-07-26 11:13:49 -0700936 qdf_wake_lock_t vdev_start_wakelock;
937 qdf_wake_lock_t vdev_stop_wakelock;
Rajeev Kumar155a3e42017-10-10 15:31:17 -0700938 qdf_wake_lock_t vdev_set_key_wakelock;
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +0530939 struct roam_synch_frame_ind roam_synch_frame_ind;
Naveen Rawatd7734142017-10-27 10:02:40 -0700940 bool is_waiting_for_key;
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +0530941 uint8_t channel;
Rajeev Kumar Sirasanagandla4f20b672018-03-12 13:52:50 +0530942 struct sir_roam_scan_stats *roam_scan_stats_req;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800943};
944
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800945/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800946 * struct ibss_power_save_params - IBSS power save parameters
947 * @atimWindowLength: ATIM window length
948 * @isPowerSaveAllowed: is power save allowed
949 * @isPowerCollapseAllowed: is power collapsed allowed
950 * @isAwakeonTxRxEnabled: is awake on tx/rx enabled
951 * @inactivityCount: inactivity count
952 * @txSPEndInactivityTime: tx SP end inactivity time
953 * @ibssPsWarmupTime: IBSS power save warm up time
954 * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable
955 */
956typedef struct {
957 uint32_t atimWindowLength;
958 uint32_t isPowerSaveAllowed;
959 uint32_t isPowerCollapseAllowed;
960 uint32_t isAwakeonTxRxEnabled;
961 uint32_t inactivityCount;
962 uint32_t txSPEndInactivityTime;
963 uint32_t ibssPsWarmupTime;
964 uint32_t ibssPs1RxChainInAtimEnable;
965} ibss_power_save_params;
966
967/**
Nitesh Shah877ad5d2016-09-22 19:27:58 +0530968 * struct mac_ss_bw_info - hw_mode_list PHY/MAC params for each MAC
969 * @mac_tx_stream: Max TX stream
970 * @mac_rx_stream: Max RX stream
971 * @mac_bw: Max bandwidth
972 */
973struct mac_ss_bw_info {
974 uint32_t mac_tx_stream;
975 uint32_t mac_rx_stream;
976 uint32_t mac_bw;
977};
978
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800979/**
Komal Seelam02d09342016-02-23 18:03:19 +0530980 * struct wma_ini_config - Structure to hold wma ini configuration
981 * @max_no_of_peers: Max Number of supported
982 *
983 * Placeholder for WMA ini parameters.
984 */
985struct wma_ini_config {
986 uint8_t max_no_of_peers;
987};
988
989/**
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +0530990 * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID
991 * @num_channels: Number of channels
992 * @channel_list: Channel list
993 */
994struct wma_valid_channels {
995 uint8_t num_channels;
996 uint8_t channel_list[MAX_NUM_CHAN];
997};
998
Krunal Soni2e48d012016-05-02 16:55:26 -0700999/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001000 * struct t_wma_handle - wma context
1001 * @wmi_handle: wmi handle
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001002 * @cds_context: cds handle
1003 * @mac_context: mac context
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +05301004 * @psoc: psoc context
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001005 * @pdev: physical device global object
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001006 * @wma_resume_event: wma resume event
1007 * @target_suspend: target suspend event
1008 * @recovery_event: wma FW recovery event
1009 * @max_station: max stations
1010 * @max_bssid: max bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001011 * @myaddr: current mac address
1012 * @hwaddr: mac address from EEPROM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001013 * @lpss_support: LPSS feature is supported in target or not
1014 * @wmi_ready: wmi status flag
1015 * @wlan_init_status: wlan init status
Anurag Chouhanf04e84f2016-03-03 10:12:12 +05301016 * @qdf_dev: qdf device
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001017 * @wmi_service_bitmap: wmi services bitmap received from Target
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001018 * @wmi_service_ext_bitmap: extended wmi services bitmap received from Target
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001019 * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac
1020 * @tx_frm_download_comp_event: Event to wait for tx download completion
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001021 * @tx_queue_empty_event: Dummy event to wait for draining MSDUs left
1022 * in hardware tx queue and before requesting VDEV_STOP. Nobody will
1023 * set this and wait will timeout, and code will poll the pending tx
1024 * descriptors number to be zero.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001025 * @umac_ota_ack_cb: Ack Complete Callback registered by umac
1026 * @umac_data_ota_ack_cb: ack complete callback
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001027 * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data
1028 * was done
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001029 * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf
1030 * @needShutdown: is shutdown needed or not
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001031 * @tgt_cfg_update_cb: configuration update callback
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001032 * @reg_cap: regulatory capablities
1033 * @scan_id: scan id
1034 * @interfaces: txrx nodes(per vdev)
1035 * @pdevconfig: pdev related configrations
1036 * @vdev_resp_queue: vdev response queue
1037 * @vdev_respq_lock: vdev response queue lock
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001038 * @wma_hold_req_queue: Queue use to serialize requests to firmware
1039 * @wma_hold_req_q_lock: Mutex for @wma_hold_req_queue
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001040 * @vht_supp_mcs: VHT supported MCS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001041 * @is_fw_assert: is fw asserted
1042 * @wow: wow related patterns & parameters
1043 * @no_of_suspend_ind: number of suspend indications
1044 * @no_of_resume_ind: number of resume indications
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001045 * @ack_work_ctx: Context for deferred processing of TX ACK
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001046 * @powersave_mode: power save mode
1047 * @ptrn_match_enable_all_vdev: is pattern match is enable/disable
1048 * @pGetRssiReq: get RSSI request
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001049 * @get_one_peer_info: When a "get peer info" request is active, is
1050 * the request for a single peer?
1051 * @get_sta_peer_info: Is a "get peer info" request active?
1052 * @peer_macaddr: When @get_one_peer_info is true, the peer's mac address
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001053 * @thermal_mgmt_info: Thermal mitigation related info
1054 * @roam_offload_enabled: is roam offload enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001055 * @ssdp: ssdp flag
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001056 * @enable_mc_list: To Check if Multicast list filtering is enabled in FW
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001057 * @ibss_started: is IBSS started or not
1058 * @ibsskey_info: IBSS key info
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001059 * @hddTxFailCb: tx fail indication callback
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001060 * @extscan_wake_lock: extscan wake lock
1061 * @wow_wake_lock: wow wake lock
Mukul Sharmae44d0542017-05-23 21:50:56 +05301062 * @wow_auth_req_wl: wow wake lock for auth req
1063 * @wow_assoc_req_wl: wow wake lock for assoc req
1064 * @wow_deauth_rec_wl: wow wake lock for deauth req
1065 * @wow_disassoc_rec_wl: wow wake lock for disassoc req
1066 * @wow_ap_assoc_lost_wl: wow wake lock for assoc lost req
1067 * @wow_auto_shutdown_wl: wow wake lock for shutdown req
1068 * @roam_ho_wl: wake lock for roam handoff req
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001069 * @wow_nack: wow negative ack flag
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001070 * @is_wow_bus_suspended: is wow bus suspended flag
1071 * @wma_scan_comp_timer: scan completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001072 * @suitable_ap_hb_failure: better ap found
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001073 * @suitable_ap_hb_failure_rssi: RSSI when suitable_ap_hb_failure
1074 * triggered for later usage to report RSSI at beacon miss scenario
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001075 * @wma_ibss_power_save_params: IBSS Power Save config Parameters
1076 * @IsRArateLimitEnabled: RA rate limiti s enabled or not
1077 * @RArateLimitInterval: RA rate limit interval
1078 * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not
1079 * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not
1080 * @staMaxLIModDtim: station max listen interval
1081 * @staModDtim: station mode DTIM
1082 * @staDynamicDtim: station dynamic DTIM
1083 * @enable_mhf_offload: is MHF offload enable/disable
1084 * @last_mhf_entries_timestamp: timestamp when last entries where set
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001085 * @hw_bd_id: hardware board id
1086 * @hw_bd_info: hardware board info
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001087 * @miracast_value: miracast value
1088 * @log_completion_timer: log completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001089 * @num_dbs_hw_modes: Number of HW modes supported by the FW
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001090 * @hw_mode: DBS HW mode list
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001091 * @old_hw_mode_index: Previous configured HW mode index
1092 * @new_hw_mode_index: Current configured HW mode index
1093 * @peer_authorized_cb: peer authorized hdd callback
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001094 * @wow_unspecified_wake_count: Number of wake events which did not
1095 * correspond to known wake events. Note that known wake events are
1096 * tracked on a per-vdev basis via the struct sir_vdev_wow_stats
1097 * wow_stats in struct wma_txrx_node
1098 * @ocb_config_req: OCB request context
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001099 * @max_scan: maximum scan requests than can be queued
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001100 * @self_gen_frm_pwr: Self-generated frame power
1101 * @tx_chain_mask_cck: Is the CCK tx chain mask enabled
1102 * @service_ready_ext_timer: Timer for service ready extended. Note
1103 * this is a a timer instead of wait event because on receiving the
1104 * service ready event, we will be waiting on the MC thread for the
1105 * service extended ready event which is also processed in MC
1106 * thread. This leads to MC thread being stuck. Alternative was to
1107 * process these events in tasklet/workqueue context. But, this
1108 * leads to race conditions when the events are processed in two
1109 * different context. So, processing ready event and extended ready
1110 * event in the serialized MC thread context with a timer.
1111 * @csr_roam_synch_cb: CSR callback for firmware Roam Sync events
1112 * @pe_roam_synch_cb: pe callback for firmware Roam Sync events
Sandeep Puligilla19ddda22016-01-05 12:18:02 -08001113 * @wmi_cmd_rsp_wake_lock: wmi command response wake lock
1114 * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001115 * @active_uc_apf_mode: Setting that determines how APF is applied in
1116 * active mode for uc packets
1117 * @active_mc_bc_apf_mode: Setting that determines how APF is applied in
1118 * active mode for MC/BC packets
1119 * @ini_config: Initial configuration from upper layer
1120 * @saved_chan: saved channel list sent as part of
1121 * WMI_SCAN_CHAN_LIST_CMDID
1122 * @nan_datapath_enabled: Is NAN datapath support enabled in firmware?
1123 * @pe_ndp_event_handler: Handler function for NAN Data Path events
1124 * @fw_timeout_crash: Should firmware be reset upon response timeout?
1125 * @sub_20_support: Does target support sub-20MHz bandwidth (aka
1126 * half-rate and quarter-rate)?
1127 * @is_dfs_offloaded: Is dfs and cac timer offloaded?
1128 * @wma_mgmt_tx_packetdump_cb: Callback function for TX packet dump
1129 * @wma_mgmt_rx_packetdump_cb: Callback function for RX packet dump
1130 * @rcpi_enabled: Is RCPI enabled?
1131 * @link_stats_results: Structure for handing link stats from firmware
1132 * @tx_fail_cnt: Number of TX failures
1133 * @he_cap: 802.11ax capabilities
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001134 * @bandcapability: band capability configured through ini
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001135 * @tx_bfee_8ss_enabled: Is Tx Beamformee support for 8x8 enabled?
1136 * @in_imps: Is device in Idle Mode Power Save?
gaurank kathpalia5fcefa92018-10-24 15:03:15 +05301137 * @dynamic_nss_chains_update: per vdev nss, chains update
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301138 * @ito_repeat_count: Indicates ito repeated count
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001139 * @wma_fw_time_sync_timer: timer used for firmware time sync
1140 * @critical_events_in_flight: number of suspend-preventing events
1141 * in flight
1142 *
1143 * This structure is the global wma context. It contains global wma
1144 * module parameters and handles of other modules.
1145
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001146 */
1147typedef struct {
1148 void *wmi_handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001149 void *cds_context;
1150 void *mac_context;
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +05301151 struct wlan_objmgr_psoc *psoc;
Kiran Kumar Lokerea3de2262017-04-12 12:15:04 -07001152 struct wlan_objmgr_pdev *pdev;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301153 qdf_event_t wma_resume_event;
1154 qdf_event_t target_suspend;
1155 qdf_event_t runtime_suspend;
1156 qdf_event_t recovery_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001157 uint16_t max_station;
1158 uint16_t max_bssid;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001159 uint8_t myaddr[IEEE80211_ADDR_LEN];
1160 uint8_t hwaddr[IEEE80211_ADDR_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001161#ifdef WLAN_FEATURE_LPSS
1162 uint8_t lpss_support;
1163#endif
1164 uint8_t ap_arpns_support;
1165 bool wmi_ready;
1166 uint32_t wlan_init_status;
Anurag Chouhandf2b2682016-02-29 14:15:27 +05301167 qdf_device_t qdf_dev;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001168 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
Vignesh Viswanathan731186f2017-09-18 13:47:37 +05301169 uint32_t wmi_service_ext_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301170 wma_tx_dwnld_comp_callback tx_frm_download_comp_cb;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301171 qdf_event_t tx_frm_download_comp_event;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301172 qdf_event_t tx_queue_empty_event;
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001173 wma_tx_ota_comp_callback
1174 umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15];
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301175 wma_tx_ota_comp_callback umac_data_ota_ack_cb;
Anurag Chouhan6d760662016-02-20 16:05:43 +05301176 unsigned long last_umac_data_ota_timestamp;
Nirav Shahcbc6d722016-03-01 16:24:53 +05301177 qdf_nbuf_t last_umac_data_nbuf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001178 bool needShutdown;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001179 wma_tgt_cfg_cb tgt_cfg_update_cb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001180 HAL_REG_CAPABILITIES reg_cap;
1181 uint32_t scan_id;
1182 struct wma_txrx_node *interfaces;
1183 pdev_cli_config_t pdevconfig;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301184 qdf_list_t vdev_resp_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301185 qdf_spinlock_t vdev_respq_lock;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301186 qdf_list_t wma_hold_req_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301187 qdf_spinlock_t wma_hold_req_q_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001188 uint32_t vht_supp_mcs;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001189 uint8_t is_fw_assert;
1190 struct wma_wow wow;
1191 uint8_t no_of_suspend_ind;
1192 uint8_t no_of_resume_ind;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001193 struct wma_tx_ack_work_ctx *ack_work_ctx;
1194 uint8_t powersave_mode;
1195 bool ptrn_match_enable_all_vdev;
1196 void *pGetRssiReq;
Will Huanga9814592017-05-24 15:47:58 +08001197 bool get_one_peer_info;
1198 bool get_sta_peer_info;
1199 struct qdf_mac_addr peer_macaddr;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001200 t_thermal_mgmt thermal_mgmt_info;
1201 bool roam_offload_enabled;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001202 bool ssdp;
Komal Seelam9764a842016-05-24 11:07:23 +05301203 bool enable_mc_list;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001204 uint8_t ibss_started;
1205 tSetBssKeyParams ibsskey_info;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001206 txFailIndCallback hddTxFailCb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001207#ifdef FEATURE_WLAN_EXTSCAN
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301208 qdf_wake_lock_t extscan_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001209#endif
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301210 qdf_wake_lock_t wow_wake_lock;
Mukul Sharmae44d0542017-05-23 21:50:56 +05301211 qdf_wake_lock_t wow_auth_req_wl;
1212 qdf_wake_lock_t wow_assoc_req_wl;
1213 qdf_wake_lock_t wow_deauth_rec_wl;
1214 qdf_wake_lock_t wow_disassoc_rec_wl;
1215 qdf_wake_lock_t wow_ap_assoc_lost_wl;
1216 qdf_wake_lock_t wow_auto_shutdown_wl;
1217 qdf_wake_lock_t roam_ho_wl;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001218 int wow_nack;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301219 qdf_atomic_t is_wow_bus_suspended;
Anurag Chouhan210db072016-02-22 18:42:15 +05301220 qdf_mc_timer_t wma_scan_comp_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001221 bool suitable_ap_hb_failure;
Sreelakshmi Konamki58c72432016-11-09 17:06:44 +05301222 uint32_t suitable_ap_hb_failure_rssi;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001223 ibss_power_save_params wma_ibss_power_save_params;
1224#ifdef FEATURE_WLAN_RA_FILTERING
1225 bool IsRArateLimitEnabled;
1226 uint16_t RArateLimitInterval;
1227#endif
1228#ifdef WLAN_FEATURE_LPSS
1229 bool is_lpass_enabled;
1230#endif
1231#ifdef WLAN_FEATURE_NAN
1232 bool is_nan_enabled;
1233#endif
1234 uint8_t staMaxLIModDtim;
1235 uint8_t staModDtim;
1236 uint8_t staDynamicDtim;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001237 uint8_t enable_mhf_offload;
1238 unsigned long last_mhf_entries_timestamp;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001239 uint32_t hw_bd_id;
1240 uint32_t hw_bd_info[HW_BD_INFO_SIZE];
1241 uint32_t miracast_value;
Anurag Chouhan210db072016-02-22 18:42:15 +05301242 qdf_mc_timer_t log_completion_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001243 uint32_t num_dbs_hw_modes;
1244 struct dbs_hw_mode_info hw_mode;
1245 uint32_t old_hw_mode_index;
1246 uint32_t new_hw_mode_index;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001247 wma_peer_authorized_fp peer_authorized_cb;
Dustin Brown9d797d62017-01-11 16:39:12 -08001248 uint32_t wow_unspecified_wake_count;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001249 struct sir_ocb_config *ocb_config_req;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001250 uint8_t max_scan;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001251 uint16_t self_gen_frm_pwr;
1252 bool tx_chain_mask_cck;
Anurag Chouhan210db072016-02-22 18:42:15 +05301253 qdf_mc_timer_t service_ready_ext_timer;
Manikandan Mohan1dd8b5d2017-04-18 15:54:09 -07001254
Varun Reddy Yeturu88f123c2017-03-14 18:24:32 -07001255 QDF_STATUS (*csr_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001256 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturuf907f912016-03-21 15:06:22 -07001257 tpSirBssDescription bss_desc_ptr,
1258 enum sir_roam_op_code reason);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301259 QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001260 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturub5d858e2017-12-15 16:08:13 -08001261 tpSirBssDescription bss_desc_ptr,
1262 enum sir_roam_op_code reason);
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301263 qdf_wake_lock_t wmi_cmd_rsp_wake_lock;
1264 qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock;
Nachiket Kukadee547a482018-05-22 16:43:30 +05301265 enum active_apf_mode active_uc_apf_mode;
1266 enum active_apf_mode active_mc_bc_apf_mode;
Komal Seelam02d09342016-02-23 18:03:19 +05301267 struct wma_ini_config ini_config;
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301268 struct wma_valid_channels saved_chan;
Deepak Dhamdhere13230d32016-05-26 00:46:53 -07001269 bool nan_datapath_enabled;
Naveen Rawat0fc3f692016-06-22 14:30:54 -07001270 QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx,
Rajeev Kumarb60abe42017-01-21 15:39:31 -08001271 struct scheduler_msg *msg);
Sandeep Puligillaafa52892016-10-26 19:03:16 -07001272 bool fw_timeout_crash;
Naveen Rawat64e477e2016-05-20 10:34:56 -07001273 bool sub_20_support;
Arif Hussaind54b62c2018-03-01 13:31:37 -08001274 bool is_dfs_offloaded;
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05301275 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb;
1276 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb;
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +05301277 bool rcpi_enabled;
Srinivas Girigowdaad874a82016-10-25 14:08:00 -07001278 tSirLLStatsResults *link_stats_results;
Kapil Gupta10800b92017-05-31 19:14:47 +05301279 uint64_t tx_fail_cnt;
Krishna Kumaar Natarajanf5676502017-03-06 10:28:44 -08001280#ifdef WLAN_FEATURE_11AX
1281 struct he_capability he_cap;
1282#endif
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001283 uint8_t bandcapability;
Nachiket Kukade8b4bfd82017-05-25 18:34:48 +05301284 bool tx_bfee_8ss_enabled;
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05301285 bool in_imps;
gaurank kathpalia5fcefa92018-10-24 15:03:15 +05301286 bool dynamic_nss_chains_support;
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301287 uint8_t ito_repeat_count;
gaurank kathpalia85f8a612018-02-21 18:55:24 +05301288 qdf_mc_timer_t wma_fw_time_sync_timer;
Dustin Brown05557182017-10-12 14:44:49 -07001289 qdf_atomic_t critical_events_in_flight;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001290} t_wma_handle, *tp_wma_handle;
1291
Jeff Johnsonf7ab8142017-09-13 09:04:23 -07001292extern void cds_wma_complete_cback(void);
gaurank kathpalia748c7272018-10-24 22:05:15 +05301293
1294/**
1295 * wma_vdev_nss_chain_params_send() - send vdev nss chain params to fw.
1296 * @vdev_id: vdev_id
1297 * @user_cfg: pointer to the params structure
1298 *
1299 * This function sends nss chain params to the fw
1300 *
1301 * Return: QDF_STATUS_SUCCESS on success, QDF_STATUS_E_FAILURE on error
1302 */
1303QDF_STATUS
1304wma_vdev_nss_chain_params_send(uint8_t vdev_id,
1305 struct wlan_mlme_nss_chains *user_cfg);
1306
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001307extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G,
Rajeev Kumar Sirasanagandla873b6d92017-06-06 13:11:17 +05301308 uint16_t regdmn5G, uint8_t ctl2G,
1309 uint8_t ctl5G);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001310/**
1311 * enum frame_index - Frame index
1312 * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack
1313 * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack
1314 * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack
1315 * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack
1316 * @FRAME_INDEX_MAX: maximum frame index
1317 */
1318enum frame_index {
1319 GENERIC_NODOWNLD_NOACK_COMP_INDEX,
1320 GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX,
1321 GENERIC_DOWNLD_COMP_ACK_COMP_INDEX,
1322 GENERIC_NODOWLOAD_ACK_COMP_INDEX,
1323 FRAME_INDEX_MAX
1324};
1325
1326/**
1327 * struct wma_tx_ack_work_ctx - tx ack work context
1328 * @wma_handle: wma handle
1329 * @sub_type: sub type
1330 * @status: status
1331 * @ack_cmp_work: work structure
1332 */
1333struct wma_tx_ack_work_ctx {
1334 tp_wma_handle wma_handle;
1335 uint16_t sub_type;
1336 int32_t status;
Anurag Chouhan42958bb2016-02-19 15:43:11 +05301337 qdf_work_t ack_cmp_work;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001338};
1339
1340/**
1341 * struct wma_target_req - target request parameters
1342 * @event_timeout: event timeout
1343 * @node: list
1344 * @user_data: user data
1345 * @msg_type: message type
1346 * @vdev_id: vdev id
1347 * @type: type
1348 */
1349struct wma_target_req {
Anurag Chouhan210db072016-02-22 18:42:15 +05301350 qdf_mc_timer_t event_timeout;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301351 qdf_list_node_t node;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001352 void *user_data;
1353 uint32_t msg_type;
1354 uint8_t vdev_id;
1355 uint8_t type;
1356};
1357
1358/**
1359 * struct wma_vdev_start_req - vdev start request parameters
1360 * @beacon_intval: beacon interval
1361 * @dtim_period: dtim period
1362 * @max_txpow: max tx power
1363 * @chan_offset: channel offset
1364 * @is_dfs: is dfs supported or not
1365 * @vdev_id: vdev id
1366 * @chan: channel
1367 * @oper_mode: operating mode
1368 * @ssid: ssid
1369 * @hidden_ssid: hidden ssid
1370 * @pmf_enabled: is pmf enabled or not
1371 * @vht_capable: VHT capabality
1372 * @ht_capable: HT capabality
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001373 * @dot11_mode: 802.11 mode
1374 * @is_half_rate: is the channel operating at 10MHz
1375 * @is_quarter_rate: is the channel operating at 5MHz
1376 * @preferred_tx_streams: policy manager indicates the preferred
1377 * number of transmit streams
1378 * @preferred_rx_streams: policy manager indicates the preferred
1379 * number of receive streams
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001380 * @beacon_tx_rate: beacon tx rate
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001381 * @he_capable: HE capability
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001382 * @he_ops: HE operation
Arif Hussain671a1902017-03-17 09:08:32 -07001383 * @cac_duration_ms: cac duration in milliseconds
1384 * @dfs_regdomain: dfs region
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001385 */
1386struct wma_vdev_start_req {
1387 uint32_t beacon_intval;
1388 uint32_t dtim_period;
1389 int32_t max_txpow;
Kiran Kumar Lokere13644672016-02-29 15:40:10 -08001390 enum phy_ch_width chan_width;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001391 bool is_dfs;
1392 uint8_t vdev_id;
1393 uint8_t chan;
1394 uint8_t oper_mode;
1395 tSirMacSSid ssid;
1396 uint8_t hidden_ssid;
1397 uint8_t pmf_enabled;
1398 uint8_t vht_capable;
1399 uint8_t ch_center_freq_seg0;
1400 uint8_t ch_center_freq_seg1;
1401 uint8_t ht_capable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001402 uint8_t dot11_mode;
1403 bool is_half_rate;
1404 bool is_quarter_rate;
1405 uint32_t preferred_tx_streams;
1406 uint32_t preferred_rx_streams;
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001407 uint16_t beacon_tx_rate;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001408#ifdef WLAN_FEATURE_11AX
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001409 bool he_capable;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001410 uint32_t he_ops;
1411#endif
Arif Hussain671a1902017-03-17 09:08:32 -07001412 uint32_t cac_duration_ms;
1413 uint32_t dfs_regdomain;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001414};
1415
1416/**
1417 * struct wma_set_key_params - set key parameters
1418 * @vdev_id: vdev id
1419 * @def_key_idx: used to see if we have to read the key from cfg
1420 * @key_len: key length
1421 * @peer_mac: peer mac address
1422 * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC
1423 * @key_type: key type
1424 * @key_idx: key index
1425 * @unicast: unicast flag
1426 * @key_data: key data
1427 */
1428struct wma_set_key_params {
1429 uint8_t vdev_id;
1430 /* def_key_idx can be used to see if we have to read the key from cfg */
1431 uint32_t def_key_idx;
1432 uint16_t key_len;
1433 uint8_t peer_mac[IEEE80211_ADDR_LEN];
1434 uint8_t singl_tid_rc;
1435 enum eAniEdType key_type;
1436 uint32_t key_idx;
1437 bool unicast;
1438 uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH];
Krunal Soni8afae9b2017-10-20 20:15:54 -07001439 uint8_t key_rsc[SIR_MAC_MAX_KEY_RSC_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001440};
1441
1442/**
1443 * struct t_thermal_cmd_params - thermal command parameters
1444 * @minTemp: minimum temprature
1445 * @maxTemp: maximum temprature
1446 * @thermalEnable: thermal enable
1447 */
1448typedef struct {
1449 uint16_t minTemp;
1450 uint16_t maxTemp;
1451 uint8_t thermalEnable;
1452} t_thermal_cmd_params, *tp_thermal_cmd_params;
1453
1454/**
1455 * enum wma_cfg_cmd_id - wma cmd ids
1456 * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command
1457 * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command
1458 * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time
1459 * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota
1460 * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size
1461 * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save
1462 * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable
1463 * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX
1464 * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time
1465 * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP
1466 * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time
1467 * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001468 * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats
Yun Park637d6482016-10-05 10:51:33 -07001469 * @WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID: get IPA uC wifi-sharing stats
1470 * @WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID: set IPA uC quota limit
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001471 *
1472 * wma command ids for configuration request which
1473 * does not involve sending a wmi command.
1474 */
1475enum wma_cfg_cmd_id {
1476 WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX,
1477 WMA_VDEV_TXRX_FWSTATS_RESET_CMDID,
1478 WMA_VDEV_MCC_SET_TIME_LATENCY,
1479 WMA_VDEV_MCC_SET_TIME_QUOTA,
1480 WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE,
1481 WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED,
1482 WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED,
1483 WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX,
1484 WMA_VDEV_IBSS_SET_INACTIVITY_TIME,
1485 WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME,
1486 WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS,
1487 WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001488 WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID,
Yun Park637d6482016-10-05 10:51:33 -07001489 WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID,
1490 WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001491 WMA_CMD_ID_MAX
1492};
1493
1494/**
1495 * struct wma_trigger_uapsd_params - trigger uapsd parameters
Jeff Johnsonc97816c2018-05-12 17:13:23 -07001496 * @wmm_ac: wmm access category
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001497 * @user_priority: user priority
1498 * @service_interval: service interval
1499 * @suspend_interval: suspend interval
1500 * @delay_interval: delay interval
1501 */
1502typedef struct wma_trigger_uapsd_params {
1503 uint32_t wmm_ac;
1504 uint32_t user_priority;
1505 uint32_t service_interval;
1506 uint32_t suspend_interval;
1507 uint32_t delay_interval;
1508} t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params;
1509
1510/**
1511 * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station
1512 * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period
1513 * @UAPSD_MAX_SP_LEN_2: max service period = 2
1514 * @UAPSD_MAX_SP_LEN_4: max service period = 4
1515 * @UAPSD_MAX_SP_LEN_6: max service period = 6
1516 */
1517enum uapsd_peer_param_max_sp {
1518 UAPSD_MAX_SP_LEN_UNLIMITED = 0,
1519 UAPSD_MAX_SP_LEN_2 = 2,
1520 UAPSD_MAX_SP_LEN_4 = 4,
1521 UAPSD_MAX_SP_LEN_6 = 6
1522};
1523
1524/**
1525 * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station
1526 * @UAPSD_VO_ENABLED: enable uapsd for voice
1527 * @UAPSD_VI_ENABLED: enable uapsd for video
1528 * @UAPSD_BK_ENABLED: enable uapsd for background
1529 * @UAPSD_BE_ENABLED: enable uapsd for best effort
1530 */
1531enum uapsd_peer_param_enabled_ac {
1532 UAPSD_VO_ENABLED = 0x01,
1533 UAPSD_VI_ENABLED = 0x02,
1534 UAPSD_BK_ENABLED = 0x04,
1535 UAPSD_BE_ENABLED = 0x08
1536};
1537
1538/**
Govind Singha471e5e2015-10-12 17:11:14 +05301539 * enum profile_id_t - Firmware profiling index
1540 * @PROF_CPU_IDLE: cpu idle profile
1541 * @PROF_PPDU_PROC: ppdu processing profile
1542 * @PROF_PPDU_POST: ppdu post profile
1543 * @PROF_HTT_TX_INPUT: htt tx input profile
1544 * @PROF_MSDU_ENQ: msdu enqueue profile
1545 * @PROF_PPDU_POST_HAL: ppdu post profile
1546 * @PROF_COMPUTE_TX_TIME: tx time profile
1547 * @PROF_MAX_ID: max profile index
1548 */
1549enum profile_id_t {
1550 PROF_CPU_IDLE,
1551 PROF_PPDU_PROC,
1552 PROF_PPDU_POST,
1553 PROF_HTT_TX_INPUT,
1554 PROF_MSDU_ENQ,
1555 PROF_PPDU_POST_HAL,
1556 PROF_COMPUTE_TX_TIME,
1557 PROF_MAX_ID,
1558};
1559
1560/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001561 * struct p2p_ie - P2P IE structural definition.
1562 * @p2p_id: p2p id
1563 * @p2p_len: p2p length
1564 * @p2p_oui: p2p OUI
1565 * @p2p_oui_type: p2p OUI type
1566 */
1567struct p2p_ie {
1568 uint8_t p2p_id;
1569 uint8_t p2p_len;
1570 uint8_t p2p_oui[3];
1571 uint8_t p2p_oui_type;
1572} __packed;
1573
1574/**
1575 * struct p2p_noa_descriptor - noa descriptor
1576 * @type_count: 255: continuous schedule, 0: reserved
1577 * @duration: Absent period duration in micro seconds
1578 * @interval: Absent period interval in micro seconds
1579 * @start_time: 32 bit tsf time when in starts
1580 */
1581struct p2p_noa_descriptor {
1582 uint8_t type_count;
1583 uint32_t duration;
1584 uint32_t interval;
1585 uint32_t start_time;
1586} __packed;
1587
1588/**
1589 * struct p2p_sub_element_noa - p2p noa element
1590 * @p2p_sub_id: p2p sub id
1591 * @p2p_sub_len: p2p sub length
1592 * @index: identifies instance of NOA su element
1593 * @oppPS: oppPS state of the AP
1594 * @ctwindow: ctwindow in TUs
1595 * @num_descriptors: number of NOA descriptors
1596 * @noa_descriptors: noa descriptors
1597 */
1598struct p2p_sub_element_noa {
1599 uint8_t p2p_sub_id;
1600 uint8_t p2p_sub_len;
1601 uint8_t index; /* identifies instance of NOA su element */
1602 uint8_t oppPS:1, /* oppPS state of the AP */
1603 ctwindow:7; /* ctwindow in TUs */
1604 uint8_t num_descriptors; /* number of NOA descriptors */
1605 struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS];
1606};
1607
1608/**
1609 * struct wma_decap_info_t - decapsulation info
1610 * @hdr: header
1611 * @hdr_len: header length
1612 */
1613struct wma_decap_info_t {
1614 uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)];
1615 int32_t hdr_len;
1616};
1617
1618/**
1619 * enum packet_power_save - packet power save params
1620 * @WMI_VDEV_PPS_PAID_MATCH: paid match param
1621 * @WMI_VDEV_PPS_GID_MATCH: gid match param
1622 * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param
1623 * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param
1624 * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param
1625 * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param
1626 * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param
1627 * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param
1628 * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param
1629 * @WMI_VDEV_PPS_5G_EBT: 5G ebt param
1630 */
1631typedef enum {
1632 WMI_VDEV_PPS_PAID_MATCH = 0,
1633 WMI_VDEV_PPS_GID_MATCH = 1,
1634 WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2,
1635 WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3,
1636 WMI_VDEV_PPS_EOF_PAD_DELIM = 4,
1637 WMI_VDEV_PPS_MACADDR_MISMATCH = 5,
1638 WMI_VDEV_PPS_DELIM_CRC_FAIL = 6,
1639 WMI_VDEV_PPS_GID_NSTS_ZERO = 7,
1640 WMI_VDEV_PPS_RSSI_CHECK = 8,
1641 WMI_VDEV_VHT_SET_GID_MGMT = 9,
1642 WMI_VDEV_PPS_5G_EBT = 10
1643} packet_power_save;
1644
1645/**
1646 * enum green_tx_param - green tx parameters
1647 * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param
1648 * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param
1649 * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param
1650 * @WMI_VDEV_PARAM_GTX_THRE: thre param
1651 * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param
1652 * @WMI_VDEV_PARAM_GTX_STEP: green tx step param
1653 * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param
1654 * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask
1655 */
1656typedef enum {
1657 WMI_VDEV_PARAM_GTX_HT_MCS,
1658 WMI_VDEV_PARAM_GTX_VHT_MCS,
1659 WMI_VDEV_PARAM_GTX_USR_CFG,
1660 WMI_VDEV_PARAM_GTX_THRE,
1661 WMI_VDEV_PARAM_GTX_MARGIN,
1662 WMI_VDEV_PARAM_GTX_STEP,
1663 WMI_VDEV_PARAM_GTX_MINTPC,
1664 WMI_VDEV_PARAM_GTX_BW_MASK,
1665} green_tx_param;
1666
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001667/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001668 * enum uapsd_ac - U-APSD Access Categories
1669 * @UAPSD_BE: best effort
1670 * @UAPSD_BK: back ground
1671 * @UAPSD_VI: video
1672 * @UAPSD_VO: voice
1673 */
1674enum uapsd_ac {
1675 UAPSD_BE,
1676 UAPSD_BK,
1677 UAPSD_VI,
1678 UAPSD_VO
1679};
1680
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301681QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001682 uint32_t vdev_id, enum uapsd_ac ac);
1683
1684/**
1685 * enum uapsd_up - U-APSD User Priorities
1686 * @UAPSD_UP_BE: best effort
1687 * @UAPSD_UP_BK: back ground
1688 * @UAPSD_UP_RESV: reserve
1689 * @UAPSD_UP_EE: Excellent Effort
1690 * @UAPSD_UP_CL: Critical Applications
1691 * @UAPSD_UP_VI: video
1692 * @UAPSD_UP_VO: voice
1693 * @UAPSD_UP_NC: Network Control
1694 */
1695enum uapsd_up {
1696 UAPSD_UP_BE,
1697 UAPSD_UP_BK,
1698 UAPSD_UP_RESV,
1699 UAPSD_UP_EE,
1700 UAPSD_UP_CL,
1701 UAPSD_UP_VI,
1702 UAPSD_UP_VO,
1703 UAPSD_UP_NC,
1704 UAPSD_UP_MAX
1705};
1706
1707/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001708 * struct wma_roam_invoke_cmd - roam invoke command
1709 * @vdev_id: vdev id
1710 * @bssid: mac address
1711 * @channel: channel
Naveen Rawat664a7cb2017-01-19 17:58:14 -08001712 * @frame_len: frame length, includs mac header, fixed params and ies
1713 * @frame_buf: buffer contaning probe response or beacon
Krunal Soni332f4af2017-06-01 14:36:17 -07001714 * @is_same_bssid: flag to indicate if roaming is requested for same bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001715 */
1716struct wma_roam_invoke_cmd {
1717 uint32_t vdev_id;
1718 uint8_t bssid[IEEE80211_ADDR_LEN];
1719 uint32_t channel;
Naveen Rawat664a7cb2017-01-19 17:58:14 -08001720 uint32_t frame_len;
1721 uint8_t *frame_buf;
Krunal Soni332f4af2017-06-01 14:36:17 -07001722 uint8_t is_same_bssid;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001723};
1724
1725/**
1726 * struct wma_process_fw_event_params - fw event parameters
1727 * @wmi_handle: wmi handle
1728 * @evt_buf: event buffer
1729 */
1730typedef struct {
1731 void *wmi_handle;
1732 void *evt_buf;
1733} wma_process_fw_event_params;
1734
Govind Singhd76a5b02016-03-08 15:12:14 +05301735int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001736
1737A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype,
1738 eCsrEncryptionType encr);
1739A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr);
1740
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301741QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001742 tp_wma_trigger_uapsd_params
1743 trigger_uapsd_params);
1744
1745/* added to get average snr for both data and beacon */
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301746QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001747
1748
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301749QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id,
Leo Chang96464902016-10-28 11:10:54 -07001750 void *tx_rx_vdev_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001751 uint8_t *mac, uint32_t vdev_type, bool add_del);
1752
1753void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle);
1754void wma_log_completion_timeout(void *data);
1755
Qiwei Caie689a262018-07-26 15:50:22 +08001756#ifdef FEATURE_RSSI_MONITOR
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301757QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
Qiwei Caie689a262018-07-26 15:50:22 +08001758 struct rssi_monitor_req *req);
1759#else /* FEATURE_RSSI_MONITOR */
1760static inline
1761QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
1762 struct rssi_monitor_req *req)
1763{
1764 return QDF_STATUS_SUCCESS;
1765}
1766#endif /* FEATURE_RSSI_MONITOR */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001767
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301768QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle,
Varun Reddy Yeturu951de5d2018-09-10 21:36:22 -07001769 struct set_pcl_req *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001770
Manishekar Chandrasekarand9640342016-04-27 12:28:26 +05301771QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle,
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -07001772 struct policy_mgr_hw_mode *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001773
Manishekar Chandrasekaran5d46f702016-04-27 12:50:52 +05301774QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle,
Srinivas Girigowdaeb6ecf32018-02-15 17:04:22 -08001775 struct policy_mgr_dual_mac_config *msg);
Archana Ramachandrand41c3ed2016-02-10 15:48:06 -08001776QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle,
1777 struct sir_antenna_mode_param *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001778
1779struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma,
1780 uint8_t vdev_id,
1781 uint32_t msg_type, uint8_t type,
1782 void *params, uint32_t timeout);
1783struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma,
1784 uint8_t vdev_id, uint32_t msg_type,
1785 uint8_t type, void *params,
1786 uint32_t timeout);
1787
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301788QDF_STATUS wma_vdev_start(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001789 struct wma_vdev_start_req *req, bool isRestart);
1790
1791void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id,
1792 uint8_t type);
1793
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001794int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params,
1795 uint32_t len);
Nirav Shah20489972016-06-16 19:20:28 +05301796int wma_mgmt_tx_bundle_completion_handler(void *handle,
1797 uint8_t *cmpl_event_params, uint32_t len);
Naveen Rawatc0c91cd2015-11-05 14:27:37 -08001798uint32_t wma_get_vht_ch_width(void);
Govind Singhd76a5b02016-03-08 15:12:14 +05301799QDF_STATUS
1800wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param,
1801 A_UINT32 val, A_UINT32 *module_id_bitmap,
1802 A_UINT32 bitmap_len);
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001803#ifdef FEATURE_LFR_SUBNET_DETECTION
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301804QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001805 struct gateway_param_update_req *req);
1806#else
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301807static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001808 struct gateway_param_update_req *req)
1809{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301810 return QDF_STATUS_SUCCESS;
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001811}
1812#endif /* FEATURE_LFR_SUBNET_DETECTION */
1813
Dhanashri Atre09828f12016-11-13 10:36:58 -08001814QDF_STATUS wma_lro_config_cmd(void *handle,
1815 struct cdp_lro_hash_config *wma_lro_cmd);
1816
Dhanashri Atre1f0cbe42015-11-19 10:56:53 -08001817void
1818wma_indicate_err(enum ol_rx_err_type err_type,
1819 struct ol_error_info *err_info);
Sandeep Puligillae0875662016-02-12 16:09:21 -08001820
jiadcd49ec72017-12-05 13:33:11 +08001821/**
1822 * wma_rx_mic_error_ind() - indicate mic error to the protocol stack
1823 * @scn_handle: pdev handle from osif layer
1824 * @vdev_id: vdev id
1825 * @wh: pointer to ieee80211_frame structure
1826 *
1827 * This function indicates TKIP MIC errors encountered in the RX data path
1828 * to the protocol stack
1829 *
1830 * Return: none
1831 */
1832void wma_rx_mic_error_ind(void *scn_handle, uint16_t vdev_id, void *wh);
1833
Sandeep Puligillae0875662016-02-12 16:09:21 -08001834QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle,
1835 int32_t vdev_id);
Anurag Chouhanbf5e0e22016-09-12 12:54:09 +05301836
1837void wma_process_fw_test_cmd(WMA_HANDLE handle,
1838 struct set_fwtest_params *wma_fwtest);
1839
Sandeep Puligillae0875662016-02-12 16:09:21 -08001840QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma,
1841 struct obss_ht40_scanind *req);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05301842
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301843uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask);
1844
1845#ifdef FEATURE_WLAN_APF
1846/**
1847 * wma_get_apf_caps_event_handler() - Event handler for get apf capability
1848 * @handle: WMA global handle
1849 * @cmd_param_info: command event data
1850 * @len: Length of @cmd_param_info
1851 *
1852 * Return: 0 on Success or Errno on failure
1853 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301854int wma_get_apf_caps_event_handler(void *handle,
1855 u_int8_t *cmd_param_info,
1856 u_int32_t len);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301857
1858/**
1859 * wma_get_apf_capabilities - Send get apf capability to firmware
1860 * @wma_handle: wma handle
1861 *
1862 * Return: QDF_STATUS enumeration.
1863 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301864QDF_STATUS wma_get_apf_capabilities(tp_wma_handle wma);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301865
1866/**
1867 * wma_set_apf_instructions - Set apf instructions to firmware
1868 * @wma: wma handle
1869 * @apf_set_offload: APF offload information to set to firmware
1870 *
1871 * Return: QDF_STATUS enumeration
1872 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301873QDF_STATUS
1874wma_set_apf_instructions(tp_wma_handle wma,
1875 struct sir_apf_set_offload *apf_set_offload);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301876
1877/**
1878 * wma_send_apf_enable_cmd - Send apf enable/disable cmd
1879 * @wma_handle: wma handle
1880 * @vdev_id: vdev id
1881 * @apf_enable: true: Enable APF Int., false: Disable APF Int.
1882 *
1883 * Return: QDF_STATUS enumeration.
1884 */
1885QDF_STATUS wma_send_apf_enable_cmd(WMA_HANDLE handle, uint8_t vdev_id,
1886 bool apf_enable);
1887
1888/**
1889 * wma_send_apf_write_work_memory_cmd - Command to write into the apf work
1890 * memory
1891 * @wma_handle: wma handle
1892 * @write_params: APF parameters for the write operation
1893 *
1894 * Return: QDF_STATUS enumeration.
1895 */
1896QDF_STATUS
1897wma_send_apf_write_work_memory_cmd(WMA_HANDLE handle,
1898 struct wmi_apf_write_memory_params
1899 *write_params);
1900
1901/**
1902 * wma_send_apf_read_work_memory_cmd - Command to get part of apf work memory
1903 * @wma_handle: wma handle
1904 * @callback: HDD callback to receive apf get mem event
1905 * @context: Context for the HDD callback
1906 * @read_params: APF parameters for the get operation
1907 *
1908 * Return: QDF_STATUS enumeration.
1909 */
1910QDF_STATUS
1911wma_send_apf_read_work_memory_cmd(WMA_HANDLE handle,
1912 struct wmi_apf_read_memory_params
1913 *read_params);
1914
1915/**
1916 * wma_apf_read_work_memory_event_handler - Event handler for get apf mem
1917 * operation
1918 * @handle: wma handle
1919 * @evt_buf: Buffer pointer to the event
1920 * @len: Length of the event buffer
1921 *
1922 * Return: status.
1923 */
1924int wma_apf_read_work_memory_event_handler(void *handle, uint8_t *evt_buf,
1925 uint32_t len);
1926#else /* FEATURE_WLAN_APF */
1927static inline QDF_STATUS wma_get_apf_capabilities(tp_wma_handle wma)
1928{
1929 return QDF_STATUS_SUCCESS;
1930}
1931
1932static inline QDF_STATUS
1933wma_set_apf_instructions(tp_wma_handle wma,
1934 struct sir_apf_set_offload *apf_set_offload)
1935{
1936 return QDF_STATUS_SUCCESS;
1937}
1938#endif /* FEATURE_WLAN_APF */
1939
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -07001940void wma_process_set_pdev_ie_req(tp_wma_handle wma,
1941 struct set_ie_param *ie_params);
1942void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma,
1943 struct set_ie_param *ie_params);
1944void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma,
1945 struct set_ie_param *ie_params);
Mukul Sharma3ba26b82017-01-12 21:59:41 +05301946
Rajeev Kumar Sirasanagandlae5787e22018-10-25 21:10:34 +05301947QDF_STATUS wma_remove_peer(tp_wma_handle wma, uint8_t *bssid,
1948 uint8_t vdev_id, void *peer,
1949 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07001950
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -08001951QDF_STATUS wma_create_peer(tp_wma_handle wma, struct cdp_pdev *pdev,
Krunal Sonibd7e8932018-10-03 11:14:51 -07001952 struct cdp_vdev *vdev, uint8_t peer_addr[6],
Deepak Dhamdhere0f076bd2016-06-02 11:29:21 -07001953 u_int32_t peer_type, u_int8_t vdev_id,
1954 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07001955
Padma, Santhosh Kumar16dacfb2017-03-21 19:05:40 +05301956/**
1957 * wma_get_cca_stats() - send request to fw to get CCA
1958 * @wmi_hdl: wma handle
1959 * @vdev_id: vdev id
1960 *
1961 * Return: QDF status
1962 */
1963QDF_STATUS wma_get_cca_stats(tp_wma_handle wma_handle,
1964 uint8_t vdev_id);
1965
Komal Seelam02d09342016-02-23 18:03:19 +05301966struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle);
Krunal Sonibd7e8932018-10-03 11:14:51 -07001967WLAN_PHY_MODE wma_chan_phy_mode(uint8_t chan, enum phy_ch_width chan_width,
1968 uint8_t dot11_mode);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07001969
1970#ifdef FEATURE_OEM_DATA_SUPPORT
1971QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle,
Krishna Kumaar Natarajanc1fa17d2016-08-03 14:19:20 -07001972 struct oem_data_req *oem_req);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07001973#endif
Selvaraj, Sridharebda0f22016-08-29 16:05:23 +05301974
1975QDF_STATUS wma_enable_disable_caevent_ind(tp_wma_handle wma_handle,
1976 uint8_t val);
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05301977void wma_register_packetdump_callback(
1978 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb,
1979 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb);
1980void wma_deregister_packetdump_callback(void);
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +05301981void wma_update_sta_inactivity_timeout(tp_wma_handle wma,
1982 struct sme_sta_inactivity_timeout *sta_inactivity_timer);
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301983
1984/**
1985 * wma_form_rx_packet() - form rx cds packet
1986 * @buf: buffer
1987 * @mgmt_rx_params: mgmt rx params
1988 * @rx_pkt: cds packet
1989 *
1990 * This functions forms a cds packet from the rx mgmt frame received.
1991 *
1992 * Return: 0 for success or error code
1993 */
1994int wma_form_rx_packet(qdf_nbuf_t buf,
Himanshu Agarwald2e6cde2017-01-10 14:47:04 +05301995 struct mgmt_rx_event_params *mgmt_rx_params,
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301996 cds_pkt_t *rx_pkt);
1997
1998/**
1999 * wma_mgmt_unified_cmd_send() - send the mgmt tx packet
2000 * @vdev: objmgr vdev
2001 * @buf: buffer
2002 * @desc_id: desc id
2003 * @mgmt_tx_params: mgmt rx params
2004 *
2005 * This functions sends mgmt tx packet to WMI layer.
2006 *
2007 * Return: 0 for success or error code
2008 */
2009QDF_STATUS wma_mgmt_unified_cmd_send(struct wlan_objmgr_vdev *vdev,
2010 qdf_nbuf_t buf, uint32_t desc_id,
2011 void *mgmt_tx_params);
Kapil Gupta4f0c0c12017-02-07 15:21:15 +05302012
2013/**
Sravan Kumar Kairam0fbaefe2018-09-10 16:57:50 +05302014 * wma_mgmt_nbuf_unmap_cb() - dma unmap for pending mgmt pkts
2015 * @pdev: objmgr pdev
2016 * @buf: buffer
2017 *
2018 * This function does the dma unmap of the pending mgmt packet cleanup
2019 *
2020 * Return: None
2021 */
Ajit Pal Singh6190ca22018-11-08 16:37:43 +05302022#ifndef CONFIG_HL_SUPPORT
Sravan Kumar Kairam0fbaefe2018-09-10 16:57:50 +05302023void wma_mgmt_nbuf_unmap_cb(struct wlan_objmgr_pdev *pdev,
2024 qdf_nbuf_t buf);
Ajit Pal Singh6190ca22018-11-08 16:37:43 +05302025#else
2026static inline void wma_mgmt_nbuf_unmap_cb(struct wlan_objmgr_pdev *pdev,
2027 qdf_nbuf_t buf)
2028{}
2029#endif
Sravan Kumar Kairam0fbaefe2018-09-10 16:57:50 +05302030
2031/**
Kapil Gupta4f0c0c12017-02-07 15:21:15 +05302032 * wma_chan_info_event_handler() - chan info event handler
2033 * @handle: wma handle
2034 * @event_buf: event handler data
2035 * @len: length of @event_buf
2036 *
2037 * this function will handle the WMI_CHAN_INFO_EVENTID
2038 *
2039 * Return: int
2040 */
2041int wma_chan_info_event_handler(void *handle, uint8_t *event_buf,
2042 uint32_t len);
Mukul Sharmaf9047232017-03-02 16:58:56 +05302043
Abhishek Singh5ad797d2018-09-05 17:20:46 +05302044#ifndef CONFIG_VDEV_SM
Mukul Sharmaf9047232017-03-02 16:58:56 +05302045/**
2046 * wma_vdev_set_mlme_state() - Set vdev mlme state
2047 * @wma: wma handle
2048 * @vdev_id: the Id of the vdev to configure
2049 * @state: vdev state
2050 *
2051 * Return: None
2052 */
2053static inline
2054void wma_vdev_set_mlme_state(tp_wma_handle wma, uint8_t vdev_id,
2055 enum wlan_vdev_state state)
2056{
2057 struct wlan_objmgr_vdev *vdev;
2058
2059 if (!wma) {
2060 WMA_LOGE("%s: WMA context is invald!", __func__);
2061 return;
2062 }
2063
2064 vdev = wlan_objmgr_get_vdev_by_id_from_psoc(wma->psoc, vdev_id,
2065 WLAN_LEGACY_WMA_ID);
2066 if (vdev) {
2067 wlan_vdev_obj_lock(vdev);
2068 wlan_vdev_mlme_set_state(vdev, state);
2069 wlan_vdev_obj_unlock(vdev);
2070 wlan_objmgr_vdev_release_ref(vdev, WLAN_LEGACY_WMA_ID);
2071 }
2072}
Abhishek Singh5ad797d2018-09-05 17:20:46 +05302073#endif
Mukul Sharma6411bb82017-03-01 15:57:07 +05302074/**
2075 * wma_update_vdev_pause_bitmap() - update vdev pause bitmap
2076 * @vdev_id: the Id of the vdev to configure
2077 * @value: value pause bitmap value
2078 *
2079 * Return: None
2080 */
2081static inline
2082void wma_vdev_update_pause_bitmap(uint8_t vdev_id, uint16_t value)
2083{
2084 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2085 struct wma_txrx_node *iface;
2086
Mukul Sharma6411bb82017-03-01 15:57:07 +05302087 if (!wma) {
2088 WMA_LOGE("%s: WMA context is invald!", __func__);
2089 return;
2090 }
2091
Amar Singhalef59eee2018-01-02 12:46:35 -08002092 if (vdev_id >= wma->max_bssid) {
2093 WMA_LOGE("%s: Invalid vdev_id: %d", __func__, vdev_id);
2094 return;
2095 }
2096
Mukul Sharma6411bb82017-03-01 15:57:07 +05302097 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002098
2099 if (!iface) {
2100 WMA_LOGE("%s: Failed to get iface: NULL",
2101 __func__);
2102 return;
2103 }
2104
2105 if (!iface->handle) {
2106 WMA_LOGE("%s: Failed to get iface handle: NULL",
2107 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302108 return;
2109 }
2110
2111 iface->pause_bitmap = value;
2112}
2113
2114/**
2115 * wma_vdev_get_pause_bitmap() - Get vdev pause bitmap
2116 * @vdev_id: the Id of the vdev to configure
2117 *
2118 * Return: Vdev pause bitmap value else 0 on error
2119 */
2120static inline
2121uint16_t wma_vdev_get_pause_bitmap(uint8_t vdev_id)
2122{
2123 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2124 struct wma_txrx_node *iface;
2125
2126 if (!wma) {
2127 WMA_LOGE("%s: WMA context is invald!", __func__);
2128 return 0;
2129 }
2130
2131 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002132
2133 if (!iface) {
2134 WMA_LOGE("%s: Failed to get iface: NULL",
2135 __func__);
2136 return 0;
2137 }
2138
2139 if (!iface->handle) {
2140 WMA_LOGE("%s: Failed to get iface handle: NULL",
2141 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302142 return 0;
2143 }
2144
2145 return iface->pause_bitmap;
2146}
2147
2148/**
Will Huangad015772018-06-15 11:27:50 +08002149 * wma_vdev_get_dp_handle() - Get vdev datapth handle
2150 * @vdev_id: the Id of the vdev to configure
2151 *
2152 * Return: Vdev datapath handle else NULL on error
2153 */
2154static inline
2155struct cdp_vdev *wma_vdev_get_vdev_dp_handle(uint8_t vdev_id)
2156{
2157 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2158 struct wma_txrx_node *iface;
2159
2160 if (!wma) {
2161 WMA_LOGE("%s: WMA context is invald!", __func__);
2162 return NULL;
2163 }
2164
2165 if (vdev_id >= wma->max_bssid)
2166 return NULL;
2167
2168 iface = &wma->interfaces[vdev_id];
2169
2170 if (!iface) {
2171 WMA_LOGE("%s: Failed to get iface: NULL",
2172 __func__);
2173 return NULL;
2174 }
2175
2176 return iface->handle;
2177}
2178
2179/**
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302180 * wma_vdev_is_device_in_low_pwr_mode - is device in power save mode
2181 * @vdev_id: the Id of the vdev to configure
2182 *
2183 * Return: true if device is in low power mode else false
2184 */
2185static inline bool wma_vdev_is_device_in_low_pwr_mode(uint8_t vdev_id)
2186{
2187 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2188 struct wma_txrx_node *iface;
2189
2190 if (!wma) {
2191 WMA_LOGE("%s: WMA context is invald!", __func__);
2192 return 0;
2193 }
2194
2195 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002196
2197 if (!iface) {
2198 WMA_LOGE("%s: Failed to get iface: NULL",
2199 __func__);
2200 return 0;
2201 }
2202
2203 if (!iface->handle) {
2204 WMA_LOGE("%s: Failed to get iface handle:NULL",
2205 __func__);
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302206 return 0;
2207 }
2208
2209 return iface->in_bmps || wma->in_imps;
2210}
2211
2212/**
Mukul Sharma44746042018-05-24 17:30:52 +05302213 * wma_vdev_get_cfg_int - Get cfg integer value
2214 * @cfg_id: cfg item number
2215 * @value: fill the out value
2216 *
2217 * Note caller must verify return status before using value
2218 *
2219 * Return: QDF_STATUS_SUCCESS when got item from cfg else QDF_STATUS_E_FAILURE
2220 */
2221static inline
2222QDF_STATUS wma_vdev_get_cfg_int(int cfg_id, int *value)
2223{
Jeff Johnson009c40f2018-11-05 09:54:37 -08002224 struct mac_context *mac = cds_get_context(QDF_MODULE_ID_PE);
Jeff Johnsone88dd752018-06-07 22:57:54 -07002225
Mukul Sharma44746042018-05-24 17:30:52 +05302226 *value = 0;
2227
Nachiket Kukade37b4e6d2018-06-01 18:44:42 +05302228 if (!mac)
Mukul Sharma44746042018-05-24 17:30:52 +05302229 return QDF_STATUS_E_FAILURE;
Mukul Sharma44746042018-05-24 17:30:52 +05302230
Jeff Johnsone88dd752018-06-07 22:57:54 -07002231 return wlan_cfg_get_int(mac, cfg_id, value);
Mukul Sharma44746042018-05-24 17:30:52 +05302232}
2233
2234/**
Nachiket Kukade37b4e6d2018-06-01 18:44:42 +05302235 * wma_vdev_get_dtim_period - Get dtim period value from mlme
2236 * @vdev_id: vdev index number
2237 * @value: pointer to the value to fill out
2238 *
2239 * Note caller must verify return status before using value
2240 *
2241 * Return: QDF_STATUS_SUCCESS when fetched a valid value from cfg else
2242 * QDF_STATUS_E_FAILURE
2243 */
2244static inline
2245QDF_STATUS wma_vdev_get_dtim_period(uint8_t vdev_id, uint8_t *value)
2246{
2247 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2248 struct wma_txrx_node *iface;
2249 /* set value to zero */
2250 *value = 0;
2251
2252 if (!wma)
2253 return QDF_STATUS_E_FAILURE;
2254
2255 iface = &wma->interfaces[vdev_id];
2256
2257 if (!iface || !iface->handle)
2258 return QDF_STATUS_E_FAILURE;
2259
2260 *value = iface->dtimPeriod;
2261 return QDF_STATUS_SUCCESS;
2262}
2263
2264/**
2265 * wma_vdev_get_beacon_interval - Get beacon interval from mlme
2266 * @vdev_id: vdev index number
2267 * @value: pointer to the value to fill out
2268 *
2269 * Note caller must verify return status before using value
2270 *
2271 * Return: QDF_STATUS_SUCCESS when fetched a valid value from cfg else
2272 * QDF_STATUS_E_FAILURE
2273 */
2274static inline
2275QDF_STATUS wma_vdev_get_beacon_interval(uint8_t vdev_id, uint16_t *value)
2276{
2277 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2278 struct wma_txrx_node *iface;
2279 /* set value to zero */
2280 *value = 0;
2281
2282 if (!wma)
2283 return QDF_STATUS_E_FAILURE;
2284
2285 iface = &wma->interfaces[vdev_id];
2286
2287 if (!iface || !iface->handle)
2288 return QDF_STATUS_E_FAILURE;
2289
2290 *value = iface->beaconInterval;
2291 return QDF_STATUS_SUCCESS;
2292}
2293
2294/**
Mukul Sharma6411bb82017-03-01 15:57:07 +05302295 * wma_vdev_set_pause_bit() - Set a bit in vdev pause bitmap
2296 * @vdev_id: the Id of the vdev to configure
2297 * @bit_pos: set bit position in pause bitmap
2298 *
2299 * Return: None
2300 */
2301static inline
2302void wma_vdev_set_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2303{
2304 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2305 struct wma_txrx_node *iface;
2306
2307 if (!wma) {
2308 WMA_LOGE("%s: WMA context is invald!", __func__);
2309 return;
2310 }
2311
2312 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002313
2314 if (!iface) {
2315 WMA_LOGE("%s: Failed to get iface: NULL",
2316 __func__);
2317 return;
2318 }
2319
2320 if (!iface->handle) {
2321 WMA_LOGE("%s: Failed to get iface handle: NULL",
2322 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302323 return;
2324 }
2325
2326 iface->pause_bitmap |= (1 << bit_pos);
2327}
2328
2329/**
2330 * wma_vdev_clear_pause_bit() - Clear a bit from vdev pause bitmap
2331 * @vdev_id: the Id of the vdev to configure
2332 * @bit_pos: set bit position in pause bitmap
2333 *
2334 * Return: None
2335 */
2336static inline
2337void wma_vdev_clear_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2338{
2339 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2340 struct wma_txrx_node *iface;
2341
2342 if (!wma) {
2343 WMA_LOGE("%s: WMA context is invald!", __func__);
2344 return;
2345 }
2346
2347 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002348
2349 if (!iface) {
2350 WMA_LOGE("%s: Failed to get iface: NULL",
2351 __func__);
2352 return;
2353 }
2354
2355 if (!iface->handle) {
2356 WMA_LOGE("%s: Failed to get iface handle: NULL",
2357 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302358 return;
2359 }
2360
2361 iface->pause_bitmap &= ~(1 << bit_pos);
2362}
2363
Naveen Rawat5c35ae42017-04-18 15:35:07 -07002364/**
2365 * wma_process_roaming_config() - process roam request
2366 * @wma_handle: wma handle
2367 * @roam_req: roam request parameters
2368 *
2369 * Main routine to handle ROAM commands coming from CSR module.
2370 *
2371 * Return: QDF status
2372 */
2373QDF_STATUS wma_process_roaming_config(tp_wma_handle wma_handle,
2374 tSirRoamOffloadScanReq *roam_req);
2375
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002376#ifdef WMI_INTERFACE_EVENT_LOGGING
2377static inline void wma_print_wmi_cmd_log(uint32_t count,
2378 qdf_abstract_print *print,
2379 void *print_priv)
2380{
2381 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2382
Rachit Kankaneb1035622018-01-24 18:41:35 +05302383 if (wma) {
2384 print(print_priv, "Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002385 wmi_print_cmd_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302386 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002387}
2388
2389static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2390 qdf_abstract_print *print,
2391 void *print_priv)
2392{
2393 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2394
Rachit Kankaneb1035622018-01-24 18:41:35 +05302395 if (wma) {
2396 print(print_priv, "Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002397 wmi_print_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2398 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302399 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002400}
2401
2402static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2403 qdf_abstract_print *print,
2404 void *print_priv)
2405{
2406 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2407
Rachit Kankaneb1035622018-01-24 18:41:35 +05302408 if (wma) {
2409 print(print_priv, "Management Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002410 wmi_print_mgmt_cmd_log(wma->wmi_handle, count, print,
2411 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302412 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002413}
2414
2415static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2416 qdf_abstract_print *print,
2417 void *print_priv)
2418{
2419 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2420
Rachit Kankaneb1035622018-01-24 18:41:35 +05302421 if (wma) {
2422 print(print_priv,
2423 "Management Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002424 wmi_print_mgmt_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2425 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302426 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002427}
2428
2429static inline void wma_print_wmi_event_log(uint32_t count,
2430 qdf_abstract_print *print,
2431 void *print_priv)
2432{
2433 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2434
Rachit Kankaneb1035622018-01-24 18:41:35 +05302435 if (wma) {
2436 print(print_priv, "Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002437 wmi_print_event_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302438 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002439}
2440
2441static inline void wma_print_wmi_rx_event_log(uint32_t count,
2442 qdf_abstract_print *print,
2443 void *print_priv)
2444{
2445 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2446
Rachit Kankaneb1035622018-01-24 18:41:35 +05302447 if (wma) {
2448 print(print_priv, "Rx Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002449 wmi_print_rx_event_log(wma->wmi_handle, count, print,
2450 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302451 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002452}
2453
2454static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2455 qdf_abstract_print *print,
2456 void *print_priv)
2457{
2458 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2459
Rachit Kankaneb1035622018-01-24 18:41:35 +05302460 if (wma) {
2461 print(print_priv, "Management Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002462 wmi_print_mgmt_event_log(wma->wmi_handle, count, print,
2463 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302464 }
2465}
2466#else
2467
2468static inline void wma_print_wmi_cmd_log(uint32_t count,
2469 qdf_abstract_print *print,
2470 void *print_priv)
2471{
2472}
2473
2474static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2475 qdf_abstract_print *print,
2476 void *print_priv)
2477{
2478}
2479
2480static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2481 qdf_abstract_print *print,
2482 void *print_priv)
2483{
2484}
2485
2486static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2487 qdf_abstract_print *print,
2488 void *print_priv)
2489{
2490}
2491
2492static inline void wma_print_wmi_event_log(uint32_t count,
2493 qdf_abstract_print *print,
2494 void *print_priv)
2495{
2496}
2497
2498static inline void wma_print_wmi_rx_event_log(uint32_t count,
2499 qdf_abstract_print *print,
2500 void *print_priv)
2501{
2502}
2503
2504static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2505 qdf_abstract_print *print,
2506 void *print_priv)
2507{
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002508}
2509#endif /* WMI_INTERFACE_EVENT_LOGGING */
2510
Sandeep Puligillaf587adf2017-04-27 19:53:21 -07002511/**
2512 * wma_ipa_uc_stat_request() - set ipa config parameters
2513 * @privcmd: private command
2514 *
2515 * Return: None
2516 */
2517void wma_ipa_uc_stat_request(wma_cli_set_cmd_t *privcmd);
2518
lifeng66831662017-05-19 16:01:35 +08002519/**
2520 * wma_set_rx_reorder_timeout_val() - set rx recorder timeout value
2521 * @wma_handle: pointer to wma handle
2522 * @reorder_timeout: rx reorder timeout value
2523 *
2524 * Return: VOS_STATUS_SUCCESS for success or error code.
2525 */
2526QDF_STATUS wma_set_rx_reorder_timeout_val(tp_wma_handle wma_handle,
2527 struct sir_set_rx_reorder_timeout_val *reorder_timeout);
2528
2529/**
2530 * wma_set_rx_blocksize() - set rx blocksize
2531 * @wma_handle: pointer to wma handle
2532 * @peer_rx_blocksize: rx blocksize for peer mac
2533 *
2534 * Return: QDF_STATUS_SUCCESS for success or error code.
2535 */
2536QDF_STATUS wma_set_rx_blocksize(tp_wma_handle wma_handle,
2537 struct sir_peer_set_rx_blocksize *peer_rx_blocksize);
Ashish Kumar Dhanotiyab28338c2017-07-21 20:12:34 +05302538/**
2539 * wma_configure_smps_params() - Configures the smps parameters to set
2540 * @vdev_id: Virtual device for the command
2541 * @param_id: SMPS parameter ID
2542 * @param_val: Value to be set for the parameter
2543 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2544 */
2545QDF_STATUS wma_configure_smps_params(uint32_t vdev_id, uint32_t param_id,
2546 uint32_t param_val);
lifeng66831662017-05-19 16:01:35 +08002547
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302548/*
2549 * wma_chip_power_save_failure_detected_handler() - chip pwr save fail detected
2550 * event handler
2551 * @handle: wma handle
2552 * @cmd_param_info: event handler data
2553 * @len: length of @cmd_param_info
2554 *
2555 * Return: QDF_STATUS_SUCCESS on success; error code otherwise
2556 */
2557int wma_chip_power_save_failure_detected_handler(void *handle,
2558 uint8_t *cmd_param_info,
2559 uint32_t len);
lifengd217d192017-05-09 19:44:16 +08002560
2561/**
2562 * wma_get_chain_rssi() - send wmi cmd to get chain rssi
2563 * @wma_handle: wma handler
2564 * @req_params: requset params
2565 *
2566 * Return: Return QDF_STATUS
2567 */
2568QDF_STATUS wma_get_chain_rssi(tp_wma_handle wma_handle,
2569 struct get_chain_rssi_req_params *req_params);
2570
Nachiket Kukadeaaf8a712017-07-27 19:15:36 +05302571/**
2572 * wma_config_bmiss_bcnt_params() - set bmiss config parameters
2573 * @vdev_id: virtual device for the command
2574 * @first_cnt: bmiss first value
2575 * @final_cnt: bmiss final value
2576 *
2577 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2578 */
2579QDF_STATUS wma_config_bmiss_bcnt_params(uint32_t vdev_id, uint32_t first_cnt,
2580 uint32_t final_cnt);
2581
Qiwei Caidcb73b02018-09-17 19:58:29 +08002582#ifdef WLAN_POWER_MANAGEMENT_OFFLOAD
Naveen Rawatd7734142017-10-27 10:02:40 -07002583/**
2584 * wma_check_and_set_wake_timer(): checks all interfaces and if any interface
2585 * has install_key pending, sets timer pattern in fw to wake up host after
2586 * specified time has elapsed.
2587 * @time: time after which host wants to be awaken.
2588 *
2589 * Return: None
2590 */
2591void wma_check_and_set_wake_timer(uint32_t time);
Qiwei Caidcb73b02018-09-17 19:58:29 +08002592#endif
Min Liu22202b72018-02-12 14:01:24 +08002593
Jinwei Chen1850d9c2018-08-20 15:59:06 +08002594/**
2595 * wma_rx_invalid_peer_ind(): the callback for DP to notify WMA layer
2596 * invalid peer data is received, this function will send message to
2597 * lim module.
2598 * @vdev_id: virtual device ID
2599 * @wh: Pointer to 802.11 frame header
2600 *
2601 * Return: 0 for success or non-zero on failure
2602 */
2603uint8_t wma_rx_invalid_peer_ind(uint8_t vdev_id, void *wh);
2604
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05302605#endif