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Dan Gohman10e730a2015-06-29 23:51:55 +00001//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Dan Gohman10e730a2015-06-29 23:51:55 +00006//
7//===----------------------------------------------------------------------===//
8///
9/// \file
Adrian Prantl5f8f34e42018-05-01 15:54:18 +000010/// This file defines the WebAssembly-specific subclass of TargetMachine.
Dan Gohman10e730a2015-06-29 23:51:55 +000011///
12//===----------------------------------------------------------------------===//
13
Dan Gohman10e730a2015-06-29 23:51:55 +000014#include "WebAssemblyTargetMachine.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000015#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
Richard Trieuc6c42132019-05-15 01:03:00 +000016#include "TargetInfo/WebAssemblyTargetInfo.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000017#include "WebAssembly.h"
Heejin Ahn52221d52019-03-26 17:35:35 +000018#include "WebAssemblyMachineFunctionInfo.h"
Dan Gohman5bf22fc2015-12-17 04:55:44 +000019#include "WebAssemblyTargetObjectFile.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000020#include "WebAssemblyTargetTransformInfo.h"
Heejin Ahn52221d52019-03-26 17:35:35 +000021#include "llvm/CodeGen/MIRParser/MIParser.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000022#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/Passes.h"
24#include "llvm/CodeGen/RegAllocRegistry.h"
Matthias Braun31d19d42016-05-10 03:21:59 +000025#include "llvm/CodeGen/TargetPassConfig.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000026#include "llvm/IR/Function.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000027#include "llvm/Support/TargetRegistry.h"
28#include "llvm/Target/TargetOptions.h"
JF Bastien03855df2015-07-01 23:41:25 +000029#include "llvm/Transforms/Scalar.h"
Thomas Lively3f34e1b82019-03-29 00:14:01 +000030#include "llvm/Transforms/Scalar/LowerAtomic.h"
David Blaikiea373d182018-03-28 17:44:36 +000031#include "llvm/Transforms/Utils.h"
Dan Gohman10e730a2015-06-29 23:51:55 +000032using namespace llvm;
33
34#define DEBUG_TYPE "wasm"
35
Derek Schufff41f67d2016-08-01 21:34:04 +000036// Emscripten's asm.js-style exception handling
Derek Schuffccdceda2016-08-18 15:27:25 +000037static cl::opt<bool> EnableEmException(
Derek Schuff53b9af02016-08-09 00:29:55 +000038 "enable-emscripten-cxx-exceptions",
Derek Schufff41f67d2016-08-01 21:34:04 +000039 cl::desc("WebAssembly Emscripten-style exception handling"),
40 cl::init(false));
41
Derek Schuffccdceda2016-08-18 15:27:25 +000042// Emscripten's asm.js-style setjmp/longjmp handling
43static cl::opt<bool> EnableEmSjLj(
44 "enable-emscripten-sjlj",
45 cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
46 cl::init(false));
47
Tom Stellard4b0b2612019-06-11 03:21:13 +000048extern "C" void LLVMInitializeWebAssemblyTarget() {
Dan Gohman10e730a2015-06-29 23:51:55 +000049 // Register the target.
Mehdi Aminif42454b2016-10-09 23:00:34 +000050 RegisterTargetMachine<WebAssemblyTargetMachine> X(
51 getTheWebAssemblyTarget32());
52 RegisterTargetMachine<WebAssemblyTargetMachine> Y(
53 getTheWebAssemblyTarget64());
Derek Schufff41f67d2016-08-01 21:34:04 +000054
Jacob Gravelle40926452018-03-30 20:36:58 +000055 // Register backend passes
56 auto &PR = *PassRegistry::getPassRegistry();
Sam Clegg92617552018-07-11 04:29:36 +000057 initializeWebAssemblyAddMissingPrototypesPass(PR);
Jacob Gravelle40926452018-03-30 20:36:58 +000058 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
59 initializeLowerGlobalDtorsPass(PR);
60 initializeFixFunctionBitcastsPass(PR);
61 initializeOptimizeReturnedPass(PR);
62 initializeWebAssemblyArgumentMovePass(PR);
63 initializeWebAssemblySetP2AlignOperandsPass(PR);
64 initializeWebAssemblyReplacePhysRegsPass(PR);
65 initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
66 initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
Heejin Ahn321d5222019-01-08 22:35:18 +000067 initializeWebAssemblyMemIntrinsicResultsPass(PR);
Jacob Gravelle40926452018-03-30 20:36:58 +000068 initializeWebAssemblyRegStackifyPass(PR);
69 initializeWebAssemblyRegColoringPass(PR);
Jacob Gravelle40926452018-03-30 20:36:58 +000070 initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
Heejin Ahn4934f762018-06-25 01:07:11 +000071 initializeWebAssemblyLateEHPreparePass(PR);
Heejin Ahn04c48942018-06-25 01:20:21 +000072 initializeWebAssemblyExceptionInfoPass(PR);
Jacob Gravelle40926452018-03-30 20:36:58 +000073 initializeWebAssemblyCFGSortPass(PR);
74 initializeWebAssemblyCFGStackifyPass(PR);
Heejin Ahne9fd9072019-03-30 09:29:57 +000075 initializeWebAssemblyExplicitLocalsPass(PR);
Jacob Gravelle40926452018-03-30 20:36:58 +000076 initializeWebAssemblyLowerBrUnlessPass(PR);
77 initializeWebAssemblyRegNumberingPass(PR);
78 initializeWebAssemblyPeepholePass(PR);
79 initializeWebAssemblyCallIndirectFixupPass(PR);
Dan Gohman10e730a2015-06-29 23:51:55 +000080}
81
82//===----------------------------------------------------------------------===//
83// WebAssembly Lowering public interface.
84//===----------------------------------------------------------------------===//
85
Dan Gohman53572d02019-06-05 20:01:01 +000086static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
87 const Triple &TT) {
Sam Clegg74f5fd42018-11-16 18:59:51 +000088 if (!RM.hasValue()) {
89 // Default to static relocation model. This should always be more optimial
90 // than PIC since the static linker can determine all global addresses and
91 // assume direct function calls.
92 return Reloc::Static;
93 }
Dan Gohman53572d02019-06-05 20:01:01 +000094
95 if (!TT.isOSEmscripten()) {
96 // Relocation modes other than static are currently implemented in a way
97 // that only works for Emscripten, so disable them if we aren't targeting
98 // Emscripten.
99 return Reloc::Static;
100 }
101
Dan Gohman41133a32016-05-19 03:00:05 +0000102 return *RM;
103}
104
Dan Gohman10e730a2015-06-29 23:51:55 +0000105/// Create an WebAssembly architecture model.
106///
107WebAssemblyTargetMachine::WebAssemblyTargetMachine(
108 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
Dan Gohman41133a32016-05-19 03:00:05 +0000109 const TargetOptions &Options, Optional<Reloc::Model> RM,
Daniel Jasper314ed202017-08-03 05:15:53 +0000110 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
Matthias Braunbb8507e2017-10-12 22:57:28 +0000111 : LLVMTargetMachine(T,
112 TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
113 : "e-m:e-p:32:32-i64:64-n32:64-S128",
Dan Gohman53572d02019-06-05 20:01:01 +0000114 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
David Greenca29c272018-12-07 12:10:23 +0000115 getEffectiveCodeModel(CM, CodeModel::Large), OL),
Sam Cleggcf2a9e22018-07-16 23:09:29 +0000116 TLOF(new WebAssemblyTargetObjectFile()) {
Dan Gohmane0405332016-10-03 22:43:53 +0000117 // WebAssembly type-checks instructions, but a noreturn function with a return
Derek Schuffffa143c2015-11-10 00:30:57 +0000118 // type that doesn't match the context will cause a check failure. So we lower
119 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
Dan Gohmane0405332016-10-03 22:43:53 +0000120 // 'unreachable' instructions which is meant for that case.
Derek Schuffffa143c2015-11-10 00:30:57 +0000121 this->Options.TrapUnreachable = true;
122
Dan Gohmand934cb82017-02-24 23:18:00 +0000123 // WebAssembly treats each function as an independent unit. Force
124 // -ffunction-sections, effectively, so that we can emit them independently.
Sam Cleggcf2a9e22018-07-16 23:09:29 +0000125 this->Options.FunctionSections = true;
126 this->Options.DataSections = true;
127 this->Options.UniqueSectionNames = true;
Dan Gohmand934cb82017-02-24 23:18:00 +0000128
Dan Gohman10e730a2015-06-29 23:51:55 +0000129 initAsmInfo();
130
Dan Gohmand85ab7f2016-02-18 06:32:53 +0000131 // Note that we don't use setRequiresStructuredCFG(true). It disables
132 // optimizations than we're ok with, and want, such as critical edge
133 // splitting and tail merging.
Dan Gohman10e730a2015-06-29 23:51:55 +0000134}
135
Heejin Ahn18c56a02019-02-04 19:13:39 +0000136WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
Dan Gohman10e730a2015-06-29 23:51:55 +0000137
138const WebAssemblySubtarget *
Thomas Livelyf3b4f992019-02-28 18:39:08 +0000139WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
140 std::string FS) const {
141 auto &I = SubtargetMap[CPU + FS];
142 if (!I) {
143 I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
Thomas Livelyf3b4f992019-02-28 18:39:08 +0000144 }
145 return I.get();
146}
147
148const WebAssemblySubtarget *
Dan Gohman10e730a2015-06-29 23:51:55 +0000149WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
150 Attribute CPUAttr = F.getFnAttribute("target-cpu");
151 Attribute FSAttr = F.getFnAttribute("target-features");
152
153 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
154 ? CPUAttr.getValueAsString().str()
155 : TargetCPU;
156 std::string FS = !FSAttr.hasAttribute(Attribute::None)
157 ? FSAttr.getValueAsString().str()
158 : TargetFS;
159
Thomas Livelyf3b4f992019-02-28 18:39:08 +0000160 // This needs to be done before we create a new subtarget since any
161 // creation will depend on the TM and the code generation flags on the
162 // function that reside in TargetOptions.
163 resetTargetOptions(F);
164
165 return getSubtargetImpl(CPU, FS);
Dan Gohman10e730a2015-06-29 23:51:55 +0000166}
167
168namespace {
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000169
170class CoalesceFeaturesAndStripAtomics final : public ModulePass {
171 // Take the union of all features used in the module and use it for each
172 // function individually, since having multiple feature sets in one module
173 // currently does not make sense for WebAssembly. If atomics are not enabled,
174 // also strip atomic operations and thread local storage.
Derek Schuff39b53672018-03-20 22:01:32 +0000175 static char ID;
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000176 WebAssemblyTargetMachine *WasmTM;
Derek Schuff39b53672018-03-20 22:01:32 +0000177
Heejin Ahnf208f632018-09-05 01:27:38 +0000178public:
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000179 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
180 : ModulePass(ID), WasmTM(WasmTM) {}
181
Derek Schuff39b53672018-03-20 22:01:32 +0000182 bool runOnModule(Module &M) override {
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000183 FeatureBitset Features = coalesceFeatures(M);
184
185 std::string FeatureStr = getFeatureString(Features);
186 for (auto &F : M)
187 replaceFeatures(F, FeatureStr);
188
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000189 bool StrippedAtomics = false;
190 bool StrippedTLS = false;
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000191
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000192 if (!Features[WebAssembly::FeatureAtomics])
193 StrippedAtomics = stripAtomics(M);
194
195 if (!Features[WebAssembly::FeatureBulkMemory])
196 StrippedTLS = stripThreadLocals(M);
197
198 if (StrippedAtomics && !StrippedTLS)
199 stripThreadLocals(M);
200 else if (StrippedTLS && !StrippedAtomics)
201 stripAtomics(M);
202
203 recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000204
205 // Conservatively assume we have made some change
Derek Schuff39b53672018-03-20 22:01:32 +0000206 return true;
207 }
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000208
209private:
210 FeatureBitset coalesceFeatures(const Module &M) {
211 FeatureBitset Features =
212 WasmTM
213 ->getSubtargetImpl(WasmTM->getTargetCPU(),
214 WasmTM->getTargetFeatureString())
215 ->getFeatureBits();
216 for (auto &F : M)
217 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
218 return Features;
219 }
220
221 std::string getFeatureString(const FeatureBitset &Features) {
222 std::string Ret;
223 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
224 if (Features[KV.Value])
225 Ret += (StringRef("+") + KV.Key + ",").str();
226 }
227 return Ret;
228 }
229
230 void replaceFeatures(Function &F, const std::string &Features) {
231 F.removeFnAttr("target-features");
232 F.removeFnAttr("target-cpu");
233 F.addFnAttr("target-features", Features);
234 }
235
236 bool stripAtomics(Module &M) {
237 // Detect whether any atomics will be lowered, since there is no way to tell
238 // whether the LowerAtomic pass lowers e.g. stores.
239 bool Stripped = false;
240 for (auto &F : M) {
241 for (auto &B : F) {
242 for (auto &I : B) {
243 if (I.isAtomic()) {
244 Stripped = true;
245 goto done;
246 }
247 }
248 }
249 }
250
251 done:
252 if (!Stripped)
253 return false;
254
255 LowerAtomicPass Lowerer;
256 FunctionAnalysisManager FAM;
257 for (auto &F : M)
258 Lowerer.run(F, FAM);
259
260 return true;
261 }
262
263 bool stripThreadLocals(Module &M) {
264 bool Stripped = false;
265 for (auto &GV : M.globals()) {
266 if (GV.getThreadLocalMode() !=
267 GlobalValue::ThreadLocalMode::NotThreadLocal) {
268 Stripped = true;
269 GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal);
270 }
271 }
272 return Stripped;
273 }
274
275 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
276 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
277 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
278 if (KV.Value == WebAssembly::FeatureAtomics && Stripped) {
279 // "atomics" is special: code compiled without atomics may have had its
280 // atomics lowered to nonatomic operations. In that case, atomics is
281 // disallowed to prevent unsafe linking with atomics-enabled objects.
Guanzhong Chen42bba4b2019-07-16 22:00:45 +0000282 assert(!Features[WebAssembly::FeatureAtomics] ||
283 !Features[WebAssembly::FeatureBulkMemory]);
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000284 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
285 wasm::WASM_FEATURE_PREFIX_DISALLOWED);
286 } else if (Features[KV.Value]) {
287 // Otherwise features are marked Used or not mentioned
288 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
289 wasm::WASM_FEATURE_PREFIX_USED);
290 }
291 }
292 }
Derek Schuff39b53672018-03-20 22:01:32 +0000293};
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000294char CoalesceFeaturesAndStripAtomics::ID = 0;
Derek Schuff39b53672018-03-20 22:01:32 +0000295
Dan Gohman10e730a2015-06-29 23:51:55 +0000296/// WebAssembly Code Generator Pass Configuration Options.
297class WebAssemblyPassConfig final : public TargetPassConfig {
298public:
Matthias Braun5e394c32017-05-30 21:36:41 +0000299 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
Dan Gohman10e730a2015-06-29 23:51:55 +0000300 : TargetPassConfig(TM, PM) {}
301
302 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
303 return getTM<WebAssemblyTargetMachine>();
304 }
305
306 FunctionPass *createTargetRegisterAllocator(bool) override;
Dan Gohman10e730a2015-06-29 23:51:55 +0000307
308 void addIRPasses() override;
Dan Gohman10e730a2015-06-29 23:51:55 +0000309 bool addInstSelector() override;
Dan Gohman10e730a2015-06-29 23:51:55 +0000310 void addPostRegAlloc() override;
Derek Schuffad154c82016-03-28 17:05:30 +0000311 bool addGCPasses() override { return false; }
Dan Gohman10e730a2015-06-29 23:51:55 +0000312 void addPreEmitPass() override;
Matt Arsenaultcf55a652019-03-19 19:33:12 +0000313
314 // No reg alloc
315 bool addRegAssignmentFast() override { return false; }
316
317 // No reg alloc
318 bool addRegAssignmentOptimized() override { return false; }
Dan Gohman10e730a2015-06-29 23:51:55 +0000319};
320} // end anonymous namespace
321
Sanjoy Das26d11ca2017-12-22 18:21:59 +0000322TargetTransformInfo
323WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) {
324 return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
Dan Gohman10e730a2015-06-29 23:51:55 +0000325}
326
327TargetPassConfig *
328WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
Matthias Braun5e394c32017-05-30 21:36:41 +0000329 return new WebAssemblyPassConfig(*this, PM);
Dan Gohman10e730a2015-06-29 23:51:55 +0000330}
331
332FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
333 return nullptr; // No reg alloc
334}
335
Dan Gohman10e730a2015-06-29 23:51:55 +0000336//===----------------------------------------------------------------------===//
337// The following functions are called from lib/CodeGen/Passes.cpp to modify
338// the CodeGen pass sequence.
339//===----------------------------------------------------------------------===//
340
341void WebAssemblyPassConfig::addIRPasses() {
Thomas Lively3f34e1b82019-03-29 00:14:01 +0000342 // Runs LowerAtomicPass if necessary
343 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
344
345 // This is a no-op if atomics are not used in the module
346 addPass(createAtomicExpandPass());
Dan Gohman10e730a2015-06-29 23:51:55 +0000347
Sam Clegg92617552018-07-11 04:29:36 +0000348 // Add signatures to prototype-less function declarations
349 addPass(createWebAssemblyAddMissingPrototypes());
350
Sam Cleggbafe6902017-12-15 00:17:10 +0000351 // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
352 addPass(createWebAssemblyLowerGlobalDtors());
353
Dan Gohman1b637452017-01-07 00:34:54 +0000354 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
355 // to match.
356 addPass(createWebAssemblyFixFunctionBitcasts());
357
Dan Gohman81719f82015-11-25 16:55:01 +0000358 // Optimize "returned" function attributes.
Dan Gohmanb13c91f2016-01-19 14:55:02 +0000359 if (getOptLevel() != CodeGenOpt::None)
360 addPass(createWebAssemblyOptimizeReturned());
Dan Gohman81719f82015-11-25 16:55:01 +0000361
Heejin Ahnc0f18172016-09-01 21:05:15 +0000362 // If exception handling is not enabled and setjmp/longjmp handling is
363 // enabled, we lower invokes into calls and delete unreachable landingpad
364 // blocks. Lowering invokes when there is no EH support is done in
365 // TargetPassConfig::addPassesToHandleExceptions, but this runs after this
366 // function and SjLj handling expects all invokes to be lowered before.
Heejin Ahn9386bde2018-02-24 00:40:50 +0000367 if (!EnableEmException &&
368 TM->Options.ExceptionModel == ExceptionHandling::None) {
Heejin Ahnc0f18172016-09-01 21:05:15 +0000369 addPass(createLowerInvokePass());
370 // The lower invoke pass may create unreachable code. Remove it in order not
371 // to process dead blocks in setjmp/longjmp handling.
372 addPass(createUnreachableBlockEliminationPass());
373 }
374
375 // Handle exceptions and setjmp/longjmp if enabled.
Derek Schuffccdceda2016-08-18 15:27:25 +0000376 if (EnableEmException || EnableEmSjLj)
377 addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException,
378 EnableEmSjLj));
Derek Schufff41f67d2016-08-01 21:34:04 +0000379
Derek Schuffec4be572019-07-03 23:54:06 +0000380 // Expand indirectbr instructions to switches.
381 addPass(createIndirectBrExpandPass());
382
Dan Gohman10e730a2015-06-29 23:51:55 +0000383 TargetPassConfig::addIRPasses();
384}
385
Dan Gohman10e730a2015-06-29 23:51:55 +0000386bool WebAssemblyPassConfig::addInstSelector() {
Dan Gohmanb0921ca2015-12-05 19:24:17 +0000387 (void)TargetPassConfig::addInstSelector();
Dan Gohman10e730a2015-06-29 23:51:55 +0000388 addPass(
389 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
Dan Gohman1cf96c02015-12-09 16:23:59 +0000390 // Run the argument-move pass immediately after the ScheduleDAG scheduler
391 // so that we can fix up the ARGUMENT instructions before anything else
392 // sees them in the wrong place.
393 addPass(createWebAssemblyArgumentMove());
Dan Gohmanbb372242016-01-26 03:39:31 +0000394 // Set the p2align operands. This information is present during ISel, however
395 // it's inconvenient to collect. Collect it now, and update the immediate
396 // operands.
397 addPass(createWebAssemblySetP2AlignOperands());
Dan Gohman10e730a2015-06-29 23:51:55 +0000398 return false;
399}
400
JF Bastien600aee92015-07-31 17:53:38 +0000401void WebAssemblyPassConfig::addPostRegAlloc() {
Dan Gohman9c54d3b2015-11-25 18:13:18 +0000402 // TODO: The following CodeGen passes don't currently support code containing
403 // virtual registers. Consider removing their restrictions and re-enabling
404 // them.
Derek Schuffad154c82016-03-28 17:05:30 +0000405
Matthias Braun1eb47362016-08-25 01:27:13 +0000406 // These functions all require the NoVRegs property.
JF Bastien600aee92015-07-31 17:53:38 +0000407 disablePass(&MachineCopyPropagationID);
Jun Bum Lim7ab1b322018-04-03 18:17:34 +0000408 disablePass(&PostRAMachineSinkingID);
Derek Schuffecabac62016-03-28 22:52:20 +0000409 disablePass(&PostRASchedulerID);
410 disablePass(&FuncletLayoutID);
411 disablePass(&StackMapLivenessID);
412 disablePass(&LiveDebugValuesID);
Sanjoy Dasfe71ec72016-04-19 06:24:58 +0000413 disablePass(&PatchableFunctionID);
Jun Bum Lim7ab1b322018-04-03 18:17:34 +0000414 disablePass(&ShrinkWrapID);
Dan Gohman950a13c2015-09-16 16:51:30 +0000415
Heejin Ahnef9d6ae2019-03-05 20:35:34 +0000416 // This pass hurts code size for wasm because it can generate irreducible
417 // control flow.
418 disablePass(&MachineBlockPlacementID);
419
Dan Gohmanb0921ca2015-12-05 19:24:17 +0000420 TargetPassConfig::addPostRegAlloc();
JF Bastien600aee92015-07-31 17:53:38 +0000421}
Dan Gohman10e730a2015-06-29 23:51:55 +0000422
Dan Gohman950a13c2015-09-16 16:51:30 +0000423void WebAssemblyPassConfig::addPreEmitPass() {
Dan Gohmanb0921ca2015-12-05 19:24:17 +0000424 TargetPassConfig::addPreEmitPass();
Dan Gohman05ac43f2015-12-17 01:39:00 +0000425
Derek Schuff6f697832016-10-21 16:38:07 +0000426 // Rewrite pseudo call_indirect instructions as real instructions.
427 // This needs to run before register stackification, because we change the
428 // order of the arguments.
429 addPass(createWebAssemblyCallIndirectFixup());
430
Heejin Ahne95056d2019-01-08 01:25:12 +0000431 // Eliminate multiple-entry loops.
432 addPass(createWebAssemblyFixIrreducibleControlFlow());
433
434 // Do various transformations for exception handling.
Heejin Ahnd6f48782019-01-30 03:21:57 +0000435 // Every CFG-changing optimizations should come before this.
Heejin Ahne95056d2019-01-08 01:25:12 +0000436 addPass(createWebAssemblyLateEHPrepare());
437
Heejin Ahn0bb98652019-01-30 22:44:45 +0000438 // Now that we have a prologue and epilogue and all frame indices are
439 // rewritten, eliminate SP and FP. This allows them to be stackified,
440 // colored, and numbered with the rest of the registers.
441 addPass(createWebAssemblyReplacePhysRegs());
442
Heejin Ahnd6f48782019-01-30 03:21:57 +0000443 // Preparations and optimizations related to register stackification.
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000444 if (getOptLevel() != CodeGenOpt::None) {
445 // LiveIntervals isn't commonly run this late. Re-establish preconditions.
446 addPass(createWebAssemblyPrepareForLiveIntervals());
447
448 // Depend on LiveIntervals and perform some optimizations on it.
449 addPass(createWebAssemblyOptimizeLiveIntervals());
450
Heejin Ahn321d5222019-01-08 22:35:18 +0000451 // Prepare memory intrinsic calls for register stackifying.
452 addPass(createWebAssemblyMemIntrinsicResults());
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000453
Dan Gohmane0405332016-10-03 22:43:53 +0000454 // Mark registers as representing wasm's value stack. This is a key
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000455 // code-compression technique in WebAssembly. We run this pass (and
Heejin Ahn321d5222019-01-08 22:35:18 +0000456 // MemIntrinsicResults above) very late, so that it sees as much code as
457 // possible, including code emitted by PEI and expanded by late tail
458 // duplication.
Dan Gohman0cfb5f82016-05-10 04:24:02 +0000459 addPass(createWebAssemblyRegStackify());
460
461 // Run the register coloring pass to reduce the total number of registers.
462 // This runs after stackification so that it doesn't consider registers
463 // that become stackified.
464 addPass(createWebAssemblyRegColoring());
465 }
466
Dan Gohmanf52ee172017-02-27 22:38:58 +0000467 // Sort the blocks of the CFG into topological order, a prerequisite for
468 // BLOCK and LOOP markers.
469 addPass(createWebAssemblyCFGSort());
470
471 // Insert BLOCK and LOOP markers.
Dan Gohman950a13c2015-09-16 16:51:30 +0000472 addPass(createWebAssemblyCFGStackify());
Dan Gohman5941bde2015-11-25 21:32:06 +0000473
Heejin Ahne9fd9072019-03-30 09:29:57 +0000474 // Insert explicit local.get and local.set operators.
475 addPass(createWebAssemblyExplicitLocals());
476
Dan Gohmanf0b165a2015-12-05 03:03:35 +0000477 // Lower br_unless into br_if.
478 addPass(createWebAssemblyLowerBrUnless());
479
Dan Gohman5941bde2015-11-25 21:32:06 +0000480 // Perform the very last peephole optimizations on the code.
Dan Gohmanb13c91f2016-01-19 14:55:02 +0000481 if (getOptLevel() != CodeGenOpt::None)
482 addPass(createWebAssemblyPeephole());
Dan Gohmanb7c24002016-05-21 00:21:56 +0000483
484 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
485 addPass(createWebAssemblyRegNumbering());
Dan Gohman950a13c2015-09-16 16:51:30 +0000486}
Heejin Ahn52221d52019-03-26 17:35:35 +0000487
488yaml::MachineFunctionInfo *
489WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
490 return new yaml::WebAssemblyFunctionInfo();
491}
492
493yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
494 const MachineFunction &MF) const {
495 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
496 return new yaml::WebAssemblyFunctionInfo(*MFI);
497}
498
499bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
500 const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
501 SMDiagnostic &Error, SMRange &SourceRange) const {
502 const auto &YamlMFI =
503 reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
504 MachineFunction &MF = PFS.MF;
505 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
506 return false;
507}