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Adrian Prantlb16d9eb2015-01-12 22:19:22 +00001//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains support for writing dwarf compile unit.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16
Adrian Prantl092d9482015-01-13 23:39:11 +000017#include "llvm/IR/DebugInfo.h"
Chandler Carruthd9903882015-01-14 11:23:27 +000018#include "llvm/Support/DataTypes.h"
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000019
20namespace llvm {
21
Adrian Prantla4c30d62015-01-12 23:36:56 +000022class AsmPrinter;
Adrian Prantl66f25952015-01-13 00:04:06 +000023class ByteStreamer;
Adrian Prantla4c30d62015-01-12 23:36:56 +000024class TargetRegisterInfo;
Adrian Prantl658676c2015-01-14 01:01:22 +000025class DwarfUnit;
26class DIELoc;
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000027
Adrian Prantl54286bd2016-11-02 16:12:20 +000028/// Holds a DIExpression and keeps track of how many operands have been consumed
29/// so far.
30class DIExpressionCursor {
31 DIExpression::expr_op_iterator Start, End;
32public:
33 DIExpressionCursor(const DIExpression *Expr) {
34 if (!Expr) {
35 assert(Start == End);
36 return;
37 }
38 Start = Expr->expr_op_begin();
39 End = Expr->expr_op_end();
40 }
41
Adrian Prantl8fafb8d2016-12-09 20:43:40 +000042 DIExpressionCursor(ArrayRef<uint64_t> Expr)
43 : Start(Expr.begin()), End(Expr.end()) {}
44
Florian Hahnffc498d2017-06-14 13:14:38 +000045 DIExpressionCursor(const DIExpressionCursor &C)
46 : Start(C.Start), End(C.End) {}
47
Adrian Prantl54286bd2016-11-02 16:12:20 +000048 /// Consume one operation.
49 Optional<DIExpression::ExprOperand> take() {
50 if (Start == End)
51 return None;
52 return *(Start++);
53 }
54
55 /// Consume N operations.
56 void consume(unsigned N) { std::advance(Start, N); }
57
58 /// Return the current operation.
59 Optional<DIExpression::ExprOperand> peek() const {
60 if (Start == End)
61 return None;
62 return *(Start);
63 }
64
65 /// Return the next operation.
66 Optional<DIExpression::ExprOperand> peekNext() const {
67 if (Start == End)
68 return None;
69
70 auto Next = Start.getNext();
71 if (Next == End)
72 return None;
73
74 return *Next;
75 }
Adrian Prantlf148d692016-11-02 16:20:37 +000076 /// Determine whether there are any operations left in this expression.
Adrian Prantl54286bd2016-11-02 16:12:20 +000077 operator bool() const { return Start != End; }
Adrian Prantlada10482017-04-20 20:42:33 +000078 DIExpression::expr_op_iterator begin() const { return Start; }
79 DIExpression::expr_op_iterator end() const { return End; }
Adrian Prantl5542da42016-12-22 06:10:41 +000080
81 /// Retrieve the fragment information, if any.
82 Optional<DIExpression::FragmentInfo> getFragmentInfo() const {
83 return DIExpression::getFragmentInfo(Start, End);
84 }
Adrian Prantl54286bd2016-11-02 16:12:20 +000085};
86
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000087/// Base class containing the logic for constructing DWARF expressions
88/// independently of whether they are emitted into a DIE or into a .debug_loc
89/// entry.
90class DwarfExpression {
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000091protected:
Adrian Prantl80e188d2017-03-22 01:15:57 +000092 /// Holds information about all subregisters comprising a register location.
93 struct Register {
94 int DwarfRegNo;
95 unsigned Size;
96 const char *Comment;
97 };
98
99 /// The register location, if any.
100 SmallVector<Register, 2> DwarfRegs;
101
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000102 /// Current Fragment Offset in Bits.
103 uint64_t OffsetInBits = 0;
Adrian Prantl36213092017-03-16 17:42:47 +0000104 unsigned DwarfVersion;
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000105
106 /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
107 unsigned SubRegisterSizeInBits = 0;
108 unsigned SubRegisterOffsetInBits = 0;
109
Adrian Prantl6825fb62017-04-18 01:21:53 +0000110 /// The kind of location description being produced.
111 enum { Unknown = 0, Register, Memory, Implicit } LocationKind = Unknown;
112
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000113 /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
114 /// to represent a subregister.
115 void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
116 SubRegisterSizeInBits = SizeInBits;
117 SubRegisterOffsetInBits = OffsetInBits;
118 }
Adrian Prantla4c30d62015-01-12 23:36:56 +0000119
Adrian Prantl981f03e2017-03-16 17:14:56 +0000120 /// Add masking operations to stencil out a subregister.
121 void maskSubRegister();
122
Adrian Prantl172ab662015-01-13 23:11:07 +0000123 /// Output a dwarf operand and an optional assembler comment.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000124 virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000125 /// Emit a raw signed value.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000126 virtual void emitSigned(int64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000127 /// Emit a raw unsigned value.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000128 virtual void emitUnsigned(uint64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000129 /// Return whether the given machine register is the frame register in the
130 /// current function.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000131 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
Adrian Prantl00dbc2a2015-01-12 22:19:26 +0000132
Adrian Prantl6825fb62017-04-18 01:21:53 +0000133 /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
134 /// register location description.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000135 void addReg(int DwarfReg, const char *Comment = nullptr);
Adrian Prantla2719882017-03-22 17:19:55 +0000136 /// Emit a DW_OP_breg operation.
137 void addBReg(int DwarfReg, int Offset);
Adrian Prantl80e188d2017-03-22 01:15:57 +0000138 /// Emit DW_OP_fbreg <Offset>.
139 void addFBReg(int Offset);
Adrian Prantl956484b2017-03-20 21:35:09 +0000140
141 /// Emit a partial DWARF register operation.
142 ///
143 /// \param MachineReg The register number.
144 /// \param MaxSize If the register must be composed from
145 /// sub-registers this is an upper bound
146 /// for how many bits the emitted DW_OP_piece
147 /// may cover.
148 ///
149 /// If size and offset is zero an operation for the entire register is
150 /// emitted: Some targets do not provide a DWARF register number for every
151 /// register. If this is the case, this function will attempt to emit a DWARF
152 /// register by emitting a fragment of a super-register or by piecing together
153 /// multiple subregisters that alias the register.
154 ///
155 /// \return false if no DWARF register exists for MachineReg.
156 bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
157 unsigned MaxSize = ~1U);
158
159
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000160 /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
161 /// \param OffsetInBits This is an optional offset into the location that
162 /// is at the top of the DWARF stack.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000163 void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
Adrian Prantl941fa752016-12-05 18:04:47 +0000164
Adrian Prantl981f03e2017-03-16 17:14:56 +0000165 /// Emit a shift-right dwarf operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000166 void addShr(unsigned ShiftBy);
Adrian Prantl981f03e2017-03-16 17:14:56 +0000167 /// Emit a bitwise and dwarf operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000168 void addAnd(unsigned Mask);
Adrian Prantl941fa752016-12-05 18:04:47 +0000169
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000170 /// Emit a DW_OP_stack_value, if supported.
171 ///
Adrian Prantlf148d692016-11-02 16:20:37 +0000172 /// The proper way to describe a constant value is DW_OP_constu <const>,
173 /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
174 /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
175 /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
176 /// <const> actually describes a value at a constant addess, not a constant
177 /// value. However, in the past there was no better way to describe a
178 /// constant value, so the producers and consumers started to rely on
179 /// heuristics to disambiguate the value vs. location status of the
180 /// expression. See PR21176 for more details.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000181 void addStackValue();
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000182
Adrian Prantl035862b2017-03-27 17:34:04 +0000183 ~DwarfExpression() = default;
Adrian Prantl52884b72017-03-20 21:34:19 +0000184public:
185 DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
Adrian Prantl52884b72017-03-20 21:34:19 +0000186
187 /// This needs to be called last to commit any pending changes.
188 void finalize();
189
Adrian Prantl66f25952015-01-13 00:04:06 +0000190 /// Emit a signed constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000191 void addSignedConstant(int64_t Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000192 /// Emit an unsigned constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000193 void addUnsignedConstant(uint64_t Value);
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000194 /// Emit an unsigned constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000195 void addUnsignedConstant(const APInt &Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000196
Adrian Prantlc12cee32017-04-19 23:42:25 +0000197 /// Lock this down to become a memory location description.
198 void setMemoryLocationKind() {
199 assert(LocationKind == Unknown);
200 LocationKind = Memory;
201 }
202
Adrian Prantlf148d692016-11-02 16:20:37 +0000203 /// Emit a machine register location. As an optimization this may also consume
204 /// the prefix of a DwarfExpression if a more efficient representation for
205 /// combining the register location and the first operation exists.
Duncan P. N. Exon Smith60635e32015-04-21 18:44:06 +0000206 ///
Adrian Prantlc12cee32017-04-19 23:42:25 +0000207 /// \param FragmentOffsetInBits If this is one fragment out of a
208 /// fragmented
Adrian Prantl941fa752016-12-05 18:04:47 +0000209 /// location, this is the offset of the
210 /// fragment inside the entire variable.
211 /// \return false if no DWARF register exists
212 /// for MachineReg.
Adrian Prantlc12cee32017-04-19 23:42:25 +0000213 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
214 DIExpressionCursor &Expr, unsigned MachineReg,
Adrian Prantl941fa752016-12-05 18:04:47 +0000215 unsigned FragmentOffsetInBits = 0);
Adrian Prantl54286bd2016-11-02 16:12:20 +0000216 /// Emit all remaining operations in the DIExpressionCursor.
Adrian Prantl941fa752016-12-05 18:04:47 +0000217 ///
218 /// \param FragmentOffsetInBits If this is one fragment out of multiple
219 /// locations, this is the offset of the
220 /// fragment inside the entire variable.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000221 void addExpression(DIExpressionCursor &&Expr,
Adrian Prantl941fa752016-12-05 18:04:47 +0000222 unsigned FragmentOffsetInBits = 0);
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000223
224 /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
225 /// the fragment described by \c Expr.
226 void addFragmentOffset(const DIExpression *Expr);
Adrian Prantl092d9482015-01-13 23:39:11 +0000227};
Adrian Prantl66f25952015-01-13 00:04:06 +0000228
229/// DwarfExpression implementation for .debug_loc entries.
Adrian Prantl035862b2017-03-27 17:34:04 +0000230class DebugLocDwarfExpression final : public DwarfExpression {
Adrian Prantl66f25952015-01-13 00:04:06 +0000231 ByteStreamer &BS;
232
Adrian Prantla63b8e82017-03-16 17:42:45 +0000233 void emitOp(uint8_t Op, const char *Comment = nullptr) override;
234 void emitSigned(int64_t Value) override;
235 void emitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000236 bool isFrameRegister(const TargetRegisterInfo &TRI,
237 unsigned MachineReg) override;
Adrian Prantl52884b72017-03-20 21:34:19 +0000238public:
239 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
240 : DwarfExpression(DwarfVersion), BS(BS) {}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000241};
Adrian Prantl658676c2015-01-14 01:01:22 +0000242
243/// DwarfExpression implementation for singular DW_AT_location.
Adrian Prantl035862b2017-03-27 17:34:04 +0000244class DIEDwarfExpression final : public DwarfExpression {
Adrian Prantl92da14b2015-03-02 22:02:33 +0000245const AsmPrinter &AP;
Adrian Prantl658676c2015-01-14 01:01:22 +0000246 DwarfUnit &DU;
247 DIELoc &DIE;
248
Adrian Prantla63b8e82017-03-16 17:42:45 +0000249 void emitOp(uint8_t Op, const char *Comment = nullptr) override;
250 void emitSigned(int64_t Value) override;
251 void emitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000252 bool isFrameRegister(const TargetRegisterInfo &TRI,
253 unsigned MachineReg) override;
Adrian Prantl52884b72017-03-20 21:34:19 +0000254public:
255 DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
Adrian Prantlbceaaa92016-12-20 02:09:43 +0000256 DIELoc *finalize() {
257 DwarfExpression::finalize();
258 return &DIE;
259 }
Adrian Prantl658676c2015-01-14 01:01:22 +0000260};
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000261}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000262
263#endif