blob: 573cd45c0825edecbc5ac17bd5ff78d47bf60664 [file] [log] [blame]
Christian Pirkerb5728192014-05-08 14:06:24 +00001; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
2; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-LE
Eric Christopher661f2d12014-12-18 02:20:58 +00003; RUN: llc < %s -mtriple=armebv7 -target-abi apcs | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
Christian Pirkerb5728192014-05-08 14:06:24 +00004; RUN: llc < %s -mtriple=thumbebv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-BE
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +00005
6define i64 @test1(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +00007; CHECK-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +00008; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +00009; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +000010; CHECK-LE: adds [[REG3:(r[0-9]?[02468])]], [[REG1]]
11; CHECK-LE: adc [[REG4:(r[0-9]?[13579])]], [[REG2]]
12; CHECK-BE: adds [[REG4:(r[0-9]?[13579])]], [[REG2]]
13; CHECK-BE: adc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +000014; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000015; CHECK: cmp
16; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +000017; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000018
Stephen Lind24ab202013-07-14 06:24:09 +000019; CHECK-THUMB-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +000020; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000021; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +000022; CHECK-THUMB-LE: adds.w [[REG3:[a-z0-9]+]], [[REG1]]
23; CHECK-THUMB-LE: adc.w [[REG4:[a-z0-9]+]], [[REG2]]
24; CHECK-THUMB-BE: adds.w [[REG4:[a-z0-9]+]], [[REG2]]
25; CHECK-THUMB-BE: adc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +000026; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
27; CHECK-THUMB: cmp
28; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +000029; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000030
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000031 %r = atomicrmw add i64* %ptr, i64 %val seq_cst
32 ret i64 %r
33}
34
35define i64 @test2(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +000036; CHECK-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +000037; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +000038; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +000039; CHECK-LE: subs [[REG3:(r[0-9]?[02468])]], [[REG1]]
40; CHECK-LE: sbc [[REG4:(r[0-9]?[13579])]], [[REG2]]
41; CHECK-BE: subs [[REG4:(r[0-9]?[13579])]], [[REG2]]
42; CHECK-BE: sbc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +000043; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000044; CHECK: cmp
45; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +000046; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000047
Stephen Lind24ab202013-07-14 06:24:09 +000048; CHECK-THUMB-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +000049; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000050; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +000051; CHECK-THUMB-LE: subs.w [[REG3:[a-z0-9]+]], [[REG1]]
52; CHECK-THUMB-LE: sbc.w [[REG4:[a-z0-9]+]], [[REG2]]
53; CHECK-THUMB-BE: subs.w [[REG4:[a-z0-9]+]], [[REG2]]
54; CHECK-THUMB-BE: sbc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +000055; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
56; CHECK-THUMB: cmp
57; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +000058; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000059
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000060 %r = atomicrmw sub i64* %ptr, i64 %val seq_cst
61 ret i64 %r
62}
63
64define i64 @test3(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +000065; CHECK-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +000066; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +000067; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +000068; CHECK-LE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
69; CHECK-LE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
70; CHECK-BE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
71; CHECK-BE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +000072; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000073; CHECK: cmp
74; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +000075; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000076
Stephen Lind24ab202013-07-14 06:24:09 +000077; CHECK-THUMB-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +000078; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000079; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +000080; CHECK-THUMB-LE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
81; CHECK-THUMB-LE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
82; CHECK-THUMB-BE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
83; CHECK-THUMB-BE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +000084; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
85; CHECK-THUMB: cmp
86; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +000087; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +000088
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +000089 %r = atomicrmw and i64* %ptr, i64 %val seq_cst
90 ret i64 %r
91}
92
93define i64 @test4(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +000094; CHECK-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +000095; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +000096; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +000097; CHECK-LE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
98; CHECK-LE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
99; CHECK-BE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
100; CHECK-BE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000101; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000102; CHECK: cmp
103; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000104; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000105
Stephen Lind24ab202013-07-14 06:24:09 +0000106; CHECK-THUMB-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +0000107; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000108; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000109; CHECK-THUMB-LE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
110; CHECK-THUMB-LE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
111; CHECK-THUMB-BE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
112; CHECK-THUMB-BE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000113; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
114; CHECK-THUMB: cmp
115; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000116; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000117
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000118 %r = atomicrmw or i64* %ptr, i64 %val seq_cst
119 ret i64 %r
120}
121
122define i64 @test5(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000123; CHECK-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000124; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000125; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000126; CHECK-LE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
127; CHECK-LE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
128; CHECK-BE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
129; CHECK-BE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000130; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000131; CHECK: cmp
132; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000133; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000134
Stephen Lind24ab202013-07-14 06:24:09 +0000135; CHECK-THUMB-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000136; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000137; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000138; CHECK-THUMB-LE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
139; CHECK-THUMB-LE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
140; CHECK-THUMB-BE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
141; CHECK-THUMB-BE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000142; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
143; CHECK-THUMB: cmp
144; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000145; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000146
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000147 %r = atomicrmw xor i64* %ptr, i64 %val seq_cst
148 ret i64 %r
149}
150
151define i64 @test6(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000152; CHECK-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000153; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000154; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
155; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000156; CHECK: cmp
157; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000158; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000159
Stephen Lind24ab202013-07-14 06:24:09 +0000160; CHECK-THUMB-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000161; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000162; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
163; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
164; CHECK-THUMB: cmp
165; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000166; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000167
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000168 %r = atomicrmw xchg i64* %ptr, i64 %val seq_cst
169 ret i64 %r
Eli Friedman2c7bb522011-08-31 00:41:05 +0000170}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000171
172define i64 @test7(i64* %ptr, i64 %val1, i64 %val2) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000173; CHECK-LABEL: test7:
Tim Northover20b9f732014-06-13 16:45:52 +0000174; CHECK-DAG: mov [[VAL1LO:r[0-9]+]], r1
175; CHECK-DAG: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000176; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northover20b9f732014-06-13 16:45:52 +0000177; CHECK-LE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG1]], [[VAL1LO]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000178; CHECK-LE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG2]], r2
179; CHECK-BE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG2]], r2
180; CHECK-BE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000181; CHECK: orrs {{r[0-9]+}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000182; CHECK: bne
Weiming Zhao8f56f882012-11-16 21:55:34 +0000183; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000184; CHECK: cmp
185; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000186; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000187
Stephen Lind24ab202013-07-14 06:24:09 +0000188; CHECK-THUMB-LABEL: test7:
Tim Northover36b24172013-07-03 09:20:36 +0000189; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000190; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000191; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG1]], r2
192; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG2]], r3
Tim Northoverb4ddc082014-05-30 10:09:59 +0000193; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG1]], r2
194; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG2]], r3
195; CHECK-THUMB-LE: orrs [[MISMATCH_HI]], [[MISMATCH_LO]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000196; CHECK-THUMB: bne
197; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
198; CHECK-THUMB: cmp
199; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000200; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000201
Tim Northover420a2162014-06-13 14:24:07 +0000202 %pair = cmpxchg i64* %ptr, i64 %val1, i64 %val2 seq_cst seq_cst
203 %r = extractvalue { i64, i1 } %pair, 0
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000204 ret i64 %r
205}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000206
Amara Emersonb4ad2f32013-09-26 12:22:36 +0000207; Compiles down to a single ldrexd
Eli Friedman7c3bded2011-08-31 18:26:09 +0000208define i64 @test8(i64* %ptr) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000209; CHECK-LABEL: test8:
Weiming Zhao8f56f882012-11-16 21:55:34 +0000210; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverf520eff2015-12-02 18:12:57 +0000211; CHECK-NOT: strexd
212; CHECK: clrex
213; CHECK-NOT: strexd
Tim Northover36b24172013-07-03 09:20:36 +0000214; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000215
Stephen Lind24ab202013-07-14 06:24:09 +0000216; CHECK-THUMB-LABEL: test8:
Tim Northovera0edd3e2013-01-29 09:06:13 +0000217; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverf520eff2015-12-02 18:12:57 +0000218; CHECK-THUMB-NOT: strexd
219; CHECK-THUMB: clrex
220; CHECK-THUMB-NOT: strexd
Tim Northover36b24172013-07-03 09:20:36 +0000221; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000222
David Blaikiea79ac142015-02-27 21:17:42 +0000223 %r = load atomic i64, i64* %ptr seq_cst, align 8
Eli Friedman7c3bded2011-08-31 18:26:09 +0000224 ret i64 %r
225}
226
227; Compiles down to atomicrmw xchg; there really isn't any more efficient
228; way to write it.
229define void @test9(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000230; CHECK-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000231; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000232; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
233; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000234; CHECK: cmp
235; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000236; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000237
Stephen Lind24ab202013-07-14 06:24:09 +0000238; CHECK-THUMB-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000239; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000240; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
241; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
242; CHECK-THUMB: cmp
243; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000244; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000245
Eli Friedman7c3bded2011-08-31 18:26:09 +0000246 store atomic i64 %val, i64* %ptr seq_cst, align 8
247 ret void
248}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000249
250define i64 @test10(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000251; CHECK-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000252; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000253; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000254; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
255; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
256; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000257; CHECK-LE: cmp [[REG1]], r1
258; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000259; CHECK: movwls [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000260; CHECK-LE: cmp [[REG2]], r2
261; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000262; CHECK: movwle [[CARRY_HI]], #1
263; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
264; CHECK: cmp [[CARRY_HI]], #0
265; CHECK: movne [[OUT_HI]], [[REG2]]
266; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
267; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000268; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
269; CHECK: cmp
270; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000271; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000272
Stephen Lind24ab202013-07-14 06:24:09 +0000273; CHECK-THUMB-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000274; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000275; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000276; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+|lr]], #0
277; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+|lr]], #0
278; CHECK-THUMB-LE: cmp [[REG1]], r2
279; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000280; CHECK-THUMB: movls.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000281; CHECK-THUMB-LE: cmp [[REG2]], r3
282; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000283; CHECK-THUMB: movle [[CARRY_HI]], #1
284; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
285; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
286; CHECK-THUMB: cmp [[CARRY_HI]], #0
287; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
288; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
289; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000290; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
291; CHECK-THUMB: cmp
292; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000293; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000294
Silviu Baranga93aefa52012-11-29 14:41:25 +0000295 %r = atomicrmw min i64* %ptr, i64 %val seq_cst
296 ret i64 %r
297}
298
299define i64 @test11(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000300; CHECK-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000301; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000302; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000303; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
304; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
305; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000306; CHECK-LE: cmp [[REG1]], r1
307; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000308; CHECK: movwls [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000309; CHECK-LE: cmp [[REG2]], r2
310; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000311; CHECK: movwls [[CARRY_HI]], #1
312; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
313; CHECK: cmp [[CARRY_HI]], #0
314; CHECK: movne [[OUT_HI]], [[REG2]]
315; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
316; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000317; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
318; CHECK: cmp
319; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000320; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000321
Stephen Lind24ab202013-07-14 06:24:09 +0000322; CHECK-THUMB-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000323; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000324; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000325; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
326; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000327; CHECK-THUMB-LE: cmp [[REG1]], r2
328; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000329; CHECK-THUMB: movls.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000330; CHECK-THUMB-LE: cmp [[REG2]], r3
331; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000332; CHECK-THUMB: movls [[CARRY_HI]], #1
333; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
334; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
335; CHECK-THUMB: cmp [[CARRY_HI]], #0
336; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
337; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
338; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000339; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
340; CHECK-THUMB: cmp
341; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000342; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000343
Silviu Baranga93aefa52012-11-29 14:41:25 +0000344 %r = atomicrmw umin i64* %ptr, i64 %val seq_cst
345 ret i64 %r
346}
347
348define i64 @test12(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000349; CHECK-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000350; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000351; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000352; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
353; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
354; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000355; CHECK-LE: cmp [[REG1]], r1
356; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000357; CHECK: movwhi [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000358; CHECK-LE: cmp [[REG2]], r2
359; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000360; CHECK: movwgt [[CARRY_HI]], #1
361; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
362; CHECK: cmp [[CARRY_HI]], #0
363; CHECK: movne [[OUT_HI]], [[REG2]]
364; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
365; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000366; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
367; CHECK: cmp
368; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000369; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000370
Stephen Lind24ab202013-07-14 06:24:09 +0000371; CHECK-THUMB-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000372; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000373; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000374; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
375; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000376; CHECK-THUMB-LE: cmp [[REG1]], r2
377; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000378; CHECK-THUMB: movhi.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000379; CHECK-THUMB-LE: cmp [[REG2]], r3
380; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000381; CHECK-THUMB: movgt [[CARRY_HI]], #1
382; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
383; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
384; CHECK-THUMB: cmp [[CARRY_HI]], #0
385; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
386; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
387; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000388; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
389; CHECK-THUMB: cmp
390; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000391; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000392
Silviu Baranga93aefa52012-11-29 14:41:25 +0000393 %r = atomicrmw max i64* %ptr, i64 %val seq_cst
394 ret i64 %r
395}
396
397define i64 @test13(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000398; CHECK-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000399; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000400; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000401; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
402; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
403; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000404; CHECK-LE: cmp [[REG1]], r1
405; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000406; CHECK: movwhi [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000407; CHECK-LE: cmp [[REG2]], r2
408; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000409; CHECK: movwhi [[CARRY_HI]], #1
410; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
411; CHECK: cmp [[CARRY_HI]], #0
412; CHECK: movne [[OUT_HI]], [[REG2]]
413; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
414; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000415; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
416; CHECK: cmp
417; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000418; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000419
Stephen Lind24ab202013-07-14 06:24:09 +0000420; CHECK-THUMB-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000421; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000422; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000423; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
424; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000425; CHECK-THUMB-LE: cmp [[REG1]], r2
426; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000427; CHECK-THUMB: movhi.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000428; CHECK-THUMB-LE: cmp [[REG2]], r3
429; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000430; CHECK-THUMB: movhi [[CARRY_HI]], #1
431; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
432; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
433; CHECK-THUMB: cmp [[CARRY_HI]], #0
434; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
435; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
436; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000437; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
438; CHECK-THUMB: cmp
439; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000440; CHECK-THUMB: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000441 %r = atomicrmw umax i64* %ptr, i64 %val seq_cst
442 ret i64 %r
443}
444