Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/msm_rotator.h> |
| 18 | #include <linux/clkdev.h> |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 19 | #include <linux/dma-mapping.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 20 | #include <mach/irqs-8064.h> |
| 21 | #include <mach/board.h> |
| 22 | #include <mach/msm_iomap.h> |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 23 | #include <mach/usbdiag.h> |
| 24 | #include <mach/msm_sps.h> |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 25 | #include <mach/dma.h> |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 26 | #include <mach/msm_dsps.h> |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 27 | #include <sound/msm-dai-q6.h> |
| 28 | #include <sound/apr_audio.h> |
Gagan Mac | 8a7a5d3 | 2011-11-11 16:43:06 -0700 | [diff] [blame] | 29 | #include <mach/msm_bus_board.h> |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 30 | #include <mach/rpm.h> |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 31 | #include <mach/mdm2.h> |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 32 | #include <mach/msm_smd.h> |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 33 | #include <mach/msm_dcvs.h> |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 34 | #include <mach/qdss.h> |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 35 | #include <linux/ion.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 36 | #include "clock.h" |
| 37 | #include "devices.h" |
Matt Wagantall | 1875d32 | 2012-02-22 16:11:33 -0800 | [diff] [blame] | 38 | #include "footswitch.h" |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 39 | #include "msm_watchdog.h" |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 40 | #include "rpm_stats.h" |
| 41 | #include "rpm_log.h" |
| 42 | #include "mpm.h" |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 43 | |
| 44 | /* Address of GSBI blocks */ |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 45 | #define MSM_GSBI1_PHYS 0x12440000 |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 46 | #define MSM_GSBI3_PHYS 0x16200000 |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 47 | #define MSM_GSBI4_PHYS 0x16300000 |
| 48 | #define MSM_GSBI5_PHYS 0x1A200000 |
| 49 | #define MSM_GSBI6_PHYS 0x16500000 |
| 50 | #define MSM_GSBI7_PHYS 0x16600000 |
| 51 | |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 52 | /* GSBI UART devices */ |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 53 | #define MSM_UART1DM_PHYS (MSM_GSBI1_PHYS + 0x10000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 54 | #define MSM_UART3DM_PHYS (MSM_GSBI3_PHYS + 0x40000) |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 55 | #define MSM_UART7DM_PHYS (MSM_GSBI7_PHYS + 0x40000) |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 56 | |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 57 | /* GSBI QUP devices */ |
David Keitel | 3c40fc5 | 2012-02-09 17:53:52 -0800 | [diff] [blame] | 58 | #define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x20000) |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 59 | #define MSM_GSBI3_QUP_PHYS (MSM_GSBI3_PHYS + 0x80000) |
| 60 | #define MSM_GSBI4_QUP_PHYS (MSM_GSBI4_PHYS + 0x80000) |
| 61 | #define MSM_GSBI5_QUP_PHYS (MSM_GSBI5_PHYS + 0x80000) |
| 62 | #define MSM_GSBI6_QUP_PHYS (MSM_GSBI6_PHYS + 0x80000) |
| 63 | #define MSM_GSBI7_QUP_PHYS (MSM_GSBI7_PHYS + 0x80000) |
| 64 | #define MSM_QUP_SIZE SZ_4K |
| 65 | |
Kenneth Heitke | 36920d3 | 2011-07-20 16:44:30 -0600 | [diff] [blame] | 66 | /* Address of SSBI CMD */ |
| 67 | #define MSM_PMIC1_SSBI_CMD_PHYS 0x00500000 |
| 68 | #define MSM_PMIC2_SSBI_CMD_PHYS 0x00C00000 |
| 69 | #define MSM_PMIC_SSBI_SIZE SZ_4K |
Harini Jayaraman | c4c5869 | 2011-07-19 14:50:10 -0600 | [diff] [blame] | 70 | |
Hemant Kumar | caa0909 | 2011-07-30 00:26:33 -0700 | [diff] [blame] | 71 | /* Address of HS USBOTG1 */ |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 72 | #define MSM_HSUSB1_PHYS 0x12500000 |
| 73 | #define MSM_HSUSB1_SIZE SZ_4K |
Hemant Kumar | caa0909 | 2011-07-30 00:26:33 -0700 | [diff] [blame] | 74 | |
Manu Gautam | 91223e0 | 2011-11-08 15:27:22 +0530 | [diff] [blame] | 75 | /* Address of HS USB3 */ |
| 76 | #define MSM_HSUSB3_PHYS 0x12520000 |
| 77 | #define MSM_HSUSB3_SIZE SZ_4K |
| 78 | |
Hemant Kumar | 1d66e1c | 2012-02-13 15:24:59 -0800 | [diff] [blame] | 79 | /* Address of HS USB4 */ |
| 80 | #define MSM_HSUSB4_PHYS 0x12530000 |
| 81 | #define MSM_HSUSB4_SIZE SZ_4K |
| 82 | |
| 83 | |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 84 | static struct msm_watchdog_pdata msm_watchdog_pdata = { |
| 85 | .pet_time = 10000, |
| 86 | .bark_time = 11000, |
| 87 | .has_secure = true, |
Joel King | e7ca6f7 | 2012-02-09 20:51:25 -0800 | [diff] [blame] | 88 | .needs_expired_enable = true, |
Jeff Ohlstein | 7e66855 | 2011-10-06 16:17:25 -0700 | [diff] [blame] | 89 | }; |
| 90 | |
| 91 | struct platform_device msm8064_device_watchdog = { |
| 92 | .name = "msm_watchdog", |
| 93 | .id = -1, |
| 94 | .dev = { |
| 95 | .platform_data = &msm_watchdog_pdata, |
| 96 | }, |
| 97 | }; |
| 98 | |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 99 | static struct resource msm_dmov_resource[] = { |
| 100 | { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 101 | .start = ADM_0_SCSS_1_IRQ, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 102 | .flags = IORESOURCE_IRQ, |
| 103 | }, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 104 | { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 105 | .start = 0x18320000, |
| 106 | .end = 0x18320000 + SZ_1M - 1, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 107 | .flags = IORESOURCE_MEM, |
| 108 | }, |
| 109 | }; |
| 110 | |
| 111 | static struct msm_dmov_pdata msm_dmov_pdata = { |
Jeff Ohlstein | 4af7269 | 2011-11-07 15:59:17 -0800 | [diff] [blame] | 112 | .sd = 1, |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 113 | .sd_size = 0x800, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 114 | }; |
| 115 | |
Stepan Moskovchenko | df13d34 | 2011-08-03 19:01:25 -0700 | [diff] [blame] | 116 | struct platform_device apq8064_device_dmov = { |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 117 | .name = "msm_dmov", |
| 118 | .id = -1, |
| 119 | .resource = msm_dmov_resource, |
| 120 | .num_resources = ARRAY_SIZE(msm_dmov_resource), |
Jeff Ohlstein | 905f1ce | 2011-09-07 18:50:18 -0700 | [diff] [blame] | 121 | .dev = { |
| 122 | .platform_data = &msm_dmov_pdata, |
| 123 | }, |
Joel King | 0581896d | 2011-07-19 16:43:28 -0700 | [diff] [blame] | 124 | }; |
| 125 | |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 126 | static struct resource resources_uart_gsbi1[] = { |
| 127 | { |
| 128 | .start = APQ8064_GSBI1_UARTDM_IRQ, |
| 129 | .end = APQ8064_GSBI1_UARTDM_IRQ, |
| 130 | .flags = IORESOURCE_IRQ, |
| 131 | }, |
| 132 | { |
| 133 | .start = MSM_UART1DM_PHYS, |
| 134 | .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1, |
| 135 | .name = "uartdm_resource", |
| 136 | .flags = IORESOURCE_MEM, |
| 137 | }, |
| 138 | { |
| 139 | .start = MSM_GSBI1_PHYS, |
| 140 | .end = MSM_GSBI1_PHYS + PAGE_SIZE - 1, |
| 141 | .name = "gsbi_resource", |
| 142 | .flags = IORESOURCE_MEM, |
| 143 | }, |
| 144 | }; |
| 145 | |
| 146 | struct platform_device apq8064_device_uart_gsbi1 = { |
| 147 | .name = "msm_serial_hsl", |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 148 | .id = 1, |
Stepan Moskovchenko | 2701a44 | 2011-08-19 13:47:22 -0700 | [diff] [blame] | 149 | .num_resources = ARRAY_SIZE(resources_uart_gsbi1), |
| 150 | .resource = resources_uart_gsbi1, |
| 151 | }; |
| 152 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 153 | static struct resource resources_uart_gsbi3[] = { |
| 154 | { |
| 155 | .start = GSBI3_UARTDM_IRQ, |
| 156 | .end = GSBI3_UARTDM_IRQ, |
| 157 | .flags = IORESOURCE_IRQ, |
| 158 | }, |
| 159 | { |
| 160 | .start = MSM_UART3DM_PHYS, |
| 161 | .end = MSM_UART3DM_PHYS + PAGE_SIZE - 1, |
| 162 | .name = "uartdm_resource", |
| 163 | .flags = IORESOURCE_MEM, |
| 164 | }, |
| 165 | { |
| 166 | .start = MSM_GSBI3_PHYS, |
| 167 | .end = MSM_GSBI3_PHYS + PAGE_SIZE - 1, |
| 168 | .name = "gsbi_resource", |
| 169 | .flags = IORESOURCE_MEM, |
| 170 | }, |
| 171 | }; |
| 172 | |
| 173 | struct platform_device apq8064_device_uart_gsbi3 = { |
| 174 | .name = "msm_serial_hsl", |
| 175 | .id = 0, |
| 176 | .num_resources = ARRAY_SIZE(resources_uart_gsbi3), |
| 177 | .resource = resources_uart_gsbi3, |
| 178 | }; |
| 179 | |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 180 | static struct resource resources_qup_i2c_gsbi3[] = { |
| 181 | { |
| 182 | .name = "gsbi_qup_i2c_addr", |
| 183 | .start = MSM_GSBI3_PHYS, |
| 184 | .end = MSM_GSBI3_PHYS + 4 - 1, |
| 185 | .flags = IORESOURCE_MEM, |
| 186 | }, |
| 187 | { |
| 188 | .name = "qup_phys_addr", |
| 189 | .start = MSM_GSBI3_QUP_PHYS, |
| 190 | .end = MSM_GSBI3_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 191 | .flags = IORESOURCE_MEM, |
| 192 | }, |
| 193 | { |
| 194 | .name = "qup_err_intr", |
| 195 | .start = GSBI3_QUP_IRQ, |
| 196 | .end = GSBI3_QUP_IRQ, |
| 197 | .flags = IORESOURCE_IRQ, |
| 198 | }, |
| 199 | { |
| 200 | .name = "i2c_clk", |
| 201 | .start = 9, |
| 202 | .end = 9, |
| 203 | .flags = IORESOURCE_IO, |
| 204 | }, |
| 205 | { |
| 206 | .name = "i2c_sda", |
| 207 | .start = 8, |
| 208 | .end = 8, |
| 209 | .flags = IORESOURCE_IO, |
| 210 | }, |
| 211 | }; |
| 212 | |
David Keitel | 3c40fc5 | 2012-02-09 17:53:52 -0800 | [diff] [blame] | 213 | static struct resource resources_qup_i2c_gsbi1[] = { |
| 214 | { |
| 215 | .name = "gsbi_qup_i2c_addr", |
| 216 | .start = MSM_GSBI1_PHYS, |
| 217 | .end = MSM_GSBI1_PHYS + 4 - 1, |
| 218 | .flags = IORESOURCE_MEM, |
| 219 | }, |
| 220 | { |
| 221 | .name = "qup_phys_addr", |
| 222 | .start = MSM_GSBI1_QUP_PHYS, |
| 223 | .end = MSM_GSBI1_QUP_PHYS + MSM_QUP_SIZE - 1, |
| 224 | .flags = IORESOURCE_MEM, |
| 225 | }, |
| 226 | { |
| 227 | .name = "qup_err_intr", |
| 228 | .start = APQ8064_GSBI1_QUP_IRQ, |
| 229 | .end = APQ8064_GSBI1_QUP_IRQ, |
| 230 | .flags = IORESOURCE_IRQ, |
| 231 | }, |
| 232 | { |
| 233 | .name = "i2c_clk", |
| 234 | .start = 21, |
| 235 | .end = 21, |
| 236 | .flags = IORESOURCE_IO, |
| 237 | }, |
| 238 | { |
| 239 | .name = "i2c_sda", |
| 240 | .start = 20, |
| 241 | .end = 20, |
| 242 | .flags = IORESOURCE_IO, |
| 243 | }, |
| 244 | }; |
| 245 | |
| 246 | struct platform_device apq8064_device_qup_i2c_gsbi1 = { |
| 247 | .name = "qup_i2c", |
| 248 | .id = 0, |
| 249 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi1), |
| 250 | .resource = resources_qup_i2c_gsbi1, |
| 251 | }; |
| 252 | |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 253 | struct platform_device apq8064_device_qup_i2c_gsbi3 = { |
| 254 | .name = "qup_i2c", |
| 255 | .id = 3, |
| 256 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi3), |
| 257 | .resource = resources_qup_i2c_gsbi3, |
| 258 | }; |
| 259 | |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 260 | static struct resource resources_qup_i2c_gsbi4[] = { |
| 261 | { |
| 262 | .name = "gsbi_qup_i2c_addr", |
| 263 | .start = MSM_GSBI4_PHYS, |
Harini Jayaraman | e1554a9 | 2011-09-15 14:43:02 -0600 | [diff] [blame] | 264 | .end = MSM_GSBI4_PHYS + 4 - 1, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 265 | .flags = IORESOURCE_MEM, |
| 266 | }, |
| 267 | { |
| 268 | .name = "qup_phys_addr", |
| 269 | .start = MSM_GSBI4_QUP_PHYS, |
Harini Jayaraman | e1554a9 | 2011-09-15 14:43:02 -0600 | [diff] [blame] | 270 | .end = MSM_GSBI4_QUP_PHYS + MSM_QUP_SIZE - 1, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 271 | .flags = IORESOURCE_MEM, |
| 272 | }, |
| 273 | { |
| 274 | .name = "qup_err_intr", |
| 275 | .start = GSBI4_QUP_IRQ, |
| 276 | .end = GSBI4_QUP_IRQ, |
| 277 | .flags = IORESOURCE_IRQ, |
| 278 | }, |
Kevin Chan | d07220e | 2012-02-13 15:52:22 -0800 | [diff] [blame] | 279 | { |
| 280 | .name = "i2c_clk", |
| 281 | .start = 11, |
| 282 | .end = 11, |
| 283 | .flags = IORESOURCE_IO, |
| 284 | }, |
| 285 | { |
| 286 | .name = "i2c_sda", |
| 287 | .start = 10, |
| 288 | .end = 10, |
| 289 | .flags = IORESOURCE_IO, |
| 290 | }, |
Kenneth Heitke | 748593a | 2011-07-15 15:45:11 -0600 | [diff] [blame] | 291 | }; |
| 292 | |
| 293 | struct platform_device apq8064_device_qup_i2c_gsbi4 = { |
| 294 | .name = "qup_i2c", |
| 295 | .id = 4, |
| 296 | .num_resources = ARRAY_SIZE(resources_qup_i2c_gsbi4), |
| 297 | .resource = resources_qup_i2c_gsbi4, |
| 298 | }; |
| 299 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 300 | static struct resource resources_qup_spi_gsbi5[] = { |
| 301 | { |
| 302 | .name = "spi_base", |
| 303 | .start = MSM_GSBI5_QUP_PHYS, |
| 304 | .end = MSM_GSBI5_QUP_PHYS + SZ_4K - 1, |
| 305 | .flags = IORESOURCE_MEM, |
| 306 | }, |
| 307 | { |
| 308 | .name = "gsbi_base", |
| 309 | .start = MSM_GSBI5_PHYS, |
| 310 | .end = MSM_GSBI5_PHYS + 4 - 1, |
| 311 | .flags = IORESOURCE_MEM, |
| 312 | }, |
| 313 | { |
| 314 | .name = "spi_irq_in", |
| 315 | .start = GSBI5_QUP_IRQ, |
| 316 | .end = GSBI5_QUP_IRQ, |
| 317 | .flags = IORESOURCE_IRQ, |
| 318 | }, |
| 319 | }; |
| 320 | |
| 321 | struct platform_device apq8064_device_qup_spi_gsbi5 = { |
| 322 | .name = "spi_qsd", |
| 323 | .id = 0, |
| 324 | .num_resources = ARRAY_SIZE(resources_qup_spi_gsbi5), |
| 325 | .resource = resources_qup_spi_gsbi5, |
| 326 | }; |
| 327 | |
Jin Hong | 4bbbfba | 2012-02-02 21:48:07 -0800 | [diff] [blame] | 328 | static struct resource resources_uart_gsbi7[] = { |
| 329 | { |
| 330 | .start = GSBI7_UARTDM_IRQ, |
| 331 | .end = GSBI7_UARTDM_IRQ, |
| 332 | .flags = IORESOURCE_IRQ, |
| 333 | }, |
| 334 | { |
| 335 | .start = MSM_UART7DM_PHYS, |
| 336 | .end = MSM_UART7DM_PHYS + PAGE_SIZE - 1, |
| 337 | .name = "uartdm_resource", |
| 338 | .flags = IORESOURCE_MEM, |
| 339 | }, |
| 340 | { |
| 341 | .start = MSM_GSBI7_PHYS, |
| 342 | .end = MSM_GSBI7_PHYS + PAGE_SIZE - 1, |
| 343 | .name = "gsbi_resource", |
| 344 | .flags = IORESOURCE_MEM, |
| 345 | }, |
| 346 | }; |
| 347 | |
| 348 | struct platform_device apq8064_device_uart_gsbi7 = { |
| 349 | .name = "msm_serial_hsl", |
| 350 | .id = 0, |
| 351 | .num_resources = ARRAY_SIZE(resources_uart_gsbi7), |
| 352 | .resource = resources_uart_gsbi7, |
| 353 | }; |
| 354 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 355 | struct platform_device apq_pcm = { |
| 356 | .name = "msm-pcm-dsp", |
| 357 | .id = -1, |
| 358 | }; |
| 359 | |
| 360 | struct platform_device apq_pcm_routing = { |
| 361 | .name = "msm-pcm-routing", |
| 362 | .id = -1, |
| 363 | }; |
| 364 | |
| 365 | struct platform_device apq_cpudai0 = { |
| 366 | .name = "msm-dai-q6", |
| 367 | .id = 0x4000, |
| 368 | }; |
| 369 | |
| 370 | struct platform_device apq_cpudai1 = { |
| 371 | .name = "msm-dai-q6", |
| 372 | .id = 0x4001, |
| 373 | }; |
| 374 | |
| 375 | struct platform_device apq_cpudai_hdmi_rx = { |
Swaminathan Sathappan | fd9dbad | 2012-02-15 16:56:44 -0800 | [diff] [blame] | 376 | .name = "msm-dai-q6-hdmi", |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 377 | .id = 8, |
| 378 | }; |
| 379 | |
| 380 | struct platform_device apq_cpudai_bt_rx = { |
| 381 | .name = "msm-dai-q6", |
| 382 | .id = 0x3000, |
| 383 | }; |
| 384 | |
| 385 | struct platform_device apq_cpudai_bt_tx = { |
| 386 | .name = "msm-dai-q6", |
| 387 | .id = 0x3001, |
| 388 | }; |
| 389 | |
| 390 | struct platform_device apq_cpudai_fm_rx = { |
| 391 | .name = "msm-dai-q6", |
| 392 | .id = 0x3004, |
| 393 | }; |
| 394 | |
| 395 | struct platform_device apq_cpudai_fm_tx = { |
| 396 | .name = "msm-dai-q6", |
| 397 | .id = 0x3005, |
| 398 | }; |
| 399 | |
| 400 | /* |
| 401 | * Machine specific data for AUX PCM Interface |
| 402 | * which the driver will be unware of. |
| 403 | */ |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 404 | struct msm_dai_auxpcm_pdata apq_auxpcm_pdata = { |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 405 | .clk = "pcm_clk", |
| 406 | .mode = AFE_PCM_CFG_MODE_PCM, |
| 407 | .sync = AFE_PCM_CFG_SYNC_INT, |
| 408 | .frame = AFE_PCM_CFG_FRM_256BPF, |
| 409 | .quant = AFE_PCM_CFG_QUANT_LINEAR_NOPAD, |
| 410 | .slot = 0, |
| 411 | .data = AFE_PCM_CFG_CDATAOE_MASTER, |
| 412 | .pcm_clk_rate = 2048000, |
| 413 | }; |
| 414 | |
| 415 | struct platform_device apq_cpudai_auxpcm_rx = { |
| 416 | .name = "msm-dai-q6", |
| 417 | .id = 2, |
| 418 | .dev = { |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 419 | .platform_data = &apq_auxpcm_pdata, |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 420 | }, |
| 421 | }; |
| 422 | |
| 423 | struct platform_device apq_cpudai_auxpcm_tx = { |
| 424 | .name = "msm-dai-q6", |
| 425 | .id = 3, |
Kiran Kandi | 5f4ab69 | 2012-02-23 11:23:56 -0800 | [diff] [blame] | 426 | .dev = { |
| 427 | .platform_data = &apq_auxpcm_pdata, |
| 428 | }, |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 429 | }; |
| 430 | |
| 431 | struct platform_device apq_cpu_fe = { |
| 432 | .name = "msm-dai-fe", |
| 433 | .id = -1, |
| 434 | }; |
| 435 | |
| 436 | struct platform_device apq_stub_codec = { |
| 437 | .name = "msm-stub-codec", |
| 438 | .id = 1, |
| 439 | }; |
| 440 | |
| 441 | struct platform_device apq_voice = { |
| 442 | .name = "msm-pcm-voice", |
| 443 | .id = -1, |
| 444 | }; |
| 445 | |
| 446 | struct platform_device apq_voip = { |
| 447 | .name = "msm-voip-dsp", |
| 448 | .id = -1, |
| 449 | }; |
| 450 | |
| 451 | struct platform_device apq_lpa_pcm = { |
| 452 | .name = "msm-pcm-lpa", |
| 453 | .id = -1, |
| 454 | }; |
| 455 | |
Krishnankutty Kolathappilly | 4374e33 | 2012-03-18 22:27:30 -0700 | [diff] [blame^] | 456 | struct platform_device apq_compr_dsp = { |
| 457 | .name = "msm-compr-dsp", |
| 458 | .id = -1, |
| 459 | }; |
| 460 | |
| 461 | struct platform_device apq_multi_ch_pcm = { |
| 462 | .name = "msm-multi-ch-pcm-dsp", |
| 463 | .id = -1, |
| 464 | }; |
| 465 | |
Bharath Ramachandramurthy | b8e797f | 2011-11-30 12:08:42 -0800 | [diff] [blame] | 466 | struct platform_device apq_pcm_hostless = { |
| 467 | .name = "msm-pcm-hostless", |
| 468 | .id = -1, |
| 469 | }; |
| 470 | |
| 471 | struct platform_device apq_cpudai_afe_01_rx = { |
| 472 | .name = "msm-dai-q6", |
| 473 | .id = 0xE0, |
| 474 | }; |
| 475 | |
| 476 | struct platform_device apq_cpudai_afe_01_tx = { |
| 477 | .name = "msm-dai-q6", |
| 478 | .id = 0xF0, |
| 479 | }; |
| 480 | |
| 481 | struct platform_device apq_cpudai_afe_02_rx = { |
| 482 | .name = "msm-dai-q6", |
| 483 | .id = 0xF1, |
| 484 | }; |
| 485 | |
| 486 | struct platform_device apq_cpudai_afe_02_tx = { |
| 487 | .name = "msm-dai-q6", |
| 488 | .id = 0xE1, |
| 489 | }; |
| 490 | |
| 491 | struct platform_device apq_pcm_afe = { |
| 492 | .name = "msm-pcm-afe", |
| 493 | .id = -1, |
| 494 | }; |
| 495 | |
Neema Shetty | 8427c26 | 2012-02-16 11:23:43 -0800 | [diff] [blame] | 496 | struct platform_device apq_cpudai_stub = { |
| 497 | .name = "msm-dai-stub", |
| 498 | .id = -1, |
| 499 | }; |
| 500 | |
Neema Shetty | 3c9d286 | 2012-03-11 01:25:32 -0800 | [diff] [blame] | 501 | struct platform_device apq_cpudai_slimbus_1_rx = { |
| 502 | .name = "msm-dai-q6", |
| 503 | .id = 0x4002, |
| 504 | }; |
| 505 | |
| 506 | struct platform_device apq_cpudai_slimbus_1_tx = { |
| 507 | .name = "msm-dai-q6", |
| 508 | .id = 0x4003, |
| 509 | }; |
| 510 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 511 | static struct resource resources_ssbi_pmic1[] = { |
| 512 | { |
| 513 | .start = MSM_PMIC1_SSBI_CMD_PHYS, |
| 514 | .end = MSM_PMIC1_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 515 | .flags = IORESOURCE_MEM, |
| 516 | }, |
| 517 | }; |
| 518 | |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 519 | #define LPASS_SLIMBUS_PHYS 0x28080000 |
| 520 | #define LPASS_SLIMBUS_BAM_PHYS 0x28084000 |
Swaminathan Sathappan | 2316e08 | 2012-02-03 14:07:17 -0800 | [diff] [blame] | 521 | #define LPASS_SLIMBUS_SLEW (MSM8960_TLMM_PHYS + 0x207C) |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 522 | /* Board info for the slimbus slave device */ |
| 523 | static struct resource slimbus_res[] = { |
| 524 | { |
| 525 | .start = LPASS_SLIMBUS_PHYS, |
| 526 | .end = LPASS_SLIMBUS_PHYS + 8191, |
| 527 | .flags = IORESOURCE_MEM, |
| 528 | .name = "slimbus_physical", |
| 529 | }, |
| 530 | { |
| 531 | .start = LPASS_SLIMBUS_BAM_PHYS, |
| 532 | .end = LPASS_SLIMBUS_BAM_PHYS + 8191, |
| 533 | .flags = IORESOURCE_MEM, |
| 534 | .name = "slimbus_bam_physical", |
| 535 | }, |
| 536 | { |
Swaminathan Sathappan | 2316e08 | 2012-02-03 14:07:17 -0800 | [diff] [blame] | 537 | .start = LPASS_SLIMBUS_SLEW, |
| 538 | .end = LPASS_SLIMBUS_SLEW + 4 - 1, |
| 539 | .flags = IORESOURCE_MEM, |
| 540 | .name = "slimbus_slew_reg", |
| 541 | }, |
| 542 | { |
Sagar Dharia | 8bdcdaf | 2011-09-16 16:01:15 -0600 | [diff] [blame] | 543 | .start = SLIMBUS0_CORE_EE1_IRQ, |
| 544 | .end = SLIMBUS0_CORE_EE1_IRQ, |
| 545 | .flags = IORESOURCE_IRQ, |
| 546 | .name = "slimbus_irq", |
| 547 | }, |
| 548 | { |
| 549 | .start = SLIMBUS0_BAM_EE1_IRQ, |
| 550 | .end = SLIMBUS0_BAM_EE1_IRQ, |
| 551 | .flags = IORESOURCE_IRQ, |
| 552 | .name = "slimbus_bam_irq", |
| 553 | }, |
| 554 | }; |
| 555 | |
| 556 | struct platform_device apq8064_slim_ctrl = { |
| 557 | .name = "msm_slim_ctrl", |
| 558 | .id = 1, |
| 559 | .num_resources = ARRAY_SIZE(slimbus_res), |
| 560 | .resource = slimbus_res, |
| 561 | .dev = { |
| 562 | .coherent_dma_mask = 0xffffffffULL, |
| 563 | }, |
| 564 | }; |
| 565 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 566 | struct platform_device apq8064_device_ssbi_pmic1 = { |
| 567 | .name = "msm_ssbi", |
| 568 | .id = 0, |
| 569 | .resource = resources_ssbi_pmic1, |
| 570 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic1), |
| 571 | }; |
| 572 | |
| 573 | static struct resource resources_ssbi_pmic2[] = { |
| 574 | { |
| 575 | .start = MSM_PMIC2_SSBI_CMD_PHYS, |
| 576 | .end = MSM_PMIC2_SSBI_CMD_PHYS + MSM_PMIC_SSBI_SIZE - 1, |
| 577 | .flags = IORESOURCE_MEM, |
| 578 | }, |
| 579 | }; |
| 580 | |
| 581 | struct platform_device apq8064_device_ssbi_pmic2 = { |
| 582 | .name = "msm_ssbi", |
| 583 | .id = 1, |
| 584 | .resource = resources_ssbi_pmic2, |
| 585 | .num_resources = ARRAY_SIZE(resources_ssbi_pmic2), |
| 586 | }; |
| 587 | |
| 588 | static struct resource resources_otg[] = { |
| 589 | { |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 590 | .start = MSM_HSUSB1_PHYS, |
| 591 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 592 | .flags = IORESOURCE_MEM, |
| 593 | }, |
| 594 | { |
| 595 | .start = USB1_HS_IRQ, |
| 596 | .end = USB1_HS_IRQ, |
| 597 | .flags = IORESOURCE_IRQ, |
| 598 | }, |
| 599 | }; |
| 600 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 601 | struct platform_device apq8064_device_otg = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 602 | .name = "msm_otg", |
| 603 | .id = -1, |
| 604 | .num_resources = ARRAY_SIZE(resources_otg), |
| 605 | .resource = resources_otg, |
| 606 | .dev = { |
| 607 | .coherent_dma_mask = 0xffffffff, |
| 608 | }, |
| 609 | }; |
| 610 | |
| 611 | static struct resource resources_hsusb[] = { |
| 612 | { |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 613 | .start = MSM_HSUSB1_PHYS, |
| 614 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 615 | .flags = IORESOURCE_MEM, |
| 616 | }, |
| 617 | { |
| 618 | .start = USB1_HS_IRQ, |
| 619 | .end = USB1_HS_IRQ, |
| 620 | .flags = IORESOURCE_IRQ, |
| 621 | }, |
| 622 | }; |
| 623 | |
Stepan Moskovchenko | 14aa649 | 2011-08-08 15:15:01 -0700 | [diff] [blame] | 624 | struct platform_device apq8064_device_gadget_peripheral = { |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 625 | .name = "msm_hsusb", |
| 626 | .id = -1, |
| 627 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 628 | .resource = resources_hsusb, |
| 629 | .dev = { |
| 630 | .coherent_dma_mask = 0xffffffff, |
| 631 | }, |
| 632 | }; |
| 633 | |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 634 | static struct resource resources_hsusb_host[] = { |
| 635 | { |
| 636 | .start = MSM_HSUSB1_PHYS, |
| 637 | .end = MSM_HSUSB1_PHYS + MSM_HSUSB1_SIZE - 1, |
| 638 | .flags = IORESOURCE_MEM, |
| 639 | }, |
| 640 | { |
| 641 | .start = USB1_HS_IRQ, |
| 642 | .end = USB1_HS_IRQ, |
| 643 | .flags = IORESOURCE_IRQ, |
| 644 | }, |
| 645 | }; |
| 646 | |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 647 | static struct resource resources_hsic_host[] = { |
| 648 | { |
| 649 | .start = 0x12510000, |
| 650 | .end = 0x12510000 + SZ_4K - 1, |
| 651 | .flags = IORESOURCE_MEM, |
| 652 | }, |
| 653 | { |
| 654 | .start = USB2_HSIC_IRQ, |
| 655 | .end = USB2_HSIC_IRQ, |
| 656 | .flags = IORESOURCE_IRQ, |
| 657 | }, |
| 658 | { |
| 659 | .start = MSM_GPIO_TO_INT(49), |
| 660 | .end = MSM_GPIO_TO_INT(49), |
| 661 | .name = "peripheral_status_irq", |
| 662 | .flags = IORESOURCE_IRQ, |
| 663 | }, |
Vamsi Krishna | 6921cbe | 2012-02-21 18:34:43 -0800 | [diff] [blame] | 664 | { |
| 665 | .start = MSM_GPIO_TO_INT(88), |
| 666 | .end = MSM_GPIO_TO_INT(88), |
| 667 | .name = "wakeup_irq", |
| 668 | .flags = IORESOURCE_IRQ, |
| 669 | }, |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 670 | }; |
| 671 | |
Hemant Kumar | d86c488 | 2012-01-24 19:39:37 -0800 | [diff] [blame] | 672 | static u64 dma_mask = DMA_BIT_MASK(32); |
| 673 | struct platform_device apq8064_device_hsusb_host = { |
| 674 | .name = "msm_hsusb_host", |
| 675 | .id = -1, |
| 676 | .num_resources = ARRAY_SIZE(resources_hsusb_host), |
| 677 | .resource = resources_hsusb_host, |
| 678 | .dev = { |
| 679 | .dma_mask = &dma_mask, |
| 680 | .coherent_dma_mask = 0xffffffff, |
| 681 | }, |
| 682 | }; |
| 683 | |
Hemant Kumar | a945b47 | 2012-01-25 15:08:06 -0800 | [diff] [blame] | 684 | struct platform_device apq8064_device_hsic_host = { |
| 685 | .name = "msm_hsic_host", |
| 686 | .id = -1, |
| 687 | .num_resources = ARRAY_SIZE(resources_hsic_host), |
| 688 | .resource = resources_hsic_host, |
| 689 | .dev = { |
| 690 | .dma_mask = &dma_mask, |
| 691 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 692 | }, |
| 693 | }; |
| 694 | |
Manu Gautam | 91223e0 | 2011-11-08 15:27:22 +0530 | [diff] [blame] | 695 | static struct resource resources_ehci_host3[] = { |
| 696 | { |
| 697 | .start = MSM_HSUSB3_PHYS, |
| 698 | .end = MSM_HSUSB3_PHYS + MSM_HSUSB3_SIZE - 1, |
| 699 | .flags = IORESOURCE_MEM, |
| 700 | }, |
| 701 | { |
| 702 | .start = USB3_HS_IRQ, |
| 703 | .end = USB3_HS_IRQ, |
| 704 | .flags = IORESOURCE_IRQ, |
| 705 | }, |
| 706 | }; |
| 707 | |
| 708 | struct platform_device apq8064_device_ehci_host3 = { |
| 709 | .name = "msm_ehci_host", |
| 710 | .id = 0, |
| 711 | .num_resources = ARRAY_SIZE(resources_ehci_host3), |
| 712 | .resource = resources_ehci_host3, |
| 713 | .dev = { |
| 714 | .dma_mask = &dma_mask, |
| 715 | .coherent_dma_mask = 0xffffffff, |
| 716 | }, |
| 717 | }; |
| 718 | |
Hemant Kumar | 1d66e1c | 2012-02-13 15:24:59 -0800 | [diff] [blame] | 719 | static struct resource resources_ehci_host4[] = { |
| 720 | { |
| 721 | .start = MSM_HSUSB4_PHYS, |
| 722 | .end = MSM_HSUSB4_PHYS + MSM_HSUSB4_SIZE - 1, |
| 723 | .flags = IORESOURCE_MEM, |
| 724 | }, |
| 725 | { |
| 726 | .start = USB4_HS_IRQ, |
| 727 | .end = USB4_HS_IRQ, |
| 728 | .flags = IORESOURCE_IRQ, |
| 729 | }, |
| 730 | }; |
| 731 | |
| 732 | struct platform_device apq8064_device_ehci_host4 = { |
| 733 | .name = "msm_ehci_host", |
| 734 | .id = 1, |
| 735 | .num_resources = ARRAY_SIZE(resources_ehci_host4), |
| 736 | .resource = resources_ehci_host4, |
| 737 | .dev = { |
| 738 | .dma_mask = &dma_mask, |
| 739 | .coherent_dma_mask = 0xffffffff, |
| 740 | }, |
| 741 | }; |
| 742 | |
Mohan Kumar Gubbihalli Lachma Naik | 7f72edd | 2012-02-06 17:26:47 -0800 | [diff] [blame] | 743 | /* MSM Video core device */ |
| 744 | #ifdef CONFIG_MSM_BUS_SCALING |
| 745 | static struct msm_bus_vectors vidc_init_vectors[] = { |
| 746 | { |
| 747 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 748 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 749 | .ab = 0, |
| 750 | .ib = 0, |
| 751 | }, |
| 752 | { |
| 753 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 754 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 755 | .ab = 0, |
| 756 | .ib = 0, |
| 757 | }, |
| 758 | { |
| 759 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 760 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 761 | .ab = 0, |
| 762 | .ib = 0, |
| 763 | }, |
| 764 | { |
| 765 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 766 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 767 | .ab = 0, |
| 768 | .ib = 0, |
| 769 | }, |
| 770 | }; |
| 771 | static struct msm_bus_vectors vidc_venc_vga_vectors[] = { |
| 772 | { |
| 773 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 774 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 775 | .ab = 54525952, |
| 776 | .ib = 436207616, |
| 777 | }, |
| 778 | { |
| 779 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 780 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 781 | .ab = 72351744, |
| 782 | .ib = 289406976, |
| 783 | }, |
| 784 | { |
| 785 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 786 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 787 | .ab = 500000, |
| 788 | .ib = 1000000, |
| 789 | }, |
| 790 | { |
| 791 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 792 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 793 | .ab = 500000, |
| 794 | .ib = 1000000, |
| 795 | }, |
| 796 | }; |
| 797 | static struct msm_bus_vectors vidc_vdec_vga_vectors[] = { |
| 798 | { |
| 799 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 800 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 801 | .ab = 40894464, |
| 802 | .ib = 327155712, |
| 803 | }, |
| 804 | { |
| 805 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 806 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 807 | .ab = 48234496, |
| 808 | .ib = 192937984, |
| 809 | }, |
| 810 | { |
| 811 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 812 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 813 | .ab = 500000, |
| 814 | .ib = 2000000, |
| 815 | }, |
| 816 | { |
| 817 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 818 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 819 | .ab = 500000, |
| 820 | .ib = 2000000, |
| 821 | }, |
| 822 | }; |
| 823 | static struct msm_bus_vectors vidc_venc_720p_vectors[] = { |
| 824 | { |
| 825 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 826 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 827 | .ab = 163577856, |
| 828 | .ib = 1308622848, |
| 829 | }, |
| 830 | { |
| 831 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 832 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 833 | .ab = 219152384, |
| 834 | .ib = 876609536, |
| 835 | }, |
| 836 | { |
| 837 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 838 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 839 | .ab = 1750000, |
| 840 | .ib = 3500000, |
| 841 | }, |
| 842 | { |
| 843 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 844 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 845 | .ab = 1750000, |
| 846 | .ib = 3500000, |
| 847 | }, |
| 848 | }; |
| 849 | static struct msm_bus_vectors vidc_vdec_720p_vectors[] = { |
| 850 | { |
| 851 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 852 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 853 | .ab = 121634816, |
| 854 | .ib = 973078528, |
| 855 | }, |
| 856 | { |
| 857 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 858 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 859 | .ab = 155189248, |
| 860 | .ib = 620756992, |
| 861 | }, |
| 862 | { |
| 863 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 864 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 865 | .ab = 1750000, |
| 866 | .ib = 7000000, |
| 867 | }, |
| 868 | { |
| 869 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 870 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 871 | .ab = 1750000, |
| 872 | .ib = 7000000, |
| 873 | }, |
| 874 | }; |
| 875 | static struct msm_bus_vectors vidc_venc_1080p_vectors[] = { |
| 876 | { |
| 877 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 878 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 879 | .ab = 372244480, |
| 880 | .ib = 2560000000U, |
| 881 | }, |
| 882 | { |
| 883 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 884 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 885 | .ab = 501219328, |
| 886 | .ib = 2560000000U, |
| 887 | }, |
| 888 | { |
| 889 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 890 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 891 | .ab = 2500000, |
| 892 | .ib = 5000000, |
| 893 | }, |
| 894 | { |
| 895 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 896 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 897 | .ab = 2500000, |
| 898 | .ib = 5000000, |
| 899 | }, |
| 900 | }; |
| 901 | static struct msm_bus_vectors vidc_vdec_1080p_vectors[] = { |
| 902 | { |
| 903 | .src = MSM_BUS_MASTER_VIDEO_ENC, |
| 904 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 905 | .ab = 222298112, |
| 906 | .ib = 2560000000U, |
| 907 | }, |
| 908 | { |
| 909 | .src = MSM_BUS_MASTER_VIDEO_DEC, |
| 910 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 911 | .ab = 330301440, |
| 912 | .ib = 2560000000U, |
| 913 | }, |
| 914 | { |
| 915 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 916 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 917 | .ab = 2500000, |
| 918 | .ib = 700000000, |
| 919 | }, |
| 920 | { |
| 921 | .src = MSM_BUS_MASTER_AMPSS_M0, |
| 922 | .dst = MSM_BUS_SLAVE_EBI_CH0, |
| 923 | .ab = 2500000, |
| 924 | .ib = 10000000, |
| 925 | }, |
| 926 | }; |
| 927 | |
| 928 | static struct msm_bus_paths vidc_bus_client_config[] = { |
| 929 | { |
| 930 | ARRAY_SIZE(vidc_init_vectors), |
| 931 | vidc_init_vectors, |
| 932 | }, |
| 933 | { |
| 934 | ARRAY_SIZE(vidc_venc_vga_vectors), |
| 935 | vidc_venc_vga_vectors, |
| 936 | }, |
| 937 | { |
| 938 | ARRAY_SIZE(vidc_vdec_vga_vectors), |
| 939 | vidc_vdec_vga_vectors, |
| 940 | }, |
| 941 | { |
| 942 | ARRAY_SIZE(vidc_venc_720p_vectors), |
| 943 | vidc_venc_720p_vectors, |
| 944 | }, |
| 945 | { |
| 946 | ARRAY_SIZE(vidc_vdec_720p_vectors), |
| 947 | vidc_vdec_720p_vectors, |
| 948 | }, |
| 949 | { |
| 950 | ARRAY_SIZE(vidc_venc_1080p_vectors), |
| 951 | vidc_venc_1080p_vectors, |
| 952 | }, |
| 953 | { |
| 954 | ARRAY_SIZE(vidc_vdec_1080p_vectors), |
| 955 | vidc_vdec_1080p_vectors, |
| 956 | }, |
| 957 | }; |
| 958 | |
| 959 | static struct msm_bus_scale_pdata vidc_bus_client_data = { |
| 960 | vidc_bus_client_config, |
| 961 | ARRAY_SIZE(vidc_bus_client_config), |
| 962 | .name = "vidc", |
| 963 | }; |
| 964 | #endif |
| 965 | |
| 966 | |
| 967 | #define APQ8064_VIDC_BASE_PHYS 0x04400000 |
| 968 | #define APQ8064_VIDC_BASE_SIZE 0x00100000 |
| 969 | |
| 970 | static struct resource apq8064_device_vidc_resources[] = { |
| 971 | { |
| 972 | .start = APQ8064_VIDC_BASE_PHYS, |
| 973 | .end = APQ8064_VIDC_BASE_PHYS + APQ8064_VIDC_BASE_SIZE - 1, |
| 974 | .flags = IORESOURCE_MEM, |
| 975 | }, |
| 976 | { |
| 977 | .start = VCODEC_IRQ, |
| 978 | .end = VCODEC_IRQ, |
| 979 | .flags = IORESOURCE_IRQ, |
| 980 | }, |
| 981 | }; |
| 982 | |
| 983 | struct msm_vidc_platform_data apq8064_vidc_platform_data = { |
| 984 | #ifdef CONFIG_MSM_BUS_SCALING |
| 985 | .vidc_bus_client_pdata = &vidc_bus_client_data, |
| 986 | #endif |
| 987 | #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION |
| 988 | .memtype = ION_CP_MM_HEAP_ID, |
| 989 | .enable_ion = 1, |
| 990 | #else |
| 991 | .memtype = MEMTYPE_EBI1, |
| 992 | .enable_ion = 0, |
| 993 | #endif |
| 994 | .disable_dmx = 0, |
| 995 | .disable_fullhd = 0, |
| 996 | }; |
| 997 | |
| 998 | struct platform_device apq8064_msm_device_vidc = { |
| 999 | .name = "msm_vidc", |
| 1000 | .id = 0, |
| 1001 | .num_resources = ARRAY_SIZE(apq8064_device_vidc_resources), |
| 1002 | .resource = apq8064_device_vidc_resources, |
| 1003 | .dev = { |
| 1004 | .platform_data = &apq8064_vidc_platform_data, |
| 1005 | }, |
| 1006 | }; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1007 | #define MSM_SDC1_BASE 0x12400000 |
| 1008 | #define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800) |
| 1009 | #define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000) |
| 1010 | #define MSM_SDC2_BASE 0x12140000 |
| 1011 | #define MSM_SDC2_DML_BASE (MSM_SDC2_BASE + 0x800) |
| 1012 | #define MSM_SDC2_BAM_BASE (MSM_SDC2_BASE + 0x2000) |
| 1013 | #define MSM_SDC3_BASE 0x12180000 |
| 1014 | #define MSM_SDC3_DML_BASE (MSM_SDC3_BASE + 0x800) |
| 1015 | #define MSM_SDC3_BAM_BASE (MSM_SDC3_BASE + 0x2000) |
| 1016 | #define MSM_SDC4_BASE 0x121C0000 |
| 1017 | #define MSM_SDC4_DML_BASE (MSM_SDC4_BASE + 0x800) |
| 1018 | #define MSM_SDC4_BAM_BASE (MSM_SDC4_BASE + 0x2000) |
| 1019 | |
| 1020 | static struct resource resources_sdc1[] = { |
| 1021 | { |
| 1022 | .name = "core_mem", |
| 1023 | .flags = IORESOURCE_MEM, |
| 1024 | .start = MSM_SDC1_BASE, |
| 1025 | .end = MSM_SDC1_DML_BASE - 1, |
| 1026 | }, |
| 1027 | { |
| 1028 | .name = "core_irq", |
| 1029 | .flags = IORESOURCE_IRQ, |
| 1030 | .start = SDC1_IRQ_0, |
| 1031 | .end = SDC1_IRQ_0 |
| 1032 | }, |
| 1033 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1034 | { |
| 1035 | .name = "sdcc_dml_addr", |
| 1036 | .start = MSM_SDC1_DML_BASE, |
| 1037 | .end = MSM_SDC1_BAM_BASE - 1, |
| 1038 | .flags = IORESOURCE_MEM, |
| 1039 | }, |
| 1040 | { |
| 1041 | .name = "sdcc_bam_addr", |
| 1042 | .start = MSM_SDC1_BAM_BASE, |
| 1043 | .end = MSM_SDC1_BAM_BASE + (2 * SZ_4K) - 1, |
| 1044 | .flags = IORESOURCE_MEM, |
| 1045 | }, |
| 1046 | { |
| 1047 | .name = "sdcc_bam_irq", |
| 1048 | .start = SDC1_BAM_IRQ, |
| 1049 | .end = SDC1_BAM_IRQ, |
| 1050 | .flags = IORESOURCE_IRQ, |
| 1051 | }, |
| 1052 | #endif |
| 1053 | }; |
| 1054 | |
| 1055 | static struct resource resources_sdc2[] = { |
| 1056 | { |
| 1057 | .name = "core_mem", |
| 1058 | .flags = IORESOURCE_MEM, |
| 1059 | .start = MSM_SDC2_BASE, |
| 1060 | .end = MSM_SDC2_DML_BASE - 1, |
| 1061 | }, |
| 1062 | { |
| 1063 | .name = "core_irq", |
| 1064 | .flags = IORESOURCE_IRQ, |
| 1065 | .start = SDC2_IRQ_0, |
| 1066 | .end = SDC2_IRQ_0 |
| 1067 | }, |
| 1068 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1069 | { |
| 1070 | .name = "sdcc_dml_addr", |
| 1071 | .start = MSM_SDC2_DML_BASE, |
| 1072 | .end = MSM_SDC2_BAM_BASE - 1, |
| 1073 | .flags = IORESOURCE_MEM, |
| 1074 | }, |
| 1075 | { |
| 1076 | .name = "sdcc_bam_addr", |
| 1077 | .start = MSM_SDC2_BAM_BASE, |
| 1078 | .end = MSM_SDC2_BAM_BASE + (2 * SZ_4K) - 1, |
| 1079 | .flags = IORESOURCE_MEM, |
| 1080 | }, |
| 1081 | { |
| 1082 | .name = "sdcc_bam_irq", |
| 1083 | .start = SDC2_BAM_IRQ, |
| 1084 | .end = SDC2_BAM_IRQ, |
| 1085 | .flags = IORESOURCE_IRQ, |
| 1086 | }, |
| 1087 | #endif |
| 1088 | }; |
| 1089 | |
| 1090 | static struct resource resources_sdc3[] = { |
| 1091 | { |
| 1092 | .name = "core_mem", |
| 1093 | .flags = IORESOURCE_MEM, |
| 1094 | .start = MSM_SDC3_BASE, |
| 1095 | .end = MSM_SDC3_DML_BASE - 1, |
| 1096 | }, |
| 1097 | { |
| 1098 | .name = "core_irq", |
| 1099 | .flags = IORESOURCE_IRQ, |
| 1100 | .start = SDC3_IRQ_0, |
| 1101 | .end = SDC3_IRQ_0 |
| 1102 | }, |
| 1103 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1104 | { |
| 1105 | .name = "sdcc_dml_addr", |
| 1106 | .start = MSM_SDC3_DML_BASE, |
| 1107 | .end = MSM_SDC3_BAM_BASE - 1, |
| 1108 | .flags = IORESOURCE_MEM, |
| 1109 | }, |
| 1110 | { |
| 1111 | .name = "sdcc_bam_addr", |
| 1112 | .start = MSM_SDC3_BAM_BASE, |
| 1113 | .end = MSM_SDC3_BAM_BASE + (2 * SZ_4K) - 1, |
| 1114 | .flags = IORESOURCE_MEM, |
| 1115 | }, |
| 1116 | { |
| 1117 | .name = "sdcc_bam_irq", |
| 1118 | .start = SDC3_BAM_IRQ, |
| 1119 | .end = SDC3_BAM_IRQ, |
| 1120 | .flags = IORESOURCE_IRQ, |
| 1121 | }, |
| 1122 | #endif |
| 1123 | }; |
| 1124 | |
| 1125 | static struct resource resources_sdc4[] = { |
| 1126 | { |
| 1127 | .name = "core_mem", |
| 1128 | .flags = IORESOURCE_MEM, |
| 1129 | .start = MSM_SDC4_BASE, |
| 1130 | .end = MSM_SDC4_DML_BASE - 1, |
| 1131 | }, |
| 1132 | { |
| 1133 | .name = "core_irq", |
| 1134 | .flags = IORESOURCE_IRQ, |
| 1135 | .start = SDC4_IRQ_0, |
| 1136 | .end = SDC4_IRQ_0 |
| 1137 | }, |
| 1138 | #ifdef CONFIG_MMC_MSM_SPS_SUPPORT |
| 1139 | { |
| 1140 | .name = "sdcc_dml_addr", |
| 1141 | .start = MSM_SDC4_DML_BASE, |
| 1142 | .end = MSM_SDC4_BAM_BASE - 1, |
| 1143 | .flags = IORESOURCE_MEM, |
| 1144 | }, |
| 1145 | { |
| 1146 | .name = "sdcc_bam_addr", |
| 1147 | .start = MSM_SDC4_BAM_BASE, |
| 1148 | .end = MSM_SDC4_BAM_BASE + (2 * SZ_4K) - 1, |
| 1149 | .flags = IORESOURCE_MEM, |
| 1150 | }, |
| 1151 | { |
| 1152 | .name = "sdcc_bam_irq", |
| 1153 | .start = SDC4_BAM_IRQ, |
| 1154 | .end = SDC4_BAM_IRQ, |
| 1155 | .flags = IORESOURCE_IRQ, |
| 1156 | }, |
| 1157 | #endif |
| 1158 | }; |
| 1159 | |
| 1160 | struct platform_device apq8064_device_sdc1 = { |
| 1161 | .name = "msm_sdcc", |
| 1162 | .id = 1, |
| 1163 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 1164 | .resource = resources_sdc1, |
| 1165 | .dev = { |
| 1166 | .coherent_dma_mask = 0xffffffff, |
| 1167 | }, |
| 1168 | }; |
| 1169 | |
| 1170 | struct platform_device apq8064_device_sdc2 = { |
| 1171 | .name = "msm_sdcc", |
| 1172 | .id = 2, |
| 1173 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 1174 | .resource = resources_sdc2, |
| 1175 | .dev = { |
| 1176 | .coherent_dma_mask = 0xffffffff, |
| 1177 | }, |
| 1178 | }; |
| 1179 | |
| 1180 | struct platform_device apq8064_device_sdc3 = { |
| 1181 | .name = "msm_sdcc", |
| 1182 | .id = 3, |
| 1183 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 1184 | .resource = resources_sdc3, |
| 1185 | .dev = { |
| 1186 | .coherent_dma_mask = 0xffffffff, |
| 1187 | }, |
| 1188 | }; |
| 1189 | |
| 1190 | struct platform_device apq8064_device_sdc4 = { |
| 1191 | .name = "msm_sdcc", |
| 1192 | .id = 4, |
| 1193 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 1194 | .resource = resources_sdc4, |
| 1195 | .dev = { |
| 1196 | .coherent_dma_mask = 0xffffffff, |
| 1197 | }, |
| 1198 | }; |
| 1199 | |
| 1200 | static struct platform_device *apq8064_sdcc_devices[] __initdata = { |
| 1201 | &apq8064_device_sdc1, |
| 1202 | &apq8064_device_sdc2, |
| 1203 | &apq8064_device_sdc3, |
| 1204 | &apq8064_device_sdc4, |
| 1205 | }; |
| 1206 | |
| 1207 | int __init apq8064_add_sdcc(unsigned int controller, |
| 1208 | struct mmc_platform_data *plat) |
| 1209 | { |
| 1210 | struct platform_device *pdev; |
| 1211 | |
| 1212 | if (!plat) |
| 1213 | return 0; |
| 1214 | if (controller < 1 || controller > 4) |
| 1215 | return -EINVAL; |
| 1216 | |
| 1217 | pdev = apq8064_sdcc_devices[controller-1]; |
| 1218 | pdev->dev.platform_data = plat; |
| 1219 | return platform_device_register(pdev); |
| 1220 | } |
| 1221 | |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 1222 | static struct resource resources_sps[] = { |
| 1223 | { |
| 1224 | .name = "pipe_mem", |
| 1225 | .start = 0x12800000, |
| 1226 | .end = 0x12800000 + 0x4000 - 1, |
| 1227 | .flags = IORESOURCE_MEM, |
| 1228 | }, |
| 1229 | { |
| 1230 | .name = "bamdma_dma", |
| 1231 | .start = 0x12240000, |
| 1232 | .end = 0x12240000 + 0x1000 - 1, |
| 1233 | .flags = IORESOURCE_MEM, |
| 1234 | }, |
| 1235 | { |
| 1236 | .name = "bamdma_bam", |
| 1237 | .start = 0x12244000, |
| 1238 | .end = 0x12244000 + 0x4000 - 1, |
| 1239 | .flags = IORESOURCE_MEM, |
| 1240 | }, |
| 1241 | { |
| 1242 | .name = "bamdma_irq", |
| 1243 | .start = SPS_BAM_DMA_IRQ, |
| 1244 | .end = SPS_BAM_DMA_IRQ, |
| 1245 | .flags = IORESOURCE_IRQ, |
| 1246 | }, |
| 1247 | }; |
| 1248 | |
Gagan Mac | 8a7a5d3 | 2011-11-11 16:43:06 -0700 | [diff] [blame] | 1249 | struct platform_device msm_bus_8064_sys_fabric = { |
| 1250 | .name = "msm_bus_fabric", |
| 1251 | .id = MSM_BUS_FAB_SYSTEM, |
| 1252 | }; |
| 1253 | struct platform_device msm_bus_8064_apps_fabric = { |
| 1254 | .name = "msm_bus_fabric", |
| 1255 | .id = MSM_BUS_FAB_APPSS, |
| 1256 | }; |
| 1257 | struct platform_device msm_bus_8064_mm_fabric = { |
| 1258 | .name = "msm_bus_fabric", |
| 1259 | .id = MSM_BUS_FAB_MMSS, |
| 1260 | }; |
| 1261 | struct platform_device msm_bus_8064_sys_fpb = { |
| 1262 | .name = "msm_bus_fabric", |
| 1263 | .id = MSM_BUS_FAB_SYSTEM_FPB, |
| 1264 | }; |
| 1265 | struct platform_device msm_bus_8064_cpss_fpb = { |
| 1266 | .name = "msm_bus_fabric", |
| 1267 | .id = MSM_BUS_FAB_CPSS_FPB, |
| 1268 | }; |
| 1269 | |
Yan He | 06913ce | 2011-08-26 16:33:46 -0700 | [diff] [blame] | 1270 | static struct msm_sps_platform_data msm_sps_pdata = { |
| 1271 | .bamdma_restricted_pipes = 0x06, |
| 1272 | }; |
| 1273 | |
| 1274 | struct platform_device msm_device_sps_apq8064 = { |
| 1275 | .name = "msm_sps", |
| 1276 | .id = -1, |
| 1277 | .num_resources = ARRAY_SIZE(resources_sps), |
| 1278 | .resource = resources_sps, |
| 1279 | .dev.platform_data = &msm_sps_pdata, |
| 1280 | }; |
| 1281 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1282 | static struct resource smd_resource[] = { |
| 1283 | { |
| 1284 | .name = "a9_m2a_0", |
| 1285 | .start = INT_A9_M2A_0, |
| 1286 | .flags = IORESOURCE_IRQ, |
| 1287 | }, |
| 1288 | { |
| 1289 | .name = "a9_m2a_5", |
| 1290 | .start = INT_A9_M2A_5, |
| 1291 | .flags = IORESOURCE_IRQ, |
| 1292 | }, |
| 1293 | { |
| 1294 | .name = "adsp_a11", |
| 1295 | .start = INT_ADSP_A11, |
| 1296 | .flags = IORESOURCE_IRQ, |
| 1297 | }, |
| 1298 | { |
| 1299 | .name = "adsp_a11_smsm", |
| 1300 | .start = INT_ADSP_A11_SMSM, |
| 1301 | .flags = IORESOURCE_IRQ, |
| 1302 | }, |
| 1303 | { |
| 1304 | .name = "dsps_a11", |
| 1305 | .start = INT_DSPS_A11, |
| 1306 | .flags = IORESOURCE_IRQ, |
| 1307 | }, |
| 1308 | { |
| 1309 | .name = "dsps_a11_smsm", |
| 1310 | .start = INT_DSPS_A11_SMSM, |
| 1311 | .flags = IORESOURCE_IRQ, |
| 1312 | }, |
| 1313 | { |
| 1314 | .name = "wcnss_a11", |
| 1315 | .start = INT_WCNSS_A11, |
| 1316 | .flags = IORESOURCE_IRQ, |
| 1317 | }, |
| 1318 | { |
| 1319 | .name = "wcnss_a11_smsm", |
| 1320 | .start = INT_WCNSS_A11_SMSM, |
| 1321 | .flags = IORESOURCE_IRQ, |
| 1322 | }, |
| 1323 | }; |
| 1324 | |
| 1325 | static struct smd_subsystem_config smd_config_list[] = { |
| 1326 | { |
| 1327 | .irq_config_id = SMD_MODEM, |
| 1328 | .subsys_name = "gss", |
| 1329 | .edge = SMD_APPS_MODEM, |
| 1330 | |
| 1331 | .smd_int.irq_name = "a9_m2a_0", |
| 1332 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1333 | .smd_int.irq_id = -1, |
| 1334 | .smd_int.device_name = "smd_dev", |
| 1335 | .smd_int.dev_id = 0, |
| 1336 | .smd_int.out_bit_pos = 1 << 3, |
| 1337 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1338 | .smd_int.out_offset = 0x8, |
| 1339 | |
| 1340 | .smsm_int.irq_name = "a9_m2a_5", |
| 1341 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1342 | .smsm_int.irq_id = -1, |
| 1343 | .smsm_int.device_name = "smd_smsm", |
| 1344 | .smsm_int.dev_id = 0, |
| 1345 | .smsm_int.out_bit_pos = 1 << 4, |
| 1346 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1347 | .smsm_int.out_offset = 0x8, |
| 1348 | }, |
| 1349 | { |
| 1350 | .irq_config_id = SMD_Q6, |
| 1351 | .subsys_name = "q6", |
| 1352 | .edge = SMD_APPS_QDSP, |
| 1353 | |
| 1354 | .smd_int.irq_name = "adsp_a11", |
| 1355 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1356 | .smd_int.irq_id = -1, |
| 1357 | .smd_int.device_name = "smd_dev", |
| 1358 | .smd_int.dev_id = 0, |
| 1359 | .smd_int.out_bit_pos = 1 << 15, |
| 1360 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1361 | .smd_int.out_offset = 0x8, |
| 1362 | |
| 1363 | .smsm_int.irq_name = "adsp_a11_smsm", |
| 1364 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1365 | .smsm_int.irq_id = -1, |
| 1366 | .smsm_int.device_name = "smd_smsm", |
| 1367 | .smsm_int.dev_id = 0, |
| 1368 | .smsm_int.out_bit_pos = 1 << 14, |
| 1369 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1370 | .smsm_int.out_offset = 0x8, |
| 1371 | }, |
| 1372 | { |
| 1373 | .irq_config_id = SMD_DSPS, |
| 1374 | .subsys_name = "dsps", |
| 1375 | .edge = SMD_APPS_DSPS, |
| 1376 | |
| 1377 | .smd_int.irq_name = "dsps_a11", |
| 1378 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1379 | .smd_int.irq_id = -1, |
| 1380 | .smd_int.device_name = "smd_dev", |
| 1381 | .smd_int.dev_id = 0, |
| 1382 | .smd_int.out_bit_pos = 1, |
| 1383 | .smd_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1384 | .smd_int.out_offset = 0x4080, |
| 1385 | |
| 1386 | .smsm_int.irq_name = "dsps_a11_smsm", |
| 1387 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1388 | .smsm_int.irq_id = -1, |
| 1389 | .smsm_int.device_name = "smd_smsm", |
| 1390 | .smsm_int.dev_id = 0, |
| 1391 | .smsm_int.out_bit_pos = 1, |
| 1392 | .smsm_int.out_base = (void __iomem *)MSM_SIC_NON_SECURE_BASE, |
| 1393 | .smsm_int.out_offset = 0x4094, |
| 1394 | }, |
| 1395 | { |
| 1396 | .irq_config_id = SMD_WCNSS, |
| 1397 | .subsys_name = "wcnss", |
| 1398 | .edge = SMD_APPS_WCNSS, |
| 1399 | |
| 1400 | .smd_int.irq_name = "wcnss_a11", |
| 1401 | .smd_int.flags = IRQF_TRIGGER_RISING, |
| 1402 | .smd_int.irq_id = -1, |
| 1403 | .smd_int.device_name = "smd_dev", |
| 1404 | .smd_int.dev_id = 0, |
| 1405 | .smd_int.out_bit_pos = 1 << 25, |
| 1406 | .smd_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1407 | .smd_int.out_offset = 0x8, |
| 1408 | |
| 1409 | .smsm_int.irq_name = "wcnss_a11_smsm", |
| 1410 | .smsm_int.flags = IRQF_TRIGGER_RISING, |
| 1411 | .smsm_int.irq_id = -1, |
| 1412 | .smsm_int.device_name = "smd_smsm", |
| 1413 | .smsm_int.dev_id = 0, |
| 1414 | .smsm_int.out_bit_pos = 1 << 23, |
| 1415 | .smsm_int.out_base = (void __iomem *)MSM_APCS_GCC_BASE, |
| 1416 | .smsm_int.out_offset = 0x8, |
| 1417 | }, |
| 1418 | }; |
| 1419 | |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1420 | static struct smd_subsystem_restart_config smd_ssr_config = { |
| 1421 | .disable_smsm_reset_handshake = 1, |
| 1422 | }; |
| 1423 | |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1424 | static struct smd_platform smd_platform_data = { |
| 1425 | .num_ss_configs = ARRAY_SIZE(smd_config_list), |
| 1426 | .smd_ss_configs = smd_config_list, |
Eric Holmberg | 2bb6ccd | 2012-03-13 13:05:14 -0600 | [diff] [blame] | 1427 | .smd_ssr_config = &smd_ssr_config, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1428 | }; |
| 1429 | |
Jeff Hugo | 0c0f5e9 | 2011-09-28 13:55:45 -0600 | [diff] [blame] | 1430 | struct platform_device msm_device_smd_apq8064 = { |
| 1431 | .name = "msm_smd", |
| 1432 | .id = -1, |
Eric Holmberg | 023d25c | 2012-03-01 12:27:55 -0700 | [diff] [blame] | 1433 | .resource = smd_resource, |
| 1434 | .num_resources = ARRAY_SIZE(smd_resource), |
| 1435 | .dev = { |
| 1436 | .platform_data = &smd_platform_data, |
| 1437 | }, |
Jeff Hugo | 0c0f5e9 | 2011-09-28 13:55:45 -0600 | [diff] [blame] | 1438 | }; |
| 1439 | |
Ramesh Masavarapu | f46be1b | 2011-11-03 11:13:41 -0700 | [diff] [blame] | 1440 | #ifdef CONFIG_HW_RANDOM_MSM |
| 1441 | /* PRNG device */ |
| 1442 | #define MSM_PRNG_PHYS 0x1A500000 |
| 1443 | static struct resource rng_resources = { |
| 1444 | .flags = IORESOURCE_MEM, |
| 1445 | .start = MSM_PRNG_PHYS, |
| 1446 | .end = MSM_PRNG_PHYS + SZ_512 - 1, |
| 1447 | }; |
| 1448 | |
| 1449 | struct platform_device apq8064_device_rng = { |
| 1450 | .name = "msm_rng", |
| 1451 | .id = 0, |
| 1452 | .num_resources = 1, |
| 1453 | .resource = &rng_resources, |
| 1454 | }; |
| 1455 | #endif |
| 1456 | |
Matt Wagantall | 292aace | 2012-01-26 19:12:34 -0800 | [diff] [blame] | 1457 | static struct resource msm_gss_resources[] = { |
| 1458 | { |
| 1459 | .start = 0x10000000, |
| 1460 | .end = 0x10000000 + SZ_256 - 1, |
| 1461 | .flags = IORESOURCE_MEM, |
| 1462 | }, |
Matt Wagantall | 19ac4fd | 2012-02-03 20:18:23 -0800 | [diff] [blame] | 1463 | { |
| 1464 | .start = 0x10008000, |
| 1465 | .end = 0x10008000 + SZ_256 - 1, |
| 1466 | .flags = IORESOURCE_MEM, |
| 1467 | }, |
Matt Wagantall | 292aace | 2012-01-26 19:12:34 -0800 | [diff] [blame] | 1468 | }; |
| 1469 | |
| 1470 | struct platform_device msm_gss = { |
| 1471 | .name = "pil_gss", |
| 1472 | .id = -1, |
| 1473 | .num_resources = ARRAY_SIZE(msm_gss_resources), |
| 1474 | .resource = msm_gss_resources, |
| 1475 | }; |
| 1476 | |
Matt Wagantall | 1875d32 | 2012-02-22 16:11:33 -0800 | [diff] [blame] | 1477 | struct platform_device *apq8064_fs_devices[] = { |
| 1478 | FS_8X60(FS_ROT, "fs_rot"), |
| 1479 | FS_8X60(FS_IJPEG, "fs_ijpeg"), |
| 1480 | FS_8X60(FS_VFE, "fs_vfe"), |
| 1481 | FS_8X60(FS_VPE, "fs_vpe"), |
| 1482 | FS_8X60(FS_GFX3D, "fs_gfx3d"), |
| 1483 | FS_8X60(FS_VED, "fs_ved"), |
| 1484 | FS_8X60(FS_VCAP, "fs_vcap"), |
| 1485 | }; |
| 1486 | unsigned apq8064_num_fs_devices = ARRAY_SIZE(apq8064_fs_devices); |
| 1487 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1488 | static struct clk_lookup msm_clocks_8064_dummy[] = { |
| 1489 | CLK_DUMMY("pll2", PLL2, NULL, 0), |
| 1490 | CLK_DUMMY("pll8", PLL8, NULL, 0), |
| 1491 | CLK_DUMMY("pll4", PLL4, NULL, 0), |
| 1492 | |
| 1493 | CLK_DUMMY("afab_clk", AFAB_CLK, NULL, 0), |
| 1494 | CLK_DUMMY("afab_a_clk", AFAB_A_CLK, NULL, 0), |
| 1495 | CLK_DUMMY("cfpb_clk", CFPB_CLK, NULL, 0), |
| 1496 | CLK_DUMMY("cfpb_a_clk", CFPB_A_CLK, NULL, 0), |
| 1497 | CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0), |
| 1498 | CLK_DUMMY("dfab_a_clk", DFAB_A_CLK, NULL, 0), |
| 1499 | CLK_DUMMY("ebi1_clk", EBI1_CLK, NULL, 0), |
| 1500 | CLK_DUMMY("ebi1_a_clk", EBI1_A_CLK, NULL, 0), |
| 1501 | CLK_DUMMY("mmfab_clk", MMFAB_CLK, NULL, 0), |
| 1502 | CLK_DUMMY("mmfab_a_clk", MMFAB_A_CLK, NULL, 0), |
| 1503 | CLK_DUMMY("mmfpb_clk", MMFPB_CLK, NULL, 0), |
| 1504 | CLK_DUMMY("mmfpb_a_clk", MMFPB_A_CLK, NULL, 0), |
| 1505 | CLK_DUMMY("sfab_clk", SFAB_CLK, NULL, 0), |
| 1506 | CLK_DUMMY("sfab_a_clk", SFAB_A_CLK, NULL, 0), |
| 1507 | CLK_DUMMY("sfpb_clk", SFPB_CLK, NULL, 0), |
| 1508 | CLK_DUMMY("sfpb_a_clk", SFPB_A_CLK, NULL, 0), |
| 1509 | |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 1510 | CLK_DUMMY("core_clk", GSBI1_UART_CLK, NULL, OFF), |
| 1511 | CLK_DUMMY("core_clk", GSBI2_UART_CLK, NULL, OFF), |
| 1512 | CLK_DUMMY("core_clk", GSBI3_UART_CLK, |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 1513 | NULL, OFF), |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 1514 | CLK_DUMMY("core_clk", GSBI4_UART_CLK, NULL, OFF), |
| 1515 | CLK_DUMMY("core_clk", GSBI5_UART_CLK, NULL, OFF), |
| 1516 | CLK_DUMMY("core_clk", GSBI6_UART_CLK, NULL, OFF), |
| 1517 | CLK_DUMMY("core_clk", GSBI7_UART_CLK, NULL, OFF), |
| 1518 | CLK_DUMMY("core_clk", GSBI8_UART_CLK, NULL, OFF), |
| 1519 | CLK_DUMMY("core_clk", GSBI9_UART_CLK, NULL, OFF), |
| 1520 | CLK_DUMMY("core_clk", GSBI10_UART_CLK, NULL, OFF), |
| 1521 | CLK_DUMMY("core_clk", GSBI11_UART_CLK, NULL, OFF), |
| 1522 | CLK_DUMMY("core_clk", GSBI12_UART_CLK, NULL, OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1523 | CLK_DUMMY("core_clk", GSBI1_QUP_CLK, NULL, OFF), |
| 1524 | CLK_DUMMY("core_clk", GSBI2_QUP_CLK, NULL, OFF), |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 1525 | CLK_DUMMY("core_clk", GSBI3_QUP_CLK, "qup_i2c.3", OFF), |
Matt Wagantall | ac29485 | 2011-08-17 15:44:58 -0700 | [diff] [blame] | 1526 | CLK_DUMMY("core_clk", GSBI4_QUP_CLK, "qup_i2c.4", OFF), |
| 1527 | CLK_DUMMY("core_clk", GSBI5_QUP_CLK, "spi_qsd.0", OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1528 | CLK_DUMMY("core_clk", GSBI6_QUP_CLK, NULL, OFF), |
| 1529 | CLK_DUMMY("core_clk", GSBI7_QUP_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1530 | CLK_DUMMY("core_clk", PDM_CLK, NULL, OFF), |
Matt Wagantall | d86d683 | 2011-08-17 14:06:55 -0700 | [diff] [blame] | 1531 | CLK_DUMMY("mem_clk", PMEM_CLK, NULL, OFF), |
Ramesh Masavarapu | f46be1b | 2011-11-03 11:13:41 -0700 | [diff] [blame] | 1532 | CLK_DUMMY("core_clk", PRNG_CLK, "msm_rng.0", OFF), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1533 | CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF), |
| 1534 | CLK_DUMMY("core_clk", SDC2_CLK, NULL, OFF), |
| 1535 | CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF), |
| 1536 | CLK_DUMMY("core_clk", SDC4_CLK, NULL, OFF), |
Matt Wagantall | 640e5fd | 2011-08-17 16:08:53 -0700 | [diff] [blame] | 1537 | CLK_DUMMY("ref_clk", TSIF_REF_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1538 | CLK_DUMMY("core_clk", TSSC_CLK, NULL, OFF), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1539 | CLK_DUMMY("alt_core_clk", USB_HS1_XCVR_CLK, NULL, OFF), |
| 1540 | CLK_DUMMY("alt_core_clk", USB_HS3_XCVR_CLK, NULL, OFF), |
| 1541 | CLK_DUMMY("alt_core_clk", USB_HS4_XCVR_CLK, NULL, OFF), |
| 1542 | CLK_DUMMY("phy_clk", USB_PHY0_CLK, NULL, OFF), |
| 1543 | CLK_DUMMY("src_clk", USB_FS1_SRC_CLK, NULL, OFF), |
| 1544 | CLK_DUMMY("alt_core_clk", USB_FS1_XCVR_CLK, NULL, OFF), |
| 1545 | CLK_DUMMY("sys_clk", USB_FS1_SYS_CLK, NULL, OFF), |
Matt Wagantall | c4b3a4d | 2011-08-17 16:58:39 -0700 | [diff] [blame] | 1546 | CLK_DUMMY("core_clk", CE2_CLK, NULL, OFF), |
| 1547 | CLK_DUMMY("core_clk", CE1_CORE_CLK, NULL, OFF), |
| 1548 | CLK_DUMMY("core_clk", CE3_CORE_CLK, NULL, OFF), |
| 1549 | CLK_DUMMY("iface_clk", CE3_P_CLK, NULL, OFF), |
Tianyi Gou | 86bb472 | 2011-08-09 13:28:02 -0700 | [diff] [blame] | 1550 | CLK_DUMMY("pcie_pclk", PCIE_P_CLK, NULL, OFF), |
| 1551 | CLK_DUMMY("pcie_alt_ref_clk", PCIE_ALT_REF_CLK, NULL, OFF), |
| 1552 | CLK_DUMMY("sata_rxoob_clk", SATA_RXOOB_CLK, NULL, OFF), |
| 1553 | CLK_DUMMY("sata_pmalive_clk", SATA_PMALIVE_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1554 | CLK_DUMMY("ref_clk", SATA_PHY_REF_CLK, NULL, OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1555 | CLK_DUMMY("iface_clk", GSBI1_P_CLK, NULL, OFF), |
| 1556 | CLK_DUMMY("iface_clk", GSBI2_P_CLK, NULL, OFF), |
Jing Lin | 04601f9 | 2012-02-05 15:36:07 -0800 | [diff] [blame] | 1557 | CLK_DUMMY("iface_clk", GSBI3_P_CLK, "qup_i2c.3", OFF), |
Matt Wagantall | ac29485 | 2011-08-17 15:44:58 -0700 | [diff] [blame] | 1558 | CLK_DUMMY("iface_clk", GSBI4_P_CLK, "qup_i2c.4", OFF), |
| 1559 | CLK_DUMMY("iface_clk", GSBI5_P_CLK, "spi_qsd.0", OFF), |
Matt Wagantall | e252237 | 2011-08-17 14:52:21 -0700 | [diff] [blame] | 1560 | CLK_DUMMY("iface_clk", GSBI6_P_CLK, NULL, OFF), |
Matt Wagantall | 62cf63e | 2011-08-17 16:34:47 -0700 | [diff] [blame] | 1561 | CLK_DUMMY("iface_clk", GSBI7_P_CLK, NULL, OFF), |
Matt Wagantall | 640e5fd | 2011-08-17 16:08:53 -0700 | [diff] [blame] | 1562 | CLK_DUMMY("iface_clk", TSIF_P_CLK, NULL, OFF), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1563 | CLK_DUMMY("iface_clk", USB_FS1_P_CLK, NULL, OFF), |
| 1564 | CLK_DUMMY("iface_clk", USB_HS1_P_CLK, NULL, OFF), |
| 1565 | CLK_DUMMY("iface_clk", USB_HS3_P_CLK, NULL, OFF), |
| 1566 | CLK_DUMMY("iface_clk", USB_HS4_P_CLK, NULL, OFF), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1567 | CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF), |
| 1568 | CLK_DUMMY("iface_clk", SDC2_P_CLK, NULL, OFF), |
| 1569 | CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF), |
| 1570 | CLK_DUMMY("iface_clk", SDC4_P_CLK, NULL, OFF), |
Jin Hong | 01f2dbb | 2011-11-03 22:13:51 -0700 | [diff] [blame] | 1571 | CLK_DUMMY("core_clk", ADM0_CLK, "msm_dmov", OFF), |
| 1572 | CLK_DUMMY("iface_clk", ADM0_P_CLK, "msm_dmov", OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1573 | CLK_DUMMY("iface_clk", PMIC_ARB0_P_CLK, NULL, OFF), |
| 1574 | CLK_DUMMY("iface_clk", PMIC_ARB1_P_CLK, NULL, OFF), |
| 1575 | CLK_DUMMY("core_clk", PMIC_SSBI2_CLK, NULL, OFF), |
| 1576 | CLK_DUMMY("mem_clk", RPM_MSG_RAM_P_CLK, NULL, OFF), |
| 1577 | CLK_DUMMY("core_clk", AMP_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1578 | CLK_DUMMY("cam_clk", CAM0_CLK, NULL, OFF), |
| 1579 | CLK_DUMMY("cam_clk", CAM1_CLK, NULL, OFF), |
| 1580 | CLK_DUMMY("csi_src_clk", CSI0_SRC_CLK, NULL, OFF), |
| 1581 | CLK_DUMMY("csi_src_clk", CSI1_SRC_CLK, NULL, OFF), |
| 1582 | CLK_DUMMY("csi_clk", CSI0_CLK, NULL, OFF), |
| 1583 | CLK_DUMMY("csi_clk", CSI1_CLK, NULL, OFF), |
| 1584 | CLK_DUMMY("csi_pix_clk", CSI_PIX_CLK, NULL, OFF), |
| 1585 | CLK_DUMMY("csi_rdi_clk", CSI_RDI_CLK, NULL, OFF), |
| 1586 | CLK_DUMMY("csiphy_timer_src_clk", CSIPHY_TIMER_SRC_CLK, NULL, OFF), |
| 1587 | CLK_DUMMY("csi0phy_timer_clk", CSIPHY0_TIMER_CLK, NULL, OFF), |
| 1588 | CLK_DUMMY("csi1phy_timer_clk", CSIPHY1_TIMER_CLK, NULL, OFF), |
| 1589 | CLK_DUMMY("dsi_byte_div_clk", DSI1_BYTE_CLK, NULL, OFF), |
| 1590 | CLK_DUMMY("dsi_byte_div_clk", DSI2_BYTE_CLK, NULL, OFF), |
| 1591 | CLK_DUMMY("dsi_esc_clk", DSI1_ESC_CLK, NULL, OFF), |
| 1592 | CLK_DUMMY("dsi_esc_clk", DSI2_ESC_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1593 | CLK_DUMMY("core_clk", VCAP_CLK, NULL, OFF), |
| 1594 | CLK_DUMMY("npl_clk", VCAP_NPL_CLK, NULL, OFF), |
Pu Chen | 86b4be9 | 2011-11-03 17:27:57 -0700 | [diff] [blame] | 1595 | CLK_DUMMY("core_clk", GFX3D_CLK, "kgsl-3d0.0", OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1596 | CLK_DUMMY("ijpeg_clk", IJPEG_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1597 | CLK_DUMMY("mem_clk", IMEM_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1598 | CLK_DUMMY("core_clk", JPEGD_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1599 | CLK_DUMMY("mdp_clk", MDP_CLK, NULL, OFF), |
| 1600 | CLK_DUMMY("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, OFF), |
| 1601 | CLK_DUMMY("lut_mdp", LUT_MDP_CLK, NULL, OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1602 | CLK_DUMMY("core_clk", ROT_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1603 | CLK_DUMMY("tv_src_clk", TV_SRC_CLK, NULL, OFF), |
Matt Wagantall | b86ad26 | 2011-10-24 19:50:29 -0700 | [diff] [blame] | 1604 | CLK_DUMMY("core_clk", VCODEC_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1605 | CLK_DUMMY("mdp_tv_clk", MDP_TV_CLK, NULL, OFF), |
Tianyi Gou | 86bb472 | 2011-08-09 13:28:02 -0700 | [diff] [blame] | 1606 | CLK_DUMMY("rgb_tv_clk", RGB_TV_CLK, NULL, OFF), |
| 1607 | CLK_DUMMY("npl_tv_clk", NPL_TV_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1608 | CLK_DUMMY("hdmi_clk", HDMI_TV_CLK, NULL, OFF), |
Matt Wagantall | 5a4f1ba | 2011-08-18 18:13:03 -0700 | [diff] [blame] | 1609 | CLK_DUMMY("core_clk", HDMI_APP_CLK, "hdmi_msm.1", OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1610 | CLK_DUMMY("vpe_clk", VPE_CLK, NULL, OFF), |
| 1611 | CLK_DUMMY("vfe_clk", VFE_CLK, NULL, OFF), |
| 1612 | CLK_DUMMY("csi_vfe_clk", CSI0_VFE_CLK, NULL, OFF), |
| 1613 | CLK_DUMMY("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF), |
| 1614 | CLK_DUMMY("ijpeg_axi_clk", IJPEG_AXI_CLK, NULL, OFF), |
| 1615 | CLK_DUMMY("mdp_axi_clk", MDP_AXI_CLK, NULL, OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1616 | CLK_DUMMY("bus_clk", ROT_AXI_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1617 | CLK_DUMMY("vcodec_axi_clk", VCODEC_AXI_CLK, NULL, OFF), |
| 1618 | CLK_DUMMY("vcodec_axi_a_clk", VCODEC_AXI_A_CLK, NULL, OFF), |
| 1619 | CLK_DUMMY("vcodec_axi_b_clk", VCODEC_AXI_B_CLK, NULL, OFF), |
| 1620 | CLK_DUMMY("vpe_axi_clk", VPE_AXI_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1621 | CLK_DUMMY("bus_clk", GFX3D_AXI_CLK, NULL, OFF), |
Tianyi Gou | 86bb472 | 2011-08-09 13:28:02 -0700 | [diff] [blame] | 1622 | CLK_DUMMY("vcap_axi_clk", VCAP_AXI_CLK, NULL, OFF), |
| 1623 | CLK_DUMMY("vcap_ahb_clk", VCAP_AHB_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1624 | CLK_DUMMY("amp_pclk", AMP_P_CLK, NULL, OFF), |
| 1625 | CLK_DUMMY("csi_pclk", CSI0_P_CLK, NULL, OFF), |
| 1626 | CLK_DUMMY("dsi_m_pclk", DSI1_M_P_CLK, NULL, OFF), |
| 1627 | CLK_DUMMY("dsi_s_pclk", DSI1_S_P_CLK, NULL, OFF), |
| 1628 | CLK_DUMMY("dsi_m_pclk", DSI2_M_P_CLK, NULL, OFF), |
| 1629 | CLK_DUMMY("dsi_s_pclk", DSI2_S_P_CLK, NULL, OFF), |
Tianyi Gou | 86bb472 | 2011-08-09 13:28:02 -0700 | [diff] [blame] | 1630 | CLK_DUMMY("lvds_clk", LVDS_CLK, NULL, OFF), |
| 1631 | CLK_DUMMY("mdp_p2clk", MDP_P2CLK, NULL, OFF), |
| 1632 | CLK_DUMMY("dsi2_pixel_clk", DSI2_PIXEL_CLK, NULL, OFF), |
| 1633 | CLK_DUMMY("lvds_ref_clk", LVDS_REF_CLK, NULL, OFF), |
Pu Chen | 86b4be9 | 2011-11-03 17:27:57 -0700 | [diff] [blame] | 1634 | CLK_DUMMY("iface_clk", GFX3D_P_CLK, "kgsl-3d0.0", OFF), |
Matt Wagantall | 5a4f1ba | 2011-08-18 18:13:03 -0700 | [diff] [blame] | 1635 | CLK_DUMMY("master_iface_clk", HDMI_M_P_CLK, "hdmi_msm.1", OFF), |
| 1636 | CLK_DUMMY("slave_iface_clk", HDMI_S_P_CLK, "hdmi_msm.1", OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1637 | CLK_DUMMY("ijpeg_pclk", IJPEG_P_CLK, NULL, OFF), |
| 1638 | CLK_DUMMY("jpegd_pclk", JPEGD_P_CLK, NULL, OFF), |
Matt Wagantall | 9dc0163 | 2011-08-17 18:55:04 -0700 | [diff] [blame] | 1639 | CLK_DUMMY("mem_iface_clk", IMEM_P_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1640 | CLK_DUMMY("mdp_pclk", MDP_P_CLK, NULL, OFF), |
Matt Wagantall | e604d71 | 2011-10-21 15:38:18 -0700 | [diff] [blame] | 1641 | CLK_DUMMY("iface_clk", SMMU_P_CLK, "msm_smmu", OFF), |
Matt Wagantall | bb90da9 | 2011-10-25 15:07:52 -0700 | [diff] [blame] | 1642 | CLK_DUMMY("iface_clk", ROT_P_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1643 | CLK_DUMMY("vcodec_pclk", VCODEC_P_CLK, NULL, OFF), |
| 1644 | CLK_DUMMY("vfe_pclk", VFE_P_CLK, NULL, OFF), |
| 1645 | CLK_DUMMY("vpe_pclk", VPE_P_CLK, NULL, OFF), |
| 1646 | CLK_DUMMY("mi2s_osr_clk", MI2S_OSR_CLK, NULL, OFF), |
| 1647 | CLK_DUMMY("mi2s_bit_clk", MI2S_BIT_CLK, NULL, OFF), |
| 1648 | CLK_DUMMY("i2s_mic_osr_clk", CODEC_I2S_MIC_OSR_CLK, NULL, OFF), |
| 1649 | CLK_DUMMY("i2s_mic_bit_clk", CODEC_I2S_MIC_BIT_CLK, NULL, OFF), |
| 1650 | CLK_DUMMY("i2s_mic_osr_clk", SPARE_I2S_MIC_OSR_CLK, NULL, OFF), |
| 1651 | CLK_DUMMY("i2s_mic_bit_clk", SPARE_I2S_MIC_BIT_CLK, NULL, OFF), |
| 1652 | CLK_DUMMY("i2s_spkr_osr_clk", CODEC_I2S_SPKR_OSR_CLK, NULL, OFF), |
| 1653 | CLK_DUMMY("i2s_spkr_bit_clk", CODEC_I2S_SPKR_BIT_CLK, NULL, OFF), |
| 1654 | CLK_DUMMY("i2s_spkr_osr_clk", SPARE_I2S_SPKR_OSR_CLK, NULL, OFF), |
| 1655 | CLK_DUMMY("i2s_spkr_bit_clk", SPARE_I2S_SPKR_BIT_CLK, NULL, OFF), |
| 1656 | CLK_DUMMY("pcm_clk", PCM_CLK, NULL, OFF), |
Tianyi Gou | 142b8db | 2011-09-21 18:01:54 -0700 | [diff] [blame] | 1657 | CLK_DUMMY("audio_slimbus_clk", AUDIO_SLIMBUS_CLK, NULL, OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1658 | |
| 1659 | CLK_DUMMY("dfab_dsps_clk", DFAB_DSPS_CLK, NULL, 0), |
Manu Gautam | 5143b25 | 2012-01-05 19:25:23 -0800 | [diff] [blame] | 1660 | CLK_DUMMY("core_clk", DFAB_USB_HS_CLK, NULL, 0), |
Matt Wagantall | 37ce384 | 2011-08-17 16:00:36 -0700 | [diff] [blame] | 1661 | CLK_DUMMY("bus_clk", DFAB_SDC1_CLK, NULL, 0), |
| 1662 | CLK_DUMMY("bus_clk", DFAB_SDC2_CLK, NULL, 0), |
| 1663 | CLK_DUMMY("bus_clk", DFAB_SDC3_CLK, NULL, 0), |
| 1664 | CLK_DUMMY("bus_clk", DFAB_SDC4_CLK, NULL, 0), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1665 | CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0), |
| 1666 | CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0), |
Jin Hong | 01f2dbb | 2011-11-03 22:13:51 -0700 | [diff] [blame] | 1667 | CLK_DUMMY("mem_clk", EBI1_ADM_CLK, "msm_dmov", 0), |
Ramesh Masavarapu | 2831191 | 2011-10-27 11:04:12 -0700 | [diff] [blame] | 1668 | CLK_DUMMY("ce3_core_src_clk", CE3_SRC_CLK, "qce.0", OFF), |
| 1669 | CLK_DUMMY("ce3_core_src_clk", CE3_SRC_CLK, "qcrypto.0", OFF), |
| 1670 | CLK_DUMMY("core_clk", CE3_CORE_CLK, "qce.0", OFF), |
| 1671 | CLK_DUMMY("core_clk", CE3_CORE_CLK, "qcrypto.0", OFF), |
| 1672 | CLK_DUMMY("iface_clk", CE3_P_CLK, "qce0.0", OFF), |
| 1673 | CLK_DUMMY("iface_clk", CE3_P_CLK, "qcrypto.0", OFF), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1674 | }; |
| 1675 | |
Stephen Boyd | bb600ae | 2011-08-02 20:11:40 -0700 | [diff] [blame] | 1676 | struct clock_init_data apq8064_dummy_clock_init_data __initdata = { |
| 1677 | .table = msm_clocks_8064_dummy, |
| 1678 | .size = ARRAY_SIZE(msm_clocks_8064_dummy), |
| 1679 | }; |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 1680 | |
| 1681 | struct msm_rpm_platform_data apq8064_rpm_data __initdata = { |
| 1682 | .reg_base_addrs = { |
| 1683 | [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE, |
| 1684 | [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400, |
| 1685 | [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600, |
| 1686 | [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00, |
| 1687 | }, |
| 1688 | .irq_ack = RPM_APCC_CPU0_GP_HIGH_IRQ, |
Stephen Boyd | f61255e | 2012-02-24 14:31:09 -0800 | [diff] [blame] | 1689 | .irq_err = RPM_APCC_CPU0_GP_LOW_IRQ, |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 1690 | .ipc_rpm_reg = MSM_APCS_GCC_BASE + 0x008, |
| 1691 | .ipc_rpm_val = 4, |
| 1692 | .target_id = { |
| 1693 | MSM_RPM_MAP(8064, NOTIFICATION_CONFIGURED_0, NOTIFICATION, 4), |
| 1694 | MSM_RPM_MAP(8064, NOTIFICATION_REGISTERED_0, NOTIFICATION, 4), |
| 1695 | MSM_RPM_MAP(8064, INVALIDATE_0, INVALIDATE, 8), |
| 1696 | MSM_RPM_MAP(8064, TRIGGER_TIMED_TO, TRIGGER_TIMED, 1), |
| 1697 | MSM_RPM_MAP(8064, TRIGGER_TIMED_SCLK_COUNT, TRIGGER_TIMED, 1), |
| 1698 | MSM_RPM_MAP(8064, RPM_CTL, RPM_CTL, 1), |
| 1699 | MSM_RPM_MAP(8064, CXO_CLK, CXO_CLK, 1), |
| 1700 | MSM_RPM_MAP(8064, PXO_CLK, PXO_CLK, 1), |
| 1701 | MSM_RPM_MAP(8064, APPS_FABRIC_CLK, APPS_FABRIC_CLK, 1), |
| 1702 | MSM_RPM_MAP(8064, SYSTEM_FABRIC_CLK, SYSTEM_FABRIC_CLK, 1), |
| 1703 | MSM_RPM_MAP(8064, MM_FABRIC_CLK, MM_FABRIC_CLK, 1), |
| 1704 | MSM_RPM_MAP(8064, DAYTONA_FABRIC_CLK, DAYTONA_FABRIC_CLK, 1), |
| 1705 | MSM_RPM_MAP(8064, SFPB_CLK, SFPB_CLK, 1), |
| 1706 | MSM_RPM_MAP(8064, CFPB_CLK, CFPB_CLK, 1), |
| 1707 | MSM_RPM_MAP(8064, MMFPB_CLK, MMFPB_CLK, 1), |
| 1708 | MSM_RPM_MAP(8064, EBI1_CLK, EBI1_CLK, 1), |
| 1709 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_HALT_0, |
| 1710 | APPS_FABRIC_CFG_HALT, 2), |
| 1711 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_CLKMOD_0, |
| 1712 | APPS_FABRIC_CFG_CLKMOD, 3), |
| 1713 | MSM_RPM_MAP(8064, APPS_FABRIC_CFG_IOCTL, |
| 1714 | APPS_FABRIC_CFG_IOCTL, 1), |
| 1715 | MSM_RPM_MAP(8064, APPS_FABRIC_ARB_0, APPS_FABRIC_ARB, 12), |
| 1716 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_HALT_0, |
| 1717 | SYS_FABRIC_CFG_HALT, 2), |
| 1718 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_CLKMOD_0, |
| 1719 | SYS_FABRIC_CFG_CLKMOD, 3), |
| 1720 | MSM_RPM_MAP(8064, SYS_FABRIC_CFG_IOCTL, |
| 1721 | SYS_FABRIC_CFG_IOCTL, 1), |
| 1722 | MSM_RPM_MAP(8064, SYSTEM_FABRIC_ARB_0, SYSTEM_FABRIC_ARB, 30), |
| 1723 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_HALT_0, |
| 1724 | MMSS_FABRIC_CFG_HALT, 2), |
| 1725 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_CLKMOD_0, |
| 1726 | MMSS_FABRIC_CFG_CLKMOD, 3), |
| 1727 | MSM_RPM_MAP(8064, MMSS_FABRIC_CFG_IOCTL, |
| 1728 | MMSS_FABRIC_CFG_IOCTL, 1), |
| 1729 | MSM_RPM_MAP(8064, MM_FABRIC_ARB_0, MM_FABRIC_ARB, 21), |
| 1730 | MSM_RPM_MAP(8064, PM8921_S1_0, PM8921_S1, 2), |
| 1731 | MSM_RPM_MAP(8064, PM8921_S2_0, PM8921_S2, 2), |
| 1732 | MSM_RPM_MAP(8064, PM8921_S3_0, PM8921_S3, 2), |
| 1733 | MSM_RPM_MAP(8064, PM8921_S4_0, PM8921_S4, 2), |
| 1734 | MSM_RPM_MAP(8064, PM8921_S5_0, PM8921_S5, 2), |
| 1735 | MSM_RPM_MAP(8064, PM8921_S6_0, PM8921_S6, 2), |
| 1736 | MSM_RPM_MAP(8064, PM8921_S7_0, PM8921_S7, 2), |
| 1737 | MSM_RPM_MAP(8064, PM8921_S8_0, PM8921_S8, 2), |
| 1738 | MSM_RPM_MAP(8064, PM8921_L1_0, PM8921_L1, 2), |
| 1739 | MSM_RPM_MAP(8064, PM8921_L2_0, PM8921_L2, 2), |
| 1740 | MSM_RPM_MAP(8064, PM8921_L3_0, PM8921_L3, 2), |
| 1741 | MSM_RPM_MAP(8064, PM8921_L4_0, PM8921_L4, 2), |
| 1742 | MSM_RPM_MAP(8064, PM8921_L5_0, PM8921_L5, 2), |
| 1743 | MSM_RPM_MAP(8064, PM8921_L6_0, PM8921_L6, 2), |
| 1744 | MSM_RPM_MAP(8064, PM8921_L7_0, PM8921_L7, 2), |
| 1745 | MSM_RPM_MAP(8064, PM8921_L8_0, PM8921_L8, 2), |
| 1746 | MSM_RPM_MAP(8064, PM8921_L9_0, PM8921_L9, 2), |
| 1747 | MSM_RPM_MAP(8064, PM8921_L10_0, PM8921_L10, 2), |
| 1748 | MSM_RPM_MAP(8064, PM8921_L11_0, PM8921_L11, 2), |
| 1749 | MSM_RPM_MAP(8064, PM8921_L12_0, PM8921_L12, 2), |
| 1750 | MSM_RPM_MAP(8064, PM8921_L13_0, PM8921_L13, 2), |
| 1751 | MSM_RPM_MAP(8064, PM8921_L14_0, PM8921_L14, 2), |
| 1752 | MSM_RPM_MAP(8064, PM8921_L15_0, PM8921_L15, 2), |
| 1753 | MSM_RPM_MAP(8064, PM8921_L16_0, PM8921_L16, 2), |
| 1754 | MSM_RPM_MAP(8064, PM8921_L17_0, PM8921_L17, 2), |
| 1755 | MSM_RPM_MAP(8064, PM8921_L18_0, PM8921_L18, 2), |
| 1756 | MSM_RPM_MAP(8064, PM8921_L19_0, PM8921_L19, 2), |
| 1757 | MSM_RPM_MAP(8064, PM8921_L20_0, PM8921_L20, 2), |
| 1758 | MSM_RPM_MAP(8064, PM8921_L21_0, PM8921_L21, 2), |
| 1759 | MSM_RPM_MAP(8064, PM8921_L22_0, PM8921_L22, 2), |
| 1760 | MSM_RPM_MAP(8064, PM8921_L23_0, PM8921_L23, 2), |
| 1761 | MSM_RPM_MAP(8064, PM8921_L24_0, PM8921_L24, 2), |
| 1762 | MSM_RPM_MAP(8064, PM8921_L25_0, PM8921_L25, 2), |
| 1763 | MSM_RPM_MAP(8064, PM8921_L26_0, PM8921_L26, 2), |
| 1764 | MSM_RPM_MAP(8064, PM8921_L27_0, PM8921_L27, 2), |
| 1765 | MSM_RPM_MAP(8064, PM8921_L28_0, PM8921_L28, 2), |
| 1766 | MSM_RPM_MAP(8064, PM8921_L29_0, PM8921_L29, 2), |
| 1767 | MSM_RPM_MAP(8064, PM8921_CLK1_0, PM8921_CLK1, 2), |
| 1768 | MSM_RPM_MAP(8064, PM8921_CLK2_0, PM8921_CLK2, 2), |
| 1769 | MSM_RPM_MAP(8064, PM8921_LVS1, PM8921_LVS1, 1), |
| 1770 | MSM_RPM_MAP(8064, PM8921_LVS2, PM8921_LVS2, 1), |
| 1771 | MSM_RPM_MAP(8064, PM8921_LVS3, PM8921_LVS3, 1), |
| 1772 | MSM_RPM_MAP(8064, PM8921_LVS4, PM8921_LVS4, 1), |
| 1773 | MSM_RPM_MAP(8064, PM8921_LVS5, PM8921_LVS5, 1), |
| 1774 | MSM_RPM_MAP(8064, PM8921_LVS6, PM8921_LVS6, 1), |
| 1775 | MSM_RPM_MAP(8064, PM8921_LVS7, PM8921_LVS7, 1), |
| 1776 | MSM_RPM_MAP(8064, PM8821_S1_0, PM8821_S1, 2), |
| 1777 | MSM_RPM_MAP(8064, PM8821_S2_0, PM8821_S2, 2), |
| 1778 | MSM_RPM_MAP(8064, PM8821_L1_0, PM8821_L1, 2), |
| 1779 | MSM_RPM_MAP(8064, NCP_0, NCP, 2), |
| 1780 | MSM_RPM_MAP(8064, CXO_BUFFERS, CXO_BUFFERS, 1), |
| 1781 | MSM_RPM_MAP(8064, USB_OTG_SWITCH, USB_OTG_SWITCH, 1), |
| 1782 | MSM_RPM_MAP(8064, HDMI_SWITCH, HDMI_SWITCH, 1), |
| 1783 | MSM_RPM_MAP(8064, DDR_DMM_0, DDR_DMM, 2), |
| 1784 | MSM_RPM_MAP(8064, QDSS_CLK, QDSS_CLK, 1), |
| 1785 | }, |
| 1786 | .target_status = { |
| 1787 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_MAJOR), |
| 1788 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_MINOR), |
| 1789 | MSM_RPM_STATUS_ID_MAP(8064, VERSION_BUILD), |
| 1790 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_0), |
| 1791 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_1), |
| 1792 | MSM_RPM_STATUS_ID_MAP(8064, SUPPORTED_RESOURCES_2), |
| 1793 | MSM_RPM_STATUS_ID_MAP(8064, RESERVED_SUPPORTED_RESOURCES_0), |
| 1794 | MSM_RPM_STATUS_ID_MAP(8064, SEQUENCE), |
| 1795 | MSM_RPM_STATUS_ID_MAP(8064, RPM_CTL), |
| 1796 | MSM_RPM_STATUS_ID_MAP(8064, CXO_CLK), |
| 1797 | MSM_RPM_STATUS_ID_MAP(8064, PXO_CLK), |
| 1798 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CLK), |
| 1799 | MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_CLK), |
| 1800 | MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_CLK), |
| 1801 | MSM_RPM_STATUS_ID_MAP(8064, DAYTONA_FABRIC_CLK), |
| 1802 | MSM_RPM_STATUS_ID_MAP(8064, SFPB_CLK), |
| 1803 | MSM_RPM_STATUS_ID_MAP(8064, CFPB_CLK), |
| 1804 | MSM_RPM_STATUS_ID_MAP(8064, MMFPB_CLK), |
| 1805 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CLK), |
| 1806 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_HALT), |
| 1807 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_CLKMOD), |
| 1808 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_CFG_IOCTL), |
| 1809 | MSM_RPM_STATUS_ID_MAP(8064, APPS_FABRIC_ARB), |
| 1810 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_HALT), |
| 1811 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_CLKMOD), |
| 1812 | MSM_RPM_STATUS_ID_MAP(8064, SYS_FABRIC_CFG_IOCTL), |
| 1813 | MSM_RPM_STATUS_ID_MAP(8064, SYSTEM_FABRIC_ARB), |
| 1814 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_HALT), |
| 1815 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_CLKMOD), |
| 1816 | MSM_RPM_STATUS_ID_MAP(8064, MMSS_FABRIC_CFG_IOCTL), |
| 1817 | MSM_RPM_STATUS_ID_MAP(8064, MM_FABRIC_ARB), |
| 1818 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_0), |
| 1819 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S1_1), |
| 1820 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_0), |
| 1821 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S2_1), |
| 1822 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_0), |
| 1823 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S3_1), |
| 1824 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_0), |
| 1825 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S4_1), |
| 1826 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_0), |
| 1827 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S5_1), |
| 1828 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_0), |
| 1829 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S6_1), |
| 1830 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_0), |
| 1831 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S7_1), |
| 1832 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_0), |
| 1833 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_S8_1), |
| 1834 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_0), |
| 1835 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L1_1), |
| 1836 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_0), |
| 1837 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L2_1), |
| 1838 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_0), |
| 1839 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L3_1), |
| 1840 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_0), |
| 1841 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L4_1), |
| 1842 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_0), |
| 1843 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L5_1), |
| 1844 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_0), |
| 1845 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L6_1), |
| 1846 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_0), |
| 1847 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L7_1), |
| 1848 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_0), |
| 1849 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L8_1), |
| 1850 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_0), |
| 1851 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L9_1), |
| 1852 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_0), |
| 1853 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L10_1), |
| 1854 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_0), |
| 1855 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L11_1), |
| 1856 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_0), |
| 1857 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L12_1), |
| 1858 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_0), |
| 1859 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L13_1), |
| 1860 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_0), |
| 1861 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L14_1), |
| 1862 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_0), |
| 1863 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L15_1), |
| 1864 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_0), |
| 1865 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L16_1), |
| 1866 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_0), |
| 1867 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L17_1), |
| 1868 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_0), |
| 1869 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L18_1), |
| 1870 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_0), |
| 1871 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L19_1), |
| 1872 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_0), |
| 1873 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L20_1), |
| 1874 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_0), |
| 1875 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L21_1), |
| 1876 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_0), |
| 1877 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L22_1), |
| 1878 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_0), |
| 1879 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L23_1), |
| 1880 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_0), |
| 1881 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L24_1), |
| 1882 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_0), |
| 1883 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L25_1), |
| 1884 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_0), |
| 1885 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L26_1), |
| 1886 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_0), |
| 1887 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L27_1), |
| 1888 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_0), |
| 1889 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L28_1), |
| 1890 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_0), |
| 1891 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_L29_1), |
| 1892 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_0), |
| 1893 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK1_1), |
| 1894 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_0), |
| 1895 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_CLK2_1), |
| 1896 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS1), |
| 1897 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS2), |
| 1898 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS3), |
| 1899 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS4), |
| 1900 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS5), |
| 1901 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS6), |
| 1902 | MSM_RPM_STATUS_ID_MAP(8064, PM8921_LVS7), |
| 1903 | MSM_RPM_STATUS_ID_MAP(8064, NCP_0), |
| 1904 | MSM_RPM_STATUS_ID_MAP(8064, NCP_1), |
| 1905 | MSM_RPM_STATUS_ID_MAP(8064, CXO_BUFFERS), |
| 1906 | MSM_RPM_STATUS_ID_MAP(8064, USB_OTG_SWITCH), |
| 1907 | MSM_RPM_STATUS_ID_MAP(8064, HDMI_SWITCH), |
| 1908 | MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_0), |
| 1909 | MSM_RPM_STATUS_ID_MAP(8064, DDR_DMM_1), |
| 1910 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH0_RANGE), |
| 1911 | MSM_RPM_STATUS_ID_MAP(8064, EBI1_CH1_RANGE), |
| 1912 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_0), |
| 1913 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S1_1), |
| 1914 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_0), |
| 1915 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_S2_1), |
| 1916 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_0), |
| 1917 | MSM_RPM_STATUS_ID_MAP(8064, PM8821_L1_1), |
| 1918 | }, |
| 1919 | .target_ctrl_id = { |
| 1920 | MSM_RPM_CTRL_MAP(8064, VERSION_MAJOR), |
| 1921 | MSM_RPM_CTRL_MAP(8064, VERSION_MINOR), |
| 1922 | MSM_RPM_CTRL_MAP(8064, VERSION_BUILD), |
| 1923 | MSM_RPM_CTRL_MAP(8064, REQ_CTX_0), |
| 1924 | MSM_RPM_CTRL_MAP(8064, REQ_SEL_0), |
| 1925 | MSM_RPM_CTRL_MAP(8064, ACK_CTX_0), |
| 1926 | MSM_RPM_CTRL_MAP(8064, ACK_SEL_0), |
| 1927 | }, |
| 1928 | .sel_invalidate = MSM_RPM_8064_SEL_INVALIDATE, |
| 1929 | .sel_notification = MSM_RPM_8064_SEL_NOTIFICATION, |
| 1930 | .sel_last = MSM_RPM_8064_SEL_LAST, |
| 1931 | .ver = {3, 0, 0}, |
| 1932 | }; |
| 1933 | |
| 1934 | struct platform_device apq8064_rpm_device = { |
| 1935 | .name = "msm_rpm", |
| 1936 | .id = -1, |
| 1937 | }; |
| 1938 | |
| 1939 | static struct msm_rpmstats_platform_data msm_rpm_stat_pdata = { |
| 1940 | .phys_addr_base = 0x0010D204, |
| 1941 | .phys_size = SZ_8K, |
| 1942 | }; |
| 1943 | |
| 1944 | struct platform_device apq8064_rpm_stat_device = { |
| 1945 | .name = "msm_rpm_stat", |
| 1946 | .id = -1, |
| 1947 | .dev = { |
| 1948 | .platform_data = &msm_rpm_stat_pdata, |
| 1949 | }, |
| 1950 | }; |
| 1951 | |
| 1952 | static struct msm_rpm_log_platform_data msm_rpm_log_pdata = { |
| 1953 | .phys_addr_base = 0x0010C000, |
| 1954 | .reg_offsets = { |
| 1955 | [MSM_RPM_LOG_PAGE_INDICES] = 0x00000080, |
| 1956 | [MSM_RPM_LOG_PAGE_BUFFER] = 0x000000A0, |
| 1957 | }, |
| 1958 | .phys_size = SZ_8K, |
| 1959 | .log_len = 4096, /* log's buffer length in bytes */ |
| 1960 | .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */ |
| 1961 | }; |
| 1962 | |
| 1963 | struct platform_device apq8064_rpm_log_device = { |
| 1964 | .name = "msm_rpm_log", |
| 1965 | .id = -1, |
| 1966 | .dev = { |
| 1967 | .platform_data = &msm_rpm_log_pdata, |
| 1968 | }, |
| 1969 | }; |
| 1970 | |
Jin Hong | d3024e6 | 2012-02-09 16:13:32 -0800 | [diff] [blame] | 1971 | /* Sensors DSPS platform data */ |
| 1972 | |
| 1973 | #define PPSS_REG_PHYS_BASE 0x12080000 |
| 1974 | |
| 1975 | static struct dsps_clk_info dsps_clks[] = {}; |
| 1976 | static struct dsps_regulator_info dsps_regs[] = {}; |
| 1977 | |
| 1978 | /* |
| 1979 | * Note: GPIOs field is intialized in run-time at the function |
| 1980 | * apq8064_init_dsps(). |
| 1981 | */ |
| 1982 | |
| 1983 | struct msm_dsps_platform_data msm_dsps_pdata_8064 = { |
| 1984 | .clks = dsps_clks, |
| 1985 | .clks_num = ARRAY_SIZE(dsps_clks), |
| 1986 | .gpios = NULL, |
| 1987 | .gpios_num = 0, |
| 1988 | .regs = dsps_regs, |
| 1989 | .regs_num = ARRAY_SIZE(dsps_regs), |
| 1990 | .dsps_pwr_ctl_en = 1, |
| 1991 | .signature = DSPS_SIGNATURE, |
| 1992 | }; |
| 1993 | |
| 1994 | static struct resource msm_dsps_resources[] = { |
| 1995 | { |
| 1996 | .start = PPSS_REG_PHYS_BASE, |
| 1997 | .end = PPSS_REG_PHYS_BASE + SZ_8K - 1, |
| 1998 | .name = "ppss_reg", |
| 1999 | .flags = IORESOURCE_MEM, |
| 2000 | }, |
| 2001 | |
| 2002 | { |
| 2003 | .start = PPSS_WDOG_TIMER_IRQ, |
| 2004 | .end = PPSS_WDOG_TIMER_IRQ, |
| 2005 | .name = "ppss_wdog", |
| 2006 | .flags = IORESOURCE_IRQ, |
| 2007 | }, |
| 2008 | }; |
| 2009 | |
| 2010 | struct platform_device msm_dsps_device_8064 = { |
| 2011 | .name = "msm_dsps", |
| 2012 | .id = 0, |
| 2013 | .num_resources = ARRAY_SIZE(msm_dsps_resources), |
| 2014 | .resource = msm_dsps_resources, |
| 2015 | .dev.platform_data = &msm_dsps_pdata_8064, |
| 2016 | }; |
| 2017 | |
Praveen Chidambaram | 7849901 | 2011-11-01 17:15:17 -0600 | [diff] [blame] | 2018 | #ifdef CONFIG_MSM_MPM |
| 2019 | static uint16_t msm_mpm_irqs_m2a[MSM_MPM_NR_MPM_IRQS] __initdata = { |
| 2020 | [1] = MSM_GPIO_TO_INT(26), |
| 2021 | [2] = MSM_GPIO_TO_INT(88), |
| 2022 | [4] = MSM_GPIO_TO_INT(73), |
| 2023 | [5] = MSM_GPIO_TO_INT(74), |
| 2024 | [6] = MSM_GPIO_TO_INT(75), |
| 2025 | [7] = MSM_GPIO_TO_INT(76), |
| 2026 | [8] = MSM_GPIO_TO_INT(77), |
| 2027 | [9] = MSM_GPIO_TO_INT(36), |
| 2028 | [10] = MSM_GPIO_TO_INT(84), |
| 2029 | [11] = MSM_GPIO_TO_INT(7), |
| 2030 | [12] = MSM_GPIO_TO_INT(11), |
| 2031 | [13] = MSM_GPIO_TO_INT(52), |
| 2032 | [14] = MSM_GPIO_TO_INT(15), |
| 2033 | [15] = MSM_GPIO_TO_INT(83), |
| 2034 | [16] = USB3_HS_IRQ, |
| 2035 | [19] = MSM_GPIO_TO_INT(61), |
| 2036 | [20] = MSM_GPIO_TO_INT(58), |
| 2037 | [23] = MSM_GPIO_TO_INT(65), |
| 2038 | [24] = MSM_GPIO_TO_INT(63), |
| 2039 | [25] = USB1_HS_IRQ, |
| 2040 | [27] = HDMI_IRQ, |
| 2041 | [29] = MSM_GPIO_TO_INT(22), |
| 2042 | [30] = MSM_GPIO_TO_INT(72), |
| 2043 | [31] = USB4_HS_IRQ, |
| 2044 | [33] = MSM_GPIO_TO_INT(44), |
| 2045 | [34] = MSM_GPIO_TO_INT(39), |
| 2046 | [35] = MSM_GPIO_TO_INT(19), |
| 2047 | [36] = MSM_GPIO_TO_INT(23), |
| 2048 | [37] = MSM_GPIO_TO_INT(41), |
| 2049 | [38] = MSM_GPIO_TO_INT(30), |
| 2050 | [41] = MSM_GPIO_TO_INT(42), |
| 2051 | [42] = MSM_GPIO_TO_INT(56), |
| 2052 | [43] = MSM_GPIO_TO_INT(55), |
| 2053 | [44] = MSM_GPIO_TO_INT(50), |
| 2054 | [45] = MSM_GPIO_TO_INT(49), |
| 2055 | [46] = MSM_GPIO_TO_INT(47), |
| 2056 | [47] = MSM_GPIO_TO_INT(45), |
| 2057 | [48] = MSM_GPIO_TO_INT(38), |
| 2058 | [49] = MSM_GPIO_TO_INT(34), |
| 2059 | [50] = MSM_GPIO_TO_INT(32), |
| 2060 | [51] = MSM_GPIO_TO_INT(29), |
| 2061 | [52] = MSM_GPIO_TO_INT(18), |
| 2062 | [53] = MSM_GPIO_TO_INT(10), |
| 2063 | [54] = MSM_GPIO_TO_INT(81), |
| 2064 | [55] = MSM_GPIO_TO_INT(6), |
| 2065 | }; |
| 2066 | |
| 2067 | static uint16_t msm_mpm_bypassed_apps_irqs[] __initdata = { |
| 2068 | TLMM_MSM_SUMMARY_IRQ, |
| 2069 | RPM_APCC_CPU0_GP_HIGH_IRQ, |
| 2070 | RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2071 | RPM_APCC_CPU0_GP_LOW_IRQ, |
| 2072 | RPM_APCC_CPU0_WAKE_UP_IRQ, |
| 2073 | RPM_APCC_CPU1_GP_HIGH_IRQ, |
| 2074 | RPM_APCC_CPU1_GP_MEDIUM_IRQ, |
| 2075 | RPM_APCC_CPU1_GP_LOW_IRQ, |
| 2076 | RPM_APCC_CPU1_WAKE_UP_IRQ, |
| 2077 | MSS_TO_APPS_IRQ_0, |
| 2078 | MSS_TO_APPS_IRQ_1, |
| 2079 | MSS_TO_APPS_IRQ_2, |
| 2080 | MSS_TO_APPS_IRQ_3, |
| 2081 | MSS_TO_APPS_IRQ_4, |
| 2082 | MSS_TO_APPS_IRQ_5, |
| 2083 | MSS_TO_APPS_IRQ_6, |
| 2084 | MSS_TO_APPS_IRQ_7, |
| 2085 | MSS_TO_APPS_IRQ_8, |
| 2086 | MSS_TO_APPS_IRQ_9, |
| 2087 | LPASS_SCSS_GP_LOW_IRQ, |
| 2088 | LPASS_SCSS_GP_MEDIUM_IRQ, |
| 2089 | LPASS_SCSS_GP_HIGH_IRQ, |
| 2090 | SPS_MTI_30, |
| 2091 | SPS_MTI_31, |
| 2092 | RIVA_APSS_SPARE_IRQ, |
| 2093 | RIVA_APPS_WLAN_SMSM_IRQ, |
| 2094 | RIVA_APPS_WLAN_RX_DATA_AVAIL_IRQ, |
| 2095 | RIVA_APPS_WLAN_DATA_XFER_DONE_IRQ, |
| 2096 | }; |
| 2097 | |
| 2098 | struct msm_mpm_device_data apq8064_mpm_dev_data __initdata = { |
| 2099 | .irqs_m2a = msm_mpm_irqs_m2a, |
| 2100 | .irqs_m2a_size = ARRAY_SIZE(msm_mpm_irqs_m2a), |
| 2101 | .bypassed_apps_irqs = msm_mpm_bypassed_apps_irqs, |
| 2102 | .bypassed_apps_irqs_size = ARRAY_SIZE(msm_mpm_bypassed_apps_irqs), |
| 2103 | .mpm_request_reg_base = MSM_RPM_BASE + 0x9d8, |
| 2104 | .mpm_status_reg_base = MSM_RPM_BASE + 0xdf8, |
| 2105 | .mpm_apps_ipc_reg = MSM_APCS_GCC_BASE + 0x008, |
| 2106 | .mpm_apps_ipc_val = BIT(1), |
| 2107 | .mpm_ipc_irq = RPM_APCC_CPU0_GP_MEDIUM_IRQ, |
| 2108 | |
| 2109 | }; |
| 2110 | #endif |
Joel King | dacbc82 | 2012-01-25 13:30:57 -0800 | [diff] [blame] | 2111 | |
| 2112 | #define MDM2AP_ERRFATAL 19 |
| 2113 | #define AP2MDM_ERRFATAL 18 |
| 2114 | #define MDM2AP_STATUS 49 |
| 2115 | #define AP2MDM_STATUS 48 |
| 2116 | #define AP2MDM_PMIC_RESET_N 27 |
| 2117 | |
| 2118 | static struct resource mdm_resources[] = { |
| 2119 | { |
| 2120 | .start = MDM2AP_ERRFATAL, |
| 2121 | .end = MDM2AP_ERRFATAL, |
| 2122 | .name = "MDM2AP_ERRFATAL", |
| 2123 | .flags = IORESOURCE_IO, |
| 2124 | }, |
| 2125 | { |
| 2126 | .start = AP2MDM_ERRFATAL, |
| 2127 | .end = AP2MDM_ERRFATAL, |
| 2128 | .name = "AP2MDM_ERRFATAL", |
| 2129 | .flags = IORESOURCE_IO, |
| 2130 | }, |
| 2131 | { |
| 2132 | .start = MDM2AP_STATUS, |
| 2133 | .end = MDM2AP_STATUS, |
| 2134 | .name = "MDM2AP_STATUS", |
| 2135 | .flags = IORESOURCE_IO, |
| 2136 | }, |
| 2137 | { |
| 2138 | .start = AP2MDM_STATUS, |
| 2139 | .end = AP2MDM_STATUS, |
| 2140 | .name = "AP2MDM_STATUS", |
| 2141 | .flags = IORESOURCE_IO, |
| 2142 | }, |
| 2143 | { |
| 2144 | .start = AP2MDM_PMIC_RESET_N, |
| 2145 | .end = AP2MDM_PMIC_RESET_N, |
| 2146 | .name = "AP2MDM_PMIC_RESET_N", |
| 2147 | .flags = IORESOURCE_IO, |
| 2148 | }, |
| 2149 | }; |
| 2150 | |
| 2151 | struct platform_device mdm_8064_device = { |
| 2152 | .name = "mdm2_modem", |
| 2153 | .id = -1, |
| 2154 | .num_resources = ARRAY_SIZE(mdm_resources), |
| 2155 | .resource = mdm_resources, |
| 2156 | }; |
Praveen Chidambaram | 8ea3dcd | 2011-12-07 14:46:31 -0700 | [diff] [blame] | 2157 | |
| 2158 | static int apq8064_LPM_latency = 1000; /* >100 usec for WFI */ |
| 2159 | |
| 2160 | struct platform_device apq8064_cpu_idle_device = { |
| 2161 | .name = "msm_cpu_idle", |
| 2162 | .id = -1, |
| 2163 | .dev = { |
| 2164 | .platform_data = &apq8064_LPM_latency, |
| 2165 | }, |
| 2166 | }; |
Praveen Chidambaram | 5c8adf2 | 2012-02-23 18:44:37 -0700 | [diff] [blame] | 2167 | |
| 2168 | static struct msm_dcvs_freq_entry apq8064_freq[] = { |
| 2169 | { 384000, 166981, 345600}, |
| 2170 | { 702000, 213049, 632502}, |
| 2171 | {1026000, 285712, 925613}, |
| 2172 | {1242000, 383945, 1176550}, |
| 2173 | {1458000, 419729, 1465478}, |
| 2174 | {1512000, 434116, 1546674}, |
| 2175 | |
| 2176 | }; |
| 2177 | |
| 2178 | static struct msm_dcvs_core_info apq8064_core_info = { |
| 2179 | .freq_tbl = &apq8064_freq[0], |
| 2180 | .core_param = { |
| 2181 | .max_time_us = 100000, |
| 2182 | .num_freq = ARRAY_SIZE(apq8064_freq), |
| 2183 | }, |
| 2184 | .algo_param = { |
| 2185 | .slack_time_us = 58000, |
| 2186 | .scale_slack_time = 0, |
| 2187 | .scale_slack_time_pct = 0, |
| 2188 | .disable_pc_threshold = 1458000, |
| 2189 | .em_window_size = 100000, |
| 2190 | .em_max_util_pct = 97, |
| 2191 | .ss_window_size = 1000000, |
| 2192 | .ss_util_pct = 95, |
| 2193 | .ss_iobusy_conv = 100, |
| 2194 | }, |
| 2195 | }; |
| 2196 | |
| 2197 | struct platform_device apq8064_msm_gov_device = { |
| 2198 | .name = "msm_dcvs_gov", |
| 2199 | .id = -1, |
| 2200 | .dev = { |
| 2201 | .platform_data = &apq8064_core_info, |
| 2202 | }, |
| 2203 | }; |
Stepan Moskovchenko | 28662c5 | 2012-03-01 12:48:45 -0800 | [diff] [blame] | 2204 | |
| 2205 | static struct resource msm_cache_erp_resources[] = { |
| 2206 | { |
| 2207 | .name = "l1_irq", |
| 2208 | .start = SC_SICCPUXEXTFAULTIRPTREQ, |
| 2209 | .flags = IORESOURCE_IRQ, |
| 2210 | }, |
| 2211 | { |
| 2212 | .name = "l2_irq", |
| 2213 | .start = APCC_QGICL2IRPTREQ, |
| 2214 | .flags = IORESOURCE_IRQ, |
| 2215 | } |
| 2216 | }; |
| 2217 | |
| 2218 | struct platform_device apq8064_device_cache_erp = { |
| 2219 | .name = "msm_cache_erp", |
| 2220 | .id = -1, |
| 2221 | .num_resources = ARRAY_SIZE(msm_cache_erp_resources), |
| 2222 | .resource = msm_cache_erp_resources, |
| 2223 | }; |
Pratik Patel | 212ab36 | 2012-03-16 12:30:07 -0700 | [diff] [blame] | 2224 | |
| 2225 | #define MSM_QDSS_PHYS_BASE 0x01A00000 |
| 2226 | #define MSM_ETM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000) |
| 2227 | |
| 2228 | #define QDSS_SOURCE(src_name, fpm) { .name = src_name, .fport_mask = fpm, } |
| 2229 | |
| 2230 | static struct qdss_source msm_qdss_sources[] = { |
| 2231 | QDSS_SOURCE("msm_etm", 0x33), |
| 2232 | QDSS_SOURCE("msm_oxili", 0x80), |
| 2233 | }; |
| 2234 | |
| 2235 | static struct msm_qdss_platform_data qdss_pdata = { |
| 2236 | .src_table = msm_qdss_sources, |
| 2237 | .size = ARRAY_SIZE(msm_qdss_sources), |
| 2238 | .afamily = 1, |
| 2239 | }; |
| 2240 | |
| 2241 | struct platform_device apq8064_qdss_device = { |
| 2242 | .name = "msm_qdss", |
| 2243 | .id = -1, |
| 2244 | .dev = { |
| 2245 | .platform_data = &qdss_pdata, |
| 2246 | }, |
| 2247 | }; |
| 2248 | |
| 2249 | static struct resource msm_etm_resources[] = { |
| 2250 | { |
| 2251 | .start = MSM_ETM_PHYS_BASE, |
| 2252 | .end = MSM_ETM_PHYS_BASE + (SZ_4K * 4) - 1, |
| 2253 | .flags = IORESOURCE_MEM, |
| 2254 | }, |
| 2255 | }; |
| 2256 | |
| 2257 | struct platform_device apq8064_etm_device = { |
| 2258 | .name = "msm_etm", |
| 2259 | .id = 0, |
| 2260 | .num_resources = ARRAY_SIZE(msm_etm_resources), |
| 2261 | .resource = msm_etm_resources, |
| 2262 | }; |