blob: 0ba4abb7d76d10dba9a3a27cf6f39fe5e68094c9 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -07001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -070014/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -080015/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -070016/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -070017/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -070018/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -070019/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -070020/include/ "msm8226-bus.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070021
22/ {
23 model = "Qualcomm MSM 8226";
24 compatible = "qcom,msm8226";
25 interrupt-parent = <&intc>;
26
27 intc: interrupt-controller@f9000000 {
28 compatible = "qcom,msm-qgic2";
29 interrupt-controller;
30 #interrupt-cells = <3>;
31 reg = <0xF9000000 0x1000>,
32 <0xF9002000 0x1000>;
33 };
34
35 msmgpio: gpio@fd510000 {
36 compatible = "qcom,msm-gpio";
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080040 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070041 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080042 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080043 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080044 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070045 };
46
47 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080048 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070049 interrupts = <1 2 0 1 3 0>;
50 clock-frequency = <19200000>;
51 };
52
53 serial@f991f000 {
54 compatible = "qcom,msm-lsuart-v14";
55 reg = <0xf991f000 0x1000>;
56 interrupts = <0 109 0>;
57 status = "disabled";
58 };
59
60 serial@f995e000 {
61 compatible = "qcom,msm-lsuart-v14";
62 reg = <0xf995e000 0x1000>;
63 interrupts = <0 114 0>;
64 status = "disabled";
65 };
66
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -080067 qcom,msm-imem@fe805000 {
68 compatible = "qcom,msm-imem";
69 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
70 };
71
Yan He7c06ce32012-12-03 17:12:31 -080072 qcom,sps@f9984000 {
73 compatible = "qcom,msm_sps";
74 reg = <0xf9984000 0x15000>,
75 <0xf9999000 0xb000>;
76 interrupts = <0 94 0>;
77 };
78
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070079 usb@f9a55000 {
80 compatible = "qcom,hsusb-otg";
81 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +053082 interrupts = <0 134 0>, <0 140 0>;
83 interrupt-names = "core_irq", "async_irq";
David Keitel7184c6e2013-02-11 13:23:04 -080084 HSUSB_VDDCX-supply = <&pm8226_s1>;
85 HSUSB_1p8-supply = <&pm8226_l10>;
86 HSUSB_3p3-supply = <&pm8226_l20>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070087
88 qcom,hsusb-otg-phy-type = <2>;
89 qcom,hsusb-otg-mode = <1>;
90 qcom,hsusb-otg-otg-control = <1>;
91 qcom,hsusb-otg-disable-reset;
92 };
93
Mayank Rana6bd9a272013-01-29 16:23:23 +053094 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070095 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +053096 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070097 };
98
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -080099 wcd9xxx_intc: wcd9xxx-irq {
100 compatible = "qcom,wcd9xxx-irq";
101 interrupt-controller;
102 #interrupt-cells = <1>;
103 interrupt-parent = <&msmgpio>;
104 interrupts = <68 0>;
105 interrupt-names = "cdc-int";
106 };
107
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800108 slim@fe12f000 {
109 cell-index = <1>;
110 compatible = "qcom,slim-ngd";
111 reg = <0xfe12f000 0x35000>,
112 <0xfe104000 0x20000>;
113 reg-names = "slimbus_physical", "slimbus_bam_physical";
114 interrupts = <0 163 0>, <0 164 0>;
115 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800116
117 tapan_codec {
118 compatible = "qcom,tapan-slim-pgd";
119 elemental-addr = [00 01 E0 00 17 02];
120
121 interrupt-parent = <&wcd9xxx_intc>;
122 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
123 17 18 19 20 21 22 23 24 25 26 27 28>;
124 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
125
David Keitel7184c6e2013-02-11 13:23:04 -0800126 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800127 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
128 qcom,cdc-vdd-buck-current = <650000>;
129
David Keitel7184c6e2013-02-11 13:23:04 -0800130 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800131 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
132 qcom,cdc-vdd-h-current = <25000>;
133
David Keitel7184c6e2013-02-11 13:23:04 -0800134 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800135 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
136 qcom,cdc-vdd-px-current = <25000>;
137
David Keitel7184c6e2013-02-11 13:23:04 -0800138 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800139 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
140 qcom,cdc-vdd-a-1p2v-current = <10000>;
141
David Keitel7184c6e2013-02-11 13:23:04 -0800142 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800143 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
144 qcom,cdc-vdd-cx-current = <10000>;
145
146 qcom,cdc-micbias-ldoh-v = <0x3>;
147 qcom,cdc-micbias-cfilt1-mv = <1800>;
148 qcom,cdc-micbias-cfilt2-mv = <1800>;
149 qcom,cdc-micbias-cfilt3-mv = <1800>;
150
151 qcom,cdc-micbias1-cfilt-sel = <0x0>;
152 qcom,cdc-micbias2-cfilt-sel = <0x1>;
153 qcom,cdc-micbias3-cfilt-sel = <0x2>;
154
155 qcom,cdc-mclk-clk-rate = <9600000>;
156 qcom,cdc-slim-ifd = "tapan-slim-ifd";
157 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
158 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800159 };
160
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800161 qcom,msm-adsp-loader {
162 compatible = "qcom,adsp-loader";
163 qcom,adsp-state = <0>;
164 };
165
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800166 sound {
167 compatible = "qcom,msm8226-audio-tapan";
168 qcom,model = "msm8226-tapan-snd-card";
169
170 qcom,audio-routing =
171 "RX_BIAS", "MCLK",
172 "LDO_H", "MCLK",
173 "AMIC1", "MIC BIAS1 Internal1",
174 "MIC BIAS1 Internal1", "Handset Mic",
175 "AMIC2", "MIC BIAS2 External",
176 "MIC BIAS2 External", "Headset Mic",
177 "AMIC3", "MIC BIAS2 External",
178 "MIC BIAS2 External", "ANCRight Headset Mic",
179 "AMIC4", "MIC BIAS2 External",
180 "MIC BIAS2 External", "ANCLeft Headset Mic",
181 "DMIC1", "MIC BIAS1 External",
182 "MIC BIAS1 External", "Digital Mic1",
183 "DMIC2", "MIC BIAS1 External",
184 "MIC BIAS1 External", "Digital Mic2",
185 "DMIC3", "MIC BIAS3 External",
186 "MIC BIAS3 External", "Digital Mic3",
187 "DMIC4", "MIC BIAS3 External",
188 "MIC BIAS3 External", "Digital Mic4",
189 "DMIC5", "MIC BIAS4 External",
190 "MIC BIAS4 External", "Digital Mic5",
191 "DMIC6", "MIC BIAS4 External",
192 "MIC BIAS4 External", "Digital Mic6";
193 qcom,tapan-mclk-clk-freq = <9600000>;
194 };
195
196 qcom,msm-pcm {
197 compatible = "qcom,msm-pcm-dsp";
198 };
199
200 qcom,msm-pcm-routing {
201 compatible = "qcom,msm-pcm-routing";
202 };
203
204 qcom,msm-pcm-lpa {
205 compatible = "qcom,msm-pcm-lpa";
206 };
207
208 qcom,msm-compr-dsp {
209 compatible = "qcom,msm-compr-dsp";
210 };
211
212 qcom,msm-voip-dsp {
213 compatible = "qcom,msm-voip-dsp";
214 };
215
216 qcom,msm-pcm-voice {
217 compatible = "qcom,msm-pcm-voice";
218 };
219
220 qcom,msm-stub-codec {
221 compatible = "qcom,msm-stub-codec";
222 };
223
224 qcom,msm-dai-fe {
225 compatible = "qcom,msm-dai-fe";
226 };
227
228 qcom,msm-pcm-afe {
229 compatible = "qcom,msm-pcm-afe";
230 };
231
232 qcom,msm-dai-q6-hdmi {
233 compatible = "qcom,msm-dai-q6-hdmi";
234 qcom,msm-dai-q6-dev-id = <8>;
235 };
236
237 qcom,msm-dai-q6 {
238 compatible = "qcom,msm-dai-q6";
239 qcom,msm-dai-q6-sb-0-rx {
240 compatible = "qcom,msm-dai-q6-dev";
241 qcom,msm-dai-q6-dev-id = <16384>;
242 };
243
244 qcom,msm-dai-q6-sb-0-tx {
245 compatible = "qcom,msm-dai-q6-dev";
246 qcom,msm-dai-q6-dev-id = <16385>;
247 };
248
249 qcom,msm-dai-q6-sb-1-rx {
250 compatible = "qcom,msm-dai-q6-dev";
251 qcom,msm-dai-q6-dev-id = <16386>;
252 };
253
254 qcom,msm-dai-q6-sb-1-tx {
255 compatible = "qcom,msm-dai-q6-dev";
256 qcom,msm-dai-q6-dev-id = <16387>;
257 };
258
259 qcom,msm-dai-q6-sb-3-rx {
260 compatible = "qcom,msm-dai-q6-dev";
261 qcom,msm-dai-q6-dev-id = <16390>;
262 };
263
264 qcom,msm-dai-q6-sb-3-tx {
265 compatible = "qcom,msm-dai-q6-dev";
266 qcom,msm-dai-q6-dev-id = <16391>;
267 };
268
269 qcom,msm-dai-q6-sb-4-rx {
270 compatible = "qcom,msm-dai-q6-dev";
271 qcom,msm-dai-q6-dev-id = <16392>;
272 };
273
274 qcom,msm-dai-q6-sb-4-tx {
275 compatible = "qcom,msm-dai-q6-dev";
276 qcom,msm-dai-q6-dev-id = <16393>;
277 };
278
279 qcom,msm-dai-q6-bt-sco-rx {
280 compatible = "qcom,msm-dai-q6-dev";
281 qcom,msm-dai-q6-dev-id = <12288>;
282 };
283
284 qcom,msm-dai-q6-bt-sco-tx {
285 compatible = "qcom,msm-dai-q6-dev";
286 qcom,msm-dai-q6-dev-id = <12289>;
287 };
288
289 qcom,msm-dai-q6-int-fm-rx {
290 compatible = "qcom,msm-dai-q6-dev";
291 qcom,msm-dai-q6-dev-id = <12292>;
292 };
293
294 qcom,msm-dai-q6-int-fm-tx {
295 compatible = "qcom,msm-dai-q6-dev";
296 qcom,msm-dai-q6-dev-id = <12293>;
297 };
298
299 qcom,msm-dai-q6-be-afe-pcm-rx {
300 compatible = "qcom,msm-dai-q6-dev";
301 qcom,msm-dai-q6-dev-id = <224>;
302 };
303
304 qcom,msm-dai-q6-be-afe-pcm-tx {
305 compatible = "qcom,msm-dai-q6-dev";
306 qcom,msm-dai-q6-dev-id = <225>;
307 };
308
309 qcom,msm-dai-q6-afe-proxy-rx {
310 compatible = "qcom,msm-dai-q6-dev";
311 qcom,msm-dai-q6-dev-id = <241>;
312 };
313
314 qcom,msm-dai-q6-afe-proxy-tx {
315 compatible = "qcom,msm-dai-q6-dev";
316 qcom,msm-dai-q6-dev-id = <240>;
317 };
318 };
319
320 qcom,msm-pcm-hostless {
321 compatible = "qcom,msm-pcm-hostless";
322 };
323
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700324 qcom,wdt@f9017000 {
325 compatible = "qcom,msm-watchdog";
326 reg = <0xf9017000 0x1000>;
327 interrupts = <0 3 0>, <0 4 0>;
328 qcom,bark-time = <11000>;
329 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800330 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700331 };
332
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600333 qcom,smem@fa00000 {
334 compatible = "qcom,smem";
335 reg = <0xfa00000 0x200000>,
336 <0xfa006000 0x1000>,
337 <0xfc428000 0x4000>;
338 reg-names = "smem", "irq-reg-base", "aux-mem1";
339
340 qcom,smd-modem {
341 compatible = "qcom,smd";
342 qcom,smd-edge = <0>;
343 qcom,smd-irq-offset = <0x8>;
344 qcom,smd-irq-bitmask = <0x1000>;
345 qcom,pil-string = "modem";
346 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800347 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600348
349 qcom,smsm-modem {
350 compatible = "qcom,smsm";
351 qcom,smsm-edge = <0>;
352 qcom,smsm-irq-offset = <0x8>;
353 qcom,smsm-irq-bitmask = <0x2000>;
354 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800355 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600356
357 qcom,smd-adsp {
358 compatible = "qcom,smd";
359 qcom,smd-edge = <1>;
360 qcom,smd-irq-offset = <0x8>;
361 qcom,smd-irq-bitmask = <0x100>;
362 qcom,pil-string = "adsp";
363 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800364 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600365
366 qcom,smsm-adsp {
367 compatible = "qcom,smsm";
368 qcom,smsm-edge = <1>;
369 qcom,smsm-irq-offset = <0x8>;
370 qcom,smsm-irq-bitmask = <0x200>;
371 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800372 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600373
374 qcom,smd-wcnss {
375 compatible = "qcom,smd";
376 qcom,smd-edge = <6>;
377 qcom,smd-irq-offset = <0x8>;
378 qcom,smd-irq-bitmask = <0x20000>;
379 qcom,pil-string = "wcnss";
380 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800381 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600382
383 qcom,smsm-wcnss {
384 compatible = "qcom,smsm";
385 qcom,smsm-edge = <6>;
386 qcom,smsm-irq-offset = <0x8>;
387 qcom,smsm-irq-bitmask = <0x80000>;
388 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800389 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600390
391 qcom,smd-rpm {
392 compatible = "qcom,smd";
393 qcom,smd-edge = <15>;
394 qcom,smd-irq-offset = <0x8>;
395 qcom,smd-irq-bitmask = <0x1>;
396 interrupts = <0 168 1>;
397 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800398 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600399 };
400
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700401 rpm_bus: qcom,rpm-smd {
402 compatible = "qcom,rpm-smd";
403 rpm-channel-name = "rpm_requests";
404 rpm-channel-type = <15>; /* SMD_APPS_RPM */
405 rpm-standalone;
406 };
407
Asutosh Das99912e62012-12-06 12:38:46 +0530408 sdcc1: qcom,sdcc@f9824000 {
409 cell-index = <1>; /* SDC1 eMMC slot */
410 compatible = "qcom,msm-sdcc";
411
Asutosh Das6b82fc52012-11-23 12:00:26 +0530412 reg = <0xf9824000 0x800>,
413 <0xf9824800 0x100>,
414 <0xf9804000 0x7000>;
415 reg-names = "core_mem", "dml_mem", "bam_mem";
416 interrupts = <0 123 0>, <0 137 0>;
417 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530418
419 qcom,bus-width = <8>;
420 status = "disabled";
421 };
422
423 sdcc2: qcom,sdcc@f98a4000 {
424 cell-index = <2>; /* SDC2 SD card slot */
425 compatible = "qcom,msm-sdcc";
426
Asutosh Das6b82fc52012-11-23 12:00:26 +0530427 reg = <0xf98a4000 0x800>,
428 <0xf98a4800 0x100>,
429 <0xf9884000 0x7000>;
430 reg-names = "core_mem", "dml_mem", "bam_mem";
431 interrupts = <0 125 0>, <0 220 0>;
432 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530433
434 qcom,bus-width = <4>;
435 status = "disabled";
436 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700437
438 spmi_bus: qcom,spmi@fc4c0000 {
439 cell-index = <0>;
440 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700441 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700442 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700443 <0Xfc4cb000 0x1000>,
444 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700445 /* 190,ee0_krait_hlos_spmi_periph_irq */
446 /* 187,channel_0_krait_hlos_trans_done_irq */
447 interrupts = <0 190 0>, <0 187 0>;
448 qcom,not-wakeup;
449 qcom,pmic-arb-ee = <0>;
450 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700451 };
452
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700453 i2c@f9926000 { /* BLSP-1 QUP-4 */
454 cell-index = <0>;
455 compatible = "qcom,i2c-qup";
456 reg = <0xf9926000 0x1000>;
457 #address-cells = <1>;
458 #size-cells = <0>;
459 reg-names = "qup_phys_addr";
460 interrupts = <0 98 0>;
461 interrupt-names = "qup_err_intr";
462 qcom,i2c-bus-freq = <100000>;
463 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700464
465 qcom,acpuclk@f9011050 {
466 compatible = "qcom,acpuclk-a7";
467 reg = <0xf9011050 0x8>;
468 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800469 a7_cpu-supply = <&pm8226_s2>;
470 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700471 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700472
473 qcom,ocmem@fdd00000 {
474 compatible = "qcom,msm-ocmem";
475 reg = <0xfdd00000 0x2000>,
476 <0xfdd02000 0x2000>,
477 <0xfe039000 0x400>,
478 <0xfec00000 0x180000>;
479 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
480 interrupts = <0 76 0 0 77 0>;
481 interrupt-names = "ocmem_irq", "dm_irq";
482 qcom,ocmem-num-regions = <0x1>;
483 qcom,ocmem-num-macros = <0x2>;
484 qcom,resource-type = <0x706d636f>;
485 #address-cells = <1>;
486 #size-cells = <1>;
487 ranges = <0x0 0xfec00000 0x180000>;
488
489 partition@0 {
490 reg = <0x0 0x100000>;
491 qcom,ocmem-part-name = "graphics";
492 qcom,ocmem-part-min = <0x80000>;
493 };
494 };
495
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800496 qcom,venus@fdce0000 {
497 compatible = "qcom,pil-venus";
498 reg = <0xfdce0000 0x4000>,
499 <0xfdc80000 0x400>;
500 reg-names = "wrapper_base", "vbif_base";
501 vdd-supply = <&gdsc_venus>;
502
503 qcom,firmware-name = "venus";
504 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800505
506 qcom,pronto@fb21b000 {
507 compatible = "qcom,pil-pronto";
508 reg = <0xfb21b000 0x3000>,
509 <0xfc401700 0x4>,
510 <0xfd485300 0xc>;
511 reg-names = "pmu_base", "clk_base", "halt_base";
512 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800513 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800514
515 qcom,firmware-name = "wcnss";
516 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800517
Patrick Daly4df59842013-01-09 12:31:40 -0800518 qcom,lpass@fe200000 {
519 compatible = "qcom,pil-q6v5-lpass";
520 reg = <0xfe200000 0x00100>,
521 <0xfd485100 0x00010>;
522 reg-names = "qdsp6_base", "halt_base";
Patrick Dalyea7111c2013-02-08 17:48:20 -0800523 vdd_cx-supply = <&pm8026_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800524 interrupts = <0 162 1>;
525
526 qcom,firmware-name = "adsp";
527 };
528
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800529 qcom,msm-mem-hole {
530 compatible = "qcom,msm-mem-hole";
531 qcom,memblock-remove = <0x8100000 0x7e00000>; /* Address and Size of Hole */
532 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800533
534 tsens: tsens@fc4a8000 {
535 compatible = "qcom,msm-tsens";
536 reg = <0xfc4a8000 0x2000>,
537 <0xfc4b8000 0x1000>;
538 reg-names = "tsens_physical", "tsens_eeprom_physical";
539 interrupts = <0 184 0>;
540 qcom,sensors = <7>;
541 qcom,slope = <3200 3200 3200 3200 3200 3200 3200>;
542 qcom,calib-mode = "fuse_map2";
543 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700544
545 qcom,msm-thermal {
546 compatible = "qcom,msm-thermal";
547 qcom,sensor-id = <0>;
548 qcom,poll-ms = <250>;
549 qcom,limit-temp = <60>;
550 qcom,temp-hysteresis = <10>;
551 qcom,freq-step = <2>;
552 };
553
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700554};
David Collins37ddb972012-10-17 15:00:26 -0700555
Patrick Dalye8977aa2012-11-06 15:25:58 -0800556&gdsc_venus {
557 status = "ok";
558};
559
560&gdsc_mdss {
561 status = "ok";
562};
563
564&gdsc_jpeg {
565 status = "ok";
566};
567
568&gdsc_vfe {
569 status = "ok";
570};
571
572&gdsc_oxili_cx {
573 status = "ok";
574};
575
576&gdsc_usb_hsic {
577 status = "ok";
578};
579
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700580/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800581/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800582
583&pm8226_vadc {
584 chan@0 {
585 label = "usb_in";
586 reg = <0>;
587 qcom,decimation = <0>;
588 qcom,pre-div-channel-scaling = <4>;
589 qcom,calibration-type = "absolute";
590 qcom,scale-function = <0>;
591 qcom,hw-settle-time = <0>;
592 qcom,fast-avg-setup = <0>;
593 };
594
595 chan@2 {
596 label = "vchg_sns";
597 reg = <2>;
598 qcom,decimation = <0>;
599 qcom,pre-div-channel-scaling = <3>;
600 qcom,calibration-type = "absolute";
601 qcom,scale-function = <0>;
602 qcom,hw-settle-time = <0>;
603 qcom,fast-avg-setup = <0>;
604 };
605
606 chan@5 {
607 label = "vcoin";
608 reg = <5>;
609 qcom,decimation = <0>;
610 qcom,pre-div-channel-scaling = <1>;
611 qcom,calibration-type = "absolute";
612 qcom,scale-function = <0>;
613 qcom,hw-settle-time = <0>;
614 qcom,fast-avg-setup = <0>;
615 };
616
617 chan@6 {
618 label = "vbat_sns";
619 reg = <6>;
620 qcom,decimation = <0>;
621 qcom,pre-div-channel-scaling = <1>;
622 qcom,calibration-type = "absolute";
623 qcom,scale-function = <0>;
624 qcom,hw-settle-time = <0>;
625 qcom,fast-avg-setup = <0>;
626 };
627
628 chan@7 {
629 label = "vph_pwr";
630 reg = <7>;
631 qcom,decimation = <0>;
632 qcom,pre-div-channel-scaling = <1>;
633 qcom,calibration-type = "absolute";
634 qcom,scale-function = <0>;
635 qcom,hw-settle-time = <0>;
636 qcom,fast-avg-setup = <0>;
637 };
638
639 chan@30 {
640 label = "batt_therm";
641 reg = <0x30>;
642 qcom,decimation = <0>;
643 qcom,pre-div-channel-scaling = <0>;
644 qcom,calibration-type = "ratiometric";
645 qcom,scale-function = <1>;
646 qcom,hw-settle-time = <0>;
647 qcom,fast-avg-setup = <0>;
648 };
649
650 chan@31 {
651 label = "batt_id";
652 reg = <0x31>;
653 qcom,decimation = <0>;
654 qcom,pre-div-channel-scaling = <0>;
655 qcom,calibration-type = "ratiometric";
656 qcom,scale-function = <0>;
657 qcom,hw-settle-time = <2>;
658 qcom,fast-avg-setup = <0>;
659 };
660
661 chan@b2 {
662 label = "xo_therm_pu2";
663 reg = <0xb2>;
664 qcom,decimation = <0>;
665 qcom,pre-div-channel-scaling = <0>;
666 qcom,calibration-type = "ratiometric";
667 qcom,scale-function = <4>;
668 qcom,hw-settle-time = <0>;
669 qcom,fast-avg-setup = <0>;
670 };
671};