Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 14 | |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/mutex.h> |
| 22 | #include <linux/types.h> |
| 23 | #include <linux/hwmon.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/debugfs.h> |
| 26 | #include <linux/spmi.h> |
| 27 | #include <linux/of_irq.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/completion.h> |
| 30 | #include <linux/hwmon-sysfs.h> |
| 31 | #include <linux/qpnp/qpnp-adc.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | |
| 34 | /* QPNP VADC register definition */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 35 | #define QPNP_VADC_REVISION1 0x0 |
| 36 | #define QPNP_VADC_REVISION2 0x1 |
| 37 | #define QPNP_VADC_REVISION3 0x2 |
| 38 | #define QPNP_VADC_REVISION4 0x3 |
| 39 | #define QPNP_VADC_PERPH_TYPE 0x4 |
| 40 | #define QPNP_VADC_PERH_SUBTYPE 0x5 |
| 41 | |
| 42 | #define QPNP_VADC_SUPPORTED_REVISION2 1 |
| 43 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 44 | #define QPNP_VADC_STATUS1 0x8 |
| 45 | #define QPNP_VADC_STATUS1_OP_MODE 4 |
| 46 | #define QPNP_VADC_STATUS1_MEAS_INTERVAL_EN_STS BIT(2) |
| 47 | #define QPNP_VADC_STATUS1_REQ_STS BIT(1) |
| 48 | #define QPNP_VADC_STATUS1_EOC BIT(0) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 49 | #define QPNP_VADC_STATUS1_REQ_STS_EOC_MASK 0x3 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 50 | #define QPNP_VADC_STATUS2 0x9 |
| 51 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE 6 |
| 52 | #define QPNP_VADC_STATUS2_FIFO_NOT_EMPTY_FLAG BIT(1) |
| 53 | #define QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS BIT(0) |
| 54 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT 4 |
| 55 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 56 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 57 | #define QPNP_VADC_MODE_CTL 0x40 |
| 58 | #define QPNP_VADC_OP_MODE_SHIFT 4 |
| 59 | #define QPNP_VADC_VREF_XO_THM_FORCE BIT(2) |
| 60 | #define QPNP_VADC_AMUX_TRIM_EN BIT(1) |
| 61 | #define QPNP_VADC_ADC_TRIM_EN BIT(0) |
| 62 | #define QPNP_VADC_EN_CTL1 0x46 |
| 63 | #define QPNP_VADC_ADC_EN BIT(7) |
| 64 | #define QPNP_VADC_ADC_CH_SEL_CTL 0x48 |
| 65 | #define QPNP_VADC_ADC_DIG_PARAM 0x50 |
| 66 | #define QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT 3 |
| 67 | #define QPNP_VADC_HW_SETTLE_DELAY 0x51 |
| 68 | #define QPNP_VADC_CONV_REQ 0x52 |
| 69 | #define QPNP_VADC_CONV_REQ_SET BIT(7) |
| 70 | #define QPNP_VADC_CONV_SEQ_CTL 0x54 |
| 71 | #define QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT 4 |
| 72 | #define QPNP_VADC_CONV_SEQ_TRIG_CTL 0x55 |
| 73 | #define QPNP_VADC_CONV_SEQ_FALLING_EDGE 0x0 |
| 74 | #define QPNP_VADC_CONV_SEQ_RISING_EDGE 0x1 |
| 75 | #define QPNP_VADC_CONV_SEQ_EDGE_SHIFT 7 |
| 76 | #define QPNP_VADC_FAST_AVG_CTL 0x5a |
| 77 | |
| 78 | #define QPNP_VADC_M0_LOW_THR_LSB 0x5c |
| 79 | #define QPNP_VADC_M0_LOW_THR_MSB 0x5d |
| 80 | #define QPNP_VADC_M0_HIGH_THR_LSB 0x5e |
| 81 | #define QPNP_VADC_M0_HIGH_THR_MSB 0x5f |
| 82 | #define QPNP_VADC_M1_LOW_THR_LSB 0x69 |
| 83 | #define QPNP_VADC_M1_LOW_THR_MSB 0x6a |
| 84 | #define QPNP_VADC_M1_HIGH_THR_LSB 0x6b |
| 85 | #define QPNP_VADC_M1_HIGH_THR_MSB 0x6c |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 86 | #define QPNP_VADC_ACCESS 0xd0 |
| 87 | #define QPNP_VADC_ACCESS_DATA 0xa5 |
| 88 | #define QPNP_VADC_PERH_RESET_CTL3 0xda |
| 89 | #define QPNP_FOLLOW_OTST2_RB BIT(3) |
| 90 | #define QPNP_FOLLOW_WARM_RB BIT(2) |
| 91 | #define QPNP_FOLLOW_SHUTDOWN1_RB BIT(1) |
| 92 | #define QPNP_FOLLOW_SHUTDOWN2_RB BIT(0) |
| 93 | |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 94 | #define QPNP_INT_TEST_VAL 0xE1 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 95 | |
| 96 | #define QPNP_VADC_DATA0 0x60 |
| 97 | #define QPNP_VADC_DATA1 0x61 |
| 98 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 99 | #define QPNP_VADC_CONV_TIME_MIN 2000 |
| 100 | #define QPNP_VADC_CONV_TIME_MAX 2100 |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 101 | #define QPNP_ADC_COMPLETION_TIMEOUT HZ |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 102 | #define QPNP_VADC_ERR_COUNT 20 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 103 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 104 | struct qpnp_vadc_chip { |
| 105 | struct device *dev; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 106 | struct qpnp_adc_drv *adc; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 107 | struct list_head list; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 108 | struct dentry *dent; |
| 109 | struct device *vadc_hwmon; |
| 110 | bool vadc_init_calib; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 111 | int max_channels_available; |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 112 | bool vadc_iadc_sync_lock; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 113 | u8 id; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 114 | struct work_struct trigger_completion_work; |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 115 | bool vadc_poll_eoc; |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 116 | u8 revision_ana_minor; |
| 117 | u8 revision_dig_major; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 118 | struct sensor_device_attribute sens_attr[0]; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 119 | }; |
| 120 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 121 | LIST_HEAD(qpnp_vadc_device_list); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 122 | |
| 123 | static struct qpnp_vadc_scale_fn vadc_scale_fn[] = { |
| 124 | [SCALE_DEFAULT] = {qpnp_adc_scale_default}, |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 125 | [SCALE_BATT_THERM] = {qpnp_adc_scale_batt_therm}, |
| 126 | [SCALE_PMIC_THERM] = {qpnp_adc_scale_pmic_therm}, |
| 127 | [SCALE_XOTHERM] = {qpnp_adc_tdkntcg_therm}, |
Siddartha Mohanadoss | e77edf1 | 2012-09-13 14:26:32 -0700 | [diff] [blame] | 128 | [SCALE_THERM_100K_PULLUP] = {qpnp_adc_scale_therm_pu2}, |
| 129 | [SCALE_THERM_150K_PULLUP] = {qpnp_adc_scale_therm_pu1}, |
Siddartha Mohanadoss | b99cfa9 | 2013-05-01 20:19:58 -0700 | [diff] [blame] | 130 | [SCALE_QRD_BATT_THERM] = {qpnp_adc_scale_qrd_batt_therm}, |
Xu Kai | 81c6052 | 2013-07-27 14:26:04 +0800 | [diff] [blame] | 131 | [SCALE_QRD_SKUAA_BATT_THERM] = {qpnp_adc_scale_qrd_skuaa_batt_therm}, |
Wu Fenglin | 2c6ef8f | 2013-12-17 11:33:33 +0800 | [diff] [blame] | 132 | [SCALE_QRD_SKUG_BATT_THERM] = {qpnp_adc_scale_qrd_skug_batt_therm}, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 133 | }; |
| 134 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 135 | static int32_t qpnp_vadc_read_reg(struct qpnp_vadc_chip *vadc, int16_t reg, |
| 136 | u8 *data) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 137 | { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 138 | int rc; |
| 139 | |
| 140 | rc = spmi_ext_register_readl(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 141 | (vadc->adc->offset + reg), data, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 142 | if (rc < 0) { |
| 143 | pr_err("qpnp adc read reg %d failed with %d\n", reg, rc); |
| 144 | return rc; |
| 145 | } |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 150 | static int32_t qpnp_vadc_write_reg(struct qpnp_vadc_chip *vadc, int16_t reg, |
| 151 | u8 data) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 152 | { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 153 | int rc; |
| 154 | u8 *buf; |
| 155 | |
| 156 | buf = &data; |
| 157 | |
| 158 | rc = spmi_ext_register_writel(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 159 | (vadc->adc->offset + reg), buf, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 160 | if (rc < 0) { |
| 161 | pr_err("qpnp adc write reg %d failed with %d\n", reg, rc); |
| 162 | return rc; |
| 163 | } |
| 164 | |
| 165 | return 0; |
| 166 | } |
| 167 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 168 | static int32_t qpnp_vadc_warm_rst_configure(struct qpnp_vadc_chip *vadc) |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 169 | { |
| 170 | int rc = 0; |
| 171 | u8 data = 0; |
| 172 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 173 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_ACCESS, QPNP_VADC_ACCESS_DATA); |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 174 | if (rc < 0) { |
| 175 | pr_err("VADC write access failed\n"); |
| 176 | return rc; |
| 177 | } |
| 178 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 179 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_PERH_RESET_CTL3, &data); |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 180 | if (rc < 0) { |
| 181 | pr_err("VADC perh reset ctl3 read failed\n"); |
| 182 | return rc; |
| 183 | } |
| 184 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 185 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_ACCESS, QPNP_VADC_ACCESS_DATA); |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 186 | if (rc < 0) { |
| 187 | pr_err("VADC write access failed\n"); |
| 188 | return rc; |
| 189 | } |
| 190 | |
| 191 | data |= QPNP_FOLLOW_WARM_RB; |
| 192 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 193 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_PERH_RESET_CTL3, data); |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 194 | if (rc < 0) { |
| 195 | pr_err("VADC perh reset ctl3 write failed\n"); |
| 196 | return rc; |
| 197 | } |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 202 | static int32_t qpnp_vadc_enable(struct qpnp_vadc_chip *vadc, bool state) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 203 | { |
| 204 | int rc = 0; |
| 205 | u8 data = 0; |
| 206 | |
| 207 | data = QPNP_VADC_ADC_EN; |
| 208 | if (state) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 209 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_EN_CTL1, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 210 | data); |
| 211 | if (rc < 0) { |
| 212 | pr_err("VADC enable failed\n"); |
| 213 | return rc; |
| 214 | } |
| 215 | } else { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 216 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_EN_CTL1, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 217 | (~data & QPNP_VADC_ADC_EN)); |
| 218 | if (rc < 0) { |
| 219 | pr_err("VADC disable failed\n"); |
| 220 | return rc; |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 227 | static int32_t qpnp_vadc_status_debug(struct qpnp_vadc_chip *vadc) |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 228 | { |
| 229 | int rc = 0; |
| 230 | u8 mode = 0, status1 = 0, chan = 0, dig = 0, en = 0, status2 = 0; |
| 231 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 232 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_MODE_CTL, &mode); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 233 | if (rc < 0) { |
| 234 | pr_err("mode ctl register read failed with %d\n", rc); |
| 235 | return rc; |
| 236 | } |
| 237 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 238 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_ADC_DIG_PARAM, &dig); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 239 | if (rc < 0) { |
| 240 | pr_err("digital param read failed with %d\n", rc); |
| 241 | return rc; |
| 242 | } |
| 243 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 244 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_ADC_CH_SEL_CTL, &chan); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 245 | if (rc < 0) { |
| 246 | pr_err("channel read failed with %d\n", rc); |
| 247 | return rc; |
| 248 | } |
| 249 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 250 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 251 | if (rc < 0) { |
| 252 | pr_err("status1 read failed with %d\n", rc); |
| 253 | return rc; |
| 254 | } |
| 255 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 256 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS2, &status2); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 257 | if (rc < 0) { |
| 258 | pr_err("status2 read failed with %d\n", rc); |
| 259 | return rc; |
| 260 | } |
| 261 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 262 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_EN_CTL1, &en); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 263 | if (rc < 0) { |
| 264 | pr_err("en read failed with %d\n", rc); |
| 265 | return rc; |
| 266 | } |
| 267 | |
| 268 | pr_err("EOC not set - status1/2:%x/%x, dig:%x, ch:%x, mode:%x, en:%x\n", |
| 269 | status1, status2, dig, chan, mode, en); |
| 270 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 271 | rc = qpnp_vadc_enable(vadc, false); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 272 | if (rc < 0) { |
| 273 | pr_err("VADC disable failed with %d\n", rc); |
| 274 | return rc; |
| 275 | } |
| 276 | |
| 277 | return 0; |
| 278 | } |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 279 | static int32_t qpnp_vadc_configure(struct qpnp_vadc_chip *vadc, |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 280 | struct qpnp_adc_amux_properties *chan_prop) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 281 | { |
| 282 | u8 decimation = 0, conv_sequence = 0, conv_sequence_trig = 0; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 283 | u8 mode_ctrl = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 284 | int rc = 0; |
| 285 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 286 | /* Mode selection */ |
Siddartha Mohanadoss | 429b449 | 2012-12-11 13:29:58 -0800 | [diff] [blame] | 287 | mode_ctrl |= ((chan_prop->mode_sel << QPNP_VADC_OP_MODE_SHIFT) | |
| 288 | (QPNP_VADC_ADC_TRIM_EN | QPNP_VADC_AMUX_TRIM_EN)); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 289 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_MODE_CTL, mode_ctrl); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 290 | if (rc < 0) { |
| 291 | pr_err("Mode configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 292 | return rc; |
| 293 | } |
| 294 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 295 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 296 | /* Channel selection */ |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 297 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_ADC_CH_SEL_CTL, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 298 | chan_prop->amux_channel); |
| 299 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 300 | pr_err("Channel configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 301 | return rc; |
| 302 | } |
| 303 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 304 | /* Digital parameter setup */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 305 | decimation = chan_prop->decimation << |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 306 | QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 307 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_ADC_DIG_PARAM, decimation); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 308 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 309 | pr_err("Digital parameter configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 310 | return rc; |
| 311 | } |
| 312 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 313 | /* HW settling time delay */ |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 314 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_HW_SETTLE_DELAY, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 315 | chan_prop->hw_settle_time); |
| 316 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 317 | pr_err("HW settling time setup error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 318 | return rc; |
| 319 | } |
| 320 | |
| 321 | if (chan_prop->mode_sel == (ADC_OP_NORMAL_MODE << |
| 322 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 323 | /* Normal measurement mode */ |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 324 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_FAST_AVG_CTL, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 325 | chan_prop->fast_avg_setup); |
| 326 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 327 | pr_err("Fast averaging configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 328 | return rc; |
| 329 | } |
| 330 | } else if (chan_prop->mode_sel == (ADC_OP_CONVERSION_SEQUENCER << |
| 331 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 332 | /* Conversion sequence mode */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 333 | conv_sequence = ((ADC_SEQ_HOLD_100US << |
| 334 | QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT) | |
| 335 | ADC_CONV_SEQ_TIMEOUT_5MS); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 336 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_CONV_SEQ_CTL, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 337 | conv_sequence); |
| 338 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 339 | pr_err("Conversion sequence error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 340 | return rc; |
| 341 | } |
| 342 | |
| 343 | conv_sequence_trig = ((QPNP_VADC_CONV_SEQ_RISING_EDGE << |
| 344 | QPNP_VADC_CONV_SEQ_EDGE_SHIFT) | |
| 345 | chan_prop->trigger_channel); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 346 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_CONV_SEQ_TRIG_CTL, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 347 | conv_sequence_trig); |
| 348 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 349 | pr_err("Conversion trigger error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 350 | return rc; |
| 351 | } |
| 352 | } |
| 353 | |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 354 | if (!vadc->vadc_poll_eoc) |
| 355 | INIT_COMPLETION(vadc->adc->adc_rslt_completion); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 356 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 357 | rc = qpnp_vadc_enable(vadc, true); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 358 | if (rc) |
| 359 | return rc; |
| 360 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 361 | if (!vadc->vadc_iadc_sync_lock) { |
| 362 | /* Request conversion */ |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 363 | rc = qpnp_vadc_write_reg(vadc, QPNP_VADC_CONV_REQ, |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 364 | QPNP_VADC_CONV_REQ_SET); |
| 365 | if (rc < 0) { |
| 366 | pr_err("Request conversion failed\n"); |
| 367 | return rc; |
| 368 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 369 | } |
| 370 | |
| 371 | return 0; |
| 372 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 373 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 374 | static int32_t qpnp_vadc_read_conversion_result(struct qpnp_vadc_chip *vadc, |
| 375 | int32_t *data) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 376 | { |
| 377 | uint8_t rslt_lsb, rslt_msb; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 378 | int rc = 0, status = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 379 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 380 | status = qpnp_vadc_read_reg(vadc, QPNP_VADC_DATA0, &rslt_lsb); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 381 | if (status < 0) { |
| 382 | pr_err("qpnp adc result read failed for data0\n"); |
| 383 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 384 | } |
| 385 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 386 | status = qpnp_vadc_read_reg(vadc, QPNP_VADC_DATA1, &rslt_msb); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 387 | if (status < 0) { |
| 388 | pr_err("qpnp adc result read failed for data1\n"); |
| 389 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 390 | } |
| 391 | |
| 392 | *data = (rslt_msb << 8) | rslt_lsb; |
| 393 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 394 | status = qpnp_vadc_check_result(data); |
| 395 | if (status < 0) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 396 | pr_err("VADC data check failed\n"); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 397 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 398 | } |
| 399 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 400 | fail: |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 401 | rc = qpnp_vadc_enable(vadc, false); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 402 | if (rc) |
| 403 | return rc; |
| 404 | |
| 405 | return status; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 406 | } |
| 407 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 408 | static int32_t qpnp_vadc_read_status(struct qpnp_vadc_chip *vadc, int mode_sel) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 409 | { |
| 410 | u8 status1, status2, status2_conv_seq_state; |
| 411 | u8 status_err = QPNP_VADC_CONV_TIMEOUT_ERR; |
| 412 | int rc; |
| 413 | |
| 414 | switch (mode_sel) { |
| 415 | case (ADC_OP_CONVERSION_SEQUENCER << QPNP_VADC_OP_MODE_SHIFT): |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 416 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 417 | if (rc) { |
| 418 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 419 | return rc; |
| 420 | } |
| 421 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 422 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS2, &status2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 423 | if (rc) { |
| 424 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 425 | return rc; |
| 426 | } |
| 427 | |
| 428 | if (!(status2 & ~QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS) && |
| 429 | (status1 & (~QPNP_VADC_STATUS1_REQ_STS | |
| 430 | QPNP_VADC_STATUS1_EOC))) { |
| 431 | rc = status_err; |
| 432 | return rc; |
| 433 | } |
| 434 | |
| 435 | status2_conv_seq_state = status2 >> |
| 436 | QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT; |
| 437 | if (status2_conv_seq_state != ADC_CONV_SEQ_IDLE) { |
| 438 | pr_err("qpnp vadc seq error with status %d\n", |
| 439 | status2); |
| 440 | rc = -EINVAL; |
| 441 | return rc; |
| 442 | } |
| 443 | } |
| 444 | |
| 445 | return 0; |
| 446 | } |
| 447 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 448 | static int qpnp_vadc_is_valid(struct qpnp_vadc_chip *vadc) |
| 449 | { |
| 450 | struct qpnp_vadc_chip *vadc_chip = NULL; |
| 451 | |
| 452 | list_for_each_entry(vadc_chip, &qpnp_vadc_device_list, list) |
| 453 | if (vadc == vadc_chip) |
| 454 | return 0; |
| 455 | |
| 456 | return -EINVAL; |
| 457 | } |
| 458 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 459 | static void qpnp_vadc_work(struct work_struct *work) |
| 460 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 461 | struct qpnp_vadc_chip *vadc = container_of(work, |
| 462 | struct qpnp_vadc_chip, trigger_completion_work); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 463 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 464 | if (qpnp_vadc_is_valid(vadc) < 0) |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 465 | return; |
| 466 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 467 | complete(&vadc->adc->adc_rslt_completion); |
| 468 | |
| 469 | return; |
| 470 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 471 | |
| 472 | static irqreturn_t qpnp_vadc_isr(int irq, void *dev_id) |
| 473 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 474 | struct qpnp_vadc_chip *vadc = dev_id; |
| 475 | |
| 476 | schedule_work(&vadc->trigger_completion_work); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 477 | |
| 478 | return IRQ_HANDLED; |
| 479 | } |
| 480 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 481 | static int32_t qpnp_vadc_version_check(struct qpnp_vadc_chip *dev) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 482 | { |
| 483 | uint8_t revision; |
| 484 | int rc; |
| 485 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 486 | rc = qpnp_vadc_read_reg(dev, QPNP_VADC_REVISION2, &revision); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 487 | if (rc < 0) { |
| 488 | pr_err("qpnp adc result read failed with %d\n", rc); |
| 489 | return rc; |
| 490 | } |
| 491 | |
| 492 | if (revision < QPNP_VADC_SUPPORTED_REVISION2) { |
| 493 | pr_err("VADC Version not supported\n"); |
| 494 | return -EINVAL; |
| 495 | } |
| 496 | |
| 497 | return 0; |
| 498 | } |
| 499 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 500 | #define QPNP_VBAT_COEFF_1 3000 |
| 501 | #define QPNP_VBAT_COEFF_2 45810000 |
| 502 | #define QPNP_VBAT_COEFF_3 100000 |
| 503 | #define QPNP_VBAT_COEFF_4 3500 |
| 504 | #define QPNP_VBAT_COEFF_5 80000000 |
| 505 | #define QPNP_VBAT_COEFF_6 4400 |
| 506 | #define QPNP_VBAT_COEFF_7 32200000 |
| 507 | #define QPNP_VBAT_COEFF_8 3880 |
| 508 | #define QPNP_VBAT_COEFF_9 5770 |
| 509 | #define QPNP_VBAT_COEFF_10 3660 |
| 510 | #define QPNP_VBAT_COEFF_11 5320 |
| 511 | #define QPNP_VBAT_COEFF_12 8060000 |
| 512 | #define QPNP_VBAT_COEFF_13 102640000 |
| 513 | #define QPNP_VBAT_COEFF_14 22220000 |
| 514 | #define QPNP_VBAT_COEFF_15 83060000 |
| 515 | |
| 516 | #define QPNP_VADC_REV_ID_8941_3_1 1 |
| 517 | #define QPNP_VADC_REV_ID_8026_1_0 2 |
| 518 | #define QPNP_VADC_REV_ID_8026_2_0 3 |
| 519 | |
| 520 | static void qpnp_temp_comp_version_check(struct qpnp_vadc_chip *vadc, |
| 521 | int32_t *version) |
| 522 | { |
| 523 | if (vadc->revision_dig_major == 3 && |
| 524 | vadc->revision_ana_minor == 2) |
| 525 | *version = QPNP_VADC_REV_ID_8941_3_1; |
| 526 | else if (vadc->revision_dig_major == 1 && |
| 527 | vadc->revision_ana_minor == 2) |
| 528 | *version = QPNP_VADC_REV_ID_8026_1_0; |
| 529 | else if (vadc->revision_dig_major == 2 && |
| 530 | vadc->revision_ana_minor == 2) |
| 531 | *version = QPNP_VADC_REV_ID_8026_2_0; |
| 532 | else |
| 533 | *version = -EINVAL; |
| 534 | |
| 535 | return; |
| 536 | } |
| 537 | |
| 538 | static int32_t qpnp_ocv_comp(int64_t *result, |
| 539 | struct qpnp_vadc_chip *vadc, int64_t die_temp) |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 540 | { |
| 541 | int64_t temp_var = 0; |
Xiaozhe Shi | 62ad5e1 | 2013-05-13 12:37:41 -0700 | [diff] [blame] | 542 | int64_t old = *result; |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 543 | int32_t version; |
| 544 | |
| 545 | qpnp_temp_comp_version_check(vadc, &version); |
| 546 | if (version == -EINVAL) |
| 547 | return 0; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 548 | |
| 549 | if (die_temp < 25000) |
| 550 | return 0; |
| 551 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 552 | if (die_temp > 60000) |
| 553 | die_temp = 60000; |
| 554 | |
| 555 | switch (version) { |
| 556 | case QPNP_VADC_REV_ID_8941_3_1: |
| 557 | switch (vadc->id) { |
| 558 | case COMP_ID_TSMC: |
| 559 | temp_var = (((die_temp * |
| 560 | (-QPNP_VBAT_COEFF_4)) |
| 561 | + QPNP_VBAT_COEFF_5)); |
| 562 | break; |
| 563 | default: |
| 564 | case COMP_ID_GF: |
| 565 | temp_var = (((die_temp * |
| 566 | (-QPNP_VBAT_COEFF_1)) |
| 567 | + QPNP_VBAT_COEFF_2)); |
| 568 | break; |
| 569 | } |
| 570 | break; |
| 571 | case QPNP_VADC_REV_ID_8026_1_0: |
| 572 | switch (vadc->id) { |
| 573 | case COMP_ID_TSMC: |
| 574 | temp_var = (((die_temp * |
| 575 | (-QPNP_VBAT_COEFF_10)) |
| 576 | - QPNP_VBAT_COEFF_14)); |
| 577 | break; |
| 578 | default: |
| 579 | case COMP_ID_GF: |
| 580 | temp_var = (((die_temp * |
| 581 | (-QPNP_VBAT_COEFF_8)) |
| 582 | + QPNP_VBAT_COEFF_12)); |
| 583 | break; |
| 584 | } |
| 585 | break; |
| 586 | case QPNP_VADC_REV_ID_8026_2_0: |
| 587 | switch (vadc->id) { |
| 588 | case COMP_ID_TSMC: |
| 589 | temp_var = ((die_temp - 2500) * |
| 590 | (-QPNP_VBAT_COEFF_10)); |
| 591 | break; |
| 592 | default: |
| 593 | case COMP_ID_GF: |
| 594 | temp_var = ((die_temp - 2500) * |
| 595 | (-QPNP_VBAT_COEFF_8)); |
| 596 | break; |
| 597 | } |
| 598 | break; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 599 | default: |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 600 | temp_var = 0; |
| 601 | break; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 602 | } |
| 603 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 604 | temp_var = div64_s64(temp_var, QPNP_VBAT_COEFF_3); |
| 605 | |
| 606 | temp_var = 1000000 + temp_var; |
| 607 | |
| 608 | *result = *result * temp_var; |
| 609 | |
| 610 | *result = div64_s64(*result, 1000000); |
| 611 | pr_debug("%lld compensated into %lld\n", old, *result); |
| 612 | |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | static int32_t qpnp_vbat_sns_comp(int64_t *result, |
| 617 | struct qpnp_vadc_chip *vadc, int64_t die_temp) |
| 618 | { |
| 619 | int64_t temp_var = 0; |
| 620 | int64_t old = *result; |
| 621 | int32_t version; |
| 622 | |
| 623 | qpnp_temp_comp_version_check(vadc, &version); |
| 624 | if (version == -EINVAL) |
| 625 | return 0; |
| 626 | |
| 627 | if (die_temp < 25000) |
| 628 | return 0; |
| 629 | |
| 630 | /* min(die_temp_c, 60_degC) */ |
| 631 | if (die_temp > 60000) |
| 632 | die_temp = 60000; |
| 633 | |
| 634 | switch (version) { |
| 635 | case QPNP_VADC_REV_ID_8941_3_1: |
| 636 | switch (vadc->id) { |
| 637 | case COMP_ID_TSMC: |
| 638 | temp_var = (die_temp * |
| 639 | (-QPNP_VBAT_COEFF_1)); |
| 640 | break; |
| 641 | default: |
| 642 | case COMP_ID_GF: |
| 643 | temp_var = (((die_temp * |
| 644 | (-QPNP_VBAT_COEFF_6)) |
| 645 | + QPNP_VBAT_COEFF_7)); |
| 646 | break; |
| 647 | } |
| 648 | break; |
| 649 | case QPNP_VADC_REV_ID_8026_1_0: |
| 650 | switch (vadc->id) { |
| 651 | case COMP_ID_TSMC: |
| 652 | temp_var = (((die_temp * |
| 653 | (-QPNP_VBAT_COEFF_11)) |
| 654 | + QPNP_VBAT_COEFF_15)); |
| 655 | break; |
| 656 | default: |
| 657 | case COMP_ID_GF: |
| 658 | temp_var = (((die_temp * |
| 659 | (-QPNP_VBAT_COEFF_9)) |
| 660 | + QPNP_VBAT_COEFF_13)); |
| 661 | break; |
| 662 | } |
| 663 | break; |
| 664 | case QPNP_VADC_REV_ID_8026_2_0: |
| 665 | switch (vadc->id) { |
| 666 | case COMP_ID_TSMC: |
| 667 | temp_var = ((die_temp - 2500) * |
| 668 | (-QPNP_VBAT_COEFF_11)); |
| 669 | break; |
| 670 | default: |
| 671 | case COMP_ID_GF: |
| 672 | temp_var = ((die_temp - 2500) * |
| 673 | (-QPNP_VBAT_COEFF_9)); |
| 674 | break; |
| 675 | } |
| 676 | break; |
| 677 | default: |
| 678 | temp_var = 0; |
| 679 | break; |
| 680 | } |
| 681 | |
| 682 | temp_var = div64_s64(temp_var, QPNP_VBAT_COEFF_3); |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 683 | |
| 684 | temp_var = 1000000 + temp_var; |
| 685 | |
| 686 | *result = *result * temp_var; |
| 687 | |
| 688 | *result = div64_s64(*result, 1000000); |
Xiaozhe Shi | 62ad5e1 | 2013-05-13 12:37:41 -0700 | [diff] [blame] | 689 | pr_debug("%lld compensated into %lld\n", old, *result); |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 690 | |
| 691 | return 0; |
| 692 | } |
| 693 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 694 | int32_t qpnp_vbat_sns_comp_result(struct qpnp_vadc_chip *vadc, |
| 695 | int64_t *result) |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 696 | { |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 697 | struct qpnp_vadc_result die_temp_result; |
| 698 | int rc = 0; |
| 699 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 700 | rc = qpnp_vadc_is_valid(vadc); |
| 701 | if (rc < 0) |
| 702 | return rc; |
| 703 | |
| 704 | rc = qpnp_vadc_conv_seq_request(vadc, ADC_SEQ_NONE, |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 705 | DIE_TEMP, &die_temp_result); |
| 706 | if (rc < 0) { |
| 707 | pr_err("Error reading die_temp\n"); |
| 708 | return rc; |
| 709 | } |
| 710 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 711 | rc = qpnp_ocv_comp(result, vadc, die_temp_result.physical); |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 712 | if (rc < 0) |
| 713 | pr_err("Error with vbat compensation\n"); |
| 714 | |
| 715 | return rc; |
| 716 | } |
| 717 | EXPORT_SYMBOL(qpnp_vbat_sns_comp_result); |
| 718 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 719 | static void qpnp_vadc_625mv_channel_sel(struct qpnp_vadc_chip *vadc, |
| 720 | uint32_t *ref_channel_sel) |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 721 | { |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 722 | uint32_t dt_index = 0; |
| 723 | |
| 724 | /* Check if the buffered 625mV channel exists */ |
| 725 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 726 | != SPARE1) && (dt_index < vadc->max_channels_available)) |
| 727 | dt_index++; |
| 728 | |
| 729 | if (dt_index >= vadc->max_channels_available) { |
| 730 | pr_debug("Use default 625mV ref channel\n"); |
| 731 | *ref_channel_sel = REF_625MV; |
| 732 | } else { |
| 733 | pr_debug("Use buffered 625mV ref channel\n"); |
| 734 | *ref_channel_sel = SPARE1; |
| 735 | } |
| 736 | } |
| 737 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 738 | static int32_t qpnp_vadc_calib_device(struct qpnp_vadc_chip *vadc) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 739 | { |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 740 | struct qpnp_adc_amux_properties conv; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 741 | int rc, calib_read_1, calib_read_2, count = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 742 | u8 status1 = 0; |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 743 | uint32_t ref_channel_sel = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 744 | |
| 745 | conv.amux_channel = REF_125V; |
| 746 | conv.decimation = DECIMATION_TYPE2; |
| 747 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 748 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 749 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 750 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 751 | rc = qpnp_vadc_configure(vadc, &conv); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 752 | if (rc) { |
| 753 | pr_err("qpnp_vadc configure failed with %d\n", rc); |
| 754 | goto calib_fail; |
| 755 | } |
| 756 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 757 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 758 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 759 | if (rc < 0) |
| 760 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 761 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 762 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 763 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 764 | count++; |
| 765 | if (count > QPNP_VADC_ERR_COUNT) { |
| 766 | rc = -ENODEV; |
| 767 | goto calib_fail; |
| 768 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 769 | } |
| 770 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 771 | rc = qpnp_vadc_read_conversion_result(vadc, &calib_read_1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 772 | if (rc) { |
| 773 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 774 | goto calib_fail; |
| 775 | } |
| 776 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 777 | qpnp_vadc_625mv_channel_sel(vadc, &ref_channel_sel); |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 778 | conv.amux_channel = ref_channel_sel; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 779 | conv.decimation = DECIMATION_TYPE2; |
| 780 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 781 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 782 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 783 | rc = qpnp_vadc_configure(vadc, &conv); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 784 | if (rc) { |
| 785 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 786 | goto calib_fail; |
| 787 | } |
| 788 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 789 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 790 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 791 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 792 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 793 | if (rc < 0) |
| 794 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 795 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 796 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 797 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 798 | count++; |
| 799 | if (count > QPNP_VADC_ERR_COUNT) { |
| 800 | rc = -ENODEV; |
| 801 | goto calib_fail; |
| 802 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 803 | } |
| 804 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 805 | rc = qpnp_vadc_read_conversion_result(vadc, &calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 806 | if (rc) { |
| 807 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 808 | goto calib_fail; |
| 809 | } |
| 810 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 811 | pr_debug("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n", |
Dipen Parmar | 454c4b1 | 2013-11-25 14:40:47 +0530 | [diff] [blame] | 812 | calib_read_2, calib_read_1); |
| 813 | |
| 814 | if (calib_read_1 == calib_read_2) { |
| 815 | pr_err("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n", |
| 816 | calib_read_2, calib_read_1); |
| 817 | rc = -EINVAL; |
| 818 | goto calib_fail; |
| 819 | } |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 820 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 821 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy = |
| 822 | (calib_read_1 - calib_read_2); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 823 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 824 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx |
| 825 | = QPNP_ADC_625_UV; |
| 826 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_vref = |
| 827 | calib_read_1; |
| 828 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd = |
| 829 | calib_read_2; |
| 830 | /* Ratiometric Calibration */ |
| 831 | conv.amux_channel = VDD_VADC; |
| 832 | conv.decimation = DECIMATION_TYPE2; |
| 833 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 834 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 835 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 836 | rc = qpnp_vadc_configure(vadc, &conv); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 837 | if (rc) { |
| 838 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 839 | goto calib_fail; |
| 840 | } |
| 841 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 842 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 843 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 844 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 845 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 846 | if (rc < 0) |
| 847 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 848 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 849 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 850 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 851 | count++; |
| 852 | if (count > QPNP_VADC_ERR_COUNT) { |
| 853 | rc = -ENODEV; |
| 854 | goto calib_fail; |
| 855 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 856 | } |
| 857 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 858 | rc = qpnp_vadc_read_conversion_result(vadc, &calib_read_1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 859 | if (rc) { |
| 860 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 861 | goto calib_fail; |
| 862 | } |
| 863 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 864 | conv.amux_channel = GND_REF; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 865 | conv.decimation = DECIMATION_TYPE2; |
| 866 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 867 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 868 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 869 | rc = qpnp_vadc_configure(vadc, &conv); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 870 | if (rc) { |
| 871 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 872 | goto calib_fail; |
| 873 | } |
| 874 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 875 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 876 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 877 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 878 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, &status1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 879 | if (rc < 0) |
| 880 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 881 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 882 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 883 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 884 | count++; |
| 885 | if (count > QPNP_VADC_ERR_COUNT) { |
| 886 | rc = -ENODEV; |
| 887 | goto calib_fail; |
| 888 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 889 | } |
| 890 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 891 | rc = qpnp_vadc_read_conversion_result(vadc, &calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 892 | if (rc) { |
| 893 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 894 | goto calib_fail; |
| 895 | } |
| 896 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 897 | pr_debug("ratiometric reference raw: VDD:0x%x GND:0x%x\n", |
| 898 | calib_read_1, calib_read_2); |
Dipen Parmar | 454c4b1 | 2013-11-25 14:40:47 +0530 | [diff] [blame] | 899 | |
| 900 | if (calib_read_1 == calib_read_2) { |
| 901 | pr_err("ratiometric reference raw: VDD:0x%x GND:0x%x\n", |
| 902 | calib_read_1, calib_read_2); |
| 903 | rc = -EINVAL; |
| 904 | goto calib_fail; |
| 905 | } |
| 906 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 907 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy = |
| 908 | (calib_read_1 - calib_read_2); |
| 909 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx = |
| 910 | vadc->adc->adc_prop->adc_vdd_reference; |
| 911 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_vref = |
| 912 | calib_read_1; |
| 913 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd = |
| 914 | calib_read_2; |
| 915 | |
| 916 | calib_fail: |
| 917 | return rc; |
| 918 | } |
| 919 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 920 | int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_chip *vadc, |
| 921 | struct qpnp_vadc_linear_graph *param, |
Siddartha Mohanadoss | d0f4fd1 | 2012-11-20 16:28:40 -0800 | [diff] [blame] | 922 | enum qpnp_adc_calib_type calib_type) |
| 923 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 924 | int rc = 0; |
Siddartha Mohanadoss | d0f4fd1 | 2012-11-20 16:28:40 -0800 | [diff] [blame] | 925 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 926 | rc = qpnp_vadc_is_valid(vadc); |
| 927 | if (rc < 0) |
| 928 | return rc; |
Siddartha Mohanadoss | d0f4fd1 | 2012-11-20 16:28:40 -0800 | [diff] [blame] | 929 | |
| 930 | switch (calib_type) { |
| 931 | case CALIB_RATIOMETRIC: |
| 932 | param->dy = |
| 933 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy; |
| 934 | param->dx = |
| 935 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx; |
| 936 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 937 | param->adc_gnd = |
| 938 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd; |
| 939 | break; |
| 940 | case CALIB_ABSOLUTE: |
| 941 | param->dy = |
| 942 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy; |
| 943 | param->dx = |
| 944 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx; |
| 945 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 946 | param->adc_gnd = |
| 947 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd; |
| 948 | break; |
| 949 | default: |
| 950 | return -EINVAL; |
| 951 | } |
| 952 | |
| 953 | return 0; |
| 954 | } |
| 955 | EXPORT_SYMBOL(qpnp_get_vadc_gain_and_offset); |
| 956 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 957 | struct qpnp_vadc_chip *qpnp_get_vadc(struct device *dev, const char *name) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 958 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 959 | struct qpnp_vadc_chip *vadc; |
| 960 | struct device_node *node = NULL; |
| 961 | char prop_name[QPNP_MAX_PROP_NAME_LEN]; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 962 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 963 | snprintf(prop_name, QPNP_MAX_PROP_NAME_LEN, "qcom,%s-vadc", name); |
| 964 | |
| 965 | node = of_parse_phandle(dev->of_node, prop_name, 0); |
| 966 | if (node == NULL) |
| 967 | return ERR_PTR(-ENODEV); |
| 968 | |
| 969 | list_for_each_entry(vadc, &qpnp_vadc_device_list, list) |
| 970 | if (vadc->adc->spmi->dev.of_node == node) |
| 971 | return vadc; |
| 972 | return ERR_PTR(-EPROBE_DEFER); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 973 | } |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 974 | EXPORT_SYMBOL(qpnp_get_vadc); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 975 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 976 | int32_t qpnp_vadc_conv_seq_request(struct qpnp_vadc_chip *vadc, |
| 977 | enum qpnp_vadc_trigger trigger_channel, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 978 | enum qpnp_vadc_channels channel, |
| 979 | struct qpnp_vadc_result *result) |
| 980 | { |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 981 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 982 | uint32_t ref_channel, count = 0; |
| 983 | u8 status1 = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 984 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 985 | if (qpnp_vadc_is_valid(vadc)) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 986 | return -EPROBE_DEFER; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 987 | |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 988 | mutex_lock(&vadc->adc->adc_lock); |
| 989 | |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 990 | if (vadc->vadc_poll_eoc) { |
| 991 | pr_debug("requesting vadc eoc stay awake\n"); |
| 992 | pm_stay_awake(vadc->dev); |
| 993 | } |
| 994 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 995 | if (!vadc->vadc_init_calib) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 996 | rc = qpnp_vadc_version_check(vadc); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 997 | if (rc) |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 998 | goto fail_unlock; |
| 999 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1000 | rc = qpnp_vadc_calib_device(vadc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1001 | if (rc) { |
| 1002 | pr_err("Calibration failed\n"); |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 1003 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1004 | } else |
| 1005 | vadc->vadc_init_calib = true; |
| 1006 | } |
| 1007 | |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 1008 | if (channel == REF_625MV) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1009 | qpnp_vadc_625mv_channel_sel(vadc, &ref_channel); |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 1010 | channel = ref_channel; |
| 1011 | } |
| 1012 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1013 | vadc->adc->amux_prop->amux_channel = channel; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1014 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 1015 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 1016 | != channel) && (dt_index < vadc->max_channels_available)) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1017 | dt_index++; |
| 1018 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 1019 | if (dt_index >= vadc->max_channels_available) { |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 1020 | pr_err("not a valid VADC channel\n"); |
| 1021 | rc = -EINVAL; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1022 | goto fail_unlock; |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 1023 | } |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1024 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1025 | vadc->adc->amux_prop->decimation = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1026 | vadc->adc->adc_channels[dt_index].adc_decimation; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1027 | vadc->adc->amux_prop->hw_settle_time = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1028 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1029 | vadc->adc->amux_prop->fast_avg_setup = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1030 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1031 | |
| 1032 | if (trigger_channel < ADC_SEQ_NONE) |
| 1033 | vadc->adc->amux_prop->mode_sel = (ADC_OP_CONVERSION_SEQUENCER |
| 1034 | << QPNP_VADC_OP_MODE_SHIFT); |
| 1035 | else if (trigger_channel == ADC_SEQ_NONE) |
| 1036 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 1037 | << QPNP_VADC_OP_MODE_SHIFT); |
| 1038 | else { |
| 1039 | pr_err("Invalid trigger channel:%d\n", trigger_channel); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1040 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1041 | } |
| 1042 | |
| 1043 | vadc->adc->amux_prop->trigger_channel = trigger_channel; |
| 1044 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1045 | rc = qpnp_vadc_configure(vadc, vadc->adc->amux_prop); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1046 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1047 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 1048 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1049 | } |
| 1050 | |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 1051 | if (vadc->vadc_poll_eoc) { |
| 1052 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
| 1053 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, |
| 1054 | &status1); |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 1055 | if (rc < 0) |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 1056 | goto fail_unlock; |
| 1057 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
| 1058 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 1059 | QPNP_VADC_CONV_TIME_MAX); |
| 1060 | count++; |
| 1061 | if (count > QPNP_VADC_ERR_COUNT) { |
| 1062 | pr_err("retry error exceeded\n"); |
| 1063 | rc = qpnp_vadc_status_debug(vadc); |
| 1064 | if (rc < 0) |
| 1065 | pr_err("VADC disable failed\n"); |
| 1066 | rc = -EINVAL; |
| 1067 | goto fail_unlock; |
| 1068 | } |
| 1069 | } |
| 1070 | } else { |
| 1071 | rc = wait_for_completion_timeout( |
| 1072 | &vadc->adc->adc_rslt_completion, |
| 1073 | QPNP_ADC_COMPLETION_TIMEOUT); |
| 1074 | if (!rc) { |
| 1075 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_STATUS1, |
| 1076 | &status1); |
| 1077 | if (rc < 0) |
| 1078 | goto fail_unlock; |
| 1079 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
| 1080 | if (status1 == QPNP_VADC_STATUS1_EOC) |
| 1081 | pr_debug("End of conversion status set\n"); |
| 1082 | else { |
| 1083 | rc = qpnp_vadc_status_debug(vadc); |
| 1084 | if (rc < 0) |
| 1085 | pr_err("VADC disable failed\n"); |
| 1086 | rc = -EINVAL; |
| 1087 | goto fail_unlock; |
| 1088 | } |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 1089 | } |
| 1090 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1091 | |
| 1092 | if (trigger_channel < ADC_SEQ_NONE) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1093 | rc = qpnp_vadc_read_status(vadc, |
| 1094 | vadc->adc->amux_prop->mode_sel); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1095 | if (rc) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1096 | pr_debug("Conversion sequence timed out - %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1097 | } |
| 1098 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1099 | rc = qpnp_vadc_read_conversion_result(vadc, &result->adc_code); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1100 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1101 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 1102 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1103 | } |
| 1104 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1105 | amux_prescaling = |
| 1106 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1107 | |
Siddartha Mohanadoss | 630def0 | 2013-06-27 14:53:38 -0700 | [diff] [blame] | 1108 | if (amux_prescaling >= PATH_SCALING_NONE) { |
| 1109 | rc = -EINVAL; |
| 1110 | goto fail_unlock; |
| 1111 | } |
| 1112 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1113 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 1114 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 1115 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 1116 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 1117 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1118 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1119 | if (scale_type >= SCALE_NONE) { |
| 1120 | rc = -EBADF; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1121 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1122 | } |
| 1123 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1124 | vadc_scale_fn[scale_type].chan(vadc, result->adc_code, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1125 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 1126 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1127 | fail_unlock: |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 1128 | if (vadc->vadc_poll_eoc) { |
| 1129 | pr_debug("requesting vadc eoc stay awake\n"); |
| 1130 | pm_relax(vadc->dev); |
| 1131 | } |
| 1132 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1133 | mutex_unlock(&vadc->adc->adc_lock); |
| 1134 | |
| 1135 | return rc; |
| 1136 | } |
| 1137 | EXPORT_SYMBOL(qpnp_vadc_conv_seq_request); |
| 1138 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1139 | int32_t qpnp_vadc_read(struct qpnp_vadc_chip *vadc, |
| 1140 | enum qpnp_vadc_channels channel, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1141 | struct qpnp_vadc_result *result) |
| 1142 | { |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1143 | struct qpnp_vadc_result die_temp_result; |
| 1144 | int rc = 0; |
| 1145 | |
| 1146 | if (channel == VBAT_SNS) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1147 | rc = qpnp_vadc_conv_seq_request(vadc, ADC_SEQ_NONE, |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1148 | channel, result); |
| 1149 | if (rc < 0) { |
| 1150 | pr_err("Error reading vbatt\n"); |
| 1151 | return rc; |
| 1152 | } |
| 1153 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1154 | rc = qpnp_vadc_conv_seq_request(vadc, ADC_SEQ_NONE, |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1155 | DIE_TEMP, &die_temp_result); |
| 1156 | if (rc < 0) { |
| 1157 | pr_err("Error reading die_temp\n"); |
| 1158 | return rc; |
| 1159 | } |
| 1160 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 1161 | rc = qpnp_vbat_sns_comp(&result->physical, vadc, |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1162 | die_temp_result.physical); |
| 1163 | if (rc < 0) |
| 1164 | pr_err("Error with vbat compensation\n"); |
| 1165 | |
| 1166 | return 0; |
| 1167 | } else |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1168 | return qpnp_vadc_conv_seq_request(vadc, ADC_SEQ_NONE, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1169 | channel, result); |
| 1170 | } |
Siddartha Mohanadoss | 271d00f | 2013-03-26 18:24:14 -0700 | [diff] [blame] | 1171 | EXPORT_SYMBOL(qpnp_vadc_read); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1172 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1173 | static void qpnp_vadc_lock(struct qpnp_vadc_chip *vadc) |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1174 | { |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1175 | mutex_lock(&vadc->adc->adc_lock); |
| 1176 | } |
| 1177 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1178 | static void qpnp_vadc_unlock(struct qpnp_vadc_chip *vadc) |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1179 | { |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1180 | mutex_unlock(&vadc->adc->adc_lock); |
| 1181 | } |
| 1182 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1183 | int32_t qpnp_vadc_iadc_sync_request(struct qpnp_vadc_chip *vadc, |
| 1184 | enum qpnp_vadc_channels channel) |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1185 | { |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1186 | int rc = 0, dt_index = 0; |
| 1187 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1188 | if (qpnp_vadc_is_valid(vadc)) |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1189 | return -EPROBE_DEFER; |
| 1190 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1191 | qpnp_vadc_lock(vadc); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1192 | |
| 1193 | if (!vadc->vadc_init_calib) { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1194 | rc = qpnp_vadc_version_check(vadc); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1195 | if (rc) |
| 1196 | goto fail; |
| 1197 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1198 | rc = qpnp_vadc_calib_device(vadc); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1199 | if (rc) { |
| 1200 | pr_err("Calibration failed\n"); |
| 1201 | goto fail; |
| 1202 | } else |
| 1203 | vadc->vadc_init_calib = true; |
| 1204 | } |
| 1205 | |
| 1206 | vadc->adc->amux_prop->amux_channel = channel; |
| 1207 | |
| 1208 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 1209 | != channel) && (dt_index < vadc->max_channels_available)) |
| 1210 | dt_index++; |
| 1211 | |
| 1212 | if (dt_index >= vadc->max_channels_available) { |
| 1213 | pr_err("not a valid VADC channel\n"); |
| 1214 | rc = -EINVAL; |
| 1215 | goto fail; |
| 1216 | } |
| 1217 | |
| 1218 | vadc->adc->amux_prop->decimation = |
| 1219 | vadc->adc->adc_channels[dt_index].adc_decimation; |
| 1220 | vadc->adc->amux_prop->hw_settle_time = |
| 1221 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
| 1222 | vadc->adc->amux_prop->fast_avg_setup = |
| 1223 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
| 1224 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 1225 | << QPNP_VADC_OP_MODE_SHIFT); |
| 1226 | vadc->vadc_iadc_sync_lock = true; |
| 1227 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1228 | rc = qpnp_vadc_configure(vadc, vadc->adc->amux_prop); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1229 | if (rc) { |
| 1230 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 1231 | goto fail; |
| 1232 | } |
| 1233 | |
| 1234 | return rc; |
| 1235 | fail: |
| 1236 | vadc->vadc_iadc_sync_lock = false; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1237 | qpnp_vadc_unlock(vadc); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1238 | return rc; |
| 1239 | } |
| 1240 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_request); |
| 1241 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1242 | int32_t qpnp_vadc_iadc_sync_complete_request(struct qpnp_vadc_chip *vadc, |
| 1243 | enum qpnp_vadc_channels channel, |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1244 | struct qpnp_vadc_result *result) |
| 1245 | { |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1246 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
| 1247 | |
| 1248 | vadc->adc->amux_prop->amux_channel = channel; |
| 1249 | |
| 1250 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 1251 | != channel) && (dt_index < vadc->max_channels_available)) |
| 1252 | dt_index++; |
| 1253 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1254 | rc = qpnp_vadc_read_conversion_result(vadc, &result->adc_code); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1255 | if (rc) { |
| 1256 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 1257 | goto fail; |
| 1258 | } |
| 1259 | |
| 1260 | amux_prescaling = |
| 1261 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
| 1262 | |
Siddartha Mohanadoss | 630def0 | 2013-06-27 14:53:38 -0700 | [diff] [blame] | 1263 | if (amux_prescaling >= PATH_SCALING_NONE) { |
| 1264 | rc = -EINVAL; |
| 1265 | goto fail; |
| 1266 | } |
| 1267 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1268 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 1269 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 1270 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 1271 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 1272 | |
| 1273 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
| 1274 | if (scale_type >= SCALE_NONE) { |
| 1275 | rc = -EBADF; |
| 1276 | goto fail; |
| 1277 | } |
| 1278 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1279 | vadc_scale_fn[scale_type].chan(vadc, result->adc_code, |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1280 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 1281 | |
| 1282 | fail: |
| 1283 | vadc->vadc_iadc_sync_lock = false; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1284 | qpnp_vadc_unlock(vadc); |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1285 | return rc; |
| 1286 | } |
| 1287 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_complete_request); |
| 1288 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1289 | static ssize_t qpnp_adc_show(struct device *dev, |
| 1290 | struct device_attribute *devattr, char *buf) |
| 1291 | { |
| 1292 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1293 | struct qpnp_vadc_chip *vadc = dev_get_drvdata(dev); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1294 | struct qpnp_vadc_result result; |
| 1295 | int rc = -1; |
| 1296 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1297 | rc = qpnp_vadc_read(vadc, attr->index, &result); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1298 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1299 | if (rc) { |
| 1300 | pr_err("VADC read error with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1301 | return 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1302 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1303 | |
| 1304 | return snprintf(buf, QPNP_ADC_HWMON_NAME_LENGTH, |
| 1305 | "Result:%lld Raw:%d\n", result.physical, result.adc_code); |
| 1306 | } |
| 1307 | |
| 1308 | static struct sensor_device_attribute qpnp_adc_attr = |
| 1309 | SENSOR_ATTR(NULL, S_IRUGO, qpnp_adc_show, NULL, 0); |
| 1310 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1311 | static int32_t qpnp_vadc_init_hwmon(struct qpnp_vadc_chip *vadc, |
| 1312 | struct spmi_device *spmi) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1313 | { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1314 | struct device_node *child; |
| 1315 | struct device_node *node = spmi->dev.of_node; |
| 1316 | int rc = 0, i = 0, channel; |
| 1317 | |
| 1318 | for_each_child_of_node(node, child) { |
| 1319 | channel = vadc->adc->adc_channels[i].channel_num; |
| 1320 | qpnp_adc_attr.index = vadc->adc->adc_channels[i].channel_num; |
| 1321 | qpnp_adc_attr.dev_attr.attr.name = |
| 1322 | vadc->adc->adc_channels[i].name; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1323 | memcpy(&vadc->sens_attr[i], &qpnp_adc_attr, |
| 1324 | sizeof(qpnp_adc_attr)); |
Stephen Boyd | d733796 | 2012-10-30 11:10:46 -0700 | [diff] [blame] | 1325 | sysfs_attr_init(&vadc->sens_attr[i].dev_attr.attr); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1326 | rc = device_create_file(&spmi->dev, |
| 1327 | &vadc->sens_attr[i].dev_attr); |
| 1328 | if (rc) { |
| 1329 | dev_err(&spmi->dev, |
| 1330 | "device_create_file failed for dev %s\n", |
| 1331 | vadc->adc->adc_channels[i].name); |
| 1332 | goto hwmon_err_sens; |
| 1333 | } |
| 1334 | i++; |
| 1335 | } |
| 1336 | |
| 1337 | return 0; |
| 1338 | hwmon_err_sens: |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1339 | pr_err("Init HWMON failed for qpnp_adc with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1340 | return rc; |
| 1341 | } |
| 1342 | |
| 1343 | static int __devinit qpnp_vadc_probe(struct spmi_device *spmi) |
| 1344 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1345 | struct qpnp_vadc_chip *vadc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1346 | struct qpnp_adc_drv *adc_qpnp; |
| 1347 | struct device_node *node = spmi->dev.of_node; |
| 1348 | struct device_node *child; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1349 | int rc, count_adc_channel_list = 0, i = 0; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1350 | u8 fab_id = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1351 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1352 | for_each_child_of_node(node, child) |
| 1353 | count_adc_channel_list++; |
| 1354 | |
| 1355 | if (!count_adc_channel_list) { |
| 1356 | pr_err("No channel listing\n"); |
| 1357 | return -EINVAL; |
| 1358 | } |
| 1359 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1360 | vadc = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_vadc_chip) + |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1361 | (sizeof(struct sensor_device_attribute) * |
| 1362 | count_adc_channel_list), GFP_KERNEL); |
| 1363 | if (!vadc) { |
| 1364 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
| 1365 | return -ENOMEM; |
| 1366 | } |
| 1367 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1368 | vadc->dev = &(spmi->dev); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1369 | adc_qpnp = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_adc_drv), |
| 1370 | GFP_KERNEL); |
| 1371 | if (!adc_qpnp) { |
| 1372 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1373 | return -ENOMEM; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1374 | } |
| 1375 | |
| 1376 | vadc->adc = adc_qpnp; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1377 | rc = qpnp_adc_get_devicetree_data(spmi, vadc->adc); |
| 1378 | if (rc) { |
| 1379 | dev_err(&spmi->dev, "failed to read device tree\n"); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1380 | return rc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1381 | } |
Stephen Boyd | beab450 | 2013-04-25 10:18:17 -0700 | [diff] [blame] | 1382 | mutex_init(&vadc->adc->adc_lock); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1383 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1384 | rc = qpnp_vadc_init_hwmon(vadc, spmi); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1385 | if (rc) { |
| 1386 | dev_err(&spmi->dev, "failed to initialize qpnp hwmon adc\n"); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1387 | return rc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1388 | } |
| 1389 | vadc->vadc_hwmon = hwmon_device_register(&vadc->adc->spmi->dev); |
| 1390 | vadc->vadc_init_calib = false; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1391 | vadc->max_channels_available = count_adc_channel_list; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1392 | rc = qpnp_vadc_read_reg(vadc, QPNP_INT_TEST_VAL, &fab_id); |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1393 | if (rc < 0) { |
| 1394 | pr_err("qpnp adc comp id failed with %d\n", rc); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1395 | goto err_setup; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1396 | } |
| 1397 | vadc->id = fab_id; |
| 1398 | |
Siddartha Mohanadoss | f3db614 | 2013-08-09 16:54:47 -0700 | [diff] [blame] | 1399 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_REVISION2, |
| 1400 | &vadc->revision_dig_major); |
| 1401 | if (rc < 0) { |
| 1402 | pr_err("qpnp adc dig_major rev read failed with %d\n", rc); |
| 1403 | goto err_setup; |
| 1404 | } |
| 1405 | |
| 1406 | rc = qpnp_vadc_read_reg(vadc, QPNP_VADC_REVISION3, |
| 1407 | &vadc->revision_ana_minor); |
| 1408 | if (rc < 0) { |
| 1409 | pr_err("qpnp adc ana_minor rev read failed with %d\n", rc); |
| 1410 | goto err_setup; |
| 1411 | } |
| 1412 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1413 | rc = qpnp_vadc_warm_rst_configure(vadc); |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 1414 | if (rc < 0) { |
| 1415 | pr_err("Setting perp reset on warm reset failed %d\n", rc); |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1416 | goto err_setup; |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 1417 | } |
| 1418 | |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1419 | INIT_WORK(&vadc->trigger_completion_work, qpnp_vadc_work); |
Siddartha Mohanadoss | 73fb151 | 2013-08-08 22:38:13 -0700 | [diff] [blame] | 1420 | |
| 1421 | vadc->vadc_poll_eoc = of_property_read_bool(node, |
| 1422 | "qcom,vadc-poll-eoc"); |
| 1423 | if (!vadc->vadc_poll_eoc) { |
| 1424 | rc = devm_request_irq(&spmi->dev, vadc->adc->adc_irq_eoc, |
| 1425 | qpnp_vadc_isr, IRQF_TRIGGER_RISING, |
| 1426 | "qpnp_vadc_interrupt", vadc); |
| 1427 | if (rc) { |
| 1428 | dev_err(&spmi->dev, |
| 1429 | "failed to request adc irq with error %d\n", rc); |
| 1430 | goto err_setup; |
| 1431 | } else { |
| 1432 | enable_irq_wake(vadc->adc->adc_irq_eoc); |
| 1433 | } |
| 1434 | } else |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 1435 | device_init_wakeup(vadc->dev, 1); |
| 1436 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1437 | vadc->vadc_iadc_sync_lock = false; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1438 | dev_set_drvdata(&spmi->dev, vadc); |
| 1439 | list_add(&vadc->list, &qpnp_vadc_device_list); |
| 1440 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1441 | return 0; |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1442 | |
| 1443 | err_setup: |
| 1444 | for_each_child_of_node(node, child) { |
| 1445 | device_remove_file(&spmi->dev, |
| 1446 | &vadc->sens_attr[i].dev_attr); |
| 1447 | i++; |
| 1448 | } |
| 1449 | hwmon_device_unregister(vadc->vadc_hwmon); |
| 1450 | |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1451 | return rc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1452 | } |
| 1453 | |
| 1454 | static int __devexit qpnp_vadc_remove(struct spmi_device *spmi) |
| 1455 | { |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1456 | struct qpnp_vadc_chip *vadc = dev_get_drvdata(&spmi->dev); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1457 | struct device_node *node = spmi->dev.of_node; |
| 1458 | struct device_node *child; |
| 1459 | int i = 0; |
| 1460 | |
| 1461 | for_each_child_of_node(node, child) { |
| 1462 | device_remove_file(&spmi->dev, |
| 1463 | &vadc->sens_attr[i].dev_attr); |
| 1464 | i++; |
| 1465 | } |
Siddartha Mohanadoss | 3cb2b6b | 2013-06-21 12:07:05 -0700 | [diff] [blame] | 1466 | hwmon_device_unregister(vadc->vadc_hwmon); |
| 1467 | list_del(&vadc->list); |
Siddartha Mohanadoss | 462088b | 2013-07-27 19:58:09 -0700 | [diff] [blame] | 1468 | if (vadc->vadc_poll_eoc) |
| 1469 | pm_relax(vadc->dev); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1470 | dev_set_drvdata(&spmi->dev, NULL); |
| 1471 | |
| 1472 | return 0; |
| 1473 | } |
| 1474 | |
| 1475 | static const struct of_device_id qpnp_vadc_match_table[] = { |
| 1476 | { .compatible = "qcom,qpnp-vadc", |
| 1477 | }, |
| 1478 | {} |
| 1479 | }; |
| 1480 | |
| 1481 | static struct spmi_driver qpnp_vadc_driver = { |
| 1482 | .driver = { |
| 1483 | .name = "qcom,qpnp-vadc", |
| 1484 | .of_match_table = qpnp_vadc_match_table, |
| 1485 | }, |
| 1486 | .probe = qpnp_vadc_probe, |
| 1487 | .remove = qpnp_vadc_remove, |
| 1488 | }; |
| 1489 | |
| 1490 | static int __init qpnp_vadc_init(void) |
| 1491 | { |
| 1492 | return spmi_driver_register(&qpnp_vadc_driver); |
| 1493 | } |
| 1494 | module_init(qpnp_vadc_init); |
| 1495 | |
| 1496 | static void __exit qpnp_vadc_exit(void) |
| 1497 | { |
| 1498 | spmi_driver_unregister(&qpnp_vadc_driver); |
| 1499 | } |
| 1500 | module_exit(qpnp_vadc_exit); |
| 1501 | |
| 1502 | MODULE_DESCRIPTION("QPNP PMIC Voltage ADC driver"); |
| 1503 | MODULE_LICENSE("GPL v2"); |