Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1 | //===- ARMInstrNEON.td - NEON support for ARM -----------------------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file describes the ARM NEON instruction set. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | // NEON-specific DAG Nodes. |
| 16 | //===----------------------------------------------------------------------===// |
| 17 | |
| 18 | def SDTARMVCMP : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisSameAs<1, 2>]>; |
| 19 | |
| 20 | def NEONvceq : SDNode<"ARMISD::VCEQ", SDTARMVCMP>; |
| 21 | def NEONvcge : SDNode<"ARMISD::VCGE", SDTARMVCMP>; |
| 22 | def NEONvcgeu : SDNode<"ARMISD::VCGEU", SDTARMVCMP>; |
| 23 | def NEONvcgt : SDNode<"ARMISD::VCGT", SDTARMVCMP>; |
| 24 | def NEONvcgtu : SDNode<"ARMISD::VCGTU", SDTARMVCMP>; |
| 25 | def NEONvtst : SDNode<"ARMISD::VTST", SDTARMVCMP>; |
| 26 | |
| 27 | // Types for vector shift by immediates. The "SHX" version is for long and |
| 28 | // narrow operations where the source and destination vectors have different |
| 29 | // types. The "SHINS" version is for shift and insert operations. |
| 30 | def SDTARMVSH : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisSameAs<0, 1>, |
| 31 | SDTCisVT<2, i32>]>; |
| 32 | def SDTARMVSHX : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisInt<1>, |
| 33 | SDTCisVT<2, i32>]>; |
| 34 | def SDTARMVSHINS : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<0, 1>, |
| 35 | SDTCisSameAs<0, 2>, SDTCisVT<3, i32>]>; |
| 36 | |
| 37 | def NEONvshl : SDNode<"ARMISD::VSHL", SDTARMVSH>; |
| 38 | def NEONvshrs : SDNode<"ARMISD::VSHRs", SDTARMVSH>; |
| 39 | def NEONvshru : SDNode<"ARMISD::VSHRu", SDTARMVSH>; |
| 40 | def NEONvshlls : SDNode<"ARMISD::VSHLLs", SDTARMVSHX>; |
| 41 | def NEONvshllu : SDNode<"ARMISD::VSHLLu", SDTARMVSHX>; |
| 42 | def NEONvshlli : SDNode<"ARMISD::VSHLLi", SDTARMVSHX>; |
| 43 | def NEONvshrn : SDNode<"ARMISD::VSHRN", SDTARMVSHX>; |
| 44 | |
| 45 | def NEONvrshrs : SDNode<"ARMISD::VRSHRs", SDTARMVSH>; |
| 46 | def NEONvrshru : SDNode<"ARMISD::VRSHRu", SDTARMVSH>; |
| 47 | def NEONvrshrn : SDNode<"ARMISD::VRSHRN", SDTARMVSHX>; |
| 48 | |
| 49 | def NEONvqshls : SDNode<"ARMISD::VQSHLs", SDTARMVSH>; |
| 50 | def NEONvqshlu : SDNode<"ARMISD::VQSHLu", SDTARMVSH>; |
| 51 | def NEONvqshlsu : SDNode<"ARMISD::VQSHLsu", SDTARMVSH>; |
| 52 | def NEONvqshrns : SDNode<"ARMISD::VQSHRNs", SDTARMVSHX>; |
| 53 | def NEONvqshrnu : SDNode<"ARMISD::VQSHRNu", SDTARMVSHX>; |
| 54 | def NEONvqshrnsu : SDNode<"ARMISD::VQSHRNsu", SDTARMVSHX>; |
| 55 | |
| 56 | def NEONvqrshrns : SDNode<"ARMISD::VQRSHRNs", SDTARMVSHX>; |
| 57 | def NEONvqrshrnu : SDNode<"ARMISD::VQRSHRNu", SDTARMVSHX>; |
| 58 | def NEONvqrshrnsu : SDNode<"ARMISD::VQRSHRNsu", SDTARMVSHX>; |
| 59 | |
| 60 | def NEONvsli : SDNode<"ARMISD::VSLI", SDTARMVSHINS>; |
| 61 | def NEONvsri : SDNode<"ARMISD::VSRI", SDTARMVSHINS>; |
| 62 | |
| 63 | def SDTARMVGETLN : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisInt<1>, |
| 64 | SDTCisVT<2, i32>]>; |
| 65 | def NEONvgetlaneu : SDNode<"ARMISD::VGETLANEu", SDTARMVGETLN>; |
| 66 | def NEONvgetlanes : SDNode<"ARMISD::VGETLANEs", SDTARMVGETLN>; |
| 67 | |
Bob Wilson | f4f1a27 | 2009-08-14 05:13:08 +0000 | [diff] [blame] | 68 | def NEONvdup : SDNode<"ARMISD::VDUP", SDTypeProfile<1, 1, [SDTCisVec<0>]>>; |
| 69 | |
Bob Wilson | 206f6c4 | 2009-08-14 05:08:32 +0000 | [diff] [blame] | 70 | // VDUPLANE can produce a quad-register result from a double-register source, |
| 71 | // so the result is not constrained to match the source. |
| 72 | def NEONvduplane : SDNode<"ARMISD::VDUPLANE", |
| 73 | SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, |
| 74 | SDTCisVT<2, i32>]>>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 75 | |
Bob Wilson | 3ac3913 | 2009-08-19 17:03:43 +0000 | [diff] [blame] | 76 | def SDTARMVEXT : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0, 1>, |
| 77 | SDTCisSameAs<0, 2>, SDTCisVT<3, i32>]>; |
| 78 | def NEONvext : SDNode<"ARMISD::VEXT", SDTARMVEXT>; |
| 79 | |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 80 | def SDTARMVSHUF : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0, 1>]>; |
| 81 | def NEONvrev64 : SDNode<"ARMISD::VREV64", SDTARMVSHUF>; |
| 82 | def NEONvrev32 : SDNode<"ARMISD::VREV32", SDTARMVSHUF>; |
| 83 | def NEONvrev16 : SDNode<"ARMISD::VREV16", SDTARMVSHUF>; |
| 84 | |
Anton Korobeynikov | be262ae | 2009-08-21 12:40:50 +0000 | [diff] [blame] | 85 | def SDTARMVSHUF2 : SDTypeProfile<2, 2, [SDTCisVec<0>, SDTCisSameAs<0, 1>, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 86 | SDTCisSameAs<0, 2>, |
| 87 | SDTCisSameAs<0, 3>]>; |
Anton Korobeynikov | 394bbb8 | 2009-08-21 12:41:42 +0000 | [diff] [blame] | 88 | def NEONzip : SDNode<"ARMISD::VZIP", SDTARMVSHUF2>; |
| 89 | def NEONuzp : SDNode<"ARMISD::VUZP", SDTARMVSHUF2>; |
| 90 | def NEONtrn : SDNode<"ARMISD::VTRN", SDTARMVSHUF2>; |
Anton Korobeynikov | be262ae | 2009-08-21 12:40:50 +0000 | [diff] [blame] | 91 | |
Bob Wilson | bc1d2dc | 2010-02-18 06:05:53 +0000 | [diff] [blame] | 92 | def SDTARMFMAX : SDTypeProfile<1, 2, [SDTCisVT<0, f32>, SDTCisSameAs<0, 1>, |
| 93 | SDTCisSameAs<0, 2>]>; |
| 94 | def NEONfmax : SDNode<"ARMISD::FMAX", SDTARMFMAX>; |
| 95 | def NEONfmin : SDNode<"ARMISD::FMIN", SDTARMFMAX>; |
| 96 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 97 | //===----------------------------------------------------------------------===// |
| 98 | // NEON operand definitions |
| 99 | //===----------------------------------------------------------------------===// |
| 100 | |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 101 | def h8imm : Operand<i8> { |
| 102 | let PrintMethod = "printHex8ImmOperand"; |
| 103 | } |
| 104 | def h16imm : Operand<i16> { |
| 105 | let PrintMethod = "printHex16ImmOperand"; |
| 106 | } |
| 107 | def h32imm : Operand<i32> { |
| 108 | let PrintMethod = "printHex32ImmOperand"; |
| 109 | } |
| 110 | def h64imm : Operand<i64> { |
| 111 | let PrintMethod = "printHex64ImmOperand"; |
| 112 | } |
| 113 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 114 | //===----------------------------------------------------------------------===// |
| 115 | // NEON load / store instructions |
| 116 | //===----------------------------------------------------------------------===// |
| 117 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 118 | // Use vldmia to load a Q register as a D register pair. |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 119 | def VLDRQ : NI4<(outs QPR:$dst), (ins addrmode4:$addr), IIC_fpLoadm, |
| 120 | "vldmia", "$addr, ${dst:dregpair}", |
| 121 | [(set QPR:$dst, (v2f64 (load addrmode4:$addr)))]> { |
Evan Cheng | dabc6c0 | 2009-07-08 22:51:32 +0000 | [diff] [blame] | 122 | let Inst{27-25} = 0b110; |
| 123 | let Inst{24} = 0; // P bit |
| 124 | let Inst{23} = 1; // U bit |
| 125 | let Inst{20} = 1; |
Johnny Chen | 6e1b1ad | 2009-12-01 17:37:06 +0000 | [diff] [blame] | 126 | let Inst{11-8} = 0b1011; |
Evan Cheng | dabc6c0 | 2009-07-08 22:51:32 +0000 | [diff] [blame] | 127 | } |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 128 | |
Bob Wilson | 66b3400 | 2009-08-12 17:04:56 +0000 | [diff] [blame] | 129 | // Use vstmia to store a Q register as a D register pair. |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 130 | def VSTRQ : NI4<(outs), (ins QPR:$src, addrmode4:$addr), IIC_fpStorem, |
| 131 | "vstmia", "$addr, ${src:dregpair}", |
| 132 | [(store (v2f64 QPR:$src), addrmode4:$addr)]> { |
Bob Wilson | 66b3400 | 2009-08-12 17:04:56 +0000 | [diff] [blame] | 133 | let Inst{27-25} = 0b110; |
| 134 | let Inst{24} = 0; // P bit |
| 135 | let Inst{23} = 1; // U bit |
| 136 | let Inst{20} = 0; |
Johnny Chen | 6e1b1ad | 2009-12-01 17:37:06 +0000 | [diff] [blame] | 137 | let Inst{11-8} = 0b1011; |
Bob Wilson | 66b3400 | 2009-08-12 17:04:56 +0000 | [diff] [blame] | 138 | } |
| 139 | |
Bob Wilson | ed592c0 | 2009-07-08 18:11:30 +0000 | [diff] [blame] | 140 | // VLD1 : Vector Load (multiple single elements) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 141 | class VLD1D<bits<4> op7_4, string Dt, ValueType Ty> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 142 | : NLdSt<0,0b10,0b0111,op7_4, (outs DPR:$dst), (ins addrmode6:$addr), IIC_VLD1, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 143 | "vld1", Dt, "\\{$dst\\}, $addr", "", |
| 144 | [(set DPR:$dst, (Ty (int_arm_neon_vld1 addrmode6:$addr)))]>; |
| 145 | class VLD1Q<bits<4> op7_4, string Dt, ValueType Ty> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 146 | : NLdSt<0,0b10,0b1010,op7_4, (outs QPR:$dst), (ins addrmode6:$addr), IIC_VLD1, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 147 | "vld1", Dt, "${dst:dregpair}, $addr", "", |
| 148 | [(set QPR:$dst, (Ty (int_arm_neon_vld1 addrmode6:$addr)))]>; |
Bob Wilson | ed592c0 | 2009-07-08 18:11:30 +0000 | [diff] [blame] | 149 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 150 | def VLD1d8 : VLD1D<0b0000, "8", v8i8>; |
| 151 | def VLD1d16 : VLD1D<0b0100, "16", v4i16>; |
| 152 | def VLD1d32 : VLD1D<0b1000, "32", v2i32>; |
| 153 | def VLD1df : VLD1D<0b1000, "32", v2f32>; |
| 154 | def VLD1d64 : VLD1D<0b1100, "64", v1i64>; |
Bob Wilson | ed592c0 | 2009-07-08 18:11:30 +0000 | [diff] [blame] | 155 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 156 | def VLD1q8 : VLD1Q<0b0000, "8", v16i8>; |
| 157 | def VLD1q16 : VLD1Q<0b0100, "16", v8i16>; |
| 158 | def VLD1q32 : VLD1Q<0b1000, "32", v4i32>; |
| 159 | def VLD1qf : VLD1Q<0b1000, "32", v4f32>; |
| 160 | def VLD1q64 : VLD1Q<0b1100, "64", v2i64>; |
Bob Wilson | ed592c0 | 2009-07-08 18:11:30 +0000 | [diff] [blame] | 161 | |
Bob Wilson | 06ce5bf | 2010-03-20 17:59:03 +0000 | [diff] [blame^] | 162 | let mayLoad = 1 in { |
| 163 | |
| 164 | // ...with address register writeback: |
| 165 | class VLD1DWB<bits<4> op7_4, string Dt> |
| 166 | : NLdSt<0,0b10,0b0111,op7_4, (outs DPR:$dst, GPR:$wb), |
| 167 | (ins addrmode6:$addr), IIC_VLD1, |
| 168 | "vld1", Dt, "\\{$dst\\}, $addr", |
| 169 | "$addr.addr = $wb", []>; |
| 170 | class VLD1QWB<bits<4> op7_4, string Dt> |
| 171 | : NLdSt<0,0b10,0b1010,op7_4, (outs QPR:$dst, GPR:$wb), |
| 172 | (ins addrmode6:$addr), IIC_VLD1, |
| 173 | "vld1", Dt, "${dst:dregpair}, $addr", |
| 174 | "$addr.addr = $wb", []>; |
| 175 | |
| 176 | def VLD1d8_UPD : VLD1DWB<0b0000, "8">; |
| 177 | def VLD1d16_UPD : VLD1DWB<0b0100, "16">; |
| 178 | def VLD1d32_UPD : VLD1DWB<0b1000, "32">; |
| 179 | def VLD1d64_UPD : VLD1DWB<0b1100, "64">; |
| 180 | |
| 181 | def VLD1q8_UPD : VLD1QWB<0b0000, "8">; |
| 182 | def VLD1q16_UPD : VLD1QWB<0b0100, "16">; |
| 183 | def VLD1q32_UPD : VLD1QWB<0b1000, "32">; |
| 184 | def VLD1q64_UPD : VLD1QWB<0b1100, "64">; |
| 185 | } // mayLoad = 1 |
| 186 | |
| 187 | let mayLoad = 1, hasExtraDefRegAllocReq = 1 in { |
| 188 | |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 189 | // These (dreg triple/quadruple) are for disassembly only. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 190 | class VLD1D3<bits<4> op7_4, string Dt> |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 191 | : NLdSt<0, 0b10, 0b0110, op7_4, (outs DPR:$dst1, DPR:$dst2, DPR:$dst3), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 192 | (ins addrmode6:$addr), IIC_VLD1, "vld1", Dt, |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 193 | "\\{$dst1, $dst2, $dst3\\}, $addr", "", |
| 194 | [/* For disassembly only; pattern left blank */]>; |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 195 | class VLD1D4<bits<4> op7_4, string Dt> |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 196 | : NLdSt<0,0b10,0b0010,op7_4,(outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 197 | (ins addrmode6:$addr), IIC_VLD1, "vld1", Dt, |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 198 | "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", "", |
| 199 | [/* For disassembly only; pattern left blank */]>; |
| 200 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 201 | def VLD1d8T : VLD1D3<0b0000, "8">; |
| 202 | def VLD1d16T : VLD1D3<0b0100, "16">; |
| 203 | def VLD1d32T : VLD1D3<0b1000, "32">; |
| 204 | //def VLD1d64T : VLD1D3<0b1100, "64">; |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 205 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 206 | def VLD1d8Q : VLD1D4<0b0000, "8">; |
| 207 | def VLD1d16Q : VLD1D4<0b0100, "16">; |
| 208 | def VLD1d32Q : VLD1D4<0b1000, "32">; |
| 209 | //def VLD1d64Q : VLD1D4<0b1100, "64">; |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 210 | |
Bob Wilson | 06ce5bf | 2010-03-20 17:59:03 +0000 | [diff] [blame^] | 211 | // ...with address register writeback: |
| 212 | class VLD1D3WB<bits<4> op7_4, string Dt> |
| 213 | : NLdSt<0,0b10,0b0110,op7_4, (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, GPR:$wb), |
| 214 | (ins addrmode6:$addr), IIC_VLD1, "vld1", Dt, |
| 215 | "\\{$dst1, $dst2, $dst3\\}, $addr", "$addr.addr = $wb", |
| 216 | [/* For disassembly only; pattern left blank */]>; |
| 217 | class VLD1D4WB<bits<4> op7_4, string Dt> |
| 218 | : NLdSt<0,0b10,0b0010,op7_4, |
| 219 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb), |
| 220 | (ins addrmode6:$addr), IIC_VLD1, "vld1", Dt, |
| 221 | "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", "$addr.addr = $wb", |
| 222 | [/* For disassembly only; pattern left blank */]>; |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 223 | |
Bob Wilson | 06ce5bf | 2010-03-20 17:59:03 +0000 | [diff] [blame^] | 224 | def VLD1d8T_UPD : VLD1D3WB<0b0000, "8">; |
| 225 | def VLD1d16T_UPD : VLD1D3WB<0b0100, "16">; |
| 226 | def VLD1d32T_UPD : VLD1D3WB<0b1000, "32">; |
| 227 | // VLD1d64T_UPD : implemented as VLD3d64_UPD |
| 228 | |
| 229 | def VLD1d8Q_UPD : VLD1D4WB<0b0000, "8">; |
| 230 | def VLD1d16Q_UPD : VLD1D4WB<0b0100, "16">; |
| 231 | def VLD1d32Q_UPD : VLD1D4WB<0b1000, "32">; |
| 232 | // VLD1d64Q_UPD : implemented as VLD4d64_UPD |
Bob Wilson | 66b3400 | 2009-08-12 17:04:56 +0000 | [diff] [blame] | 233 | |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 234 | // VLD2 : Vector Load (multiple 2-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 235 | class VLD2D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 236 | : NLdSt<0,0b10,0b1000,op7_4, (outs DPR:$dst1, DPR:$dst2), |
| 237 | (ins addrmode6:$addr), IIC_VLD2, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 238 | "vld2", Dt, "\\{$dst1, $dst2\\}, $addr", "", []>; |
| 239 | class VLD2Q<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 240 | : NLdSt<0,0b10,0b0011,op7_4, |
| 241 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), |
Bob Wilson | e9829ca | 2009-10-06 22:01:59 +0000 | [diff] [blame] | 242 | (ins addrmode6:$addr), IIC_VLD2, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 243 | "vld2", Dt, "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", "", []>; |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 244 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 245 | def VLD2d8 : VLD2D<0b0000, "8">; |
| 246 | def VLD2d16 : VLD2D<0b0100, "16">; |
| 247 | def VLD2d32 : VLD2D<0b1000, "32">; |
Bob Wilson | 8c3be58 | 2009-10-07 22:57:01 +0000 | [diff] [blame] | 248 | def VLD2d64 : NLdSt<0,0b10,0b1010,0b1100, (outs DPR:$dst1, DPR:$dst2), |
| 249 | (ins addrmode6:$addr), IIC_VLD1, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 250 | "vld1", "64", "\\{$dst1, $dst2\\}, $addr", "", []>; |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 251 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 252 | def VLD2q8 : VLD2Q<0b0000, "8">; |
| 253 | def VLD2q16 : VLD2Q<0b0100, "16">; |
| 254 | def VLD2q32 : VLD2Q<0b1000, "32">; |
Bob Wilson | e9829ca | 2009-10-06 22:01:59 +0000 | [diff] [blame] | 255 | |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 256 | // These (double-spaced dreg pair) are for disassembly only. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 257 | class VLD2Ddbl<bits<4> op7_4, string Dt> |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 258 | : NLdSt<0,0b10,0b1001,op7_4, (outs DPR:$dst1, DPR:$dst2), |
| 259 | (ins addrmode6:$addr), IIC_VLD2, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 260 | "vld2", Dt, "\\{$dst1, $dst2\\}, $addr", "", []>; |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 261 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 262 | def VLD2d8D : VLD2Ddbl<0b0000, "8">; |
| 263 | def VLD2d16D : VLD2Ddbl<0b0100, "16">; |
| 264 | def VLD2d32D : VLD2Ddbl<0b1000, "32">; |
Johnny Chen | 39fb124 | 2010-02-23 20:51:23 +0000 | [diff] [blame] | 265 | |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 266 | // VLD3 : Vector Load (multiple 3-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 267 | class VLD3D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 268 | : NLdSt<0,0b10,0b0100,op7_4, (outs DPR:$dst1, DPR:$dst2, DPR:$dst3), |
| 269 | (ins addrmode6:$addr), IIC_VLD3, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 270 | "vld3", Dt, "\\{$dst1, $dst2, $dst3\\}, $addr", "", []>; |
| 271 | class VLD3WB<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 272 | : NLdSt<0,0b10,0b0101,op7_4, (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, GPR:$wb), |
Bob Wilson | a8b4362 | 2009-10-07 17:24:55 +0000 | [diff] [blame] | 273 | (ins addrmode6:$addr), IIC_VLD3, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 274 | "vld3", Dt, "\\{$dst1, $dst2, $dst3\\}, $addr", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 275 | "$addr.addr = $wb", []>; |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 276 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 277 | def VLD3d8 : VLD3D<0b0000, "8">; |
| 278 | def VLD3d16 : VLD3D<0b0100, "16">; |
| 279 | def VLD3d32 : VLD3D<0b1000, "32">; |
Bob Wilson | da8cacc | 2009-10-07 23:39:57 +0000 | [diff] [blame] | 280 | def VLD3d64 : NLdSt<0,0b10,0b0110,0b1100, |
| 281 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3), |
| 282 | (ins addrmode6:$addr), IIC_VLD1, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 283 | "vld1", "64", "\\{$dst1, $dst2, $dst3\\}, $addr", "", []>; |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 284 | |
Bob Wilson | a8b4362 | 2009-10-07 17:24:55 +0000 | [diff] [blame] | 285 | // vld3 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 286 | def VLD3q8a : VLD3WB<0b0000, "8">; |
| 287 | def VLD3q16a : VLD3WB<0b0100, "16">; |
| 288 | def VLD3q32a : VLD3WB<0b1000, "32">; |
Bob Wilson | a8b4362 | 2009-10-07 17:24:55 +0000 | [diff] [blame] | 289 | |
| 290 | // vld3 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 291 | def VLD3q8b : VLD3WB<0b0000, "8">; |
| 292 | def VLD3q16b : VLD3WB<0b0100, "16">; |
| 293 | def VLD3q32b : VLD3WB<0b1000, "32">; |
Bob Wilson | a8b4362 | 2009-10-07 17:24:55 +0000 | [diff] [blame] | 294 | |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 295 | // VLD4 : Vector Load (multiple 4-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 296 | class VLD4D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 297 | : NLdSt<0,0b10,0b0000,op7_4, |
| 298 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 299 | (ins addrmode6:$addr), IIC_VLD4, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 300 | "vld4", Dt, "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", "", []>; |
| 301 | class VLD4WB<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 302 | : NLdSt<0,0b10,0b0001,op7_4, |
| 303 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4, GPR:$wb), |
Bob Wilson | 004a2e1 | 2009-10-07 18:09:32 +0000 | [diff] [blame] | 304 | (ins addrmode6:$addr), IIC_VLD4, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 305 | "vld4", Dt, "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 306 | "$addr.addr = $wb", []>; |
Bob Wilson | 055a90d | 2009-08-05 00:49:09 +0000 | [diff] [blame] | 307 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 308 | def VLD4d8 : VLD4D<0b0000, "8">; |
| 309 | def VLD4d16 : VLD4D<0b0100, "16">; |
| 310 | def VLD4d32 : VLD4D<0b1000, "32">; |
Bob Wilson | 7ce4750 | 2009-10-07 23:54:04 +0000 | [diff] [blame] | 311 | def VLD4d64 : NLdSt<0,0b10,0b0010,0b1100, |
| 312 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), |
| 313 | (ins addrmode6:$addr), IIC_VLD1, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 314 | "vld1", "64", "\\{$dst1, $dst2, $dst3, $dst4\\}, $addr", |
| 315 | "", []>; |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 316 | |
Bob Wilson | 004a2e1 | 2009-10-07 18:09:32 +0000 | [diff] [blame] | 317 | // vld4 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 318 | def VLD4q8a : VLD4WB<0b0000, "8">; |
| 319 | def VLD4q16a : VLD4WB<0b0100, "16">; |
| 320 | def VLD4q32a : VLD4WB<0b1000, "32">; |
Bob Wilson | 004a2e1 | 2009-10-07 18:09:32 +0000 | [diff] [blame] | 321 | |
| 322 | // vld4 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 323 | def VLD4q8b : VLD4WB<0b0000, "8">; |
| 324 | def VLD4q16b : VLD4WB<0b0100, "16">; |
| 325 | def VLD4q32b : VLD4WB<0b1000, "32">; |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 326 | |
| 327 | // VLD1LN : Vector Load (single element to one lane) |
| 328 | // FIXME: Not yet implemented. |
Bob Wilson | 004a2e1 | 2009-10-07 18:09:32 +0000 | [diff] [blame] | 329 | |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 330 | // VLD2LN : Vector Load (single 2-element structure to one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 331 | class VLD2LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 332 | : NLdSt<1,0b10,op11_8,{?,?,?,?}, (outs DPR:$dst1, DPR:$dst2), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 333 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, nohash_imm:$lane), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 334 | IIC_VLD2, "vld2", Dt, "\\{$dst1[$lane], $dst2[$lane]\\}, $addr", |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 335 | "$src1 = $dst1, $src2 = $dst2", []>; |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 336 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 337 | // vld2 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 338 | def VLD2LNd8 : VLD2LN<0b0001, "8">; |
| 339 | def VLD2LNd16 : VLD2LN<0b0101, "16"> { let Inst{5} = 0; } |
| 340 | def VLD2LNd32 : VLD2LN<0b1001, "32"> { let Inst{6} = 0; } |
Bob Wilson | 5687d8a | 2009-10-08 18:56:10 +0000 | [diff] [blame] | 341 | |
| 342 | // vld2 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 343 | def VLD2LNq16a: VLD2LN<0b0101, "16"> { let Inst{5} = 1; } |
| 344 | def VLD2LNq32a: VLD2LN<0b1001, "32"> { let Inst{6} = 1; } |
Bob Wilson | 5687d8a | 2009-10-08 18:56:10 +0000 | [diff] [blame] | 345 | |
| 346 | // vld2 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 347 | def VLD2LNq16b: VLD2LN<0b0101, "16"> { let Inst{5} = 1; } |
| 348 | def VLD2LNq32b: VLD2LN<0b1001, "32"> { let Inst{6} = 1; } |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 349 | |
| 350 | // VLD3LN : Vector Load (single 3-element structure to one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 351 | class VLD3LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 352 | : NLdSt<1,0b10,op11_8,{?,?,?,?}, (outs DPR:$dst1, DPR:$dst2, DPR:$dst3), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 353 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 354 | nohash_imm:$lane), IIC_VLD3, "vld3", Dt, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 355 | "\\{$dst1[$lane], $dst2[$lane], $dst3[$lane]\\}, $addr", |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 356 | "$src1 = $dst1, $src2 = $dst2, $src3 = $dst3", []>; |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 357 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 358 | // vld3 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 359 | def VLD3LNd8 : VLD3LN<0b0010, "8"> { let Inst{4} = 0; } |
| 360 | def VLD3LNd16 : VLD3LN<0b0110, "16"> { let Inst{5-4} = 0b00; } |
| 361 | def VLD3LNd32 : VLD3LN<0b1010, "32"> { let Inst{6-4} = 0b000; } |
Bob Wilson | 47a1ff6 | 2009-10-08 22:27:33 +0000 | [diff] [blame] | 362 | |
| 363 | // vld3 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 364 | def VLD3LNq16a: VLD3LN<0b0110, "16"> { let Inst{5-4} = 0b10; } |
| 365 | def VLD3LNq32a: VLD3LN<0b1010, "32"> { let Inst{6-4} = 0b100; } |
Bob Wilson | 47a1ff6 | 2009-10-08 22:27:33 +0000 | [diff] [blame] | 366 | |
| 367 | // vld3 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 368 | def VLD3LNq16b: VLD3LN<0b0110, "16"> { let Inst{5-4} = 0b10; } |
| 369 | def VLD3LNq32b: VLD3LN<0b1010, "32"> { let Inst{6-4} = 0b100; } |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 370 | |
| 371 | // VLD4LN : Vector Load (single 4-element structure to one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 372 | class VLD4LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 373 | : NLdSt<1,0b10,op11_8,{?,?,?,?}, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 374 | (outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4), |
| 375 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 376 | nohash_imm:$lane), IIC_VLD4, "vld4", Dt, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 377 | "\\{$dst1[$lane], $dst2[$lane], $dst3[$lane], $dst4[$lane]\\}, $addr", |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 378 | "$src1 = $dst1, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4", []>; |
Bob Wilson | d14b8b6 | 2009-09-01 04:26:28 +0000 | [diff] [blame] | 379 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 380 | // vld4 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 381 | def VLD4LNd8 : VLD4LN<0b0011, "8">; |
| 382 | def VLD4LNd16 : VLD4LN<0b0111, "16"> { let Inst{5} = 0; } |
| 383 | def VLD4LNd32 : VLD4LN<0b1011, "32"> { let Inst{6} = 0; } |
Bob Wilson | 7a8c6df | 2009-10-08 22:53:57 +0000 | [diff] [blame] | 384 | |
| 385 | // vld4 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 386 | def VLD4LNq16a: VLD4LN<0b0111, "16"> { let Inst{5} = 1; } |
| 387 | def VLD4LNq32a: VLD4LN<0b1011, "32"> { let Inst{6} = 1; } |
Bob Wilson | 7a8c6df | 2009-10-08 22:53:57 +0000 | [diff] [blame] | 388 | |
| 389 | // vld4 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 390 | def VLD4LNq16b: VLD4LN<0b0111, "16"> { let Inst{5} = 1; } |
| 391 | def VLD4LNq32b: VLD4LN<0b1011, "32"> { let Inst{6} = 1; } |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 392 | |
| 393 | // VLD1DUP : Vector Load (single element to all lanes) |
| 394 | // VLD2DUP : Vector Load (single 2-element structure to all lanes) |
| 395 | // VLD3DUP : Vector Load (single 3-element structure to all lanes) |
| 396 | // VLD4DUP : Vector Load (single 4-element structure to all lanes) |
| 397 | // FIXME: Not yet implemented. |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 398 | } // mayLoad = 1, hasExtraDefRegAllocReq = 1 |
Bob Wilson | ee27bec | 2009-08-12 00:49:01 +0000 | [diff] [blame] | 399 | |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 400 | // VST1 : Vector Store (multiple single elements) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 401 | class VST1D<bits<4> op7_4, string Dt, ValueType Ty> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 402 | : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins addrmode6:$addr, DPR:$src), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 403 | "vst1", Dt, "\\{$src\\}, $addr", "", |
| 404 | [(int_arm_neon_vst1 addrmode6:$addr, (Ty DPR:$src))]>; |
| 405 | class VST1Q<bits<4> op7_4, string Dt, ValueType Ty> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 406 | : NLdSt<0,0b00,0b1010,op7_4, (outs), (ins addrmode6:$addr, QPR:$src), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 407 | "vst1", Dt, "${src:dregpair}, $addr", "", |
| 408 | [(int_arm_neon_vst1 addrmode6:$addr, (Ty QPR:$src))]>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 409 | |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 410 | let hasExtraSrcRegAllocReq = 1 in { |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 411 | def VST1d8 : VST1D<0b0000, "8", v8i8>; |
| 412 | def VST1d16 : VST1D<0b0100, "16", v4i16>; |
| 413 | def VST1d32 : VST1D<0b1000, "32", v2i32>; |
| 414 | def VST1df : VST1D<0b1000, "32", v2f32>; |
| 415 | def VST1d64 : VST1D<0b1100, "64", v1i64>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 416 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 417 | def VST1q8 : VST1Q<0b0000, "8", v16i8>; |
| 418 | def VST1q16 : VST1Q<0b0100, "16", v8i16>; |
| 419 | def VST1q32 : VST1Q<0b1000, "32", v4i32>; |
| 420 | def VST1qf : VST1Q<0b1000, "32", v4f32>; |
| 421 | def VST1q64 : VST1Q<0b1100, "64", v2i64>; |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 422 | } // hasExtraSrcRegAllocReq |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 423 | |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 424 | // These (dreg triple/quadruple) are for disassembly only. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 425 | class VST1D3<bits<4> op7_4, string Dt> |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 426 | : NLdSt<0, 0b00, 0b0110, op7_4, (outs), |
| 427 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 428 | "vst1", Dt, "\\{$src1, $src2, $src3\\}, $addr", "", |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 429 | [/* For disassembly only; pattern left blank */]>; |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 430 | class VST1D4<bits<4> op7_4, string Dt> |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 431 | : NLdSt<0, 0b00, 0b0010, op7_4, (outs), |
| 432 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 433 | IIC_VST, "vst1", Dt, "\\{$src1, $src2, $src3, $src4\\}, $addr", "", |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 434 | [/* For disassembly only; pattern left blank */]>; |
| 435 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 436 | def VST1d8T : VST1D3<0b0000, "8">; |
| 437 | def VST1d16T : VST1D3<0b0100, "16">; |
| 438 | def VST1d32T : VST1D3<0b1000, "32">; |
| 439 | //def VST1d64T : VST1D3<0b1100, "64">; |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 440 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 441 | def VST1d8Q : VST1D4<0b0000, "8">; |
| 442 | def VST1d16Q : VST1D4<0b0100, "16">; |
| 443 | def VST1d32Q : VST1D4<0b1000, "32">; |
| 444 | //def VST1d64Q : VST1D4<0b1100, "64">; |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 445 | |
| 446 | |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 447 | let mayStore = 1, hasExtraSrcRegAllocReq = 1 in { |
Bob Wilson | 66b3400 | 2009-08-12 17:04:56 +0000 | [diff] [blame] | 448 | |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 449 | // VST2 : Vector Store (multiple 2-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 450 | class VST2D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 451 | : NLdSt<0,0b00,0b1000,op7_4, (outs), |
| 452 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 453 | "vst2", Dt, "\\{$src1, $src2\\}, $addr", "", []>; |
| 454 | class VST2Q<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 455 | : NLdSt<0,0b00,0b0011,op7_4, (outs), |
| 456 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 457 | IIC_VST, "vst2", Dt, "\\{$src1, $src2, $src3, $src4\\}, $addr", |
Bob Wilson | 5fa67d35 | 2009-10-07 18:47:39 +0000 | [diff] [blame] | 458 | "", []>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 459 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 460 | def VST2d8 : VST2D<0b0000, "8">; |
| 461 | def VST2d16 : VST2D<0b0100, "16">; |
| 462 | def VST2d32 : VST2D<0b1000, "32">; |
Bob Wilson | dd43d1e | 2009-10-08 00:21:01 +0000 | [diff] [blame] | 463 | def VST2d64 : NLdSt<0,0b00,0b1010,0b1100, (outs), |
| 464 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2), IIC_VST, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 465 | "vst1", "64", "\\{$src1, $src2\\}, $addr", "", []>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 466 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 467 | def VST2q8 : VST2Q<0b0000, "8">; |
| 468 | def VST2q16 : VST2Q<0b0100, "16">; |
| 469 | def VST2q32 : VST2Q<0b1000, "32">; |
Bob Wilson | 5fa67d35 | 2009-10-07 18:47:39 +0000 | [diff] [blame] | 470 | |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 471 | // These (double-spaced dreg pair) are for disassembly only. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 472 | class VST2Ddbl<bits<4> op7_4, string Dt> |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 473 | : NLdSt<0, 0b00, 0b1001, op7_4, (outs), |
| 474 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 475 | "vst2", Dt, "\\{$src1, $src2\\}, $addr", "", []>; |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 476 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 477 | def VST2d8D : VST2Ddbl<0b0000, "8">; |
| 478 | def VST2d16D : VST2Ddbl<0b0100, "16">; |
| 479 | def VST2d32D : VST2Ddbl<0b1000, "32">; |
Johnny Chen | 30c6aeb | 2010-02-24 02:57:20 +0000 | [diff] [blame] | 480 | |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 481 | // VST3 : Vector Store (multiple 3-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 482 | class VST3D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 483 | : NLdSt<0,0b00,0b0100,op7_4, (outs), |
| 484 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 485 | "vst3", Dt, "\\{$src1, $src2, $src3\\}, $addr", "", []>; |
| 486 | class VST3WB<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 487 | : NLdSt<0,0b00,0b0101,op7_4, (outs GPR:$wb), |
| 488 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3), IIC_VST, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 489 | "vst3", Dt, "\\{$src1, $src2, $src3\\}, $addr", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 490 | "$addr.addr = $wb", []>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 491 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 492 | def VST3d8 : VST3D<0b0000, "8">; |
| 493 | def VST3d16 : VST3D<0b0100, "16">; |
| 494 | def VST3d32 : VST3D<0b1000, "32">; |
Bob Wilson | 7200e5d | 2009-10-08 00:28:28 +0000 | [diff] [blame] | 495 | def VST3d64 : NLdSt<0,0b00,0b0110,0b1100, (outs), |
| 496 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3), |
| 497 | IIC_VST, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 498 | "vst1", "64", "\\{$src1, $src2, $src3\\}, $addr", "", []>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 499 | |
Bob Wilson | 2a85bd1 | 2009-10-07 20:30:08 +0000 | [diff] [blame] | 500 | // vst3 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 501 | def VST3q8a : VST3WB<0b0000, "8">; |
| 502 | def VST3q16a : VST3WB<0b0100, "16">; |
| 503 | def VST3q32a : VST3WB<0b1000, "32">; |
Bob Wilson | 2a85bd1 | 2009-10-07 20:30:08 +0000 | [diff] [blame] | 504 | |
| 505 | // vst3 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 506 | def VST3q8b : VST3WB<0b0000, "8">; |
| 507 | def VST3q16b : VST3WB<0b0100, "16">; |
| 508 | def VST3q32b : VST3WB<0b1000, "32">; |
Bob Wilson | 2a85bd1 | 2009-10-07 20:30:08 +0000 | [diff] [blame] | 509 | |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 510 | // VST4 : Vector Store (multiple 4-element structures) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 511 | class VST4D<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 512 | : NLdSt<0,0b00,0b0000,op7_4, (outs), |
| 513 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 514 | IIC_VST, "vst4", Dt, "\\{$src1, $src2, $src3, $src4\\}, $addr", |
Bob Wilson | 316062a | 2009-08-25 17:46:06 +0000 | [diff] [blame] | 515 | "", []>; |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 516 | class VST4WB<bits<4> op7_4, string Dt> |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 517 | : NLdSt<0,0b00,0b0001,op7_4, (outs GPR:$wb), |
| 518 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 519 | IIC_VST, "vst4", Dt, "\\{$src1, $src2, $src3, $src4\\}, $addr", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 520 | "$addr.addr = $wb", []>; |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 521 | |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 522 | def VST4d8 : VST4D<0b0000, "8">; |
| 523 | def VST4d16 : VST4D<0b0100, "16">; |
| 524 | def VST4d32 : VST4D<0b1000, "32">; |
Bob Wilson | 94b5d43 | 2009-10-08 05:18:18 +0000 | [diff] [blame] | 525 | def VST4d64 : NLdSt<0,0b00,0b0010,0b1100, (outs), |
| 526 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, |
| 527 | DPR:$src4), IIC_VST, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 528 | "vst1", "64", "\\{$src1, $src2, $src3, $src4\\}, $addr", |
| 529 | "", []>; |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 530 | |
Bob Wilson | 931c76b | 2009-10-07 20:49:18 +0000 | [diff] [blame] | 531 | // vst4 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 532 | def VST4q8a : VST4WB<0b0000, "8">; |
| 533 | def VST4q16a : VST4WB<0b0100, "16">; |
| 534 | def VST4q32a : VST4WB<0b1000, "32">; |
Bob Wilson | 931c76b | 2009-10-07 20:49:18 +0000 | [diff] [blame] | 535 | |
| 536 | // vst4 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 537 | def VST4q8b : VST4WB<0b0000, "8">; |
| 538 | def VST4q16b : VST4WB<0b0100, "16">; |
| 539 | def VST4q32b : VST4WB<0b1000, "32">; |
Bob Wilson | b172116 | 2009-10-07 21:53:04 +0000 | [diff] [blame] | 540 | |
| 541 | // VST1LN : Vector Store (single element from one lane) |
| 542 | // FIXME: Not yet implemented. |
Bob Wilson | 931c76b | 2009-10-07 20:49:18 +0000 | [diff] [blame] | 543 | |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 544 | // VST2LN : Vector Store (single 2-element structure from one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 545 | class VST2LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 546 | : NLdSt<1,0b00,op11_8,{?,?,?,?}, (outs), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 547 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, nohash_imm:$lane), |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 548 | IIC_VST, "vst2", Dt, "\\{$src1[$lane], $src2[$lane]\\}, $addr", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 549 | "", []>; |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 550 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 551 | // vst2 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 552 | def VST2LNd8 : VST2LN<0b0001, "8">; |
| 553 | def VST2LNd16 : VST2LN<0b0101, "16"> { let Inst{5} = 0; } |
| 554 | def VST2LNd32 : VST2LN<0b1001, "32"> { let Inst{6} = 0; } |
Bob Wilson | 18e94a7 | 2009-10-08 23:38:24 +0000 | [diff] [blame] | 555 | |
| 556 | // vst2 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 557 | def VST2LNq16a: VST2LN<0b0101, "16"> { let Inst{5} = 1; } |
| 558 | def VST2LNq32a: VST2LN<0b1001, "32"> { let Inst{6} = 1; } |
Bob Wilson | 18e94a7 | 2009-10-08 23:38:24 +0000 | [diff] [blame] | 559 | |
| 560 | // vst2 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 561 | def VST2LNq16b: VST2LN<0b0101, "16"> { let Inst{5} = 1; } |
| 562 | def VST2LNq32b: VST2LN<0b1001, "32"> { let Inst{6} = 1; } |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 563 | |
| 564 | // VST3LN : Vector Store (single 3-element structure from one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 565 | class VST3LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 566 | : NLdSt<1,0b00,op11_8,{?,?,?,?}, (outs), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 567 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 568 | nohash_imm:$lane), IIC_VST, "vst3", Dt, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 569 | "\\{$src1[$lane], $src2[$lane], $src3[$lane]\\}, $addr", "", []>; |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 570 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 571 | // vst3 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 572 | def VST3LNd8 : VST3LN<0b0010, "8"> { let Inst{4} = 0; } |
| 573 | def VST3LNd16 : VST3LN<0b0110, "16"> { let Inst{5-4} = 0b00; } |
| 574 | def VST3LNd32 : VST3LN<0b1010, "32"> { let Inst{6-4} = 0b000; } |
Bob Wilson | dbffb21 | 2009-10-08 23:51:31 +0000 | [diff] [blame] | 575 | |
| 576 | // vst3 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 577 | def VST3LNq16a: VST3LN<0b0110, "16"> { let Inst{5-4} = 0b10; } |
| 578 | def VST3LNq32a: VST3LN<0b1010, "32"> { let Inst{6-4} = 0b100; } |
Bob Wilson | dbffb21 | 2009-10-08 23:51:31 +0000 | [diff] [blame] | 579 | |
| 580 | // vst3 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 581 | def VST3LNq16b: VST3LN<0b0110, "16"> { let Inst{5-4} = 0b10; } |
| 582 | def VST3LNq32b: VST3LN<0b1010, "32"> { let Inst{6-4} = 0b100; } |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 583 | |
| 584 | // VST4LN : Vector Store (single 4-element structure from one lane) |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 585 | class VST4LN<bits<4> op11_8, string Dt> |
Johnny Chen | 46f784e | 2009-11-23 18:16:16 +0000 | [diff] [blame] | 586 | : NLdSt<1,0b00,op11_8,{?,?,?,?}, (outs), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 587 | (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4, |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 588 | nohash_imm:$lane), IIC_VST, "vst4", Dt, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 589 | "\\{$src1[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\\}, $addr", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 590 | "", []>; |
Bob Wilson | c2d6585 | 2009-09-01 18:51:56 +0000 | [diff] [blame] | 591 | |
Johnny Chen | 9a5dc8b | 2009-11-19 19:20:17 +0000 | [diff] [blame] | 592 | // vst4 to single-spaced registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 593 | def VST4LNd8 : VST4LN<0b0011, "8">; |
| 594 | def VST4LNd16 : VST4LN<0b0111, "16"> { let Inst{5} = 0; } |
| 595 | def VST4LNd32 : VST4LN<0b1011, "32"> { let Inst{6} = 0; } |
Bob Wilson | c7692e0 | 2009-10-09 00:01:36 +0000 | [diff] [blame] | 596 | |
| 597 | // vst4 to double-spaced even registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 598 | def VST4LNq16a: VST4LN<0b0111, "16"> { let Inst{5} = 1; } |
| 599 | def VST4LNq32a: VST4LN<0b1011, "32"> { let Inst{6} = 1; } |
Bob Wilson | c7692e0 | 2009-10-09 00:01:36 +0000 | [diff] [blame] | 600 | |
| 601 | // vst4 to double-spaced odd registers. |
Bob Wilson | 7070982 | 2010-03-18 20:18:39 +0000 | [diff] [blame] | 602 | def VST4LNq16b: VST4LN<0b0111, "16"> { let Inst{5} = 1; } |
| 603 | def VST4LNq32b: VST4LN<0b1011, "32"> { let Inst{6} = 1; } |
Bob Wilson | c7692e0 | 2009-10-09 00:01:36 +0000 | [diff] [blame] | 604 | |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 605 | } // mayStore = 1, hasExtraSrcRegAllocReq = 1 |
Bob Wilson | 6a209cd | 2009-08-06 18:47:44 +0000 | [diff] [blame] | 606 | |
Bob Wilson | ed592c0 | 2009-07-08 18:11:30 +0000 | [diff] [blame] | 607 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 608 | //===----------------------------------------------------------------------===// |
| 609 | // NEON pattern fragments |
| 610 | //===----------------------------------------------------------------------===// |
| 611 | |
| 612 | // Extract D sub-registers of Q registers. |
| 613 | // (arm_dsubreg_0 is 5; arm_dsubreg_1 is 6) |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 614 | def DSubReg_i8_reg : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 615 | return CurDAG->getTargetConstant(5 + N->getZExtValue() / 8, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 616 | }]>; |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 617 | def DSubReg_i16_reg : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 618 | return CurDAG->getTargetConstant(5 + N->getZExtValue() / 4, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 619 | }]>; |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 620 | def DSubReg_i32_reg : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 621 | return CurDAG->getTargetConstant(5 + N->getZExtValue() / 2, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 622 | }]>; |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 623 | def DSubReg_f64_reg : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 624 | return CurDAG->getTargetConstant(5 + N->getZExtValue(), MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 625 | }]>; |
Anton Korobeynikov | b261a19 | 2009-09-02 21:21:28 +0000 | [diff] [blame] | 626 | def DSubReg_f64_other_reg : SDNodeXForm<imm, [{ |
| 627 | return CurDAG->getTargetConstant(5 + (1 - N->getZExtValue()), MVT::i32); |
| 628 | }]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 629 | |
Anton Korobeynikov | 44e0a6c | 2009-08-28 23:41:26 +0000 | [diff] [blame] | 630 | // Extract S sub-registers of Q/D registers. |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 631 | // (arm_ssubreg_0 is 1; arm_ssubreg_1 is 2; etc.) |
| 632 | def SSubReg_f32_reg : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 633 | return CurDAG->getTargetConstant(1 + N->getZExtValue(), MVT::i32); |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 634 | }]>; |
| 635 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 636 | // Translate lane numbers from Q registers to D subregs. |
| 637 | def SubReg_i8_lane : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 638 | return CurDAG->getTargetConstant(N->getZExtValue() & 7, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 639 | }]>; |
| 640 | def SubReg_i16_lane : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 641 | return CurDAG->getTargetConstant(N->getZExtValue() & 3, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 642 | }]>; |
| 643 | def SubReg_i32_lane : SDNodeXForm<imm, [{ |
Owen Anderson | 36e3a6e | 2009-08-11 20:47:22 +0000 | [diff] [blame] | 644 | return CurDAG->getTargetConstant(N->getZExtValue() & 1, MVT::i32); |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 645 | }]>; |
| 646 | |
| 647 | //===----------------------------------------------------------------------===// |
| 648 | // Instruction Classes |
| 649 | //===----------------------------------------------------------------------===// |
| 650 | |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 651 | // Basic 2-register operations: single-, double- and quad-register. |
| 652 | class N2VS<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
| 653 | bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, |
| 654 | string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode> |
| 655 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, |
| 656 | (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), |
| 657 | IIC_VUNAD, OpcodeStr, Dt, "$dst, $src", "", []>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 658 | class N2VD<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 659 | bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, |
| 660 | string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 661 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 662 | (ins DPR:$src), IIC_VUNAD, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 663 | [(set DPR:$dst, (ResTy (OpNode (OpTy DPR:$src))))]>; |
| 664 | class N2VQ<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 665 | bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, |
| 666 | string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 667 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 668 | (ins QPR:$src), IIC_VUNAQ, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 669 | [(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src))))]>; |
| 670 | |
Bob Wilson | 7c7fe6e | 2010-02-17 22:42:54 +0000 | [diff] [blame] | 671 | // Basic 2-register intrinsics, both double- and quad-register. |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 672 | class N2VDInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 673 | bits<2> op17_16, bits<5> op11_7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 674 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 675 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 676 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 677 | (ins DPR:$src), itin, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 678 | [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src))))]>; |
| 679 | class N2VQInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 680 | bits<2> op17_16, bits<5> op11_7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 681 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 682 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 683 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 684 | (ins QPR:$src), itin, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 685 | [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src))))]>; |
| 686 | |
| 687 | // Narrow 2-register intrinsics. |
| 688 | class N2VNInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
| 689 | bits<2> op17_16, bits<5> op11_7, bit op6, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 690 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 691 | ValueType TyD, ValueType TyQ, Intrinsic IntOp> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 692 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 693 | (ins QPR:$src), itin, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 694 | [(set DPR:$dst, (TyD (IntOp (TyQ QPR:$src))))]>; |
| 695 | |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 696 | // Long 2-register intrinsics (currently only used for VMOVL). |
| 697 | class N2VLInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
| 698 | bits<2> op17_16, bits<5> op11_7, bit op6, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 699 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 700 | ValueType TyQ, ValueType TyD, Intrinsic IntOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 701 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs QPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 702 | (ins DPR:$src), itin, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 703 | [(set QPR:$dst, (TyQ (IntOp (TyD DPR:$src))))]>; |
| 704 | |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 705 | // 2-register shuffles (VTRN/VZIP/VUZP), both double- and quad-register. |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 706 | class N2VDShuffle<bits<2> op19_18, bits<5> op11_7, string OpcodeStr, string Dt> |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 707 | : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 0, 0, (outs DPR:$dst1, DPR:$dst2), |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 708 | (ins DPR:$src1, DPR:$src2), IIC_VPERMD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 709 | OpcodeStr, Dt, "$dst1, $dst2", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 710 | "$src1 = $dst1, $src2 = $dst2", []>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 711 | class N2VQShuffle<bits<2> op19_18, bits<5> op11_7, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 712 | InstrItinClass itin, string OpcodeStr, string Dt> |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 713 | : N2V<0b11, 0b11, op19_18, 0b10, op11_7, 1, 0, (outs QPR:$dst1, QPR:$dst2), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 714 | (ins QPR:$src1, QPR:$src2), itin, OpcodeStr, Dt, "$dst1, $dst2", |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 715 | "$src1 = $dst1, $src2 = $dst2", []>; |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 716 | |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 717 | // Basic 3-register operations: single-, double- and quad-register. |
| 718 | class N3VS<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
| 719 | string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, |
| 720 | SDNode OpNode, bit Commutable> |
| 721 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
| 722 | (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src1, DPR_VFP2:$src2), IIC_VBIND, |
| 723 | OpcodeStr, Dt, "$dst, $src1, $src2", "", []> { |
| 724 | let isCommutable = Commutable; |
| 725 | } |
| 726 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 727 | class N3VD<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 728 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 729 | ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 730 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 731 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 732 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
| 733 | [(set DPR:$dst, (ResTy (OpNode (OpTy DPR:$src1), (OpTy DPR:$src2))))]> { |
| 734 | let isCommutable = Commutable; |
| 735 | } |
| 736 | // Same as N3VD but no data type. |
| 737 | class N3VDX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
| 738 | InstrItinClass itin, string OpcodeStr, |
| 739 | ValueType ResTy, ValueType OpTy, |
| 740 | SDNode OpNode, bit Commutable> |
| 741 | : N3VX<op24, op23, op21_20, op11_8, 0, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 742 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), itin, |
| 743 | OpcodeStr, "$dst, $src1, $src2", "", |
| 744 | [(set DPR:$dst, (ResTy (OpNode (OpTy DPR:$src1), (OpTy DPR:$src2))))]>{ |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 745 | let isCommutable = Commutable; |
| 746 | } |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 747 | class N3VDSL<bits<2> op21_20, bits<4> op11_8, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 748 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 749 | ValueType Ty, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 750 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 751 | (outs DPR:$dst), (ins DPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 752 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 753 | [(set (Ty DPR:$dst), |
| 754 | (Ty (ShOp (Ty DPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 755 | (Ty (NEONvduplane (Ty DPR_VFP2:$src2), imm:$lane)))))]>{ |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 756 | let isCommutable = 0; |
| 757 | } |
| 758 | class N3VDSL16<bits<2> op21_20, bits<4> op11_8, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 759 | string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 760 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 761 | (outs DPR:$dst), (ins DPR:$src1, DPR_8:$src2, nohash_imm:$lane), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 762 | IIC_VMULi16D, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 763 | [(set (Ty DPR:$dst), |
| 764 | (Ty (ShOp (Ty DPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 765 | (Ty (NEONvduplane (Ty DPR_8:$src2), imm:$lane)))))]> { |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 766 | let isCommutable = 0; |
| 767 | } |
| 768 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 769 | class N3VQ<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 770 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 771 | ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 772 | : N3V<op24, op23, op21_20, op11_8, 1, op4, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 773 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 774 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
| 775 | [(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src1), (OpTy QPR:$src2))))]> { |
| 776 | let isCommutable = Commutable; |
| 777 | } |
| 778 | class N3VQX<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
| 779 | InstrItinClass itin, string OpcodeStr, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 780 | ValueType ResTy, ValueType OpTy, SDNode OpNode, bit Commutable> |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 781 | : N3VX<op24, op23, op21_20, op11_8, 1, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 782 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), itin, |
| 783 | OpcodeStr, "$dst, $src1, $src2", "", |
| 784 | [(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src1), (OpTy QPR:$src2))))]>{ |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 785 | let isCommutable = Commutable; |
| 786 | } |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 787 | class N3VQSL<bits<2> op21_20, bits<4> op11_8, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 788 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 789 | ValueType ResTy, ValueType OpTy, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 790 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 791 | (outs QPR:$dst), (ins QPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 792 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 793 | [(set (ResTy QPR:$dst), |
| 794 | (ResTy (ShOp (ResTy QPR:$src1), |
| 795 | (ResTy (NEONvduplane (OpTy DPR_VFP2:$src2), |
| 796 | imm:$lane)))))]> { |
| 797 | let isCommutable = 0; |
| 798 | } |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 799 | class N3VQSL16<bits<2> op21_20, bits<4> op11_8, string OpcodeStr, string Dt, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 800 | ValueType ResTy, ValueType OpTy, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 801 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 802 | (outs QPR:$dst), (ins QPR:$src1, DPR_8:$src2, nohash_imm:$lane), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 803 | IIC_VMULi16Q, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 804 | [(set (ResTy QPR:$dst), |
| 805 | (ResTy (ShOp (ResTy QPR:$src1), |
| 806 | (ResTy (NEONvduplane (OpTy DPR_8:$src2), |
| 807 | imm:$lane)))))]> { |
| 808 | let isCommutable = 0; |
| 809 | } |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 810 | |
| 811 | // Basic 3-register intrinsics, both double- and quad-register. |
| 812 | class N3VDInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 813 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 814 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp, bit Commutable> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 815 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 816 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 817 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 818 | [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src1), (OpTy DPR:$src2))))]> { |
| 819 | let isCommutable = Commutable; |
| 820 | } |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 821 | class N3VDIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 822 | string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 823 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 824 | (outs DPR:$dst), (ins DPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 825 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 826 | [(set (Ty DPR:$dst), |
| 827 | (Ty (IntOp (Ty DPR:$src1), |
| 828 | (Ty (NEONvduplane (Ty DPR_VFP2:$src2), |
| 829 | imm:$lane)))))]> { |
| 830 | let isCommutable = 0; |
| 831 | } |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 832 | class N3VDIntSL16<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 833 | string OpcodeStr, string Dt, ValueType Ty, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 834 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 835 | (outs DPR:$dst), (ins DPR:$src1, DPR_8:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 836 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 837 | [(set (Ty DPR:$dst), |
| 838 | (Ty (IntOp (Ty DPR:$src1), |
| 839 | (Ty (NEONvduplane (Ty DPR_8:$src2), |
| 840 | imm:$lane)))))]> { |
| 841 | let isCommutable = 0; |
| 842 | } |
| 843 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 844 | class N3VQInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 845 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 846 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp, bit Commutable> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 847 | : N3V<op24, op23, op21_20, op11_8, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 848 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 849 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 850 | [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src1), (OpTy QPR:$src2))))]> { |
| 851 | let isCommutable = Commutable; |
| 852 | } |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 853 | class N3VQIntSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 854 | string OpcodeStr, string Dt, |
| 855 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 856 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 857 | (outs QPR:$dst), (ins QPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 858 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 859 | [(set (ResTy QPR:$dst), |
| 860 | (ResTy (IntOp (ResTy QPR:$src1), |
| 861 | (ResTy (NEONvduplane (OpTy DPR_VFP2:$src2), |
| 862 | imm:$lane)))))]> { |
| 863 | let isCommutable = 0; |
| 864 | } |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 865 | class N3VQIntSL16<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 866 | string OpcodeStr, string Dt, |
| 867 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 868 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 869 | (outs QPR:$dst), (ins QPR:$src1, DPR_8:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 870 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 871 | [(set (ResTy QPR:$dst), |
| 872 | (ResTy (IntOp (ResTy QPR:$src1), |
| 873 | (ResTy (NEONvduplane (OpTy DPR_8:$src2), |
| 874 | imm:$lane)))))]> { |
| 875 | let isCommutable = 0; |
| 876 | } |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 877 | |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 878 | // Multiply-Add/Sub operations: single-, double- and quad-register. |
| 879 | class N3VSMulOp<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
| 880 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 881 | ValueType Ty, SDNode MulOp, SDNode OpNode> |
| 882 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
| 883 | (outs DPR_VFP2:$dst), |
| 884 | (ins DPR_VFP2:$src1, DPR_VFP2:$src2, DPR_VFP2:$src3), itin, |
| 885 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", []>; |
| 886 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 887 | class N3VDMulOp<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 888 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 889 | ValueType Ty, SDNode MulOp, SDNode OpNode> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 890 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 891 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2, DPR:$src3), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 892 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 893 | [(set DPR:$dst, (Ty (OpNode DPR:$src1, |
| 894 | (Ty (MulOp DPR:$src2, DPR:$src3)))))]>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 895 | class N3VDMulOpSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 896 | string OpcodeStr, string Dt, |
| 897 | ValueType Ty, SDNode MulOp, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 898 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 899 | (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 900 | (ins DPR:$src1, DPR:$src2, DPR_VFP2:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 901 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 902 | [(set (Ty DPR:$dst), |
| 903 | (Ty (ShOp (Ty DPR:$src1), |
| 904 | (Ty (MulOp DPR:$src2, |
| 905 | (Ty (NEONvduplane (Ty DPR_VFP2:$src3), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 906 | imm:$lane)))))))]>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 907 | class N3VDMulOpSL16<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 908 | string OpcodeStr, string Dt, |
| 909 | ValueType Ty, SDNode MulOp, SDNode ShOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 910 | : N3V<0, 1, op21_20, op11_8, 1, 0, |
| 911 | (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 912 | (ins DPR:$src1, DPR:$src2, DPR_8:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 913 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 914 | [(set (Ty DPR:$dst), |
| 915 | (Ty (ShOp (Ty DPR:$src1), |
| 916 | (Ty (MulOp DPR:$src2, |
| 917 | (Ty (NEONvduplane (Ty DPR_8:$src3), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 918 | imm:$lane)))))))]>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 919 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 920 | class N3VQMulOp<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 921 | InstrItinClass itin, string OpcodeStr, string Dt, ValueType Ty, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 922 | SDNode MulOp, SDNode OpNode> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 923 | : N3V<op24, op23, op21_20, op11_8, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 924 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2, QPR:$src3), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 925 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 926 | [(set QPR:$dst, (Ty (OpNode QPR:$src1, |
| 927 | (Ty (MulOp QPR:$src2, QPR:$src3)))))]>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 928 | class N3VQMulOpSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 929 | string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 930 | SDNode MulOp, SDNode ShOp> |
| 931 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 932 | (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 933 | (ins QPR:$src1, QPR:$src2, DPR_VFP2:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 934 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 935 | [(set (ResTy QPR:$dst), |
| 936 | (ResTy (ShOp (ResTy QPR:$src1), |
| 937 | (ResTy (MulOp QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 938 | (ResTy (NEONvduplane (OpTy DPR_VFP2:$src3), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 939 | imm:$lane)))))))]>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 940 | class N3VQMulOpSL16<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 941 | string OpcodeStr, string Dt, |
| 942 | ValueType ResTy, ValueType OpTy, |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 943 | SDNode MulOp, SDNode ShOp> |
| 944 | : N3V<1, 1, op21_20, op11_8, 1, 0, |
| 945 | (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 946 | (ins QPR:$src1, QPR:$src2, DPR_8:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 947 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 948 | [(set (ResTy QPR:$dst), |
| 949 | (ResTy (ShOp (ResTy QPR:$src1), |
| 950 | (ResTy (MulOp QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 951 | (ResTy (NEONvduplane (OpTy DPR_8:$src3), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 952 | imm:$lane)))))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 953 | |
| 954 | // Neon 3-argument intrinsics, both double- and quad-register. |
| 955 | // The destination register is also used as the first source operand register. |
| 956 | class N3VDInt3<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 957 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 958 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 959 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 960 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2, DPR:$src3), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 961 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 962 | [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src1), |
| 963 | (OpTy DPR:$src2), (OpTy DPR:$src3))))]>; |
| 964 | class N3VQInt3<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 965 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 966 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 967 | : N3V<op24, op23, op21_20, op11_8, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 968 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2, QPR:$src3), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 969 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 970 | [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src1), |
| 971 | (OpTy QPR:$src2), (OpTy QPR:$src3))))]>; |
| 972 | |
| 973 | // Neon Long 3-argument intrinsic. The destination register is |
| 974 | // a quad-register and is also used as the first source operand register. |
| 975 | class N3VLInt3<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 976 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 977 | ValueType TyQ, ValueType TyD, Intrinsic IntOp> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 978 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 979 | (outs QPR:$dst), (ins QPR:$src1, DPR:$src2, DPR:$src3), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 980 | OpcodeStr, Dt, "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 981 | [(set QPR:$dst, |
| 982 | (TyQ (IntOp (TyQ QPR:$src1), (TyD DPR:$src2), (TyD DPR:$src3))))]>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 983 | class N3VLInt3SL<bit op24, bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 984 | string OpcodeStr, string Dt, |
| 985 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 986 | : N3V<op24, 1, op21_20, op11_8, 1, 0, |
| 987 | (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 988 | (ins QPR:$src1, DPR:$src2, DPR_VFP2:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 989 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 990 | [(set (ResTy QPR:$dst), |
| 991 | (ResTy (IntOp (ResTy QPR:$src1), |
| 992 | (OpTy DPR:$src2), |
| 993 | (OpTy (NEONvduplane (OpTy DPR_VFP2:$src3), |
| 994 | imm:$lane)))))]>; |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 995 | class N3VLInt3SL16<bit op24, bits<2> op21_20, bits<4> op11_8, |
| 996 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 997 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 998 | : N3V<op24, 1, op21_20, op11_8, 1, 0, |
| 999 | (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1000 | (ins QPR:$src1, DPR:$src2, DPR_8:$src3, nohash_imm:$lane), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1001 | OpcodeStr, Dt, "$dst, $src2, $src3[$lane]", "$src1 = $dst", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1002 | [(set (ResTy QPR:$dst), |
| 1003 | (ResTy (IntOp (ResTy QPR:$src1), |
| 1004 | (OpTy DPR:$src2), |
| 1005 | (OpTy (NEONvduplane (OpTy DPR_8:$src3), |
| 1006 | imm:$lane)))))]>; |
| 1007 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1008 | // Narrowing 3-register intrinsics. |
| 1009 | class N3VNInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1010 | string OpcodeStr, string Dt, ValueType TyD, ValueType TyQ, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1011 | Intrinsic IntOp, bit Commutable> |
| 1012 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1013 | (outs DPR:$dst), (ins QPR:$src1, QPR:$src2), IIC_VBINi4D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1014 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1015 | [(set DPR:$dst, (TyD (IntOp (TyQ QPR:$src1), (TyQ QPR:$src2))))]> { |
| 1016 | let isCommutable = Commutable; |
| 1017 | } |
| 1018 | |
| 1019 | // Long 3-register intrinsics. |
| 1020 | class N3VLInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1021 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1022 | ValueType TyQ, ValueType TyD, Intrinsic IntOp, bit Commutable> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1023 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1024 | (outs QPR:$dst), (ins DPR:$src1, DPR:$src2), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1025 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1026 | [(set QPR:$dst, (TyQ (IntOp (TyD DPR:$src1), (TyD DPR:$src2))))]> { |
| 1027 | let isCommutable = Commutable; |
| 1028 | } |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1029 | class N3VLIntSL<bit op24, bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1030 | string OpcodeStr, string Dt, |
| 1031 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1032 | : N3V<op24, 1, op21_20, op11_8, 1, 0, |
| 1033 | (outs QPR:$dst), (ins DPR:$src1, DPR_VFP2:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1034 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1035 | [(set (ResTy QPR:$dst), |
| 1036 | (ResTy (IntOp (OpTy DPR:$src1), |
| 1037 | (OpTy (NEONvduplane (OpTy DPR_VFP2:$src2), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 1038 | imm:$lane)))))]>; |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1039 | class N3VLIntSL16<bit op24, bits<2> op21_20, bits<4> op11_8, |
| 1040 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1041 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1042 | : N3V<op24, 1, op21_20, op11_8, 1, 0, |
| 1043 | (outs QPR:$dst), (ins DPR:$src1, DPR_8:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1044 | itin, OpcodeStr, Dt, "$dst, $src1, $src2[$lane]", "", |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1045 | [(set (ResTy QPR:$dst), |
| 1046 | (ResTy (IntOp (OpTy DPR:$src1), |
| 1047 | (OpTy (NEONvduplane (OpTy DPR_8:$src2), |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 1048 | imm:$lane)))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1049 | |
| 1050 | // Wide 3-register intrinsics. |
| 1051 | class N3VWInt<bit op24, bit op23, bits<2> op21_20, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1052 | string OpcodeStr, string Dt, ValueType TyQ, ValueType TyD, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1053 | Intrinsic IntOp, bit Commutable> |
| 1054 | : N3V<op24, op23, op21_20, op11_8, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1055 | (outs QPR:$dst), (ins QPR:$src1, DPR:$src2), IIC_VSUBiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1056 | OpcodeStr, Dt, "$dst, $src1, $src2", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1057 | [(set QPR:$dst, (TyQ (IntOp (TyQ QPR:$src1), (TyD DPR:$src2))))]> { |
| 1058 | let isCommutable = Commutable; |
| 1059 | } |
| 1060 | |
| 1061 | // Pairwise long 2-register intrinsics, both double- and quad-register. |
| 1062 | class N2VDPLInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1063 | bits<2> op17_16, bits<5> op11_7, bit op4, |
| 1064 | string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1065 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 1066 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1067 | (ins DPR:$src), IIC_VSHLiD, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1068 | [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src))))]>; |
| 1069 | class N2VQPLInt<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1070 | bits<2> op17_16, bits<5> op11_7, bit op4, |
| 1071 | string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1072 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 1073 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$dst), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1074 | (ins QPR:$src), IIC_VSHLiD, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1075 | [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src))))]>; |
| 1076 | |
| 1077 | // Pairwise long 2-register accumulate intrinsics, |
| 1078 | // both double- and quad-register. |
| 1079 | // The destination register is also used as the first source operand register. |
| 1080 | class N2VDPLInt2<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1081 | bits<2> op17_16, bits<5> op11_7, bit op4, |
| 1082 | string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1083 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 1084 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1085 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2), IIC_VPALiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1086 | OpcodeStr, Dt, "$dst, $src2", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1087 | [(set DPR:$dst, (ResTy (IntOp (ResTy DPR:$src1), (OpTy DPR:$src2))))]>; |
| 1088 | class N2VQPLInt2<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1089 | bits<2> op17_16, bits<5> op11_7, bit op4, |
| 1090 | string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1091 | ValueType ResTy, ValueType OpTy, Intrinsic IntOp> |
| 1092 | : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1093 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2), IIC_VPALiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1094 | OpcodeStr, Dt, "$dst, $src2", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1095 | [(set QPR:$dst, (ResTy (IntOp (ResTy QPR:$src1), (OpTy QPR:$src2))))]>; |
| 1096 | |
| 1097 | // Shift by immediate, |
| 1098 | // both double- and quad-register. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1099 | class N2VDSh<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1100 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1101 | ValueType Ty, SDNode OpNode> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1102 | : N2VImm<op24, op23, op11_8, op7, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1103 | (outs DPR:$dst), (ins DPR:$src, i32imm:$SIMM), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1104 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1105 | [(set DPR:$dst, (Ty (OpNode (Ty DPR:$src), (i32 imm:$SIMM))))]>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1106 | class N2VQSh<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1107 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1108 | ValueType Ty, SDNode OpNode> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1109 | : N2VImm<op24, op23, op11_8, op7, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1110 | (outs QPR:$dst), (ins QPR:$src, i32imm:$SIMM), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1111 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1112 | [(set QPR:$dst, (Ty (OpNode (Ty QPR:$src), (i32 imm:$SIMM))))]>; |
| 1113 | |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 1114 | // Long shift by immediate. |
| 1115 | class N2VLSh<bit op24, bit op23, bits<4> op11_8, bit op7, bit op6, bit op4, |
| 1116 | string OpcodeStr, string Dt, |
| 1117 | ValueType ResTy, ValueType OpTy, SDNode OpNode> |
| 1118 | : N2VImm<op24, op23, op11_8, op7, op6, op4, |
| 1119 | (outs QPR:$dst), (ins DPR:$src, i32imm:$SIMM), IIC_VSHLiD, |
| 1120 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
| 1121 | [(set QPR:$dst, (ResTy (OpNode (OpTy DPR:$src), |
| 1122 | (i32 imm:$SIMM))))]>; |
| 1123 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1124 | // Narrow shift by immediate. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1125 | class N2VNSh<bit op24, bit op23, bits<4> op11_8, bit op7, bit op6, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1126 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1127 | ValueType ResTy, ValueType OpTy, SDNode OpNode> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1128 | : N2VImm<op24, op23, op11_8, op7, op6, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1129 | (outs DPR:$dst), (ins QPR:$src, i32imm:$SIMM), itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1130 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1131 | [(set DPR:$dst, (ResTy (OpNode (OpTy QPR:$src), |
| 1132 | (i32 imm:$SIMM))))]>; |
| 1133 | |
| 1134 | // Shift right by immediate and accumulate, |
| 1135 | // both double- and quad-register. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1136 | class N2VDShAdd<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1137 | string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1138 | : N2VImm<op24, op23, op11_8, op7, 0, op4, (outs DPR:$dst), |
| 1139 | (ins DPR:$src1, DPR:$src2, i32imm:$SIMM), IIC_VPALiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1140 | OpcodeStr, Dt, "$dst, $src2, $SIMM", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1141 | [(set DPR:$dst, (Ty (add DPR:$src1, |
| 1142 | (Ty (ShOp DPR:$src2, (i32 imm:$SIMM))))))]>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1143 | class N2VQShAdd<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1144 | string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1145 | : N2VImm<op24, op23, op11_8, op7, 1, op4, (outs QPR:$dst), |
| 1146 | (ins QPR:$src1, QPR:$src2, i32imm:$SIMM), IIC_VPALiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1147 | OpcodeStr, Dt, "$dst, $src2, $SIMM", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1148 | [(set QPR:$dst, (Ty (add QPR:$src1, |
| 1149 | (Ty (ShOp QPR:$src2, (i32 imm:$SIMM))))))]>; |
| 1150 | |
| 1151 | // Shift by immediate and insert, |
| 1152 | // both double- and quad-register. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1153 | class N2VDShIns<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1154 | string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1155 | : N2VImm<op24, op23, op11_8, op7, 0, op4, (outs DPR:$dst), |
| 1156 | (ins DPR:$src1, DPR:$src2, i32imm:$SIMM), IIC_VSHLiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1157 | OpcodeStr, Dt, "$dst, $src2, $SIMM", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1158 | [(set DPR:$dst, (Ty (ShOp DPR:$src1, DPR:$src2, (i32 imm:$SIMM))))]>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1159 | class N2VQShIns<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1160 | string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1161 | : N2VImm<op24, op23, op11_8, op7, 1, op4, (outs QPR:$dst), |
| 1162 | (ins QPR:$src1, QPR:$src2, i32imm:$SIMM), IIC_VSHLiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1163 | OpcodeStr, Dt, "$dst, $src2, $SIMM", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1164 | [(set QPR:$dst, (Ty (ShOp QPR:$src1, QPR:$src2, (i32 imm:$SIMM))))]>; |
| 1165 | |
| 1166 | // Convert, with fractional bits immediate, |
| 1167 | // both double- and quad-register. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1168 | class N2VCvtD<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1169 | string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1170 | Intrinsic IntOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1171 | : N2VImm<op24, op23, op11_8, op7, 0, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1172 | (outs DPR:$dst), (ins DPR:$src, i32imm:$SIMM), IIC_VUNAD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1173 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1174 | [(set DPR:$dst, (ResTy (IntOp (OpTy DPR:$src), (i32 imm:$SIMM))))]>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1175 | class N2VCvtQ<bit op24, bit op23, bits<4> op11_8, bit op7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1176 | string OpcodeStr, string Dt, ValueType ResTy, ValueType OpTy, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1177 | Intrinsic IntOp> |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1178 | : N2VImm<op24, op23, op11_8, op7, 1, op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1179 | (outs QPR:$dst), (ins QPR:$src, i32imm:$SIMM), IIC_VUNAQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1180 | OpcodeStr, Dt, "$dst, $src, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1181 | [(set QPR:$dst, (ResTy (IntOp (OpTy QPR:$src), (i32 imm:$SIMM))))]>; |
| 1182 | |
| 1183 | //===----------------------------------------------------------------------===// |
| 1184 | // Multiclasses |
| 1185 | //===----------------------------------------------------------------------===// |
| 1186 | |
Bob Wilson | 8af7b53 | 2009-10-03 04:44:16 +0000 | [diff] [blame] | 1187 | // Abbreviations used in multiclass suffixes: |
| 1188 | // Q = quarter int (8 bit) elements |
| 1189 | // H = half int (16 bit) elements |
| 1190 | // S = single int (32 bit) elements |
| 1191 | // D = double int (64 bit) elements |
| 1192 | |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1193 | // Neon 2-register vector operations -- for disassembly only. |
| 1194 | |
| 1195 | // First with only element sizes of 8, 16 and 32 bits: |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1196 | multiclass N2V_QHS_cmp<bits<2> op24_23, bits<2> op21_20, bits<2> op17_16, |
| 1197 | bits<5> op11_7, bit op4, string opc, string Dt, |
| 1198 | string asm> { |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1199 | // 64-bit vector types. |
| 1200 | def v8i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 0, op4, |
| 1201 | (outs DPR:$dst), (ins DPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1202 | opc, !strconcat(Dt, "8"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1203 | def v4i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 0, op4, |
| 1204 | (outs DPR:$dst), (ins DPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1205 | opc, !strconcat(Dt, "16"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1206 | def v2i32 : N2V<op24_23, op21_20, 0b10, op17_16, op11_7, 0, op4, |
| 1207 | (outs DPR:$dst), (ins DPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1208 | opc, !strconcat(Dt, "32"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1209 | def v2f32 : N2V<op24_23, op21_20, 0b10, op17_16, op11_7, 0, op4, |
| 1210 | (outs DPR:$dst), (ins DPR:$src), NoItinerary, |
| 1211 | opc, "f32", asm, "", []> { |
| 1212 | let Inst{10} = 1; // overwrite F = 1 |
| 1213 | } |
| 1214 | |
| 1215 | // 128-bit vector types. |
| 1216 | def v16i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 1, op4, |
| 1217 | (outs QPR:$dst), (ins QPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1218 | opc, !strconcat(Dt, "8"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1219 | def v8i16 : N2V<op24_23, op21_20, 0b01, op17_16, op11_7, 1, op4, |
| 1220 | (outs QPR:$dst), (ins QPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1221 | opc, !strconcat(Dt, "16"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1222 | def v4i32 : N2V<op24_23, op21_20, 0b10, op17_16, op11_7, 1, op4, |
| 1223 | (outs QPR:$dst), (ins QPR:$src), NoItinerary, |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 1224 | opc, !strconcat(Dt, "32"), asm, "", []>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 1225 | def v4f32 : N2V<op24_23, op21_20, 0b10, op17_16, op11_7, 1, op4, |
| 1226 | (outs QPR:$dst), (ins QPR:$src), NoItinerary, |
| 1227 | opc, "f32", asm, "", []> { |
| 1228 | let Inst{10} = 1; // overwrite F = 1 |
| 1229 | } |
| 1230 | } |
| 1231 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1232 | // Neon 3-register vector operations. |
| 1233 | |
| 1234 | // First with only element sizes of 8, 16 and 32 bits: |
| 1235 | multiclass N3V_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1236 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1237 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1238 | string OpcodeStr, string Dt, |
| 1239 | SDNode OpNode, bit Commutable = 0> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1240 | // 64-bit vector types. |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1241 | def v8i8 : N3VD<op24, op23, 0b00, op11_8, op4, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1242 | OpcodeStr, !strconcat(Dt, "8"), |
| 1243 | v8i8, v8i8, OpNode, Commutable>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1244 | def v4i16 : N3VD<op24, op23, 0b01, op11_8, op4, itinD16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1245 | OpcodeStr, !strconcat(Dt, "16"), |
| 1246 | v4i16, v4i16, OpNode, Commutable>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1247 | def v2i32 : N3VD<op24, op23, 0b10, op11_8, op4, itinD32, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1248 | OpcodeStr, !strconcat(Dt, "32"), |
| 1249 | v2i32, v2i32, OpNode, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1250 | |
| 1251 | // 128-bit vector types. |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1252 | def v16i8 : N3VQ<op24, op23, 0b00, op11_8, op4, itinQ16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1253 | OpcodeStr, !strconcat(Dt, "8"), |
| 1254 | v16i8, v16i8, OpNode, Commutable>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1255 | def v8i16 : N3VQ<op24, op23, 0b01, op11_8, op4, itinQ16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1256 | OpcodeStr, !strconcat(Dt, "16"), |
| 1257 | v8i16, v8i16, OpNode, Commutable>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1258 | def v4i32 : N3VQ<op24, op23, 0b10, op11_8, op4, itinQ32, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1259 | OpcodeStr, !strconcat(Dt, "32"), |
| 1260 | v4i32, v4i32, OpNode, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1261 | } |
| 1262 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1263 | multiclass N3VSL_HS<bits<4> op11_8, string OpcodeStr, string Dt, SDNode ShOp> { |
| 1264 | def v4i16 : N3VDSL16<0b01, op11_8, OpcodeStr, !strconcat(Dt, "16"), |
| 1265 | v4i16, ShOp>; |
| 1266 | def v2i32 : N3VDSL<0b10, op11_8, IIC_VMULi32D, OpcodeStr, !strconcat(Dt,"32"), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1267 | v2i32, ShOp>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1268 | def v8i16 : N3VQSL16<0b01, op11_8, OpcodeStr, !strconcat(Dt, "16"), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1269 | v8i16, v4i16, ShOp>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1270 | def v4i32 : N3VQSL<0b10, op11_8, IIC_VMULi32Q, OpcodeStr, !strconcat(Dt,"32"), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1271 | v4i32, v2i32, ShOp>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1272 | } |
| 1273 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1274 | // ....then also with element size 64 bits: |
| 1275 | multiclass N3V_QHSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1276 | InstrItinClass itinD, InstrItinClass itinQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1277 | string OpcodeStr, string Dt, |
| 1278 | SDNode OpNode, bit Commutable = 0> |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1279 | : N3V_QHS<op24, op23, op11_8, op4, itinD, itinD, itinQ, itinQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1280 | OpcodeStr, Dt, OpNode, Commutable> { |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1281 | def v1i64 : N3VD<op24, op23, 0b11, op11_8, op4, itinD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1282 | OpcodeStr, !strconcat(Dt, "64"), |
| 1283 | v1i64, v1i64, OpNode, Commutable>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1284 | def v2i64 : N3VQ<op24, op23, 0b11, op11_8, op4, itinQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1285 | OpcodeStr, !strconcat(Dt, "64"), |
| 1286 | v2i64, v2i64, OpNode, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1287 | } |
| 1288 | |
| 1289 | |
| 1290 | // Neon Narrowing 2-register vector intrinsics, |
| 1291 | // source operand element sizes of 16, 32 and 64 bits: |
| 1292 | multiclass N2VNInt_HSD<bits<2> op24_23, bits<2> op21_20, bits<2> op17_16, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1293 | bits<5> op11_7, bit op6, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1294 | InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1295 | Intrinsic IntOp> { |
| 1296 | def v8i8 : N2VNInt<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1297 | itin, OpcodeStr, !strconcat(Dt, "16"), |
| 1298 | v8i8, v8i16, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1299 | def v4i16 : N2VNInt<op24_23, op21_20, 0b01, op17_16, op11_7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1300 | itin, OpcodeStr, !strconcat(Dt, "32"), |
| 1301 | v4i16, v4i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1302 | def v2i32 : N2VNInt<op24_23, op21_20, 0b10, op17_16, op11_7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1303 | itin, OpcodeStr, !strconcat(Dt, "64"), |
| 1304 | v2i32, v2i64, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1305 | } |
| 1306 | |
| 1307 | |
| 1308 | // Neon Lengthening 2-register vector intrinsic (currently specific to VMOVL). |
| 1309 | // source operand element sizes of 16, 32 and 64 bits: |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1310 | multiclass N2VLInt_QHS<bits<2> op24_23, bits<5> op11_7, bit op6, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1311 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1312 | def v8i16 : N2VLInt<op24_23, 0b00, 0b10, 0b00, op11_7, op6, op4, IIC_VQUNAiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1313 | OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, IntOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1314 | def v4i32 : N2VLInt<op24_23, 0b01, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1315 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, IntOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1316 | def v2i64 : N2VLInt<op24_23, 0b10, 0b00, 0b00, op11_7, op6, op4, IIC_VQUNAiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1317 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1318 | } |
| 1319 | |
| 1320 | |
| 1321 | // Neon 3-register vector intrinsics. |
| 1322 | |
| 1323 | // First with only element sizes of 16 and 32 bits: |
| 1324 | multiclass N3VInt_HS<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1325 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1326 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1327 | string OpcodeStr, string Dt, |
| 1328 | Intrinsic IntOp, bit Commutable = 0> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1329 | // 64-bit vector types. |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1330 | def v4i16 : N3VDInt<op24, op23, 0b01, op11_8, op4, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1331 | OpcodeStr, !strconcat(Dt, "16"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1332 | v4i16, v4i16, IntOp, Commutable>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1333 | def v2i32 : N3VDInt<op24, op23, 0b10, op11_8, op4, itinD32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1334 | OpcodeStr, !strconcat(Dt, "32"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1335 | v2i32, v2i32, IntOp, Commutable>; |
| 1336 | |
| 1337 | // 128-bit vector types. |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1338 | def v8i16 : N3VQInt<op24, op23, 0b01, op11_8, op4, itinQ16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1339 | OpcodeStr, !strconcat(Dt, "16"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1340 | v8i16, v8i16, IntOp, Commutable>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1341 | def v4i32 : N3VQInt<op24, op23, 0b10, op11_8, op4, itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1342 | OpcodeStr, !strconcat(Dt, "32"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1343 | v4i32, v4i32, IntOp, Commutable>; |
| 1344 | } |
| 1345 | |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1346 | multiclass N3VIntSL_HS<bits<4> op11_8, |
| 1347 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1348 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1349 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1350 | def v4i16 : N3VDIntSL16<0b01, op11_8, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1351 | OpcodeStr, !strconcat(Dt, "16"), v4i16, IntOp>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1352 | def v2i32 : N3VDIntSL<0b10, op11_8, itinD32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1353 | OpcodeStr, !strconcat(Dt, "32"), v2i32, IntOp>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1354 | def v8i16 : N3VQIntSL16<0b01, op11_8, itinQ16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1355 | OpcodeStr, !strconcat(Dt, "16"), v8i16, v4i16, IntOp>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1356 | def v4i32 : N3VQIntSL<0b10, op11_8, itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1357 | OpcodeStr, !strconcat(Dt, "32"), v4i32, v2i32, IntOp>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1358 | } |
| 1359 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1360 | // ....then also with element size of 8 bits: |
| 1361 | multiclass N3VInt_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1362 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1363 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1364 | string OpcodeStr, string Dt, |
| 1365 | Intrinsic IntOp, bit Commutable = 0> |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1366 | : N3VInt_HS<op24, op23, op11_8, op4, itinD16, itinD32, itinQ16, itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1367 | OpcodeStr, Dt, IntOp, Commutable> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1368 | def v8i8 : N3VDInt<op24, op23, 0b00, op11_8, op4, itinD16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1369 | OpcodeStr, !strconcat(Dt, "8"), |
| 1370 | v8i8, v8i8, IntOp, Commutable>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1371 | def v16i8 : N3VQInt<op24, op23, 0b00, op11_8, op4, itinQ16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1372 | OpcodeStr, !strconcat(Dt, "8"), |
| 1373 | v16i8, v16i8, IntOp, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1374 | } |
| 1375 | |
| 1376 | // ....then also with element size of 64 bits: |
| 1377 | multiclass N3VInt_QHSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1378 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1379 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1380 | string OpcodeStr, string Dt, |
| 1381 | Intrinsic IntOp, bit Commutable = 0> |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1382 | : N3VInt_QHS<op24, op23, op11_8, op4, itinD16, itinD32, itinQ16, itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1383 | OpcodeStr, Dt, IntOp, Commutable> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1384 | def v1i64 : N3VDInt<op24, op23, 0b11, op11_8, op4, itinD32, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1385 | OpcodeStr, !strconcat(Dt, "64"), |
| 1386 | v1i64, v1i64, IntOp, Commutable>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1387 | def v2i64 : N3VQInt<op24, op23, 0b11, op11_8, op4, itinQ32, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1388 | OpcodeStr, !strconcat(Dt, "64"), |
| 1389 | v2i64, v2i64, IntOp, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1390 | } |
| 1391 | |
| 1392 | |
| 1393 | // Neon Narrowing 3-register vector intrinsics, |
| 1394 | // source operand element sizes of 16, 32 and 64 bits: |
| 1395 | multiclass N3VNInt_HSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1396 | string OpcodeStr, string Dt, |
| 1397 | Intrinsic IntOp, bit Commutable = 0> { |
| 1398 | def v8i8 : N3VNInt<op24, op23, 0b00, op11_8, op4, |
| 1399 | OpcodeStr, !strconcat(Dt, "16"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1400 | v8i8, v8i16, IntOp, Commutable>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1401 | def v4i16 : N3VNInt<op24, op23, 0b01, op11_8, op4, |
| 1402 | OpcodeStr, !strconcat(Dt, "32"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1403 | v4i16, v4i32, IntOp, Commutable>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1404 | def v2i32 : N3VNInt<op24, op23, 0b10, op11_8, op4, |
| 1405 | OpcodeStr, !strconcat(Dt, "64"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1406 | v2i32, v2i64, IntOp, Commutable>; |
| 1407 | } |
| 1408 | |
| 1409 | |
| 1410 | // Neon Long 3-register vector intrinsics. |
| 1411 | |
| 1412 | // First with only element sizes of 16 and 32 bits: |
| 1413 | multiclass N3VLInt_HS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1414 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1415 | Intrinsic IntOp, bit Commutable = 0> { |
| 1416 | def v4i32 : N3VLInt<op24, op23, 0b01, op11_8, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1417 | OpcodeStr, !strconcat(Dt, "16"), |
| 1418 | v4i32, v4i16, IntOp, Commutable>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1419 | def v2i64 : N3VLInt<op24, op23, 0b10, op11_8, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1420 | OpcodeStr, !strconcat(Dt, "32"), |
| 1421 | v2i64, v2i32, IntOp, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1422 | } |
| 1423 | |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1424 | multiclass N3VLIntSL_HS<bit op24, bits<4> op11_8, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1425 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1426 | Intrinsic IntOp> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1427 | def v4i16 : N3VLIntSL16<op24, 0b01, op11_8, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1428 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1429 | def v2i32 : N3VLIntSL<op24, 0b10, op11_8, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1430 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, IntOp>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1431 | } |
| 1432 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1433 | // ....then also with element size of 8 bits: |
| 1434 | multiclass N3VLInt_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1435 | InstrItinClass itin, string OpcodeStr, string Dt, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1436 | Intrinsic IntOp, bit Commutable = 0> |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1437 | : N3VLInt_HS<op24, op23, op11_8, op4, itin, OpcodeStr, Dt, |
| 1438 | IntOp, Commutable> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1439 | def v8i16 : N3VLInt<op24, op23, 0b00, op11_8, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1440 | OpcodeStr, !strconcat(Dt, "8"), |
| 1441 | v8i16, v8i8, IntOp, Commutable>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1442 | } |
| 1443 | |
| 1444 | |
| 1445 | // Neon Wide 3-register vector intrinsics, |
| 1446 | // source operand element sizes of 8, 16 and 32 bits: |
| 1447 | multiclass N3VWInt_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1448 | string OpcodeStr, string Dt, |
| 1449 | Intrinsic IntOp, bit Commutable = 0> { |
| 1450 | def v8i16 : N3VWInt<op24, op23, 0b00, op11_8, op4, |
| 1451 | OpcodeStr, !strconcat(Dt, "8"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1452 | v8i16, v8i8, IntOp, Commutable>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1453 | def v4i32 : N3VWInt<op24, op23, 0b01, op11_8, op4, |
| 1454 | OpcodeStr, !strconcat(Dt, "16"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1455 | v4i32, v4i16, IntOp, Commutable>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1456 | def v2i64 : N3VWInt<op24, op23, 0b10, op11_8, op4, |
| 1457 | OpcodeStr, !strconcat(Dt, "32"), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1458 | v2i64, v2i32, IntOp, Commutable>; |
| 1459 | } |
| 1460 | |
| 1461 | |
| 1462 | // Neon Multiply-Op vector operations, |
| 1463 | // element sizes of 8, 16 and 32 bits: |
| 1464 | multiclass N3VMulOp_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1465 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1466 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1467 | string OpcodeStr, string Dt, SDNode OpNode> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1468 | // 64-bit vector types. |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1469 | def v8i8 : N3VDMulOp<op24, op23, 0b00, op11_8, op4, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1470 | OpcodeStr, !strconcat(Dt, "8"), v8i8, mul, OpNode>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1471 | def v4i16 : N3VDMulOp<op24, op23, 0b01, op11_8, op4, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1472 | OpcodeStr, !strconcat(Dt, "16"), v4i16, mul, OpNode>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1473 | def v2i32 : N3VDMulOp<op24, op23, 0b10, op11_8, op4, itinD32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1474 | OpcodeStr, !strconcat(Dt, "32"), v2i32, mul, OpNode>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1475 | |
| 1476 | // 128-bit vector types. |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1477 | def v16i8 : N3VQMulOp<op24, op23, 0b00, op11_8, op4, itinQ16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1478 | OpcodeStr, !strconcat(Dt, "8"), v16i8, mul, OpNode>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1479 | def v8i16 : N3VQMulOp<op24, op23, 0b01, op11_8, op4, itinQ16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1480 | OpcodeStr, !strconcat(Dt, "16"), v8i16, mul, OpNode>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1481 | def v4i32 : N3VQMulOp<op24, op23, 0b10, op11_8, op4, itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1482 | OpcodeStr, !strconcat(Dt, "32"), v4i32, mul, OpNode>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1483 | } |
| 1484 | |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1485 | multiclass N3VMulOpSL_HS<bits<4> op11_8, |
| 1486 | InstrItinClass itinD16, InstrItinClass itinD32, |
| 1487 | InstrItinClass itinQ16, InstrItinClass itinQ32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1488 | string OpcodeStr, string Dt, SDNode ShOp> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1489 | def v4i16 : N3VDMulOpSL16<0b01, op11_8, itinD16, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1490 | OpcodeStr, !strconcat(Dt, "16"), v4i16, mul, ShOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1491 | def v2i32 : N3VDMulOpSL<0b10, op11_8, itinD32, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1492 | OpcodeStr, !strconcat(Dt, "32"), v2i32, mul, ShOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1493 | def v8i16 : N3VQMulOpSL16<0b01, op11_8, itinQ16, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1494 | OpcodeStr, !strconcat(Dt, "16"), v8i16, v4i16, |
| 1495 | mul, ShOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1496 | def v4i32 : N3VQMulOpSL<0b10, op11_8, itinQ32, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1497 | OpcodeStr, !strconcat(Dt, "32"), v4i32, v2i32, |
| 1498 | mul, ShOp>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1499 | } |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1500 | |
| 1501 | // Neon 3-argument intrinsics, |
| 1502 | // element sizes of 8, 16 and 32 bits: |
| 1503 | multiclass N3VInt3_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1504 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1505 | // 64-bit vector types. |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1506 | def v8i8 : N3VDInt3<op24, op23, 0b00, op11_8, op4, IIC_VMACi16D, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1507 | OpcodeStr, !strconcat(Dt, "8"), v8i8, v8i8, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1508 | def v4i16 : N3VDInt3<op24, op23, 0b01, op11_8, op4, IIC_VMACi16D, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1509 | OpcodeStr, !strconcat(Dt, "16"), v4i16, v4i16, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1510 | def v2i32 : N3VDInt3<op24, op23, 0b10, op11_8, op4, IIC_VMACi32D, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1511 | OpcodeStr, !strconcat(Dt, "32"), v2i32, v2i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1512 | |
| 1513 | // 128-bit vector types. |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1514 | def v16i8 : N3VQInt3<op24, op23, 0b00, op11_8, op4, IIC_VMACi16Q, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1515 | OpcodeStr, !strconcat(Dt, "8"), v16i8, v16i8, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1516 | def v8i16 : N3VQInt3<op24, op23, 0b01, op11_8, op4, IIC_VMACi16Q, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1517 | OpcodeStr, !strconcat(Dt, "16"), v8i16, v8i16, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1518 | def v4i32 : N3VQInt3<op24, op23, 0b10, op11_8, op4, IIC_VMACi32Q, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1519 | OpcodeStr, !strconcat(Dt, "32"), v4i32, v4i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1520 | } |
| 1521 | |
| 1522 | |
| 1523 | // Neon Long 3-argument intrinsics. |
| 1524 | |
| 1525 | // First with only element sizes of 16 and 32 bits: |
| 1526 | multiclass N3VLInt3_HS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1527 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1528 | def v4i32 : N3VLInt3<op24, op23, 0b01, op11_8, op4, IIC_VMACi16D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1529 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1530 | def v2i64 : N3VLInt3<op24, op23, 0b10, op11_8, op4, IIC_VMACi16D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1531 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1532 | } |
| 1533 | |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1534 | multiclass N3VLInt3SL_HS<bit op24, bits<4> op11_8, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1535 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1536 | def v4i16 : N3VLInt3SL16<op24, 0b01, op11_8, IIC_VMACi16D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1537 | OpcodeStr, !strconcat(Dt,"16"), v4i32, v4i16, IntOp>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1538 | def v2i32 : N3VLInt3SL<op24, 0b10, op11_8, IIC_VMACi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1539 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, IntOp>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1540 | } |
| 1541 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1542 | // ....then also with element size of 8 bits: |
| 1543 | multiclass N3VLInt3_QHS<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1544 | string OpcodeStr, string Dt, Intrinsic IntOp> |
| 1545 | : N3VLInt3_HS<op24, op23, op11_8, op4, OpcodeStr, Dt, IntOp> { |
Bob Wilson | 85f30d7 | 2009-10-15 21:57:47 +0000 | [diff] [blame] | 1546 | def v8i16 : N3VLInt3<op24, op23, 0b00, op11_8, op4, IIC_VMACi16D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1547 | OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1548 | } |
| 1549 | |
| 1550 | |
| 1551 | // Neon 2-register vector intrinsics, |
| 1552 | // element sizes of 8, 16 and 32 bits: |
| 1553 | multiclass N2VInt_QHS<bits<2> op24_23, bits<2> op21_20, bits<2> op17_16, |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 1554 | bits<5> op11_7, bit op4, |
| 1555 | InstrItinClass itinD, InstrItinClass itinQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1556 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1557 | // 64-bit vector types. |
| 1558 | def v8i8 : N2VDInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1559 | itinD, OpcodeStr, !strconcat(Dt, "8"), v8i8, v8i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1560 | def v4i16 : N2VDInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1561 | itinD, OpcodeStr, !strconcat(Dt, "16"),v4i16,v4i16,IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1562 | def v2i32 : N2VDInt<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1563 | itinD, OpcodeStr, !strconcat(Dt, "32"),v2i32,v2i32,IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1564 | |
| 1565 | // 128-bit vector types. |
| 1566 | def v16i8 : N2VQInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1567 | itinQ, OpcodeStr, !strconcat(Dt, "8"), v16i8,v16i8,IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1568 | def v8i16 : N2VQInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1569 | itinQ, OpcodeStr, !strconcat(Dt, "16"),v8i16,v8i16,IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1570 | def v4i32 : N2VQInt<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1571 | itinQ, OpcodeStr, !strconcat(Dt, "32"),v4i32,v4i32,IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1572 | } |
| 1573 | |
| 1574 | |
| 1575 | // Neon Pairwise long 2-register intrinsics, |
| 1576 | // element sizes of 8, 16 and 32 bits: |
| 1577 | multiclass N2VPLInt_QHS<bits<2> op24_23, bits<2> op21_20, bits<2> op17_16, |
| 1578 | bits<5> op11_7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1579 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1580 | // 64-bit vector types. |
| 1581 | def v8i8 : N2VDPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1582 | OpcodeStr, !strconcat(Dt, "8"), v4i16, v8i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1583 | def v4i16 : N2VDPLInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1584 | OpcodeStr, !strconcat(Dt, "16"), v2i32, v4i16, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1585 | def v2i32 : N2VDPLInt<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1586 | OpcodeStr, !strconcat(Dt, "32"), v1i64, v2i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1587 | |
| 1588 | // 128-bit vector types. |
| 1589 | def v16i8 : N2VQPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1590 | OpcodeStr, !strconcat(Dt, "8"), v8i16, v16i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1591 | def v8i16 : N2VQPLInt<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1592 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v8i16, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1593 | def v4i32 : N2VQPLInt<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1594 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v4i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1595 | } |
| 1596 | |
| 1597 | |
| 1598 | // Neon Pairwise long 2-register accumulate intrinsics, |
| 1599 | // element sizes of 8, 16 and 32 bits: |
| 1600 | multiclass N2VPLInt2_QHS<bits<2> op24_23, bits<2> op21_20, bits<2> op17_16, |
| 1601 | bits<5> op11_7, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1602 | string OpcodeStr, string Dt, Intrinsic IntOp> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1603 | // 64-bit vector types. |
| 1604 | def v8i8 : N2VDPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1605 | OpcodeStr, !strconcat(Dt, "8"), v4i16, v8i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1606 | def v4i16 : N2VDPLInt2<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1607 | OpcodeStr, !strconcat(Dt, "16"), v2i32, v4i16, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1608 | def v2i32 : N2VDPLInt2<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1609 | OpcodeStr, !strconcat(Dt, "32"), v1i64, v2i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1610 | |
| 1611 | // 128-bit vector types. |
| 1612 | def v16i8 : N2VQPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1613 | OpcodeStr, !strconcat(Dt, "8"), v8i16, v16i8, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1614 | def v8i16 : N2VQPLInt2<op24_23, op21_20, 0b01, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1615 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v8i16, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1616 | def v4i32 : N2VQPLInt2<op24_23, op21_20, 0b10, op17_16, op11_7, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1617 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v4i32, IntOp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1618 | } |
| 1619 | |
| 1620 | |
| 1621 | // Neon 2-register vector shift by immediate, |
| 1622 | // element sizes of 8, 16, 32 and 64 bits: |
| 1623 | multiclass N2VSh_QHSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1624 | InstrItinClass itin, string OpcodeStr, string Dt, |
| 1625 | SDNode OpNode> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1626 | // 64-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1627 | def v8i8 : N2VDSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1628 | OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1629 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1630 | } |
| 1631 | def v4i16 : N2VDSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1632 | OpcodeStr, !strconcat(Dt, "16"), v4i16, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1633 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1634 | } |
| 1635 | def v2i32 : N2VDSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1636 | OpcodeStr, !strconcat(Dt, "32"), v2i32, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1637 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1638 | } |
| 1639 | def v1i64 : N2VDSh<op24, op23, op11_8, 1, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1640 | OpcodeStr, !strconcat(Dt, "64"), v1i64, OpNode>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1641 | // imm6 = xxxxxx |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1642 | |
| 1643 | // 128-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1644 | def v16i8 : N2VQSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1645 | OpcodeStr, !strconcat(Dt, "8"), v16i8, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1646 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1647 | } |
| 1648 | def v8i16 : N2VQSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1649 | OpcodeStr, !strconcat(Dt, "16"), v8i16, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1650 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1651 | } |
| 1652 | def v4i32 : N2VQSh<op24, op23, op11_8, 0, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1653 | OpcodeStr, !strconcat(Dt, "32"), v4i32, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1654 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1655 | } |
| 1656 | def v2i64 : N2VQSh<op24, op23, op11_8, 1, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1657 | OpcodeStr, !strconcat(Dt, "64"), v2i64, OpNode>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1658 | // imm6 = xxxxxx |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1659 | } |
| 1660 | |
| 1661 | |
| 1662 | // Neon Shift-Accumulate vector operations, |
| 1663 | // element sizes of 8, 16, 32 and 64 bits: |
| 1664 | multiclass N2VShAdd_QHSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1665 | string OpcodeStr, string Dt, SDNode ShOp> { |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1666 | // 64-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1667 | def v8i8 : N2VDShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1668 | OpcodeStr, !strconcat(Dt, "8"), v8i8, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1669 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1670 | } |
| 1671 | def v4i16 : N2VDShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1672 | OpcodeStr, !strconcat(Dt, "16"), v4i16, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1673 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1674 | } |
| 1675 | def v2i32 : N2VDShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1676 | OpcodeStr, !strconcat(Dt, "32"), v2i32, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1677 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1678 | } |
| 1679 | def v1i64 : N2VDShAdd<op24, op23, op11_8, 1, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1680 | OpcodeStr, !strconcat(Dt, "64"), v1i64, ShOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1681 | // imm6 = xxxxxx |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1682 | |
| 1683 | // 128-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1684 | def v16i8 : N2VQShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1685 | OpcodeStr, !strconcat(Dt, "8"), v16i8, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1686 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1687 | } |
| 1688 | def v8i16 : N2VQShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1689 | OpcodeStr, !strconcat(Dt, "16"), v8i16, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1690 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1691 | } |
| 1692 | def v4i32 : N2VQShAdd<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1693 | OpcodeStr, !strconcat(Dt, "32"), v4i32, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1694 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1695 | } |
| 1696 | def v2i64 : N2VQShAdd<op24, op23, op11_8, 1, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1697 | OpcodeStr, !strconcat(Dt, "64"), v2i64, ShOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1698 | // imm6 = xxxxxx |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1699 | } |
| 1700 | |
| 1701 | |
| 1702 | // Neon Shift-Insert vector operations, |
| 1703 | // element sizes of 8, 16, 32 and 64 bits: |
| 1704 | multiclass N2VShIns_QHSD<bit op24, bit op23, bits<4> op11_8, bit op4, |
| 1705 | string OpcodeStr, SDNode ShOp> { |
| 1706 | // 64-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1707 | def v8i8 : N2VDShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1708 | OpcodeStr, "8", v8i8, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1709 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1710 | } |
| 1711 | def v4i16 : N2VDShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1712 | OpcodeStr, "16", v4i16, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1713 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1714 | } |
| 1715 | def v2i32 : N2VDShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1716 | OpcodeStr, "32", v2i32, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1717 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1718 | } |
| 1719 | def v1i64 : N2VDShIns<op24, op23, op11_8, 1, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1720 | OpcodeStr, "64", v1i64, ShOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1721 | // imm6 = xxxxxx |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1722 | |
| 1723 | // 128-bit vector types. |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1724 | def v16i8 : N2VQShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1725 | OpcodeStr, "8", v16i8, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1726 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1727 | } |
| 1728 | def v8i16 : N2VQShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1729 | OpcodeStr, "16", v8i16, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1730 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1731 | } |
| 1732 | def v4i32 : N2VQShIns<op24, op23, op11_8, 0, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1733 | OpcodeStr, "32", v4i32, ShOp> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1734 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1735 | } |
| 1736 | def v2i64 : N2VQShIns<op24, op23, op11_8, 1, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1737 | OpcodeStr, "64", v2i64, ShOp>; |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1738 | // imm6 = xxxxxx |
| 1739 | } |
| 1740 | |
| 1741 | // Neon Shift Long operations, |
| 1742 | // element sizes of 8, 16, 32 bits: |
| 1743 | multiclass N2VLSh_QHS<bit op24, bit op23, bits<4> op11_8, bit op7, bit op6, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1744 | bit op4, string OpcodeStr, string Dt, SDNode OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1745 | def v8i16 : N2VLSh<op24, op23, op11_8, op7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1746 | OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1747 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1748 | } |
| 1749 | def v4i32 : N2VLSh<op24, op23, op11_8, op7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1750 | OpcodeStr, !strconcat(Dt, "16"), v4i32, v4i16, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1751 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1752 | } |
| 1753 | def v2i64 : N2VLSh<op24, op23, op11_8, op7, op6, op4, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1754 | OpcodeStr, !strconcat(Dt, "32"), v2i64, v2i32, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1755 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1756 | } |
| 1757 | } |
| 1758 | |
| 1759 | // Neon Shift Narrow operations, |
| 1760 | // element sizes of 16, 32, 64 bits: |
| 1761 | multiclass N2VNSh_HSD<bit op24, bit op23, bits<4> op11_8, bit op7, bit op6, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1762 | bit op4, InstrItinClass itin, string OpcodeStr, string Dt, |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1763 | SDNode OpNode> { |
| 1764 | def v8i8 : N2VNSh<op24, op23, op11_8, op7, op6, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1765 | OpcodeStr, !strconcat(Dt, "16"), v8i8, v8i16, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1766 | let Inst{21-19} = 0b001; // imm6 = 001xxx |
| 1767 | } |
| 1768 | def v4i16 : N2VNSh<op24, op23, op11_8, op7, op6, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1769 | OpcodeStr, !strconcat(Dt, "32"), v4i16, v4i32, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1770 | let Inst{21-20} = 0b01; // imm6 = 01xxxx |
| 1771 | } |
| 1772 | def v2i32 : N2VNSh<op24, op23, op11_8, op7, op6, op4, itin, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1773 | OpcodeStr, !strconcat(Dt, "64"), v2i32, v2i64, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 1774 | let Inst{21} = 0b1; // imm6 = 1xxxxx |
| 1775 | } |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1776 | } |
| 1777 | |
| 1778 | //===----------------------------------------------------------------------===// |
| 1779 | // Instruction Definitions. |
| 1780 | //===----------------------------------------------------------------------===// |
| 1781 | |
| 1782 | // Vector Add Operations. |
| 1783 | |
| 1784 | // VADD : Vector Add (integer and floating-point) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1785 | defm VADD : N3V_QHSD<0, 0, 0b1000, 0, IIC_VBINiD, IIC_VBINiQ, "vadd", "i", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1786 | add, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1787 | def VADDfd : N3VD<0, 0, 0b00, 0b1101, 0, IIC_VBIND, "vadd", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1788 | v2f32, v2f32, fadd, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1789 | def VADDfq : N3VQ<0, 0, 0b00, 0b1101, 0, IIC_VBINQ, "vadd", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1790 | v4f32, v4f32, fadd, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1791 | // VADDL : Vector Add Long (Q = D + D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1792 | defm VADDLs : N3VLInt_QHS<0,1,0b0000,0, IIC_VSHLiD, "vaddl", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1793 | int_arm_neon_vaddls, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1794 | defm VADDLu : N3VLInt_QHS<1,1,0b0000,0, IIC_VSHLiD, "vaddl", "u", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1795 | int_arm_neon_vaddlu, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1796 | // VADDW : Vector Add Wide (Q = Q + D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1797 | defm VADDWs : N3VWInt_QHS<0,1,0b0001,0, "vaddw", "s", int_arm_neon_vaddws, 0>; |
| 1798 | defm VADDWu : N3VWInt_QHS<1,1,0b0001,0, "vaddw", "u", int_arm_neon_vaddwu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1799 | // VHADD : Vector Halving Add |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1800 | defm VHADDs : N3VInt_QHS<0,0,0b0000,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1801 | IIC_VBINi4Q, "vhadd", "s", int_arm_neon_vhadds, 1>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1802 | defm VHADDu : N3VInt_QHS<1,0,0b0000,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1803 | IIC_VBINi4Q, "vhadd", "u", int_arm_neon_vhaddu, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1804 | // VRHADD : Vector Rounding Halving Add |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1805 | defm VRHADDs : N3VInt_QHS<0,0,0b0001,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1806 | IIC_VBINi4Q, "vrhadd", "s", int_arm_neon_vrhadds, 1>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1807 | defm VRHADDu : N3VInt_QHS<1,0,0b0001,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1808 | IIC_VBINi4Q, "vrhadd", "u", int_arm_neon_vrhaddu, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1809 | // VQADD : Vector Saturating Add |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1810 | defm VQADDs : N3VInt_QHSD<0,0,0b0000,1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1811 | IIC_VBINi4Q, "vqadd", "s", int_arm_neon_vqadds, 1>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1812 | defm VQADDu : N3VInt_QHSD<1,0,0b0000,1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1813 | IIC_VBINi4Q, "vqadd", "u", int_arm_neon_vqaddu, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1814 | // VADDHN : Vector Add and Narrow Returning High Half (D = Q + Q) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1815 | defm VADDHN : N3VNInt_HSD<0,1,0b0100,0, "vaddhn", "i", |
| 1816 | int_arm_neon_vaddhn, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1817 | // VRADDHN : Vector Rounding Add and Narrow Returning High Half (D = Q + Q) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1818 | defm VRADDHN : N3VNInt_HSD<1,1,0b0100,0, "vraddhn", "i", |
| 1819 | int_arm_neon_vraddhn, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1820 | |
| 1821 | // Vector Multiply Operations. |
| 1822 | |
| 1823 | // VMUL : Vector Multiply (integer, polynomial and floating-point) |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1824 | defm VMUL : N3V_QHS<0, 0, 0b1001, 1, IIC_VMULi16D, IIC_VMULi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1825 | IIC_VMULi16Q, IIC_VMULi32Q, "vmul", "i", mul, 1>; |
| 1826 | def VMULpd : N3VDInt<1, 0, 0b00, 0b1001, 1, IIC_VMULi16D, "vmul", "p8", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1827 | v8i8, v8i8, int_arm_neon_vmulp, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1828 | def VMULpq : N3VQInt<1, 0, 0b00, 0b1001, 1, IIC_VMULi16Q, "vmul", "p8", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1829 | v16i8, v16i8, int_arm_neon_vmulp, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1830 | def VMULfd : N3VD<1, 0, 0b00, 0b1101, 1, IIC_VBIND, "vmul", "f32", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1831 | v2f32, v2f32, fmul, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1832 | def VMULfq : N3VQ<1, 0, 0b00, 0b1101, 1, IIC_VBINQ, "vmul", "f32", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1833 | v4f32, v4f32, fmul, 1>; |
| 1834 | defm VMULsl : N3VSL_HS<0b1000, "vmul", "i", mul>; |
| 1835 | def VMULslfd : N3VDSL<0b10, 0b1001, IIC_VBIND, "vmul", "f32", v2f32, fmul>; |
| 1836 | def VMULslfq : N3VQSL<0b10, 0b1001, IIC_VBINQ, "vmul", "f32", v4f32, |
| 1837 | v2f32, fmul>; |
| 1838 | |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1839 | def : Pat<(v8i16 (mul (v8i16 QPR:$src1), |
| 1840 | (v8i16 (NEONvduplane (v8i16 QPR:$src2), imm:$lane)))), |
| 1841 | (v8i16 (VMULslv8i16 (v8i16 QPR:$src1), |
| 1842 | (v4i16 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1843 | (DSubReg_i16_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1844 | (SubReg_i16_lane imm:$lane)))>; |
| 1845 | def : Pat<(v4i32 (mul (v4i32 QPR:$src1), |
| 1846 | (v4i32 (NEONvduplane (v4i32 QPR:$src2), imm:$lane)))), |
| 1847 | (v4i32 (VMULslv4i32 (v4i32 QPR:$src1), |
| 1848 | (v2i32 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1849 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1850 | (SubReg_i32_lane imm:$lane)))>; |
| 1851 | def : Pat<(v4f32 (fmul (v4f32 QPR:$src1), |
| 1852 | (v4f32 (NEONvduplane (v4f32 QPR:$src2), imm:$lane)))), |
| 1853 | (v4f32 (VMULslfq (v4f32 QPR:$src1), |
| 1854 | (v2f32 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1855 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1856 | (SubReg_i32_lane imm:$lane)))>; |
| 1857 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1858 | // VQDMULH : Vector Saturating Doubling Multiply Returning High Half |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1859 | defm VQDMULH : N3VInt_HS<0, 0, 0b1011, 0, IIC_VMULi16D, IIC_VMULi32D, |
| 1860 | IIC_VMULi16Q, IIC_VMULi32Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1861 | "vqdmulh", "s", int_arm_neon_vqdmulh, 1>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1862 | defm VQDMULHsl: N3VIntSL_HS<0b1100, IIC_VMULi16D, IIC_VMULi32D, |
| 1863 | IIC_VMULi16Q, IIC_VMULi32Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1864 | "vqdmulh", "s", int_arm_neon_vqdmulh>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1865 | def : Pat<(v8i16 (int_arm_neon_vqdmulh (v8i16 QPR:$src1), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1866 | (v8i16 (NEONvduplane (v8i16 QPR:$src2), |
| 1867 | imm:$lane)))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1868 | (v8i16 (VQDMULHslv8i16 (v8i16 QPR:$src1), |
| 1869 | (v4i16 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1870 | (DSubReg_i16_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1871 | (SubReg_i16_lane imm:$lane)))>; |
| 1872 | def : Pat<(v4i32 (int_arm_neon_vqdmulh (v4i32 QPR:$src1), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1873 | (v4i32 (NEONvduplane (v4i32 QPR:$src2), |
| 1874 | imm:$lane)))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1875 | (v4i32 (VQDMULHslv4i32 (v4i32 QPR:$src1), |
| 1876 | (v2i32 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1877 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1878 | (SubReg_i32_lane imm:$lane)))>; |
| 1879 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1880 | // VQRDMULH : Vector Rounding Saturating Doubling Multiply Returning High Half |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1881 | defm VQRDMULH : N3VInt_HS<1, 0, 0b1011, 0, IIC_VMULi16D, IIC_VMULi32D, |
| 1882 | IIC_VMULi16Q, IIC_VMULi32Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1883 | "vqrdmulh", "s", int_arm_neon_vqrdmulh, 1>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1884 | defm VQRDMULHsl : N3VIntSL_HS<0b1101, IIC_VMULi16D, IIC_VMULi32D, |
| 1885 | IIC_VMULi16Q, IIC_VMULi32Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1886 | "vqrdmulh", "s", int_arm_neon_vqrdmulh>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1887 | def : Pat<(v8i16 (int_arm_neon_vqrdmulh (v8i16 QPR:$src1), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1888 | (v8i16 (NEONvduplane (v8i16 QPR:$src2), |
| 1889 | imm:$lane)))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1890 | (v8i16 (VQRDMULHslv8i16 (v8i16 QPR:$src1), |
| 1891 | (v4i16 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1892 | (DSubReg_i16_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1893 | (SubReg_i16_lane imm:$lane)))>; |
| 1894 | def : Pat<(v4i32 (int_arm_neon_vqrdmulh (v4i32 QPR:$src1), |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1895 | (v4i32 (NEONvduplane (v4i32 QPR:$src2), |
| 1896 | imm:$lane)))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1897 | (v4i32 (VQRDMULHslv4i32 (v4i32 QPR:$src1), |
| 1898 | (v2i32 (EXTRACT_SUBREG QPR:$src2, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1899 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1900 | (SubReg_i32_lane imm:$lane)))>; |
| 1901 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1902 | // VMULL : Vector Multiply Long (integer and polynomial) (Q = D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1903 | defm VMULLs : N3VLInt_QHS<0,1,0b1100,0, IIC_VMULi16D, "vmull", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1904 | int_arm_neon_vmulls, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1905 | defm VMULLu : N3VLInt_QHS<1,1,0b1100,0, IIC_VMULi16D, "vmull", "u", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1906 | int_arm_neon_vmullu, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1907 | def VMULLp : N3VLInt<0, 1, 0b00, 0b1110, 0, IIC_VMULi16D, "vmull", "p8", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1908 | v8i16, v8i8, int_arm_neon_vmullp, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1909 | defm VMULLsls : N3VLIntSL_HS<0, 0b1010, IIC_VMULi16D, "vmull", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1910 | int_arm_neon_vmulls>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1911 | defm VMULLslu : N3VLIntSL_HS<1, 0b1010, IIC_VMULi16D, "vmull", "u", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1912 | int_arm_neon_vmullu>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1913 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1914 | // VQDMULL : Vector Saturating Doubling Multiply Long (Q = D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1915 | defm VQDMULL : N3VLInt_HS<0,1,0b1101,0, IIC_VMULi16D, "vqdmull", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1916 | int_arm_neon_vqdmull, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1917 | defm VQDMULLsl: N3VLIntSL_HS<0, 0b1011, IIC_VMULi16D, "vqdmull", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1918 | int_arm_neon_vqdmull>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1919 | |
| 1920 | // Vector Multiply-Accumulate and Multiply-Subtract Operations. |
| 1921 | |
| 1922 | // VMLA : Vector Multiply Accumulate (integer and floating-point) |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1923 | defm VMLA : N3VMulOp_QHS<0, 0, 0b1001, 0, IIC_VMACi16D, IIC_VMACi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1924 | IIC_VMACi16Q, IIC_VMACi32Q, "vmla", "i", add>; |
| 1925 | def VMLAfd : N3VDMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACD, "vmla", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1926 | v2f32, fmul, fadd>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1927 | def VMLAfq : N3VQMulOp<0, 0, 0b00, 0b1101, 1, IIC_VMACQ, "vmla", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1928 | v4f32, fmul, fadd>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1929 | defm VMLAsl : N3VMulOpSL_HS<0b0000, IIC_VMACi16D, IIC_VMACi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1930 | IIC_VMACi16Q, IIC_VMACi32Q, "vmla", "i", add>; |
| 1931 | def VMLAslfd : N3VDMulOpSL<0b10, 0b0001, IIC_VMACD, "vmla", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1932 | v2f32, fmul, fadd>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1933 | def VMLAslfq : N3VQMulOpSL<0b10, 0b0001, IIC_VMACQ, "vmla", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1934 | v4f32, v2f32, fmul, fadd>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1935 | |
| 1936 | def : Pat<(v8i16 (add (v8i16 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1937 | (mul (v8i16 QPR:$src2), |
| 1938 | (v8i16 (NEONvduplane (v8i16 QPR:$src3), imm:$lane))))), |
| 1939 | (v8i16 (VMLAslv8i16 (v8i16 QPR:$src1), (v8i16 QPR:$src2), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1940 | (v4i16 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1941 | (DSubReg_i16_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1942 | (SubReg_i16_lane imm:$lane)))>; |
| 1943 | |
| 1944 | def : Pat<(v4i32 (add (v4i32 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1945 | (mul (v4i32 QPR:$src2), |
| 1946 | (v4i32 (NEONvduplane (v4i32 QPR:$src3), imm:$lane))))), |
| 1947 | (v4i32 (VMLAslv4i32 (v4i32 QPR:$src1), (v4i32 QPR:$src2), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1948 | (v2i32 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1949 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1950 | (SubReg_i32_lane imm:$lane)))>; |
| 1951 | |
| 1952 | def : Pat<(v4f32 (fadd (v4f32 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1953 | (fmul (v4f32 QPR:$src2), |
| 1954 | (v4f32 (NEONvduplane (v4f32 QPR:$src3), imm:$lane))))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1955 | (v4f32 (VMLAslfq (v4f32 QPR:$src1), |
| 1956 | (v4f32 QPR:$src2), |
| 1957 | (v2f32 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1958 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1959 | (SubReg_i32_lane imm:$lane)))>; |
| 1960 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1961 | // VMLAL : Vector Multiply Accumulate Long (Q += D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1962 | defm VMLALs : N3VLInt3_QHS<0,1,0b1000,0, "vmlal", "s", int_arm_neon_vmlals>; |
| 1963 | defm VMLALu : N3VLInt3_QHS<1,1,0b1000,0, "vmlal", "u", int_arm_neon_vmlalu>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1964 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1965 | defm VMLALsls : N3VLInt3SL_HS<0, 0b0010, "vmlal", "s", int_arm_neon_vmlals>; |
| 1966 | defm VMLALslu : N3VLInt3SL_HS<1, 0b0010, "vmlal", "u", int_arm_neon_vmlalu>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1967 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1968 | // VQDMLAL : Vector Saturating Doubling Multiply Accumulate Long (Q += D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1969 | defm VQDMLAL : N3VLInt3_HS<0, 1, 0b1001, 0, "vqdmlal", "s", |
| 1970 | int_arm_neon_vqdmlal>; |
| 1971 | defm VQDMLALsl: N3VLInt3SL_HS<0, 0b0011, "vqdmlal", "s", int_arm_neon_vqdmlal>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1972 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 1973 | // VMLS : Vector Multiply Subtract (integer and floating-point) |
Bob Wilson | 64c6091 | 2009-10-03 04:41:21 +0000 | [diff] [blame] | 1974 | defm VMLS : N3VMulOp_QHS<1, 0, 0b1001, 0, IIC_VMACi16D, IIC_VMACi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1975 | IIC_VMACi16Q, IIC_VMACi32Q, "vmls", "i", sub>; |
| 1976 | def VMLSfd : N3VDMulOp<0, 0, 0b10, 0b1101, 1, IIC_VMACD, "vmls", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1977 | v2f32, fmul, fsub>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1978 | def VMLSfq : N3VQMulOp<0, 0, 0b10, 0b1101, 1, IIC_VMACQ, "vmls", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1979 | v4f32, fmul, fsub>; |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 1980 | defm VMLSsl : N3VMulOpSL_HS<0b0100, IIC_VMACi16D, IIC_VMACi32D, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1981 | IIC_VMACi16Q, IIC_VMACi32Q, "vmls", "i", sub>; |
| 1982 | def VMLSslfd : N3VDMulOpSL<0b10, 0b0101, IIC_VMACD, "vmls", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1983 | v2f32, fmul, fsub>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 1984 | def VMLSslfq : N3VQMulOpSL<0b10, 0b0101, IIC_VMACQ, "vmls", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 1985 | v4f32, v2f32, fmul, fsub>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1986 | |
| 1987 | def : Pat<(v8i16 (sub (v8i16 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1988 | (mul (v8i16 QPR:$src2), |
| 1989 | (v8i16 (NEONvduplane (v8i16 QPR:$src3), imm:$lane))))), |
| 1990 | (v8i16 (VMLSslv8i16 (v8i16 QPR:$src1), (v8i16 QPR:$src2), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1991 | (v4i16 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1992 | (DSubReg_i16_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1993 | (SubReg_i16_lane imm:$lane)))>; |
| 1994 | |
| 1995 | def : Pat<(v4i32 (sub (v4i32 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 1996 | (mul (v4i32 QPR:$src2), |
| 1997 | (v4i32 (NEONvduplane (v4i32 QPR:$src3), imm:$lane))))), |
| 1998 | (v4i32 (VMLSslv4i32 (v4i32 QPR:$src1), (v4i32 QPR:$src2), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 1999 | (v2i32 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2000 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 2001 | (SubReg_i32_lane imm:$lane)))>; |
| 2002 | |
| 2003 | def : Pat<(v4f32 (fsub (v4f32 QPR:$src1), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2004 | (fmul (v4f32 QPR:$src2), |
| 2005 | (v4f32 (NEONvduplane (v4f32 QPR:$src3), imm:$lane))))), |
| 2006 | (v4f32 (VMLSslfq (v4f32 QPR:$src1), (v4f32 QPR:$src2), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 2007 | (v2f32 (EXTRACT_SUBREG QPR:$src3, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2008 | (DSubReg_i32_reg imm:$lane))), |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 2009 | (SubReg_i32_lane imm:$lane)))>; |
| 2010 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2011 | // VMLSL : Vector Multiply Subtract Long (Q -= D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2012 | defm VMLSLs : N3VLInt3_QHS<0,1,0b1010,0, "vmlsl", "s", int_arm_neon_vmlsls>; |
| 2013 | defm VMLSLu : N3VLInt3_QHS<1,1,0b1010,0, "vmlsl", "u", int_arm_neon_vmlslu>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 2014 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2015 | defm VMLSLsls : N3VLInt3SL_HS<0, 0b0110, "vmlsl", "s", int_arm_neon_vmlsls>; |
| 2016 | defm VMLSLslu : N3VLInt3SL_HS<1, 0b0110, "vmlsl", "u", int_arm_neon_vmlslu>; |
Anton Korobeynikov | dd52819 | 2009-09-08 15:22:32 +0000 | [diff] [blame] | 2017 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2018 | // VQDMLSL : Vector Saturating Doubling Multiply Subtract Long (Q -= D * D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2019 | defm VQDMLSL : N3VLInt3_HS<0, 1, 0b1011, 0, "vqdmlsl", "s", |
| 2020 | int_arm_neon_vqdmlsl>; |
| 2021 | defm VQDMLSLsl: N3VLInt3SL_HS<0, 0b111, "vqdmlsl", "s", int_arm_neon_vqdmlsl>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2022 | |
| 2023 | // Vector Subtract Operations. |
| 2024 | |
| 2025 | // VSUB : Vector Subtract (integer and floating-point) |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2026 | defm VSUB : N3V_QHSD<1, 0, 0b1000, 0, IIC_VSUBiD, IIC_VSUBiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2027 | "vsub", "i", sub, 0>; |
| 2028 | def VSUBfd : N3VD<0, 0, 0b10, 0b1101, 0, IIC_VBIND, "vsub", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2029 | v2f32, v2f32, fsub, 0>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2030 | def VSUBfq : N3VQ<0, 0, 0b10, 0b1101, 0, IIC_VBINQ, "vsub", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2031 | v4f32, v4f32, fsub, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2032 | // VSUBL : Vector Subtract Long (Q = D - D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2033 | defm VSUBLs : N3VLInt_QHS<0,1,0b0010,0, IIC_VSHLiD, "vsubl", "s", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2034 | int_arm_neon_vsubls, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2035 | defm VSUBLu : N3VLInt_QHS<1,1,0b0010,0, IIC_VSHLiD, "vsubl", "u", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2036 | int_arm_neon_vsublu, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2037 | // VSUBW : Vector Subtract Wide (Q = Q - D) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2038 | defm VSUBWs : N3VWInt_QHS<0,1,0b0011,0, "vsubw", "s", int_arm_neon_vsubws, 0>; |
| 2039 | defm VSUBWu : N3VWInt_QHS<1,1,0b0011,0, "vsubw", "u", int_arm_neon_vsubwu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2040 | // VHSUB : Vector Halving Subtract |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2041 | defm VHSUBs : N3VInt_QHS<0, 0, 0b0010, 0, IIC_VBINi4D, IIC_VBINi4D, |
| 2042 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2043 | "vhsub", "s", int_arm_neon_vhsubs, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2044 | defm VHSUBu : N3VInt_QHS<1, 0, 0b0010, 0, IIC_VBINi4D, IIC_VBINi4D, |
| 2045 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2046 | "vhsub", "u", int_arm_neon_vhsubu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2047 | // VQSUB : Vector Saturing Subtract |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2048 | defm VQSUBs : N3VInt_QHSD<0, 0, 0b0010, 1, IIC_VBINi4D, IIC_VBINi4D, |
| 2049 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2050 | "vqsub", "s", int_arm_neon_vqsubs, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2051 | defm VQSUBu : N3VInt_QHSD<1, 0, 0b0010, 1, IIC_VBINi4D, IIC_VBINi4D, |
| 2052 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2053 | "vqsub", "u", int_arm_neon_vqsubu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2054 | // VSUBHN : Vector Subtract and Narrow Returning High Half (D = Q - Q) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2055 | defm VSUBHN : N3VNInt_HSD<0,1,0b0110,0, "vsubhn", "i", |
| 2056 | int_arm_neon_vsubhn, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2057 | // VRSUBHN : Vector Rounding Subtract and Narrow Returning High Half (D=Q-Q) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2058 | defm VRSUBHN : N3VNInt_HSD<1,1,0b0110,0, "vrsubhn", "i", |
| 2059 | int_arm_neon_vrsubhn, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2060 | |
| 2061 | // Vector Comparisons. |
| 2062 | |
| 2063 | // VCEQ : Vector Compare Equal |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2064 | defm VCEQ : N3V_QHS<1, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2065 | IIC_VBINi4Q, "vceq", "i", NEONvceq, 1>; |
| 2066 | def VCEQfd : N3VD<0,0,0b00,0b1110,0, IIC_VBIND, "vceq", "f32", v2i32, v2f32, |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2067 | NEONvceq, 1>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2068 | def VCEQfq : N3VQ<0,0,0b00,0b1110,0, IIC_VBINQ, "vceq", "f32", v4i32, v4f32, |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2069 | NEONvceq, 1>; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 2070 | // For disassembly only. |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 2071 | defm VCEQz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00010, 0, "vceq", "i", |
| 2072 | "$dst, $src, #0">; |
Johnny Chen | fc9ef99 | 2010-02-23 00:33:12 +0000 | [diff] [blame] | 2073 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2074 | // VCGE : Vector Compare Greater Than or Equal |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2075 | defm VCGEs : N3V_QHS<0, 0, 0b0011, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2076 | IIC_VBINi4Q, "vcge", "s", NEONvcge, 0>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2077 | defm VCGEu : N3V_QHS<1, 0, 0b0011, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2078 | IIC_VBINi4Q, "vcge", "u", NEONvcgeu, 0>; |
| 2079 | def VCGEfd : N3VD<1,0,0b00,0b1110,0, IIC_VBIND, "vcge", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2080 | v2i32, v2f32, NEONvcge, 0>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2081 | def VCGEfq : N3VQ<1,0,0b00,0b1110,0, IIC_VBINQ, "vcge", "f32", v4i32, v4f32, |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2082 | NEONvcge, 0>; |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 2083 | // For disassembly only. |
| 2084 | defm VCGEz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00001, 0, "vcge", "s", |
| 2085 | "$dst, $src, #0">; |
| 2086 | // For disassembly only. |
| 2087 | defm VCLEz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00011, 0, "vcle", "s", |
| 2088 | "$dst, $src, #0">; |
| 2089 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2090 | // VCGT : Vector Compare Greater Than |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2091 | defm VCGTs : N3V_QHS<0, 0, 0b0011, 0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2092 | IIC_VBINi4Q, "vcgt", "s", NEONvcgt, 0>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2093 | defm VCGTu : N3V_QHS<1, 0, 0b0011, 0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2094 | IIC_VBINi4Q, "vcgt", "u", NEONvcgtu, 0>; |
| 2095 | def VCGTfd : N3VD<1,0,0b10,0b1110,0, IIC_VBIND, "vcgt", "f32", v2i32, v2f32, |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2096 | NEONvcgt, 0>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2097 | def VCGTfq : N3VQ<1,0,0b10,0b1110,0, IIC_VBINQ, "vcgt", "f32", v4i32, v4f32, |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2098 | NEONvcgt, 0>; |
Johnny Chen | c2b70b5 | 2010-02-23 01:42:58 +0000 | [diff] [blame] | 2099 | // For disassembly only. |
| 2100 | defm VCGTz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00000, 0, "vcgt", "s", |
| 2101 | "$dst, $src, #0">; |
| 2102 | // For disassembly only. |
| 2103 | defm VCLTz : N2V_QHS_cmp<0b11, 0b11, 0b01, 0b00100, 0, "vclt", "s", |
| 2104 | "$dst, $src, #0">; |
| 2105 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2106 | // VACGE : Vector Absolute Compare Greater Than or Equal (aka VCAGE) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2107 | def VACGEd : N3VDInt<1, 0, 0b00, 0b1110, 1, IIC_VBIND, "vacge", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2108 | v2i32, v2f32, int_arm_neon_vacged, 0>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2109 | def VACGEq : N3VQInt<1, 0, 0b00, 0b1110, 1, IIC_VBINQ, "vacge", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2110 | v4i32, v4f32, int_arm_neon_vacgeq, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2111 | // VACGT : Vector Absolute Compare Greater Than (aka VCAGT) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2112 | def VACGTd : N3VDInt<1, 0, 0b10, 0b1110, 1, IIC_VBIND, "vacgt", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2113 | v2i32, v2f32, int_arm_neon_vacgtd, 0>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2114 | def VACGTq : N3VQInt<1, 0, 0b10, 0b1110, 1, IIC_VBINQ, "vacgt", "f32", |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2115 | v4i32, v4f32, int_arm_neon_vacgtq, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2116 | // VTST : Vector Test Bits |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2117 | defm VTST : N3V_QHS<0, 0, 0b1000, 1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Bob Wilson | a21a9cc | 2010-01-17 06:35:17 +0000 | [diff] [blame] | 2118 | IIC_VBINi4Q, "vtst", "", NEONvtst, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2119 | |
| 2120 | // Vector Bitwise Operations. |
| 2121 | |
| 2122 | // VAND : Vector Bitwise AND |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2123 | def VANDd : N3VDX<0, 0, 0b00, 0b0001, 1, IIC_VBINiD, "vand", |
| 2124 | v2i32, v2i32, and, 1>; |
| 2125 | def VANDq : N3VQX<0, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "vand", |
| 2126 | v4i32, v4i32, and, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2127 | |
| 2128 | // VEOR : Vector Bitwise Exclusive OR |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2129 | def VEORd : N3VDX<1, 0, 0b00, 0b0001, 1, IIC_VBINiD, "veor", |
| 2130 | v2i32, v2i32, xor, 1>; |
| 2131 | def VEORq : N3VQX<1, 0, 0b00, 0b0001, 1, IIC_VBINiQ, "veor", |
| 2132 | v4i32, v4i32, xor, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2133 | |
| 2134 | // VORR : Vector Bitwise OR |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2135 | def VORRd : N3VDX<0, 0, 0b10, 0b0001, 1, IIC_VBINiD, "vorr", |
| 2136 | v2i32, v2i32, or, 1>; |
| 2137 | def VORRq : N3VQX<0, 0, 0b10, 0b0001, 1, IIC_VBINiQ, "vorr", |
| 2138 | v4i32, v4i32, or, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2139 | |
| 2140 | // VBIC : Vector Bitwise Bit Clear (AND NOT) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2141 | def VBICd : N3VX<0, 0, 0b01, 0b0001, 0, 1, (outs DPR:$dst), |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2142 | (ins DPR:$src1, DPR:$src2), IIC_VBINiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2143 | "vbic", "$dst, $src1, $src2", "", |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2144 | [(set DPR:$dst, (v2i32 (and DPR:$src1, |
| 2145 | (vnot_conv DPR:$src2))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2146 | def VBICq : N3VX<0, 0, 0b01, 0b0001, 1, 1, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2147 | (ins QPR:$src1, QPR:$src2), IIC_VBINiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2148 | "vbic", "$dst, $src1, $src2", "", |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2149 | [(set QPR:$dst, (v4i32 (and QPR:$src1, |
| 2150 | (vnot_conv QPR:$src2))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2151 | |
| 2152 | // VORN : Vector Bitwise OR NOT |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2153 | def VORNd : N3VX<0, 0, 0b11, 0b0001, 0, 1, (outs DPR:$dst), |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2154 | (ins DPR:$src1, DPR:$src2), IIC_VBINiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2155 | "vorn", "$dst, $src1, $src2", "", |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2156 | [(set DPR:$dst, (v2i32 (or DPR:$src1, |
| 2157 | (vnot_conv DPR:$src2))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2158 | def VORNq : N3VX<0, 0, 0b11, 0b0001, 1, 1, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2159 | (ins QPR:$src1, QPR:$src2), IIC_VBINiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2160 | "vorn", "$dst, $src1, $src2", "", |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2161 | [(set QPR:$dst, (v4i32 (or QPR:$src1, |
| 2162 | (vnot_conv QPR:$src2))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2163 | |
| 2164 | // VMVN : Vector Bitwise NOT |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2165 | def VMVNd : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 0, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2166 | (outs DPR:$dst), (ins DPR:$src), IIC_VSHLiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2167 | "vmvn", "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2168 | [(set DPR:$dst, (v2i32 (vnot DPR:$src)))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2169 | def VMVNq : N2VX<0b11, 0b11, 0b00, 0b00, 0b01011, 1, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2170 | (outs QPR:$dst), (ins QPR:$src), IIC_VSHLiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2171 | "vmvn", "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2172 | [(set QPR:$dst, (v4i32 (vnot QPR:$src)))]>; |
| 2173 | def : Pat<(v2i32 (vnot_conv DPR:$src)), (VMVNd DPR:$src)>; |
| 2174 | def : Pat<(v4i32 (vnot_conv QPR:$src)), (VMVNq QPR:$src)>; |
| 2175 | |
| 2176 | // VBSL : Vector Bitwise Select |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2177 | def VBSLd : N3VX<1, 0, 0b01, 0b0001, 0, 1, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2178 | (ins DPR:$src1, DPR:$src2, DPR:$src3), IIC_VCNTiD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2179 | "vbsl", "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2180 | [(set DPR:$dst, |
| 2181 | (v2i32 (or (and DPR:$src2, DPR:$src1), |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2182 | (and DPR:$src3, (vnot_conv DPR:$src1)))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2183 | def VBSLq : N3VX<1, 0, 0b01, 0b0001, 1, 1, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2184 | (ins QPR:$src1, QPR:$src2, QPR:$src3), IIC_VCNTiQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2185 | "vbsl", "$dst, $src2, $src3", "$src1 = $dst", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2186 | [(set QPR:$dst, |
| 2187 | (v4i32 (or (and QPR:$src2, QPR:$src1), |
Anton Korobeynikov | 14636a5 | 2009-09-08 22:51:43 +0000 | [diff] [blame] | 2188 | (and QPR:$src3, (vnot_conv QPR:$src1)))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2189 | |
| 2190 | // VBIF : Vector Bitwise Insert if False |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2191 | // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst", |
Johnny Chen | 7c313be | 2010-02-09 23:05:23 +0000 | [diff] [blame] | 2192 | def VBIFd : N3VX<1, 0, 0b11, 0b0001, 0, 1, |
| 2193 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2, DPR:$src3), |
| 2194 | IIC_VBINiD, "vbif", "$dst, $src2, $src3", "$src1 = $dst", |
| 2195 | [/* For disassembly only; pattern left blank */]>; |
| 2196 | def VBIFq : N3VX<1, 0, 0b11, 0b0001, 1, 1, |
| 2197 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2, QPR:$src3), |
| 2198 | IIC_VBINiQ, "vbif", "$dst, $src2, $src3", "$src1 = $dst", |
| 2199 | [/* For disassembly only; pattern left blank */]>; |
| 2200 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2201 | // VBIT : Vector Bitwise Insert if True |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2202 | // like VBSL but with: "vbit $dst, $src2, $src1", "$src3 = $dst", |
Johnny Chen | 7c313be | 2010-02-09 23:05:23 +0000 | [diff] [blame] | 2203 | def VBITd : N3VX<1, 0, 0b10, 0b0001, 0, 1, |
| 2204 | (outs DPR:$dst), (ins DPR:$src1, DPR:$src2, DPR:$src3), |
| 2205 | IIC_VBINiD, "vbit", "$dst, $src2, $src3", "$src1 = $dst", |
| 2206 | [/* For disassembly only; pattern left blank */]>; |
| 2207 | def VBITq : N3VX<1, 0, 0b10, 0b0001, 1, 1, |
| 2208 | (outs QPR:$dst), (ins QPR:$src1, QPR:$src2, QPR:$src3), |
| 2209 | IIC_VBINiQ, "vbit", "$dst, $src2, $src3", "$src1 = $dst", |
| 2210 | [/* For disassembly only; pattern left blank */]>; |
| 2211 | |
| 2212 | // VBIT/VBIF are not yet implemented. The TwoAddress pass will not go looking |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2213 | // for equivalent operations with different register constraints; it just |
| 2214 | // inserts copies. |
| 2215 | |
| 2216 | // Vector Absolute Differences. |
| 2217 | |
| 2218 | // VABD : Vector Absolute Difference |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2219 | defm VABDs : N3VInt_QHS<0, 0, 0b0111, 0, IIC_VBINi4D, IIC_VBINi4D, |
| 2220 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2221 | "vabd", "s", int_arm_neon_vabds, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2222 | defm VABDu : N3VInt_QHS<1, 0, 0b0111, 0, IIC_VBINi4D, IIC_VBINi4D, |
| 2223 | IIC_VBINi4Q, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2224 | "vabd", "u", int_arm_neon_vabdu, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2225 | def VABDfd : N3VDInt<1, 0, 0b10, 0b1101, 0, IIC_VBIND, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2226 | "vabd", "f32", v2f32, v2f32, int_arm_neon_vabds, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2227 | def VABDfq : N3VQInt<1, 0, 0b10, 0b1101, 0, IIC_VBINQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2228 | "vabd", "f32", v4f32, v4f32, int_arm_neon_vabds, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2229 | |
| 2230 | // VABDL : Vector Absolute Difference Long (Q = | D - D |) |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2231 | defm VABDLs : N3VLInt_QHS<0,1,0b0111,0, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2232 | "vabdl", "s", int_arm_neon_vabdls, 0>; |
Evan Cheng | 67abcec | 2009-11-21 06:21:52 +0000 | [diff] [blame] | 2233 | defm VABDLu : N3VLInt_QHS<1,1,0b0111,0, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2234 | "vabdl", "u", int_arm_neon_vabdlu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2235 | |
| 2236 | // VABA : Vector Absolute Difference and Accumulate |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2237 | defm VABAs : N3VInt3_QHS<0,0,0b0111,1, "vaba", "s", int_arm_neon_vabas>; |
| 2238 | defm VABAu : N3VInt3_QHS<1,0,0b0111,1, "vaba", "u", int_arm_neon_vabau>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2239 | |
| 2240 | // VABAL : Vector Absolute Difference and Accumulate Long (Q += | D - D |) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2241 | defm VABALs : N3VLInt3_QHS<0,1,0b0101,0, "vabal", "s", int_arm_neon_vabals>; |
| 2242 | defm VABALu : N3VLInt3_QHS<1,1,0b0101,0, "vabal", "u", int_arm_neon_vabalu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2243 | |
| 2244 | // Vector Maximum and Minimum. |
| 2245 | |
| 2246 | // VMAX : Vector Maximum |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2247 | defm VMAXs : N3VInt_QHS<0,0,0b0110,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2248 | IIC_VBINi4Q, "vmax", "s", int_arm_neon_vmaxs, 1>; |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2249 | defm VMAXu : N3VInt_QHS<1,0,0b0110,0, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2250 | IIC_VBINi4Q, "vmax", "u", int_arm_neon_vmaxu, 1>; |
| 2251 | def VMAXfd : N3VDInt<0, 0, 0b00, 0b1111, 0, IIC_VBIND, "vmax", "f32", |
| 2252 | v2f32, v2f32, int_arm_neon_vmaxs, 1>; |
| 2253 | def VMAXfq : N3VQInt<0, 0, 0b00, 0b1111, 0, IIC_VBINQ, "vmax", "f32", |
| 2254 | v4f32, v4f32, int_arm_neon_vmaxs, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2255 | |
| 2256 | // VMIN : Vector Minimum |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2257 | defm VMINs : N3VInt_QHS<0,0,0b0110,1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2258 | IIC_VBINi4Q, "vmin", "s", int_arm_neon_vmins, 1>; |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2259 | defm VMINu : N3VInt_QHS<1,0,0b0110,1, IIC_VBINi4D, IIC_VBINi4D, IIC_VBINi4Q, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2260 | IIC_VBINi4Q, "vmin", "u", int_arm_neon_vminu, 1>; |
| 2261 | def VMINfd : N3VDInt<0, 0, 0b10, 0b1111, 0, IIC_VBIND, "vmin", "f32", |
| 2262 | v2f32, v2f32, int_arm_neon_vmins, 1>; |
| 2263 | def VMINfq : N3VQInt<0, 0, 0b10, 0b1111, 0, IIC_VBINQ, "vmin", "f32", |
| 2264 | v4f32, v4f32, int_arm_neon_vmins, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2265 | |
| 2266 | // Vector Pairwise Operations. |
| 2267 | |
| 2268 | // VPADD : Vector Pairwise Add |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2269 | def VPADDi8 : N3VDInt<0, 0, 0b00, 0b1011, 1, IIC_VBINiD, "vpadd", "i8", |
| 2270 | v8i8, v8i8, int_arm_neon_vpadd, 0>; |
| 2271 | def VPADDi16 : N3VDInt<0, 0, 0b01, 0b1011, 1, IIC_VBINiD, "vpadd", "i16", |
| 2272 | v4i16, v4i16, int_arm_neon_vpadd, 0>; |
| 2273 | def VPADDi32 : N3VDInt<0, 0, 0b10, 0b1011, 1, IIC_VBINiD, "vpadd", "i32", |
| 2274 | v2i32, v2i32, int_arm_neon_vpadd, 0>; |
| 2275 | def VPADDf : N3VDInt<1, 0, 0b00, 0b1101, 0, IIC_VBIND, "vpadd", "f32", |
| 2276 | v2f32, v2f32, int_arm_neon_vpadd, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2277 | |
| 2278 | // VPADDL : Vector Pairwise Add Long |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2279 | defm VPADDLs : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00100, 0, "vpaddl", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2280 | int_arm_neon_vpaddls>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2281 | defm VPADDLu : N2VPLInt_QHS<0b11, 0b11, 0b00, 0b00101, 0, "vpaddl", "u", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2282 | int_arm_neon_vpaddlu>; |
| 2283 | |
| 2284 | // VPADAL : Vector Pairwise Add and Accumulate Long |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2285 | defm VPADALs : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01100, 0, "vpadal", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2286 | int_arm_neon_vpadals>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2287 | defm VPADALu : N2VPLInt2_QHS<0b11, 0b11, 0b00, 0b01101, 0, "vpadal", "u", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2288 | int_arm_neon_vpadalu>; |
| 2289 | |
| 2290 | // VPMAX : Vector Pairwise Maximum |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2291 | def VPMAXs8 : N3VDInt<0, 0, 0b00, 0b1010, 0, IIC_VBINi4D, "vpmax", "s8", |
| 2292 | v8i8, v8i8, int_arm_neon_vpmaxs, 0>; |
| 2293 | def VPMAXs16 : N3VDInt<0, 0, 0b01, 0b1010, 0, IIC_VBINi4D, "vpmax", "s16", |
| 2294 | v4i16, v4i16, int_arm_neon_vpmaxs, 0>; |
| 2295 | def VPMAXs32 : N3VDInt<0, 0, 0b10, 0b1010, 0, IIC_VBINi4D, "vpmax", "s32", |
| 2296 | v2i32, v2i32, int_arm_neon_vpmaxs, 0>; |
| 2297 | def VPMAXu8 : N3VDInt<1, 0, 0b00, 0b1010, 0, IIC_VBINi4D, "vpmax", "u8", |
| 2298 | v8i8, v8i8, int_arm_neon_vpmaxu, 0>; |
| 2299 | def VPMAXu16 : N3VDInt<1, 0, 0b01, 0b1010, 0, IIC_VBINi4D, "vpmax", "u16", |
| 2300 | v4i16, v4i16, int_arm_neon_vpmaxu, 0>; |
| 2301 | def VPMAXu32 : N3VDInt<1, 0, 0b10, 0b1010, 0, IIC_VBINi4D, "vpmax", "u32", |
| 2302 | v2i32, v2i32, int_arm_neon_vpmaxu, 0>; |
| 2303 | def VPMAXf : N3VDInt<1, 0, 0b00, 0b1111, 0, IIC_VBINi4D, "vpmax", "f32", |
| 2304 | v2f32, v2f32, int_arm_neon_vpmaxs, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2305 | |
| 2306 | // VPMIN : Vector Pairwise Minimum |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2307 | def VPMINs8 : N3VDInt<0, 0, 0b00, 0b1010, 1, IIC_VBINi4D, "vpmin", "s8", |
| 2308 | v8i8, v8i8, int_arm_neon_vpmins, 0>; |
| 2309 | def VPMINs16 : N3VDInt<0, 0, 0b01, 0b1010, 1, IIC_VBINi4D, "vpmin", "s16", |
| 2310 | v4i16, v4i16, int_arm_neon_vpmins, 0>; |
| 2311 | def VPMINs32 : N3VDInt<0, 0, 0b10, 0b1010, 1, IIC_VBINi4D, "vpmin", "s32", |
| 2312 | v2i32, v2i32, int_arm_neon_vpmins, 0>; |
| 2313 | def VPMINu8 : N3VDInt<1, 0, 0b00, 0b1010, 1, IIC_VBINi4D, "vpmin", "u8", |
| 2314 | v8i8, v8i8, int_arm_neon_vpminu, 0>; |
| 2315 | def VPMINu16 : N3VDInt<1, 0, 0b01, 0b1010, 1, IIC_VBINi4D, "vpmin", "u16", |
| 2316 | v4i16, v4i16, int_arm_neon_vpminu, 0>; |
| 2317 | def VPMINu32 : N3VDInt<1, 0, 0b10, 0b1010, 1, IIC_VBINi4D, "vpmin", "u32", |
| 2318 | v2i32, v2i32, int_arm_neon_vpminu, 0>; |
| 2319 | def VPMINf : N3VDInt<1, 0, 0b10, 0b1111, 0, IIC_VBINi4D, "vpmin", "f32", |
| 2320 | v2f32, v2f32, int_arm_neon_vpmins, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2321 | |
| 2322 | // Vector Reciprocal and Reciprocal Square Root Estimate and Step. |
| 2323 | |
| 2324 | // VRECPE : Vector Reciprocal Estimate |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2325 | def VRECPEd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2326 | IIC_VUNAD, "vrecpe", "u32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2327 | v2i32, v2i32, int_arm_neon_vrecpe>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2328 | def VRECPEq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01000, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2329 | IIC_VUNAQ, "vrecpe", "u32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2330 | v4i32, v4i32, int_arm_neon_vrecpe>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2331 | def VRECPEfd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01010, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2332 | IIC_VUNAD, "vrecpe", "f32", |
Bob Wilson | 8f10b3f | 2009-08-11 05:39:44 +0000 | [diff] [blame] | 2333 | v2f32, v2f32, int_arm_neon_vrecpe>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2334 | def VRECPEfq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01010, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2335 | IIC_VUNAQ, "vrecpe", "f32", |
Bob Wilson | 8f10b3f | 2009-08-11 05:39:44 +0000 | [diff] [blame] | 2336 | v4f32, v4f32, int_arm_neon_vrecpe>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2337 | |
| 2338 | // VRECPS : Vector Reciprocal Step |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2339 | def VRECPSfd : N3VDInt<0, 0, 0b00, 0b1111, 1, |
| 2340 | IIC_VRECSD, "vrecps", "f32", |
| 2341 | v2f32, v2f32, int_arm_neon_vrecps, 1>; |
| 2342 | def VRECPSfq : N3VQInt<0, 0, 0b00, 0b1111, 1, |
| 2343 | IIC_VRECSQ, "vrecps", "f32", |
| 2344 | v4f32, v4f32, int_arm_neon_vrecps, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2345 | |
| 2346 | // VRSQRTE : Vector Reciprocal Square Root Estimate |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2347 | def VRSQRTEd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01001, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2348 | IIC_VUNAD, "vrsqrte", "u32", |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2349 | v2i32, v2i32, int_arm_neon_vrsqrte>; |
| 2350 | def VRSQRTEq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01001, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2351 | IIC_VUNAQ, "vrsqrte", "u32", |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2352 | v4i32, v4i32, int_arm_neon_vrsqrte>; |
| 2353 | def VRSQRTEfd : N2VDInt<0b11, 0b11, 0b10, 0b11, 0b01011, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2354 | IIC_VUNAD, "vrsqrte", "f32", |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2355 | v2f32, v2f32, int_arm_neon_vrsqrte>; |
| 2356 | def VRSQRTEfq : N2VQInt<0b11, 0b11, 0b10, 0b11, 0b01011, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2357 | IIC_VUNAQ, "vrsqrte", "f32", |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2358 | v4f32, v4f32, int_arm_neon_vrsqrte>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2359 | |
| 2360 | // VRSQRTS : Vector Reciprocal Square Root Step |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2361 | def VRSQRTSfd : N3VDInt<0, 0, 0b10, 0b1111, 1, |
| 2362 | IIC_VRECSD, "vrsqrts", "f32", |
| 2363 | v2f32, v2f32, int_arm_neon_vrsqrts, 1>; |
| 2364 | def VRSQRTSfq : N3VQInt<0, 0, 0b10, 0b1111, 1, |
| 2365 | IIC_VRECSQ, "vrsqrts", "f32", |
| 2366 | v4f32, v4f32, int_arm_neon_vrsqrts, 1>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2367 | |
| 2368 | // Vector Shifts. |
| 2369 | |
| 2370 | // VSHL : Vector Shift |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2371 | defm VSHLs : N3VInt_QHSD<0, 0, 0b0100, 0, IIC_VSHLiD, IIC_VSHLiD, IIC_VSHLiQ, |
| 2372 | IIC_VSHLiQ, "vshl", "s", int_arm_neon_vshifts, 0>; |
| 2373 | defm VSHLu : N3VInt_QHSD<1, 0, 0b0100, 0, IIC_VSHLiD, IIC_VSHLiD, IIC_VSHLiQ, |
| 2374 | IIC_VSHLiQ, "vshl", "u", int_arm_neon_vshiftu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2375 | // VSHL : Vector Shift Left (Immediate) |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2376 | defm VSHLi : N2VSh_QHSD<0, 1, 0b0101, 1, IIC_VSHLiD, "vshl", "i", NEONvshl>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2377 | // VSHR : Vector Shift Right (Immediate) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2378 | defm VSHRs : N2VSh_QHSD<0, 1, 0b0000, 1, IIC_VSHLiD, "vshr", "s", NEONvshrs>; |
| 2379 | defm VSHRu : N2VSh_QHSD<1, 1, 0b0000, 1, IIC_VSHLiD, "vshr", "u", NEONvshru>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2380 | |
| 2381 | // VSHLL : Vector Shift Left Long |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2382 | defm VSHLLs : N2VLSh_QHS<0, 1, 0b1010, 0, 0, 1, "vshll", "s", NEONvshlls>; |
| 2383 | defm VSHLLu : N2VLSh_QHS<1, 1, 0b1010, 0, 0, 1, "vshll", "u", NEONvshllu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2384 | |
| 2385 | // VSHLL : Vector Shift Left Long (with maximum shift count) |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2386 | class N2VLShMax<bit op24, bit op23, bits<6> op21_16, bits<4> op11_8, bit op7, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2387 | bit op6, bit op4, string OpcodeStr, string Dt, ValueType ResTy, |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2388 | ValueType OpTy, SDNode OpNode> |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2389 | : N2VLSh<op24, op23, op11_8, op7, op6, op4, OpcodeStr, Dt, |
| 2390 | ResTy, OpTy, OpNode> { |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2391 | let Inst{21-16} = op21_16; |
| 2392 | } |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2393 | def VSHLLi8 : N2VLShMax<1, 1, 0b110010, 0b0011, 0, 0, 0, "vshll", "i8", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2394 | v8i16, v8i8, NEONvshlli>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2395 | def VSHLLi16 : N2VLShMax<1, 1, 0b110110, 0b0011, 0, 0, 0, "vshll", "i16", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2396 | v4i32, v4i16, NEONvshlli>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2397 | def VSHLLi32 : N2VLShMax<1, 1, 0b111010, 0b0011, 0, 0, 0, "vshll", "i32", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2398 | v2i64, v2i32, NEONvshlli>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2399 | |
| 2400 | // VSHRN : Vector Shift Right and Narrow |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2401 | defm VSHRN : N2VNSh_HSD<0,1,0b1000,0,0,1, IIC_VSHLiD, "vshrn", "i", |
| 2402 | NEONvshrn>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2403 | |
| 2404 | // VRSHL : Vector Rounding Shift |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2405 | defm VRSHLs : N3VInt_QHSD<0,0,0b0101,0, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2406 | IIC_VSHLi4Q, "vrshl", "s", int_arm_neon_vrshifts,0>; |
| 2407 | defm VRSHLu : N3VInt_QHSD<1,0,0b0101,0, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2408 | IIC_VSHLi4Q, "vrshl", "u", int_arm_neon_vrshiftu,0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2409 | // VRSHR : Vector Rounding Shift Right |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2410 | defm VRSHRs : N2VSh_QHSD<0,1,0b0010,1, IIC_VSHLi4D, "vrshr", "s", NEONvrshrs>; |
| 2411 | defm VRSHRu : N2VSh_QHSD<1,1,0b0010,1, IIC_VSHLi4D, "vrshr", "u", NEONvrshru>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2412 | |
| 2413 | // VRSHRN : Vector Rounding Shift Right and Narrow |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2414 | defm VRSHRN : N2VNSh_HSD<0, 1, 0b1000, 0, 1, 1, IIC_VSHLi4D, "vrshrn", "i", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2415 | NEONvrshrn>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2416 | |
| 2417 | // VQSHL : Vector Saturating Shift |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2418 | defm VQSHLs : N3VInt_QHSD<0,0,0b0100,1, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2419 | IIC_VSHLi4Q, "vqshl", "s", int_arm_neon_vqshifts,0>; |
| 2420 | defm VQSHLu : N3VInt_QHSD<1,0,0b0100,1, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2421 | IIC_VSHLi4Q, "vqshl", "u", int_arm_neon_vqshiftu,0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2422 | // VQSHL : Vector Saturating Shift Left (Immediate) |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2423 | defm VQSHLsi : N2VSh_QHSD<0,1,0b0111,1, IIC_VSHLi4D, "vqshl", "s", NEONvqshls>; |
| 2424 | defm VQSHLui : N2VSh_QHSD<1,1,0b0111,1, IIC_VSHLi4D, "vqshl", "u", NEONvqshlu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2425 | // VQSHLU : Vector Saturating Shift Left (Immediate, Unsigned) |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2426 | defm VQSHLsu : N2VSh_QHSD<1,1,0b0110,1, IIC_VSHLi4D, "vqshlu","s",NEONvqshlsu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2427 | |
| 2428 | // VQSHRN : Vector Saturating Shift Right and Narrow |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2429 | defm VQSHRNs : N2VNSh_HSD<0, 1, 0b1001, 0, 0, 1, IIC_VSHLi4D, "vqshrn", "s", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2430 | NEONvqshrns>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2431 | defm VQSHRNu : N2VNSh_HSD<1, 1, 0b1001, 0, 0, 1, IIC_VSHLi4D, "vqshrn", "u", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2432 | NEONvqshrnu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2433 | |
| 2434 | // VQSHRUN : Vector Saturating Shift Right and Narrow (Unsigned) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2435 | defm VQSHRUN : N2VNSh_HSD<1, 1, 0b1000, 0, 0, 1, IIC_VSHLi4D, "vqshrun", "s", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2436 | NEONvqshrnsu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2437 | |
| 2438 | // VQRSHL : Vector Saturating Rounding Shift |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2439 | defm VQRSHLs : N3VInt_QHSD<0,0,0b0101,1, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2440 | IIC_VSHLi4Q, "vqrshl", "s", |
| 2441 | int_arm_neon_vqrshifts, 0>; |
| 2442 | defm VQRSHLu : N3VInt_QHSD<1,0,0b0101,1, IIC_VSHLi4D, IIC_VSHLi4D, IIC_VSHLi4Q, |
| 2443 | IIC_VSHLi4Q, "vqrshl", "u", |
| 2444 | int_arm_neon_vqrshiftu, 0>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2445 | |
| 2446 | // VQRSHRN : Vector Saturating Rounding Shift Right and Narrow |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2447 | defm VQRSHRNs : N2VNSh_HSD<0, 1, 0b1001, 0, 1, 1, IIC_VSHLi4D, "vqrshrn", "s", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2448 | NEONvqrshrns>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2449 | defm VQRSHRNu : N2VNSh_HSD<1, 1, 0b1001, 0, 1, 1, IIC_VSHLi4D, "vqrshrn", "u", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2450 | NEONvqrshrnu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2451 | |
| 2452 | // VQRSHRUN : Vector Saturating Rounding Shift Right and Narrow (Unsigned) |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2453 | defm VQRSHRUN : N2VNSh_HSD<1, 1, 0b1000, 0, 1, 1, IIC_VSHLi4D, "vqrshrun", "s", |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2454 | NEONvqrshrnsu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2455 | |
| 2456 | // VSRA : Vector Shift Right and Accumulate |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2457 | defm VSRAs : N2VShAdd_QHSD<0, 1, 0b0001, 1, "vsra", "s", NEONvshrs>; |
| 2458 | defm VSRAu : N2VShAdd_QHSD<1, 1, 0b0001, 1, "vsra", "u", NEONvshru>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2459 | // VRSRA : Vector Rounding Shift Right and Accumulate |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2460 | defm VRSRAs : N2VShAdd_QHSD<0, 1, 0b0011, 1, "vrsra", "s", NEONvrshrs>; |
| 2461 | defm VRSRAu : N2VShAdd_QHSD<1, 1, 0b0011, 1, "vrsra", "u", NEONvrshru>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2462 | |
| 2463 | // VSLI : Vector Shift Left and Insert |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2464 | defm VSLI : N2VShIns_QHSD<1, 1, 0b0101, 1, "vsli", NEONvsli>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2465 | // VSRI : Vector Shift Right and Insert |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2466 | defm VSRI : N2VShIns_QHSD<1, 1, 0b0100, 1, "vsri", NEONvsri>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2467 | |
| 2468 | // Vector Absolute and Saturating Absolute. |
| 2469 | |
| 2470 | // VABS : Vector Absolute Value |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2471 | defm VABS : N2VInt_QHS<0b11, 0b11, 0b01, 0b00110, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2472 | IIC_VUNAiD, IIC_VUNAiQ, "vabs", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2473 | int_arm_neon_vabs>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2474 | def VABSfd : N2VDInt<0b11, 0b11, 0b10, 0b01, 0b01110, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2475 | IIC_VUNAD, "vabs", "f32", |
Bob Wilson | 8f10b3f | 2009-08-11 05:39:44 +0000 | [diff] [blame] | 2476 | v2f32, v2f32, int_arm_neon_vabs>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2477 | def VABSfq : N2VQInt<0b11, 0b11, 0b10, 0b01, 0b01110, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2478 | IIC_VUNAQ, "vabs", "f32", |
Bob Wilson | 8f10b3f | 2009-08-11 05:39:44 +0000 | [diff] [blame] | 2479 | v4f32, v4f32, int_arm_neon_vabs>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2480 | |
| 2481 | // VQABS : Vector Saturating Absolute Value |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2482 | defm VQABS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01110, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2483 | IIC_VQUNAiD, IIC_VQUNAiQ, "vqabs", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2484 | int_arm_neon_vqabs>; |
| 2485 | |
| 2486 | // Vector Negate. |
| 2487 | |
| 2488 | def vneg : PatFrag<(ops node:$in), (sub immAllZerosV, node:$in)>; |
| 2489 | def vneg_conv : PatFrag<(ops node:$in), (sub immAllZerosV_bc, node:$in)>; |
| 2490 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2491 | class VNEGD<bits<2> size, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2492 | : N2V<0b11, 0b11, size, 0b01, 0b00111, 0, 0, (outs DPR:$dst), (ins DPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2493 | IIC_VSHLiD, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2494 | [(set DPR:$dst, (Ty (vneg DPR:$src)))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2495 | class VNEGQ<bits<2> size, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2496 | : N2V<0b11, 0b11, size, 0b01, 0b00111, 1, 0, (outs QPR:$dst), (ins QPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2497 | IIC_VSHLiD, OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2498 | [(set QPR:$dst, (Ty (vneg QPR:$src)))]>; |
| 2499 | |
| 2500 | // VNEG : Vector Negate |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2501 | def VNEGs8d : VNEGD<0b00, "vneg", "s8", v8i8>; |
| 2502 | def VNEGs16d : VNEGD<0b01, "vneg", "s16", v4i16>; |
| 2503 | def VNEGs32d : VNEGD<0b10, "vneg", "s32", v2i32>; |
| 2504 | def VNEGs8q : VNEGQ<0b00, "vneg", "s8", v16i8>; |
| 2505 | def VNEGs16q : VNEGQ<0b01, "vneg", "s16", v8i16>; |
| 2506 | def VNEGs32q : VNEGQ<0b10, "vneg", "s32", v4i32>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2507 | |
| 2508 | // VNEG : Vector Negate (floating-point) |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 2509 | def VNEGfd : N2V<0b11, 0b11, 0b10, 0b01, 0b01111, 0, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2510 | (outs DPR:$dst), (ins DPR:$src), IIC_VUNAD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2511 | "vneg", "f32", "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2512 | [(set DPR:$dst, (v2f32 (fneg DPR:$src)))]>; |
| 2513 | def VNEGf32q : N2V<0b11, 0b11, 0b10, 0b01, 0b01111, 1, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2514 | (outs QPR:$dst), (ins QPR:$src), IIC_VUNAQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2515 | "vneg", "f32", "$dst, $src", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2516 | [(set QPR:$dst, (v4f32 (fneg QPR:$src)))]>; |
| 2517 | |
| 2518 | def : Pat<(v8i8 (vneg_conv DPR:$src)), (VNEGs8d DPR:$src)>; |
| 2519 | def : Pat<(v4i16 (vneg_conv DPR:$src)), (VNEGs16d DPR:$src)>; |
| 2520 | def : Pat<(v2i32 (vneg_conv DPR:$src)), (VNEGs32d DPR:$src)>; |
| 2521 | def : Pat<(v16i8 (vneg_conv QPR:$src)), (VNEGs8q QPR:$src)>; |
| 2522 | def : Pat<(v8i16 (vneg_conv QPR:$src)), (VNEGs16q QPR:$src)>; |
| 2523 | def : Pat<(v4i32 (vneg_conv QPR:$src)), (VNEGs32q QPR:$src)>; |
| 2524 | |
| 2525 | // VQNEG : Vector Saturating Negate |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2526 | defm VQNEG : N2VInt_QHS<0b11, 0b11, 0b00, 0b01111, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2527 | IIC_VQUNAiD, IIC_VQUNAiQ, "vqneg", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2528 | int_arm_neon_vqneg>; |
| 2529 | |
| 2530 | // Vector Bit Counting Operations. |
| 2531 | |
| 2532 | // VCLS : Vector Count Leading Sign Bits |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2533 | defm VCLS : N2VInt_QHS<0b11, 0b11, 0b00, 0b01000, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2534 | IIC_VCNTiD, IIC_VCNTiQ, "vcls", "s", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2535 | int_arm_neon_vcls>; |
| 2536 | // VCLZ : Vector Count Leading Zeros |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2537 | defm VCLZ : N2VInt_QHS<0b11, 0b11, 0b00, 0b01001, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2538 | IIC_VCNTiD, IIC_VCNTiQ, "vclz", "i", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2539 | int_arm_neon_vclz>; |
| 2540 | // VCNT : Vector Count One Bits |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2541 | def VCNTd : N2VDInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2542 | IIC_VCNTiD, "vcnt", "8", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2543 | v8i8, v8i8, int_arm_neon_vcnt>; |
David Goodwin | 78caa12 | 2009-09-23 21:38:08 +0000 | [diff] [blame] | 2544 | def VCNTq : N2VQInt<0b11, 0b11, 0b00, 0b00, 0b01010, 0, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2545 | IIC_VCNTiQ, "vcnt", "8", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2546 | v16i8, v16i8, int_arm_neon_vcnt>; |
| 2547 | |
Johnny Chen | ed5852c | 2010-02-24 20:06:07 +0000 | [diff] [blame] | 2548 | // Vector Swap -- for disassembly only. |
| 2549 | def VSWPd : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 0, 0, |
| 2550 | (outs DPR:$dst), (ins DPR:$src), NoItinerary, |
| 2551 | "vswp", "$dst, $src", "", []>; |
| 2552 | def VSWPq : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 1, 0, |
| 2553 | (outs QPR:$dst), (ins QPR:$src), NoItinerary, |
| 2554 | "vswp", "$dst, $src", "", []>; |
| 2555 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2556 | // Vector Move Operations. |
| 2557 | |
| 2558 | // VMOV : Vector Move (Register) |
| 2559 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2560 | def VMOVDneon: N3VX<0, 0, 0b10, 0b0001, 0, 1, (outs DPR:$dst), (ins DPR:$src), |
| 2561 | IIC_VMOVD, "vmov", "$dst, $src", "", []>; |
| 2562 | def VMOVQ : N3VX<0, 0, 0b10, 0b0001, 1, 1, (outs QPR:$dst), (ins QPR:$src), |
| 2563 | IIC_VMOVD, "vmov", "$dst, $src", "", []>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2564 | |
| 2565 | // VMOV : Vector Move (Immediate) |
| 2566 | |
| 2567 | // VMOV_get_imm8 xform function: convert build_vector to VMOV.i8 imm. |
| 2568 | def VMOV_get_imm8 : SDNodeXForm<build_vector, [{ |
| 2569 | return ARM::getVMOVImm(N, 1, *CurDAG); |
| 2570 | }]>; |
| 2571 | def vmovImm8 : PatLeaf<(build_vector), [{ |
| 2572 | return ARM::getVMOVImm(N, 1, *CurDAG).getNode() != 0; |
| 2573 | }], VMOV_get_imm8>; |
| 2574 | |
| 2575 | // VMOV_get_imm16 xform function: convert build_vector to VMOV.i16 imm. |
| 2576 | def VMOV_get_imm16 : SDNodeXForm<build_vector, [{ |
| 2577 | return ARM::getVMOVImm(N, 2, *CurDAG); |
| 2578 | }]>; |
| 2579 | def vmovImm16 : PatLeaf<(build_vector), [{ |
| 2580 | return ARM::getVMOVImm(N, 2, *CurDAG).getNode() != 0; |
| 2581 | }], VMOV_get_imm16>; |
| 2582 | |
| 2583 | // VMOV_get_imm32 xform function: convert build_vector to VMOV.i32 imm. |
| 2584 | def VMOV_get_imm32 : SDNodeXForm<build_vector, [{ |
| 2585 | return ARM::getVMOVImm(N, 4, *CurDAG); |
| 2586 | }]>; |
| 2587 | def vmovImm32 : PatLeaf<(build_vector), [{ |
| 2588 | return ARM::getVMOVImm(N, 4, *CurDAG).getNode() != 0; |
| 2589 | }], VMOV_get_imm32>; |
| 2590 | |
| 2591 | // VMOV_get_imm64 xform function: convert build_vector to VMOV.i64 imm. |
| 2592 | def VMOV_get_imm64 : SDNodeXForm<build_vector, [{ |
| 2593 | return ARM::getVMOVImm(N, 8, *CurDAG); |
| 2594 | }]>; |
| 2595 | def vmovImm64 : PatLeaf<(build_vector), [{ |
| 2596 | return ARM::getVMOVImm(N, 8, *CurDAG).getNode() != 0; |
| 2597 | }], VMOV_get_imm64>; |
| 2598 | |
| 2599 | // Note: Some of the cmode bits in the following VMOV instructions need to |
| 2600 | // be encoded based on the immed values. |
| 2601 | |
| 2602 | def VMOVv8i8 : N1ModImm<1, 0b000, 0b1110, 0, 0, 0, 1, (outs DPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2603 | (ins h8imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2604 | "vmov", "i8", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2605 | [(set DPR:$dst, (v8i8 vmovImm8:$SIMM))]>; |
| 2606 | def VMOVv16i8 : N1ModImm<1, 0b000, 0b1110, 0, 1, 0, 1, (outs QPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2607 | (ins h8imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2608 | "vmov", "i8", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2609 | [(set QPR:$dst, (v16i8 vmovImm8:$SIMM))]>; |
| 2610 | |
Johnny Chen | cf4fad2 | 2009-12-01 00:02:02 +0000 | [diff] [blame] | 2611 | def VMOVv4i16 : N1ModImm<1, 0b000, {1,0,?,?}, 0, 0, {?}, 1, (outs DPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2612 | (ins h16imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2613 | "vmov", "i16", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2614 | [(set DPR:$dst, (v4i16 vmovImm16:$SIMM))]>; |
Johnny Chen | cf4fad2 | 2009-12-01 00:02:02 +0000 | [diff] [blame] | 2615 | def VMOVv8i16 : N1ModImm<1, 0b000, {1,0,?,?}, 0, 1, {?}, 1, (outs QPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2616 | (ins h16imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2617 | "vmov", "i16", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2618 | [(set QPR:$dst, (v8i16 vmovImm16:$SIMM))]>; |
| 2619 | |
Johnny Chen | cf4fad2 | 2009-12-01 00:02:02 +0000 | [diff] [blame] | 2620 | def VMOVv2i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 0, {?}, 1, (outs DPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2621 | (ins h32imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2622 | "vmov", "i32", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2623 | [(set DPR:$dst, (v2i32 vmovImm32:$SIMM))]>; |
Johnny Chen | cf4fad2 | 2009-12-01 00:02:02 +0000 | [diff] [blame] | 2624 | def VMOVv4i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 1, {?}, 1, (outs QPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2625 | (ins h32imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2626 | "vmov", "i32", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2627 | [(set QPR:$dst, (v4i32 vmovImm32:$SIMM))]>; |
| 2628 | |
| 2629 | def VMOVv1i64 : N1ModImm<1, 0b000, 0b1110, 0, 0, 1, 1, (outs DPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2630 | (ins h64imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2631 | "vmov", "i64", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2632 | [(set DPR:$dst, (v1i64 vmovImm64:$SIMM))]>; |
| 2633 | def VMOVv2i64 : N1ModImm<1, 0b000, 0b1110, 0, 1, 1, 1, (outs QPR:$dst), |
Bob Wilson | 6a14a00 | 2009-11-06 23:33:28 +0000 | [diff] [blame] | 2634 | (ins h64imm:$SIMM), IIC_VMOVImm, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2635 | "vmov", "i64", "$dst, $SIMM", "", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2636 | [(set QPR:$dst, (v2i64 vmovImm64:$SIMM))]>; |
| 2637 | |
| 2638 | // VMOV : Vector Get Lane (move scalar to ARM core register) |
| 2639 | |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2640 | def VGETLNs8 : NVGetLane<{1,1,1,0,0,1,?,1}, 0b1011, {?,?}, |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2641 | (outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2642 | IIC_VMOVSI, "vmov", "s8", "$dst, $src[$lane]", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2643 | [(set GPR:$dst, (NEONvgetlanes (v8i8 DPR:$src), |
| 2644 | imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2645 | def VGETLNs16 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, {?,1}, |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2646 | (outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2647 | IIC_VMOVSI, "vmov", "s16", "$dst, $src[$lane]", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2648 | [(set GPR:$dst, (NEONvgetlanes (v4i16 DPR:$src), |
| 2649 | imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2650 | def VGETLNu8 : NVGetLane<{1,1,1,0,1,1,?,1}, 0b1011, {?,?}, |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2651 | (outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2652 | IIC_VMOVSI, "vmov", "u8", "$dst, $src[$lane]", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2653 | [(set GPR:$dst, (NEONvgetlaneu (v8i8 DPR:$src), |
| 2654 | imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2655 | def VGETLNu16 : NVGetLane<{1,1,1,0,1,0,?,1}, 0b1011, {?,1}, |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2656 | (outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2657 | IIC_VMOVSI, "vmov", "u16", "$dst, $src[$lane]", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2658 | [(set GPR:$dst, (NEONvgetlaneu (v4i16 DPR:$src), |
| 2659 | imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2660 | def VGETLNi32 : NVGetLane<{1,1,1,0,0,0,?,1}, 0b1011, 0b00, |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2661 | (outs GPR:$dst), (ins DPR:$src, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2662 | IIC_VMOVSI, "vmov", "32", "$dst, $src[$lane]", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2663 | [(set GPR:$dst, (extractelt (v2i32 DPR:$src), |
| 2664 | imm:$lane))]>; |
| 2665 | // def VGETLNf32: see FMRDH and FMRDL in ARMInstrVFP.td |
| 2666 | def : Pat<(NEONvgetlanes (v16i8 QPR:$src), imm:$lane), |
| 2667 | (VGETLNs8 (v8i8 (EXTRACT_SUBREG QPR:$src, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2668 | (DSubReg_i8_reg imm:$lane))), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2669 | (SubReg_i8_lane imm:$lane))>; |
| 2670 | def : Pat<(NEONvgetlanes (v8i16 QPR:$src), imm:$lane), |
| 2671 | (VGETLNs16 (v4i16 (EXTRACT_SUBREG QPR:$src, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2672 | (DSubReg_i16_reg imm:$lane))), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2673 | (SubReg_i16_lane imm:$lane))>; |
| 2674 | def : Pat<(NEONvgetlaneu (v16i8 QPR:$src), imm:$lane), |
| 2675 | (VGETLNu8 (v8i8 (EXTRACT_SUBREG QPR:$src, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2676 | (DSubReg_i8_reg imm:$lane))), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2677 | (SubReg_i8_lane imm:$lane))>; |
| 2678 | def : Pat<(NEONvgetlaneu (v8i16 QPR:$src), imm:$lane), |
| 2679 | (VGETLNu16 (v4i16 (EXTRACT_SUBREG QPR:$src, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2680 | (DSubReg_i16_reg imm:$lane))), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2681 | (SubReg_i16_lane imm:$lane))>; |
| 2682 | def : Pat<(extractelt (v4i32 QPR:$src), imm:$lane), |
| 2683 | (VGETLNi32 (v2i32 (EXTRACT_SUBREG QPR:$src, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2684 | (DSubReg_i32_reg imm:$lane))), |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2685 | (SubReg_i32_lane imm:$lane))>; |
Anton Korobeynikov | 44e0a6c | 2009-08-28 23:41:26 +0000 | [diff] [blame] | 2686 | def : Pat<(extractelt (v2f32 DPR:$src1), imm:$src2), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2687 | (EXTRACT_SUBREG (v2f32 (COPY_TO_REGCLASS (v2f32 DPR:$src1),DPR_VFP2)), |
Anton Korobeynikov | 3600d16 | 2009-09-12 22:21:08 +0000 | [diff] [blame] | 2688 | (SSubReg_f32_reg imm:$src2))>; |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2689 | def : Pat<(extractelt (v4f32 QPR:$src1), imm:$src2), |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2690 | (EXTRACT_SUBREG (v4f32 (COPY_TO_REGCLASS (v4f32 QPR:$src1),QPR_VFP2)), |
Anton Korobeynikov | 3600d16 | 2009-09-12 22:21:08 +0000 | [diff] [blame] | 2691 | (SSubReg_f32_reg imm:$src2))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2692 | //def : Pat<(extractelt (v2i64 QPR:$src1), imm:$src2), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2693 | // (EXTRACT_SUBREG QPR:$src1, (DSubReg_f64_reg imm:$src2))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2694 | def : Pat<(extractelt (v2f64 QPR:$src1), imm:$src2), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2695 | (EXTRACT_SUBREG QPR:$src1, (DSubReg_f64_reg imm:$src2))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2696 | |
| 2697 | |
| 2698 | // VMOV : Vector Set Lane (move ARM core register to scalar) |
| 2699 | |
| 2700 | let Constraints = "$src1 = $dst" in { |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2701 | def VSETLNi8 : NVSetLane<{1,1,1,0,0,1,?,0}, 0b1011, {?,?}, (outs DPR:$dst), |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2702 | (ins DPR:$src1, GPR:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2703 | IIC_VMOVISL, "vmov", "8", "$dst[$lane], $src2", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2704 | [(set DPR:$dst, (vector_insert (v8i8 DPR:$src1), |
| 2705 | GPR:$src2, imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2706 | def VSETLNi16 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, {?,1}, (outs DPR:$dst), |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2707 | (ins DPR:$src1, GPR:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2708 | IIC_VMOVISL, "vmov", "16", "$dst[$lane], $src2", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2709 | [(set DPR:$dst, (vector_insert (v4i16 DPR:$src1), |
| 2710 | GPR:$src2, imm:$lane))]>; |
Johnny Chen | 0c1d2c1 | 2009-11-23 17:48:17 +0000 | [diff] [blame] | 2711 | def VSETLNi32 : NVSetLane<{1,1,1,0,0,0,?,0}, 0b1011, 0b00, (outs DPR:$dst), |
Bob Wilson | 30ff449 | 2009-08-21 21:58:55 +0000 | [diff] [blame] | 2712 | (ins DPR:$src1, GPR:$src2, nohash_imm:$lane), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2713 | IIC_VMOVISL, "vmov", "32", "$dst[$lane], $src2", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2714 | [(set DPR:$dst, (insertelt (v2i32 DPR:$src1), |
| 2715 | GPR:$src2, imm:$lane))]>; |
| 2716 | } |
| 2717 | def : Pat<(vector_insert (v16i8 QPR:$src1), GPR:$src2, imm:$lane), |
| 2718 | (v16i8 (INSERT_SUBREG QPR:$src1, |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2719 | (v8i8 (VSETLNi8 (v8i8 (EXTRACT_SUBREG QPR:$src1, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2720 | (DSubReg_i8_reg imm:$lane))), |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2721 | GPR:$src2, (SubReg_i8_lane imm:$lane))), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2722 | (DSubReg_i8_reg imm:$lane)))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2723 | def : Pat<(vector_insert (v8i16 QPR:$src1), GPR:$src2, imm:$lane), |
| 2724 | (v8i16 (INSERT_SUBREG QPR:$src1, |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2725 | (v4i16 (VSETLNi16 (v4i16 (EXTRACT_SUBREG QPR:$src1, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2726 | (DSubReg_i16_reg imm:$lane))), |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2727 | GPR:$src2, (SubReg_i16_lane imm:$lane))), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2728 | (DSubReg_i16_reg imm:$lane)))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2729 | def : Pat<(insertelt (v4i32 QPR:$src1), GPR:$src2, imm:$lane), |
| 2730 | (v4i32 (INSERT_SUBREG QPR:$src1, |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2731 | (v2i32 (VSETLNi32 (v2i32 (EXTRACT_SUBREG QPR:$src1, |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2732 | (DSubReg_i32_reg imm:$lane))), |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 2733 | GPR:$src2, (SubReg_i32_lane imm:$lane))), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2734 | (DSubReg_i32_reg imm:$lane)))>; |
| 2735 | |
Anton Korobeynikov | d335277 | 2009-08-30 19:06:39 +0000 | [diff] [blame] | 2736 | def : Pat<(v2f32 (insertelt DPR:$src1, SPR:$src2, imm:$src3)), |
Anton Korobeynikov | d933121 | 2009-11-02 00:11:39 +0000 | [diff] [blame] | 2737 | (INSERT_SUBREG (v2f32 (COPY_TO_REGCLASS DPR:$src1, DPR_VFP2)), |
| 2738 | SPR:$src2, (SSubReg_f32_reg imm:$src3))>; |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2739 | def : Pat<(v4f32 (insertelt QPR:$src1, SPR:$src2, imm:$src3)), |
Anton Korobeynikov | d933121 | 2009-11-02 00:11:39 +0000 | [diff] [blame] | 2740 | (INSERT_SUBREG (v4f32 (COPY_TO_REGCLASS QPR:$src1, QPR_VFP2)), |
| 2741 | SPR:$src2, (SSubReg_f32_reg imm:$src3))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2742 | |
| 2743 | //def : Pat<(v2i64 (insertelt QPR:$src1, DPR:$src2, imm:$src3)), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2744 | // (INSERT_SUBREG QPR:$src1, DPR:$src2, (DSubReg_f64_reg imm:$src3))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2745 | def : Pat<(v2f64 (insertelt QPR:$src1, DPR:$src2, imm:$src3)), |
Anton Korobeynikov | 49284e7 | 2009-08-08 14:06:07 +0000 | [diff] [blame] | 2746 | (INSERT_SUBREG QPR:$src1, DPR:$src2, (DSubReg_f64_reg imm:$src3))>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2747 | |
Anton Korobeynikov | baee7b2 | 2009-08-27 14:38:44 +0000 | [diff] [blame] | 2748 | def : Pat<(v2f32 (scalar_to_vector SPR:$src)), |
| 2749 | (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), SPR:$src, arm_ssubreg_0)>; |
Chris Lattner | c002b57 | 2010-03-15 00:52:43 +0000 | [diff] [blame] | 2750 | def : Pat<(v2f64 (scalar_to_vector (f64 DPR:$src))), |
Anton Korobeynikov | baee7b2 | 2009-08-27 14:38:44 +0000 | [diff] [blame] | 2751 | (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), DPR:$src, arm_dsubreg_0)>; |
| 2752 | def : Pat<(v4f32 (scalar_to_vector SPR:$src)), |
| 2753 | (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), SPR:$src, arm_ssubreg_0)>; |
| 2754 | |
Anton Korobeynikov | 872393c | 2009-08-27 16:10:17 +0000 | [diff] [blame] | 2755 | def : Pat<(v8i8 (scalar_to_vector GPR:$src)), |
| 2756 | (VSETLNi8 (v8i8 (IMPLICIT_DEF)), GPR:$src, (i32 0))>; |
| 2757 | def : Pat<(v4i16 (scalar_to_vector GPR:$src)), |
| 2758 | (VSETLNi16 (v4i16 (IMPLICIT_DEF)), GPR:$src, (i32 0))>; |
| 2759 | def : Pat<(v2i32 (scalar_to_vector GPR:$src)), |
| 2760 | (VSETLNi32 (v2i32 (IMPLICIT_DEF)), GPR:$src, (i32 0))>; |
| 2761 | |
| 2762 | def : Pat<(v16i8 (scalar_to_vector GPR:$src)), |
| 2763 | (INSERT_SUBREG (v16i8 (IMPLICIT_DEF)), |
| 2764 | (VSETLNi8 (v8i8 (IMPLICIT_DEF)), GPR:$src, (i32 0)), |
| 2765 | arm_dsubreg_0)>; |
| 2766 | def : Pat<(v8i16 (scalar_to_vector GPR:$src)), |
| 2767 | (INSERT_SUBREG (v8i16 (IMPLICIT_DEF)), |
| 2768 | (VSETLNi16 (v4i16 (IMPLICIT_DEF)), GPR:$src, (i32 0)), |
| 2769 | arm_dsubreg_0)>; |
| 2770 | def : Pat<(v4i32 (scalar_to_vector GPR:$src)), |
| 2771 | (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), |
| 2772 | (VSETLNi32 (v2i32 (IMPLICIT_DEF)), GPR:$src, (i32 0)), |
| 2773 | arm_dsubreg_0)>; |
| 2774 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2775 | // VDUP : Vector Duplicate (from ARM core register to all elements) |
| 2776 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2777 | class VDUPD<bits<8> opcod1, bits<2> opcod3, string Dt, ValueType Ty> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2778 | : NVDup<opcod1, 0b1011, opcod3, (outs DPR:$dst), (ins GPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2779 | IIC_VMOVIS, "vdup", Dt, "$dst, $src", |
Bob Wilson | f4f1a27 | 2009-08-14 05:13:08 +0000 | [diff] [blame] | 2780 | [(set DPR:$dst, (Ty (NEONvdup (i32 GPR:$src))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2781 | class VDUPQ<bits<8> opcod1, bits<2> opcod3, string Dt, ValueType Ty> |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2782 | : NVDup<opcod1, 0b1011, opcod3, (outs QPR:$dst), (ins GPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2783 | IIC_VMOVIS, "vdup", Dt, "$dst, $src", |
Bob Wilson | f4f1a27 | 2009-08-14 05:13:08 +0000 | [diff] [blame] | 2784 | [(set QPR:$dst, (Ty (NEONvdup (i32 GPR:$src))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2785 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2786 | def VDUP8d : VDUPD<0b11101100, 0b00, "8", v8i8>; |
| 2787 | def VDUP16d : VDUPD<0b11101000, 0b01, "16", v4i16>; |
| 2788 | def VDUP32d : VDUPD<0b11101000, 0b00, "32", v2i32>; |
| 2789 | def VDUP8q : VDUPQ<0b11101110, 0b00, "8", v16i8>; |
| 2790 | def VDUP16q : VDUPQ<0b11101010, 0b01, "16", v8i16>; |
| 2791 | def VDUP32q : VDUPQ<0b11101010, 0b00, "32", v4i32>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2792 | |
| 2793 | def VDUPfd : NVDup<0b11101000, 0b1011, 0b00, (outs DPR:$dst), (ins GPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2794 | IIC_VMOVIS, "vdup", "32", "$dst, $src", |
Bob Wilson | f4f1a27 | 2009-08-14 05:13:08 +0000 | [diff] [blame] | 2795 | [(set DPR:$dst, (v2f32 (NEONvdup |
| 2796 | (f32 (bitconvert GPR:$src)))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2797 | def VDUPfq : NVDup<0b11101010, 0b1011, 0b00, (outs QPR:$dst), (ins GPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2798 | IIC_VMOVIS, "vdup", "32", "$dst, $src", |
Bob Wilson | f4f1a27 | 2009-08-14 05:13:08 +0000 | [diff] [blame] | 2799 | [(set QPR:$dst, (v4f32 (NEONvdup |
| 2800 | (f32 (bitconvert GPR:$src)))))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2801 | |
| 2802 | // VDUP : Vector Duplicate Lane (from scalar to all elements) |
| 2803 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2804 | class VDUPLND<bits<2> op19_18, bits<2> op17_16, |
| 2805 | string OpcodeStr, string Dt, ValueType Ty> |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2806 | : N2V<0b11, 0b11, op19_18, op17_16, 0b11000, 0, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2807 | (outs DPR:$dst), (ins DPR:$src, nohash_imm:$lane), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2808 | OpcodeStr, Dt, "$dst, $src[$lane]", "", |
Bob Wilson | 206f6c4 | 2009-08-14 05:08:32 +0000 | [diff] [blame] | 2809 | [(set DPR:$dst, (Ty (NEONvduplane (Ty DPR:$src), imm:$lane)))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2810 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2811 | class VDUPLNQ<bits<2> op19_18, bits<2> op17_16, string OpcodeStr, string Dt, |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2812 | ValueType ResTy, ValueType OpTy> |
| 2813 | : N2V<0b11, 0b11, op19_18, op17_16, 0b11000, 1, 0, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2814 | (outs QPR:$dst), (ins DPR:$src, nohash_imm:$lane), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2815 | OpcodeStr, Dt, "$dst, $src[$lane]", "", |
Bob Wilson | 206f6c4 | 2009-08-14 05:08:32 +0000 | [diff] [blame] | 2816 | [(set QPR:$dst, (ResTy (NEONvduplane (OpTy DPR:$src), imm:$lane)))]>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2817 | |
Bob Wilson | 52e0d9d | 2009-10-21 02:15:46 +0000 | [diff] [blame] | 2818 | // Inst{19-16} is partially specified depending on the element size. |
| 2819 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2820 | def VDUPLN8d : VDUPLND<{?,?}, {?,1}, "vdup", "8", v8i8>; |
| 2821 | def VDUPLN16d : VDUPLND<{?,?}, {1,0}, "vdup", "16", v4i16>; |
| 2822 | def VDUPLN32d : VDUPLND<{?,1}, {0,0}, "vdup", "32", v2i32>; |
| 2823 | def VDUPLNfd : VDUPLND<{?,1}, {0,0}, "vdup", "32", v2f32>; |
| 2824 | def VDUPLN8q : VDUPLNQ<{?,?}, {?,1}, "vdup", "8", v16i8, v8i8>; |
| 2825 | def VDUPLN16q : VDUPLNQ<{?,?}, {1,0}, "vdup", "16", v8i16, v4i16>; |
| 2826 | def VDUPLN32q : VDUPLNQ<{?,1}, {0,0}, "vdup", "32", v4i32, v2i32>; |
| 2827 | def VDUPLNfq : VDUPLNQ<{?,1}, {0,0}, "vdup", "32", v4f32, v2f32>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2828 | |
Bob Wilson | 206f6c4 | 2009-08-14 05:08:32 +0000 | [diff] [blame] | 2829 | def : Pat<(v16i8 (NEONvduplane (v16i8 QPR:$src), imm:$lane)), |
| 2830 | (v16i8 (VDUPLN8q (v8i8 (EXTRACT_SUBREG QPR:$src, |
| 2831 | (DSubReg_i8_reg imm:$lane))), |
| 2832 | (SubReg_i8_lane imm:$lane)))>; |
| 2833 | def : Pat<(v8i16 (NEONvduplane (v8i16 QPR:$src), imm:$lane)), |
| 2834 | (v8i16 (VDUPLN16q (v4i16 (EXTRACT_SUBREG QPR:$src, |
| 2835 | (DSubReg_i16_reg imm:$lane))), |
| 2836 | (SubReg_i16_lane imm:$lane)))>; |
| 2837 | def : Pat<(v4i32 (NEONvduplane (v4i32 QPR:$src), imm:$lane)), |
| 2838 | (v4i32 (VDUPLN32q (v2i32 (EXTRACT_SUBREG QPR:$src, |
| 2839 | (DSubReg_i32_reg imm:$lane))), |
| 2840 | (SubReg_i32_lane imm:$lane)))>; |
| 2841 | def : Pat<(v4f32 (NEONvduplane (v4f32 QPR:$src), imm:$lane)), |
| 2842 | (v4f32 (VDUPLNfq (v2f32 (EXTRACT_SUBREG QPR:$src, |
| 2843 | (DSubReg_i32_reg imm:$lane))), |
| 2844 | (SubReg_i32_lane imm:$lane)))>; |
| 2845 | |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2846 | def VDUPfdf : N2V<0b11, 0b11, {?,1}, {0,0}, 0b11000, 0, 0, |
| 2847 | (outs DPR:$dst), (ins SPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2848 | IIC_VMOVD, "vdup", "32", "$dst, ${src:lane}", "", |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2849 | [(set DPR:$dst, (v2f32 (NEONvdup (f32 SPR:$src))))]>; |
Anton Korobeynikov | 9c913fb | 2009-08-07 22:36:50 +0000 | [diff] [blame] | 2850 | |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2851 | def VDUPfqf : N2V<0b11, 0b11, {?,1}, {0,0}, 0b11000, 1, 0, |
| 2852 | (outs QPR:$dst), (ins SPR:$src), |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2853 | IIC_VMOVD, "vdup", "32", "$dst, ${src:lane}", "", |
Johnny Chen | 9ee642f | 2009-11-23 21:00:43 +0000 | [diff] [blame] | 2854 | [(set QPR:$dst, (v4f32 (NEONvdup (f32 SPR:$src))))]>; |
Anton Korobeynikov | 9c913fb | 2009-08-07 22:36:50 +0000 | [diff] [blame] | 2855 | |
Anton Korobeynikov | b261a19 | 2009-09-02 21:21:28 +0000 | [diff] [blame] | 2856 | def : Pat<(v2i64 (NEONvduplane (v2i64 QPR:$src), imm:$lane)), |
| 2857 | (INSERT_SUBREG QPR:$src, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2858 | (i64 (EXTRACT_SUBREG QPR:$src, |
| 2859 | (DSubReg_f64_reg imm:$lane))), |
Anton Korobeynikov | b261a19 | 2009-09-02 21:21:28 +0000 | [diff] [blame] | 2860 | (DSubReg_f64_other_reg imm:$lane))>; |
| 2861 | def : Pat<(v2f64 (NEONvduplane (v2f64 QPR:$src), imm:$lane)), |
| 2862 | (INSERT_SUBREG QPR:$src, |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 2863 | (f64 (EXTRACT_SUBREG QPR:$src, |
| 2864 | (DSubReg_f64_reg imm:$lane))), |
Anton Korobeynikov | b261a19 | 2009-09-02 21:21:28 +0000 | [diff] [blame] | 2865 | (DSubReg_f64_other_reg imm:$lane))>; |
| 2866 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2867 | // VMOVN : Vector Narrowing Move |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2868 | defm VMOVN : N2VNInt_HSD<0b11,0b11,0b10,0b00100,0,0, IIC_VMOVD, |
| 2869 | "vmovn", "i", int_arm_neon_vmovn>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2870 | // VQMOVN : Vector Saturating Narrowing Move |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2871 | defm VQMOVNs : N2VNInt_HSD<0b11,0b11,0b10,0b00101,0,0, IIC_VQUNAiD, |
| 2872 | "vqmovn", "s", int_arm_neon_vqmovns>; |
| 2873 | defm VQMOVNu : N2VNInt_HSD<0b11,0b11,0b10,0b00101,1,0, IIC_VQUNAiD, |
| 2874 | "vqmovn", "u", int_arm_neon_vqmovnu>; |
| 2875 | defm VQMOVNsu : N2VNInt_HSD<0b11,0b11,0b10,0b00100,1,0, IIC_VQUNAiD, |
| 2876 | "vqmovun", "s", int_arm_neon_vqmovnsu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2877 | // VMOVL : Vector Lengthening Move |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2878 | defm VMOVLs : N2VLInt_QHS<0b01,0b10100,0,1, "vmovl", "s", |
| 2879 | int_arm_neon_vmovls>; |
| 2880 | defm VMOVLu : N2VLInt_QHS<0b11,0b10100,0,1, "vmovl", "u", |
| 2881 | int_arm_neon_vmovlu>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2882 | |
| 2883 | // Vector Conversions. |
| 2884 | |
Johnny Chen | 09a4376 | 2010-03-17 17:52:21 +0000 | [diff] [blame] | 2885 | // VCVT : Vector Convert Between Floating-Point and Integers |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2886 | def VCVTf2sd : N2VD<0b11, 0b11, 0b10, 0b11, 0b01110, 0, "vcvt", "s32.f32", |
| 2887 | v2i32, v2f32, fp_to_sint>; |
| 2888 | def VCVTf2ud : N2VD<0b11, 0b11, 0b10, 0b11, 0b01111, 0, "vcvt", "u32.f32", |
| 2889 | v2i32, v2f32, fp_to_uint>; |
| 2890 | def VCVTs2fd : N2VD<0b11, 0b11, 0b10, 0b11, 0b01100, 0, "vcvt", "f32.s32", |
| 2891 | v2f32, v2i32, sint_to_fp>; |
| 2892 | def VCVTu2fd : N2VD<0b11, 0b11, 0b10, 0b11, 0b01101, 0, "vcvt", "f32.u32", |
| 2893 | v2f32, v2i32, uint_to_fp>; |
Johnny Chen | 09a4376 | 2010-03-17 17:52:21 +0000 | [diff] [blame] | 2894 | |
Johnny Chen | 7c3f386 | 2010-03-17 23:26:50 +0000 | [diff] [blame] | 2895 | def VCVTf2sq : N2VQ<0b11, 0b11, 0b10, 0b11, 0b01110, 0, "vcvt", "s32.f32", |
| 2896 | v4i32, v4f32, fp_to_sint>; |
| 2897 | def VCVTf2uq : N2VQ<0b11, 0b11, 0b10, 0b11, 0b01111, 0, "vcvt", "u32.f32", |
| 2898 | v4i32, v4f32, fp_to_uint>; |
| 2899 | def VCVTs2fq : N2VQ<0b11, 0b11, 0b10, 0b11, 0b01100, 0, "vcvt", "f32.s32", |
| 2900 | v4f32, v4i32, sint_to_fp>; |
| 2901 | def VCVTu2fq : N2VQ<0b11, 0b11, 0b10, 0b11, 0b01101, 0, "vcvt", "f32.u32", |
| 2902 | v4f32, v4i32, uint_to_fp>; |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2903 | |
| 2904 | // VCVT : Vector Convert Between Floating-Point and Fixed-Point. |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2905 | def VCVTf2xsd : N2VCvtD<0, 1, 0b1111, 0, 1, "vcvt", "s32.f32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2906 | v2i32, v2f32, int_arm_neon_vcvtfp2fxs>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2907 | def VCVTf2xud : N2VCvtD<1, 1, 0b1111, 0, 1, "vcvt", "u32.f32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2908 | v2i32, v2f32, int_arm_neon_vcvtfp2fxu>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2909 | def VCVTxs2fd : N2VCvtD<0, 1, 0b1110, 0, 1, "vcvt", "f32.s32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2910 | v2f32, v2i32, int_arm_neon_vcvtfxs2fp>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2911 | def VCVTxu2fd : N2VCvtD<1, 1, 0b1110, 0, 1, "vcvt", "f32.u32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2912 | v2f32, v2i32, int_arm_neon_vcvtfxu2fp>; |
| 2913 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2914 | def VCVTf2xsq : N2VCvtQ<0, 1, 0b1111, 0, 1, "vcvt", "s32.f32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2915 | v4i32, v4f32, int_arm_neon_vcvtfp2fxs>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2916 | def VCVTf2xuq : N2VCvtQ<1, 1, 0b1111, 0, 1, "vcvt", "u32.f32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2917 | v4i32, v4f32, int_arm_neon_vcvtfp2fxu>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2918 | def VCVTxs2fq : N2VCvtQ<0, 1, 0b1110, 0, 1, "vcvt", "f32.s32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2919 | v4f32, v4i32, int_arm_neon_vcvtfxs2fp>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2920 | def VCVTxu2fq : N2VCvtQ<1, 1, 0b1110, 0, 1, "vcvt", "f32.u32", |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 2921 | v4f32, v4i32, int_arm_neon_vcvtfxu2fp>; |
| 2922 | |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2923 | // Vector Reverse. |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2924 | |
| 2925 | // VREV64 : Vector Reverse elements within 64-bit doublewords |
| 2926 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2927 | class VREV64D<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2928 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 0, 0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2929 | (ins DPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2930 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2931 | [(set DPR:$dst, (Ty (NEONvrev64 (Ty DPR:$src))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2932 | class VREV64Q<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2933 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00000, 1, 0, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2934 | (ins QPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2935 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2936 | [(set QPR:$dst, (Ty (NEONvrev64 (Ty QPR:$src))))]>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2937 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2938 | def VREV64d8 : VREV64D<0b00, "vrev64", "8", v8i8>; |
| 2939 | def VREV64d16 : VREV64D<0b01, "vrev64", "16", v4i16>; |
| 2940 | def VREV64d32 : VREV64D<0b10, "vrev64", "32", v2i32>; |
| 2941 | def VREV64df : VREV64D<0b10, "vrev64", "32", v2f32>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2942 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2943 | def VREV64q8 : VREV64Q<0b00, "vrev64", "8", v16i8>; |
| 2944 | def VREV64q16 : VREV64Q<0b01, "vrev64", "16", v8i16>; |
| 2945 | def VREV64q32 : VREV64Q<0b10, "vrev64", "32", v4i32>; |
| 2946 | def VREV64qf : VREV64Q<0b10, "vrev64", "32", v4f32>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2947 | |
| 2948 | // VREV32 : Vector Reverse elements within 32-bit words |
| 2949 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2950 | class VREV32D<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2951 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 0, 0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2952 | (ins DPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2953 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2954 | [(set DPR:$dst, (Ty (NEONvrev32 (Ty DPR:$src))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2955 | class VREV32Q<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2956 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00001, 1, 0, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2957 | (ins QPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2958 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2959 | [(set QPR:$dst, (Ty (NEONvrev32 (Ty QPR:$src))))]>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2960 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2961 | def VREV32d8 : VREV32D<0b00, "vrev32", "8", v8i8>; |
| 2962 | def VREV32d16 : VREV32D<0b01, "vrev32", "16", v4i16>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2963 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2964 | def VREV32q8 : VREV32Q<0b00, "vrev32", "8", v16i8>; |
| 2965 | def VREV32q16 : VREV32Q<0b01, "vrev32", "16", v8i16>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2966 | |
| 2967 | // VREV16 : Vector Reverse elements within 16-bit halfwords |
| 2968 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2969 | class VREV16D<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2970 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 0, 0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2971 | (ins DPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2972 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2973 | [(set DPR:$dst, (Ty (NEONvrev16 (Ty DPR:$src))))]>; |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2974 | class VREV16Q<bits<2> op19_18, string OpcodeStr, string Dt, ValueType Ty> |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2975 | : N2V<0b11, 0b11, op19_18, 0b00, 0b00010, 1, 0, (outs QPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 2976 | (ins QPR:$src), IIC_VMOVD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2977 | OpcodeStr, Dt, "$dst, $src", "", |
Bob Wilson | 0847927 | 2009-08-12 22:31:50 +0000 | [diff] [blame] | 2978 | [(set QPR:$dst, (Ty (NEONvrev16 (Ty QPR:$src))))]>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2979 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2980 | def VREV16d8 : VREV16D<0b00, "vrev16", "8", v8i8>; |
| 2981 | def VREV16q8 : VREV16Q<0b00, "vrev16", "8", v16i8>; |
Bob Wilson | c1cd72e | 2009-07-26 00:39:34 +0000 | [diff] [blame] | 2982 | |
Bob Wilson | 3ac3913 | 2009-08-19 17:03:43 +0000 | [diff] [blame] | 2983 | // Other Vector Shuffles. |
| 2984 | |
| 2985 | // VEXT : Vector Extract |
| 2986 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2987 | class VEXTd<string OpcodeStr, string Dt, ValueType Ty> |
Johnny Chen | 6c6fa9a | 2009-11-23 20:09:13 +0000 | [diff] [blame] | 2988 | : N3V<0,1,0b11,{?,?,?,?},0,0, (outs DPR:$dst), |
| 2989 | (ins DPR:$lhs, DPR:$rhs, i32imm:$index), IIC_VEXTD, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2990 | OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "", |
Johnny Chen | 6c6fa9a | 2009-11-23 20:09:13 +0000 | [diff] [blame] | 2991 | [(set DPR:$dst, (Ty (NEONvext (Ty DPR:$lhs), |
| 2992 | (Ty DPR:$rhs), imm:$index)))]>; |
Anton Korobeynikov | 6c28c00 | 2009-08-21 12:40:21 +0000 | [diff] [blame] | 2993 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2994 | class VEXTq<string OpcodeStr, string Dt, ValueType Ty> |
Johnny Chen | 6c6fa9a | 2009-11-23 20:09:13 +0000 | [diff] [blame] | 2995 | : N3V<0,1,0b11,{?,?,?,?},1,0, (outs QPR:$dst), |
| 2996 | (ins QPR:$lhs, QPR:$rhs, i32imm:$index), IIC_VEXTQ, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 2997 | OpcodeStr, Dt, "$dst, $lhs, $rhs, $index", "", |
Johnny Chen | 6c6fa9a | 2009-11-23 20:09:13 +0000 | [diff] [blame] | 2998 | [(set QPR:$dst, (Ty (NEONvext (Ty QPR:$lhs), |
| 2999 | (Ty QPR:$rhs), imm:$index)))]>; |
Anton Korobeynikov | 6c28c00 | 2009-08-21 12:40:21 +0000 | [diff] [blame] | 3000 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3001 | def VEXTd8 : VEXTd<"vext", "8", v8i8>; |
| 3002 | def VEXTd16 : VEXTd<"vext", "16", v4i16>; |
| 3003 | def VEXTd32 : VEXTd<"vext", "32", v2i32>; |
| 3004 | def VEXTdf : VEXTd<"vext", "32", v2f32>; |
Anton Korobeynikov | 6c28c00 | 2009-08-21 12:40:21 +0000 | [diff] [blame] | 3005 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3006 | def VEXTq8 : VEXTq<"vext", "8", v16i8>; |
| 3007 | def VEXTq16 : VEXTq<"vext", "16", v8i16>; |
| 3008 | def VEXTq32 : VEXTq<"vext", "32", v4i32>; |
| 3009 | def VEXTqf : VEXTq<"vext", "32", v4f32>; |
Bob Wilson | 3ac3913 | 2009-08-19 17:03:43 +0000 | [diff] [blame] | 3010 | |
Bob Wilson | 3b16933 | 2009-08-08 05:53:00 +0000 | [diff] [blame] | 3011 | // VTRN : Vector Transpose |
| 3012 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3013 | def VTRNd8 : N2VDShuffle<0b00, 0b00001, "vtrn", "8">; |
| 3014 | def VTRNd16 : N2VDShuffle<0b01, 0b00001, "vtrn", "16">; |
| 3015 | def VTRNd32 : N2VDShuffle<0b10, 0b00001, "vtrn", "32">; |
Bob Wilson | 3b16933 | 2009-08-08 05:53:00 +0000 | [diff] [blame] | 3016 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3017 | def VTRNq8 : N2VQShuffle<0b00, 0b00001, IIC_VPERMQ, "vtrn", "8">; |
| 3018 | def VTRNq16 : N2VQShuffle<0b01, 0b00001, IIC_VPERMQ, "vtrn", "16">; |
| 3019 | def VTRNq32 : N2VQShuffle<0b10, 0b00001, IIC_VPERMQ, "vtrn", "32">; |
Bob Wilson | 3b16933 | 2009-08-08 05:53:00 +0000 | [diff] [blame] | 3020 | |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 3021 | // VUZP : Vector Unzip (Deinterleave) |
| 3022 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3023 | def VUZPd8 : N2VDShuffle<0b00, 0b00010, "vuzp", "8">; |
| 3024 | def VUZPd16 : N2VDShuffle<0b01, 0b00010, "vuzp", "16">; |
| 3025 | def VUZPd32 : N2VDShuffle<0b10, 0b00010, "vuzp", "32">; |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 3026 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3027 | def VUZPq8 : N2VQShuffle<0b00, 0b00010, IIC_VPERMQ3, "vuzp", "8">; |
| 3028 | def VUZPq16 : N2VQShuffle<0b01, 0b00010, IIC_VPERMQ3, "vuzp", "16">; |
| 3029 | def VUZPq32 : N2VQShuffle<0b10, 0b00010, IIC_VPERMQ3, "vuzp", "32">; |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 3030 | |
| 3031 | // VZIP : Vector Zip (Interleave) |
| 3032 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3033 | def VZIPd8 : N2VDShuffle<0b00, 0b00011, "vzip", "8">; |
| 3034 | def VZIPd16 : N2VDShuffle<0b01, 0b00011, "vzip", "16">; |
| 3035 | def VZIPd32 : N2VDShuffle<0b10, 0b00011, "vzip", "32">; |
Bob Wilson | c1eaa4d | 2009-08-08 06:13:25 +0000 | [diff] [blame] | 3036 | |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3037 | def VZIPq8 : N2VQShuffle<0b00, 0b00011, IIC_VPERMQ3, "vzip", "8">; |
| 3038 | def VZIPq16 : N2VQShuffle<0b01, 0b00011, IIC_VPERMQ3, "vzip", "16">; |
| 3039 | def VZIPq32 : N2VQShuffle<0b10, 0b00011, IIC_VPERMQ3, "vzip", "32">; |
Bob Wilson | 3b16933 | 2009-08-08 05:53:00 +0000 | [diff] [blame] | 3040 | |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3041 | // Vector Table Lookup and Table Extension. |
| 3042 | |
| 3043 | // VTBL : Vector Table Lookup |
| 3044 | def VTBL1 |
| 3045 | : N3V<1,1,0b11,0b1000,0,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3046 | (ins DPR:$tbl1, DPR:$src), IIC_VTB1, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3047 | "vtbl", "8", "$dst, \\{$tbl1\\}, $src", "", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3048 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbl1 DPR:$tbl1, DPR:$src)))]>; |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 3049 | let hasExtraSrcRegAllocReq = 1 in { |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3050 | def VTBL2 |
| 3051 | : N3V<1,1,0b11,0b1001,0,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3052 | (ins DPR:$tbl1, DPR:$tbl2, DPR:$src), IIC_VTB2, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3053 | "vtbl", "8", "$dst, \\{$tbl1, $tbl2\\}, $src", "", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3054 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbl2 |
| 3055 | DPR:$tbl1, DPR:$tbl2, DPR:$src)))]>; |
| 3056 | def VTBL3 |
| 3057 | : N3V<1,1,0b11,0b1010,0,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3058 | (ins DPR:$tbl1, DPR:$tbl2, DPR:$tbl3, DPR:$src), IIC_VTB3, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3059 | "vtbl", "8", "$dst, \\{$tbl1, $tbl2, $tbl3\\}, $src", "", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3060 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbl3 |
| 3061 | DPR:$tbl1, DPR:$tbl2, DPR:$tbl3, DPR:$src)))]>; |
| 3062 | def VTBL4 |
| 3063 | : N3V<1,1,0b11,0b1011,0,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3064 | (ins DPR:$tbl1, DPR:$tbl2, DPR:$tbl3, DPR:$tbl4, DPR:$src), IIC_VTB4, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3065 | "vtbl", "8", "$dst, \\{$tbl1, $tbl2, $tbl3, $tbl4\\}, $src", "", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3066 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbl4 DPR:$tbl1, DPR:$tbl2, |
| 3067 | DPR:$tbl3, DPR:$tbl4, DPR:$src)))]>; |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 3068 | } // hasExtraSrcRegAllocReq = 1 |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3069 | |
| 3070 | // VTBX : Vector Table Extension |
| 3071 | def VTBX1 |
| 3072 | : N3V<1,1,0b11,0b1000,1,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3073 | (ins DPR:$orig, DPR:$tbl1, DPR:$src), IIC_VTBX1, |
Evan Cheng | 09c61b3 | 2009-11-23 21:57:23 +0000 | [diff] [blame] | 3074 | "vtbx", "8", "$dst, \\{$tbl1\\}, $src", "$orig = $dst", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3075 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbx1 |
| 3076 | DPR:$orig, DPR:$tbl1, DPR:$src)))]>; |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 3077 | let hasExtraSrcRegAllocReq = 1 in { |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3078 | def VTBX2 |
| 3079 | : N3V<1,1,0b11,0b1001,1,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3080 | (ins DPR:$orig, DPR:$tbl1, DPR:$tbl2, DPR:$src), IIC_VTBX2, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3081 | "vtbx", "8", "$dst, \\{$tbl1, $tbl2\\}, $src", "$orig = $dst", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3082 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbx2 |
| 3083 | DPR:$orig, DPR:$tbl1, DPR:$tbl2, DPR:$src)))]>; |
| 3084 | def VTBX3 |
| 3085 | : N3V<1,1,0b11,0b1010,1,0, (outs DPR:$dst), |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3086 | (ins DPR:$orig, DPR:$tbl1, DPR:$tbl2, DPR:$tbl3, DPR:$src), IIC_VTBX3, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3087 | "vtbx", "8", "$dst, \\{$tbl1, $tbl2, $tbl3\\}, $src", "$orig = $dst", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3088 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbx3 DPR:$orig, DPR:$tbl1, |
| 3089 | DPR:$tbl2, DPR:$tbl3, DPR:$src)))]>; |
| 3090 | def VTBX4 |
| 3091 | : N3V<1,1,0b11,0b1011,1,0, (outs DPR:$dst), (ins DPR:$orig, DPR:$tbl1, |
David Goodwin | 36bff0c | 2009-09-25 18:38:29 +0000 | [diff] [blame] | 3092 | DPR:$tbl2, DPR:$tbl3, DPR:$tbl4, DPR:$src), IIC_VTBX4, |
Bob Wilson | 82dcfa3 | 2010-01-18 01:24:43 +0000 | [diff] [blame] | 3093 | "vtbx", "8", "$dst, \\{$tbl1, $tbl2, $tbl3, $tbl4\\}, $src", |
| 3094 | "$orig = $dst", |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3095 | [(set DPR:$dst, (v8i8 (int_arm_neon_vtbx4 DPR:$orig, DPR:$tbl1, |
| 3096 | DPR:$tbl2, DPR:$tbl3, DPR:$tbl4, DPR:$src)))]>; |
Evan Cheng | 7c8d5ea | 2009-10-01 08:22:27 +0000 | [diff] [blame] | 3097 | } // hasExtraSrcRegAllocReq = 1 |
Bob Wilson | 5ef42ed | 2009-08-12 20:51:55 +0000 | [diff] [blame] | 3098 | |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 3099 | //===----------------------------------------------------------------------===// |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3100 | // NEON instructions for single-precision FP math |
| 3101 | //===----------------------------------------------------------------------===// |
| 3102 | |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3103 | class N2VSPat<SDNode OpNode, ValueType ResTy, ValueType OpTy, NeonI Inst> |
| 3104 | : NEONFPPat<(ResTy (OpNode SPR:$a)), |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 3105 | (EXTRACT_SUBREG (OpTy (Inst (INSERT_SUBREG (OpTy (IMPLICIT_DEF)), |
| 3106 | SPR:$a, arm_ssubreg_0))), |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3107 | arm_ssubreg_0)>; |
| 3108 | |
| 3109 | class N3VSPat<SDNode OpNode, NeonI Inst> |
| 3110 | : NEONFPPat<(f32 (OpNode SPR:$a, SPR:$b)), |
Chris Lattner | 4e62472 | 2010-03-08 18:51:21 +0000 | [diff] [blame] | 3111 | (EXTRACT_SUBREG (v2f32 |
| 3112 | (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), |
| 3113 | SPR:$a, arm_ssubreg_0), |
| 3114 | (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), |
| 3115 | SPR:$b, arm_ssubreg_0))), |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3116 | arm_ssubreg_0)>; |
| 3117 | |
| 3118 | class N3VSMulOpPat<SDNode MulNode, SDNode OpNode, NeonI Inst> |
| 3119 | : NEONFPPat<(f32 (OpNode SPR:$acc, (f32 (MulNode SPR:$a, SPR:$b)))), |
| 3120 | (EXTRACT_SUBREG (Inst (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), |
| 3121 | SPR:$acc, arm_ssubreg_0), |
| 3122 | (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), |
| 3123 | SPR:$a, arm_ssubreg_0), |
| 3124 | (INSERT_SUBREG (v2f32 (IMPLICIT_DEF)), |
| 3125 | SPR:$b, arm_ssubreg_0)), |
| 3126 | arm_ssubreg_0)>; |
| 3127 | |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3128 | // These need separate instructions because they must use DPR_VFP2 register |
| 3129 | // class which have SPR sub-registers. |
| 3130 | |
| 3131 | // Vector Add Operations used for single-precision FP |
| 3132 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3133 | def VADDfd_sfp : N3VS<0,0,0b00,0b1101,0, "vadd", "f32", v2f32, v2f32, fadd, 1>; |
| 3134 | def : N3VSPat<fadd, VADDfd_sfp>; |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3135 | |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3136 | // Vector Sub Operations used for single-precision FP |
| 3137 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3138 | def VSUBfd_sfp : N3VS<0,0,0b10,0b1101,0, "vsub", "f32", v2f32, v2f32, fsub, 0>; |
| 3139 | def : N3VSPat<fsub, VSUBfd_sfp>; |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3140 | |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3141 | // Vector Multiply Operations used for single-precision FP |
| 3142 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3143 | def VMULfd_sfp : N3VS<1,0,0b00,0b1101,1, "vmul", "f32", v2f32, v2f32, fmul, 1>; |
| 3144 | def : N3VSPat<fmul, VMULfd_sfp>; |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3145 | |
| 3146 | // Vector Multiply-Accumulate/Subtract used for single-precision FP |
Jim Grosbach | 67420bf | 2009-10-31 22:57:36 +0000 | [diff] [blame] | 3147 | // vml[as].f32 can cause 4-8 cycle stalls in following ASIMD instructions, so |
| 3148 | // we want to avoid them for now. e.g., alternating vmla/vadd instructions. |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3149 | |
Jim Grosbach | 67420bf | 2009-10-31 22:57:36 +0000 | [diff] [blame] | 3150 | //let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3151 | //def VMLAfd_sfp : N3VSMulOp<0,0,0b00,0b1101,1, IIC_VMACD, "vmla", "f32", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 3152 | // v2f32, fmul, fadd>; |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3153 | //def : N3VSMulOpPat<fmul, fadd, VMLAfd_sfp>; |
Jim Grosbach | 67420bf | 2009-10-31 22:57:36 +0000 | [diff] [blame] | 3154 | |
| 3155 | //let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3156 | //def VMLSfd_sfp : N3VSMulOp<0,0,0b10,0b1101,1, IIC_VMACD, "vmls", "f32", |
Bob Wilson | 1d2c421 | 2010-02-17 00:31:29 +0000 | [diff] [blame] | 3157 | // v2f32, fmul, fsub>; |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3158 | //def : N3VSMulOpPat<fmul, fsub, VMLSfd_sfp>; |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3159 | |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3160 | // Vector Absolute used for single-precision FP |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3161 | let neverHasSideEffects = 1 in |
Bob Wilson | 7c7fe6e | 2010-02-17 22:42:54 +0000 | [diff] [blame] | 3162 | def VABSfd_sfp : N2V<0b11, 0b11, 0b10, 0b01, 0b01110, 0, 0, |
| 3163 | (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), IIC_VUNAD, |
| 3164 | "vabs", "f32", "$dst, $src", "", []>; |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3165 | def : N2VSPat<fabs, f32, v2f32, VABSfd_sfp>; |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3166 | |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3167 | // Vector Negate used for single-precision FP |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3168 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3169 | def VNEGfd_sfp : N2V<0b11, 0b11, 0b10, 0b01, 0b01111, 0, 0, |
| 3170 | (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), IIC_VUNAD, |
| 3171 | "vneg", "f32", "$dst, $src", "", []>; |
| 3172 | def : N2VSPat<fneg, f32, v2f32, VNEGfd_sfp>; |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3173 | |
Bob Wilson | bc1d2dc | 2010-02-18 06:05:53 +0000 | [diff] [blame] | 3174 | // Vector Maximum used for single-precision FP |
| 3175 | let neverHasSideEffects = 1 in |
| 3176 | def VMAXfd_sfp : N3V<0, 0, 0b00, 0b1111, 0, 0, (outs DPR_VFP2:$dst), |
| 3177 | (ins DPR_VFP2:$src1, DPR_VFP2:$src2), IIC_VBIND, |
| 3178 | "vmax", "f32", "$dst, $src1, $src2", "", []>; |
| 3179 | def : N3VSPat<NEONfmax, VMAXfd_sfp>; |
| 3180 | |
| 3181 | // Vector Minimum used for single-precision FP |
| 3182 | let neverHasSideEffects = 1 in |
| 3183 | def VMINfd_sfp : N3V<0, 0, 0b00, 0b1111, 0, 0, (outs DPR_VFP2:$dst), |
| 3184 | (ins DPR_VFP2:$src1, DPR_VFP2:$src2), IIC_VBIND, |
| 3185 | "vmin", "f32", "$dst, $src1, $src2", "", []>; |
| 3186 | def : N3VSPat<NEONfmin, VMINfd_sfp>; |
| 3187 | |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3188 | // Vector Convert between single-precision FP and integer |
| 3189 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3190 | def VCVTf2sd_sfp : N2VS<0b11, 0b11, 0b10, 0b11, 0b01110, 0, "vcvt", "s32.f32", |
| 3191 | v2i32, v2f32, fp_to_sint>; |
Bob Wilson | 899588e | 2010-03-19 22:51:32 +0000 | [diff] [blame] | 3192 | def : N2VSPat<arm_ftosi, f32, v2f32, VCVTf2sd_sfp>; |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3193 | |
| 3194 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3195 | def VCVTf2ud_sfp : N2VS<0b11, 0b11, 0b10, 0b11, 0b01111, 0, "vcvt", "u32.f32", |
| 3196 | v2i32, v2f32, fp_to_uint>; |
Bob Wilson | 899588e | 2010-03-19 22:51:32 +0000 | [diff] [blame] | 3197 | def : N2VSPat<arm_ftoui, f32, v2f32, VCVTf2ud_sfp>; |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3198 | |
| 3199 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3200 | def VCVTs2fd_sfp : N2VS<0b11, 0b11, 0b10, 0b11, 0b01100, 0, "vcvt", "f32.s32", |
| 3201 | v2f32, v2i32, sint_to_fp>; |
Bob Wilson | 899588e | 2010-03-19 22:51:32 +0000 | [diff] [blame] | 3202 | def : N2VSPat<arm_sitof, f32, v2i32, VCVTs2fd_sfp>; |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3203 | |
| 3204 | let neverHasSideEffects = 1 in |
Bob Wilson | 154999f | 2010-02-17 22:23:11 +0000 | [diff] [blame] | 3205 | def VCVTu2fd_sfp : N2VS<0b11, 0b11, 0b10, 0b11, 0b01101, 0, "vcvt", "f32.u32", |
| 3206 | v2f32, v2i32, uint_to_fp>; |
Bob Wilson | 899588e | 2010-03-19 22:51:32 +0000 | [diff] [blame] | 3207 | def : N2VSPat<arm_uitof, f32, v2i32, VCVTu2fd_sfp>; |
David Goodwin | 4b358db | 2009-08-10 22:17:39 +0000 | [diff] [blame] | 3208 | |
Evan Cheng | 46961d8 | 2009-08-07 19:30:41 +0000 | [diff] [blame] | 3209 | //===----------------------------------------------------------------------===// |
Bob Wilson | e60fee0 | 2009-06-22 23:27:02 +0000 | [diff] [blame] | 3210 | // Non-Instruction Patterns |
| 3211 | //===----------------------------------------------------------------------===// |
| 3212 | |
| 3213 | // bit_convert |
| 3214 | def : Pat<(v1i64 (bitconvert (v2i32 DPR:$src))), (v1i64 DPR:$src)>; |
| 3215 | def : Pat<(v1i64 (bitconvert (v4i16 DPR:$src))), (v1i64 DPR:$src)>; |
| 3216 | def : Pat<(v1i64 (bitconvert (v8i8 DPR:$src))), (v1i64 DPR:$src)>; |
| 3217 | def : Pat<(v1i64 (bitconvert (f64 DPR:$src))), (v1i64 DPR:$src)>; |
| 3218 | def : Pat<(v1i64 (bitconvert (v2f32 DPR:$src))), (v1i64 DPR:$src)>; |
| 3219 | def : Pat<(v2i32 (bitconvert (v1i64 DPR:$src))), (v2i32 DPR:$src)>; |
| 3220 | def : Pat<(v2i32 (bitconvert (v4i16 DPR:$src))), (v2i32 DPR:$src)>; |
| 3221 | def : Pat<(v2i32 (bitconvert (v8i8 DPR:$src))), (v2i32 DPR:$src)>; |
| 3222 | def : Pat<(v2i32 (bitconvert (f64 DPR:$src))), (v2i32 DPR:$src)>; |
| 3223 | def : Pat<(v2i32 (bitconvert (v2f32 DPR:$src))), (v2i32 DPR:$src)>; |
| 3224 | def : Pat<(v4i16 (bitconvert (v1i64 DPR:$src))), (v4i16 DPR:$src)>; |
| 3225 | def : Pat<(v4i16 (bitconvert (v2i32 DPR:$src))), (v4i16 DPR:$src)>; |
| 3226 | def : Pat<(v4i16 (bitconvert (v8i8 DPR:$src))), (v4i16 DPR:$src)>; |
| 3227 | def : Pat<(v4i16 (bitconvert (f64 DPR:$src))), (v4i16 DPR:$src)>; |
| 3228 | def : Pat<(v4i16 (bitconvert (v2f32 DPR:$src))), (v4i16 DPR:$src)>; |
| 3229 | def : Pat<(v8i8 (bitconvert (v1i64 DPR:$src))), (v8i8 DPR:$src)>; |
| 3230 | def : Pat<(v8i8 (bitconvert (v2i32 DPR:$src))), (v8i8 DPR:$src)>; |
| 3231 | def : Pat<(v8i8 (bitconvert (v4i16 DPR:$src))), (v8i8 DPR:$src)>; |
| 3232 | def : Pat<(v8i8 (bitconvert (f64 DPR:$src))), (v8i8 DPR:$src)>; |
| 3233 | def : Pat<(v8i8 (bitconvert (v2f32 DPR:$src))), (v8i8 DPR:$src)>; |
| 3234 | def : Pat<(f64 (bitconvert (v1i64 DPR:$src))), (f64 DPR:$src)>; |
| 3235 | def : Pat<(f64 (bitconvert (v2i32 DPR:$src))), (f64 DPR:$src)>; |
| 3236 | def : Pat<(f64 (bitconvert (v4i16 DPR:$src))), (f64 DPR:$src)>; |
| 3237 | def : Pat<(f64 (bitconvert (v8i8 DPR:$src))), (f64 DPR:$src)>; |
| 3238 | def : Pat<(f64 (bitconvert (v2f32 DPR:$src))), (f64 DPR:$src)>; |
| 3239 | def : Pat<(v2f32 (bitconvert (f64 DPR:$src))), (v2f32 DPR:$src)>; |
| 3240 | def : Pat<(v2f32 (bitconvert (v1i64 DPR:$src))), (v2f32 DPR:$src)>; |
| 3241 | def : Pat<(v2f32 (bitconvert (v2i32 DPR:$src))), (v2f32 DPR:$src)>; |
| 3242 | def : Pat<(v2f32 (bitconvert (v4i16 DPR:$src))), (v2f32 DPR:$src)>; |
| 3243 | def : Pat<(v2f32 (bitconvert (v8i8 DPR:$src))), (v2f32 DPR:$src)>; |
| 3244 | |
| 3245 | def : Pat<(v2i64 (bitconvert (v4i32 QPR:$src))), (v2i64 QPR:$src)>; |
| 3246 | def : Pat<(v2i64 (bitconvert (v8i16 QPR:$src))), (v2i64 QPR:$src)>; |
| 3247 | def : Pat<(v2i64 (bitconvert (v16i8 QPR:$src))), (v2i64 QPR:$src)>; |
| 3248 | def : Pat<(v2i64 (bitconvert (v2f64 QPR:$src))), (v2i64 QPR:$src)>; |
| 3249 | def : Pat<(v2i64 (bitconvert (v4f32 QPR:$src))), (v2i64 QPR:$src)>; |
| 3250 | def : Pat<(v4i32 (bitconvert (v2i64 QPR:$src))), (v4i32 QPR:$src)>; |
| 3251 | def : Pat<(v4i32 (bitconvert (v8i16 QPR:$src))), (v4i32 QPR:$src)>; |
| 3252 | def : Pat<(v4i32 (bitconvert (v16i8 QPR:$src))), (v4i32 QPR:$src)>; |
| 3253 | def : Pat<(v4i32 (bitconvert (v2f64 QPR:$src))), (v4i32 QPR:$src)>; |
| 3254 | def : Pat<(v4i32 (bitconvert (v4f32 QPR:$src))), (v4i32 QPR:$src)>; |
| 3255 | def : Pat<(v8i16 (bitconvert (v2i64 QPR:$src))), (v8i16 QPR:$src)>; |
| 3256 | def : Pat<(v8i16 (bitconvert (v4i32 QPR:$src))), (v8i16 QPR:$src)>; |
| 3257 | def : Pat<(v8i16 (bitconvert (v16i8 QPR:$src))), (v8i16 QPR:$src)>; |
| 3258 | def : Pat<(v8i16 (bitconvert (v2f64 QPR:$src))), (v8i16 QPR:$src)>; |
| 3259 | def : Pat<(v8i16 (bitconvert (v4f32 QPR:$src))), (v8i16 QPR:$src)>; |
| 3260 | def : Pat<(v16i8 (bitconvert (v2i64 QPR:$src))), (v16i8 QPR:$src)>; |
| 3261 | def : Pat<(v16i8 (bitconvert (v4i32 QPR:$src))), (v16i8 QPR:$src)>; |
| 3262 | def : Pat<(v16i8 (bitconvert (v8i16 QPR:$src))), (v16i8 QPR:$src)>; |
| 3263 | def : Pat<(v16i8 (bitconvert (v2f64 QPR:$src))), (v16i8 QPR:$src)>; |
| 3264 | def : Pat<(v16i8 (bitconvert (v4f32 QPR:$src))), (v16i8 QPR:$src)>; |
| 3265 | def : Pat<(v4f32 (bitconvert (v2i64 QPR:$src))), (v4f32 QPR:$src)>; |
| 3266 | def : Pat<(v4f32 (bitconvert (v4i32 QPR:$src))), (v4f32 QPR:$src)>; |
| 3267 | def : Pat<(v4f32 (bitconvert (v8i16 QPR:$src))), (v4f32 QPR:$src)>; |
| 3268 | def : Pat<(v4f32 (bitconvert (v16i8 QPR:$src))), (v4f32 QPR:$src)>; |
| 3269 | def : Pat<(v4f32 (bitconvert (v2f64 QPR:$src))), (v4f32 QPR:$src)>; |
| 3270 | def : Pat<(v2f64 (bitconvert (v2i64 QPR:$src))), (v2f64 QPR:$src)>; |
| 3271 | def : Pat<(v2f64 (bitconvert (v4i32 QPR:$src))), (v2f64 QPR:$src)>; |
| 3272 | def : Pat<(v2f64 (bitconvert (v8i16 QPR:$src))), (v2f64 QPR:$src)>; |
| 3273 | def : Pat<(v2f64 (bitconvert (v16i8 QPR:$src))), (v2f64 QPR:$src)>; |
| 3274 | def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>; |