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Channagoud Kadabif8ad8e72015-01-06 15:10:13 -08001/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
Channagoud Kadabied60a8b2014-06-27 15:35:09 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <platform/irqs.h>
32#include <platform/gpio.h>
33#include <reg.h>
34#include <target.h>
35#include <platform.h>
36#include <dload_util.h>
37#include <uart_dm.h>
38#include <mmc.h>
39#include <spmi.h>
40#include <board.h>
41#include <smem.h>
42#include <baseband.h>
Sridhar Parasuramd75ade52015-03-09 15:45:16 -070043#include <regulator.h>
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070044#include <dev/keys.h>
45#include <pm8x41.h>
46#include <crypto5_wrapper.h>
47#include <clock.h>
48#include <partition_parser.h>
49#include <scm.h>
50#include <platform/clock.h>
51#include <platform/gpio.h>
52#include <platform/timer.h>
53#include <stdlib.h>
54#include <ufs.h>
55#include <boot_device.h>
56#include <qmp_phy.h>
Channagoud Kadabi7d308202014-12-22 12:07:04 -080057#include <sdhci_msm.h>
58#include <qusb2_phy.h>
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -080059#include <rpmb.h>
Sridhar Parasuram9f28f672015-03-17 15:40:47 -070060#include <rpm-glink.h>
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -070061#if ENABLE_WBC
62#include <pm_app_smbchg.h>
63#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070064
c_wufengf433f232015-09-21 15:21:21 +080065#if LONG_PRESS_POWER_ON
66#include <shutdown_detect.h>
67#endif
68
c_wufeng196210d2015-09-21 12:49:43 +080069#if PON_VIB_SUPPORT
70#include <vibrator.h>
71#define VIBRATE_TIME 250
72#endif
c_wufengf433f232015-09-21 15:21:21 +080073
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080074#define CE_INSTANCE 1
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -070075#define CE_EE 0
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080076#define CE_FIFO_SIZE 64
77#define CE_READ_PIPE 3
78#define CE_WRITE_PIPE 2
79#define CE_READ_PIPE_LOCK_GRP 0
80#define CE_WRITE_PIPE_LOCK_GRP 0
81#define CE_ARRAY_SIZE 20
82
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070083#define PMIC_ARB_CHANNEL_NUM 0
84#define PMIC_ARB_OWNER_ID 0
85
86static void set_sdc_power_ctrl(void);
87static uint32_t mmc_pwrctl_base[] =
88 { MSM_SDC1_BASE, MSM_SDC2_BASE };
89
90static uint32_t mmc_sdhci_base[] =
91 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
92
93static uint32_t mmc_sdc_pwrctl_irq[] =
94 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
95
96struct mmc_device *dev;
97struct ufs_dev ufs_device;
98
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070099void target_early_init(void)
100{
101#if WITH_DEBUG_UART
Channagoud Kadabi35503c42014-11-14 16:22:43 -0800102 uart_dm_init(8, 0, BLSP2_UART1_BASE);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700103#endif
104}
105
106/* Return 1 if vol_up pressed */
Amit Blay6a3e88b2015-06-23 22:25:06 +0300107int target_volume_up()
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700108{
109 uint8_t status = 0;
110 struct pm8x41_gpio gpio;
111
112 /* Configure the GPIO */
113 gpio.direction = PM_GPIO_DIR_IN;
114 gpio.function = 0;
115 gpio.pull = PM_GPIO_PULL_UP_30;
116 gpio.vin_sel = 2;
117
118 pm8x41_gpio_config(2, &gpio);
119
120 /* Wait for the pmic gpio config to take effect */
121 thread_sleep(1);
122
123 /* Get status of P_GPIO_5 */
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800124 pm8x41_gpio_get(2, &status);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700125
126 return !status; /* active low */
127}
128
129/* Return 1 if vol_down pressed */
130uint32_t target_volume_down()
131{
132 return pm8x41_resin_status();
133}
134
135static void target_keystatus()
136{
137 keys_init();
138
139 if(target_volume_down())
140 keys_post_event(KEY_VOLUMEDOWN, 1);
141
142 if(target_volume_up())
143 keys_post_event(KEY_VOLUMEUP, 1);
144}
145
146void target_uninit(void)
147{
148 if (platform_boot_dev_isemmc())
149 {
150 mmc_put_card_to_sleep(dev);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700151 }
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800152
153 if (is_sec_app_loaded())
154 {
155 if (unload_sec_app() < 0)
156 {
157 dprintf(CRITICAL, "Failed to unload App for rpmb\n");
158 ASSERT(0);
159 }
160 }
161
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700162#if ENABLE_WBC
Channagoud Kadabi22165612015-07-22 14:04:37 -0700163 if (board_hardware_id() == HW_PLATFORM_MTP)
164 pm_appsbl_set_dcin_suspend(1);
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700165#endif
166
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700167
168 if (crypto_initialized())
169 {
170 crypto_eng_cleanup();
171 clock_ce_disable(CE_INSTANCE);
172 }
173
Sridhar Parasuram9f28f672015-03-17 15:40:47 -0700174 /* Tear down glink channels */
175 rpm_glink_uninit();
176
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800177 if (rpmb_uninit() < 0)
178 {
179 dprintf(CRITICAL, "RPMB uninit failed\n");
180 ASSERT(0);
181 }
182
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700183}
184
185static void set_sdc_power_ctrl()
186{
187 /* Drive strength configs for sdc pins */
188 struct tlmm_cfgs sdc1_hdrv_cfg[] =
189 {
190 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
191 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
192 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
193 };
194
195 /* Pull configs for sdc pins */
196 struct tlmm_cfgs sdc1_pull_cfg[] =
197 {
198 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
199 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
200 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
201 };
202
203 struct tlmm_cfgs sdc1_rclk_cfg[] =
204 {
205 { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
206 };
207
208 /* Set the drive strength & pull control values */
209 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
210 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
211 tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg));
212}
213
c_wufengf433f232015-09-21 15:21:21 +0800214uint32_t target_is_pwrkey_pon_reason()
215{
216 uint8_t pon_reason = pm8950_get_pon_reason();
217 if (pm8x41_get_is_cold_boot() && ((pon_reason == KPDPWR_N) || (pon_reason == (KPDPWR_N|PON1))))
218 return 1;
219 else
220 return 0;
221}
222
223
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700224void target_sdc_init()
225{
226 struct mmc_config_data config = {0};
227
228 /* Set drive strength & pull ctrl values */
229 set_sdc_power_ctrl();
230
231 config.bus_width = DATA_BUS_WIDTH_8BIT;
232 config.max_clk_rate = MMC_CLK_192MHZ;
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800233 config.hs400_support = 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700234
235 /* Try slot 1*/
236 config.slot = 1;
237 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
238 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
239 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
240
241 if (!(dev = mmc_init(&config)))
242 {
243 /* Try slot 2 */
244 config.slot = 2;
245 config.max_clk_rate = MMC_CLK_200MHZ;
246 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
247 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
248 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
249
250 if (!(dev = mmc_init(&config)))
251 {
252 dprintf(CRITICAL, "mmc init failed!");
253 ASSERT(0);
254 }
255 }
256}
257
258void *target_mmc_device()
259{
260 if (platform_boot_dev_isemmc())
261 return (void *) dev;
262 else
263 return (void *) &ufs_device;
264}
265
266void target_init(void)
267{
268 dprintf(INFO, "target_init()\n");
269
Sridhar Parasuram1d224322015-06-15 11:03:40 -0700270 pmic_info_populate();
271
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700272 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
273
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700274 /* Initialize Glink */
275 rpm_glink_init();
276
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700277 target_keystatus();
c_wufeng196210d2015-09-21 12:49:43 +0800278
c_wufengf433f232015-09-21 15:21:21 +0800279#if defined(LONG_PRESS_POWER_ON) || defined(PON_VIB_SUPPORT)
280 switch(board_hardware_id())
281 {
282 case HW_PLATFORM_QRD:
283#if LONG_PRESS_POWER_ON
284 shutdown_detect();
285#endif
c_wufeng196210d2015-09-21 12:49:43 +0800286#if PON_VIB_SUPPORT
287 vib_timed_turn_on(VIBRATE_TIME);
288#endif
c_wufengf433f232015-09-21 15:21:21 +0800289 break;
290 }
291#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700292
293 if (target_use_signed_kernel())
294 target_crypto_init_params();
295
296 platform_read_boot_config();
297
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800298#ifdef MMC_SDHCI_SUPPORT
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700299 if (platform_boot_dev_isemmc())
300 {
301 target_sdc_init();
302 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800303#endif
304#ifdef UFS_SUPPORT
305 if (!platform_boot_dev_isemmc())
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700306 {
307 ufs_device.base = UFS_BASE;
308 ufs_init(&ufs_device);
309 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800310#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700311
312 /* Storage initialization is complete, read the partition table info */
Channagoud Kadabi58a273b2015-02-10 12:56:22 -0800313 mmc_read_partition_table(0);
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800314
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700315#if ENABLE_WBC
316 /* Look for battery voltage and make sure we have enough to bootup
317 * Otherwise initiate battery charging
318 * Charging should happen as early as possible, any other driver
319 * initialization before this should consider the power impact
320 */
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700321 switch(board_hardware_id())
322 {
323 case HW_PLATFORM_MTP:
324 case HW_PLATFORM_FLUID:
325 pm_appsbl_chg_check_weak_battery_status(1);
326 break;
327 default:
328 /* Charging not supported */
329 break;
330 };
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700331#endif
332
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800333 if (rpmb_init() < 0)
334 {
335 dprintf(CRITICAL, "RPMB init failed\n");
336 ASSERT(0);
337 }
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700338}
339
340unsigned board_machtype(void)
341{
342 return LINUX_MACHTYPE_UNKNOWN;
343}
344
345/* Detect the target type */
346void target_detect(struct board_data *board)
347{
348 /* This is filled from board.c */
349}
350
Dhaval Patelb95039c2015-03-16 11:14:06 -0700351static uint8_t splash_override;
352/* Returns 1 if target supports continuous splash screen. */
353int target_cont_splash_screen()
354{
355 uint8_t splash_screen = 0;
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700356 if(!splash_override && !pm_appsbl_charging_in_progress()) {
Dhaval Patelb95039c2015-03-16 11:14:06 -0700357 switch(board_hardware_id())
358 {
359 case HW_PLATFORM_SURF:
360 case HW_PLATFORM_MTP:
361 case HW_PLATFORM_FLUID:
feifanz76fe6482015-09-02 15:25:16 +0800362 case HW_PLATFORM_QRD:
Dhaval Patelb95039c2015-03-16 11:14:06 -0700363 dprintf(SPEW, "Target_cont_splash=1\n");
364 splash_screen = 1;
365 break;
366 default:
367 dprintf(SPEW, "Target_cont_splash=0\n");
368 splash_screen = 0;
369 }
370 }
371 return splash_screen;
372}
373
374void target_force_cont_splash_disable(uint8_t override)
375{
376 splash_override = override;
377}
378
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700379/* Detect the modem type */
380void target_baseband_detect(struct board_data *board)
381{
382 uint32_t platform;
383
384 platform = board->platform;
385
386 switch(platform) {
Channagoud Kadabi439df822015-05-26 11:14:16 -0700387 case APQ8096:
388 board->baseband = BASEBAND_APQ;
389 break;
Channagoud Kadabi4a4c05e2015-03-30 15:18:58 -0700390 case MSM8996:
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800391 if (board->platform_version == 0x10000)
392 board->baseband = BASEBAND_APQ;
393 else
394 board->baseband = BASEBAND_MSM;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700395 break;
396 default:
397 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
398 ASSERT(0);
399 };
400}
401unsigned target_baseband()
402{
403 return board_baseband();
404}
405
406void target_serialno(unsigned char *buf)
407{
408 unsigned int serialno;
409 if (target_is_emmc_boot()) {
410 serialno = mmc_get_psn();
411 snprintf((char *)buf, 13, "%x", serialno);
412 }
413}
414
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700415int emmc_recovery_init(void)
416{
417 return _emmc_recovery_init();
418}
419
420void target_usb_phy_reset()
421{
422 usb30_qmp_phy_reset();
423 qusb2_phy_reset();
424}
425
426target_usb_iface_t* target_usb30_init()
427{
428 target_usb_iface_t *t_usb_iface;
429
430 t_usb_iface = calloc(1, sizeof(target_usb_iface_t));
431 ASSERT(t_usb_iface);
432
433 t_usb_iface->phy_init = usb30_qmp_phy_init;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700434 t_usb_iface->phy_reset = target_usb_phy_reset;
435 t_usb_iface->clock_init = clock_usb30_init;
436 t_usb_iface->vbus_override = 1;
437
438 return t_usb_iface;
439}
440
441/* identify the usb controller to be used for the target */
442const char * target_usb_controller()
443{
444 return "dwc";
445}
446
447uint32_t target_override_pll()
448{
Channagoud Kadabi1e5144b2015-04-28 17:15:05 -0700449 if (board_soc_version() >= 0x20000)
450 return 0;
451 else
452 return 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700453}
454
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800455crypto_engine_type board_ce_type(void)
456{
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700457 return CRYPTO_ENGINE_TYPE_HW;
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800458}
459
460/* Set up params for h/w CE. */
461void target_crypto_init_params()
462{
463 struct crypto_init_params ce_params;
464
465 /* Set up base addresses and instance. */
466 ce_params.crypto_instance = CE_INSTANCE;
467 ce_params.crypto_base = MSM_CE_BASE;
468 ce_params.bam_base = MSM_CE_BAM_BASE;
469
470 /* Set up BAM config. */
471 ce_params.bam_ee = CE_EE;
472 ce_params.pipes.read_pipe = CE_READ_PIPE;
473 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
474 ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
475 ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
476
477 /* Assign buffer sizes. */
478 ce_params.num_ce = CE_ARRAY_SIZE;
479 ce_params.read_fifo_size = CE_FIFO_SIZE;
480 ce_params.write_fifo_size = CE_FIFO_SIZE;
481
482 /* BAM is initialized by TZ for this platform.
483 * Do not do it again as the initialization address space
484 * is locked.
485 */
486 ce_params.do_bam_init = 0;
487
488 crypto_init_params(&ce_params);
489}
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700490
491unsigned target_pause_for_battery_charge(void)
492{
493 uint8_t pon_reason = pm8x41_get_pon_reason();
494 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
495 dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
496 pon_reason, is_cold_boot);
497 /* In case of fastboot reboot,adb reboot or if we see the power key
498 * pressed we do not want go into charger mode.
499 * fastboot reboot is warm boot with PON hard reset bit not set
500 * adb reboot is a cold boot with PON hard reset bit set
501 */
502 if (is_cold_boot &&
503 (!(pon_reason & HARD_RST)) &&
504 (!(pon_reason & KPDPWR_N)) &&
505 ((pon_reason & PON1)))
506 return 1;
507 else
508 return 0;
509}
Channagoud Kadabi23edc0c2015-03-27 18:31:32 -0700510
511int set_download_mode(enum dload_mode mode)
512{
513 int ret = 0;
514 ret = scm_dload_mode(mode);
515
516 return ret;
517}
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700518
Channagoud Kadabi65b518d2015-08-05 16:17:14 -0700519void pmic_reset_configure(uint8_t reset_type)
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700520{
Channagoud Kadabi65b518d2015-08-05 16:17:14 -0700521 pm8994_reset_configure(reset_type);
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700522}