blob: 5788bb754ba74fd76df6d302af0cc0d2ae678502 [file] [log] [blame]
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
39
40extern void clock_init_mmc(uint32_t);
41extern void clock_config_mmc(uint32_t, uint32_t);
42
43/* data access time unit in ns */
44static const uint32_t taac_unit[] =
45{
46 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
47};
48
49/* data access time value x 10 */
50static const uint32_t taac_value[] =
51{
52 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
53};
54
55/* data transfer rate in kbit/s */
56static const uint32_t xfer_rate_unit[] =
57{
58 100, 1000, 10000, 100000, 0, 0, 0, 0
59};
60
61/* data transfer rate value x 10*/
62static const uint32_t xfer_rate_value[] =
63{
64 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
65};
66
67/*
68 * Function: mmc decode and save csd
69 * Arg : Card structure & raw csd
70 * Return : 0 on Success, 1 on Failure
71 * Flow : Decodes CSD response received from the card.
72 * Note that we have defined only few of the CSD elements
73 * in csd structure. We'll only decode those values.
74 */
75static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
76{
77 uint32_t mmc_sizeof = 0;
78 uint32_t mmc_unit = 0;
79 uint32_t mmc_value = 0;
80 uint32_t mmc_temp = 0;
81 uint32_t *raw_csd = card->raw_csd;
82
83 struct mmc_csd mmc_csd;
84
85 mmc_sizeof = sizeof(uint32_t) * 8;
86
87 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
88
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070089 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070090 /* Parse CSD according to SD card spec. */
91
92 /* CSD register is little bit differnet for CSD version 2.0 High
93 * Capacity and CSD version 1.0/2.0 Standard memory cards.
94 * In Version 2.0 some of the fields have fixed values and it's
95 * not necessary for host to refer these fields in CSD sent by
96 * card
97 */
98
99 if (mmc_csd.cmmc_structure == 1) {
100 /* CSD Version 2.0 */
101 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
102 /* Fixed value is 9 = 2^9 = 512 */
103 mmc_csd.write_blk_len = 512;
104 /* Fixed value is 9 = 512 */
105 mmc_csd.read_blk_len = 512;
106 /* Fixed value: 010b */
107 mmc_csd.r2w_factor = 0x2;
108 /* Not there in version 2.0 */
109 mmc_csd.c_size_mult = 0;
110 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
111 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
112 * 100;
113
114 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
115 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
116 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
117 / 10;
118
119 mmc_csd.erase_blk_len = 1;
120 mmc_csd.read_blk_misalign = 0;
121 mmc_csd.write_blk_misalign = 0;
122 mmc_csd.read_blk_partial = 0;
123 mmc_csd.write_blk_partial = 0;
124
125 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
126 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
127 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
128 xfer_rate_unit[mmc_unit]) / 10;
129
130 mmc_csd.wp_grp_size = 0x0;
131 mmc_csd.wp_grp_enable = 0x0;
132 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
133 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
134
135 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700136 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700137 } else {
138 /* CSD Version 1.0 */
139 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
140
141 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
142 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
143 (1 << mmc_temp) : 512;
144
145 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
146 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
147 (1 << mmc_temp) : 512;
148
149 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
150 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
151 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
152 / 10;
153
154 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
155 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
156 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
157 xfer_rate_unit[mmc_unit]) / 10;
158
159 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
160 * 100;
161
162 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
163 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
164
165 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
166 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
167 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
168 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
169 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
170
171 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
172 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
173 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
174 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
175 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
176 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
177
178 /* Calculate the card capacity */
179 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700180 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700181 }
182 } else {
183 /* Parse CSD according to MMC card spec. */
184 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
185 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
186 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
187 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
188 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
189 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
190 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
191 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
192
193 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
194 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
195 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
196
197 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
198 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
199 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
200 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
201
202 /* Ignore -- no use of this value. */
203 mmc_csd.tran_speed = 0x00;
204
205 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
206 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
207 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
208 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
209 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
210 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
211
212 /* Calculate the card capcity */
213 if (mmc_csd.c_size != 0xFFF) {
214 /* For cards less than or equal to 2GB */
215 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700216 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700217 } else {
218 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
219 * is used to calculate the size.
220 */
221 uint64_t sec_count;
222
223 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
224 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
226 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700227 card->capacity = sec_count * MMC_BLK_SZ;
228 }
229 }
230
231 /* save the information in card structure */
232 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
233 sizeof(struct mmc_csd));
234
vijay kumar697dbfd2014-04-24 17:12:49 +0530235 /* Calculate the wp grp size */
236 if (card->ext_csd[MMC_ERASE_GRP_DEF])
237 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
238 else
239 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
240 * (card->csd.erase_grp_mult + 1);
241
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700242 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700243 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700244 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700245 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
246 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
247 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
248 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
249 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
250 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
251 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
252 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
253 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
254 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
255 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
256 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
257 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
258 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530259 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700260 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
261
262 return 0;
263}
264
265/*
266 * Function: mmc decode & save cid
267 * Arg : card structure & raw cid
268 * Return : 0 on Success, 1 on Failure
269 * Flow : Decode CID sent by the card.
270 */
271static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
272 uint32_t *raw_cid)
273{
274 struct mmc_cid mmc_cid;
275 uint32_t mmc_sizeof = 0;
276 int i = 0;
277
278 if (!raw_cid) {
279 return 1;
280 }
281
282 mmc_sizeof = sizeof(uint32_t) * 8;
283
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700284 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700285 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
286 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
287
288 for (i = 0; i < 5; i++) {
289 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
290 (104 - 8 * (i + 1)),
291 8,
292 mmc_sizeof);
293 }
294 mmc_cid.pnm[5] = 0;
295 mmc_cid.pnm[6] = 0;
296
297 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700298 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700299 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
300 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
301 mmc_cid.year += 2000;
302 } else {
303 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
304 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
305
306 for (i = 0; i < 6; i++) {
307 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
308 8, mmc_sizeof);
309 }
310 mmc_cid.pnm[6] = 0;
311
312 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700313 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700314 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
315 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
316 mmc_cid.year += 1997;
317 }
318
319 /* save it in card database */
320 memcpy((struct mmc_cid *)&card->cid,
321 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
322
323 dprintf(SPEW, "Decoded CID fields:\n");
324 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
325 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
326 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
327 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
328 (mmc_cid.prv & 0xF));
329 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
330 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
331
332 return 0;
333}
334
335/*
336 * Function: mmc reset cards
337 * Arg : host structure
338 * Return : 0 on Success, 1 on Failure
339 * Flow : Reset all the cards to idle condition (CMD 0)
340 */
341static uint8_t mmc_reset_card(struct sdhci_host *host)
342{
343 struct mmc_command cmd;
344
345 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
346
347 cmd.cmd_index = CMD0_GO_IDLE_STATE;
348 cmd.argument = 0;
349 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
350 cmd.resp_type = SDHCI_CMD_RESP_NONE;
351
352 /* send command */
353 return sdhci_send_command(host, &cmd);
354}
355
356/*
357 * Function: mmc operations command
358 * Arg : host & card structure
359 * Return : 0 on Success, 1 on Failure
360 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
361 */
362static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
363{
364 struct mmc_command cmd;
365 uint32_t mmc_resp = 0;
366 uint32_t mmc_ret = 0;
367 uint32_t mmc_retry = 0;
368
369 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
370
371 /* CMD1 format:
372 * [31] Busy bit
373 * [30:29] Access mode
374 * [28:24] reserved
375 * [23:15] 2.7-3.6
376 * [14:8] 2.0-2.6
377 * [7] 1.7-1.95
378 * [6:0] reserved
379 */
380
381 cmd.cmd_index = CMD1_SEND_OP_COND;
382 cmd.argument = card->ocr;
383 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
384 cmd.resp_type = SDHCI_CMD_RESP_R3;
385
386 do {
387 mmc_ret = sdhci_send_command(host, &cmd);
388 if (mmc_ret)
389 return mmc_ret;
390
391 /* Command returned success, now it's time to examine response */
392 mmc_resp = cmd.resp[0];
393
394 /* Check the response for busy status */
395 if (!(mmc_resp & MMC_OCR_BUSY)) {
396 mmc_retry++;
397 mdelay(1);
398 continue;
399 } else
400 break;
401 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
402
403 /* If we reached here after max retries, we failed to get OCR */
404 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
405 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
406 return 1;
407 }
408
409 /* Response contains card's ocr. Update card's information */
410 card->ocr = mmc_resp;
411
412 if (mmc_resp & MMC_OCR_SEC_MODE)
413 card->type = MMC_TYPE_MMCHC;
414 else
415 card->type = MMC_TYPE_STD_MMC;
416
417 return 0;
418}
419
420/*
421 * Function: mmc send cid
422 * Arg : host & card structure
423 * Return : 0 on Success, 1 on Failure
424 * Flow : Request any card to send its uniquie card identification
425 * (CID) number (CMD2).
426 */
427static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
428{
429 struct mmc_command cmd;
430 uint32_t mmc_ret = 0;
431
432 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
433
434 /* CMD2 Format:
435 * [31:0] stuff bits
436 */
437 cmd.cmd_index = CMD2_ALL_SEND_CID;
438 cmd.argument = 0;
439 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
440 cmd.resp_type = SDHCI_CMD_RESP_R2;
441
442 /* send command */
443 mmc_ret = sdhci_send_command(host, &cmd);
444 if (mmc_ret) {
445 return mmc_ret;
446 }
447
448 /* Response contains card's 128 bits CID register */
449 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
450 if (mmc_ret) {
451 return mmc_ret;
452 }
453
454 return 0;
455}
456
457/*
458 * Function: mmc send relative address
459 * Arg : host & card structure
460 * Return : 0 on Success, 1 on Failure
461 * Flow : Ask card to send it's relative card address (RCA).
462 * This RCA number is shorter than CID and is used by
463 * the host to address the card in future (CMD3)
464 */
465static uint32_t mmc_send_relative_address(struct sdhci_host *host,
466 struct mmc_card *card)
467{
468 struct mmc_command cmd;
469 uint32_t mmc_ret = 0;
470
471 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
472
473 /* CMD3 Format:
474 * [31:0] stuff bits
475 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700476 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700477 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
478 cmd.argument = 0;
479 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
480 cmd.resp_type = SDHCI_CMD_RESP_R6;
481
482 /* send command */
483 mmc_ret = sdhci_send_command(host, &cmd);
484 if (mmc_ret)
485 return mmc_ret;
486
487 /* For sD, card will send RCA. Store it */
488 card->rca = (cmd.resp[0] >> 16);
489 } else {
490 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
491 cmd.argument = (MMC_RCA << 16);
492 card->rca = (cmd.argument >> 16);
493 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
494 cmd.resp_type = SDHCI_CMD_RESP_R6;
495
496 /* send command */
497 mmc_ret = sdhci_send_command(host, &cmd);
498 if (mmc_ret)
499 return mmc_ret;
500 }
501
502 return 0;
503}
504
505/*
506 * Function: mmc send csd
507 * Arg : host, card structure & o/p arg to store csd
508 * Return : 0 on Success, 1 on Failure
509 * Flow : Requests card to send it's CSD register's contents. (CMD9)
510 */
511static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
512{
513 struct mmc_command cmd;
514 uint32_t mmc_arg = 0;
515 uint32_t mmc_ret = 0;
516
517 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
518
519 /* CMD9 Format:
520 * [31:16] RCA
521 * [15:0] stuff bits
522 */
523 mmc_arg |= card->rca << 16;
524
525 cmd.cmd_index = CMD9_SEND_CSD;
526 cmd.argument = mmc_arg;
527 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
528 cmd.resp_type = SDHCI_CMD_RESP_R2;
529
530 /* send command */
531 mmc_ret = sdhci_send_command(host, &cmd);
532 if (mmc_ret)
533 return mmc_ret;
534
535 /* response contains the card csd */
536 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
537
538 return 0;
539}
540
541/*
542 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700543 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700544 * Return : 0 on Success, 1 on Failure
545 * Flow : Selects a card by sending CMD7 to the card with its RCA.
546 * If RCA field is set as 0 ( or any other address ),
547 * the card will be de-selected. (CMD7)
548 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700549static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700550{
551 struct mmc_command cmd;
552 uint32_t mmc_arg = 0;
553 uint32_t mmc_ret = 0;
554
555 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
556
557 /* CMD7 Format:
558 * [31:16] RCA
559 * [15:0] stuff bits
560 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700561 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700562
563 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
564 cmd.argument = mmc_arg;
565 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
566
567 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700568 if (card->rca) {
569 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700570 cmd.resp_type = SDHCI_CMD_RESP_R1B;
571 else
572 cmd.resp_type = SDHCI_CMD_RESP_R1;
573 } else
574 cmd.resp_type = SDHCI_CMD_RESP_NONE;
575
576 /* send command */
577 mmc_ret = sdhci_send_command(host, &cmd);
578 if (mmc_ret)
579 return mmc_ret;
580
581 return 0;
582}
583
584/*
585 * Function: mmc set block len
586 * Arg : host, card structure & block length
587 * Return : 0 on Success, 1 on Failure
588 * Flow : Send command to set block length.
589 */
590static uint32_t mmc_set_block_len(struct sdhci_host *host,
591 struct mmc_card *card,
592 uint32_t block_len)
593{
594 struct mmc_command cmd;
595 uint32_t mmc_ret = 0;
596
597 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
598
599 /* CMD16 Format:
600 * [31:0] block length
601 */
602
603 cmd.cmd_index = CMD16_SET_BLOCKLEN;
604 cmd.argument = block_len;
605 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
606 cmd.resp_type = SDHCI_CMD_RESP_R1;
607
608 /* send command */
609 mmc_ret = sdhci_send_command(host, &cmd);
610 if (mmc_ret)
611 return mmc_ret;
612
613 /*
614 * If blocklength is larger than 512 bytes,
615 * the card sets BLOCK_LEN_ERROR bit.
616 */
617 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
618 dprintf(CRITICAL, "The block length is not supported by the card\n");
619 return 1;
620 }
621
622 return 0;
623}
624
625/*
626 * Function: mmc get card status
627 * Arg : host, card structure & o/p argument card status
628 * Return : 0 on Success, 1 on Failure
629 * Flow : Get the current status of the card
630 */
631static uint32_t mmc_get_card_status(struct sdhci_host *host,
632 struct mmc_card *card, uint32_t *status)
633{
634 struct mmc_command cmd;
635 uint32_t mmc_ret = 0;
636
637 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
638
639 /* CMD13 Format:
640 * [31:16] RCA
641 * [15:0] stuff bits
642 */
643 cmd.cmd_index = CMD13_SEND_STATUS;
644 cmd.argument = card->rca << 16;
645 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
646 cmd.resp_type = SDHCI_CMD_RESP_R1;
647
648 /* send command */
649 mmc_ret = sdhci_send_command(host, &cmd);
650 if (mmc_ret)
651 return mmc_ret;
652
653 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
654 if ((cmd.resp[0] >> 31) & 0x01)
655 return 1;
656
657 *status = cmd.resp[0];
658 return 0;
659}
660
661/*
662 * Function: mmc get ext csd
663 * Arg : host, card structure & array to hold ext attributes
664 * Return : 0 on Success, 1 on Failure
665 * Flow : Send ext csd command & get the card attributes
666 */
667static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
668{
669 struct mmc_command cmd;
670 uint32_t mmc_ret = 0;
671
672 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
673
674 ASSERT(card->ext_csd);
675
676 memset(card->ext_csd, 0, sizeof(card->ext_csd));
677
678 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
679
680 /* CMD8 */
681 cmd.cmd_index = CMD8_SEND_EXT_CSD;
682 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
683 cmd.resp_type = SDHCI_CMD_RESP_R1;
684 cmd.data.data_ptr = card->ext_csd;
685 cmd.data.num_blocks = 1;
686 cmd.data_present = 0x1;
687 cmd.trans_mode = SDHCI_MMC_READ;
688
689 /* send command */
690 mmc_ret = sdhci_send_command(host, &cmd);
691 if (mmc_ret)
692 return mmc_ret;
693
694 return mmc_ret;
695}
696
697/*
698 * Function: mmc switch command
699 * Arg : Host, card structure, access mode, index & value to be set
700 * Return : 0 on Success, 1 on Failure
701 * Flow : Send switch command to the card to set the ext attribute @ index
702 */
703static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
704 uint32_t access, uint32_t index, uint32_t value)
705{
706
707 struct mmc_command cmd;
708 uint32_t mmc_ret = 0;
709 uint32_t mmc_status;
710
711 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
712
713 /* CMD6 Format:
714 * [31:26] set to 0
715 * [25:24] access
716 * [23:16] index
717 * [15:8] value
718 * [7:3] set to 0
719 * [2:0] cmd set
720 */
721 cmd.cmd_index = CMD6_SWITCH_FUNC;
722 cmd.argument |= (access << 24);
723 cmd.argument |= (index << 16);
724 cmd.argument |= (value << 8);
725 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
726 cmd.resp_type = SDHCI_CMD_RESP_R1B;
727
728 mmc_ret = sdhci_send_command(host, &cmd);
729 if (mmc_ret) {
730 dprintf(CRITICAL, "CMD6 send failed\n");
731 return mmc_ret;
732 }
733
734 /* Check if the card completed the switch command processing */
735 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
736 if (mmc_ret) {
737 dprintf(CRITICAL, "Get card status failed\n");
738 return mmc_ret;
739 }
740
741 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700742 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700743 mmc_ret = 1;
744 }
745
746 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
747 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
748 mmc_ret = 1;
749 }
750
751 return mmc_ret;
752}
753
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700754bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
755{
756 uint32_t ret = 0;
757 bool drv_type_changed = false;
758
759 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
760
761 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type))
762 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
763 if (!ret)
764 drv_type_changed = true;
765
766 return drv_type_changed;
767}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700768/*
769 * Function: mmc set bus width
770 * Arg : Host, card structure & width
771 * Return : 0 on Success, 1 on Failure
772 * Flow : Send switch command to set bus width
773 */
774static uint32_t mmc_set_bus_width(struct sdhci_host *host,
775 struct mmc_card *card,
776 uint32_t width)
777{
778 uint32_t mmc_ret = 0;
779
780 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
781 MMC_EXT_MMC_BUS_WIDTH, width);
782
783 if (mmc_ret) {
784 dprintf(CRITICAL, "Switch cmd failed\n");
785 return mmc_ret;
786 }
787
788 return 0;
789}
790
791
792/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700793 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700794 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700795 * Return : 1 if hs400 mode is supported, 0 otherwise
796 * Flow : Check the ext csd attributes of the card
797 */
798static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
799{
800 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
801 return 1;
802 else
803 return 0;
804}
805
806/*
807 * Function: mmc card supports hs200 mode
808 * Arg : None
809 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700810 * Flow : Check the ext csd attributes of the card
811 */
812static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
813{
814 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
815 return 1;
816 else
817 return 0;
818}
819
820/*
821 * Function: mmc card supports ddr mode
822 * Arg : None
823 * Return : 1 if DDR mode is supported, 0 otherwise
824 * Flow : Check the ext csd attributes of the card
825 */
826static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
827{
828 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
829 return 1;
830 else
831 return 0;
832}
833
834/*
835 * Function : Enable HS200 mode
836 * Arg : Host, card structure and bus width
837 * Return : 0 on Success, 1 on Failure
838 * Flow :
839 * - Set the bus width to 4/8 bit SDR as supported by the target & host
840 * - Set the HS_TIMING on ext_csd 185 for the card
841 */
842static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
843 struct mmc_card *card, uint32_t width)
844{
845 uint32_t mmc_ret = 0;
846
Channagoud Kadabie632e252014-03-31 15:26:00 -0700847 DBG("\n Enabling HS200 Mode Start\n");
848
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700849 /* Set 4/8 bit SDR bus width */
850 mmc_ret = mmc_set_bus_width(host, card, width);
851 if (mmc_ret) {
852 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
853 card->rca);
854 return mmc_ret;
855 }
856
857 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
858 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
859
860 if (mmc_ret) {
861 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
862 return mmc_ret;
863 }
864
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800865 /* Enable SDR104 mode in controller */
866 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
867
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700868 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800869 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700870 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700871 /* Save the timing value, before changing the clock */
872 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700873 /*
874 * Set the MCI_CLK divider before changing the sdcc core
875 * core clk to ensure card receives no more than 200 MHZ
876 * clock frequency
877 */
878 sdhci_msm_set_mci_clk(host);
879 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700880 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700881
882 /* Execute Tuning for hs200 mode */
883 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
884 dprintf(CRITICAL, "Tuning for hs200 failed\n");
885
886 /* Once the tuning is executed revert back the clock to 200MHZ
887 * and disable the MCI_CLK divider so that we can use SDHC clock
888 * divider to supply clock to the card
889 */
890 if (host->timing == MMC_HS400_TIMING)
891 {
892 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
893 sdhci_msm_set_mci_clk(host);
894 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
895 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700896 else
897 {
898 /* Save the timing value, before changing the clock */
899 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
900 }
901
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700902
Channagoud Kadabie632e252014-03-31 15:26:00 -0700903 DBG("\n Enabling HS200 Mode Done\n");
904
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700905 return mmc_ret;
906}
907
908/*
909 * Function: mmc set ddr mode
910 * Arg : Host & card structure
911 * Return : 0 on Success, 1 on Failure
912 * Flow : Set bus width for ddr mode & set controller in DDR mode
913*/
914static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
915{
916 uint8_t mmc_ret = 0;
917
Channagoud Kadabie632e252014-03-31 15:26:00 -0700918 DBG("\n Enabling DDR Mode Start\n");
919
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700920 /* Set width for 8 bit DDR mode by default */
921 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
922
923 if (mmc_ret) {
924 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
925 card->rca);
926 return mmc_ret;
927 }
928
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700929 /* Save the timing value, before changing the clock */
930 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
931
932 /* Set the DDR mode in controller */
933 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700934
Channagoud Kadabie632e252014-03-31 15:26:00 -0700935 DBG("\n Enabling DDR Mode Done\n");
936
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700937 return 0;
938}
939
940/*
941 * Function: mmc set high speed interface
942 * Arg : Host & card structure
943 * Return : None
944 * Flow : Sets the sdcc clock & clock divider in the host controller
945 * Adjust the interface speed to optimal speed
946 */
947static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
948 struct mmc_card *card)
949{
950 uint32_t mmc_ret = 0;
951
952 /* Setting HS_TIMING in EXT_CSD (CMD6) */
953 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
954 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
955
956 if (mmc_ret) {
957 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
958 return mmc_ret;
959 }
960
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700961 /* Save the timing value, before changing the clock */
962 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
963
964 /* Set the SDR25 mode in controller */
965 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
966
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700967 return 0;
968}
969
970/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700971 * Function : Enable HS400 mode
972 * Arg : Host, card structure and bus width
973 * Return : 0 on Success, 1 on Failure
974 * Flow :
975 * - Set the bus width to 8 bit DDR
976 * - Set the HS_TIMING on ext_csd 185 for the card
977 */
978uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
979 struct mmc_card *card, uint32_t width)
980{
981 uint32_t mmc_ret = 0;
982
983 /*
984 * Emmc 5.0 spec does not allow changing to hs400 mode directly
985 * Need to follow the sequence to change to hs400 mode
986 * 1. Enable HS200 mode, perform tuning
987 * 2. Change to high speed mode
988 * 3. Enable DDR mode
989 * 4. Enable HS400 mode & execute tuning
990 */
991
Channagoud Kadabie632e252014-03-31 15:26:00 -0700992 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700993 /* HS400 mode is supported only in DDR 8-bit */
994 if (width != DATA_BUS_WIDTH_8BIT)
995 {
996 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
997 return 1;
998 }
999
1000 /* 1.Enable HS200 mode */
1001 mmc_ret = mmc_set_hs200_mode(host, card, width);
1002
1003 if (mmc_ret)
1004 {
1005 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1006 return mmc_ret;
1007 }
1008
1009 /* 2. Enable High speed mode */
1010 /* This is needed to set the clock to a low value &
1011 * so that we can switch to hs_timing --> 0x1 */
1012 /* Save the timing value, before changing the clock */
1013 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1014 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1015
1016 /* 3. Set HS_TIMING to 0x1 */
1017 mmc_ret = mmc_set_hs_interface(host, card);
1018 if (mmc_ret)
1019 {
1020 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1021 return mmc_ret;
1022 }
1023
1024 /*4. Enable DDR mode */
1025 mmc_ret = mmc_set_ddr_mode(host, card);
1026 if (mmc_ret)
1027 {
1028 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1029 return mmc_ret;
1030 }
1031
1032 /*5. Set hs400 timing */
1033 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1034
1035 if (mmc_ret)
1036 {
1037 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1038 return mmc_ret;
1039 }
1040
1041 /* 6. Enable SDR104 mode in controller */
1042 /* Save the timing value, before changing the clock */
1043 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1044 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001045 /*
1046 * Enable HS400 mode
1047 */
1048 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001049 /* Set the clock back to 400 MHZ */
1050 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001051
1052 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001053 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001054 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1055
Channagoud Kadabie632e252014-03-31 15:26:00 -07001056 DBG("\n Enabling HS400 Mode Done\n");
1057
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001058 return mmc_ret;
1059}
1060
1061/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001062 * Function: mmc_host_init
1063 * Arg : mmc device structure
1064 * Return : 0 on success, 1 on Failure
1065 * Flow : Initialize the host contoller
1066 * Set the clock rate to 400 KHZ for init
1067 */
1068static uint8_t mmc_host_init(struct mmc_device *dev)
1069{
1070 uint8_t mmc_ret = 0;
1071
1072 struct sdhci_host *host;
1073 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001074 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001075
1076 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001077
1078 host = &dev->host;
1079 cfg = &dev->config;
1080
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001081 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1082
1083 host->base = cfg->sdhc_base;
1084 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001085 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301086 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001087
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001088 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1089 ASSERT(data);
1090
1091 data->sdhc_event = &sdhc_event;
1092 data->pwrctl_base = cfg->pwrctl_base;
1093 data->pwr_irq = cfg->pwr_irq;
1094 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001095 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001096
1097 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001098
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001099 /* Initialize any clocks needed for SDC controller */
1100 clock_init_mmc(cfg->slot);
1101
1102 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1103
Channagoud Kadabie632e252014-03-31 15:26:00 -07001104 /* Configure the CDC clocks needed for emmc storage
1105 * we use slot '1' for emmc
1106 */
1107 if (cfg->slot == 1)
1108 clock_config_cdc(cfg->slot);
1109
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001110 /*
1111 * MSM specific sdhc init
1112 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001113 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001114
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001115 /*
1116 * Initialize the controller, read the host capabilities
1117 * set power on mode
1118 */
1119 sdhci_init(host);
1120
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001121 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001122 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1123
1124 return mmc_ret;
1125}
1126
1127/*
1128 * Function: mmc identify card
1129 * Arg : host & card structure
1130 * Return : 0 on Success, 1 on Failure
1131 * Flow : Performs card identification process:
1132 * 1. Get card's unique identification number (CID)
1133 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1134 * 3. Select the card to put it in TRAN state
1135 */
1136static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1137{
1138 uint32_t mmc_return = 0;
1139 uint32_t raw_csd[4];
1140
1141 /* Ask card to send its unique card identification (CID) number (CMD2) */
1142 mmc_return = mmc_all_send_cid(host, card);
1143 if (mmc_return) {
1144 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1145 return mmc_return;
1146 }
1147
1148 /* Ask card to send a relative card address (RCA) (CMD3) */
1149 mmc_return = mmc_send_relative_address(host, card);
1150 if (mmc_return) {
1151 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1152 return mmc_return;
1153 }
1154
1155 /* Get card's CSD register (CMD9) */
1156 mmc_return = mmc_send_csd(host, card);
1157 if (mmc_return) {
1158 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1159 return mmc_return;
1160 }
1161
1162 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001163 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001164 if (mmc_return) {
1165 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1166 return mmc_return;
1167 }
1168
1169 /* Set the card status as active */
1170 card->status = MMC_STATUS_ACTIVE;
1171
1172 return 0;
1173}
1174
1175/*
1176 * Function: mmc_reset_card_and_send_op
1177 * Arg : Host & Card structure
1178 * Return : 0 on Success, 1 on Failure
1179 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1180 * verify operating voltage and set the card in ready state.
1181 */
1182static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1183{
1184 uint32_t mmc_return = 0;
1185
1186 /* 1. Card Reset - CMD0 */
1187 mmc_return = mmc_reset_card(host);
1188 if (mmc_return) {
1189 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1190 return mmc_return;
1191 }
1192
1193 /* 2. Card Initialization process */
1194
1195 /*
1196 * Send CMD1 to identify and reject cards that do not match host's VDD range
1197 * profile. Cards sends its OCR register in response.
1198 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001199
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001200 mmc_return = mmc_send_op_cond(host, card);
1201
1202 /* OCR is not received, init could not complete */
1203 if (mmc_return) {
1204 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1205 return mmc_return;
1206 }
1207
1208 return 0;
1209}
1210
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001211static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1212{
1213 struct mmc_command cmd = {0};
1214
1215 cmd.cmd_index = CMD55_APP_CMD;
1216 cmd.argument = (card->rca << 16);
1217 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1218 cmd.resp_type = SDHCI_CMD_RESP_R1;
1219
1220 if (sdhci_send_command(host, &cmd))
1221 {
1222 dprintf(CRITICAL, "Failed Sending CMD55\n");
1223 return 1;
1224 }
1225 return 0;
1226}
1227
1228uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1229{
1230 uint8_t i;
1231 uint32_t mmc_ret;
1232 struct mmc_command cmd;
1233
1234 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1235
1236 /* Use the SD card RCA 0x0 during init */
1237 card->rca = SD_CARD_RCA;
1238
1239 /* Send CMD8 for voltage check*/
1240 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1241 {
1242 cmd.cmd_index = CMD8_SEND_IF_COND;
1243 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1244 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1245 cmd.resp_type = SDHCI_CMD_RESP_R7;
1246
1247 if (sdhci_send_command(host, &cmd))
1248 {
1249 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1250 return 1;
1251 }
1252 else
1253 {
1254 /* If the command response echos the voltage back */
1255 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1256 break;
1257 }
1258 /* As per SDCC the spec try for max three times with
1259 * 1 ms delay
1260 */
1261 mdelay(1);
1262 }
1263
1264 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1265 {
1266 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1267 return 1;
1268 }
1269
1270 /* Send ACMD41 for OCR */
1271 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1272 {
1273 /* Send APP_CMD before ACMD41*/
1274 if (mmc_send_app_cmd(host, card))
1275 {
1276 dprintf(CRITICAL, "Failed sending App command\n");
1277 return 1;
1278 }
1279
1280 /* APP_CMD is successful, send ACMD41 now */
1281 cmd.cmd_index = ACMD41_SEND_OP_COND;
1282 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1283 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1284 cmd.resp_type = SDHCI_CMD_RESP_R3;
1285
1286 if (sdhci_send_command(host, &cmd))
1287 {
1288 dprintf(CRITICAL, "Failure sending ACMD41\n");
1289 return 1;
1290 }
1291 else
1292 {
1293 if (cmd.resp[0] & MMC_SD_DEV_READY)
1294 {
1295 if (cmd.resp[0] & (1 << 30))
1296 card->type = MMC_CARD_TYPE_SDHC;
1297 else
1298 card->type = MMC_CARD_TYPE_STD_SD;
1299
1300 break;
1301 }
1302 }
1303 /*
1304 * As per SDCC spec try for max 1 second
1305 */
1306 mdelay(50);
1307 }
1308
1309 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1310 {
1311 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1312 return 1;
1313 }
1314
1315 return 0;
1316}
1317
1318/*
1319 * Function to read SD card information from SD status
1320 */
1321static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1322{
1323 BUF_DMA_ALIGN(raw_sd_status, 64);
1324 struct mmc_command cmd = {0};
1325 uint32_t sd_status[16];
1326 uint32_t *status = sd_status;
1327 uint32_t au_size;
1328 int i;
1329 int j;
1330
1331 if (mmc_send_app_cmd(host, card))
1332 {
1333 dprintf(CRITICAL, "Failed sending App command\n");
1334 return 1;
1335 }
1336
1337 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1338 cmd.argument = 0x0;
1339 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001340 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001341 cmd.trans_mode = SDHCI_MMC_READ;
1342 cmd.data_present = 0x1;
1343 cmd.data.data_ptr = raw_sd_status;
1344 cmd.data.num_blocks = 0x1;
1345 cmd.data.blk_sz = 0x40;
1346
1347 /* send command */
1348 if (sdhci_send_command(host, &cmd))
1349 return 1;
1350
1351 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1352
1353 for (i = 15, j = 0; i >=0 ; i--, j++)
1354 sd_status[i] = swap_endian32(sd_status[j]);
1355
1356 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1357 /* Card AU size in sectors */
1358 card->ssr.au_size = 1 << (au_size + 4);
1359 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1360
1361 return 0;
1362}
1363
1364/*
1365 * Function to read the SD CARD configuration register
1366 */
1367static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1368{
1369 BUF_DMA_ALIGN(scr_resp, 8);
1370 struct mmc_command cmd = {0};
1371 uint32_t raw_scr[2];
1372
1373 /* Now read the SCR register */
1374 /* Send APP_CMD before ACMD51*/
1375 if (mmc_send_app_cmd(host, card))
1376 {
1377 dprintf(CRITICAL, "Failed sending App command\n");
1378 return 1;
1379 }
1380
1381 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1382 cmd.argument = 0x0;
1383 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1384 cmd.resp_type = SDHCI_CMD_RESP_R1;
1385 cmd.trans_mode = SDHCI_MMC_READ;
1386 cmd.data_present = 0x1;
1387 cmd.data.data_ptr = scr_resp;
1388 cmd.data.num_blocks = 0x1;
1389 cmd.data.blk_sz = 0x8;
1390
1391 /* send command */
1392 if (sdhci_send_command(host, &cmd))
1393 return 1;
1394
1395 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1396
1397 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1398 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1399
1400 /*
1401 * Parse & Populate the SCR data as per sdcc spec
1402 */
1403 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1404 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1405 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1406 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1407
1408 return 0;
1409}
1410
1411/*
1412 * Function: mmc_set_sd_bus_width
1413 * Arg : host, device structure & width
1414 * Return : 0 on Success, 1 on Failure
1415 * Flow : Set the bus width for the card
1416 */
1417uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1418{
1419 struct mmc_command cmd = {0};
1420
1421 /* Send APP_CMD before ACMD6*/
1422 if (mmc_send_app_cmd(host, card))
1423 {
1424 dprintf(CRITICAL, "Failed sending App command\n");
1425 return 1;
1426 }
1427
1428 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1429 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1430 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1431 cmd.resp_type = SDHCI_CMD_RESP_R1;
1432
1433 /* send command */
1434 if (sdhci_send_command(host, &cmd))
1435 return 1;
1436
1437 return 0;
1438}
1439
1440uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1441{
1442 struct mmc_command cmd = {0};
1443 BUF_DMA_ALIGN(switch_resp, 64);
1444
1445 cmd.cmd_index = CMD6_SWITCH_FUNC;
1446 cmd.argument = MMC_SD_SWITCH_HS;
1447 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1448 cmd.resp_type = SDHCI_CMD_RESP_R1;
1449 cmd.trans_mode = SDHCI_MMC_READ;
1450 cmd.data_present = 0x1;
1451 cmd.data.data_ptr = switch_resp;
1452 cmd.data.num_blocks = 0x1;
1453 cmd.data.blk_sz = 0x40;
1454
1455 /* send command */
1456 if (sdhci_send_command(host, &cmd))
1457 return 1;
1458
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001459 /* Set the SDR25 mode in controller*/
1460 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1461
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001462 return 0;
1463}
1464
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001465/*
1466 * Function: mmc_init_card
1467 * Arg : mmc device structure
1468 * Return : 0 on Success, 1 on Failure
1469 * Flow : Performs initialization and identification of eMMC cards connected
1470 * to the host.
1471 */
1472
1473static uint32_t mmc_card_init(struct mmc_device *dev)
1474{
1475 uint32_t mmc_return = 0;
1476 uint32_t status;
1477 uint8_t bus_width = 0;
1478
1479 struct sdhci_host *host;
1480 struct mmc_card *card;
1481 struct mmc_config_data *cfg;
1482
1483 host = &dev->host;
1484 card = &dev->card;
1485 cfg = &dev->config;
1486
1487 /* Initialize MMC card structure */
1488 card->status = MMC_STATUS_INACTIVE;
1489
1490 /* TODO: Get the OCR params from target */
1491 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1492
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001493 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001494 mmc_return = mmc_reset_card_and_send_op(host, card);
1495 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001496 {
1497 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1498 /* Reset the card & get the OCR */
1499 mmc_return = mmc_sd_card_init(host, card);
1500 if (mmc_return)
1501 {
1502 dprintf(CRITICAL, "Failed to initialize SD card\n");
1503 return mmc_return;
1504 }
1505 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001506
1507 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1508 mmc_return = mmc_identify_card(host, card);
1509 if (mmc_return)
1510 return mmc_return;
1511
1512 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001513 if (MMC_CARD_SD(card))
1514 {
1515 mmc_return = mmc_sd_set_hs(host, card);
1516 if (mmc_return)
1517 {
1518 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1519 return mmc_return;
1520 }
1521 }
1522 else
1523 {
1524 mmc_return = mmc_set_hs_interface(host, card);
1525 if (mmc_return) {
1526 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1527 return mmc_return;
1528 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001529 }
1530
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001531 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001532 if (MMC_CARD_MMC(card))
1533 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001534 /* For MMC cards, also get the extended csd */
1535 mmc_return = mmc_get_ext_csd(host, card);
1536
1537 if (mmc_return) {
1538 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1539 return mmc_return;
1540 }
1541 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001542 else
1543 {
1544 /*Read SCR for sd card */
1545 if (mmc_sd_get_card_scr(host, card))
1546 {
1547 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1548 return 1;
1549 }
1550 /* Read SSR for the SD card */
1551 if (mmc_sd_get_card_ssr(host, card))
1552 {
1553 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1554 return 1;
1555 }
1556 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001557
1558 /* Decode and save the CSD register */
1559 mmc_return = mmc_decode_and_save_csd(card);
1560 if (mmc_return) {
1561 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1562 return mmc_return;
1563 }
1564
1565
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001566 if (MMC_CARD_MMC(card))
1567 {
1568 /* Set the bus width based on host, target capbilities */
1569 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1570 bus_width = DATA_BUS_WIDTH_8BIT;
1571 /*
1572 * Host contoller by default supports 4 bit & 1 bit mode.
1573 * No need to check for host support here
1574 */
1575 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1576 bus_width = DATA_BUS_WIDTH_4BIT;
1577 else
1578 bus_width = DATA_BUS_WIDTH_1BIT;
1579
1580 /* Set 4/8 bit SDR bus width in controller */
1581 mmc_return = sdhci_set_bus_width(host, bus_width);
1582
1583 if (mmc_return) {
1584 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1585 return 1;
1586 }
1587
1588 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001589 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001590 * 1. HS200 mode if supported by host & card
1591 * 2. DDR mode host, if supported by host & card
1592 * 3. Use normal speed mode with supported bus width
1593 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001594 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001595 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001596 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001597 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1598 if (mmc_return)
1599 {
1600 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1601 card->rca);
1602 return mmc_return;
1603 }
1604 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001605#if USE_TARGET_HS200_CAPS
1606 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1607#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001608 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001609#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001610 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001611 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001612 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1613
1614 if (mmc_return) {
1615 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1616 card->rca);
1617 return mmc_return;
1618 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001619 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001620 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001621 mmc_return = mmc_set_ddr_mode(host, card);
1622
1623 if (mmc_return) {
1624 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1625 card->rca);
1626 return mmc_return;
1627 }
1628 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001629 dprintf(INFO, "SDHC Running in High Speed mode\n");
1630 /* Set HS_TIMING mode */
1631 mmc_return = mmc_set_hs_interface(host, card);
1632 if (mmc_return) {
1633 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1634 card->rca);
1635 return mmc_return;
1636 }
1637 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001638 mmc_return = mmc_set_bus_width(host, card, bus_width);
1639 if (mmc_return) {
1640 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1641 card->rca);
1642 return mmc_return;
1643 }
1644 }
1645 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001646 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001647 {
1648 /* Check the supported bus width for the card from SCR register */
1649 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1650 bus_width = DATA_BUS_WIDTH_4BIT;
1651 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001652 bus_width = DATA_BUS_WIDTH_1BIT;
1653
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001654 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1655 if (mmc_return)
1656 {
1657 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001658 return mmc_return;
1659 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001660
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001661 /* Set bit SDR bus width in controller */
1662 mmc_return = sdhci_set_bus_width(host, bus_width);
1663 if (mmc_return)
1664 {
1665 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001666 return mmc_return;
1667 }
1668 }
1669
1670
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001671 card->block_size = MMC_BLK_SZ;
1672
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001673 /* Enable RST_n_FUNCTION */
1674 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
1675 {
1676 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
1677
1678 if (mmc_return)
1679 {
1680 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1681 return mmc_return;
1682 }
1683 }
1684
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001685 return mmc_return;
1686}
1687
1688/*
1689 * Function: mmc display csd
1690 * Arg : None
1691 * Return : None
1692 * Flow : Displays the csd information
1693 */
1694static void mmc_display_csd(struct mmc_card *card)
1695{
1696 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1697 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1698 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1699 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1700 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1701 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1702}
1703
1704/*
1705 * Function: mmc_init
1706 * Arg : MMC configuration data
1707 * Return : Pointer to mmc device
1708 * Flow : Entry point to MMC boot process
1709 * Initialize the sd host controller
1710 * Initialize the mmc card
1711 * Set the clock & high speed mode
1712 */
1713struct mmc_device *mmc_init(struct mmc_config_data *data)
1714{
1715 uint8_t mmc_ret = 0;
1716 struct mmc_device *dev;
1717
1718 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1719
1720 if (!dev) {
1721 dprintf(CRITICAL, "Error allocating mmc device\n");
1722 return NULL;
1723 }
1724
1725 ASSERT(data);
1726
1727 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1728
1729 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1730
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001731 /* Initialize the host & clock */
1732 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1733
1734 mmc_ret = mmc_host_init(dev);
1735 if (mmc_ret) {
1736 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1737 return NULL;
1738 }
1739
1740 /* Initialize and identify cards connected to host */
1741 mmc_ret = mmc_card_init(dev);
1742 if (mmc_ret) {
1743 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1744 dev->config.slot);
1745 return NULL;
1746 }
1747
1748 dprintf(INFO, "Done initialization of the card\n");
1749
1750 mmc_display_csd(&dev->card);
1751
1752 return dev;
1753}
1754
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001755static uint32_t mmc_parse_response(uint32_t resp)
1756{
1757 /* Trying to write beyond card capacity */
1758 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1759 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1760 return 1;
1761 }
1762
1763 /* Misaligned address not matching block length */
1764 if (resp & MMC_R1_ADDR_ERR) {
1765 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1766 return 1;
1767 }
1768
1769 /* Invalid block length */
1770 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1771 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1772 return 1;
1773 }
1774
1775 /* Tried to program write protected block */
1776 if (resp & MMC_R1_WP_VIOLATION) {
1777 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1778 return 1;
1779 }
1780
1781 /* card controller error */
1782 if (resp & MMC_R1_CC_ERROR) {
1783 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1784 return 1;
1785 }
1786
1787 /* Generic error */
1788 if (resp & MMC_R1_GENERIC_ERR) {
1789 dprintf(CRITICAL, "A generic Device error\n");
1790 return 1;
1791 }
1792
1793 /* Finally check for card in TRAN state */
1794 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1795 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1796 return 1;
1797 }
1798
1799 return 0;
1800}
1801
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001802static uint32_t mmc_stop_command(struct mmc_device *dev)
1803{
1804 struct mmc_command cmd;
1805 uint32_t mmc_ret = 0;
1806
1807 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1808
1809 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1810 cmd.argument = (dev->card.rca << 16);
1811 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1812 cmd.resp_type = SDHCI_CMD_RESP_R1;
1813
1814 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1815 if(mmc_ret)
1816 {
1817 dprintf(CRITICAL, "Failed to send stop command\n");
1818 return mmc_ret;
1819 }
1820
1821 /* Response contains 32 bit Card status.
1822 * Parse the errors & provide relevant information */
1823
1824 return mmc_parse_response(cmd.resp[0]);
1825}
1826
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001827/*
1828 * Function: mmc sdhci read
1829 * Arg : mmc device structure, block address, number of blocks & destination
1830 * Return : 0 on Success, non zero on success
1831 * Flow : Fill in the command structure & send the command
1832 */
1833uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1834 uint64_t blk_addr, uint32_t num_blocks)
1835{
1836 uint32_t mmc_ret = 0;
1837 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001838 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001839
1840 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1841
1842 /* CMD17/18 Format:
1843 * [31:0] Data Address
1844 */
1845 if (num_blocks == 1)
1846 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1847 else
1848 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1849
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001850 /*
1851 * Standard emmc cards use byte mode addressing
1852 * convert the block address to byte address before
1853 * sending the command
1854 */
1855 if (card->type == MMC_TYPE_STD_MMC)
1856 cmd.argument = blk_addr * card->block_size;
1857 else
1858 cmd.argument = blk_addr;
1859
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001860 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1861 cmd.resp_type = SDHCI_CMD_RESP_R1;
1862 cmd.trans_mode = SDHCI_MMC_READ;
1863 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001864
1865 /* Use CMD23 If card supports CMD23:
1866 * For SD card use the value read from SCR register
1867 * For emmc by default use CMD23.
1868 * Also as per SDCC spec always use CMD23 to stop
1869 * multiblock read/write if UHS (Ultra High Speed) is
1870 * enabled
1871 */
1872 if (MMC_CARD_SD(card))
1873 cmd.cmd23_support = dev->card.scr.cmd23_support;
1874 else
1875 cmd.cmd23_support = 0x1;
1876
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001877 cmd.data.data_ptr = dest;
1878 cmd.data.num_blocks = num_blocks;
1879
1880 /* send command */
1881 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001882
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001883 /* For multi block read failures send stop command */
1884 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001885 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001886 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001887 }
1888
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001889 /*
1890 * Response contains 32 bit Card status.
1891 * Parse the errors & provide relevant information
1892 */
1893 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001894}
1895
1896/*
1897 * Function: mmc sdhci write
1898 * Arg : mmc device structure, block address, number of blocks & source
1899 * Return : 0 on Success, non zero on success
1900 * Flow : Fill in the command structure & send the command
1901 */
1902uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1903 uint64_t blk_addr, uint32_t num_blocks)
1904{
1905 uint32_t mmc_ret = 0;
1906 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001907 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001908
1909 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1910
1911 /* CMD24/25 Format:
1912 * [31:0] Data Address
1913 */
1914
1915 if (num_blocks == 1)
1916 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1917 else
1918 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1919
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001920 /*
1921 * Standard emmc cards use byte mode addressing
1922 * convert the block address to byte address before
1923 * sending the command
1924 */
1925 if (card->type == MMC_TYPE_STD_MMC)
1926 cmd.argument = blk_addr * card->block_size;
1927 else
1928 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001929 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1930 cmd.resp_type = SDHCI_CMD_RESP_R1;
1931 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001932
1933 /* Use CMD23 If card supports CMD23:
1934 * For SD card use the value read from SCR register
1935 * For emmc by default use CMD23.
1936 * Also as per SDCC spec always use CMD23 to stop
1937 * multiblock read/write if UHS (Ultra High Speed) is
1938 * enabled
1939 */
1940 if (MMC_CARD_SD(card))
1941 cmd.cmd23_support = dev->card.scr.cmd23_support;
1942 else
1943 cmd.cmd23_support = 0x1;
1944
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001945 cmd.data_present = 0x1;
1946 cmd.data.data_ptr = src;
1947 cmd.data.num_blocks = num_blocks;
1948
1949 /* send command */
1950 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001951
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001952 /* For multi block write failures send stop command */
1953 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001954 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001955 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001956 }
1957
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001958 /*
1959 * Response contains 32 bit Card status.
1960 * Parse the errors & provide relevant information
1961 */
1962 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001963}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001964
1965/*
1966 * Send the erase group start address using CMD35
1967 */
1968static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1969{
1970 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001971 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001972
1973 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1974
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001975 if (MMC_CARD_MMC(card))
1976 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1977 else
1978 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1979
vijay kumar1129e4e2014-03-28 11:24:48 +05301980 /*
1981 * Standard emmc cards use byte mode addressing
1982 * convert the block address to byte address before
1983 * sending the command
1984 */
1985 if (card->type == MMC_TYPE_STD_MMC)
1986 cmd.argument = erase_start * card->block_size;
1987 else
1988 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001989 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1990 cmd.resp_type = SDHCI_CMD_RESP_R1;
1991
1992 /* send command */
1993 if (sdhci_send_command(&dev->host, &cmd))
1994 return 1;
1995
1996 /*
1997 * CMD35 on failure returns address out of range error
1998 */
1999 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2000 {
2001 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2002 return 1;
2003 }
2004
2005 return 0;
2006}
2007
2008/*
2009 * Send the erase group end address using CMD36
2010 */
2011static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2012{
2013 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002014 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002015
2016 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2017
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002018 if (MMC_CARD_MMC(card))
2019 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2020 else
2021 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2022
vijay kumar1129e4e2014-03-28 11:24:48 +05302023 /*
2024 * Standard emmc cards use byte mode addressing
2025 * convert the block address to byte address before
2026 * sending the command
2027 */
2028 if (card->type == MMC_TYPE_STD_MMC)
2029 cmd.argument = erase_end * card->block_size;
2030 else
2031 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002032 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2033 cmd.resp_type = SDHCI_CMD_RESP_R1;
2034
2035 /* send command */
2036 if (sdhci_send_command(&dev->host, &cmd))
2037 return 1;
2038
2039 /*
2040 * CMD3 on failure returns address out of range error
2041 */
2042 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2043 {
2044 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2045 return 1;
2046 }
2047
2048 return 0;
2049}
2050
2051/*
2052 * Send the erase CMD38, to erase the selected erase groups
2053 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002054static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002055{
2056 struct mmc_command cmd;
2057 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002058 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002059
2060 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2061
2062 cmd.cmd_index = CMD38_ERASE;
2063 cmd.argument = 0x00000000;
2064 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2065 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002066 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002067
2068 /* send command */
2069 if (sdhci_send_command(&dev->host, &cmd))
2070 return 1;
2071
2072 do
2073 {
2074 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2075 {
2076 dprintf(CRITICAL, "Failed to get card status after erase\n");
2077 return 1;
2078 }
2079 /* Check if the response of erase command has eras skip status set */
2080 if (status & MMC_R1_WP_ERASE_SKIP)
2081 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2082
2083 retry++;
2084 udelay(1000);
2085 if (retry == MMC_MAX_CARD_STAT_RETRY)
2086 {
2087 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2088 return 1;
2089 }
2090 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2091
2092
2093 return 0;
2094}
2095
2096
2097/*
2098 * Function: mmc sdhci erase
2099 * Arg : mmc device structure, block address and length
2100 * Return : 0 on Success, non zero on failure
2101 * Flow : Fill in the command structure & send the command
2102 */
2103uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2104{
2105 uint32_t erase_unit_sz = 0;
2106 uint32_t erase_start;
2107 uint32_t erase_end;
2108 uint32_t blk_end;
2109 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002110 uint64_t erase_timeout = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002111 uint32_t *out;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002112 struct mmc_card *card;
2113
2114
2115 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002116
2117 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002118 * Calculate the erase unit size,
2119 * 1. Based on emmc 4.5 spec for emmc card
2120 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002121 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002122 if (MMC_CARD_MMC(card))
2123 {
2124 /*
2125 * Calculate the erase unit size as per the emmc specification v4.5
2126 */
2127 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2128 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2129 else
2130 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2131 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002132 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002133 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2134
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002135
2136 /* Convert length in blocks */
2137 len = len / MMC_BLK_SZ;
2138
2139 if (len < erase_unit_sz)
2140 {
2141 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2142 return 1;
2143 }
2144
2145 /* Calculate erase groups based on the length in blocks */
2146 num_erase_grps = len / erase_unit_sz;
2147
2148 /* Start address of the erase range */
2149 erase_start = blk_addr;
2150
2151 /* Last address of the erase range */
2152 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2153
2154 /* Boundary check for overlap */
2155 blk_end = blk_addr + len;
2156
2157 if (erase_end > blk_end)
2158 {
2159 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2160 erase_end -= erase_unit_sz;
2161 }
2162
2163 /* Send CMD35 for erase group start */
2164 if (mmc_send_erase_grp_start(dev, erase_start))
2165 {
2166 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2167 return 1;
2168 }
2169
2170 /* Send CMD36 for erase group end */
2171 if (mmc_send_erase_grp_end(dev, erase_end))
2172 {
2173 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2174 return 1;
2175 }
2176
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002177 /*
2178 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002179 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002180 */
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002181 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002182
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002183 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002184 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002185 {
2186 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2187 return 1;
2188 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002189
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002190 return 0;
2191}
2192
2193/*
2194 * Function: mmc get wp status
2195 * Arg : mmc device structure, block address and buffer for getting wp status
2196 * Return : 0 on Success, 1 on Failure
2197 * Flow : Get the WP group status by sending CMD31
2198 */
2199uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2200{
2201 struct mmc_command cmd;
2202
2203 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2204
2205 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2206 cmd.argument = addr;
2207 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2208 cmd.resp_type = SDHCI_CMD_RESP_R1;
2209 cmd.trans_mode = SDHCI_MMC_READ;
2210 cmd.data_present = 0x1;
2211 cmd.data.data_ptr = wp_status;
2212 cmd.data.num_blocks = 0x1;
2213 cmd.data.blk_sz = 0x8;
2214
2215 if (sdhci_send_command(&dev->host, &cmd))
2216 {
2217 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2218 return 1;
2219 }
2220
2221 return 0;
2222}
2223
2224/*
2225 * Function: mmc set/clear WP on user area
2226 * Arg : mmc device structure, block address,len, & flag to set or clear
2227 * Return : 0 on success, 1 on failure
2228 * Flow : Function to set/clear power on write protect on user area
2229 */
2230
2231uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2232{
2233 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302234 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002235 uint32_t wp_grp_size;
2236 uint32_t status;
2237 uint32_t num_wp_grps;
2238 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002239 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002240 uint32_t i;
2241
2242 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2243
2244 /* Convert len into blocks */
2245 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302246 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002247
2248 /* Disable PERM WP */
2249 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2250
2251 if (ret)
2252 {
2253 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2254 return ret;
2255 }
2256
2257 /* Read the default values for user WP */
2258 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2259
2260 if (ret)
2261 {
2262 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2263 return ret;
2264 }
2265
2266 /* Check if user power on WP is disabled or perm WP is enabled */
2267 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2268 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2269 {
2270 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2271 return 1;
2272 }
2273
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002274 if (len < wp_grp_size)
2275 {
2276 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2277 return 1;
2278 }
2279
2280 /* Set power on USER WP */
2281 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2282
2283 if (ret)
2284 {
2285 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2286 return ret;
2287 }
2288
2289 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2290
2291 if (set_clr)
2292 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2293 else
2294 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2295
2296 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2297 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2298
2299 for(i = 0; i < num_wp_grps; i++)
2300 {
vijay kumar7420baa2014-05-02 12:01:49 +05302301 /*
2302 * Standard emmc cards use byte mode addressing
2303 * convert the block address to byte address before
2304 * sending the command
2305 */
2306 if (card->type == MMC_TYPE_STD_MMC)
2307 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2308 else
2309 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002310
2311 if (sdhci_send_command(&dev->host, &cmd))
2312 return 1;
2313
2314 /* CMD28/CMD29 On failure returns address out of range error */
2315 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2316 {
2317 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2318 return 1;
2319 }
2320
2321 /* Check the card status */
2322 do
2323 {
2324 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2325 {
2326 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2327 return 1;
2328 }
2329
2330 /* Time out for WP command */
2331 retry++;
2332 udelay(1000);
2333 if (retry == MMC_MAX_CARD_STAT_RETRY)
2334 {
2335 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2336 return 1;
2337 }
2338 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2339
2340 }
2341
2342 return 0;
2343}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002344
2345/* Function to put the mmc card to sleep */
2346void mmc_put_card_to_sleep(struct mmc_device *dev)
2347{
2348 struct mmc_command cmd = {0};
2349 struct mmc_card *card = &dev->card;
2350
2351 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2352 cmd.argument = 0x00000000;
2353 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2354 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2355
2356 /* send command */
2357 if(sdhci_send_command(&dev->host, &cmd))
2358 {
2359 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2360 return;
2361 }
2362
2363 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2364 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2365 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2366 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2367
2368 /* send command */
2369 if(sdhci_send_command(&dev->host, &cmd))
2370 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2371}