Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions |
| 5 | * are met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above copyright |
| 9 | * notice, this list of conditions and the following disclaimer in |
| 10 | * the documentation and/or other materials provided with the |
| 11 | * distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 19 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 20 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 22 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS |
| 23 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
| 24 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #include <debug.h> |
| 31 | #include <string.h> |
| 32 | #include <smem.h> |
| 33 | #include <err.h> |
| 34 | #include <msm_panel.h> |
| 35 | #include <mipi_dsi.h> |
| 36 | #include <pm8x41.h> |
| 37 | #include <pm8x41_wled.h> |
| 38 | #include <qpnp_wled.h> |
Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 39 | #include <qpnp_lcdb.h> |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 40 | #include <board.h> |
| 41 | #include <mdp5.h> |
| 42 | #include <scm.h> |
| 43 | #include <regulator.h> |
| 44 | #include <platform/clock.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/iomap.h> |
| 47 | #include <target/display.h> |
| 48 | #include <qtimer.h> |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 49 | #include <platform.h> |
Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 50 | #include <target.h> |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 51 | |
| 52 | #include "include/panel.h" |
| 53 | #include "include/display_resource.h" |
| 54 | #include "gcdb_display.h" |
| 55 | |
Lei Chen | 2c11b46 | 2018-04-11 18:42:37 +0800 | [diff] [blame] | 56 | #define PWM_DUTY_US 13 |
| 57 | #define PWM_PERIOD_US 27 |
| 58 | |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 59 | #define TRULY_720P_VID_PANEL "truly_720p_video" |
| 60 | #define TRULY_720P_CMD_PANEL "truly_720p_cmd" |
| 61 | |
| 62 | #define HDMI_ADV_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_adv7533_1080p:1:none:cfg:single_dsi" |
| 63 | #define TRULY_VID_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_720p_video:1:none:cfg:single_dsi" |
| 64 | #define TRULY_CMD_PANEL_STRING "1:dsi:0:qcom,mdss_dsi_truly_720p_cmd:1:none:cfg:single_dsi" |
| 65 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 66 | /*---------------------------------------------------------------------------*/ |
| 67 | /* GPIO configuration */ |
| 68 | /*---------------------------------------------------------------------------*/ |
| 69 | static struct gpio_pin reset_gpio = { |
| 70 | "msmgpio", 0, 3, 1, 0, 1 |
| 71 | }; |
| 72 | |
| 73 | static struct gpio_pin enable_gpio = { |
| 74 | "msmgpio", 90, 3, 1, 0, 1 |
| 75 | }; |
| 76 | |
| 77 | static struct gpio_pin bkl_gpio = { |
| 78 | "msmgpio", 91, 3, 1, 0, 1 |
| 79 | }; |
| 80 | |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 81 | static struct gpio_pin lcd_mode_gpio = { |
| 82 | "msmgpio", 107, 3, 1, 0, 1 |
| 83 | }; |
| 84 | |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 85 | static struct gpio_pin bkl_en_gpio = { |
| 86 | "pm8953", 4, 3, 1, 0, 1 |
| 87 | }; |
| 88 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 89 | #define VCO_DELAY_USEC 1000 |
| 90 | #define GPIO_STATE_LOW 0 |
| 91 | #define GPIO_STATE_HIGH 2 |
| 92 | #define RESET_GPIO_SEQ_LEN 3 |
| 93 | #define PMIC_WLED_SLAVE_ID 3 |
| 94 | |
Padmanabhan Komanduru | b338193 | 2015-06-15 22:14:02 +0530 | [diff] [blame] | 95 | #define DSI0_BASE_ADJUST -0x4000 |
| 96 | #define DSI0_PHY_BASE_ADJUST -0x4100 |
| 97 | #define DSI0_PHY_PLL_BASE_ADJUST -0x3900 |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 98 | #define DSI0_12NM_PHY_PLL_BASE_ADJUST -0x3F00 |
Padmanabhan Komanduru | b338193 | 2015-06-15 22:14:02 +0530 | [diff] [blame] | 99 | #define DSI0_PHY_REGULATOR_BASE_ADJUST -0x3C00 |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 100 | #define DSI1_12NM_PHY_PLL_BASE_ADJUST -0x600 |
Padmanabhan Komanduru | b338193 | 2015-06-15 22:14:02 +0530 | [diff] [blame] | 101 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 102 | static void mdss_dsi_uniphy_pll_sw_reset_8952(uint32_t pll_base) |
| 103 | { |
| 104 | writel(0x01, pll_base + 0x0068); /* PLL TEST CFG */ |
| 105 | mdelay(1); |
| 106 | writel(0x00, pll_base + 0x0068); /* PLL TEST CFG */ |
| 107 | mdelay(1); |
| 108 | } |
| 109 | |
| 110 | static void dsi_pll_toggle_lock_detect_8952(uint32_t pll_base) |
| 111 | { |
| 112 | writel(0x04, pll_base + 0x0064); /* LKDetect CFG2 */ |
| 113 | udelay(1); |
| 114 | writel(0x05, pll_base + 0x0064); /* LKDetect CFG2 */ |
| 115 | udelay(512); |
| 116 | } |
| 117 | |
| 118 | static void dsi_pll_sw_reset_8952(uint32_t pll_base) |
| 119 | { |
| 120 | writel(0x01, pll_base + 0x0068); /* PLL TEST CFG */ |
| 121 | udelay(1); |
| 122 | writel(0x00, pll_base + 0x0068); /* PLL TEST CFG */ |
Padmanabhan Komanduru | 6cf6352 | 2015-06-08 14:48:00 +0530 | [diff] [blame] | 123 | udelay(1); |
| 124 | } |
| 125 | |
| 126 | static uint32_t dsi_pll_lock_status_8956(uint32_t pll_base) |
| 127 | { |
| 128 | uint32_t counter, status; |
| 129 | |
| 130 | status = readl(pll_base + 0x00c0) & 0x01; |
| 131 | for (counter = 0; counter < 5 && !status; counter++) { |
| 132 | udelay(100); |
| 133 | status = readl(pll_base + 0x00c0) & 0x01; |
| 134 | } |
| 135 | |
| 136 | return status; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 137 | } |
| 138 | |
| 139 | static uint32_t gf_1_dsi_pll_enable_sequence_8952(uint32_t pll_base) |
| 140 | { |
| 141 | uint32_t rc; |
| 142 | |
| 143 | dsi_pll_sw_reset_8952(pll_base); |
| 144 | |
| 145 | /* |
| 146 | * Add hardware recommended delays between register writes for |
| 147 | * the updates to take effect. These delays are necessary for the |
| 148 | * PLL to successfully lock |
| 149 | */ |
| 150 | writel(0x14, pll_base + 0x0070); /* CAL CFG1*/ |
| 151 | writel(0x01, pll_base + 0x0020); /* GLB CFG */ |
| 152 | writel(0x05, pll_base + 0x0020); /* GLB CFG */ |
| 153 | udelay(3); |
| 154 | writel(0x0f, pll_base + 0x0020); /* GLB CFG */ |
| 155 | udelay(500); |
| 156 | |
| 157 | dsi_pll_toggle_lock_detect_8952(pll_base); |
| 158 | rc = readl(pll_base + 0x00c0) & 0x01; |
| 159 | |
| 160 | return rc; |
| 161 | } |
| 162 | |
| 163 | static uint32_t gf_2_dsi_pll_enable_sequence_8952(uint32_t pll_base) |
| 164 | { |
| 165 | uint32_t rc; |
| 166 | |
| 167 | dsi_pll_sw_reset_8952(pll_base); |
| 168 | |
| 169 | /* |
| 170 | * Add hardware recommended delays between register writes for |
| 171 | * the updates to take effect. These delays are necessary for the |
| 172 | * PLL to successfully lock |
| 173 | */ |
| 174 | writel(0x04, pll_base + 0x0070); /* CAL CFG1*/ |
| 175 | writel(0x01, pll_base + 0x0020); /* GLB CFG */ |
| 176 | writel(0x05, pll_base + 0x0020); /* GLB CFG */ |
| 177 | udelay(3); |
| 178 | writel(0x0f, pll_base + 0x0020); /* GLB CFG */ |
| 179 | udelay(500); |
| 180 | |
| 181 | dsi_pll_toggle_lock_detect_8952(pll_base); |
| 182 | rc = readl(pll_base + 0x00c0) & 0x01; |
| 183 | |
| 184 | return rc; |
| 185 | } |
| 186 | |
| 187 | static uint32_t tsmc_dsi_pll_enable_sequence_8952(uint32_t pll_base) |
| 188 | { |
| 189 | uint32_t rc; |
| 190 | |
| 191 | dsi_pll_sw_reset_8952(pll_base); |
| 192 | /* |
| 193 | * Add hardware recommended delays between register writes for |
| 194 | * the updates to take effect. These delays are necessary for the |
| 195 | * PLL to successfully lock |
| 196 | */ |
| 197 | |
| 198 | writel(0x34, pll_base + 0x0070); /* CAL CFG1*/ |
| 199 | writel(0x01, pll_base + 0x0020); /* GLB CFG */ |
| 200 | writel(0x05, pll_base + 0x0020); /* GLB CFG */ |
| 201 | writel(0x0f, pll_base + 0x0020); /* GLB CFG */ |
| 202 | udelay(500); |
| 203 | |
| 204 | dsi_pll_toggle_lock_detect_8952(pll_base); |
| 205 | rc = readl(pll_base + 0x00c0) & 0x01; |
| 206 | |
| 207 | return rc; |
| 208 | } |
| 209 | |
| 210 | |
| 211 | static uint32_t dsi_pll_enable_seq_8952(uint32_t pll_base) |
| 212 | { |
| 213 | uint32_t pll_locked = 0; |
| 214 | uint32_t counter = 0; |
| 215 | |
| 216 | do { |
| 217 | pll_locked = tsmc_dsi_pll_enable_sequence_8952(pll_base); |
| 218 | |
| 219 | dprintf(SPEW, "TSMC pll locked status is %d\n", pll_locked); |
| 220 | ++counter; |
| 221 | } while (!pll_locked && (counter < 3)); |
| 222 | |
| 223 | if(!pll_locked) { |
| 224 | counter = 0; |
| 225 | do { |
| 226 | pll_locked = gf_1_dsi_pll_enable_sequence_8952(pll_base); |
| 227 | |
| 228 | dprintf(SPEW, "GF P1 pll locked status is %d\n", pll_locked); |
| 229 | ++counter; |
| 230 | } while (!pll_locked && (counter < 3)); |
| 231 | } |
| 232 | |
| 233 | if(!pll_locked) { |
| 234 | counter = 0; |
| 235 | do { |
| 236 | pll_locked = gf_2_dsi_pll_enable_sequence_8952(pll_base); |
| 237 | |
| 238 | dprintf(SPEW, "GF P2 pll locked status is %d\n", pll_locked); |
| 239 | ++counter; |
| 240 | } while (!pll_locked && (counter < 3)); |
| 241 | } |
| 242 | |
| 243 | return pll_locked; |
| 244 | } |
| 245 | |
Padmanabhan Komanduru | 6cf6352 | 2015-06-08 14:48:00 +0530 | [diff] [blame] | 246 | static uint32_t dsi_pll_enable_seq_8956(uint32_t pll_base) |
| 247 | { |
| 248 | /* |
| 249 | * PLL power up sequence |
| 250 | * Add necessary delays recommended by h/w team |
| 251 | */ |
| 252 | |
| 253 | /* Lock Detect setting */ |
| 254 | writel(0x0d, pll_base + 0x0064); /* LKDetect CFG2 */ |
| 255 | writel(0x34, pll_base + 0x0070); /* PLL CAL_CFG1 */ |
| 256 | writel(0x10, pll_base + 0x005c); /* LKDetect CFG0 */ |
| 257 | writel(0x1a, pll_base + 0x0060); /* LKDetect CFG1 */ |
| 258 | |
| 259 | writel(0x01, pll_base + 0x0020); /* GLB CFG */ |
| 260 | udelay(300); |
| 261 | writel(0x05, pll_base + 0x0020); /* GLB CFG */ |
| 262 | udelay(300); |
| 263 | writel(0x0f, pll_base + 0x0020); /* GLB CFG */ |
| 264 | udelay(300); |
| 265 | writel(0x07, pll_base + 0x0020); /* GLB CFG */ |
| 266 | udelay(300); |
| 267 | writel(0x0f, pll_base + 0x0020); /* GLB CFG */ |
| 268 | udelay(1000); |
| 269 | |
| 270 | return dsi_pll_lock_status_8956(pll_base); |
| 271 | } |
| 272 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 273 | static int msm8952_wled_backlight_ctrl(uint8_t enable) |
| 274 | { |
| 275 | uint8_t slave_id = PMIC_WLED_SLAVE_ID; /* pmi */ |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 276 | uint32_t pmic_type = target_get_pmic(); |
| 277 | |
| 278 | if(pmic_type == PMIC_IS_PM8916) |
| 279 | return NO_ERROR; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 280 | |
| 281 | pm8x41_wled_config_slave_id(slave_id); |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 282 | if (pmic_type == PMIC_IS_PMI632) { |
Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 283 | qpnp_lcdb_enable(enable); |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 284 | } else { |
Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 285 | qpnp_wled_enable_backlight(enable); |
| 286 | qpnp_ibb_enable(enable); |
| 287 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 288 | return NO_ERROR; |
| 289 | } |
| 290 | |
Lei Chen | 2c11b46 | 2018-04-11 18:42:37 +0800 | [diff] [blame] | 291 | static int pwm_backlight_ctrl(uint8_t enable) |
| 292 | { |
| 293 | if (enable) { |
| 294 | pm_pwm_enable(false); |
| 295 | pm_pwm_config(PWM_DUTY_US, PWM_PERIOD_US); |
| 296 | pm_pwm_enable(true); |
| 297 | } else { |
| 298 | pm_pwm_enable(false); |
| 299 | } |
| 300 | |
| 301 | return NO_ERROR; |
| 302 | } |
| 303 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 304 | int target_backlight_ctrl(struct backlight *bl, uint8_t enable) |
| 305 | { |
| 306 | uint32_t ret = NO_ERROR; |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 307 | uint32_t pmic_type = target_get_pmic(); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 308 | |
| 309 | if (bl->bl_interface_type == BL_DCS) |
| 310 | return ret; |
| 311 | |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 312 | if ((pmic_type == PMIC_IS_PMI632) && |
Lei Chen | 2c11b46 | 2018-04-11 18:42:37 +0800 | [diff] [blame] | 313 | (bl->bl_interface_type == BL_PWM)) { |
| 314 | ret = pwm_backlight_ctrl(enable); |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 315 | } else if (pmic_type == PMIC_IS_PM8916) { |
| 316 | ret = pwm_backlight_ctrl(enable); |
Lei Chen | 2c11b46 | 2018-04-11 18:42:37 +0800 | [diff] [blame] | 317 | } else { |
| 318 | ret = msm8952_wled_backlight_ctrl(enable); |
| 319 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 320 | return ret; |
| 321 | } |
| 322 | |
Padmanabhan Komanduru | 77a979a | 2015-06-15 15:03:23 +0530 | [diff] [blame] | 323 | static int32_t mdss_dsi_pll_config(uint32_t pll_base, uint32_t ctl_base, |
| 324 | struct mdss_dsi_pll_config *pll_data) |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 325 | { |
| 326 | int32_t ret = 0; |
Padmanabhan Komanduru | 77a979a | 2015-06-15 15:03:23 +0530 | [diff] [blame] | 327 | if (!platform_is_msm8956()) |
| 328 | mdss_dsi_uniphy_pll_sw_reset_8952(pll_base); |
| 329 | else |
| 330 | dsi_pll_sw_reset_8952(pll_base); |
| 331 | mdss_dsi_auto_pll_config(pll_base, ctl_base, pll_data); |
| 332 | if (platform_is_msm8956()) |
| 333 | ret = dsi_pll_enable_seq_8956(pll_base); |
| 334 | else |
| 335 | ret = dsi_pll_enable_seq_8952(pll_base); |
| 336 | |
| 337 | return ret; |
| 338 | } |
| 339 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 340 | int target_panel_clock(uint8_t enable, struct msm_panel_info *pinfo) |
| 341 | { |
Padmanabhan Komanduru | 82ae713 | 2015-06-08 15:46:33 +0530 | [diff] [blame] | 342 | int32_t ret = 0, flags; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 343 | struct mdss_dsi_pll_config *pll_data; |
| 344 | dprintf(SPEW, "target_panel_clock\n"); |
| 345 | |
Padmanabhan Komanduru | 82ae713 | 2015-06-08 15:46:33 +0530 | [diff] [blame] | 346 | if (pinfo->dest == DISPLAY_2) { |
| 347 | flags = MMSS_DSI_CLKS_FLAG_DSI1; |
| 348 | if (pinfo->mipi.dual_dsi) |
| 349 | flags |= MMSS_DSI_CLKS_FLAG_DSI0; |
| 350 | } else { |
| 351 | flags = MMSS_DSI_CLKS_FLAG_DSI0; |
| 352 | if (pinfo->mipi.dual_dsi) |
| 353 | flags |= MMSS_DSI_CLKS_FLAG_DSI1; |
| 354 | } |
| 355 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 356 | pll_data = pinfo->mipi.dsi_pll_config; |
| 357 | pll_data->vco_delay = VCO_DELAY_USEC; |
| 358 | |
Padmanabhan Komanduru | f68f51b | 2015-12-21 18:32:12 +0530 | [diff] [blame] | 359 | /* SSC parameters */ |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 360 | if (platform_is_msm8937() || platform_is_msm8917() || platform_is_qm215()) { |
Padmanabhan Komanduru | f68f51b | 2015-12-21 18:32:12 +0530 | [diff] [blame] | 361 | pll_data->ssc_en = true; |
| 362 | pll_data->is_center_spread = false; |
| 363 | pll_data->ssc_freq = 30000; |
| 364 | pll_data->ssc_ppm = 5000; |
Padmanabhan Komanduru | e54f761 | 2018-05-03 09:29:50 +0530 | [diff] [blame] | 365 | } else if (platform_is_sdm439() || platform_is_sdm429()) { |
| 366 | pll_data->ssc_en = true; |
| 367 | pll_data->is_center_spread = false; |
| 368 | pll_data->ssc_freq = 31500; |
| 369 | pll_data->ssc_ppm = 5000; |
Padmanabhan Komanduru | f68f51b | 2015-12-21 18:32:12 +0530 | [diff] [blame] | 370 | } |
| 371 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 372 | if (enable) { |
| 373 | mdp_gdsc_ctrl(enable); |
| 374 | mdss_bus_clocks_enable(); |
| 375 | mdp_clock_enable(); |
| 376 | ret = restore_secure_cfg(SECURE_DEVICE_MDSS); |
| 377 | if (ret) { |
| 378 | dprintf(CRITICAL, |
| 379 | "%s: Failed to restore MDP security configs", |
| 380 | __func__); |
| 381 | mdp_clock_disable(); |
| 382 | mdss_bus_clocks_disable(); |
| 383 | mdp_gdsc_ctrl(0); |
| 384 | return ret; |
| 385 | } |
Padmanabhan Komanduru | 77a979a | 2015-06-15 15:03:23 +0530 | [diff] [blame] | 386 | |
Padmanabhan Komanduru | 62eec85 | 2018-05-14 12:27:30 +0530 | [diff] [blame] | 387 | gcc_dsi_lp_clock_enable(flags); |
| 388 | |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 389 | if (platform_is_sdm439() || platform_is_sdm429()) { |
| 390 | mdss_dsi_auto_pll_12nm_config(pinfo); |
| 391 | |
| 392 | /* |
| 393 | * enable clock/data lane in DSI controller |
| 394 | * before enabling DSI PLL for 12nm PHY |
| 395 | */ |
| 396 | if (pinfo->lane_config) |
| 397 | pinfo->lane_config(pinfo); |
| 398 | |
| 399 | ret = mdss_dsi_auto_pll_12nm_enable(pinfo); |
| 400 | if (!ret) |
| 401 | dprintf(CRITICAL, "unable to ON 12nm PLL\n"); |
| 402 | } else { |
| 403 | ret = mdss_dsi_pll_config(pinfo->mipi.pll_base, |
| 404 | pinfo->mipi.ctl_base, pll_data); |
| 405 | if (!ret) |
| 406 | dprintf(CRITICAL, "unable to ON master pll\n"); |
| 407 | } |
Padmanabhan Komanduru | 77a979a | 2015-06-15 15:03:23 +0530 | [diff] [blame] | 408 | |
Padmanabhan Komanduru | 2a6c345 | 2015-09-09 18:46:06 +0530 | [diff] [blame] | 409 | if (platform_is_msm8956() && pinfo->mipi.dual_dsi && |
| 410 | !platform_is_msm8976_v_1_1()) { |
Padmanabhan Komanduru | 77a979a | 2015-06-15 15:03:23 +0530 | [diff] [blame] | 411 | ret = mdss_dsi_pll_config(pinfo->mipi.spll_base, |
| 412 | pinfo->mipi.sctl_base, pll_data); |
| 413 | if (!ret) |
| 414 | dprintf(CRITICAL, "Not able to enable second pll\n"); |
| 415 | } |
| 416 | |
Padmanabhan Komanduru | 62eec85 | 2018-05-14 12:27:30 +0530 | [diff] [blame] | 417 | gcc_dsi_hs_clocks_enable(flags, pinfo->mipi.use_dsi1_pll, |
Padmanabhan Komanduru | 2a6c345 | 2015-09-09 18:46:06 +0530 | [diff] [blame] | 418 | pll_data->pclk_m, pll_data->pclk_n, pll_data->pclk_d); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 419 | } else if(!target_cont_splash_screen()) { |
Padmanabhan Komanduru | 82ae713 | 2015-06-08 15:46:33 +0530 | [diff] [blame] | 420 | gcc_dsi_clocks_disable(flags); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 421 | mdp_clock_disable(); |
| 422 | mdss_bus_clocks_disable(); |
| 423 | mdp_gdsc_ctrl(enable); |
| 424 | } |
| 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | int target_panel_reset(uint8_t enable, struct panel_reset_sequence *resetseq, |
| 430 | struct msm_panel_info *pinfo) |
| 431 | { |
| 432 | int ret = NO_ERROR; |
Sujeev Dias | 6bc9fa3 | 2015-08-03 23:13:44 -0700 | [diff] [blame] | 433 | uint32_t hw_id = board_hardware_id(); |
| 434 | uint32_t hw_subtype = board_hardware_subtype(); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 435 | |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 436 | if (platform_is_msm8956()) { |
| 437 | reset_gpio.pin_id = 25; |
| 438 | bkl_gpio.pin_id = 66; |
Padmanabhan Komanduru | b323132 | 2015-11-12 16:54:21 +0530 | [diff] [blame] | 439 | } else if (platform_is_msm8937()) { |
| 440 | reset_gpio.pin_id = 60; |
| 441 | bkl_gpio.pin_id = 98; |
| 442 | enable_gpio.pin_id = 99; |
Parth Dixit | 05f3c9f | 2016-03-18 17:14:57 +0530 | [diff] [blame] | 443 | } else if (platform_is_msm8917()) { |
Jayant Shekhar | 9c0533e | 2016-01-28 11:17:18 +0530 | [diff] [blame] | 444 | reset_gpio.pin_id = 60; |
| 445 | bkl_gpio.pin_id = 98; |
| 446 | pinfo->mipi.use_enable_gpio = 0; |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 447 | } else if (platform_is_qm215()) { |
| 448 | dprintf(CRITICAL,"vproddut: coming here \n"); |
| 449 | reset_gpio.pin_id = 60; |
| 450 | bkl_gpio.pin_id = 93; |
| 451 | enable_gpio.pin_id = 94; |
| 452 | pinfo->mipi.use_enable_gpio = 1; |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 453 | } else if (platform_is_sdm439() || platform_is_sdm429()) { |
| 454 | reset_gpio.pin_id = 60; |
Sujeev Dias | 6bc9fa3 | 2015-08-03 23:13:44 -0700 | [diff] [blame] | 455 | } else if ((hw_id == HW_PLATFORM_QRD) && |
| 456 | (hw_subtype == HW_PLATFORM_SUBTYPE_POLARIS)) { |
| 457 | enable_gpio.pin_id = 19; |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 458 | } |
| 459 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 460 | if (enable) { |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 461 | if (pinfo->mipi.use_enable_gpio && !platform_is_msm8956()) { |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 462 | gpio_tlmm_config(enable_gpio.pin_id, 0, |
| 463 | enable_gpio.pin_direction, enable_gpio.pin_pull, |
| 464 | enable_gpio.pin_strength, |
| 465 | enable_gpio.pin_state); |
| 466 | |
| 467 | gpio_set_dir(enable_gpio.pin_id, 2); |
| 468 | } |
| 469 | |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 470 | if (platform_is_sdm439() || platform_is_sdm429()) { |
| 471 | /* enable PM GPIO-4 for backlight enable */ |
| 472 | struct pm8x41_gpio gpio_param = { |
| 473 | .direction = PM_GPIO_DIR_OUT, |
| 474 | .function = PM_GPIO_FUNC_HIGH, |
| 475 | .vin_sel = 0, /* VIN_0 */ |
| 476 | .pull = PM_GPIO_NO_PULL, |
| 477 | .output_buffer = PM_GPIO_OUT_CMOS, |
| 478 | .out_strength = PM_GPIO_OUT_DRIVE_HIGH, |
| 479 | }; |
| 480 | |
| 481 | dprintf(SPEW, "%s: gpio=%d enable=%d\n", __func__, |
| 482 | bkl_en_gpio.pin_id, enable); |
| 483 | |
| 484 | pm8x41_gpio_config(bkl_en_gpio.pin_id, &gpio_param); |
| 485 | } else { |
| 486 | gpio_tlmm_config(bkl_gpio.pin_id, 0, |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 487 | bkl_gpio.pin_direction, bkl_gpio.pin_pull, |
| 488 | bkl_gpio.pin_strength, bkl_gpio.pin_state); |
| 489 | |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 490 | gpio_set_dir(bkl_gpio.pin_id, 2); |
| 491 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 492 | |
| 493 | gpio_tlmm_config(reset_gpio.pin_id, 0, |
| 494 | reset_gpio.pin_direction, reset_gpio.pin_pull, |
| 495 | reset_gpio.pin_strength, reset_gpio.pin_state); |
| 496 | |
| 497 | gpio_set_dir(reset_gpio.pin_id, 2); |
| 498 | |
| 499 | /* reset */ |
| 500 | for (int i = 0; i < RESET_GPIO_SEQ_LEN; i++) { |
| 501 | if (resetseq->pin_state[i] == GPIO_STATE_LOW) |
| 502 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_LOW); |
| 503 | else |
| 504 | gpio_set_dir(reset_gpio.pin_id, GPIO_STATE_HIGH); |
| 505 | mdelay(resetseq->sleep[i]); |
| 506 | } |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 507 | |
| 508 | if (platform_is_msm8956()) { |
| 509 | gpio_tlmm_config(lcd_mode_gpio.pin_id, 0, |
| 510 | lcd_mode_gpio.pin_direction, lcd_mode_gpio.pin_pull, |
| 511 | lcd_mode_gpio.pin_strength, lcd_mode_gpio.pin_state); |
| 512 | |
| 513 | if (pinfo->lcdc.split_display || pinfo->lcdc.dst_split) |
| 514 | gpio_set_dir(lcd_mode_gpio.pin_id, GPIO_STATE_LOW); |
| 515 | else |
| 516 | gpio_set_dir(lcd_mode_gpio.pin_id, GPIO_STATE_HIGH); |
| 517 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 518 | } else if(!target_cont_splash_screen()) { |
| 519 | gpio_set_dir(reset_gpio.pin_id, 0); |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 520 | if (pinfo->mipi.use_enable_gpio && !platform_is_msm8956()) |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 521 | gpio_set_dir(enable_gpio.pin_id, 0); |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 522 | if (platform_is_msm8956()) |
| 523 | gpio_set_dir(lcd_mode_gpio.pin_id, 0); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 524 | } |
| 525 | |
| 526 | return ret; |
| 527 | } |
| 528 | |
Sandeep Panda | aa4ea2f | 2016-07-05 13:52:25 +0530 | [diff] [blame] | 529 | static int wled_init(struct msm_panel_info *pinfo) |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 530 | { |
| 531 | struct qpnp_wled_config_data config = {0}; |
| 532 | struct labibb_desc *labibb; |
| 533 | int display_type = 0; |
Vishnuvardhan Prodduturi | 4aa8dc4 | 2015-10-20 21:20:43 +0530 | [diff] [blame] | 534 | bool swire_control = 0; |
| 535 | bool wled_avdd_control = 0; |
Sandeep Panda | aa4ea2f | 2016-07-05 13:52:25 +0530 | [diff] [blame] | 536 | int rc = NO_ERROR; |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 537 | uint32_t pmic_type = target_get_pmic(); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 538 | |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 539 | if(pmic_type == PMIC_IS_PM8916) |
| 540 | return NO_ERROR; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 541 | labibb = pinfo->labibb; |
| 542 | |
| 543 | if (labibb) |
| 544 | display_type = labibb->amoled_panel; |
| 545 | |
Vishnuvardhan Prodduturi | 4aa8dc4 | 2015-10-20 21:20:43 +0530 | [diff] [blame] | 546 | if (display_type) { |
| 547 | swire_control = labibb->swire_control; |
| 548 | wled_avdd_control = true; |
| 549 | } else { |
| 550 | swire_control = false; |
| 551 | wled_avdd_control = false; |
| 552 | } |
| 553 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 554 | config.display_type = display_type; |
| 555 | config.lab_init_volt = 4600000; /* fixed, see pmi register */ |
| 556 | config.ibb_init_volt = 1400000; /* fixed, see pmi register */ |
Vishnuvardhan Prodduturi | 4aa8dc4 | 2015-10-20 21:20:43 +0530 | [diff] [blame] | 557 | config.lab_ibb_swire_control = swire_control; |
| 558 | config.wled_avdd_control = wled_avdd_control; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 559 | |
Vishnuvardhan Prodduturi | 4aa8dc4 | 2015-10-20 21:20:43 +0530 | [diff] [blame] | 560 | if(!swire_control) { |
| 561 | if (labibb && labibb->force_config) { |
| 562 | config.lab_min_volt = labibb->lab_min_volt; |
| 563 | config.lab_max_volt = labibb->lab_max_volt; |
| 564 | config.ibb_min_volt = labibb->ibb_min_volt; |
| 565 | config.ibb_max_volt = labibb->ibb_max_volt; |
| 566 | config.pwr_up_delay = labibb->pwr_up_delay; |
| 567 | config.pwr_down_delay = labibb->pwr_down_delay; |
| 568 | config.ibb_discharge_en = labibb->ibb_discharge_en; |
| 569 | } else { |
| 570 | /* default */ |
| 571 | config.pwr_up_delay = 3; |
| 572 | config.pwr_down_delay = 3; |
| 573 | config.ibb_discharge_en = 1; |
| 574 | if (display_type) { /* amoled */ |
| 575 | config.lab_min_volt = 4600000; |
| 576 | config.lab_max_volt = 4600000; |
| 577 | config.ibb_min_volt = 4000000; |
| 578 | config.ibb_max_volt = 4000000; |
| 579 | } else { /* lcd */ |
| 580 | config.lab_min_volt = 5500000; |
| 581 | config.lab_max_volt = 5500000; |
| 582 | config.ibb_min_volt = 5500000; |
| 583 | config.ibb_max_volt = 5500000; |
| 584 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 585 | } |
| 586 | } |
| 587 | |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 588 | if (pmic_type == PMIC_IS_PMI632) { |
Narender Ankam | bf2e2dd | 2018-05-30 17:48:11 +0530 | [diff] [blame] | 589 | config.pwr_up_delay = 1; |
| 590 | config.pwr_down_delay = 0; |
| 591 | } |
| 592 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 593 | dprintf(SPEW, "%s: %d %d %d %d %d %d %d %d %d %d\n", __func__, |
| 594 | config.display_type, |
| 595 | config.lab_min_volt, config.lab_max_volt, |
| 596 | config.ibb_min_volt, config.ibb_max_volt, |
| 597 | config.lab_init_volt, config.ibb_init_volt, |
| 598 | config.pwr_up_delay, config.pwr_down_delay, |
| 599 | config.ibb_discharge_en); |
| 600 | |
| 601 | /* QPNP WLED init for display backlight */ |
| 602 | pm8x41_wled_config_slave_id(PMIC_WLED_SLAVE_ID); |
| 603 | |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 604 | if (pmic_type == PMIC_IS_PMI632) |
Umang Agrawal | d193994 | 2018-02-13 16:23:58 +0530 | [diff] [blame] | 605 | rc = qpnp_lcdb_init(&config); |
| 606 | else |
| 607 | rc = qpnp_wled_init(&config); |
Sandeep Panda | aa4ea2f | 2016-07-05 13:52:25 +0530 | [diff] [blame] | 608 | |
| 609 | return rc; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 610 | } |
| 611 | |
Dhaval Patel | 7709c41 | 2015-05-12 10:09:41 -0700 | [diff] [blame] | 612 | int target_dsi_phy_config(struct mdss_dsi_phy_ctrl *phy_db) |
| 613 | { |
| 614 | memcpy(phy_db->regulator, panel_regulator_settings, REGULATOR_SIZE); |
| 615 | memcpy(phy_db->ctrl, panel_physical_ctrl, PHYSICAL_SIZE); |
| 616 | memcpy(phy_db->strength, panel_strength_ctrl, STRENGTH_SIZE); |
| 617 | memcpy(phy_db->bistCtrl, panel_bist_ctrl, BIST_SIZE); |
| 618 | memcpy(phy_db->laneCfg, panel_lane_config, LANE_SIZE); |
| 619 | return NO_ERROR; |
| 620 | } |
| 621 | |
Padmanabhan Komanduru | b338193 | 2015-06-15 22:14:02 +0530 | [diff] [blame] | 622 | int target_display_get_base_offset(uint32_t base) |
| 623 | { |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 624 | if (platform_is_sdm439() || platform_is_sdm429()) { |
| 625 | if (base == MIPI_DSI0_BASE) |
| 626 | return DSI0_BASE_ADJUST; |
| 627 | else if (base == DSI0_PHY_BASE) |
| 628 | return DSI0_PHY_BASE_ADJUST; |
| 629 | else if (base == DSI0_PLL_BASE) |
| 630 | return DSI0_12NM_PHY_PLL_BASE_ADJUST; |
| 631 | else if (base == DSI1_PLL_BASE) |
| 632 | return DSI1_12NM_PHY_PLL_BASE_ADJUST; |
| 633 | } else if (platform_is_msm8956() || platform_is_msm8937() || |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 634 | platform_is_msm8917() || platform_is_qm215()) { |
Padmanabhan Komanduru | b338193 | 2015-06-15 22:14:02 +0530 | [diff] [blame] | 635 | if (base == MIPI_DSI0_BASE) |
| 636 | return DSI0_BASE_ADJUST; |
| 637 | else if (base == DSI0_PHY_BASE) |
| 638 | return DSI0_PHY_BASE_ADJUST; |
| 639 | else if (base == DSI0_PLL_BASE) |
| 640 | return DSI0_PHY_PLL_BASE_ADJUST; |
| 641 | else if (base == DSI0_REGULATOR_BASE) |
| 642 | return DSI0_PHY_REGULATOR_BASE_ADJUST; |
| 643 | } |
| 644 | |
| 645 | return 0; |
| 646 | } |
| 647 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 648 | int target_ldo_ctrl(uint8_t enable, struct msm_panel_info *pinfo) |
| 649 | { |
Sandeep Panda | aa4ea2f | 2016-07-05 13:52:25 +0530 | [diff] [blame] | 650 | int rc = 0; |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 651 | uint32_t ldo_num = REG_LDO6 | REG_LDO17; |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 652 | uint32_t pmic_type = target_get_pmic(); |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 653 | |
| 654 | if (platform_is_msm8956()) |
| 655 | ldo_num |= REG_LDO1; |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 656 | else if (platform_is_sdm439() || platform_is_sdm429()) |
| 657 | ldo_num |= REG_LDO5; /* LDO23 is enable by default */ |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 658 | else |
| 659 | ldo_num |= REG_LDO2; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 660 | |
| 661 | if (enable) { |
Padmanabhan Komanduru | 3cb0766 | 2015-06-08 17:13:33 +0530 | [diff] [blame] | 662 | regulator_enable(ldo_num); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 663 | mdelay(10); |
Frank Yi | 2b7e2b9 | 2018-04-25 16:24:45 +0800 | [diff] [blame] | 664 | if(!pinfo->disable_wled_labibb) { |
| 665 | rc = wled_init(pinfo); |
| 666 | if (rc) { |
| 667 | dprintf(CRITICAL, "%s: wled init failed\n", __func__); |
| 668 | return rc; |
| 669 | } |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 670 | if (pmic_type == PMIC_IS_PMI632) |
Frank Yi | 2b7e2b9 | 2018-04-25 16:24:45 +0800 | [diff] [blame] | 671 | rc = qpnp_lcdb_enable(true); |
Vishnuvardhan Prodduturi | a84a0e8 | 2018-10-25 12:55:55 +0530 | [diff] [blame] | 672 | else if(pmic_type != PMIC_IS_PM8916) |
Frank Yi | 2b7e2b9 | 2018-04-25 16:24:45 +0800 | [diff] [blame] | 673 | rc = qpnp_ibb_enable(true); /*5V boost*/ |
| 674 | if (rc) { |
| 675 | dprintf(CRITICAL, "%s: qpnp_ibb/lcdb failed\n", __func__); |
| 676 | return rc; |
| 677 | } |
| 678 | mdelay(50); |
Sandeep Panda | aa4ea2f | 2016-07-05 13:52:25 +0530 | [diff] [blame] | 679 | } |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 680 | } else { |
Padmanabhan Komanduru | fa2899b | 2015-06-30 16:25:33 +0530 | [diff] [blame] | 681 | /* |
Padmanabhan Komanduru | 2ab03a6 | 2018-05-17 14:38:59 +0530 | [diff] [blame] | 682 | * LDO1, LDO2, LDO5 and LDO6 are shared with other subsystems. |
Padmanabhan Komanduru | fa2899b | 2015-06-30 16:25:33 +0530 | [diff] [blame] | 683 | * Do not disable them. |
| 684 | */ |
| 685 | regulator_disable(REG_LDO17); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 686 | } |
| 687 | |
| 688 | return NO_ERROR; |
| 689 | } |
| 690 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 691 | bool target_display_panel_node(char *pbuf, uint16_t buf_size) |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 692 | { |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 693 | int prefix_string_len = strlen(DISPLAY_CMDLINE_PREFIX); |
| 694 | bool ret = true; |
| 695 | struct oem_panel_data oem = mdss_dsi_get_oem_data(); |
| 696 | uint32_t platform_subtype = board_hardware_subtype(); |
Sachin Bhayare | 0ad7277 | 2018-03-22 19:11:29 +0530 | [diff] [blame] | 697 | uint32_t platform = board_platform_id(); |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 698 | |
| 699 | /* default to hdmi for apq iot */ |
Sachin Bhayare | 0ad7277 | 2018-03-22 19:11:29 +0530 | [diff] [blame] | 700 | if ((APQ8017 == platform) && ((HW_PLATFORM_SUBTYPE_SAP == platform_subtype) || |
| 701 | (HW_PLATFORM_SUBTYPE_SAP_NOPMI == platform_subtype))) { |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 702 | if (!strcmp(oem.panel, "")) { |
| 703 | if (buf_size < (prefix_string_len + |
| 704 | strlen(HDMI_ADV_PANEL_STRING))) { |
| 705 | dprintf(CRITICAL, "HDMI command line argument \ |
| 706 | is greater than buffer size\n"); |
| 707 | return false; |
| 708 | } |
| 709 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 710 | buf_size -= prefix_string_len; |
| 711 | pbuf += prefix_string_len; |
| 712 | strlcpy(pbuf, HDMI_ADV_PANEL_STRING, buf_size); |
| 713 | } else if (!strcmp(oem.panel, TRULY_720P_VID_PANEL)) { |
| 714 | if (buf_size < (prefix_string_len + |
| 715 | strlen(TRULY_VID_PANEL_STRING))) { |
| 716 | dprintf(CRITICAL, "TRULY VIDEO command line \ |
| 717 | argument is greater than \ |
| 718 | buffer size\n"); |
| 719 | return false; |
| 720 | } |
| 721 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 722 | buf_size -= prefix_string_len; |
| 723 | pbuf += prefix_string_len; |
| 724 | strlcpy(pbuf, TRULY_VID_PANEL_STRING, buf_size); |
| 725 | } else if (!strcmp(oem.panel, TRULY_720P_CMD_PANEL)) { |
| 726 | if (buf_size < (prefix_string_len + |
| 727 | strlen(TRULY_CMD_PANEL_STRING))) { |
| 728 | dprintf(CRITICAL, "TRULY CMD command line argument \ |
| 729 | argument is greater than \ |
| 730 | buffer size\n"); |
| 731 | return false; |
| 732 | } |
| 733 | strlcpy(pbuf, DISPLAY_CMDLINE_PREFIX, buf_size); |
| 734 | buf_size -= prefix_string_len; |
| 735 | pbuf += prefix_string_len; |
| 736 | strlcpy(pbuf, TRULY_CMD_PANEL_STRING, buf_size); |
| 737 | } |
| 738 | } else { |
| 739 | ret = gcdb_display_cmdline_arg(pbuf, buf_size); |
| 740 | } |
| 741 | |
| 742 | return ret; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 743 | } |
| 744 | |
| 745 | void target_display_init(const char *panel_name) |
| 746 | { |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 747 | struct oem_panel_data oem; |
Ray Zhang | f95f5b9 | 2015-06-25 15:34:29 +0800 | [diff] [blame] | 748 | int32_t ret = 0; |
| 749 | uint32_t panel_loop = 0; |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 750 | uint32_t platform_subtype = board_hardware_subtype(); |
Sachin Bhayare | 0ad7277 | 2018-03-22 19:11:29 +0530 | [diff] [blame] | 751 | uint32_t platform = board_platform_id(); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 752 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 753 | set_panel_cmd_string(panel_name); |
| 754 | oem = mdss_dsi_get_oem_data(); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 755 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 756 | if (!strcmp(oem.panel, NO_PANEL_CONFIG) |
| 757 | || !strcmp(oem.panel, SIM_VIDEO_PANEL) |
| 758 | || !strcmp(oem.panel, SIM_CMD_PANEL) |
| 759 | || oem.skip) { |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 760 | dprintf(INFO, "Selected panel: %s\nSkip panel configuration\n", |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 761 | oem.panel); |
Vishnuvardhan Prodduturi | 4cd5638 | 2017-08-22 21:46:38 +0530 | [diff] [blame] | 762 | oem.cont_splash = false; |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 763 | } |
| 764 | |
Sachin Bhayare | 0ad7277 | 2018-03-22 19:11:29 +0530 | [diff] [blame] | 765 | if ((APQ8017 == platform) && ((HW_PLATFORM_SUBTYPE_SAP == platform_subtype) || |
| 766 | (HW_PLATFORM_SUBTYPE_SAP_NOPMI == platform_subtype))) { |
Ashish Garg | 9cfd6ca | 2016-12-20 01:41:54 +0530 | [diff] [blame] | 767 | dprintf(INFO, "%s: Platform subtype %d\n", |
| 768 | __func__, platform_subtype); |
| 769 | return; |
| 770 | } |
| 771 | |
Ray Zhang | f95f5b9 | 2015-06-25 15:34:29 +0800 | [diff] [blame] | 772 | do { |
| 773 | target_force_cont_splash_disable(false); |
| 774 | ret = gcdb_display_init(oem.panel, MDP_REV_50, (void *)MIPI_FB_ADDR); |
| 775 | if (!ret || ret == ERR_NOT_SUPPORTED) { |
| 776 | break; |
| 777 | } else { |
| 778 | target_force_cont_splash_disable(true); |
| 779 | msm_display_off(); |
| 780 | } |
| 781 | } while (++panel_loop <= oem_panel_max_auto_detect_panels()); |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 782 | |
Padmanabhan Komanduru | bccbcdc | 2015-06-30 16:19:24 +0530 | [diff] [blame] | 783 | if (!oem.cont_splash) { |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 784 | dprintf(INFO, "Forcing continuous splash disable\n"); |
| 785 | target_force_cont_splash_disable(true); |
| 786 | } |
| 787 | } |
| 788 | |
| 789 | void target_display_shutdown(void) |
| 790 | { |
| 791 | gcdb_display_shutdown(); |
| 792 | } |