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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_PROCESSOR_H
2#define _ASM_X86_PROCESSOR_H
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +01003
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01004#include <asm/processor-flags.h>
5
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +01006/* Forward declaration, a strange C thing */
7struct task_struct;
8struct mm_struct;
Brian Gerst9fda6a02015-07-29 01:41:16 -04009struct vm86;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +010010
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010011#include <asm/math_emu.h>
12#include <asm/segment.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010013#include <asm/types.h>
Ingo Molnardecb4c42015-09-05 09:32:43 +020014#include <uapi/asm/sigcontext.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010015#include <asm/current.h>
Borislav Petkovcd4d09e2016-01-26 22:12:04 +010016#include <asm/cpufeatures.h>
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010017#include <asm/page.h>
Jeremy Fitzhardinge54321d92009-02-11 10:20:05 -080018#include <asm/pgtable_types.h>
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +010019#include <asm/percpu.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010020#include <asm/msr.h>
21#include <asm/desc_defs.h>
Andi Kleenbd616432008-01-30 13:32:38 +010022#include <asm/nops.h>
David Howellsf05e7982012-03-28 18:11:12 +010023#include <asm/special_insns.h>
Ingo Molnar14b96752015-04-22 09:57:24 +020024#include <asm/fpu/types.h>
Ingo Molnar4d46a892008-02-21 04:24:40 +010025
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010026#include <linux/personality.h>
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010027#include <linux/cache.h>
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +010028#include <linux/threads.h>
Peter Zijlstra5cbc19a2009-09-02 11:49:52 +020029#include <linux/math64.h>
Peter Zijlstrafaa46022010-03-25 14:51:50 +010030#include <linux/err.h>
David Howellsf05e7982012-03-28 18:11:12 +010031#include <linux/irqflags.h>
32
33/*
34 * We handle most unaligned accesses in hardware. On the other hand
35 * unaligned DMA can be quite expensive on some Nehalem processors.
36 *
37 * Based on this we disable the IP header alignment in network drivers.
38 */
39#define NET_IP_ALIGN 0
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +010040
K.Prasadb332828c2009-06-01 23:43:10 +053041#define HBP_NUM 4
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010042/*
43 * Default implementation of macro that returns current
44 * instruction pointer ("program counter").
45 */
46static inline void *current_text_addr(void)
47{
48 void *pc;
Ingo Molnar4d46a892008-02-21 04:24:40 +010049
50 asm volatile("mov $1f, %0; 1:":"=r" (pc));
51
Glauber de Oliveira Costa0ccb8ac2008-01-30 13:31:27 +010052 return pc;
53}
54
Ingo Molnarb8c1b8ea2015-05-24 09:58:12 +020055/*
56 * These alignment constraints are for performance in the vSMP case,
57 * but in the task_struct case we must also meet hardware imposed
58 * alignment requirements of the FPU state:
59 */
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010060#ifdef CONFIG_X86_VSMP
Ingo Molnar4d46a892008-02-21 04:24:40 +010061# define ARCH_MIN_TASKALIGN (1 << INTERNODE_CACHE_SHIFT)
62# define ARCH_MIN_MMSTRUCT_ALIGN (1 << INTERNODE_CACHE_SHIFT)
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010063#else
Ingo Molnarb8c1b8ea2015-05-24 09:58:12 +020064# define ARCH_MIN_TASKALIGN __alignof__(union fpregs_state)
Ingo Molnar4d46a892008-02-21 04:24:40 +010065# define ARCH_MIN_MMSTRUCT_ALIGN 0
Glauber de Oliveira Costadbcb4662008-01-30 13:31:31 +010066#endif
67
Alex Shie0ba94f2012-06-28 09:02:16 +080068enum tlb_infos {
69 ENTRIES,
70 NR_INFO
71};
72
73extern u16 __read_mostly tlb_lli_4k[NR_INFO];
74extern u16 __read_mostly tlb_lli_2m[NR_INFO];
75extern u16 __read_mostly tlb_lli_4m[NR_INFO];
76extern u16 __read_mostly tlb_lld_4k[NR_INFO];
77extern u16 __read_mostly tlb_lld_2m[NR_INFO];
78extern u16 __read_mostly tlb_lld_4m[NR_INFO];
Kirill A. Shutemovdd360392013-12-23 14:16:58 +020079extern u16 __read_mostly tlb_lld_1g[NR_INFO];
Alex Shic4211f42012-06-28 09:02:19 +080080
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010081/*
82 * CPU type and hardware bug flags. Kept separately for each CPU.
83 * Members of this structure are referenced in head.S, so think twice
84 * before touching them. [mj]
85 */
86
87struct cpuinfo_x86 {
Ingo Molnar4d46a892008-02-21 04:24:40 +010088 __u8 x86; /* CPU family */
89 __u8 x86_vendor; /* CPU vendor */
90 __u8 x86_model;
91 __u8 x86_mask;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010092#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +010093 char wp_works_ok; /* It doesn't on 386's */
94
95 /* Problems on some 486Dx4's and old 386's: */
Ingo Molnar4d46a892008-02-21 04:24:40 +010096 char rfu;
Ingo Molnar4d46a892008-02-21 04:24:40 +010097 char pad0;
H. Peter Anvin60e019e2013-04-29 16:04:20 +020098 char pad1;
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +010099#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100100 /* Number of 4K pages in DTLB/ITLB combined(in pages): */
H. Peter Anvinb1882e62009-01-23 17:18:52 -0800101 int x86_tlbsize;
Jan Beulich13c6c532009-03-12 12:37:34 +0000102#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100103 __u8 x86_virt_bits;
104 __u8 x86_phys_bits;
105 /* CPUID returned core id bits: */
106 __u8 x86_coreid_bits;
107 /* Max extended CPUID function supported: */
108 __u32 extended_cpuid_level;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100109 /* Maximum supported CPUID level, -1=no CPUID: */
110 int cpuid_level;
Borislav Petkov65fc9852013-03-20 15:07:23 +0100111 __u32 x86_capability[NCAPINTS + NBUGINTS];
Ingo Molnar4d46a892008-02-21 04:24:40 +0100112 char x86_vendor_id[16];
113 char x86_model_id[64];
114 /* in KB - valid for CPUS which support this call: */
115 int x86_cache_size;
116 int x86_cache_alignment; /* In bytes */
Peter P Waskiewicz Jrcbc82b12015-01-23 18:45:43 +0000117 /* Cache QoS architectural values: */
118 int x86_cache_max_rmid; /* max index */
119 int x86_cache_occ_scale; /* scale to bytes */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100120 int x86_power;
121 unsigned long loops_per_jiffy;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100122 /* cpuid returned max cores value: */
123 u16 x86_max_cores;
124 u16 apicid;
Yinghai Lu01aaea12008-03-06 13:46:39 -0800125 u16 initial_apicid;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100126 u16 x86_clflush_size;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100127 /* number of cores as seen by the OS: */
128 u16 booted_cores;
129 /* Physical processor id: */
130 u16 phys_proc_id;
Thomas Gleixner1f12e322016-02-22 22:19:15 +0000131 /* Logical processor id: */
132 u16 logical_proc_id;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100133 /* Core id: */
134 u16 cpu_core_id;
135 /* Index into per_cpu list: */
136 u16 cpu_index;
Andi Kleen506ed6b2011-10-12 17:46:33 -0700137 u32 microcode;
Jan Beulich2c773dd2014-11-04 08:26:42 +0000138};
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100139
He Chen47f10a32016-11-11 17:25:34 +0800140struct cpuid_regs {
141 u32 eax, ebx, ecx, edx;
142};
143
144enum cpuid_regs_idx {
145 CPUID_EAX = 0,
146 CPUID_EBX,
147 CPUID_ECX,
148 CPUID_EDX,
149};
150
Ingo Molnar4d46a892008-02-21 04:24:40 +0100151#define X86_VENDOR_INTEL 0
152#define X86_VENDOR_CYRIX 1
153#define X86_VENDOR_AMD 2
154#define X86_VENDOR_UMC 3
Ingo Molnar4d46a892008-02-21 04:24:40 +0100155#define X86_VENDOR_CENTAUR 5
156#define X86_VENDOR_TRANSMETA 7
157#define X86_VENDOR_NSC 8
158#define X86_VENDOR_NUM 9
159
160#define X86_VENDOR_UNKNOWN 0xff
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100161
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100162/*
163 * capabilities of CPUs
164 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100165extern struct cpuinfo_x86 boot_cpu_data;
166extern struct cpuinfo_x86 new_cpu_data;
167
168extern struct tss_struct doublefault_tss;
Yinghai Lu3e0c3732009-05-09 23:47:42 -0700169extern __u32 cpu_caps_cleared[NCAPINTS];
170extern __u32 cpu_caps_set[NCAPINTS];
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100171
172#ifdef CONFIG_SMP
Jan Beulich2c773dd2014-11-04 08:26:42 +0000173DECLARE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100174#define cpu_data(cpu) per_cpu(cpu_info, cpu)
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100175#else
Tejun Heo7b543a52010-12-18 16:30:05 +0100176#define cpu_info boot_cpu_data
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100177#define cpu_data(cpu) boot_cpu_data
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100178#endif
179
Jaswinder Singh1c6c7272008-07-21 22:40:37 +0530180extern const struct seq_operations cpuinfo_op;
181
Ingo Molnar4d46a892008-02-21 04:24:40 +0100182#define cache_line_size() (boot_cpu_data.x86_cache_alignment)
183
184extern void cpu_detect(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100185
Yinghai Luf5803662008-06-21 03:24:19 -0700186extern void early_cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100187extern void identify_boot_cpu(void);
188extern void identify_secondary_cpu(struct cpuinfo_x86 *);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100189extern void print_cpu_info(struct cpuinfo_x86 *);
Yinghai Lu21c3fcf2012-02-12 09:53:57 -0800190void print_cpu_msr(struct cpuinfo_x86 *);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100191extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
192extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
Andreas Herrmann04a15412012-10-19 10:59:33 +0200193extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa5300db82008-01-30 13:31:33 +0100194
Suresh Siddhabbb65d22008-08-23 17:47:10 +0200195extern void detect_extended_topology(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100196extern void detect_ht(struct cpuinfo_x86 *c);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100197
Fenghua Yud288e1c2012-12-20 23:44:23 -0800198#ifdef CONFIG_X86_32
199extern int have_cpuid_p(void);
200#else
201static inline int have_cpuid_p(void)
202{
203 return 1;
204}
205#endif
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100206static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
Ingo Molnar4d46a892008-02-21 04:24:40 +0100207 unsigned int *ecx, unsigned int *edx)
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100208{
209 /* ecx is often an input as well as an output. */
Suresh Siddha45a94d72009-12-16 16:25:42 -0800210 asm volatile("cpuid"
Joe Perchescca2e6f2008-03-23 01:03:15 -0700211 : "=a" (*eax),
212 "=b" (*ebx),
213 "=c" (*ecx),
214 "=d" (*edx)
Andi Kleen506ed6b2011-10-12 17:46:33 -0700215 : "0" (*eax), "2" (*ecx)
216 : "memory");
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100217}
218
Glauber de Oliveira Costac72dcf82008-01-30 13:31:27 +0100219static inline void load_cr3(pgd_t *pgdir)
220{
221 write_cr3(__pa(pgdir));
222}
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100223
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200224#ifdef CONFIG_X86_32
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100225/* This is the TSS defined by the hardware. */
226struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100227 unsigned short back_link, __blh;
228 unsigned long sp0;
229 unsigned short ss0, __ss0h;
Andy Lutomirskicf9328c2015-04-02 12:41:45 -0700230 unsigned long sp1;
Andy Lutomirski76e4c492015-03-10 11:06:00 -0700231
232 /*
Andy Lutomirskicf9328c2015-04-02 12:41:45 -0700233 * We don't use ring 1, so ss1 is a convenient scratch space in
234 * the same cacheline as sp0. We use ss1 to cache the value in
235 * MSR_IA32_SYSENTER_CS. When we context switch
236 * MSR_IA32_SYSENTER_CS, we first check if the new value being
237 * written matches ss1, and, if it's not, then we wrmsr the new
238 * value and update ss1.
Andy Lutomirski76e4c492015-03-10 11:06:00 -0700239 *
Andy Lutomirskicf9328c2015-04-02 12:41:45 -0700240 * The only reason we context switch MSR_IA32_SYSENTER_CS is
241 * that we set it to zero in vm86 tasks to avoid corrupting the
242 * stack if we were to go through the sysenter path from vm86
243 * mode.
Andy Lutomirski76e4c492015-03-10 11:06:00 -0700244 */
Andy Lutomirski76e4c492015-03-10 11:06:00 -0700245 unsigned short ss1; /* MSR_IA32_SYSENTER_CS */
246
247 unsigned short __ss1h;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100248 unsigned long sp2;
249 unsigned short ss2, __ss2h;
250 unsigned long __cr3;
251 unsigned long ip;
252 unsigned long flags;
253 unsigned long ax;
254 unsigned long cx;
255 unsigned long dx;
256 unsigned long bx;
257 unsigned long sp;
258 unsigned long bp;
259 unsigned long si;
260 unsigned long di;
261 unsigned short es, __esh;
262 unsigned short cs, __csh;
263 unsigned short ss, __ssh;
264 unsigned short ds, __dsh;
265 unsigned short fs, __fsh;
266 unsigned short gs, __gsh;
267 unsigned short ldt, __ldth;
268 unsigned short trace;
269 unsigned short io_bitmap_base;
270
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100271} __attribute__((packed));
272#else
273struct x86_hw_tss {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100274 u32 reserved1;
275 u64 sp0;
276 u64 sp1;
277 u64 sp2;
278 u64 reserved2;
279 u64 ist[7];
280 u32 reserved3;
281 u32 reserved4;
282 u16 reserved5;
283 u16 io_bitmap_base;
284
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100285} __attribute__((packed)) ____cacheline_aligned;
286#endif
287
288/*
Ingo Molnar4d46a892008-02-21 04:24:40 +0100289 * IO-bitmap sizes:
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100290 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100291#define IO_BITMAP_BITS 65536
292#define IO_BITMAP_BYTES (IO_BITMAP_BITS/8)
293#define IO_BITMAP_LONGS (IO_BITMAP_BYTES/sizeof(long))
294#define IO_BITMAP_OFFSET offsetof(struct tss_struct, io_bitmap)
295#define INVALID_IO_BITMAP_OFFSET 0x8000
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100296
297struct tss_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100298 /*
299 * The hardware state:
300 */
301 struct x86_hw_tss x86_tss;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100302
303 /*
304 * The extra 1 is there because the CPU will access an
305 * additional byte beyond the end of the IO permission
306 * bitmap. The extra byte must be all 1 bits, and must
307 * be within the limit.
308 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100309 unsigned long io_bitmap[IO_BITMAP_LONGS + 1];
Ingo Molnar4d46a892008-02-21 04:24:40 +0100310
Andy Lutomirski6dcc9412016-03-09 19:00:31 -0800311#ifdef CONFIG_X86_32
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100312 /*
Andy Lutomirski2a41aa42016-03-09 19:00:33 -0800313 * Space for the temporary SYSENTER stack.
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100314 */
Andy Lutomirski2a41aa42016-03-09 19:00:33 -0800315 unsigned long SYSENTER_stack_canary;
Denys Vlasenkod828c712015-03-09 15:52:18 +0100316 unsigned long SYSENTER_stack[64];
Andy Lutomirski6dcc9412016-03-09 19:00:31 -0800317#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100318
Richard Kennedy84e65b02008-07-04 13:56:16 +0100319} ____cacheline_aligned;
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100320
Andy Lutomirski24933b82015-03-05 19:19:05 -0800321DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
Glauber de Oliveira Costaca241c72008-01-30 13:31:31 +0100322
Andy Lutomirskia7fcf282015-03-06 17:50:19 -0800323#ifdef CONFIG_X86_32
324DECLARE_PER_CPU(unsigned long, cpu_current_top_of_stack);
325#endif
326
Ingo Molnar4d46a892008-02-21 04:24:40 +0100327/*
328 * Save the original ist values for checking stack pointers during debugging
329 */
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100330struct orig_ist {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100331 unsigned long ist[7];
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100332};
333
Glauber Costafe676202008-03-03 14:12:56 -0300334#ifdef CONFIG_X86_64
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100335DECLARE_PER_CPU(struct orig_ist, orig_ist);
Brian Gerst26f80bd2009-01-19 00:38:58 +0900336
Brian Gerst947e76c2009-01-19 12:21:28 +0900337union irq_stack_union {
338 char irq_stack[IRQ_STACK_SIZE];
339 /*
340 * GCC hardcodes the stack canary as %gs:40. Since the
341 * irq_stack is the object at %gs:0, we reserve the bottom
342 * 48 bytes of the irq stack for the canary.
343 */
344 struct {
345 char gs_base[40];
346 unsigned long stack_canary;
347 };
348};
349
Andi Kleen277d5b42013-08-05 15:02:43 -0700350DECLARE_PER_CPU_FIRST(union irq_stack_union, irq_stack_union) __visible;
Brian Gerst2add8e22009-02-08 09:58:39 -0500351DECLARE_INIT_PER_CPU(irq_stack_union);
352
Brian Gerst26f80bd2009-01-19 00:38:58 +0900353DECLARE_PER_CPU(char *, irq_stack_ptr);
Jaswinder Singh Rajput9766cdb2009-03-14 11:19:49 +0530354DECLARE_PER_CPU(unsigned int, irq_count);
Jaswinder Singh Rajput9766cdb2009-03-14 11:19:49 +0530355extern asmlinkage void ignore_sysret(void);
Tejun Heo60a53172009-02-09 22:17:40 +0900356#else /* X86_64 */
357#ifdef CONFIG_CC_STACKPROTECTOR
Jeremy Fitzhardinge1ea0d142009-09-03 12:27:15 -0700358/*
359 * Make sure stack canary segment base is cached-aligned:
360 * "For Intel Atom processors, avoid non zero segment base address
361 * that is not aligned to cache line boundary at all cost."
362 * (Optim Ref Manual Assembly/Compiler Coding Rule 15.)
363 */
364struct stack_canary {
365 char __pad[20]; /* canary at %gs:20 */
366 unsigned long canary;
367};
Jeremy Fitzhardinge53f82452009-09-03 14:31:44 -0700368DECLARE_PER_CPU_ALIGNED(struct stack_canary, stack_canary);
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200369#endif
Steven Rostedt198d2082014-02-06 09:41:31 -0500370/*
371 * per-CPU IRQ handling stacks
372 */
373struct irq_stack {
374 u32 stack[THREAD_SIZE/sizeof(u32)];
375} __aligned(THREAD_SIZE);
376
377DECLARE_PER_CPU(struct irq_stack *, hardirq_stack);
378DECLARE_PER_CPU(struct irq_stack *, softirq_stack);
Tejun Heo60a53172009-02-09 22:17:40 +0900379#endif /* X86_64 */
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100380
Fenghua Yubf15a8c2016-05-20 10:47:06 -0700381extern unsigned int fpu_kernel_xstate_size;
Fenghua Yua1141e02016-05-20 10:47:05 -0700382extern unsigned int fpu_user_xstate_size;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100383
Frederic Weisbecker24f1e32c2009-09-09 19:22:48 +0200384struct perf_event;
385
Andy Lutomirski13d4ea02016-07-14 13:22:57 -0700386typedef struct {
387 unsigned long seg;
388} mm_segment_t;
389
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100390struct thread_struct {
Ingo Molnar4d46a892008-02-21 04:24:40 +0100391 /* Cached TLS descriptors: */
392 struct desc_struct tls_array[GDT_ENTRY_TLS_ENTRIES];
393 unsigned long sp0;
394 unsigned long sp;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100395#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100396 unsigned long sysenter_cs;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100397#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100398 unsigned short es;
399 unsigned short ds;
400 unsigned short fsindex;
401 unsigned short gsindex;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100402#endif
Andy Lutomirskib9d989c2016-09-13 14:29:21 -0700403
404 u32 status; /* thread synchronous flags */
405
Alexey Dobriyand756f4ad2009-05-04 03:29:52 +0400406#ifdef CONFIG_X86_64
Andy Lutomirski296f7812016-04-26 12:23:29 -0700407 unsigned long fsbase;
408 unsigned long gsbase;
409#else
410 /*
411 * XXX: this could presumably be unsigned short. Alternatively,
412 * 32-bit kernels could be taught to use fsindex instead.
413 */
414 unsigned long fs;
415 unsigned long gs;
Alexey Dobriyand756f4ad2009-05-04 03:29:52 +0400416#endif
Ingo Molnarc5bedc62015-04-23 12:49:20 +0200417
Frederic Weisbecker24f1e32c2009-09-09 19:22:48 +0200418 /* Save middle states of ptrace breakpoints */
419 struct perf_event *ptrace_bps[HBP_NUM];
420 /* Debug status used for traps, single steps, etc... */
421 unsigned long debugreg6;
Frederic Weisbecker326264a2010-02-18 18:24:18 +0100422 /* Keep track of the exact dr7 value set by the user */
423 unsigned long ptrace_dr7;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100424 /* Fault info: */
425 unsigned long cr2;
Srikar Dronamraju51e7dc72012-03-12 14:55:55 +0530426 unsigned long trap_nr;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100427 unsigned long error_code;
Brian Gerst9fda6a02015-07-29 01:41:16 -0400428#ifdef CONFIG_VM86
Ingo Molnar4d46a892008-02-21 04:24:40 +0100429 /* Virtual 86 mode info */
Brian Gerst9fda6a02015-07-29 01:41:16 -0400430 struct vm86 *vm86;
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100431#endif
Ingo Molnar4d46a892008-02-21 04:24:40 +0100432 /* IO permissions: */
433 unsigned long *io_bitmap_ptr;
434 unsigned long iopl;
435 /* Max allowed port in the bitmap, in bytes: */
436 unsigned io_bitmap_max;
Dave Hansen0c8c0f02015-07-17 12:28:11 +0200437
Andy Lutomirski13d4ea02016-07-14 13:22:57 -0700438 mm_segment_t addr_limit;
439
Ingo Molnar2a53ccb2016-07-15 10:21:11 +0200440 unsigned int sig_on_uaccess_err:1;
Andy Lutomirskidfa9a942016-07-14 13:22:56 -0700441 unsigned int uaccess_err:1; /* uaccess failed */
442
Dave Hansen0c8c0f02015-07-17 12:28:11 +0200443 /* Floating point and extended processor state */
444 struct fpu fpu;
445 /*
446 * WARNING: 'fpu' is dynamically-sized. It *MUST* be at
447 * the end.
448 */
Glauber de Oliveira Costacb38d372008-01-30 13:31:31 +0100449};
450
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100451/*
Andy Lutomirskib9d989c2016-09-13 14:29:21 -0700452 * Thread-synchronous status.
453 *
454 * This is different from the flags in that nobody else
455 * ever touches our thread-synchronous status, so we don't
456 * have to worry about atomic accesses.
457 */
458#define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/
459
460/*
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100461 * Set IOPL bits in EFLAGS from given mask
462 */
463static inline void native_set_iopl_mask(unsigned mask)
464{
465#ifdef CONFIG_X86_32
466 unsigned int reg;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100467
Joe Perchescca2e6f2008-03-23 01:03:15 -0700468 asm volatile ("pushfl;"
469 "popl %0;"
470 "andl %1, %0;"
471 "orl %2, %0;"
472 "pushl %0;"
473 "popfl"
474 : "=&r" (reg)
475 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100476#endif
477}
478
Ingo Molnar4d46a892008-02-21 04:24:40 +0100479static inline void
480native_load_sp0(struct tss_struct *tss, struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100481{
482 tss->x86_tss.sp0 = thread->sp0;
483#ifdef CONFIG_X86_32
Ingo Molnar4d46a892008-02-21 04:24:40 +0100484 /* Only happens when SEP is enabled, no need to test "SEP"arately: */
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100485 if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
486 tss->x86_tss.ss1 = thread->sysenter_cs;
487 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
488 }
489#endif
490}
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100491
Glauber de Oliveira Costae801f862008-01-30 13:32:08 +0100492static inline void native_swapgs(void)
493{
494#ifdef CONFIG_X86_64
495 asm volatile("swapgs" ::: "memory");
496#endif
497}
498
Andy Lutomirskia7fcf282015-03-06 17:50:19 -0800499static inline unsigned long current_top_of_stack(void)
Andy Lutomirski8ef46a62015-03-05 19:19:02 -0800500{
Andy Lutomirskia7fcf282015-03-06 17:50:19 -0800501#ifdef CONFIG_X86_64
Andy Lutomirski24933b82015-03-05 19:19:05 -0800502 return this_cpu_read_stable(cpu_tss.x86_tss.sp0);
Andy Lutomirskia7fcf282015-03-06 17:50:19 -0800503#else
504 /* sp0 on x86_32 is special in and around vm86 mode. */
505 return this_cpu_read_stable(cpu_current_top_of_stack);
506#endif
Andy Lutomirski8ef46a62015-03-05 19:19:02 -0800507}
508
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100509#ifdef CONFIG_PARAVIRT
510#include <asm/paravirt.h>
511#else
Ingo Molnar4d46a892008-02-21 04:24:40 +0100512#define __cpuid native_cpuid
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100513
Joe Perchescca2e6f2008-03-23 01:03:15 -0700514static inline void load_sp0(struct tss_struct *tss,
515 struct thread_struct *thread)
Glauber de Oliveira Costa7818a1e2008-01-30 13:31:31 +0100516{
517 native_load_sp0(tss, thread);
518}
519
Glauber de Oliveira Costa62d7d7e2008-01-30 13:31:27 +0100520#define set_iopl_mask native_set_iopl_mask
Glauber de Oliveira Costa1b46cbe2008-01-30 13:31:27 +0100521#endif /* CONFIG_PARAVIRT */
522
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100523/* Free all resources held by a thread. */
524extern void release_thread(struct task_struct *);
525
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100526unsigned long get_wchan(struct task_struct *p);
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100527
528/*
529 * Generic CPUID function
530 * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
531 * resulting in stale register contents being returned.
532 */
533static inline void cpuid(unsigned int op,
534 unsigned int *eax, unsigned int *ebx,
535 unsigned int *ecx, unsigned int *edx)
536{
537 *eax = op;
538 *ecx = 0;
539 __cpuid(eax, ebx, ecx, edx);
540}
541
542/* Some CPUID calls want 'count' to be placed in ecx */
543static inline void cpuid_count(unsigned int op, int count,
544 unsigned int *eax, unsigned int *ebx,
545 unsigned int *ecx, unsigned int *edx)
546{
547 *eax = op;
548 *ecx = count;
549 __cpuid(eax, ebx, ecx, edx);
550}
551
552/*
553 * CPUID functions returning a single datum
554 */
555static inline unsigned int cpuid_eax(unsigned int op)
556{
557 unsigned int eax, ebx, ecx, edx;
558
559 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100560
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100561 return eax;
562}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100563
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100564static inline unsigned int cpuid_ebx(unsigned int op)
565{
566 unsigned int eax, ebx, ecx, edx;
567
568 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100569
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100570 return ebx;
571}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100572
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100573static inline unsigned int cpuid_ecx(unsigned int op)
574{
575 unsigned int eax, ebx, ecx, edx;
576
577 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100578
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100579 return ecx;
580}
Ingo Molnar4d46a892008-02-21 04:24:40 +0100581
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100582static inline unsigned int cpuid_edx(unsigned int op)
583{
584 unsigned int eax, ebx, ecx, edx;
585
586 cpuid(op, &eax, &ebx, &ecx, &edx);
Ingo Molnar4d46a892008-02-21 04:24:40 +0100587
Glauber de Oliveira Costac758ecf2008-01-30 13:31:03 +0100588 return edx;
589}
590
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100591/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
Denys Vlasenko0b101e62015-09-24 14:02:29 +0200592static __always_inline void rep_nop(void)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100593{
Joe Perchescca2e6f2008-03-23 01:03:15 -0700594 asm volatile("rep; nop" ::: "memory");
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100595}
596
Denys Vlasenko0b101e62015-09-24 14:02:29 +0200597static __always_inline void cpu_relax(void)
Ingo Molnar4d46a892008-02-21 04:24:40 +0100598{
599 rep_nop();
600}
601
Davidlohr Bueso3a6bfbc2014-06-29 15:09:33 -0700602#define cpu_relax_lowlatency() cpu_relax()
603
Ben Hutchings5367b682009-09-10 02:53:50 +0100604/* Stop speculative execution and prefetching of modified code. */
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100605static inline void sync_core(void)
606{
607 int tmp;
Ingo Molnar4d46a892008-02-21 04:24:40 +0100608
H. Peter Anvineb068e72012-11-28 11:50:23 -0800609#ifdef CONFIG_M486
H. Peter Anvin45c39fb2012-11-28 11:50:30 -0800610 /*
611 * Do a CPUID if available, otherwise do a jump. The jump
612 * can conveniently enough be the jump around CPUID.
613 */
614 asm volatile("cmpl %2,%1\n\t"
615 "jl 1f\n\t"
616 "cpuid\n"
617 "1:"
618 : "=a" (tmp)
619 : "rm" (boot_cpu_data.cpuid_level), "ri" (0), "0" (1)
620 : "ebx", "ecx", "edx", "memory");
621#else
622 /*
623 * CPUID is a barrier to speculative execution.
624 * Prefetched instructions are automatically
625 * invalidated when modified.
626 */
627 asm volatile("cpuid"
628 : "=a" (tmp)
629 : "0" (1)
630 : "ebx", "ecx", "edx", "memory");
Ben Hutchings5367b682009-09-10 02:53:50 +0100631#endif
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100632}
633
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100634extern void select_idle_routine(const struct cpuinfo_x86 *c);
Len Brown02c68a02011-04-01 16:59:53 -0400635extern void init_amd_e400_c1e_mask(void);
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100636
Ingo Molnar4d46a892008-02-21 04:24:40 +0100637extern unsigned long boot_option_idle_override;
Len Brown02c68a02011-04-01 16:59:53 -0400638extern bool amd_e400_c1e_detected;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100639
Thomas Renningerd1896042010-11-03 17:06:14 +0100640enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_NOMWAIT,
Len Brown69fb3672013-02-10 01:38:39 -0500641 IDLE_POLL};
Thomas Renningerd1896042010-11-03 17:06:14 +0100642
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100643extern void enable_sep_cpu(void);
644extern int sysenter_setup(void);
645
Jan Kiszka29c84392010-05-20 21:04:29 -0500646extern void early_trap_init(void);
H. Peter Anvin8170e6b2013-01-24 12:19:52 -0800647void early_trap_pf_init(void);
Jan Kiszka29c84392010-05-20 21:04:29 -0500648
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100649/* Defined in head.S */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100650extern struct desc_ptr early_gdt_descr;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100651
652extern void cpu_set_gdt(int);
Brian Gerst552be872009-01-30 17:47:53 +0900653extern void switch_to_new_gdt(int);
Jeremy Fitzhardinge11e3a842009-01-30 17:47:54 +0900654extern void load_percpu_segment(int);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100655extern void cpu_init(void);
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100656
Markus Metzgerc2724772008-12-11 13:49:59 +0100657static inline unsigned long get_debugctlmsr(void)
658{
Peter Zijlstraea8e61b2010-03-25 14:51:51 +0100659 unsigned long debugctlmsr = 0;
Markus Metzgerc2724772008-12-11 13:49:59 +0100660
661#ifndef CONFIG_X86_DEBUGCTLMSR
662 if (boot_cpu_data.x86 < 6)
663 return 0;
664#endif
665 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
666
Peter Zijlstraea8e61b2010-03-25 14:51:51 +0100667 return debugctlmsr;
Markus Metzgerc2724772008-12-11 13:49:59 +0100668}
669
Jan Beulich5b0e5082008-03-10 13:11:17 +0000670static inline void update_debugctlmsr(unsigned long debugctlmsr)
671{
672#ifndef CONFIG_X86_DEBUGCTLMSR
673 if (boot_cpu_data.x86 < 6)
674 return;
675#endif
676 wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
677}
678
Oleg Nesterov9bd11902012-09-03 15:24:17 +0200679extern void set_task_blockstep(struct task_struct *task, bool on);
680
Ingo Molnar4d46a892008-02-21 04:24:40 +0100681/* Boot loader type from the setup header: */
682extern int bootloader_type;
H. Peter Anvin50312962009-05-07 16:54:11 -0700683extern int bootloader_version;
Glauber de Oliveira Costa1a539052008-01-30 13:31:39 +0100684
Ingo Molnar4d46a892008-02-21 04:24:40 +0100685extern char ignore_fpu_irq;
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100686
687#define HAVE_ARCH_PICK_MMAP_LAYOUT 1
688#define ARCH_HAS_PREFETCHW
689#define ARCH_HAS_SPINLOCK_PREFETCH
690
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100691#ifdef CONFIG_X86_32
Borislav Petkova930dc42015-01-18 17:48:18 +0100692# define BASE_PREFETCH ""
Ingo Molnar4d46a892008-02-21 04:24:40 +0100693# define ARCH_HAS_PREFETCH
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100694#else
Borislav Petkova930dc42015-01-18 17:48:18 +0100695# define BASE_PREFETCH "prefetcht0 %P1"
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100696#endif
697
Ingo Molnar4d46a892008-02-21 04:24:40 +0100698/*
699 * Prefetch instructions for Pentium III (+) and AMD Athlon (+)
700 *
701 * It's not worth to care about 3dnow prefetches for the K6
702 * because they are microcoded there and very slow.
703 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100704static inline void prefetch(const void *x)
705{
Borislav Petkova930dc42015-01-18 17:48:18 +0100706 alternative_input(BASE_PREFETCH, "prefetchnta %P1",
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100707 X86_FEATURE_XMM,
Borislav Petkova930dc42015-01-18 17:48:18 +0100708 "m" (*(const char *)x));
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100709}
710
Ingo Molnar4d46a892008-02-21 04:24:40 +0100711/*
712 * 3dnow prefetch to get an exclusive cache line.
713 * Useful for spinlocks to avoid one state transition in the
714 * cache coherency protocol:
715 */
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100716static inline void prefetchw(const void *x)
717{
Borislav Petkova930dc42015-01-18 17:48:18 +0100718 alternative_input(BASE_PREFETCH, "prefetchw %P1",
719 X86_FEATURE_3DNOWPREFETCH,
720 "m" (*(const char *)x));
Glauber de Oliveira Costaae2e15e2008-01-30 13:31:40 +0100721}
722
Ingo Molnar4d46a892008-02-21 04:24:40 +0100723static inline void spin_lock_prefetch(const void *x)
724{
725 prefetchw(x);
726}
727
Andy Lutomirskid9e05cc2015-03-10 11:05:59 -0700728#define TOP_OF_INIT_STACK ((unsigned long)&init_stack + sizeof(init_stack) - \
729 TOP_OF_KERNEL_STACK_PADDING)
730
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100731#ifdef CONFIG_X86_32
732/*
733 * User space process size: 3GB (default).
734 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100735#define TASK_SIZE PAGE_OFFSET
Ingo Molnard9517342009-02-20 23:32:28 +0100736#define TASK_SIZE_MAX TASK_SIZE
Ingo Molnar4d46a892008-02-21 04:24:40 +0100737#define STACK_TOP TASK_SIZE
738#define STACK_TOP_MAX STACK_TOP
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100739
Ingo Molnar4d46a892008-02-21 04:24:40 +0100740#define INIT_THREAD { \
Andy Lutomirskid9e05cc2015-03-10 11:05:59 -0700741 .sp0 = TOP_OF_INIT_STACK, \
Ingo Molnar4d46a892008-02-21 04:24:40 +0100742 .sysenter_cs = __KERNEL_CS, \
743 .io_bitmap_ptr = NULL, \
Andy Lutomirski13d4ea02016-07-14 13:22:57 -0700744 .addr_limit = KERNEL_DS, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100745}
746
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100747/*
Denys Vlasenko5c394032015-03-13 15:09:03 +0100748 * TOP_OF_KERNEL_STACK_PADDING reserves 8 bytes on top of the ring0 stack.
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100749 * This is necessary to guarantee that the entire "struct pt_regs"
Uwe Kleine-Königb5950762010-11-01 15:38:34 -0400750 * is accessible even if the CPU haven't stored the SS/ESP registers
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100751 * on the stack (interrupt gate does not save these registers
752 * when switching to the same priv ring).
753 * Therefore beware: accessing the ss/esp fields of the
754 * "struct pt_regs" is possible, but they may contain the
755 * completely wrong values.
756 */
Denys Vlasenko5c394032015-03-13 15:09:03 +0100757#define task_pt_regs(task) \
758({ \
759 unsigned long __ptr = (unsigned long)task_stack_page(task); \
760 __ptr += THREAD_SIZE - TOP_OF_KERNEL_STACK_PADDING; \
761 ((struct pt_regs *)__ptr) - 1; \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100762})
763
Ingo Molnar4d46a892008-02-21 04:24:40 +0100764#define KSTK_ESP(task) (task_pt_regs(task)->sp)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100765
766#else
767/*
Andy Lutomirski07114f02014-11-04 15:46:21 -0800768 * User space process size. 47bits minus one guard page. The guard
769 * page is necessary on Intel CPUs: if a SYSCALL instruction is at
770 * the highest possible canonical userspace address, then that
771 * syscall will enter the kernel with a non-canonical return
772 * address, and SYSRET will explode dangerously. We avoid this
773 * particular problem by preventing anything from being mapped
774 * at the maximum canonical address.
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100775 */
Ingo Molnard9517342009-02-20 23:32:28 +0100776#define TASK_SIZE_MAX ((1UL << 47) - PAGE_SIZE)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100777
778/* This decides where the kernel will search for a free chunk of vm
779 * space during mmap's.
780 */
Ingo Molnar4d46a892008-02-21 04:24:40 +0100781#define IA32_PAGE_OFFSET ((current->personality & ADDR_LIMIT_3GB) ? \
782 0xc0000000 : 0xFFFFe000)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100783
H. Peter Anvin6bd33002012-02-06 13:03:09 -0800784#define TASK_SIZE (test_thread_flag(TIF_ADDR32) ? \
Ingo Molnard9517342009-02-20 23:32:28 +0100785 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
H. Peter Anvin6bd33002012-02-06 13:03:09 -0800786#define TASK_SIZE_OF(child) ((test_tsk_thread_flag(child, TIF_ADDR32)) ? \
Ingo Molnard9517342009-02-20 23:32:28 +0100787 IA32_PAGE_OFFSET : TASK_SIZE_MAX)
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100788
David Howells922a70d2008-02-08 04:19:26 -0800789#define STACK_TOP TASK_SIZE
Ingo Molnard9517342009-02-20 23:32:28 +0100790#define STACK_TOP_MAX TASK_SIZE_MAX
David Howells922a70d2008-02-08 04:19:26 -0800791
Andy Lutomirski13d4ea02016-07-14 13:22:57 -0700792#define INIT_THREAD { \
793 .sp0 = TOP_OF_INIT_STACK, \
794 .addr_limit = KERNEL_DS, \
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100795}
796
Ingo Molnar4d46a892008-02-21 04:24:40 +0100797#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.sp0 - 1)
Stefani Seibold89240ba2009-11-03 10:22:40 +0100798extern unsigned long KSTK_ESP(struct task_struct *task);
H. J. Lud046ff82012-02-14 13:49:48 -0800799
Glauber de Oliveira Costa2f66dcc2008-01-30 13:31:57 +0100800#endif /* CONFIG_X86_64 */
801
Brian Gerstffcb0432016-08-13 12:38:21 -0400802extern unsigned long thread_saved_pc(struct task_struct *tsk);
803
Ingo Molnar513ad842008-02-21 05:18:40 +0100804extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
805 unsigned long new_sp);
806
Ingo Molnar4d46a892008-02-21 04:24:40 +0100807/*
808 * This decides where the kernel will search for a free chunk of vm
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100809 * space during mmap's.
810 */
811#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
812
Ingo Molnar4d46a892008-02-21 04:24:40 +0100813#define KSTK_EIP(task) (task_pt_regs(task)->ip)
Glauber de Oliveira Costa683e0252008-01-30 13:31:27 +0100814
Erik Bosman529e25f2008-04-14 00:24:18 +0200815/* Get/set a process' ability to use the timestamp counter instruction */
816#define GET_TSC_CTL(adr) get_tsc_mode((adr))
817#define SET_TSC_CTL(val) set_tsc_mode((val))
818
819extern int get_tsc_mode(unsigned long adr);
820extern int set_tsc_mode(unsigned int val);
821
Dave Hansenfe3d1972014-11-14 07:18:29 -0800822/* Register/unregister a process' MPX related resource */
Dave Hansen46a6e0c2015-06-07 11:37:02 -0700823#define MPX_ENABLE_MANAGEMENT() mpx_enable_management()
824#define MPX_DISABLE_MANAGEMENT() mpx_disable_management()
Dave Hansenfe3d1972014-11-14 07:18:29 -0800825
826#ifdef CONFIG_X86_INTEL_MPX
Dave Hansen46a6e0c2015-06-07 11:37:02 -0700827extern int mpx_enable_management(void);
828extern int mpx_disable_management(void);
Dave Hansenfe3d1972014-11-14 07:18:29 -0800829#else
Dave Hansen46a6e0c2015-06-07 11:37:02 -0700830static inline int mpx_enable_management(void)
Dave Hansenfe3d1972014-11-14 07:18:29 -0800831{
832 return -EINVAL;
833}
Dave Hansen46a6e0c2015-06-07 11:37:02 -0700834static inline int mpx_disable_management(void)
Dave Hansenfe3d1972014-11-14 07:18:29 -0800835{
836 return -EINVAL;
837}
838#endif /* CONFIG_X86_INTEL_MPX */
839
Daniel J Blueman8b84c8d2012-11-27 14:32:10 +0800840extern u16 amd_get_nb_id(int cpu);
Aravind Gopalakrishnancc2749e2015-06-15 10:28:15 +0200841extern u32 amd_get_nodes_per_socket(void);
Andreas Herrmann6a812692009-09-16 11:33:40 +0200842
Jason Wang96e39ac2013-07-25 16:54:32 +0800843static inline uint32_t hypervisor_cpuid_base(const char *sig, uint32_t leaves)
844{
845 uint32_t base, eax, signature[3];
846
847 for (base = 0x40000000; base < 0x40010000; base += 0x100) {
848 cpuid(base, &eax, &signature[0], &signature[1], &signature[2]);
849
850 if (!memcmp(sig, signature, 12) &&
851 (leaves == 0 || ((eax - base) >= leaves)))
852 return base;
853 }
854
855 return 0;
856}
857
David Howellsf05e7982012-03-28 18:11:12 +0100858extern unsigned long arch_align_stack(unsigned long sp);
859extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
860
861void default_idle(void);
Len Brown6a377dd2013-02-09 23:08:07 -0500862#ifdef CONFIG_XEN
863bool xen_set_default_idle(void);
864#else
865#define xen_set_default_idle 0
866#endif
David Howellsf05e7982012-03-28 18:11:12 +0100867
868void stop_this_cpu(void *dummy);
Borislav Petkov4d067d82013-05-09 12:02:29 +0200869void df_debug(struct pt_regs *regs, long error_code);
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700870#endif /* _ASM_X86_PROCESSOR_H */