Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-omap2/io.c |
| 3 | * |
| 4 | * OMAP2 I/O mapping code |
| 5 | * |
| 6 | * Copyright (C) 2005 Nokia Corporation |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 7 | * Copyright (C) 2007-2009 Texas Instruments |
Tony Lindgren | 646e3ed | 2008-10-06 15:49:36 +0300 | [diff] [blame] | 8 | * |
| 9 | * Author: |
| 10 | * Juha Yrjola <juha.yrjola@nokia.com> |
| 11 | * Syed Khasim <x0khasim@ti.com> |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 12 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 13 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 14 | * |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License version 2 as |
| 17 | * published by the Free Software Foundation. |
| 18 | */ |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 19 | #include <linux/module.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/init.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Paul Walmsley | 2f135ea | 2009-06-19 19:08:25 -0600 | [diff] [blame] | 23 | #include <linux/clk.h> |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 24 | |
Tony Lindgren | 120db2c | 2006-04-02 17:46:27 +0100 | [diff] [blame] | 25 | #include <asm/tlb.h> |
Tony Lindgren | 120db2c | 2006-04-02 17:46:27 +0100 | [diff] [blame] | 26 | #include <asm/mach/map.h> |
| 27 | |
Tony Lindgren | 45c3eb7 | 2012-11-30 08:41:50 -0800 | [diff] [blame] | 28 | #include <linux/omap-dma.h> |
Tony Lindgren | 646e3ed | 2008-10-06 15:49:36 +0300 | [diff] [blame] | 29 | |
Tony Lindgren | dc84328 | 2012-10-03 11:23:43 -0700 | [diff] [blame] | 30 | #include "omap_hwmod.h" |
Tony Lindgren | dbc0416 | 2012-08-31 10:59:07 -0700 | [diff] [blame] | 31 | #include "soc.h" |
Tony Lindgren | ee0839c | 2012-02-24 10:34:35 -0800 | [diff] [blame] | 32 | #include "iomap.h" |
| 33 | #include "voltage.h" |
| 34 | #include "powerdomain.h" |
| 35 | #include "clockdomain.h" |
| 36 | #include "common.h" |
Vaibhav Hiremath | e30384a | 2012-05-29 15:26:41 +0530 | [diff] [blame] | 37 | #include "clock.h" |
Paul Walmsley | e80a972 | 2010-01-26 20:13:12 -0700 | [diff] [blame] | 38 | #include "clock2xxx.h" |
Paul Walmsley | 657ebfa | 2010-02-22 22:09:20 -0700 | [diff] [blame] | 39 | #include "clock3xxx.h" |
Paul Walmsley | e80a972 | 2010-01-26 20:13:12 -0700 | [diff] [blame] | 40 | #include "clock44xx.h" |
Tony Lindgren | 1d5aef4 | 2012-10-03 16:36:40 -0700 | [diff] [blame] | 41 | #include "omap-pm.h" |
Paul Walmsley | 3e6ece1 | 2012-10-17 00:46:45 +0000 | [diff] [blame] | 42 | #include "sdrc.h" |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 43 | #include "control.h" |
Tony Lindgren | 3d82cbb | 2012-10-15 12:50:46 -0700 | [diff] [blame] | 44 | #include "serial.h" |
Tony Lindgren | bf027ca | 2012-10-29 13:54:06 -0700 | [diff] [blame] | 45 | #include "sram.h" |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 46 | #include "cm2xxx.h" |
| 47 | #include "cm3xxx.h" |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 48 | #include "cm33xx.h" |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 49 | #include "prm.h" |
| 50 | #include "cm.h" |
| 51 | #include "prcm_mpu44xx.h" |
| 52 | #include "prminst44xx.h" |
| 53 | #include "cminst44xx.h" |
Paul Walmsley | 63a293e | 2012-11-21 16:15:16 -0700 | [diff] [blame] | 54 | #include "prm2xxx.h" |
| 55 | #include "prm3xxx.h" |
| 56 | #include "prm44xx.h" |
Tero Kristo | 69a1e7a | 2014-02-24 18:51:05 +0200 | [diff] [blame] | 57 | #include "opp2xxx.h" |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 58 | |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 59 | /* |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 60 | * omap_clk_soc_init: points to a function that does the SoC-specific |
Rajendra Nayak | ff931c8 | 2013-03-21 16:34:52 +0530 | [diff] [blame] | 61 | * clock initializations |
| 62 | */ |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 63 | static int (*omap_clk_soc_init)(void); |
Rajendra Nayak | ff931c8 | 2013-03-21 16:34:52 +0530 | [diff] [blame] | 64 | |
| 65 | /* |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 66 | * The machine specific code may provide the extra mapping besides the |
| 67 | * default mapping provided here. |
| 68 | */ |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 69 | |
Tony Lindgren | e48f814 | 2012-03-06 11:49:22 -0800 | [diff] [blame] | 70 | #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 71 | static struct map_desc omap24xx_io_desc[] __initdata = { |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 72 | { |
| 73 | .virtual = L3_24XX_VIRT, |
| 74 | .pfn = __phys_to_pfn(L3_24XX_PHYS), |
| 75 | .length = L3_24XX_SIZE, |
| 76 | .type = MT_DEVICE |
| 77 | }, |
Kyungmin Park | 09f21ed | 2008-02-20 15:30:06 -0800 | [diff] [blame] | 78 | { |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 79 | .virtual = L4_24XX_VIRT, |
| 80 | .pfn = __phys_to_pfn(L4_24XX_PHYS), |
| 81 | .length = L4_24XX_SIZE, |
Syed Mohammed Khasim | 72d0f1c | 2006-12-06 17:14:05 -0800 | [diff] [blame] | 82 | .type = MT_DEVICE |
| 83 | }, |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 84 | }; |
| 85 | |
Tony Lindgren | 59b479e | 2011-01-27 16:39:40 -0800 | [diff] [blame] | 86 | #ifdef CONFIG_SOC_OMAP2420 |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 87 | static struct map_desc omap242x_io_desc[] __initdata = { |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 88 | { |
Paul Walmsley | 7adb998 | 2010-01-08 15:23:05 -0700 | [diff] [blame] | 89 | .virtual = DSP_MEM_2420_VIRT, |
| 90 | .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS), |
| 91 | .length = DSP_MEM_2420_SIZE, |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 92 | .type = MT_DEVICE |
| 93 | }, |
| 94 | { |
Paul Walmsley | 7adb998 | 2010-01-08 15:23:05 -0700 | [diff] [blame] | 95 | .virtual = DSP_IPI_2420_VIRT, |
| 96 | .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS), |
| 97 | .length = DSP_IPI_2420_SIZE, |
Tony Lindgren | c40fae95 | 2006-12-07 13:58:10 -0800 | [diff] [blame] | 98 | .type = MT_DEVICE |
| 99 | }, |
| 100 | { |
Paul Walmsley | 7adb998 | 2010-01-08 15:23:05 -0700 | [diff] [blame] | 101 | .virtual = DSP_MMU_2420_VIRT, |
| 102 | .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS), |
| 103 | .length = DSP_MMU_2420_SIZE, |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 104 | .type = MT_DEVICE |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 105 | }, |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 106 | }; |
| 107 | |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 108 | #endif |
| 109 | |
Tony Lindgren | 59b479e | 2011-01-27 16:39:40 -0800 | [diff] [blame] | 110 | #ifdef CONFIG_SOC_OMAP2430 |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 111 | static struct map_desc omap243x_io_desc[] __initdata = { |
| 112 | { |
| 113 | .virtual = L4_WK_243X_VIRT, |
| 114 | .pfn = __phys_to_pfn(L4_WK_243X_PHYS), |
| 115 | .length = L4_WK_243X_SIZE, |
| 116 | .type = MT_DEVICE |
| 117 | }, |
| 118 | { |
| 119 | .virtual = OMAP243X_GPMC_VIRT, |
| 120 | .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), |
| 121 | .length = OMAP243X_GPMC_SIZE, |
| 122 | .type = MT_DEVICE |
| 123 | }, |
| 124 | { |
| 125 | .virtual = OMAP243X_SDRC_VIRT, |
| 126 | .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS), |
| 127 | .length = OMAP243X_SDRC_SIZE, |
| 128 | .type = MT_DEVICE |
| 129 | }, |
| 130 | { |
| 131 | .virtual = OMAP243X_SMS_VIRT, |
| 132 | .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS), |
| 133 | .length = OMAP243X_SMS_SIZE, |
| 134 | .type = MT_DEVICE |
| 135 | }, |
| 136 | }; |
| 137 | #endif |
| 138 | #endif |
| 139 | |
Tony Lindgren | a8eb7ca | 2010-02-12 12:26:48 -0800 | [diff] [blame] | 140 | #ifdef CONFIG_ARCH_OMAP3 |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 141 | static struct map_desc omap34xx_io_desc[] __initdata = { |
| 142 | { |
| 143 | .virtual = L3_34XX_VIRT, |
| 144 | .pfn = __phys_to_pfn(L3_34XX_PHYS), |
| 145 | .length = L3_34XX_SIZE, |
| 146 | .type = MT_DEVICE |
| 147 | }, |
| 148 | { |
| 149 | .virtual = L4_34XX_VIRT, |
| 150 | .pfn = __phys_to_pfn(L4_34XX_PHYS), |
| 151 | .length = L4_34XX_SIZE, |
| 152 | .type = MT_DEVICE |
| 153 | }, |
| 154 | { |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 155 | .virtual = OMAP34XX_GPMC_VIRT, |
| 156 | .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), |
| 157 | .length = OMAP34XX_GPMC_SIZE, |
| 158 | .type = MT_DEVICE |
| 159 | }, |
| 160 | { |
| 161 | .virtual = OMAP343X_SMS_VIRT, |
| 162 | .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS), |
| 163 | .length = OMAP343X_SMS_SIZE, |
| 164 | .type = MT_DEVICE |
| 165 | }, |
| 166 | { |
| 167 | .virtual = OMAP343X_SDRC_VIRT, |
| 168 | .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS), |
| 169 | .length = OMAP343X_SDRC_SIZE, |
| 170 | .type = MT_DEVICE |
| 171 | }, |
| 172 | { |
| 173 | .virtual = L4_PER_34XX_VIRT, |
| 174 | .pfn = __phys_to_pfn(L4_PER_34XX_PHYS), |
| 175 | .length = L4_PER_34XX_SIZE, |
| 176 | .type = MT_DEVICE |
| 177 | }, |
| 178 | { |
| 179 | .virtual = L4_EMU_34XX_VIRT, |
| 180 | .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS), |
| 181 | .length = L4_EMU_34XX_SIZE, |
| 182 | .type = MT_DEVICE |
| 183 | }, |
| 184 | }; |
| 185 | #endif |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 186 | |
Kevin Hilman | 3395955 | 2012-05-10 11:10:07 -0700 | [diff] [blame] | 187 | #ifdef CONFIG_SOC_TI81XX |
Hemant Pedanekar | a920360 | 2011-12-13 10:46:44 -0800 | [diff] [blame] | 188 | static struct map_desc omapti81xx_io_desc[] __initdata = { |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 189 | { |
| 190 | .virtual = L4_34XX_VIRT, |
| 191 | .pfn = __phys_to_pfn(L4_34XX_PHYS), |
| 192 | .length = L4_34XX_SIZE, |
| 193 | .type = MT_DEVICE |
Afzal Mohammed | 1e6cb14 | 2011-12-13 10:46:43 -0800 | [diff] [blame] | 194 | } |
| 195 | }; |
| 196 | #endif |
| 197 | |
Afzal Mohammed | addb154 | 2013-05-27 20:06:13 +0530 | [diff] [blame] | 198 | #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) |
Afzal Mohammed | 1e6cb14 | 2011-12-13 10:46:43 -0800 | [diff] [blame] | 199 | static struct map_desc omapam33xx_io_desc[] __initdata = { |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 200 | { |
| 201 | .virtual = L4_34XX_VIRT, |
| 202 | .pfn = __phys_to_pfn(L4_34XX_PHYS), |
| 203 | .length = L4_34XX_SIZE, |
| 204 | .type = MT_DEVICE |
| 205 | }, |
Afzal Mohammed | 1e6cb14 | 2011-12-13 10:46:43 -0800 | [diff] [blame] | 206 | { |
| 207 | .virtual = L4_WK_AM33XX_VIRT, |
| 208 | .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS), |
| 209 | .length = L4_WK_AM33XX_SIZE, |
| 210 | .type = MT_DEVICE |
| 211 | } |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 212 | }; |
| 213 | #endif |
| 214 | |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 215 | #ifdef CONFIG_ARCH_OMAP4 |
| 216 | static struct map_desc omap44xx_io_desc[] __initdata = { |
| 217 | { |
| 218 | .virtual = L3_44XX_VIRT, |
| 219 | .pfn = __phys_to_pfn(L3_44XX_PHYS), |
| 220 | .length = L3_44XX_SIZE, |
| 221 | .type = MT_DEVICE, |
| 222 | }, |
| 223 | { |
| 224 | .virtual = L4_44XX_VIRT, |
| 225 | .pfn = __phys_to_pfn(L4_44XX_PHYS), |
| 226 | .length = L4_44XX_SIZE, |
| 227 | .type = MT_DEVICE, |
| 228 | }, |
| 229 | { |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 230 | .virtual = L4_PER_44XX_VIRT, |
| 231 | .pfn = __phys_to_pfn(L4_PER_44XX_PHYS), |
| 232 | .length = L4_PER_44XX_SIZE, |
| 233 | .type = MT_DEVICE, |
| 234 | }, |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 235 | }; |
| 236 | #endif |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 237 | |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 238 | #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 239 | static struct map_desc omap54xx_io_desc[] __initdata = { |
| 240 | { |
| 241 | .virtual = L3_54XX_VIRT, |
| 242 | .pfn = __phys_to_pfn(L3_54XX_PHYS), |
| 243 | .length = L3_54XX_SIZE, |
| 244 | .type = MT_DEVICE, |
| 245 | }, |
| 246 | { |
| 247 | .virtual = L4_54XX_VIRT, |
| 248 | .pfn = __phys_to_pfn(L4_54XX_PHYS), |
| 249 | .length = L4_54XX_SIZE, |
| 250 | .type = MT_DEVICE, |
| 251 | }, |
| 252 | { |
| 253 | .virtual = L4_WK_54XX_VIRT, |
| 254 | .pfn = __phys_to_pfn(L4_WK_54XX_PHYS), |
| 255 | .length = L4_WK_54XX_SIZE, |
| 256 | .type = MT_DEVICE, |
| 257 | }, |
| 258 | { |
| 259 | .virtual = L4_PER_54XX_VIRT, |
| 260 | .pfn = __phys_to_pfn(L4_PER_54XX_PHYS), |
| 261 | .length = L4_PER_54XX_SIZE, |
| 262 | .type = MT_DEVICE, |
| 263 | }, |
| 264 | }; |
| 265 | #endif |
| 266 | |
Tony Lindgren | 59b479e | 2011-01-27 16:39:40 -0800 | [diff] [blame] | 267 | #ifdef CONFIG_SOC_OMAP2420 |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 268 | void __init omap242x_map_io(void) |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 269 | { |
| 270 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); |
| 271 | iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 272 | } |
| 273 | #endif |
| 274 | |
Tony Lindgren | 59b479e | 2011-01-27 16:39:40 -0800 | [diff] [blame] | 275 | #ifdef CONFIG_SOC_OMAP2430 |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 276 | void __init omap243x_map_io(void) |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 277 | { |
| 278 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); |
| 279 | iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 280 | } |
| 281 | #endif |
| 282 | |
Tony Lindgren | a8eb7ca | 2010-02-12 12:26:48 -0800 | [diff] [blame] | 283 | #ifdef CONFIG_ARCH_OMAP3 |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 284 | void __init omap3_map_io(void) |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 285 | { |
| 286 | iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 287 | } |
| 288 | #endif |
| 289 | |
Kevin Hilman | 3395955 | 2012-05-10 11:10:07 -0700 | [diff] [blame] | 290 | #ifdef CONFIG_SOC_TI81XX |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 291 | void __init ti81xx_map_io(void) |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 292 | { |
Hemant Pedanekar | a920360 | 2011-12-13 10:46:44 -0800 | [diff] [blame] | 293 | iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc)); |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 294 | } |
| 295 | #endif |
| 296 | |
Afzal Mohammed | addb154 | 2013-05-27 20:06:13 +0530 | [diff] [blame] | 297 | #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 298 | void __init am33xx_map_io(void) |
Afzal Mohammed | 1e6cb14 | 2011-12-13 10:46:43 -0800 | [diff] [blame] | 299 | { |
| 300 | iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc)); |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 301 | } |
| 302 | #endif |
| 303 | |
| 304 | #ifdef CONFIG_ARCH_OMAP4 |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 305 | void __init omap4_map_io(void) |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 306 | { |
| 307 | iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); |
Santosh Shilimkar | 2ec1fc4 | 2012-02-02 19:33:55 +0530 | [diff] [blame] | 308 | omap_barriers_init(); |
Tony Lindgren | 6fbd55d | 2010-02-12 12:26:47 -0800 | [diff] [blame] | 309 | } |
| 310 | #endif |
| 311 | |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 312 | #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 313 | void __init omap5_map_io(void) |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 314 | { |
| 315 | iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc)); |
Santosh Shilimkar | 1348bbf | 2013-02-15 18:05:49 +0530 | [diff] [blame] | 316 | omap_barriers_init(); |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 317 | } |
| 318 | #endif |
Paul Walmsley | 2f135ea | 2009-06-19 19:08:25 -0600 | [diff] [blame] | 319 | /* |
| 320 | * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters |
| 321 | * |
| 322 | * Sets the CORE DPLL3 M2 divider to the same value that it's at |
| 323 | * currently. This has the effect of setting the SDRC SDRAM AC timing |
| 324 | * registers to the values currently defined by the kernel. Currently |
| 325 | * only defined for OMAP3; will return 0 if called on OMAP2. Returns |
| 326 | * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2, |
| 327 | * or passes along the return value of clk_set_rate(). |
| 328 | */ |
| 329 | static int __init _omap2_init_reprogram_sdrc(void) |
| 330 | { |
| 331 | struct clk *dpll3_m2_ck; |
| 332 | int v = -EINVAL; |
| 333 | long rate; |
| 334 | |
| 335 | if (!cpu_is_omap34xx()) |
| 336 | return 0; |
| 337 | |
| 338 | dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); |
Aaro Koskinen | e281f7e | 2010-11-30 14:17:58 +0000 | [diff] [blame] | 339 | if (IS_ERR(dpll3_m2_ck)) |
Paul Walmsley | 2f135ea | 2009-06-19 19:08:25 -0600 | [diff] [blame] | 340 | return -EINVAL; |
| 341 | |
| 342 | rate = clk_get_rate(dpll3_m2_ck); |
| 343 | pr_info("Reprogramming SDRC clock to %ld Hz\n", rate); |
| 344 | v = clk_set_rate(dpll3_m2_ck, rate); |
| 345 | if (v) |
| 346 | pr_err("dpll3_m2_clk rate change failed: %d\n", v); |
| 347 | |
| 348 | clk_put(dpll3_m2_ck); |
| 349 | |
| 350 | return v; |
| 351 | } |
| 352 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 353 | static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) |
| 354 | { |
| 355 | return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); |
| 356 | } |
| 357 | |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 358 | static void __init omap_hwmod_init_postsetup(void) |
Tony Lindgren | 120db2c | 2006-04-02 17:46:27 +0100 | [diff] [blame] | 359 | { |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 360 | u8 postsetup_state; |
| 361 | |
Paul Walmsley | 2092e5c | 2010-12-14 12:42:35 -0700 | [diff] [blame] | 362 | /* Set the default postsetup state for all hwmods */ |
| 363 | #ifdef CONFIG_PM_RUNTIME |
| 364 | postsetup_state = _HWMOD_STATE_IDLE; |
| 365 | #else |
| 366 | postsetup_state = _HWMOD_STATE_ENABLED; |
| 367 | #endif |
| 368 | omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state); |
Benoit Cousson | 55d2cb0 | 2010-05-12 17:54:36 +0200 | [diff] [blame] | 369 | |
Kevin Hilman | 53da4ce | 2010-12-09 09:13:48 -0600 | [diff] [blame] | 370 | omap_pm_if_early_init(); |
Paul Walmsley | 4805734 | 2010-12-21 15:25:10 -0700 | [diff] [blame] | 371 | } |
| 372 | |
Arnd Bergmann | 069d0a7 | 2013-07-05 16:20:17 +0200 | [diff] [blame] | 373 | static void __init __maybe_unused omap_common_late_init(void) |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 374 | { |
| 375 | omap_mux_late_init(); |
| 376 | omap2_common_pm_late_init(); |
Ruslan Bilovol | 6770b21 | 2013-02-14 13:55:24 +0200 | [diff] [blame] | 377 | omap_soc_device_init(); |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 378 | } |
| 379 | |
Paul Walmsley | 1611079 | 2012-01-25 12:57:46 -0700 | [diff] [blame] | 380 | #ifdef CONFIG_SOC_OMAP2420 |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 381 | void __init omap2420_init_early(void) |
| 382 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 383 | omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000)); |
| 384 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), |
| 385 | OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE)); |
| 386 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), |
| 387 | NULL); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 388 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE)); |
| 389 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL); |
Vaibhav Hiremath | 4de34f3 | 2011-12-19 15:50:15 +0530 | [diff] [blame] | 390 | omap2xxx_check_revision(); |
Paul Walmsley | 63a293e | 2012-11-21 16:15:16 -0700 | [diff] [blame] | 391 | omap2xxx_prm_init(); |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 392 | omap2xxx_cm_init(); |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 393 | omap2xxx_voltagedomains_init(); |
| 394 | omap242x_powerdomains_init(); |
| 395 | omap242x_clockdomains_init(); |
| 396 | omap2420_hwmod_init(); |
| 397 | omap_hwmod_init_postsetup(); |
Tero Kristo | 6a194a6 | 2014-03-04 10:53:54 +0200 | [diff] [blame] | 398 | omap_clk_soc_init = omap2420_dt_clk_init; |
| 399 | rate_table = omap2420_rate_table; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 400 | } |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 401 | |
| 402 | void __init omap2420_init_late(void) |
| 403 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 404 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 405 | omap2_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 406 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 407 | } |
Paul Walmsley | 1611079 | 2012-01-25 12:57:46 -0700 | [diff] [blame] | 408 | #endif |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 409 | |
Paul Walmsley | 1611079 | 2012-01-25 12:57:46 -0700 | [diff] [blame] | 410 | #ifdef CONFIG_SOC_OMAP2430 |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 411 | void __init omap2430_init_early(void) |
| 412 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 413 | omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000)); |
| 414 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), |
| 415 | OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE)); |
| 416 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), |
| 417 | NULL); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 418 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE)); |
| 419 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL); |
Vaibhav Hiremath | 4de34f3 | 2011-12-19 15:50:15 +0530 | [diff] [blame] | 420 | omap2xxx_check_revision(); |
Paul Walmsley | 63a293e | 2012-11-21 16:15:16 -0700 | [diff] [blame] | 421 | omap2xxx_prm_init(); |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 422 | omap2xxx_cm_init(); |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 423 | omap2xxx_voltagedomains_init(); |
| 424 | omap243x_powerdomains_init(); |
| 425 | omap243x_clockdomains_init(); |
| 426 | omap2430_hwmod_init(); |
| 427 | omap_hwmod_init_postsetup(); |
Tero Kristo | 6a194a6 | 2014-03-04 10:53:54 +0200 | [diff] [blame] | 428 | omap_clk_soc_init = omap2430_dt_clk_init; |
| 429 | rate_table = omap2430_rate_table; |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 430 | } |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 431 | |
| 432 | void __init omap2430_init_late(void) |
| 433 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 434 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 435 | omap2_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 436 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 437 | } |
Sanjeev Premi | c4e2d24 | 2011-10-13 21:44:10 +0530 | [diff] [blame] | 438 | #endif |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 439 | |
| 440 | /* |
| 441 | * Currently only board-omap3beagle.c should call this because of the |
| 442 | * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. |
| 443 | */ |
Sanjeev Premi | c4e2d24 | 2011-10-13 21:44:10 +0530 | [diff] [blame] | 444 | #ifdef CONFIG_ARCH_OMAP3 |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 445 | void __init omap3_init_early(void) |
| 446 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 447 | omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000)); |
| 448 | omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), |
| 449 | OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE)); |
| 450 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), |
| 451 | NULL); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 452 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE)); |
| 453 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL); |
Vaibhav Hiremath | 4de34f3 | 2011-12-19 15:50:15 +0530 | [diff] [blame] | 454 | omap3xxx_check_revision(); |
| 455 | omap3xxx_check_features(); |
Paul Walmsley | 63a293e | 2012-11-21 16:15:16 -0700 | [diff] [blame] | 456 | omap3xxx_prm_init(); |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 457 | omap3xxx_cm_init(); |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 458 | omap3xxx_voltagedomains_init(); |
| 459 | omap3xxx_powerdomains_init(); |
| 460 | omap3xxx_clockdomains_init(); |
| 461 | omap3xxx_hwmod_init(); |
| 462 | omap_hwmod_init_postsetup(); |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 463 | omap_clk_soc_init = omap3xxx_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 464 | } |
| 465 | |
| 466 | void __init omap3430_init_early(void) |
| 467 | { |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 468 | omap3_init_early(); |
Tero Kristo | 3e04915 | 2013-08-02 14:32:30 +0300 | [diff] [blame] | 469 | if (of_have_populated_dt()) |
| 470 | omap_clk_soc_init = omap3430_dt_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 471 | } |
| 472 | |
| 473 | void __init omap35xx_init_early(void) |
| 474 | { |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 475 | omap3_init_early(); |
Tero Kristo | 3e04915 | 2013-08-02 14:32:30 +0300 | [diff] [blame] | 476 | if (of_have_populated_dt()) |
| 477 | omap_clk_soc_init = omap3430_dt_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 478 | } |
| 479 | |
| 480 | void __init omap3630_init_early(void) |
| 481 | { |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 482 | omap3_init_early(); |
Tero Kristo | 3e04915 | 2013-08-02 14:32:30 +0300 | [diff] [blame] | 483 | if (of_have_populated_dt()) |
| 484 | omap_clk_soc_init = omap3630_dt_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 485 | } |
| 486 | |
| 487 | void __init am35xx_init_early(void) |
| 488 | { |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 489 | omap3_init_early(); |
Tero Kristo | 3e04915 | 2013-08-02 14:32:30 +0300 | [diff] [blame] | 490 | if (of_have_populated_dt()) |
| 491 | omap_clk_soc_init = am35xx_dt_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 492 | } |
| 493 | |
Hemant Pedanekar | a920360 | 2011-12-13 10:46:44 -0800 | [diff] [blame] | 494 | void __init ti81xx_init_early(void) |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 495 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 496 | omap2_set_globals_tap(OMAP343X_CLASS, |
| 497 | OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE)); |
| 498 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), |
| 499 | NULL); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 500 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE)); |
| 501 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL); |
Vaibhav Hiremath | 4de34f3 | 2011-12-19 15:50:15 +0530 | [diff] [blame] | 502 | omap3xxx_check_revision(); |
| 503 | ti81xx_check_features(); |
Tony Lindgren | 4c3cf90 | 2011-10-04 18:17:41 -0700 | [diff] [blame] | 504 | omap3xxx_voltagedomains_init(); |
| 505 | omap3xxx_powerdomains_init(); |
| 506 | omap3xxx_clockdomains_init(); |
| 507 | omap3xxx_hwmod_init(); |
| 508 | omap_hwmod_init_postsetup(); |
Tero Kristo | 3e04915 | 2013-08-02 14:32:30 +0300 | [diff] [blame] | 509 | if (of_have_populated_dt()) |
| 510 | omap_clk_soc_init = ti81xx_dt_clk_init; |
| 511 | else |
| 512 | omap_clk_soc_init = omap3xxx_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 513 | } |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 514 | |
| 515 | void __init omap3_init_late(void) |
| 516 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 517 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 518 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 519 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 520 | } |
| 521 | |
| 522 | void __init omap3430_init_late(void) |
| 523 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 524 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 525 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 526 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 527 | } |
| 528 | |
| 529 | void __init omap35xx_init_late(void) |
| 530 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 531 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 532 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 533 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | void __init omap3630_init_late(void) |
| 537 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 538 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 539 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 540 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 541 | } |
| 542 | |
| 543 | void __init am35xx_init_late(void) |
| 544 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 545 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 546 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 547 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 548 | } |
| 549 | |
| 550 | void __init ti81xx_init_late(void) |
| 551 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 552 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 553 | omap3_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 554 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 555 | } |
Sanjeev Premi | c4e2d24 | 2011-10-13 21:44:10 +0530 | [diff] [blame] | 556 | #endif |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 557 | |
Afzal Mohammed | 08f3098 | 2012-05-11 00:38:49 +0530 | [diff] [blame] | 558 | #ifdef CONFIG_SOC_AM33XX |
| 559 | void __init am33xx_init_early(void) |
| 560 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 561 | omap2_set_globals_tap(AM335X_CLASS, |
| 562 | AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); |
| 563 | omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), |
| 564 | NULL); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 565 | omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE)); |
| 566 | omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL); |
Afzal Mohammed | 08f3098 | 2012-05-11 00:38:49 +0530 | [diff] [blame] | 567 | omap3xxx_check_revision(); |
Vaibhav Hiremath | 7bcad17 | 2013-05-17 15:43:41 +0530 | [diff] [blame] | 568 | am33xx_check_features(); |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 569 | am33xx_cm_init(); |
Vaibhav Hiremath | 3f0ea76 | 2012-06-18 00:47:27 -0600 | [diff] [blame] | 570 | am33xx_powerdomains_init(); |
Vaibhav Hiremath | 9c80f3a | 2012-06-18 00:47:27 -0600 | [diff] [blame] | 571 | am33xx_clockdomains_init(); |
Vaibhav Hiremath | a2cfc50 | 2012-07-25 13:51:13 -0600 | [diff] [blame] | 572 | am33xx_hwmod_init(); |
| 573 | omap_hwmod_init_postsetup(); |
Tero Kristo | 149c09d | 2013-07-19 11:37:17 +0300 | [diff] [blame] | 574 | omap_clk_soc_init = am33xx_dt_clk_init; |
Afzal Mohammed | 08f3098 | 2012-05-11 00:38:49 +0530 | [diff] [blame] | 575 | } |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 576 | |
| 577 | void __init am33xx_init_late(void) |
| 578 | { |
| 579 | omap_common_late_init(); |
| 580 | } |
Afzal Mohammed | 08f3098 | 2012-05-11 00:38:49 +0530 | [diff] [blame] | 581 | #endif |
| 582 | |
Afzal Mohammed | c510702 | 2013-05-27 20:06:23 +0530 | [diff] [blame] | 583 | #ifdef CONFIG_SOC_AM43XX |
| 584 | void __init am43xx_init_early(void) |
| 585 | { |
| 586 | omap2_set_globals_tap(AM335X_CLASS, |
| 587 | AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE)); |
| 588 | omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), |
| 589 | NULL); |
| 590 | omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE)); |
| 591 | omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL); |
Ambresh K | 8835cf6 | 2013-10-12 15:46:37 +0530 | [diff] [blame] | 592 | omap_prm_base_init(); |
| 593 | omap_cm_base_init(); |
Afzal Mohammed | c510702 | 2013-05-27 20:06:23 +0530 | [diff] [blame] | 594 | omap3xxx_check_revision(); |
Afzal Mohammed | 7a2e051 | 2014-02-07 15:51:25 +0530 | [diff] [blame] | 595 | am33xx_check_features(); |
Tero Kristo | 8843b11 | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 596 | omap44xx_prm_init(); |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 597 | omap4_cm_init(); |
Ambresh K | 8835cf6 | 2013-10-12 15:46:37 +0530 | [diff] [blame] | 598 | am43xx_powerdomains_init(); |
| 599 | am43xx_clockdomains_init(); |
| 600 | am43xx_hwmod_init(); |
| 601 | omap_hwmod_init_postsetup(); |
Sekhar Nori | d941f86 | 2014-04-22 13:58:03 +0530 | [diff] [blame] | 602 | omap_l2_cache_init(); |
Tero Kristo | d22031e | 2013-11-21 16:49:59 +0200 | [diff] [blame] | 603 | omap_clk_soc_init = am43xx_dt_clk_init; |
Afzal Mohammed | c510702 | 2013-05-27 20:06:23 +0530 | [diff] [blame] | 604 | } |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 605 | |
| 606 | void __init am43xx_init_late(void) |
| 607 | { |
| 608 | omap_common_late_init(); |
| 609 | } |
Afzal Mohammed | c510702 | 2013-05-27 20:06:23 +0530 | [diff] [blame] | 610 | #endif |
| 611 | |
Sanjeev Premi | c4e2d24 | 2011-10-13 21:44:10 +0530 | [diff] [blame] | 612 | #ifdef CONFIG_ARCH_OMAP4 |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 613 | void __init omap4430_init_early(void) |
| 614 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 615 | omap2_set_globals_tap(OMAP443X_CLASS, |
| 616 | OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE)); |
| 617 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), |
| 618 | OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE)); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 619 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE)); |
| 620 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), |
| 621 | OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE)); |
| 622 | omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE)); |
| 623 | omap_prm_base_init(); |
| 624 | omap_cm_base_init(); |
Vaibhav Hiremath | 4de34f3 | 2011-12-19 15:50:15 +0530 | [diff] [blame] | 625 | omap4xxx_check_revision(); |
| 626 | omap4xxx_check_features(); |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 627 | omap4_cm_init(); |
Nishanth Menon | de70af4 | 2014-01-20 14:06:37 -0600 | [diff] [blame] | 628 | omap4_pm_init_early(); |
Paul Walmsley | 63a293e | 2012-11-21 16:15:16 -0700 | [diff] [blame] | 629 | omap44xx_prm_init(); |
Tony Lindgren | 7b250af | 2011-10-04 18:26:28 -0700 | [diff] [blame] | 630 | omap44xx_voltagedomains_init(); |
| 631 | omap44xx_powerdomains_init(); |
| 632 | omap44xx_clockdomains_init(); |
| 633 | omap44xx_hwmod_init(); |
| 634 | omap_hwmod_init_postsetup(); |
Sekhar Nori | b39b14e | 2014-04-22 13:58:01 +0530 | [diff] [blame] | 635 | omap_l2_cache_init(); |
Tero Kristo | c8c88d8 | 2013-07-18 16:04:00 +0300 | [diff] [blame] | 636 | omap_clk_soc_init = omap4xxx_dt_clk_init; |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 637 | } |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 638 | |
| 639 | void __init omap4430_init_late(void) |
| 640 | { |
Ruslan Bilovol | 4ed12be | 2013-02-14 13:55:22 +0200 | [diff] [blame] | 641 | omap_common_late_init(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 642 | omap4_pm_init(); |
Rajendra Nayak | 23fb8ba | 2012-06-01 14:02:49 +0530 | [diff] [blame] | 643 | omap2_clk_enable_autoidle_all(); |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 644 | } |
Sanjeev Premi | c4e2d24 | 2011-10-13 21:44:10 +0530 | [diff] [blame] | 645 | #endif |
Tony Lindgren | 8f5b5a4 | 2011-08-22 23:57:24 -0700 | [diff] [blame] | 646 | |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 647 | #ifdef CONFIG_SOC_OMAP5 |
| 648 | void __init omap5_init_early(void) |
| 649 | { |
Paul Walmsley | b6a4226 | 2012-10-29 20:50:21 -0600 | [diff] [blame] | 650 | omap2_set_globals_tap(OMAP54XX_CLASS, |
| 651 | OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE)); |
| 652 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), |
| 653 | OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE)); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 654 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); |
| 655 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), |
| 656 | OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); |
| 657 | omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); |
Santosh Shilimkar | 628ed47 | 2014-05-20 16:19:23 -0500 | [diff] [blame] | 658 | omap4_pm_init_early(); |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 659 | omap_prm_base_init(); |
| 660 | omap_cm_base_init(); |
Santosh Shilimkar | e4020aa | 2013-05-29 12:38:12 -0400 | [diff] [blame] | 661 | omap44xx_prm_init(); |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 662 | omap5xxx_check_revision(); |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 663 | omap4_cm_init(); |
Santosh Shilimkar | e4020aa | 2013-05-29 12:38:12 -0400 | [diff] [blame] | 664 | omap54xx_voltagedomains_init(); |
| 665 | omap54xx_powerdomains_init(); |
| 666 | omap54xx_clockdomains_init(); |
| 667 | omap54xx_hwmod_init(); |
| 668 | omap_hwmod_init_postsetup(); |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 669 | omap_clk_soc_init = omap5xxx_dt_clk_init; |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 670 | } |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 671 | |
| 672 | void __init omap5_init_late(void) |
| 673 | { |
| 674 | omap_common_late_init(); |
Santosh Shilimkar | 628ed47 | 2014-05-20 16:19:23 -0500 | [diff] [blame] | 675 | omap4_pm_init(); |
| 676 | omap2_clk_enable_autoidle_all(); |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 677 | } |
R Sricharan | 05e152c | 2012-06-05 16:21:32 +0530 | [diff] [blame] | 678 | #endif |
| 679 | |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 680 | #ifdef CONFIG_SOC_DRA7XX |
| 681 | void __init dra7xx_init_early(void) |
| 682 | { |
| 683 | omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE)); |
| 684 | omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), |
| 685 | OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE)); |
| 686 | omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE)); |
| 687 | omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(DRA7XX_CM_CORE_AON_BASE), |
| 688 | OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE)); |
| 689 | omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE)); |
Rajendra Nayak | 6af16a1 | 2014-08-22 09:02:34 -0500 | [diff] [blame] | 690 | omap4_pm_init_early(); |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 691 | omap_prm_base_init(); |
| 692 | omap_cm_base_init(); |
Ambresh K | 7de516a | 2013-08-23 04:05:08 -0600 | [diff] [blame] | 693 | omap44xx_prm_init(); |
Nishanth Menon | 733d20e | 2014-05-19 10:27:11 -0500 | [diff] [blame] | 694 | dra7xxx_check_revision(); |
Tero Kristo | 7632a02 | 2014-10-27 08:39:23 -0700 | [diff] [blame^] | 695 | omap4_cm_init(); |
Ambresh K | 7de516a | 2013-08-23 04:05:08 -0600 | [diff] [blame] | 696 | dra7xx_powerdomains_init(); |
| 697 | dra7xx_clockdomains_init(); |
| 698 | dra7xx_hwmod_init(); |
| 699 | omap_hwmod_init_postsetup(); |
Tero Kristo | f1cf498 | 2013-08-29 11:35:43 +0300 | [diff] [blame] | 700 | omap_clk_soc_init = dra7xx_dt_clk_init; |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 701 | } |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 702 | |
| 703 | void __init dra7xx_init_late(void) |
| 704 | { |
| 705 | omap_common_late_init(); |
Rajendra Nayak | 6af16a1 | 2014-08-22 09:02:34 -0500 | [diff] [blame] | 706 | omap4_pm_init(); |
| 707 | omap2_clk_enable_autoidle_all(); |
Nishanth Menon | 765e7a0 | 2013-10-16 10:39:02 -0500 | [diff] [blame] | 708 | } |
R Sricharan | a3a9384 | 2013-07-03 11:52:04 +0530 | [diff] [blame] | 709 | #endif |
| 710 | |
| 711 | |
Tony Lindgren | a4ca9db | 2011-08-22 23:57:23 -0700 | [diff] [blame] | 712 | void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, |
Paul Walmsley | 4805734 | 2010-12-21 15:25:10 -0700 | [diff] [blame] | 713 | struct omap_sdrc_params *sdrc_cs1) |
| 714 | { |
Tony Lindgren | a66cb34 | 2011-10-04 13:52:57 -0700 | [diff] [blame] | 715 | omap_sram_init(); |
| 716 | |
Hemant Pedanekar | 0100171 | 2011-02-16 08:31:39 -0800 | [diff] [blame] | 717 | if (cpu_is_omap24xx() || omap3_has_sdrc()) { |
Kevin Hilman | aa4b1f6 | 2010-03-10 17:16:31 +0000 | [diff] [blame] | 718 | omap2_sdrc_init(sdrc_cs0, sdrc_cs1); |
| 719 | _omap2_init_reprogram_sdrc(); |
| 720 | } |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 721 | } |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 722 | |
| 723 | int __init omap_clk_init(void) |
| 724 | { |
| 725 | int ret = 0; |
| 726 | |
| 727 | if (!omap_clk_soc_init) |
| 728 | return 0; |
| 729 | |
Tero Kristo | 8111e01 | 2014-07-02 11:47:39 +0300 | [diff] [blame] | 730 | ti_clk_init_features(); |
| 731 | |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 732 | ret = of_prcm_init(); |
Tero Kristo | c08ee14 | 2014-09-12 15:01:57 +0300 | [diff] [blame] | 733 | if (ret) |
| 734 | return ret; |
| 735 | |
| 736 | of_clk_init(NULL); |
| 737 | |
| 738 | ti_dt_clk_init_retry_clks(); |
| 739 | |
| 740 | ti_dt_clockdomains_setup(); |
| 741 | |
| 742 | ret = omap_clk_soc_init(); |
Tero Kristo | cfa9667 | 2013-10-22 11:53:02 +0300 | [diff] [blame] | 743 | |
| 744 | return ret; |
| 745 | } |